Use 'a' operand code for prefetch instruction.
[official-gcc.git] / gcc / caller-save.c
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1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "insn-config.h"
26 #include "flags.h"
27 #include "regs.h"
28 #include "hard-reg-set.h"
29 #include "recog.h"
30 #include "basic-block.h"
31 #include "reload.h"
32 #include "function.h"
33 #include "expr.h"
34 #include "toplev.h"
35 #include "tm_p.h"
37 #ifndef MAX_MOVE_MAX
38 #define MAX_MOVE_MAX MOVE_MAX
39 #endif
41 #ifndef MIN_UNITS_PER_WORD
42 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
43 #endif
45 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
47 /* Modes for each hard register that we can save. The smallest mode is wide
48 enough to save the entire contents of the register. When saving the
49 register because it is live we first try to save in multi-register modes.
50 If that is not possible the save is done one register at a time. */
52 static enum machine_mode
53 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* For each hard register, a place on the stack where it can be saved,
56 if needed. */
58 static rtx
59 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
65 be recognized. */
67 static int
68 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
69 static int
70 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
81 insn. */
82 static HARD_REG_SET referenced_regs;
84 /* Computed in mark_set_regs, holds all registers set by the current
85 instruction. */
86 static HARD_REG_SET this_insn_sets;
89 static void mark_set_regs PARAMS ((rtx, rtx, void *));
90 static void mark_referenced_regs PARAMS ((rtx));
91 static int insert_save PARAMS ((struct insn_chain *, int, int,
92 HARD_REG_SET *,
93 enum machine_mode *));
94 static int insert_restore PARAMS ((struct insn_chain *, int, int,
95 int, enum machine_mode *));
96 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
97 int, rtx));
98 static void add_stored_regs PARAMS ((rtx, rtx, void *));
100 /* Initialize for caller-save.
102 Look at all the hard registers that are used by a call and for which
103 regclass.c has not already excluded from being used across a call.
105 Ensure that we can find a mode to save the register and that there is a
106 simple insn to save and restore the register. This latter check avoids
107 problems that would occur if we tried to save the MQ register of some
108 machines directly into memory. */
110 void
111 init_caller_save ()
113 rtx addr_reg;
114 int offset;
115 rtx address;
116 int i, j;
117 enum machine_mode mode;
119 /* First find all the registers that we need to deal with and all
120 the modes that they can have. If we can't find a mode to use,
121 we can't have the register live over calls. */
123 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
125 if (call_used_regs[i] && ! call_fixed_regs[i])
127 for (j = 1; j <= MOVE_MAX_WORDS; j++)
129 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
130 VOIDmode);
131 if (regno_save_mode[i][j] == VOIDmode && j == 1)
133 call_fixed_regs[i] = 1;
134 SET_HARD_REG_BIT (call_fixed_reg_set, i);
138 else
139 regno_save_mode[i][1] = VOIDmode;
142 /* The following code tries to approximate the conditions under which
143 we can easily save and restore a register without scratch registers or
144 other complexities. It will usually work, except under conditions where
145 the validity of an insn operand is dependent on the address offset.
146 No such cases are currently known.
148 We first find a typical offset from some BASE_REG_CLASS register.
149 This address is chosen by finding the first register in the class
150 and by finding the smallest power of two that is a valid offset from
151 that register in every mode we will use to save registers. */
153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
154 if (TEST_HARD_REG_BIT
155 (reg_class_contents
156 [(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
157 break;
159 if (i == FIRST_PSEUDO_REGISTER)
160 abort ();
162 addr_reg = gen_rtx_REG (Pmode, i);
164 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
166 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
168 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
169 if (regno_save_mode[i][1] != VOIDmode
170 && ! strict_memory_address_p (regno_save_mode[i][1], address))
171 break;
173 if (i == FIRST_PSEUDO_REGISTER)
174 break;
177 /* If we didn't find a valid address, we must use register indirect. */
178 if (offset == 0)
179 address = addr_reg;
181 /* Next we try to form an insn to save and restore the register. We
182 see if such an insn is recognized and meets its constraints. */
184 start_sequence ();
186 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
187 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
188 if (HARD_REGNO_MODE_OK (i, mode))
190 rtx mem = gen_rtx_MEM (mode, address);
191 rtx reg = gen_rtx_REG (mode, i);
192 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
193 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
194 rtx saveinsn = emit_insn (savepat);
195 rtx restinsn = emit_insn (restpat);
196 int ok;
198 reg_save_code[i][mode] = recog_memoized (saveinsn);
199 reg_restore_code[i][mode] = recog_memoized (restinsn);
201 /* Now extract both insns and see if we can meet their
202 constraints. */
203 ok = (reg_save_code[i][mode] != -1
204 && reg_restore_code[i][mode] != -1);
205 if (ok)
207 extract_insn (saveinsn);
208 ok = constrain_operands (1);
209 extract_insn (restinsn);
210 ok &= constrain_operands (1);
213 if (! ok)
215 reg_save_code[i][mode] = -1;
216 reg_restore_code[i][mode] = -1;
219 else
221 reg_save_code[i][mode] = -1;
222 reg_restore_code[i][mode] = -1;
224 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
225 for (j = 1; j <= MOVE_MAX_WORDS; j++)
226 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
228 regno_save_mode[i][j] = VOIDmode;
229 if (j == 1)
231 call_fixed_regs[i] = 1;
232 SET_HARD_REG_BIT (call_fixed_reg_set, i);
236 end_sequence ();
239 /* Initialize save areas by showing that we haven't allocated any yet. */
241 void
242 init_save_areas ()
244 int i, j;
246 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
247 for (j = 1; j <= MOVE_MAX_WORDS; j++)
248 regno_save_mem[i][j] = 0;
251 /* Allocate save areas for any hard registers that might need saving.
252 We take a conservative approach here and look for call-clobbered hard
253 registers that are assigned to pseudos that cross calls. This may
254 overestimate slightly (especially if some of these registers are later
255 used as spill registers), but it should not be significant.
257 Future work:
259 In the fallback case we should iterate backwards across all possible
260 modes for the save, choosing the largest available one instead of
261 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
263 We do not try to use "move multiple" instructions that exist
264 on some machines (such as the 68k moveml). It could be a win to try
265 and use them when possible. The hard part is doing it in a way that is
266 machine independent since they might be saving non-consecutive
267 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
269 void
270 setup_save_areas ()
272 int i, j, k;
273 unsigned int r;
274 HARD_REG_SET hard_regs_used;
276 /* Allocate space in the save area for the largest multi-register
277 pseudos first, then work backwards to single register
278 pseudos. */
280 /* Find and record all call-used hard-registers in this function. */
281 CLEAR_HARD_REG_SET (hard_regs_used);
282 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
283 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
285 unsigned int regno = reg_renumber[i];
286 unsigned int endregno
287 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
289 for (r = regno; r < endregno; r++)
290 if (call_used_regs[r])
291 SET_HARD_REG_BIT (hard_regs_used, r);
294 /* Now run through all the call-used hard-registers and allocate
295 space for them in the caller-save area. Try to allocate space
296 in a manner which allows multi-register saves/restores to be done. */
298 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
299 for (j = MOVE_MAX_WORDS; j > 0; j--)
301 int do_save = 1;
303 /* If no mode exists for this size, try another. Also break out
304 if we have already saved this hard register. */
305 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
306 continue;
308 /* See if any register in this group has been saved. */
309 for (k = 0; k < j; k++)
310 if (regno_save_mem[i + k][1])
312 do_save = 0;
313 break;
315 if (! do_save)
316 continue;
318 for (k = 0; k < j; k++)
319 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
321 do_save = 0;
322 break;
324 if (! do_save)
325 continue;
327 /* We have found an acceptable mode to store in. */
328 regno_save_mem[i][j]
329 = assign_stack_local (regno_save_mode[i][j],
330 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
332 /* Setup single word save area just in case... */
333 for (k = 0; k < j; k++)
334 /* This should not depend on WORDS_BIG_ENDIAN.
335 The order of words in regs is the same as in memory. */
336 regno_save_mem[i + k][1]
337 = adjust_address_nv (regno_save_mem[i][j],
338 regno_save_mode[i + k][1],
339 k * UNITS_PER_WORD);
342 /* Now loop again and set the alias set of any save areas we made to
343 the alias set used to represent frame objects. */
344 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
345 for (j = MOVE_MAX_WORDS; j > 0; j--)
346 if (regno_save_mem[i][j] != 0)
347 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
350 /* Find the places where hard regs are live across calls and save them. */
352 void
353 save_call_clobbered_regs ()
355 struct insn_chain *chain, *next;
356 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
358 CLEAR_HARD_REG_SET (hard_regs_saved);
359 n_regs_saved = 0;
361 for (chain = reload_insn_chain; chain != 0; chain = next)
363 rtx insn = chain->insn;
364 enum rtx_code code = GET_CODE (insn);
366 next = chain->next;
368 if (chain->is_caller_save_insn)
369 abort ();
371 if (GET_RTX_CLASS (code) == 'i')
373 /* If some registers have been saved, see if INSN references
374 any of them. We must restore them before the insn if so. */
376 if (n_regs_saved)
378 int regno;
380 if (code == JUMP_INSN)
381 /* Restore all registers if this is a JUMP_INSN. */
382 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
383 else
385 CLEAR_HARD_REG_SET (referenced_regs);
386 mark_referenced_regs (PATTERN (insn));
387 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
390 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
391 if (TEST_HARD_REG_BIT (referenced_regs, regno))
392 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
395 if (code == CALL_INSN)
397 int regno;
398 HARD_REG_SET hard_regs_to_save;
400 /* Use the register life information in CHAIN to compute which
401 regs are live during the call. */
402 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
403 &chain->live_throughout);
404 /* Save hard registers always in the widest mode available. */
405 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
406 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
407 save_mode [regno] = regno_save_mode [regno][1];
408 else
409 save_mode [regno] = VOIDmode;
411 /* Look through all live pseudos, mark their hard registers
412 and choose proper mode for saving. */
413 EXECUTE_IF_SET_IN_REG_SET
414 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
416 int r = reg_renumber[regno];
417 int nregs;
419 if (r >= 0)
421 enum machine_mode mode;
423 nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (regno));
424 mode = HARD_REGNO_CALLER_SAVE_MODE
425 (r, nregs, PSEUDO_REGNO_MODE (regno));
426 if (GET_MODE_BITSIZE (mode)
427 > GET_MODE_BITSIZE (save_mode[r]))
428 save_mode[r] = mode;
429 while (nregs-- > 0)
430 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
432 else
433 abort ();
436 /* Record all registers set in this call insn. These don't need
437 to be saved. N.B. the call insn might set a subreg of a
438 multi-hard-reg pseudo; then the pseudo is considered live
439 during the call, but the subreg that is set isn't. */
440 CLEAR_HARD_REG_SET (this_insn_sets);
441 note_stores (PATTERN (insn), mark_set_regs, NULL);
443 /* Compute which hard regs must be saved before this call. */
444 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
445 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
446 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
447 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
449 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
450 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
451 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
453 /* Must recompute n_regs_saved. */
454 n_regs_saved = 0;
455 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
456 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
457 n_regs_saved++;
461 if (chain->next == 0 || chain->next->block > chain->block)
463 int regno;
464 /* At the end of the basic block, we must restore any registers that
465 remain saved. If the last insn in the block is a JUMP_INSN, put
466 the restore before the insn, otherwise, put it after the insn. */
468 if (n_regs_saved)
469 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
470 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
471 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
472 regno, MOVE_MAX_WORDS, save_mode);
477 /* Here from note_stores when an insn stores a value in a register.
478 Set the proper bit or bits in this_insn_sets. All pseudos that have
479 been assigned hard regs have had their register number changed already,
480 so we can ignore pseudos. */
481 static void
482 mark_set_regs (reg, setter, data)
483 rtx reg;
484 rtx setter ATTRIBUTE_UNUSED;
485 void *data ATTRIBUTE_UNUSED;
487 int regno, endregno, i;
488 enum machine_mode mode = GET_MODE (reg);
490 if (GET_CODE (reg) == SUBREG)
492 rtx inner = SUBREG_REG (reg);
493 if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
494 return;
496 regno = subreg_hard_regno (reg, 1);
498 else if (GET_CODE (reg) == REG
499 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
500 regno = REGNO (reg);
501 else
502 return;
504 endregno = regno + HARD_REGNO_NREGS (regno, mode);
506 for (i = regno; i < endregno; i++)
507 SET_HARD_REG_BIT (this_insn_sets, i);
510 /* Here from note_stores when an insn stores a value in a register.
511 Set the proper bit or bits in the passed regset. All pseudos that have
512 been assigned hard regs have had their register number changed already,
513 so we can ignore pseudos. */
514 static void
515 add_stored_regs (reg, setter, data)
516 rtx reg;
517 rtx setter;
518 void *data;
520 int regno, endregno, i;
521 enum machine_mode mode = GET_MODE (reg);
522 int offset = 0;
524 if (GET_CODE (setter) == CLOBBER)
525 return;
527 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
529 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
530 GET_MODE (SUBREG_REG (reg)),
531 SUBREG_BYTE (reg),
532 GET_MODE (reg));
533 reg = SUBREG_REG (reg);
536 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
537 return;
539 regno = REGNO (reg) + offset;
540 endregno = regno + HARD_REGNO_NREGS (regno, mode);
542 for (i = regno; i < endregno; i++)
543 SET_REGNO_REG_SET ((regset) data, i);
546 /* Walk X and record all referenced registers in REFERENCED_REGS. */
547 static void
548 mark_referenced_regs (x)
549 rtx x;
551 enum rtx_code code = GET_CODE (x);
552 const char *fmt;
553 int i, j;
555 if (code == SET)
556 mark_referenced_regs (SET_SRC (x));
557 if (code == SET || code == CLOBBER)
559 x = SET_DEST (x);
560 code = GET_CODE (x);
561 if (code == REG || code == PC || code == CC0
562 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
563 /* If we're setting only part of a multi-word register,
564 we shall mark it as referenced, because the words
565 that are not being set should be restored. */
566 && ((GET_MODE_SIZE (GET_MODE (x))
567 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
568 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
569 <= UNITS_PER_WORD))))
570 return;
572 if (code == MEM || code == SUBREG)
574 x = XEXP (x, 0);
575 code = GET_CODE (x);
578 if (code == REG)
580 int regno = REGNO (x);
581 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
582 : reg_renumber[regno]);
584 if (hardregno >= 0)
586 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
587 while (nregs-- > 0)
588 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
590 /* If this is a pseudo that did not get a hard register, scan its
591 memory location, since it might involve the use of another
592 register, which might be saved. */
593 else if (reg_equiv_mem[regno] != 0)
594 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
595 else if (reg_equiv_address[regno] != 0)
596 mark_referenced_regs (reg_equiv_address[regno]);
597 return;
600 fmt = GET_RTX_FORMAT (code);
601 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
603 if (fmt[i] == 'e')
604 mark_referenced_regs (XEXP (x, i));
605 else if (fmt[i] == 'E')
606 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
607 mark_referenced_regs (XVECEXP (x, i, j));
611 /* Insert a sequence of insns to restore. Place these insns in front of
612 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
613 the maximum number of registers which should be restored during this call.
614 It should never be less than 1 since we only work with entire registers.
616 Note that we have verified in init_caller_save that we can do this
617 with a simple SET, so use it. Set INSN_CODE to what we save there
618 since the address might not be valid so the insn might not be recognized.
619 These insns will be reloaded and have register elimination done by
620 find_reload, so we need not worry about that here.
622 Return the extra number of registers saved. */
624 static int
625 insert_restore (chain, before_p, regno, maxrestore, save_mode)
626 struct insn_chain *chain;
627 int before_p;
628 int regno;
629 int maxrestore;
630 enum machine_mode *save_mode;
632 int i, k;
633 rtx pat = NULL_RTX;
634 int code;
635 unsigned int numregs = 0;
636 struct insn_chain *new;
637 rtx mem;
639 /* A common failure mode if register status is not correct in the RTL
640 is for this routine to be called with a REGNO we didn't expect to
641 save. That will cause us to write an insn with a (nil) SET_DEST
642 or SET_SRC. Instead of doing so and causing a crash later, check
643 for this common case and abort here instead. This will remove one
644 step in debugging such problems. */
646 if (regno_save_mem[regno][1] == 0)
647 abort ();
649 /* Get the pattern to emit and update our status.
651 See if we can restore `maxrestore' registers at once. Work
652 backwards to the single register case. */
653 for (i = maxrestore; i > 0; i--)
655 int j;
656 int ok = 1;
658 if (regno_save_mem[regno][i] == 0)
659 continue;
661 for (j = 0; j < i; j++)
662 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
664 ok = 0;
665 break;
667 /* Must do this one restore at a time */
668 if (! ok)
669 continue;
671 numregs = i;
672 break;
675 mem = regno_save_mem [regno][numregs];
676 if (save_mode [regno] != VOIDmode
677 && save_mode [regno] != GET_MODE (mem)
678 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
679 mem = adjust_address (mem, save_mode[regno], 0);
680 pat = gen_rtx_SET (VOIDmode,
681 gen_rtx_REG (GET_MODE (mem),
682 regno), mem);
683 code = reg_restore_code[regno][GET_MODE (mem)];
684 new = insert_one_insn (chain, before_p, code, pat);
686 /* Clear status for all registers we restored. */
687 for (k = 0; k < i; k++)
689 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
690 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
691 n_regs_saved--;
696 /* Tell our callers how many extra registers we saved/restored */
697 return numregs - 1;
700 /* Like insert_restore above, but save registers instead. */
701 static int
702 insert_save (chain, before_p, regno, to_save, save_mode)
703 struct insn_chain *chain;
704 int before_p;
705 int regno;
706 HARD_REG_SET *to_save;
707 enum machine_mode *save_mode;
709 int i;
710 unsigned int k;
711 rtx pat = NULL_RTX;
712 int code;
713 unsigned int numregs = 0;
714 struct insn_chain *new;
715 rtx mem;
717 /* A common failure mode if register status is not correct in the RTL
718 is for this routine to be called with a REGNO we didn't expect to
719 save. That will cause us to write an insn with a (nil) SET_DEST
720 or SET_SRC. Instead of doing so and causing a crash later, check
721 for this common case and abort here instead. This will remove one
722 step in debugging such problems. */
724 if (regno_save_mem[regno][1] == 0)
725 abort ();
727 /* Get the pattern to emit and update our status.
729 See if we can save several registers with a single instruction.
730 Work backwards to the single register case. */
731 for (i = MOVE_MAX_WORDS; i > 0; i--)
733 int j;
734 int ok = 1;
735 if (regno_save_mem[regno][i] == 0)
736 continue;
738 for (j = 0; j < i; j++)
739 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
741 ok = 0;
742 break;
744 /* Must do this one save at a time */
745 if (! ok)
746 continue;
748 numregs = i;
749 break;
752 mem = regno_save_mem [regno][numregs];
753 if (save_mode [regno] != VOIDmode
754 && save_mode [regno] != GET_MODE (mem)
755 && numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
756 mem = adjust_address (mem, save_mode[regno], 0);
757 pat = gen_rtx_SET (VOIDmode, mem,
758 gen_rtx_REG (GET_MODE (mem),
759 regno));
760 code = reg_save_code[regno][GET_MODE (mem)];
761 new = insert_one_insn (chain, before_p, code, pat);
763 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
764 for (k = 0; k < numregs; k++)
766 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
767 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
768 n_regs_saved++;
771 /* Tell our callers how many extra registers we saved/restored */
772 return numregs - 1;
775 /* Emit a new caller-save insn and set the code. */
776 static struct insn_chain *
777 insert_one_insn (chain, before_p, code, pat)
778 struct insn_chain *chain;
779 int before_p;
780 int code;
781 rtx pat;
783 rtx insn = chain->insn;
784 struct insn_chain *new;
786 #ifdef HAVE_cc0
787 /* If INSN references CC0, put our insns in front of the insn that sets
788 CC0. This is always safe, since the only way we could be passed an
789 insn that references CC0 is for a restore, and doing a restore earlier
790 isn't a problem. We do, however, assume here that CALL_INSNs don't
791 reference CC0. Guard against non-INSN's like CODE_LABEL. */
793 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
794 && before_p
795 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
796 chain = chain->prev, insn = chain->insn;
797 #endif
799 new = new_insn_chain ();
800 if (before_p)
802 rtx link;
804 new->prev = chain->prev;
805 if (new->prev != 0)
806 new->prev->next = new;
807 else
808 reload_insn_chain = new;
810 chain->prev = new;
811 new->next = chain;
812 new->insn = emit_insn_before (pat, insn);
813 /* ??? It would be nice if we could exclude the already / still saved
814 registers from the live sets. */
815 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
816 /* Registers that die in CHAIN->INSN still live in the new insn. */
817 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
819 if (REG_NOTE_KIND (link) == REG_DEAD)
821 rtx reg = XEXP (link, 0);
822 int regno, i;
824 if (GET_CODE (reg) != REG)
825 abort ();
827 regno = REGNO (reg);
828 if (regno >= FIRST_PSEUDO_REGISTER)
829 regno = reg_renumber[regno];
830 if (regno < 0)
831 continue;
832 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
833 i >= 0; i--)
834 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
837 CLEAR_REG_SET (&new->dead_or_set);
838 if (chain->insn == BLOCK_HEAD (chain->block))
839 BLOCK_HEAD (chain->block) = new->insn;
841 else
843 new->next = chain->next;
844 if (new->next != 0)
845 new->next->prev = new;
846 chain->next = new;
847 new->prev = chain;
848 new->insn = emit_insn_after (pat, insn);
849 /* ??? It would be nice if we could exclude the already / still saved
850 registers from the live sets, and observe REG_UNUSED notes. */
851 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
852 /* Registers that are set in CHAIN->INSN live in the new insn.
853 (Unless there is a REG_UNUSED note for them, but we don't
854 look for them here.) */
855 note_stores (PATTERN (chain->insn), add_stored_regs,
856 &new->live_throughout);
857 CLEAR_REG_SET (&new->dead_or_set);
858 if (chain->insn == BLOCK_END (chain->block))
859 BLOCK_END (chain->block) = new->insn;
861 new->block = chain->block;
862 new->is_caller_save_insn = 1;
864 INSN_CODE (new->insn) = code;
865 return new;