gcc/config/nds32/nds32-memory-manipulation.c

   1 /* Auxiliary functions for expand movmem, setmem, cmpmem, load_multiple
   2    and store_multiple pattern of Andes NDS32 cpu for GNU compiler
   3    Copyright (C) 2012-2018 Free Software Foundation, Inc.
   4    Contributed by Andes Technology Corporation.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 /* ------------------------------------------------------------------------ */
  23
  24 #define IN_TARGET_CODE 1
  25
  26 #include "config.h"
  27 #include "system.h"
  28 #include "coretypes.h"
  29 #include "backend.h"
  30 #include "target.h"
  31 #include "rtl.h"
  32 #include "memmodel.h"
  33 #include "emit-rtl.h"
  34 #include "explow.h"
  35
  36 /* ------------------------------------------------------------------------ */
  37
  38 /* Functions to expand load_multiple and store_multiple.
  39    They are auxiliary extern functions to help create rtx template.
  40    Check nds32-multiple.md file for the patterns.  */
  41 rtx
  42 nds32_expand_load_multiple (int base_regno, int count,
  43                             rtx base_addr, rtx basemem)
  44 {
  45   int par_index;
  46   int offset;
  47   rtx result;
  48   rtx new_addr, mem, reg;
  49
  50   /* Create the pattern that is presented in nds32-multiple.md.  */
  51
  52   result = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
  53
  54   for (par_index = 0; par_index < count; par_index++)
  55     {
  56       offset   = par_index * 4;
  57       /* 4-byte for loading data to each register.  */
  58       new_addr = plus_constant (Pmode, base_addr, offset);
  59       mem      = adjust_automodify_address_nv (basemem, SImode,
  60                                                new_addr, offset);
  61       reg      = gen_rtx_REG (SImode, base_regno + par_index);
  62
  63       XVECEXP (result, 0, par_index) = gen_rtx_SET (reg, mem);
  64     }
  65
  66   return result;
  67 }
  68
  69 rtx
  70 nds32_expand_store_multiple (int base_regno, int count,
  71                              rtx base_addr, rtx basemem)
  72 {
  73   int par_index;
  74   int offset;
  75   rtx result;
  76   rtx new_addr, mem, reg;
  77
  78   /* Create the pattern that is presented in nds32-multiple.md.  */
  79
  80   result = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
  81
  82   for (par_index = 0; par_index < count; par_index++)
  83     {
  84       offset   = par_index * 4;
  85       /* 4-byte for storing data to memory.  */
  86       new_addr = plus_constant (Pmode, base_addr, offset);
  87       mem      = adjust_automodify_address_nv (basemem, SImode,
  88                                                new_addr, offset);
  89       reg      = gen_rtx_REG (SImode, base_regno + par_index);
  90
  91       XVECEXP (result, 0, par_index) = gen_rtx_SET (mem, reg);
  92     }
  93
  94   return result;
  95 }
  96
  97 /* Function to move block memory content by
  98    using load_multiple and store_multiple.
  99    This is auxiliary extern function to help create rtx template.
 100    Check nds32-multiple.md file for the patterns.  */
 101 int
 102 nds32_expand_movmemqi (rtx dstmem, rtx srcmem, rtx total_bytes, rtx alignment)
 103 {
 104   HOST_WIDE_INT in_words, out_words;
 105   rtx dst_base_reg, src_base_reg;
 106   int maximum_bytes;
 107
 108   /* Because reduced-set regsiters has few registers
 109      (r0~r5, r6~10, r15, r28~r31, where 'r15' and 'r28~r31'
 110       cannot be used for register allocation),
 111      using 8 registers (32 bytes) for moving memory block
 112      may easily consume all of them.
 113      It makes register allocation/spilling hard to work.
 114      So we only allow maximum=4 registers (16 bytes) for
 115      moving memory block under reduced-set registers.  */
 116   if (TARGET_REDUCED_REGS)
 117     maximum_bytes = 16;
 118   else
 119     maximum_bytes = 32;
 120
 121   /* 1. Total_bytes is integer for sure.
 122      2. Alignment is integer for sure.
 123      3. Maximum 4 or 8 registers, 4 * 4 = 16 bytes, 8 * 4 = 32 bytes.
 124      4. Requires (n * 4) block size.
 125      5. Requires 4-byte alignment.  */
 126   if (GET_CODE (total_bytes) != CONST_INT
 127       || GET_CODE (alignment) != CONST_INT
 128       || INTVAL (total_bytes) > maximum_bytes
 129       || INTVAL (total_bytes) & 3
 130       || INTVAL (alignment) & 3)
 131     return 0;
 132
 133   dst_base_reg = copy_to_mode_reg (SImode, XEXP (dstmem, 0));
 134   src_base_reg = copy_to_mode_reg (SImode, XEXP (srcmem, 0));
 135
 136   out_words = in_words = INTVAL (total_bytes) / UNITS_PER_WORD;
 137
 138   emit_insn (nds32_expand_load_multiple (0, in_words, src_base_reg, srcmem));
 139   emit_insn (nds32_expand_store_multiple (0, out_words, dst_base_reg, dstmem));
 140
 141   /* Successfully create patterns, return 1.  */
 142   return 1;
 143 }
 144
 145 /* ------------------------------------------------------------------------ */