1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
93 #include "coretypes.h"
95 #include "rtl-error.h"
97 #include "insn-config.h"
100 #include "insn-codes.h"
103 #include "dominance.h"
106 #include "basic-block.h"
110 #include "addresses.h"
111 #include "hard-reg-set.h"
114 #include "hash-set.h"
116 #include "machmode.h"
118 #include "function.h"
123 /* True if X is a constant that can be forced into the constant pool.
124 MODE is the mode of the operand, or VOIDmode if not known. */
125 #define CONST_POOL_OK_P(MODE, X) \
126 ((MODE) != VOIDmode \
128 && GET_CODE (X) != HIGH \
129 && !targetm.cannot_force_const_mem (MODE, X))
131 /* True if C is a non-empty register class that has too few registers
132 to be safely used as a reload target class. */
135 small_register_class_p (reg_class_t rclass
)
137 return (reg_class_size
[(int) rclass
] == 1
138 || (reg_class_size
[(int) rclass
] >= 1
139 && targetm
.class_likely_spilled_p (rclass
)));
143 /* All reloads of the current insn are recorded here. See reload.h for
146 struct reload rld
[MAX_RELOADS
];
148 /* All the "earlyclobber" operands of the current insn
149 are recorded here. */
151 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
153 int reload_n_operands
;
155 /* Replacing reloads.
157 If `replace_reloads' is nonzero, then as each reload is recorded
158 an entry is made for it in the table `replacements'.
159 Then later `subst_reloads' can look through that table and
160 perform all the replacements needed. */
162 /* Nonzero means record the places to replace. */
163 static int replace_reloads
;
165 /* Each replacement is recorded with a structure like this. */
168 rtx
*where
; /* Location to store in */
169 int what
; /* which reload this is for */
170 machine_mode mode
; /* mode it must have */
173 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
175 /* Number of replacements currently recorded. */
176 static int n_replacements
;
178 /* Used to track what is modified by an operand. */
181 int reg_flag
; /* Nonzero if referencing a register. */
182 int safe
; /* Nonzero if this can't conflict with anything. */
183 rtx base
; /* Base address for MEM. */
184 HOST_WIDE_INT start
; /* Starting offset or register number. */
185 HOST_WIDE_INT end
; /* Ending offset or register number. */
188 #ifdef SECONDARY_MEMORY_NEEDED
190 /* Save MEMs needed to copy from one class of registers to another. One MEM
191 is used per mode, but normally only one or two modes are ever used.
193 We keep two versions, before and after register elimination. The one
194 after register elimination is record separately for each operand. This
195 is done in case the address is not valid to be sure that we separately
198 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
199 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
200 static int secondary_memlocs_elim_used
= 0;
203 /* The instruction we are doing reloads for;
204 so we can test whether a register dies in it. */
205 static rtx_insn
*this_insn
;
207 /* Nonzero if this instruction is a user-specified asm with operands. */
208 static int this_insn_is_asm
;
210 /* If hard_regs_live_known is nonzero,
211 we can tell which hard regs are currently live,
212 at least enough to succeed in choosing dummy reloads. */
213 static int hard_regs_live_known
;
215 /* Indexed by hard reg number,
216 element is nonnegative if hard reg has been spilled.
217 This vector is passed to `find_reloads' as an argument
218 and is not changed here. */
219 static short *static_reload_reg_p
;
221 /* Set to 1 in subst_reg_equivs if it changes anything. */
222 static int subst_reg_equivs_changed
;
224 /* On return from push_reload, holds the reload-number for the OUT
225 operand, which can be different for that from the input operand. */
226 static int output_reloadnum
;
228 /* Compare two RTX's. */
229 #define MATCHES(x, y) \
230 (x == y || (x != 0 && (REG_P (x) \
231 ? REG_P (y) && REGNO (x) == REGNO (y) \
232 : rtx_equal_p (x, y) && ! side_effects_p (x))))
234 /* Indicates if two reloads purposes are for similar enough things that we
235 can merge their reloads. */
236 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
237 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
238 || ((when1) == (when2) && (op1) == (op2)) \
239 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
240 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
241 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
242 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
243 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
245 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
246 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
247 ((when1) != (when2) \
248 || ! ((op1) == (op2) \
249 || (when1) == RELOAD_FOR_INPUT \
250 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
251 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
253 /* If we are going to reload an address, compute the reload type to
255 #define ADDR_TYPE(type) \
256 ((type) == RELOAD_FOR_INPUT_ADDRESS \
257 ? RELOAD_FOR_INPADDR_ADDRESS \
258 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
259 ? RELOAD_FOR_OUTADDR_ADDRESS \
262 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
263 machine_mode
, enum reload_type
,
264 enum insn_code
*, secondary_reload_info
*);
265 static enum reg_class
find_valid_class (machine_mode
, machine_mode
,
267 static void push_replacement (rtx
*, int, machine_mode
);
268 static void dup_replacements (rtx
*, rtx
*);
269 static void combine_reloads (void);
270 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
271 enum reload_type
, int, int);
272 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, machine_mode
,
273 machine_mode
, reg_class_t
, int, int);
274 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
275 static struct decomposition
decompose (rtx
);
276 static int immune_p (rtx
, rtx
, struct decomposition
);
277 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
278 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int,
280 static rtx
make_memloc (rtx
, int);
281 static int maybe_memory_address_addr_space_p (machine_mode
, rtx
,
282 addr_space_t
, rtx
*);
283 static int find_reloads_address (machine_mode
, rtx
*, rtx
, rtx
*,
284 int, enum reload_type
, int, rtx_insn
*);
285 static rtx
subst_reg_equivs (rtx
, rtx_insn
*);
286 static rtx
subst_indexed_address (rtx
);
287 static void update_auto_inc_notes (rtx_insn
*, int, int);
288 static int find_reloads_address_1 (machine_mode
, addr_space_t
, rtx
, int,
289 enum rtx_code
, enum rtx_code
, rtx
*,
290 int, enum reload_type
,int, rtx_insn
*);
291 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
293 enum reload_type
, int);
294 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
295 int, rtx_insn
*, int *);
296 static void copy_replacements_1 (rtx
*, rtx
*, int);
297 static int find_inc_amount (rtx
, rtx
);
298 static int refers_to_mem_for_reload_p (rtx
);
299 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
302 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
306 push_reg_equiv_alt_mem (int regno
, rtx mem
)
310 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
311 if (rtx_equal_p (XEXP (it
, 0), mem
))
314 reg_equiv_alt_mem_list (regno
)
315 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
316 reg_equiv_alt_mem_list (regno
));
319 /* Determine if any secondary reloads are needed for loading (if IN_P is
320 nonzero) or storing (if IN_P is zero) X to or from a reload register of
321 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
322 are needed, push them.
324 Return the reload number of the secondary reload we made, or -1 if
325 we didn't need one. *PICODE is set to the insn_code to use if we do
326 need a secondary reload. */
329 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
330 enum reg_class reload_class
,
331 machine_mode reload_mode
, enum reload_type type
,
332 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
334 enum reg_class rclass
= NO_REGS
;
335 enum reg_class scratch_class
;
336 machine_mode mode
= reload_mode
;
337 enum insn_code icode
= CODE_FOR_nothing
;
338 enum insn_code t_icode
= CODE_FOR_nothing
;
339 enum reload_type secondary_type
;
340 int s_reload
, t_reload
= -1;
341 const char *scratch_constraint
;
342 secondary_reload_info sri
;
344 if (type
== RELOAD_FOR_INPUT_ADDRESS
345 || type
== RELOAD_FOR_OUTPUT_ADDRESS
346 || type
== RELOAD_FOR_INPADDR_ADDRESS
347 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
348 secondary_type
= type
;
350 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
352 *picode
= CODE_FOR_nothing
;
354 /* If X is a paradoxical SUBREG, use the inner value to determine both the
355 mode and object being reloaded. */
356 if (paradoxical_subreg_p (x
))
359 reload_mode
= GET_MODE (x
);
362 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
363 is still a pseudo-register by now, it *must* have an equivalent MEM
364 but we don't want to assume that), use that equivalent when seeing if
365 a secondary reload is needed since whether or not a reload is needed
366 might be sensitive to the form of the MEM. */
368 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
369 && reg_equiv_mem (REGNO (x
)))
370 x
= reg_equiv_mem (REGNO (x
));
372 sri
.icode
= CODE_FOR_nothing
;
373 sri
.prev_sri
= prev_sri
;
374 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
376 icode
= (enum insn_code
) sri
.icode
;
378 /* If we don't need any secondary registers, done. */
379 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
382 if (rclass
!= NO_REGS
)
383 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
384 reload_mode
, type
, &t_icode
, &sri
);
386 /* If we will be using an insn, the secondary reload is for a
389 if (icode
!= CODE_FOR_nothing
)
391 /* If IN_P is nonzero, the reload register will be the output in
392 operand 0. If IN_P is zero, the reload register will be the input
393 in operand 1. Outputs should have an initial "=", which we must
396 /* ??? It would be useful to be able to handle only two, or more than
397 three, operands, but for now we can only handle the case of having
398 exactly three: output, input and one temp/scratch. */
399 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
401 /* ??? We currently have no way to represent a reload that needs
402 an icode to reload from an intermediate tertiary reload register.
403 We should probably have a new field in struct reload to tag a
404 chain of scratch operand reloads onto. */
405 gcc_assert (rclass
== NO_REGS
);
407 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
408 gcc_assert (*scratch_constraint
== '=');
409 scratch_constraint
++;
410 if (*scratch_constraint
== '&')
411 scratch_constraint
++;
412 scratch_class
= (reg_class_for_constraint
413 (lookup_constraint (scratch_constraint
)));
415 rclass
= scratch_class
;
416 mode
= insn_data
[(int) icode
].operand
[2].mode
;
419 /* This case isn't valid, so fail. Reload is allowed to use the same
420 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
421 in the case of a secondary register, we actually need two different
422 registers for correct code. We fail here to prevent the possibility of
423 silently generating incorrect code later.
425 The convention is that secondary input reloads are valid only if the
426 secondary_class is different from class. If you have such a case, you
427 can not use secondary reloads, you must work around the problem some
430 Allow this when a reload_in/out pattern is being used. I.e. assume
431 that the generated code handles this case. */
433 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
434 || t_icode
!= CODE_FOR_nothing
);
436 /* See if we can reuse an existing secondary reload. */
437 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
438 if (rld
[s_reload
].secondary_p
439 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
440 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
441 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
442 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
443 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
444 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
445 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
446 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
447 && (small_register_class_p (rclass
)
448 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
449 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
450 opnum
, rld
[s_reload
].opnum
))
453 rld
[s_reload
].inmode
= mode
;
455 rld
[s_reload
].outmode
= mode
;
457 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
458 rld
[s_reload
].rclass
= rclass
;
460 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
461 rld
[s_reload
].optional
&= optional
;
462 rld
[s_reload
].secondary_p
= 1;
463 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
464 opnum
, rld
[s_reload
].opnum
))
465 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
470 if (s_reload
== n_reloads
)
472 #ifdef SECONDARY_MEMORY_NEEDED
473 /* If we need a memory location to copy between the two reload regs,
474 set it up now. Note that we do the input case before making
475 the reload and the output case after. This is due to the
476 way reloads are output. */
478 if (in_p
&& icode
== CODE_FOR_nothing
479 && SECONDARY_MEMORY_NEEDED (rclass
, reload_class
, mode
))
481 get_secondary_mem (x
, reload_mode
, opnum
, type
);
483 /* We may have just added new reloads. Make sure we add
484 the new reload at the end. */
485 s_reload
= n_reloads
;
489 /* We need to make a new secondary reload for this register class. */
490 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
491 rld
[s_reload
].rclass
= rclass
;
493 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
494 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
495 rld
[s_reload
].reg_rtx
= 0;
496 rld
[s_reload
].optional
= optional
;
497 rld
[s_reload
].inc
= 0;
498 /* Maybe we could combine these, but it seems too tricky. */
499 rld
[s_reload
].nocombine
= 1;
500 rld
[s_reload
].in_reg
= 0;
501 rld
[s_reload
].out_reg
= 0;
502 rld
[s_reload
].opnum
= opnum
;
503 rld
[s_reload
].when_needed
= secondary_type
;
504 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
505 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
506 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
507 rld
[s_reload
].secondary_out_icode
508 = ! in_p
? t_icode
: CODE_FOR_nothing
;
509 rld
[s_reload
].secondary_p
= 1;
513 #ifdef SECONDARY_MEMORY_NEEDED
514 if (! in_p
&& icode
== CODE_FOR_nothing
515 && SECONDARY_MEMORY_NEEDED (reload_class
, rclass
, mode
))
516 get_secondary_mem (x
, mode
, opnum
, type
);
524 /* If a secondary reload is needed, return its class. If both an intermediate
525 register and a scratch register is needed, we return the class of the
526 intermediate register. */
528 secondary_reload_class (bool in_p
, reg_class_t rclass
, machine_mode mode
,
531 enum insn_code icode
;
532 secondary_reload_info sri
;
534 sri
.icode
= CODE_FOR_nothing
;
537 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
538 icode
= (enum insn_code
) sri
.icode
;
540 /* If there are no secondary reloads at all, we return NO_REGS.
541 If an intermediate register is needed, we return its class. */
542 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
545 /* No intermediate register is needed, but we have a special reload
546 pattern, which we assume for now needs a scratch register. */
547 return scratch_reload_class (icode
);
550 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
551 three operands, verify that operand 2 is an output operand, and return
553 ??? We'd like to be able to handle any pattern with at least 2 operands,
554 for zero or more scratch registers, but that needs more infrastructure. */
556 scratch_reload_class (enum insn_code icode
)
558 const char *scratch_constraint
;
559 enum reg_class rclass
;
561 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
562 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
563 gcc_assert (*scratch_constraint
== '=');
564 scratch_constraint
++;
565 if (*scratch_constraint
== '&')
566 scratch_constraint
++;
567 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
568 gcc_assert (rclass
!= NO_REGS
);
572 #ifdef SECONDARY_MEMORY_NEEDED
574 /* Return a memory location that will be used to copy X in mode MODE.
575 If we haven't already made a location for this mode in this insn,
576 call find_reloads_address on the location being returned. */
579 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, machine_mode mode
,
580 int opnum
, enum reload_type type
)
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
593 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
594 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
599 return secondary_memlocs_elim
[(int) mode
][opnum
];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs
[(int) mode
] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
610 secondary_memlocs
[(int) mode
]
611 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
619 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
620 MEM_ADDR_SPACE (loc
));
622 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
623 loc
= copy_rtx (loc
);
625 /* The only time the call below will do anything is if the stack
626 offset is too large. In that case IND_LEVELS doesn't matter, so we
627 can just pass a zero. Adjust the type to be the address of the
628 corresponding object. If the address was valid, save the eliminated
629 address. If it wasn't valid, we need to make a reload each time, so
634 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
635 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
638 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
642 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
643 if (secondary_memlocs_elim_used
<= (int)mode
)
644 secondary_memlocs_elim_used
= (int)mode
+ 1;
648 /* Clear any secondary memory locations we've made. */
651 clear_secondary_mem (void)
653 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
655 #endif /* SECONDARY_MEMORY_NEEDED */
658 /* Find the largest class which has at least one register valid in
659 mode INNER, and which for every such register, that register number
660 plus N is also valid in OUTER (if in range) and is cheap to move
661 into REGNO. Such a class must exist. */
663 static enum reg_class
664 find_valid_class (machine_mode outer ATTRIBUTE_UNUSED
,
665 machine_mode inner ATTRIBUTE_UNUSED
, int n
,
666 unsigned int dest_regno ATTRIBUTE_UNUSED
)
671 enum reg_class best_class
= NO_REGS
;
672 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
673 unsigned int best_size
= 0;
676 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
680 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
681 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
683 if (HARD_REGNO_MODE_OK (regno
, inner
))
686 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
687 && ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
694 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
696 if ((reg_class_size
[rclass
] > best_size
697 && (best_cost
< 0 || best_cost
>= cost
))
700 best_class
= (enum reg_class
) rclass
;
701 best_size
= reg_class_size
[rclass
];
702 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
707 gcc_assert (best_size
!= 0);
712 /* We are trying to reload a subreg of something that is not a register.
713 Find the largest class which contains only registers valid in
714 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
715 which we would eventually like to obtain the object. */
717 static enum reg_class
718 find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED
,
719 machine_mode mode ATTRIBUTE_UNUSED
,
720 enum reg_class dest_class ATTRIBUTE_UNUSED
)
725 enum reg_class best_class
= NO_REGS
;
726 unsigned int best_size
= 0;
729 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
732 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& !bad
; regno
++)
734 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
735 && !HARD_REGNO_MODE_OK (regno
, mode
))
742 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
744 if ((reg_class_size
[rclass
] > best_size
745 && (best_cost
< 0 || best_cost
>= cost
))
748 best_class
= (enum reg_class
) rclass
;
749 best_size
= reg_class_size
[rclass
];
750 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
755 gcc_assert (best_size
!= 0);
757 #ifdef LIMIT_RELOAD_CLASS
758 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
763 /* Return the number of a previously made reload that can be combined with
764 a new one, or n_reloads if none of the existing reloads can be used.
765 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
766 push_reload, they determine the kind of the new reload that we try to
767 combine. P_IN points to the corresponding value of IN, which can be
768 modified by this function.
769 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
772 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
773 enum reload_type type
, int opnum
, int dont_share
)
777 /* We can't merge two reloads if the output of either one is
780 if (earlyclobber_operand_p (out
))
783 /* We can use an existing reload if the class is right
784 and at least one of IN and OUT is a match
785 and the other is at worst neutral.
786 (A zero compared against anything is neutral.)
788 For targets with small register classes, don't use existing reloads
789 unless they are for the same thing since that can cause us to need
790 more reload registers than we otherwise would. */
792 for (i
= 0; i
< n_reloads
; i
++)
793 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
794 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
795 /* If the existing reload has a register, it must fit our class. */
796 && (rld
[i
].reg_rtx
== 0
797 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
798 true_regnum (rld
[i
].reg_rtx
)))
799 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
800 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
801 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
802 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
803 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
804 && (small_register_class_p (rclass
)
805 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
806 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
809 /* Reloading a plain reg for input can match a reload to postincrement
810 that reg, since the postincrement's value is the right value.
811 Likewise, it can match a preincrement reload, since we regard
812 the preincrementation as happening before any ref in this insn
814 for (i
= 0; i
< n_reloads
; i
++)
815 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
816 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
817 /* If the existing reload has a register, it must fit our
819 && (rld
[i
].reg_rtx
== 0
820 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
821 true_regnum (rld
[i
].reg_rtx
)))
822 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
824 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
825 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
826 || (REG_P (rld
[i
].in
)
827 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
828 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
829 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
830 && (small_register_class_p (rclass
)
831 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
832 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
833 opnum
, rld
[i
].opnum
))
835 /* Make sure reload_in ultimately has the increment,
836 not the plain register. */
844 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
845 expression. MODE is the mode that X will be used in. OUTPUT is true if
846 the function is invoked for the output part of an enclosing reload. */
849 reload_inner_reg_of_subreg (rtx x
, machine_mode mode
, bool output
)
853 /* Only SUBREGs are problematical. */
854 if (GET_CODE (x
) != SUBREG
)
857 inner
= SUBREG_REG (x
);
859 /* If INNER is a constant or PLUS, then INNER will need reloading. */
860 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
863 /* If INNER is not a hard register, then INNER will not need reloading. */
864 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
867 /* If INNER is not ok for MODE, then INNER will need reloading. */
868 if (!HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
871 /* If this is for an output, and the outer part is a word or smaller,
872 INNER is larger than a word and the number of registers in INNER is
873 not the same as the number of words in INNER, then INNER will need
874 reloading (with an in-out reload). */
876 && GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
877 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
878 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
879 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
882 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
883 requiring an extra reload register. The caller has already found that
884 IN contains some reference to REGNO, so check that we can produce the
885 new value in a single step. E.g. if we have
886 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
887 instruction that adds one to a register, this should succeed.
888 However, if we have something like
889 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
890 needs to be loaded into a register first, we need a separate reload
892 Such PLUS reloads are generated by find_reload_address_part.
893 The out-of-range PLUS expressions are usually introduced in the instruction
894 patterns by register elimination and substituting pseudos without a home
895 by their function-invariant equivalences. */
897 can_reload_into (rtx in
, int regno
, machine_mode mode
)
902 struct recog_data_d save_recog_data
;
904 /* For matching constraints, we often get notional input reloads where
905 we want to use the original register as the reload register. I.e.
906 technically this is a non-optional input-output reload, but IN is
907 already a valid register, and has been chosen as the reload register.
908 Speed this up, since it trivially works. */
912 /* To test MEMs properly, we'd have to take into account all the reloads
913 that are already scheduled, which can become quite complicated.
914 And since we've already handled address reloads for this MEM, it
915 should always succeed anyway. */
919 /* If we can make a simple SET insn that does the job, everything should
921 dst
= gen_rtx_REG (mode
, regno
);
922 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
923 save_recog_data
= recog_data
;
924 if (recog_memoized (test_insn
) >= 0)
926 extract_insn (test_insn
);
927 r
= constrain_operands (1, get_enabled_alternatives (test_insn
));
929 recog_data
= save_recog_data
;
933 /* Record one reload that needs to be performed.
934 IN is an rtx saying where the data are to be found before this instruction.
935 OUT says where they must be stored after the instruction.
936 (IN is zero for data not read, and OUT is zero for data not written.)
937 INLOC and OUTLOC point to the places in the instructions where
938 IN and OUT were found.
939 If IN and OUT are both nonzero, it means the same register must be used
940 to reload both IN and OUT.
942 RCLASS is a register class required for the reloaded data.
943 INMODE is the machine mode that the instruction requires
944 for the reg that replaces IN and OUTMODE is likewise for OUT.
946 If IN is zero, then OUT's location and mode should be passed as
949 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
951 OPTIONAL nonzero means this reload does not need to be performed:
952 it can be discarded if that is more convenient.
954 OPNUM and TYPE say what the purpose of this reload is.
956 The return value is the reload-number for this reload.
958 If both IN and OUT are nonzero, in some rare cases we might
959 want to make two separate reloads. (Actually we never do this now.)
960 Therefore, the reload-number for OUT is stored in
961 output_reloadnum when we return; the return value applies to IN.
962 Usually (presently always), when IN and OUT are nonzero,
963 the two reload-numbers are equal, but the caller should be careful to
967 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
968 enum reg_class rclass
, machine_mode inmode
,
969 machine_mode outmode
, int strict_low
, int optional
,
970 int opnum
, enum reload_type type
)
974 int dont_remove_subreg
= 0;
975 #ifdef LIMIT_RELOAD_CLASS
976 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
978 int secondary_in_reload
= -1, secondary_out_reload
= -1;
979 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
980 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
981 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
982 subreg_in_class
= NO_REGS
;
984 /* INMODE and/or OUTMODE could be VOIDmode if no mode
985 has been specified for the operand. In that case,
986 use the operand's mode as the mode to reload. */
987 if (inmode
== VOIDmode
&& in
!= 0)
988 inmode
= GET_MODE (in
);
989 if (outmode
== VOIDmode
&& out
!= 0)
990 outmode
= GET_MODE (out
);
992 /* If find_reloads and friends until now missed to replace a pseudo
993 with a constant of reg_equiv_constant something went wrong
995 Note that it can't simply be done here if we missed it earlier
996 since the constant might need to be pushed into the literal pool
997 and the resulting memref would probably need further
999 if (in
!= 0 && REG_P (in
))
1001 int regno
= REGNO (in
);
1003 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1004 || reg_renumber
[regno
] >= 0
1005 || reg_equiv_constant (regno
) == NULL_RTX
);
1008 /* reg_equiv_constant only contains constants which are obviously
1009 not appropriate as destination. So if we would need to replace
1010 the destination pseudo with a constant we are in real
1012 if (out
!= 0 && REG_P (out
))
1014 int regno
= REGNO (out
);
1016 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1017 || reg_renumber
[regno
] >= 0
1018 || reg_equiv_constant (regno
) == NULL_RTX
);
1021 /* If we have a read-write operand with an address side-effect,
1022 change either IN or OUT so the side-effect happens only once. */
1023 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1024 switch (GET_CODE (XEXP (in
, 0)))
1026 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1027 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1030 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1031 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1038 /* If we are reloading a (SUBREG constant ...), really reload just the
1039 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1040 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1041 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1042 register is a pseudo, also reload the inside expression.
1043 For machines that extend byte loads, do this for any SUBREG of a pseudo
1044 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1045 M2 is an integral mode that gets extended when loaded.
1046 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1047 where either M1 is not valid for R or M2 is wider than a word but we
1048 only need one register to store an M2-sized quantity in R.
1049 (However, if OUT is nonzero, we need to reload the reg *and*
1050 the subreg, so do nothing here, and let following statement handle it.)
1052 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1053 we can't handle it here because CONST_INT does not indicate a mode.
1055 Similarly, we must reload the inside expression if we have a
1056 STRICT_LOW_PART (presumably, in == out in this case).
1058 Also reload the inner expression if it does not require a secondary
1059 reload but the SUBREG does.
1061 Finally, reload the inner expression if it is a register that is in
1062 the class whose registers cannot be referenced in a different size
1063 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1064 cannot reload just the inside since we might end up with the wrong
1065 register class. But if it is inside a STRICT_LOW_PART, we have
1066 no choice, so we hope we do get the right register class there. */
1068 if (in
!= 0 && GET_CODE (in
) == SUBREG
1069 && (subreg_lowpart_p (in
) || strict_low
)
1070 #ifdef CANNOT_CHANGE_MODE_CLASS
1071 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, rclass
)
1073 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (in
))]
1074 && (CONSTANT_P (SUBREG_REG (in
))
1075 || GET_CODE (SUBREG_REG (in
)) == PLUS
1077 || (((REG_P (SUBREG_REG (in
))
1078 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1079 || MEM_P (SUBREG_REG (in
)))
1080 && ((GET_MODE_PRECISION (inmode
)
1081 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1082 #ifdef LOAD_EXTEND_OP
1083 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1084 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1086 && (GET_MODE_PRECISION (inmode
)
1087 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1088 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1089 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
1091 #ifdef WORD_REGISTER_OPERATIONS
1092 || ((GET_MODE_PRECISION (inmode
)
1093 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1094 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1095 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1099 || (REG_P (SUBREG_REG (in
))
1100 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1101 /* The case where out is nonzero
1102 is handled differently in the following statement. */
1103 && (out
== 0 || subreg_lowpart_p (in
))
1104 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1105 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1107 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1109 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1110 [GET_MODE (SUBREG_REG (in
))]))
1111 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1112 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1113 && (secondary_reload_class (1, rclass
, GET_MODE (SUBREG_REG (in
)),
1116 #ifdef CANNOT_CHANGE_MODE_CLASS
1117 || (REG_P (SUBREG_REG (in
))
1118 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1119 && REG_CANNOT_CHANGE_MODE_P
1120 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1124 #ifdef LIMIT_RELOAD_CLASS
1125 in_subreg_loc
= inloc
;
1127 inloc
= &SUBREG_REG (in
);
1129 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1131 /* This is supposed to happen only for paradoxical subregs made by
1132 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1133 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1135 inmode
= GET_MODE (in
);
1138 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1139 where M1 is not valid for R if it was not handled by the code above.
1141 Similar issue for (SUBREG constant ...) if it was not handled by the
1142 code above. This can happen if SUBREG_BYTE != 0.
1144 However, we must reload the inner reg *as well as* the subreg in
1147 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1149 if (REG_P (SUBREG_REG (in
)))
1151 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1152 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1153 GET_MODE (SUBREG_REG (in
)),
1156 REGNO (SUBREG_REG (in
)));
1157 else if (GET_CODE (SUBREG_REG (in
)) == SYMBOL_REF
)
1158 subreg_in_class
= find_valid_class_1 (inmode
,
1159 GET_MODE (SUBREG_REG (in
)),
1162 /* This relies on the fact that emit_reload_insns outputs the
1163 instructions for input reloads of type RELOAD_OTHER in the same
1164 order as the reloads. Thus if the outer reload is also of type
1165 RELOAD_OTHER, we are guaranteed that this inner reload will be
1166 output before the outer reload. */
1167 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1168 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1169 dont_remove_subreg
= 1;
1172 /* Similarly for paradoxical and problematical SUBREGs on the output.
1173 Note that there is no reason we need worry about the previous value
1174 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1175 entitled to clobber it all (except in the case of a word mode subreg
1176 or of a STRICT_LOW_PART, in that latter case the constraint should
1177 label it input-output.) */
1178 if (out
!= 0 && GET_CODE (out
) == SUBREG
1179 && (subreg_lowpart_p (out
) || strict_low
)
1180 #ifdef CANNOT_CHANGE_MODE_CLASS
1181 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, rclass
)
1183 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (out
))]
1184 && (CONSTANT_P (SUBREG_REG (out
))
1186 || (((REG_P (SUBREG_REG (out
))
1187 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1188 || MEM_P (SUBREG_REG (out
)))
1189 && ((GET_MODE_PRECISION (outmode
)
1190 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1191 #ifdef WORD_REGISTER_OPERATIONS
1192 || ((GET_MODE_PRECISION (outmode
)
1193 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1194 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1195 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1199 || (REG_P (SUBREG_REG (out
))
1200 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1201 /* The case of a word mode subreg
1202 is handled differently in the following statement. */
1203 && ! (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1204 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1206 && ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
))
1207 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1208 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1211 #ifdef CANNOT_CHANGE_MODE_CLASS
1212 || (REG_P (SUBREG_REG (out
))
1213 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1214 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1215 GET_MODE (SUBREG_REG (out
)),
1220 #ifdef LIMIT_RELOAD_CLASS
1221 out_subreg_loc
= outloc
;
1223 outloc
= &SUBREG_REG (out
);
1225 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1226 gcc_assert (!MEM_P (out
)
1227 || GET_MODE_SIZE (GET_MODE (out
))
1228 <= GET_MODE_SIZE (outmode
));
1230 outmode
= GET_MODE (out
);
1233 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1234 where either M1 is not valid for R or M2 is wider than a word but we
1235 only need one register to store an M2-sized quantity in R.
1237 However, we must reload the inner reg *as well as* the subreg in
1238 that case and the inner reg is an in-out reload. */
1240 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1242 enum reg_class in_out_class
1243 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1244 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1245 GET_MODE (SUBREG_REG (out
)),
1248 REGNO (SUBREG_REG (out
)));
1250 /* This relies on the fact that emit_reload_insns outputs the
1251 instructions for output reloads of type RELOAD_OTHER in reverse
1252 order of the reloads. Thus if the outer reload is also of type
1253 RELOAD_OTHER, we are guaranteed that this inner reload will be
1254 output after the outer reload. */
1255 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1256 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1257 0, 0, opnum
, RELOAD_OTHER
);
1258 dont_remove_subreg
= 1;
1261 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1262 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1263 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1264 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1267 /* If IN is a SUBREG of a hard register, make a new REG. This
1268 simplifies some of the cases below. */
1270 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1271 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1272 && ! dont_remove_subreg
)
1273 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1275 /* Similarly for OUT. */
1276 if (out
!= 0 && GET_CODE (out
) == SUBREG
1277 && REG_P (SUBREG_REG (out
))
1278 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1279 && ! dont_remove_subreg
)
1280 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1282 /* Narrow down the class of register wanted if that is
1283 desirable on this machine for efficiency. */
1285 reg_class_t preferred_class
= rclass
;
1288 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1290 /* Output reloads may need analogous treatment, different in detail. */
1293 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1295 /* Discard what the target said if we cannot do it. */
1296 if (preferred_class
!= NO_REGS
1297 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1298 rclass
= (enum reg_class
) preferred_class
;
1301 /* Make sure we use a class that can handle the actual pseudo
1302 inside any subreg. For example, on the 386, QImode regs
1303 can appear within SImode subregs. Although GENERAL_REGS
1304 can handle SImode, QImode needs a smaller class. */
1305 #ifdef LIMIT_RELOAD_CLASS
1307 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1308 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1309 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1312 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1313 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1314 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1317 /* Verify that this class is at least possible for the mode that
1319 if (this_insn_is_asm
)
1322 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1326 if (mode
== VOIDmode
)
1328 error_for_asm (this_insn
, "cannot reload integer constant "
1329 "operand in %<asm%>");
1334 outmode
= word_mode
;
1336 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1337 if (HARD_REGNO_MODE_OK (i
, mode
)
1338 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1340 if (i
== FIRST_PSEUDO_REGISTER
)
1342 error_for_asm (this_insn
, "impossible register constraint "
1344 /* Avoid further trouble with this insn. */
1345 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1346 /* We used to continue here setting class to ALL_REGS, but it triggers
1347 sanity check on i386 for:
1348 void foo(long double d)
1352 Returning zero here ought to be safe as we take care in
1353 find_reloads to not process the reloads when instruction was
1360 /* Optional output reloads are always OK even if we have no register class,
1361 since the function of these reloads is only to have spill_reg_store etc.
1362 set, so that the storing insn can be deleted later. */
1363 gcc_assert (rclass
!= NO_REGS
1364 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1366 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1370 /* See if we need a secondary reload register to move between CLASS
1371 and IN or CLASS and OUT. Get the icode and push any required reloads
1372 needed for each of them if so. */
1376 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1377 &secondary_in_icode
, NULL
);
1378 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1379 secondary_out_reload
1380 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1381 type
, &secondary_out_icode
, NULL
);
1383 /* We found no existing reload suitable for re-use.
1384 So add an additional reload. */
1386 #ifdef SECONDARY_MEMORY_NEEDED
1387 if (subreg_in_class
== NO_REGS
1390 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1391 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1392 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1393 /* If a memory location is needed for the copy, make one. */
1394 if (subreg_in_class
!= NO_REGS
1395 && SECONDARY_MEMORY_NEEDED (subreg_in_class
, rclass
, inmode
))
1396 get_secondary_mem (in
, inmode
, opnum
, type
);
1402 rld
[i
].rclass
= rclass
;
1403 rld
[i
].inmode
= inmode
;
1404 rld
[i
].outmode
= outmode
;
1406 rld
[i
].optional
= optional
;
1408 rld
[i
].nocombine
= 0;
1409 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1410 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1411 rld
[i
].opnum
= opnum
;
1412 rld
[i
].when_needed
= type
;
1413 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1414 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1415 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1416 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1417 rld
[i
].secondary_p
= 0;
1421 #ifdef SECONDARY_MEMORY_NEEDED
1424 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1425 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1426 && SECONDARY_MEMORY_NEEDED (rclass
,
1427 REGNO_REG_CLASS (reg_or_subregno (out
)),
1429 get_secondary_mem (out
, outmode
, opnum
, type
);
1434 /* We are reusing an existing reload,
1435 but we may have additional information for it.
1436 For example, we may now have both IN and OUT
1437 while the old one may have just one of them. */
1439 /* The modes can be different. If they are, we want to reload in
1440 the larger mode, so that the value is valid for both modes. */
1441 if (inmode
!= VOIDmode
1442 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1443 rld
[i
].inmode
= inmode
;
1444 if (outmode
!= VOIDmode
1445 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1446 rld
[i
].outmode
= outmode
;
1449 rtx in_reg
= inloc
? *inloc
: 0;
1450 /* If we merge reloads for two distinct rtl expressions that
1451 are identical in content, there might be duplicate address
1452 reloads. Remove the extra set now, so that if we later find
1453 that we can inherit this reload, we can get rid of the
1454 address reloads altogether.
1456 Do not do this if both reloads are optional since the result
1457 would be an optional reload which could potentially leave
1458 unresolved address replacements.
1460 It is not sufficient to call transfer_replacements since
1461 choose_reload_regs will remove the replacements for address
1462 reloads of inherited reloads which results in the same
1464 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1465 && ! (rld
[i
].optional
&& optional
))
1467 /* We must keep the address reload with the lower operand
1469 if (opnum
> rld
[i
].opnum
)
1471 remove_address_replacements (in
);
1473 in_reg
= rld
[i
].in_reg
;
1476 remove_address_replacements (rld
[i
].in
);
1478 /* When emitting reloads we don't necessarily look at the in-
1479 and outmode, but also directly at the operands (in and out).
1480 So we can't simply overwrite them with whatever we have found
1481 for this (to-be-merged) reload, we have to "merge" that too.
1482 Reusing another reload already verified that we deal with the
1483 same operands, just possibly in different modes. So we
1484 overwrite the operands only when the new mode is larger.
1485 See also PR33613. */
1487 || GET_MODE_SIZE (GET_MODE (in
))
1488 > GET_MODE_SIZE (GET_MODE (rld
[i
].in
)))
1492 && GET_MODE_SIZE (GET_MODE (in_reg
))
1493 > GET_MODE_SIZE (GET_MODE (rld
[i
].in_reg
))))
1494 rld
[i
].in_reg
= in_reg
;
1500 && GET_MODE_SIZE (GET_MODE (out
))
1501 > GET_MODE_SIZE (GET_MODE (rld
[i
].out
))))
1505 || GET_MODE_SIZE (GET_MODE (*outloc
))
1506 > GET_MODE_SIZE (GET_MODE (rld
[i
].out_reg
))))
1507 rld
[i
].out_reg
= *outloc
;
1509 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1510 rld
[i
].rclass
= rclass
;
1511 rld
[i
].optional
&= optional
;
1512 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1513 opnum
, rld
[i
].opnum
))
1514 rld
[i
].when_needed
= RELOAD_OTHER
;
1515 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1518 /* If the ostensible rtx being reloaded differs from the rtx found
1519 in the location to substitute, this reload is not safe to combine
1520 because we cannot reliably tell whether it appears in the insn. */
1522 if (in
!= 0 && in
!= *inloc
)
1523 rld
[i
].nocombine
= 1;
1526 /* This was replaced by changes in find_reloads_address_1 and the new
1527 function inc_for_reload, which go with a new meaning of reload_inc. */
1529 /* If this is an IN/OUT reload in an insn that sets the CC,
1530 it must be for an autoincrement. It doesn't work to store
1531 the incremented value after the insn because that would clobber the CC.
1532 So we must do the increment of the value reloaded from,
1533 increment it, store it back, then decrement again. */
1534 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1538 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1539 /* If we did not find a nonzero amount-to-increment-by,
1540 that contradicts the belief that IN is being incremented
1541 in an address in this insn. */
1542 gcc_assert (rld
[i
].inc
!= 0);
1546 /* If we will replace IN and OUT with the reload-reg,
1547 record where they are located so that substitution need
1548 not do a tree walk. */
1550 if (replace_reloads
)
1554 struct replacement
*r
= &replacements
[n_replacements
++];
1559 if (outloc
!= 0 && outloc
!= inloc
)
1561 struct replacement
*r
= &replacements
[n_replacements
++];
1568 /* If this reload is just being introduced and it has both
1569 an incoming quantity and an outgoing quantity that are
1570 supposed to be made to match, see if either one of the two
1571 can serve as the place to reload into.
1573 If one of them is acceptable, set rld[i].reg_rtx
1576 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1578 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1581 earlyclobber_operand_p (out
));
1583 /* If the outgoing register already contains the same value
1584 as the incoming one, we can dispense with loading it.
1585 The easiest way to tell the caller that is to give a phony
1586 value for the incoming operand (same as outgoing one). */
1587 if (rld
[i
].reg_rtx
== out
1588 && (REG_P (in
) || CONSTANT_P (in
))
1589 && 0 != find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1590 static_reload_reg_p
, i
, inmode
))
1594 /* If this is an input reload and the operand contains a register that
1595 dies in this insn and is used nowhere else, see if it is the right class
1596 to be used for this reload. Use it if so. (This occurs most commonly
1597 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1598 this if it is also an output reload that mentions the register unless
1599 the output is a SUBREG that clobbers an entire register.
1601 Note that the operand might be one of the spill regs, if it is a
1602 pseudo reg and we are in a block where spilling has not taken place.
1603 But if there is no spilling in this block, that is OK.
1604 An explicitly used hard reg cannot be a spill reg. */
1606 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1610 machine_mode rel_mode
= inmode
;
1612 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1615 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1616 if (REG_NOTE_KIND (note
) == REG_DEAD
1617 && REG_P (XEXP (note
, 0))
1618 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1619 && reg_mentioned_p (XEXP (note
, 0), in
)
1620 /* Check that a former pseudo is valid; see find_dummy_reload. */
1621 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1622 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1623 ORIGINAL_REGNO (XEXP (note
, 0)))
1624 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1625 && ! refers_to_regno_for_reload_p (regno
,
1626 end_hard_regno (rel_mode
,
1628 PATTERN (this_insn
), inloc
)
1629 && ! find_reg_fusage (this_insn
, USE
, XEXP (note
, 0))
1630 /* If this is also an output reload, IN cannot be used as
1631 the reload register if it is set in this insn unless IN
1633 && (out
== 0 || in
== out
1634 || ! hard_reg_set_here_p (regno
,
1635 end_hard_regno (rel_mode
, regno
),
1636 PATTERN (this_insn
)))
1637 /* ??? Why is this code so different from the previous?
1638 Is there any simple coherent way to describe the two together?
1639 What's going on here. */
1641 || (GET_CODE (in
) == SUBREG
1642 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1644 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1645 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1646 /* Make sure the operand fits in the reg that dies. */
1647 && (GET_MODE_SIZE (rel_mode
)
1648 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1649 && HARD_REGNO_MODE_OK (regno
, inmode
)
1650 && HARD_REGNO_MODE_OK (regno
, outmode
))
1653 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1654 hard_regno_nregs
[regno
][outmode
]);
1656 for (offs
= 0; offs
< nregs
; offs
++)
1657 if (fixed_regs
[regno
+ offs
]
1658 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1663 && (! (refers_to_regno_for_reload_p
1664 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1665 || can_reload_into (in
, regno
, inmode
)))
1667 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1674 output_reloadnum
= i
;
1679 /* Record an additional place we must replace a value
1680 for which we have already recorded a reload.
1681 RELOADNUM is the value returned by push_reload
1682 when the reload was recorded.
1683 This is used in insn patterns that use match_dup. */
1686 push_replacement (rtx
*loc
, int reloadnum
, machine_mode mode
)
1688 if (replace_reloads
)
1690 struct replacement
*r
= &replacements
[n_replacements
++];
1691 r
->what
= reloadnum
;
1697 /* Duplicate any replacement we have recorded to apply at
1698 location ORIG_LOC to also be performed at DUP_LOC.
1699 This is used in insn patterns that use match_dup. */
1702 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1704 int i
, n
= n_replacements
;
1706 for (i
= 0; i
< n
; i
++)
1708 struct replacement
*r
= &replacements
[i
];
1709 if (r
->where
== orig_loc
)
1710 push_replacement (dup_loc
, r
->what
, r
->mode
);
1714 /* Transfer all replacements that used to be in reload FROM to be in
1718 transfer_replacements (int to
, int from
)
1722 for (i
= 0; i
< n_replacements
; i
++)
1723 if (replacements
[i
].what
== from
)
1724 replacements
[i
].what
= to
;
1727 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1728 or a subpart of it. If we have any replacements registered for IN_RTX,
1729 cancel the reloads that were supposed to load them.
1730 Return nonzero if we canceled any reloads. */
1732 remove_address_replacements (rtx in_rtx
)
1735 char reload_flags
[MAX_RELOADS
];
1736 int something_changed
= 0;
1738 memset (reload_flags
, 0, sizeof reload_flags
);
1739 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1741 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1742 reload_flags
[replacements
[i
].what
] |= 1;
1745 replacements
[j
++] = replacements
[i
];
1746 reload_flags
[replacements
[i
].what
] |= 2;
1749 /* Note that the following store must be done before the recursive calls. */
1752 for (i
= n_reloads
- 1; i
>= 0; i
--)
1754 if (reload_flags
[i
] == 1)
1756 deallocate_reload_reg (i
);
1757 remove_address_replacements (rld
[i
].in
);
1759 something_changed
= 1;
1762 return something_changed
;
1765 /* If there is only one output reload, and it is not for an earlyclobber
1766 operand, try to combine it with a (logically unrelated) input reload
1767 to reduce the number of reload registers needed.
1769 This is safe if the input reload does not appear in
1770 the value being output-reloaded, because this implies
1771 it is not needed any more once the original insn completes.
1773 If that doesn't work, see we can use any of the registers that
1774 die in this insn as a reload register. We can if it is of the right
1775 class and does not appear in the value being output-reloaded. */
1778 combine_reloads (void)
1781 int output_reload
= -1;
1782 int secondary_out
= -1;
1785 /* Find the output reload; return unless there is exactly one
1786 and that one is mandatory. */
1788 for (i
= 0; i
< n_reloads
; i
++)
1789 if (rld
[i
].out
!= 0)
1791 if (output_reload
>= 0)
1796 if (output_reload
< 0 || rld
[output_reload
].optional
)
1799 /* An input-output reload isn't combinable. */
1801 if (rld
[output_reload
].in
!= 0)
1804 /* If this reload is for an earlyclobber operand, we can't do anything. */
1805 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1808 /* If there is a reload for part of the address of this operand, we would
1809 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1810 its life to the point where doing this combine would not lower the
1811 number of spill registers needed. */
1812 for (i
= 0; i
< n_reloads
; i
++)
1813 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1814 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1815 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1818 /* Check each input reload; can we combine it? */
1820 for (i
= 0; i
< n_reloads
; i
++)
1821 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1822 /* Life span of this reload must not extend past main insn. */
1823 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1824 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1825 && rld
[i
].when_needed
!= RELOAD_OTHER
1826 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1827 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1828 [(int) rld
[output_reload
].outmode
])
1830 && rld
[i
].reg_rtx
== 0
1831 #ifdef SECONDARY_MEMORY_NEEDED
1832 /* Don't combine two reloads with different secondary
1833 memory locations. */
1834 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1835 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1836 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1837 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1839 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1840 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1841 : (reg_class_subset_p (rld
[i
].rclass
,
1842 rld
[output_reload
].rclass
)
1843 || reg_class_subset_p (rld
[output_reload
].rclass
,
1845 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1846 /* Args reversed because the first arg seems to be
1847 the one that we imagine being modified
1848 while the second is the one that might be affected. */
1849 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1851 /* However, if the input is a register that appears inside
1852 the output, then we also can't share.
1853 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1854 If the same reload reg is used for both reg 69 and the
1855 result to be stored in memory, then that result
1856 will clobber the address of the memory ref. */
1857 && ! (REG_P (rld
[i
].in
)
1858 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1859 rld
[output_reload
].out
))))
1860 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1861 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1862 && (reg_class_size
[(int) rld
[i
].rclass
]
1863 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1864 /* We will allow making things slightly worse by combining an
1865 input and an output, but no worse than that. */
1866 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1867 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1871 /* We have found a reload to combine with! */
1872 rld
[i
].out
= rld
[output_reload
].out
;
1873 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1874 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1875 /* Mark the old output reload as inoperative. */
1876 rld
[output_reload
].out
= 0;
1877 /* The combined reload is needed for the entire insn. */
1878 rld
[i
].when_needed
= RELOAD_OTHER
;
1879 /* If the output reload had a secondary reload, copy it. */
1880 if (rld
[output_reload
].secondary_out_reload
!= -1)
1882 rld
[i
].secondary_out_reload
1883 = rld
[output_reload
].secondary_out_reload
;
1884 rld
[i
].secondary_out_icode
1885 = rld
[output_reload
].secondary_out_icode
;
1888 #ifdef SECONDARY_MEMORY_NEEDED
1889 /* Copy any secondary MEM. */
1890 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1891 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1892 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1894 /* If required, minimize the register class. */
1895 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1897 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1899 /* Transfer all replacements from the old reload to the combined. */
1900 for (j
= 0; j
< n_replacements
; j
++)
1901 if (replacements
[j
].what
== output_reload
)
1902 replacements
[j
].what
= i
;
1907 /* If this insn has only one operand that is modified or written (assumed
1908 to be the first), it must be the one corresponding to this reload. It
1909 is safe to use anything that dies in this insn for that output provided
1910 that it does not occur in the output (we already know it isn't an
1911 earlyclobber. If this is an asm insn, give up. */
1913 if (INSN_CODE (this_insn
) == -1)
1916 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1917 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1918 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1921 /* See if some hard register that dies in this insn and is not used in
1922 the output is the right class. Only works if the register we pick
1923 up can fully hold our output reload. */
1924 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1925 if (REG_NOTE_KIND (note
) == REG_DEAD
1926 && REG_P (XEXP (note
, 0))
1927 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1928 rld
[output_reload
].out
)
1929 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1930 && HARD_REGNO_MODE_OK (regno
, rld
[output_reload
].outmode
)
1931 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1933 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1934 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1935 /* Ensure that a secondary or tertiary reload for this output
1936 won't want this register. */
1937 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1938 || (!(TEST_HARD_REG_BIT
1939 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1940 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1941 || !(TEST_HARD_REG_BIT
1942 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1944 && !fixed_regs
[regno
]
1945 /* Check that a former pseudo is valid; see find_dummy_reload. */
1946 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1947 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1948 ORIGINAL_REGNO (XEXP (note
, 0)))
1949 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1951 rld
[output_reload
].reg_rtx
1952 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1957 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1958 See if one of IN and OUT is a register that may be used;
1959 this is desirable since a spill-register won't be needed.
1960 If so, return the register rtx that proves acceptable.
1962 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1963 RCLASS is the register class required for the reload.
1965 If FOR_REAL is >= 0, it is the number of the reload,
1966 and in some cases when it can be discovered that OUT doesn't need
1967 to be computed, clear out rld[FOR_REAL].out.
1969 If FOR_REAL is -1, this should not be done, because this call
1970 is just to see if a register can be found, not to find and install it.
1972 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1973 puts an additional constraint on being able to use IN for OUT since
1974 IN must not appear elsewhere in the insn (it is assumed that IN itself
1975 is safe from the earlyclobber). */
1978 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1979 machine_mode inmode
, machine_mode outmode
,
1980 reg_class_t rclass
, int for_real
, int earlyclobber
)
1988 /* If operands exceed a word, we can't use either of them
1989 unless they have the same size. */
1990 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1991 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1992 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1995 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1996 respectively refers to a hard register. */
1998 /* Find the inside of any subregs. */
1999 while (GET_CODE (out
) == SUBREG
)
2001 if (REG_P (SUBREG_REG (out
))
2002 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
2003 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
2004 GET_MODE (SUBREG_REG (out
)),
2007 out
= SUBREG_REG (out
);
2009 while (GET_CODE (in
) == SUBREG
)
2011 if (REG_P (SUBREG_REG (in
))
2012 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
2013 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
2014 GET_MODE (SUBREG_REG (in
)),
2017 in
= SUBREG_REG (in
);
2020 /* Narrow down the reg class, the same way push_reload will;
2021 otherwise we might find a dummy now, but push_reload won't. */
2023 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
2024 if (preferred_class
!= NO_REGS
)
2025 rclass
= (enum reg_class
) preferred_class
;
2028 /* See if OUT will do. */
2030 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
2032 unsigned int regno
= REGNO (out
) + out_offset
;
2033 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
2036 /* When we consider whether the insn uses OUT,
2037 ignore references within IN. They don't prevent us
2038 from copying IN into OUT, because those refs would
2039 move into the insn that reloads IN.
2041 However, we only ignore IN in its role as this reload.
2042 If the insn uses IN elsewhere and it contains OUT,
2043 that counts. We can't be sure it's the "same" operand
2044 so it might not go through this reload.
2046 We also need to avoid using OUT if it, or part of it, is a
2047 fixed register. Modifying such registers, even transiently,
2048 may have undefined effects on the machine, such as modifying
2049 the stack pointer. */
2051 *inloc
= const0_rtx
;
2053 if (regno
< FIRST_PSEUDO_REGISTER
2054 && HARD_REGNO_MODE_OK (regno
, outmode
)
2055 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2056 PATTERN (this_insn
), outloc
))
2060 for (i
= 0; i
< nwords
; i
++)
2061 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2063 || fixed_regs
[regno
+ i
])
2068 if (REG_P (real_out
))
2071 value
= gen_rtx_REG (outmode
, regno
);
2078 /* Consider using IN if OUT was not acceptable
2079 or if OUT dies in this insn (like the quotient in a divmod insn).
2080 We can't use IN unless it is dies in this insn,
2081 which means we must know accurately which hard regs are live.
2082 Also, the result can't go in IN if IN is used within OUT,
2083 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2084 if (hard_regs_live_known
2086 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2088 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2089 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2090 && !fixed_regs
[REGNO (in
)]
2091 && HARD_REGNO_MODE_OK (REGNO (in
),
2092 /* The only case where out and real_out might
2093 have different modes is where real_out
2094 is a subreg, and in that case, out
2096 (GET_MODE (out
) != VOIDmode
2097 ? GET_MODE (out
) : outmode
))
2098 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2099 /* However only do this if we can be sure that this input
2100 operand doesn't correspond with an uninitialized pseudo.
2101 global can assign some hardreg to it that is the same as
2102 the one assigned to a different, also live pseudo (as it
2103 can ignore the conflict). We must never introduce writes
2104 to such hardregs, as they would clobber the other live
2105 pseudo. See PR 20973. */
2106 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2107 ORIGINAL_REGNO (in
))
2108 /* Similarly, only do this if we can be sure that the death
2109 note is still valid. global can assign some hardreg to
2110 the pseudo referenced in the note and simultaneously a
2111 subword of this hardreg to a different, also live pseudo,
2112 because only another subword of the hardreg is actually
2113 used in the insn. This cannot happen if the pseudo has
2114 been assigned exactly one hardreg. See PR 33732. */
2115 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2117 unsigned int regno
= REGNO (in
) + in_offset
;
2118 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2120 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2121 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2122 PATTERN (this_insn
))
2124 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2125 PATTERN (this_insn
), inloc
)))
2129 for (i
= 0; i
< nwords
; i
++)
2130 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2136 /* If we were going to use OUT as the reload reg
2137 and changed our mind, it means OUT is a dummy that
2138 dies here. So don't bother copying value to it. */
2139 if (for_real
>= 0 && value
== real_out
)
2140 rld
[for_real
].out
= 0;
2141 if (REG_P (real_in
))
2144 value
= gen_rtx_REG (inmode
, regno
);
2152 /* This page contains subroutines used mainly for determining
2153 whether the IN or an OUT of a reload can serve as the
2156 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2159 earlyclobber_operand_p (rtx x
)
2163 for (i
= 0; i
< n_earlyclobbers
; i
++)
2164 if (reload_earlyclobbers
[i
] == x
)
2170 /* Return 1 if expression X alters a hard reg in the range
2171 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2172 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2173 X should be the body of an instruction. */
2176 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2178 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2180 rtx op0
= SET_DEST (x
);
2182 while (GET_CODE (op0
) == SUBREG
)
2183 op0
= SUBREG_REG (op0
);
2186 unsigned int r
= REGNO (op0
);
2188 /* See if this reg overlaps range under consideration. */
2190 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2194 else if (GET_CODE (x
) == PARALLEL
)
2196 int i
= XVECLEN (x
, 0) - 1;
2199 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2206 /* Return 1 if ADDR is a valid memory address for mode MODE
2207 in address space AS, and check that each pseudo reg has the
2208 proper kind of hard reg. */
2211 strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED
,
2212 rtx addr
, addr_space_t as
)
2214 #ifdef GO_IF_LEGITIMATE_ADDRESS
2215 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2216 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2222 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2226 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2227 if they are the same hard reg, and has special hacks for
2228 autoincrement and autodecrement.
2229 This is specifically intended for find_reloads to use
2230 in determining whether two operands match.
2231 X is the operand whose number is the lower of the two.
2233 The value is 2 if Y contains a pre-increment that matches
2234 a non-incrementing address in X. */
2236 /* ??? To be completely correct, we should arrange to pass
2237 for X the output operand and for Y the input operand.
2238 For now, we assume that the output operand has the lower number
2239 because that is natural in (SET output (... input ...)). */
2242 operands_match_p (rtx x
, rtx y
)
2245 RTX_CODE code
= GET_CODE (x
);
2251 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2252 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2253 && REG_P (SUBREG_REG (y
)))))
2259 i
= REGNO (SUBREG_REG (x
));
2260 if (i
>= FIRST_PSEUDO_REGISTER
)
2262 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2263 GET_MODE (SUBREG_REG (x
)),
2270 if (GET_CODE (y
) == SUBREG
)
2272 j
= REGNO (SUBREG_REG (y
));
2273 if (j
>= FIRST_PSEUDO_REGISTER
)
2275 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2276 GET_MODE (SUBREG_REG (y
)),
2283 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2284 multiple hard register group of scalar integer registers, so that
2285 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2287 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2288 && SCALAR_INT_MODE_P (GET_MODE (x
))
2289 && i
< FIRST_PSEUDO_REGISTER
)
2290 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2291 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2292 && SCALAR_INT_MODE_P (GET_MODE (y
))
2293 && j
< FIRST_PSEUDO_REGISTER
)
2294 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2298 /* If two operands must match, because they are really a single
2299 operand of an assembler insn, then two postincrements are invalid
2300 because the assembler insn would increment only once.
2301 On the other hand, a postincrement matches ordinary indexing
2302 if the postincrement is the output operand. */
2303 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2304 return operands_match_p (XEXP (x
, 0), y
);
2305 /* Two preincrements are invalid
2306 because the assembler insn would increment only once.
2307 On the other hand, a preincrement matches ordinary indexing
2308 if the preincrement is the input operand.
2309 In this case, return 2, since some callers need to do special
2310 things when this happens. */
2311 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2312 || GET_CODE (y
) == PRE_MODIFY
)
2313 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2317 /* Now we have disposed of all the cases in which different rtx codes
2319 if (code
!= GET_CODE (y
))
2322 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2323 if (GET_MODE (x
) != GET_MODE (y
))
2326 /* MEMs referring to different address space are not equivalent. */
2327 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2336 return LABEL_REF_LABEL (x
) == LABEL_REF_LABEL (y
);
2338 return XSTR (x
, 0) == XSTR (y
, 0);
2344 /* Compare the elements. If any pair of corresponding elements
2345 fail to match, return 0 for the whole things. */
2348 fmt
= GET_RTX_FORMAT (code
);
2349 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2355 if (XWINT (x
, i
) != XWINT (y
, i
))
2360 if (XINT (x
, i
) != XINT (y
, i
))
2365 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2368 /* If any subexpression returns 2,
2369 we should return 2 if we are successful. */
2378 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2380 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2382 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2390 /* It is believed that rtx's at this level will never
2391 contain anything but integers and other rtx's,
2392 except for within LABEL_REFs and SYMBOL_REFs. */
2397 return 1 + success_2
;
2400 /* Describe the range of registers or memory referenced by X.
2401 If X is a register, set REG_FLAG and put the first register
2402 number into START and the last plus one into END.
2403 If X is a memory reference, put a base address into BASE
2404 and a range of integer offsets into START and END.
2405 If X is pushing on the stack, we can assume it causes no trouble,
2406 so we set the SAFE field. */
2408 static struct decomposition
2411 struct decomposition val
;
2414 memset (&val
, 0, sizeof (val
));
2416 switch (GET_CODE (x
))
2420 rtx base
= NULL_RTX
, offset
= 0;
2421 rtx addr
= XEXP (x
, 0);
2423 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2424 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2426 val
.base
= XEXP (addr
, 0);
2427 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2428 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2429 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2433 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2435 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2436 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2437 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2439 val
.base
= XEXP (addr
, 0);
2440 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2441 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2442 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2447 if (GET_CODE (addr
) == CONST
)
2449 addr
= XEXP (addr
, 0);
2452 if (GET_CODE (addr
) == PLUS
)
2454 if (CONSTANT_P (XEXP (addr
, 0)))
2456 base
= XEXP (addr
, 1);
2457 offset
= XEXP (addr
, 0);
2459 else if (CONSTANT_P (XEXP (addr
, 1)))
2461 base
= XEXP (addr
, 0);
2462 offset
= XEXP (addr
, 1);
2469 offset
= const0_rtx
;
2471 if (GET_CODE (offset
) == CONST
)
2472 offset
= XEXP (offset
, 0);
2473 if (GET_CODE (offset
) == PLUS
)
2475 if (CONST_INT_P (XEXP (offset
, 0)))
2477 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2478 offset
= XEXP (offset
, 0);
2480 else if (CONST_INT_P (XEXP (offset
, 1)))
2482 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2483 offset
= XEXP (offset
, 1);
2487 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2488 offset
= const0_rtx
;
2491 else if (!CONST_INT_P (offset
))
2493 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2494 offset
= const0_rtx
;
2497 if (all_const
&& GET_CODE (base
) == PLUS
)
2498 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2500 gcc_assert (CONST_INT_P (offset
));
2502 val
.start
= INTVAL (offset
);
2503 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2510 val
.start
= true_regnum (x
);
2511 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2513 /* A pseudo with no hard reg. */
2514 val
.start
= REGNO (x
);
2515 val
.end
= val
.start
+ 1;
2519 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2523 if (!REG_P (SUBREG_REG (x
)))
2524 /* This could be more precise, but it's good enough. */
2525 return decompose (SUBREG_REG (x
));
2527 val
.start
= true_regnum (x
);
2528 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2529 return decompose (SUBREG_REG (x
));
2532 val
.end
= val
.start
+ subreg_nregs (x
);
2536 /* This hasn't been assigned yet, so it can't conflict yet. */
2541 gcc_assert (CONSTANT_P (x
));
2548 /* Return 1 if altering Y will not modify the value of X.
2549 Y is also described by YDATA, which should be decompose (Y). */
2552 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2554 struct decomposition xdata
;
2557 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2561 gcc_assert (MEM_P (y
));
2562 /* If Y is memory and X is not, Y can't affect X. */
2566 xdata
= decompose (x
);
2568 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2570 /* If bases are distinct symbolic constants, there is no overlap. */
2571 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2573 /* Constants and stack slots never overlap. */
2574 if (CONSTANT_P (xdata
.base
)
2575 && (ydata
.base
== frame_pointer_rtx
2576 || ydata
.base
== hard_frame_pointer_rtx
2577 || ydata
.base
== stack_pointer_rtx
))
2579 if (CONSTANT_P (ydata
.base
)
2580 && (xdata
.base
== frame_pointer_rtx
2581 || xdata
.base
== hard_frame_pointer_rtx
2582 || xdata
.base
== stack_pointer_rtx
))
2584 /* If either base is variable, we don't know anything. */
2588 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2591 /* Similar, but calls decompose. */
2594 safe_from_earlyclobber (rtx op
, rtx clobber
)
2596 struct decomposition early_data
;
2598 early_data
= decompose (clobber
);
2599 return immune_p (op
, clobber
, early_data
);
2602 /* Main entry point of this file: search the body of INSN
2603 for values that need reloading and record them with push_reload.
2604 REPLACE nonzero means record also where the values occur
2605 so that subst_reloads can be used.
2607 IND_LEVELS says how many levels of indirection are supported by this
2608 machine; a value of zero means that a memory reference is not a valid
2611 LIVE_KNOWN says we have valid information about which hard
2612 regs are live at each point in the program; this is true when
2613 we are called from global_alloc but false when stupid register
2614 allocation has been done.
2616 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2617 which is nonnegative if the reg has been commandeered for reloading into.
2618 It is copied into STATIC_RELOAD_REG_P and referenced from there
2619 by various subroutines.
2621 Return TRUE if some operands need to be changed, because of swapping
2622 commutative operands, reg_equiv_address substitution, or whatever. */
2625 find_reloads (rtx_insn
*insn
, int replace
, int ind_levels
, int live_known
,
2626 short *reload_reg_p
)
2628 int insn_code_number
;
2631 /* These start out as the constraints for the insn
2632 and they are chewed up as we consider alternatives. */
2633 const char *constraints
[MAX_RECOG_OPERANDS
];
2634 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2636 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2637 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2638 /* Nonzero for a MEM operand whose entire address needs a reload.
2639 May be -1 to indicate the entire address may or may not need a reload. */
2640 int address_reloaded
[MAX_RECOG_OPERANDS
];
2641 /* Nonzero for an address operand that needs to be completely reloaded.
2642 May be -1 to indicate the entire operand may or may not need a reload. */
2643 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2644 /* Value of enum reload_type to use for operand. */
2645 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2646 /* Value of enum reload_type to use within address of operand. */
2647 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2648 /* Save the usage of each operand. */
2649 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2650 int no_input_reloads
= 0, no_output_reloads
= 0;
2652 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2653 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2654 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2655 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2656 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2657 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2658 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2659 int this_alternative_number
;
2660 int goal_alternative_number
= 0;
2661 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2662 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2663 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2664 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2665 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2666 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2667 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2668 int goal_alternative_swapped
;
2671 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2672 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2673 rtx body
= PATTERN (insn
);
2674 rtx set
= single_set (insn
);
2675 int goal_earlyclobber
= 0, this_earlyclobber
;
2676 machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2682 n_earlyclobbers
= 0;
2683 replace_reloads
= replace
;
2684 hard_regs_live_known
= live_known
;
2685 static_reload_reg_p
= reload_reg_p
;
2687 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2688 neither are insns that SET cc0. Insns that use CC0 are not allowed
2689 to have any input reloads. */
2690 if (JUMP_P (insn
) || CALL_P (insn
))
2691 no_output_reloads
= 1;
2694 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2695 no_input_reloads
= 1;
2696 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2697 no_output_reloads
= 1;
2700 #ifdef SECONDARY_MEMORY_NEEDED
2701 /* The eliminated forms of any secondary memory locations are per-insn, so
2702 clear them out here. */
2704 if (secondary_memlocs_elim_used
)
2706 memset (secondary_memlocs_elim
, 0,
2707 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2708 secondary_memlocs_elim_used
= 0;
2712 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2713 is cheap to move between them. If it is not, there may not be an insn
2714 to do the copy, so we may need a reload. */
2715 if (GET_CODE (body
) == SET
2716 && REG_P (SET_DEST (body
))
2717 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2718 && REG_P (SET_SRC (body
))
2719 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2720 && register_move_cost (GET_MODE (SET_SRC (body
)),
2721 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2722 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2725 extract_insn (insn
);
2727 noperands
= reload_n_operands
= recog_data
.n_operands
;
2728 n_alternatives
= recog_data
.n_alternatives
;
2730 /* Just return "no reloads" if insn has no operands with constraints. */
2731 if (noperands
== 0 || n_alternatives
== 0)
2734 insn_code_number
= INSN_CODE (insn
);
2735 this_insn_is_asm
= insn_code_number
< 0;
2737 memcpy (operand_mode
, recog_data
.operand_mode
,
2738 noperands
* sizeof (machine_mode
));
2739 memcpy (constraints
, recog_data
.constraints
,
2740 noperands
* sizeof (const char *));
2744 /* If we will need to know, later, whether some pair of operands
2745 are the same, we must compare them now and save the result.
2746 Reloading the base and index registers will clobber them
2747 and afterward they will fail to match. */
2749 for (i
= 0; i
< noperands
; i
++)
2755 substed_operand
[i
] = recog_data
.operand
[i
];
2758 modified
[i
] = RELOAD_READ
;
2760 /* Scan this operand's constraint to see if it is an output operand,
2761 an in-out operand, is commutative, or should match another. */
2765 p
+= CONSTRAINT_LEN (c
, p
);
2769 modified
[i
] = RELOAD_WRITE
;
2772 modified
[i
] = RELOAD_READ_WRITE
;
2776 /* The last operand should not be marked commutative. */
2777 gcc_assert (i
!= noperands
- 1);
2779 /* We currently only support one commutative pair of
2780 operands. Some existing asm code currently uses more
2781 than one pair. Previously, that would usually work,
2782 but sometimes it would crash the compiler. We
2783 continue supporting that case as well as we can by
2784 silently ignoring all but the first pair. In the
2785 future we may handle it correctly. */
2786 if (commutative
< 0)
2789 gcc_assert (this_insn_is_asm
);
2792 /* Use of ISDIGIT is tempting here, but it may get expensive because
2793 of locale support we don't want. */
2794 case '0': case '1': case '2': case '3': case '4':
2795 case '5': case '6': case '7': case '8': case '9':
2797 c
= strtoul (p
- 1, &end
, 10);
2800 operands_match
[c
][i
]
2801 = operands_match_p (recog_data
.operand
[c
],
2802 recog_data
.operand
[i
]);
2804 /* An operand may not match itself. */
2805 gcc_assert (c
!= i
);
2807 /* If C can be commuted with C+1, and C might need to match I,
2808 then C+1 might also need to match I. */
2809 if (commutative
>= 0)
2811 if (c
== commutative
|| c
== commutative
+ 1)
2813 int other
= c
+ (c
== commutative
? 1 : -1);
2814 operands_match
[other
][i
]
2815 = operands_match_p (recog_data
.operand
[other
],
2816 recog_data
.operand
[i
]);
2818 if (i
== commutative
|| i
== commutative
+ 1)
2820 int other
= i
+ (i
== commutative
? 1 : -1);
2821 operands_match
[c
][other
]
2822 = operands_match_p (recog_data
.operand
[c
],
2823 recog_data
.operand
[other
]);
2825 /* Note that C is supposed to be less than I.
2826 No need to consider altering both C and I because in
2827 that case we would alter one into the other. */
2834 /* Examine each operand that is a memory reference or memory address
2835 and reload parts of the addresses into index registers.
2836 Also here any references to pseudo regs that didn't get hard regs
2837 but are equivalent to constants get replaced in the insn itself
2838 with those constants. Nobody will ever see them again.
2840 Finally, set up the preferred classes of each operand. */
2842 for (i
= 0; i
< noperands
; i
++)
2844 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2846 address_reloaded
[i
] = 0;
2847 address_operand_reloaded
[i
] = 0;
2848 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2849 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2852 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2853 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2856 if (*constraints
[i
] == 0)
2857 /* Ignore things like match_operator operands. */
2859 else if (insn_extra_address_constraint
2860 (lookup_constraint (constraints
[i
])))
2862 address_operand_reloaded
[i
]
2863 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2864 recog_data
.operand
[i
],
2865 recog_data
.operand_loc
[i
],
2866 i
, operand_type
[i
], ind_levels
, insn
);
2868 /* If we now have a simple operand where we used to have a
2869 PLUS or MULT, re-recognize and try again. */
2870 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2871 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2872 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2873 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2875 INSN_CODE (insn
) = -1;
2876 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2881 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2882 substed_operand
[i
] = recog_data
.operand
[i
];
2884 /* Address operands are reloaded in their existing mode,
2885 no matter what is specified in the machine description. */
2886 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2888 /* If the address is a single CONST_INT pick address mode
2889 instead otherwise we will later not know in which mode
2890 the reload should be performed. */
2891 if (operand_mode
[i
] == VOIDmode
)
2892 operand_mode
[i
] = Pmode
;
2895 else if (code
== MEM
)
2898 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2899 recog_data
.operand_loc
[i
],
2900 XEXP (recog_data
.operand
[i
], 0),
2901 &XEXP (recog_data
.operand
[i
], 0),
2902 i
, address_type
[i
], ind_levels
, insn
);
2903 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2904 substed_operand
[i
] = recog_data
.operand
[i
];
2906 else if (code
== SUBREG
)
2908 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2910 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2913 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2915 &address_reloaded
[i
]);
2917 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2918 that didn't get a hard register, emit a USE with a REG_EQUAL
2919 note in front so that we might inherit a previous, possibly
2925 && (GET_MODE_SIZE (GET_MODE (reg
))
2926 >= GET_MODE_SIZE (GET_MODE (op
)))
2927 && reg_equiv_constant (REGNO (reg
)) == 0)
2928 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2930 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2932 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2934 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2935 /* We can get a PLUS as an "operand" as a result of register
2936 elimination. See eliminate_regs and gen_reload. We handle
2937 a unary operator by reloading the operand. */
2938 substed_operand
[i
] = recog_data
.operand
[i
]
2939 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2940 ind_levels
, 0, insn
,
2941 &address_reloaded
[i
]);
2942 else if (code
== REG
)
2944 /* This is equivalent to calling find_reloads_toplev.
2945 The code is duplicated for speed.
2946 When we find a pseudo always equivalent to a constant,
2947 we replace it by the constant. We must be sure, however,
2948 that we don't try to replace it in the insn in which it
2950 int regno
= REGNO (recog_data
.operand
[i
]);
2951 if (reg_equiv_constant (regno
) != 0
2952 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2954 /* Record the existing mode so that the check if constants are
2955 allowed will work when operand_mode isn't specified. */
2957 if (operand_mode
[i
] == VOIDmode
)
2958 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2960 substed_operand
[i
] = recog_data
.operand
[i
]
2961 = reg_equiv_constant (regno
);
2963 if (reg_equiv_memory_loc (regno
) != 0
2964 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2965 /* We need not give a valid is_set_dest argument since the case
2966 of a constant equivalence was checked above. */
2967 substed_operand
[i
] = recog_data
.operand
[i
]
2968 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2969 ind_levels
, 0, insn
,
2970 &address_reloaded
[i
]);
2972 /* If the operand is still a register (we didn't replace it with an
2973 equivalent), get the preferred class to reload it into. */
2974 code
= GET_CODE (recog_data
.operand
[i
]);
2976 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2977 >= FIRST_PSEUDO_REGISTER
)
2978 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2982 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2983 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2986 /* If this is simply a copy from operand 1 to operand 0, merge the
2987 preferred classes for the operands. */
2988 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2989 && recog_data
.operand
[1] == SET_SRC (set
))
2991 preferred_class
[0] = preferred_class
[1]
2992 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2993 pref_or_nothing
[0] |= pref_or_nothing
[1];
2994 pref_or_nothing
[1] |= pref_or_nothing
[0];
2997 /* Now see what we need for pseudo-regs that didn't get hard regs
2998 or got the wrong kind of hard reg. For this, we must consider
2999 all the operands together against the register constraints. */
3001 best
= MAX_RECOG_OPERANDS
* 2 + 600;
3003 goal_alternative_swapped
= 0;
3005 /* The constraints are made of several alternatives.
3006 Each operand's constraint looks like foo,bar,... with commas
3007 separating the alternatives. The first alternatives for all
3008 operands go together, the second alternatives go together, etc.
3010 First loop over alternatives. */
3012 alternative_mask enabled
= get_enabled_alternatives (insn
);
3013 for (this_alternative_number
= 0;
3014 this_alternative_number
< n_alternatives
;
3015 this_alternative_number
++)
3019 if (!TEST_BIT (enabled
, this_alternative_number
))
3023 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3024 constraints
[i
] = skip_alternative (constraints
[i
]);
3029 /* If insn is commutative (it's safe to exchange a certain pair
3030 of operands) then we need to try each alternative twice, the
3031 second time matching those two operands as if we had
3032 exchanged them. To do this, really exchange them in
3034 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3036 /* Loop over operands for one constraint alternative. */
3037 /* LOSERS counts those that don't fit this alternative
3038 and would require loading. */
3040 /* BAD is set to 1 if it some operand can't fit this alternative
3041 even after reloading. */
3043 /* REJECT is a count of how undesirable this alternative says it is
3044 if any reloading is required. If the alternative matches exactly
3045 then REJECT is ignored, but otherwise it gets this much
3046 counted against it in addition to the reloading needed. Each
3047 ? counts three times here since we want the disparaging caused by
3048 a bad register class to only count 1/3 as much. */
3053 enum reg_class tclass
;
3056 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3057 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3058 /* Swap the duplicates too. */
3059 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3060 if (recog_data
.dup_num
[i
] == commutative
3061 || recog_data
.dup_num
[i
] == commutative
+ 1)
3062 *recog_data
.dup_loc
[i
]
3063 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3065 tclass
= preferred_class
[commutative
];
3066 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3067 preferred_class
[commutative
+ 1] = tclass
;
3069 t
= pref_or_nothing
[commutative
];
3070 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3071 pref_or_nothing
[commutative
+ 1] = t
;
3073 t
= address_reloaded
[commutative
];
3074 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3075 address_reloaded
[commutative
+ 1] = t
;
3078 this_earlyclobber
= 0;
3080 for (i
= 0; i
< noperands
; i
++)
3082 const char *p
= constraints
[i
];
3087 /* 0 => this operand can be reloaded somehow for this alternative. */
3089 /* 0 => this operand can be reloaded if the alternative allows regs. */
3093 rtx operand
= recog_data
.operand
[i
];
3095 /* Nonzero means this is a MEM that must be reloaded into a reg
3096 regardless of what the constraint says. */
3097 int force_reload
= 0;
3099 /* Nonzero if a constant forced into memory would be OK for this
3102 int earlyclobber
= 0;
3103 enum constraint_num cn
;
3106 /* If the predicate accepts a unary operator, it means that
3107 we need to reload the operand, but do not do this for
3108 match_operator and friends. */
3109 if (UNARY_P (operand
) && *p
!= 0)
3110 operand
= XEXP (operand
, 0);
3112 /* If the operand is a SUBREG, extract
3113 the REG or MEM (or maybe even a constant) within.
3114 (Constants can occur as a result of reg_equiv_constant.) */
3116 while (GET_CODE (operand
) == SUBREG
)
3118 /* Offset only matters when operand is a REG and
3119 it is a hard reg. This is because it is passed
3120 to reg_fits_class_p if it is a REG and all pseudos
3121 return 0 from that function. */
3122 if (REG_P (SUBREG_REG (operand
))
3123 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3125 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3126 GET_MODE (SUBREG_REG (operand
)),
3127 SUBREG_BYTE (operand
),
3128 GET_MODE (operand
)) < 0)
3130 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3131 GET_MODE (SUBREG_REG (operand
)),
3132 SUBREG_BYTE (operand
),
3133 GET_MODE (operand
));
3135 operand
= SUBREG_REG (operand
);
3136 /* Force reload if this is a constant or PLUS or if there may
3137 be a problem accessing OPERAND in the outer mode. */
3138 if (CONSTANT_P (operand
)
3139 || GET_CODE (operand
) == PLUS
3140 /* We must force a reload of paradoxical SUBREGs
3141 of a MEM because the alignment of the inner value
3142 may not be enough to do the outer reference. On
3143 big-endian machines, it may also reference outside
3146 On machines that extend byte operations and we have a
3147 SUBREG where both the inner and outer modes are no wider
3148 than a word and the inner mode is narrower, is integral,
3149 and gets extended when loaded from memory, combine.c has
3150 made assumptions about the behavior of the machine in such
3151 register access. If the data is, in fact, in memory we
3152 must always load using the size assumed to be in the
3153 register and let the insn do the different-sized
3156 This is doubly true if WORD_REGISTER_OPERATIONS. In
3157 this case eliminate_regs has left non-paradoxical
3158 subregs for push_reload to see. Make sure it does
3159 by forcing the reload.
3161 ??? When is it right at this stage to have a subreg
3162 of a mem that is _not_ to be handled specially? IMO
3163 those should have been reduced to just a mem. */
3164 || ((MEM_P (operand
)
3166 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3167 #ifndef WORD_REGISTER_OPERATIONS
3168 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
3169 < BIGGEST_ALIGNMENT
)
3170 && (GET_MODE_SIZE (operand_mode
[i
])
3171 > GET_MODE_SIZE (GET_MODE (operand
))))
3173 #ifdef LOAD_EXTEND_OP
3174 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3175 && (GET_MODE_SIZE (GET_MODE (operand
))
3177 && (GET_MODE_SIZE (operand_mode
[i
])
3178 > GET_MODE_SIZE (GET_MODE (operand
)))
3179 && INTEGRAL_MODE_P (GET_MODE (operand
))
3180 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3189 this_alternative
[i
] = NO_REGS
;
3190 this_alternative_win
[i
] = 0;
3191 this_alternative_match_win
[i
] = 0;
3192 this_alternative_offmemok
[i
] = 0;
3193 this_alternative_earlyclobber
[i
] = 0;
3194 this_alternative_matches
[i
] = -1;
3196 /* An empty constraint or empty alternative
3197 allows anything which matched the pattern. */
3198 if (*p
== 0 || *p
== ',')
3201 /* Scan this alternative's specs for this operand;
3202 set WIN if the operand fits any letter in this alternative.
3203 Otherwise, clear BADOP if this operand could
3204 fit some letter after reloads,
3205 or set WINREG if this operand could fit after reloads
3206 provided the constraint allows some registers. */
3209 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3227 /* Ignore rest of this alternative as far as
3228 reloading is concerned. */
3231 while (*p
&& *p
!= ',');
3235 case '0': case '1': case '2': case '3': case '4':
3236 case '5': case '6': case '7': case '8': case '9':
3237 m
= strtoul (p
, &end
, 10);
3241 this_alternative_matches
[i
] = m
;
3242 /* We are supposed to match a previous operand.
3243 If we do, we win if that one did.
3244 If we do not, count both of the operands as losers.
3245 (This is too conservative, since most of the time
3246 only a single reload insn will be needed to make
3247 the two operands win. As a result, this alternative
3248 may be rejected when it is actually desirable.) */
3249 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3250 /* If we are matching as if two operands were swapped,
3251 also pretend that operands_match had been computed
3253 But if I is the second of those and C is the first,
3254 don't exchange them, because operands_match is valid
3255 only on one side of its diagonal. */
3257 [(m
== commutative
|| m
== commutative
+ 1)
3258 ? 2 * commutative
+ 1 - m
: m
]
3259 [(i
== commutative
|| i
== commutative
+ 1)
3260 ? 2 * commutative
+ 1 - i
: i
])
3261 : operands_match
[m
][i
])
3263 /* If we are matching a non-offsettable address where an
3264 offsettable address was expected, then we must reject
3265 this combination, because we can't reload it. */
3266 if (this_alternative_offmemok
[m
]
3267 && MEM_P (recog_data
.operand
[m
])
3268 && this_alternative
[m
] == NO_REGS
3269 && ! this_alternative_win
[m
])
3272 did_match
= this_alternative_win
[m
];
3276 /* Operands don't match. */
3279 /* Retroactively mark the operand we had to match
3280 as a loser, if it wasn't already. */
3281 if (this_alternative_win
[m
])
3283 this_alternative_win
[m
] = 0;
3284 if (this_alternative
[m
] == NO_REGS
)
3286 /* But count the pair only once in the total badness of
3287 this alternative, if the pair can be a dummy reload.
3288 The pointers in operand_loc are not swapped; swap
3289 them by hand if necessary. */
3290 if (swapped
&& i
== commutative
)
3291 loc1
= commutative
+ 1;
3292 else if (swapped
&& i
== commutative
+ 1)
3296 if (swapped
&& m
== commutative
)
3297 loc2
= commutative
+ 1;
3298 else if (swapped
&& m
== commutative
+ 1)
3303 = find_dummy_reload (recog_data
.operand
[i
],
3304 recog_data
.operand
[m
],
3305 recog_data
.operand_loc
[loc1
],
3306 recog_data
.operand_loc
[loc2
],
3307 operand_mode
[i
], operand_mode
[m
],
3308 this_alternative
[m
], -1,
3309 this_alternative_earlyclobber
[m
]);
3314 /* This can be fixed with reloads if the operand
3315 we are supposed to match can be fixed with reloads. */
3317 this_alternative
[i
] = this_alternative
[m
];
3319 /* If we have to reload this operand and some previous
3320 operand also had to match the same thing as this
3321 operand, we don't know how to do that. So reject this
3323 if (! did_match
|| force_reload
)
3324 for (j
= 0; j
< i
; j
++)
3325 if (this_alternative_matches
[j
]
3326 == this_alternative_matches
[i
])
3334 /* All necessary reloads for an address_operand
3335 were handled in find_reloads_address. */
3337 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3343 case TARGET_MEM_CONSTRAINT
:
3348 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3349 && reg_renumber
[REGNO (operand
)] < 0))
3351 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3358 && ! address_reloaded
[i
]
3359 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3360 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3366 && ! address_reloaded
[i
]
3367 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3368 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3372 /* Memory operand whose address is not offsettable. */
3377 && ! (ind_levels
? offsettable_memref_p (operand
)
3378 : offsettable_nonstrict_memref_p (operand
))
3379 /* Certain mem addresses will become offsettable
3380 after they themselves are reloaded. This is important;
3381 we don't want our own handling of unoffsettables
3382 to override the handling of reg_equiv_address. */
3383 && !(REG_P (XEXP (operand
, 0))
3385 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3389 /* Memory operand whose address is offsettable. */
3393 if ((MEM_P (operand
)
3394 /* If IND_LEVELS, find_reloads_address won't reload a
3395 pseudo that didn't get a hard reg, so we have to
3396 reject that case. */
3397 && ((ind_levels
? offsettable_memref_p (operand
)
3398 : offsettable_nonstrict_memref_p (operand
))
3399 /* A reloaded address is offsettable because it is now
3400 just a simple register indirect. */
3401 || address_reloaded
[i
] == 1))
3403 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3404 && reg_renumber
[REGNO (operand
)] < 0
3405 /* If reg_equiv_address is nonzero, we will be
3406 loading it into a register; hence it will be
3407 offsettable, but we cannot say that reg_equiv_mem
3408 is offsettable without checking. */
3409 && ((reg_equiv_mem (REGNO (operand
)) != 0
3410 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3411 || (reg_equiv_address (REGNO (operand
)) != 0))))
3413 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3421 /* Output operand that is stored before the need for the
3422 input operands (and their index registers) is over. */
3423 earlyclobber
= 1, this_earlyclobber
= 1;
3433 /* A PLUS is never a valid operand, but reload can make
3434 it from a register when eliminating registers. */
3435 && GET_CODE (operand
) != PLUS
3436 /* A SCRATCH is not a valid operand. */
3437 && GET_CODE (operand
) != SCRATCH
3438 && (! CONSTANT_P (operand
)
3440 || LEGITIMATE_PIC_OPERAND_P (operand
))
3441 && (GENERAL_REGS
== ALL_REGS
3443 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3444 && reg_renumber
[REGNO (operand
)] < 0)))
3450 cn
= lookup_constraint (p
);
3451 switch (get_constraint_type (cn
))
3454 cl
= reg_class_for_constraint (cn
);
3460 if (CONST_INT_P (operand
)
3461 && (insn_const_int_ok_for_constraint
3462 (INTVAL (operand
), cn
)))
3469 if (constraint_satisfied_p (operand
, cn
))
3471 /* If the address was already reloaded,
3473 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3475 /* Likewise if the address will be reloaded because
3476 reg_equiv_address is nonzero. For reg_equiv_mem
3477 we have to check. */
3478 else if (REG_P (operand
)
3479 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3480 && reg_renumber
[REGNO (operand
)] < 0
3481 && ((reg_equiv_mem (REGNO (operand
)) != 0
3482 && (constraint_satisfied_p
3483 (reg_equiv_mem (REGNO (operand
)),
3485 || (reg_equiv_address (REGNO (operand
))
3489 /* If we didn't already win, we can reload
3490 constants via force_const_mem, and other
3491 MEMs by reloading the address like for 'o'. */
3492 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3500 if (constraint_satisfied_p (operand
, cn
))
3503 /* If we didn't already win, we can reload
3504 the address into a base register. */
3506 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3512 if (constraint_satisfied_p (operand
, cn
))
3520 = reg_class_subunion
[this_alternative
[i
]][cl
];
3521 if (GET_MODE (operand
) == BLKmode
)
3525 && reg_fits_class_p (operand
, this_alternative
[i
],
3526 offset
, GET_MODE (recog_data
.operand
[i
])))
3530 while ((p
+= len
), c
);
3532 if (swapped
== (commutative
>= 0 ? 1 : 0))
3535 /* If this operand could be handled with a reg,
3536 and some reg is allowed, then this operand can be handled. */
3537 if (winreg
&& this_alternative
[i
] != NO_REGS
3538 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3541 /* Record which operands fit this alternative. */
3542 this_alternative_earlyclobber
[i
] = earlyclobber
;
3543 if (win
&& ! force_reload
)
3544 this_alternative_win
[i
] = 1;
3545 else if (did_match
&& ! force_reload
)
3546 this_alternative_match_win
[i
] = 1;
3549 int const_to_mem
= 0;
3551 this_alternative_offmemok
[i
] = offmemok
;
3555 /* Alternative loses if it has no regs for a reg operand. */
3557 && this_alternative
[i
] == NO_REGS
3558 && this_alternative_matches
[i
] < 0)
3561 /* If this is a constant that is reloaded into the desired
3562 class by copying it to memory first, count that as another
3563 reload. This is consistent with other code and is
3564 required to avoid choosing another alternative when
3565 the constant is moved into memory by this function on
3566 an early reload pass. Note that the test here is
3567 precisely the same as in the code below that calls
3569 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3570 && ((targetm
.preferred_reload_class (operand
,
3571 this_alternative
[i
])
3573 || no_input_reloads
))
3576 if (this_alternative
[i
] != NO_REGS
)
3580 /* Alternative loses if it requires a type of reload not
3581 permitted for this insn. We can always reload SCRATCH
3582 and objects with a REG_UNUSED note. */
3583 if (GET_CODE (operand
) != SCRATCH
3584 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3585 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3587 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3591 /* If we can't reload this value at all, reject this
3592 alternative. Note that we could also lose due to
3593 LIMIT_RELOAD_CLASS, but we don't check that
3596 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3598 if (targetm
.preferred_reload_class (operand
,
3599 this_alternative
[i
])
3603 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3604 && (targetm
.preferred_output_reload_class (operand
,
3605 this_alternative
[i
])
3610 /* We prefer to reload pseudos over reloading other things,
3611 since such reloads may be able to be eliminated later.
3612 If we are reloading a SCRATCH, we won't be generating any
3613 insns, just using a register, so it is also preferred.
3614 So bump REJECT in other cases. Don't do this in the
3615 case where we are forcing a constant into memory and
3616 it will then win since we don't want to have a different
3617 alternative match then. */
3618 if (! (REG_P (operand
)
3619 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3620 && GET_CODE (operand
) != SCRATCH
3621 && ! (const_to_mem
&& constmemok
))
3624 /* Input reloads can be inherited more often than output
3625 reloads can be removed, so penalize output reloads. */
3626 if (operand_type
[i
] != RELOAD_FOR_INPUT
3627 && GET_CODE (operand
) != SCRATCH
)
3631 /* If this operand is a pseudo register that didn't get
3632 a hard reg and this alternative accepts some
3633 register, see if the class that we want is a subset
3634 of the preferred class for this register. If not,
3635 but it intersects that class, use the preferred class
3636 instead. If it does not intersect the preferred
3637 class, show that usage of this alternative should be
3638 discouraged; it will be discouraged more still if the
3639 register is `preferred or nothing'. We do this
3640 because it increases the chance of reusing our spill
3641 register in a later insn and avoiding a pair of
3642 memory stores and loads.
3644 Don't bother with this if this alternative will
3645 accept this operand.
3647 Don't do this for a multiword operand, since it is
3648 only a small win and has the risk of requiring more
3649 spill registers, which could cause a large loss.
3651 Don't do this if the preferred class has only one
3652 register because we might otherwise exhaust the
3655 if (! win
&& ! did_match
3656 && this_alternative
[i
] != NO_REGS
3657 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3658 && reg_class_size
[(int) preferred_class
[i
]] > 0
3659 && ! small_register_class_p (preferred_class
[i
]))
3661 if (! reg_class_subset_p (this_alternative
[i
],
3662 preferred_class
[i
]))
3664 /* Since we don't have a way of forming the intersection,
3665 we just do something special if the preferred class
3666 is a subset of the class we have; that's the most
3667 common case anyway. */
3668 if (reg_class_subset_p (preferred_class
[i
],
3669 this_alternative
[i
]))
3670 this_alternative
[i
] = preferred_class
[i
];
3672 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3677 /* Now see if any output operands that are marked "earlyclobber"
3678 in this alternative conflict with any input operands
3679 or any memory addresses. */
3681 for (i
= 0; i
< noperands
; i
++)
3682 if (this_alternative_earlyclobber
[i
]
3683 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3685 struct decomposition early_data
;
3687 early_data
= decompose (recog_data
.operand
[i
]);
3689 gcc_assert (modified
[i
] != RELOAD_READ
);
3691 if (this_alternative
[i
] == NO_REGS
)
3693 this_alternative_earlyclobber
[i
] = 0;
3694 gcc_assert (this_insn_is_asm
);
3695 error_for_asm (this_insn
,
3696 "%<&%> constraint used with no register class");
3699 for (j
= 0; j
< noperands
; j
++)
3700 /* Is this an input operand or a memory ref? */
3701 if ((MEM_P (recog_data
.operand
[j
])
3702 || modified
[j
] != RELOAD_WRITE
)
3704 /* Ignore things like match_operator operands. */
3705 && !recog_data
.is_operator
[j
]
3706 /* Don't count an input operand that is constrained to match
3707 the early clobber operand. */
3708 && ! (this_alternative_matches
[j
] == i
3709 && rtx_equal_p (recog_data
.operand
[i
],
3710 recog_data
.operand
[j
]))
3711 /* Is it altered by storing the earlyclobber operand? */
3712 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3715 /* If the output is in a non-empty few-regs class,
3716 it's costly to reload it, so reload the input instead. */
3717 if (small_register_class_p (this_alternative
[i
])
3718 && (REG_P (recog_data
.operand
[j
])
3719 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3722 this_alternative_win
[j
] = 0;
3723 this_alternative_match_win
[j
] = 0;
3728 /* If an earlyclobber operand conflicts with something,
3729 it must be reloaded, so request this and count the cost. */
3733 this_alternative_win
[i
] = 0;
3734 this_alternative_match_win
[j
] = 0;
3735 for (j
= 0; j
< noperands
; j
++)
3736 if (this_alternative_matches
[j
] == i
3737 && this_alternative_match_win
[j
])
3739 this_alternative_win
[j
] = 0;
3740 this_alternative_match_win
[j
] = 0;
3746 /* If one alternative accepts all the operands, no reload required,
3747 choose that alternative; don't consider the remaining ones. */
3750 /* Unswap these so that they are never swapped at `finish'. */
3753 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3754 recog_data
.operand
[commutative
+ 1]
3755 = substed_operand
[commutative
+ 1];
3757 for (i
= 0; i
< noperands
; i
++)
3759 goal_alternative_win
[i
] = this_alternative_win
[i
];
3760 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3761 goal_alternative
[i
] = this_alternative
[i
];
3762 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3763 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3764 goal_alternative_earlyclobber
[i
]
3765 = this_alternative_earlyclobber
[i
];
3767 goal_alternative_number
= this_alternative_number
;
3768 goal_alternative_swapped
= swapped
;
3769 goal_earlyclobber
= this_earlyclobber
;
3773 /* REJECT, set by the ! and ? constraint characters and when a register
3774 would be reloaded into a non-preferred class, discourages the use of
3775 this alternative for a reload goal. REJECT is incremented by six
3776 for each ? and two for each non-preferred class. */
3777 losers
= losers
* 6 + reject
;
3779 /* If this alternative can be made to work by reloading,
3780 and it needs less reloading than the others checked so far,
3781 record it as the chosen goal for reloading. */
3786 for (i
= 0; i
< noperands
; i
++)
3788 goal_alternative
[i
] = this_alternative
[i
];
3789 goal_alternative_win
[i
] = this_alternative_win
[i
];
3790 goal_alternative_match_win
[i
]
3791 = this_alternative_match_win
[i
];
3792 goal_alternative_offmemok
[i
]
3793 = this_alternative_offmemok
[i
];
3794 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3795 goal_alternative_earlyclobber
[i
]
3796 = this_alternative_earlyclobber
[i
];
3798 goal_alternative_swapped
= swapped
;
3800 goal_alternative_number
= this_alternative_number
;
3801 goal_earlyclobber
= this_earlyclobber
;
3807 enum reg_class tclass
;
3810 /* If the commutative operands have been swapped, swap
3811 them back in order to check the next alternative. */
3812 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3813 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3814 /* Unswap the duplicates too. */
3815 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3816 if (recog_data
.dup_num
[i
] == commutative
3817 || recog_data
.dup_num
[i
] == commutative
+ 1)
3818 *recog_data
.dup_loc
[i
]
3819 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3821 /* Unswap the operand related information as well. */
3822 tclass
= preferred_class
[commutative
];
3823 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3824 preferred_class
[commutative
+ 1] = tclass
;
3826 t
= pref_or_nothing
[commutative
];
3827 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3828 pref_or_nothing
[commutative
+ 1] = t
;
3830 t
= address_reloaded
[commutative
];
3831 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3832 address_reloaded
[commutative
+ 1] = t
;
3837 /* The operands don't meet the constraints.
3838 goal_alternative describes the alternative
3839 that we could reach by reloading the fewest operands.
3840 Reload so as to fit it. */
3842 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3844 /* No alternative works with reloads?? */
3845 if (insn_code_number
>= 0)
3846 fatal_insn ("unable to generate reloads for:", insn
);
3847 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3848 /* Avoid further trouble with this insn. */
3849 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3854 /* Jump to `finish' from above if all operands are valid already.
3855 In that case, goal_alternative_win is all 1. */
3858 /* Right now, for any pair of operands I and J that are required to match,
3860 goal_alternative_matches[J] is I.
3861 Set up goal_alternative_matched as the inverse function:
3862 goal_alternative_matched[I] = J. */
3864 for (i
= 0; i
< noperands
; i
++)
3865 goal_alternative_matched
[i
] = -1;
3867 for (i
= 0; i
< noperands
; i
++)
3868 if (! goal_alternative_win
[i
]
3869 && goal_alternative_matches
[i
] >= 0)
3870 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3872 for (i
= 0; i
< noperands
; i
++)
3873 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3875 /* If the best alternative is with operands 1 and 2 swapped,
3876 consider them swapped before reporting the reloads. Update the
3877 operand numbers of any reloads already pushed. */
3879 if (goal_alternative_swapped
)
3883 tem
= substed_operand
[commutative
];
3884 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3885 substed_operand
[commutative
+ 1] = tem
;
3886 tem
= recog_data
.operand
[commutative
];
3887 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3888 recog_data
.operand
[commutative
+ 1] = tem
;
3889 tem
= *recog_data
.operand_loc
[commutative
];
3890 *recog_data
.operand_loc
[commutative
]
3891 = *recog_data
.operand_loc
[commutative
+ 1];
3892 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3894 for (i
= 0; i
< n_reloads
; i
++)
3896 if (rld
[i
].opnum
== commutative
)
3897 rld
[i
].opnum
= commutative
+ 1;
3898 else if (rld
[i
].opnum
== commutative
+ 1)
3899 rld
[i
].opnum
= commutative
;
3903 for (i
= 0; i
< noperands
; i
++)
3905 operand_reloadnum
[i
] = -1;
3907 /* If this is an earlyclobber operand, we need to widen the scope.
3908 The reload must remain valid from the start of the insn being
3909 reloaded until after the operand is stored into its destination.
3910 We approximate this with RELOAD_OTHER even though we know that we
3911 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3913 One special case that is worth checking is when we have an
3914 output that is earlyclobber but isn't used past the insn (typically
3915 a SCRATCH). In this case, we only need have the reload live
3916 through the insn itself, but not for any of our input or output
3918 But we must not accidentally narrow the scope of an existing
3919 RELOAD_OTHER reload - leave these alone.
3921 In any case, anything needed to address this operand can remain
3922 however they were previously categorized. */
3924 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3926 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3927 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3930 /* Any constants that aren't allowed and can't be reloaded
3931 into registers are here changed into memory references. */
3932 for (i
= 0; i
< noperands
; i
++)
3933 if (! goal_alternative_win
[i
])
3935 rtx op
= recog_data
.operand
[i
];
3936 rtx subreg
= NULL_RTX
;
3937 rtx plus
= NULL_RTX
;
3938 machine_mode mode
= operand_mode
[i
];
3940 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3941 push_reload so we have to let them pass here. */
3942 if (GET_CODE (op
) == SUBREG
)
3945 op
= SUBREG_REG (op
);
3946 mode
= GET_MODE (op
);
3949 if (GET_CODE (op
) == PLUS
)
3955 if (CONST_POOL_OK_P (mode
, op
)
3956 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3958 || no_input_reloads
))
3960 int this_address_reloaded
;
3961 rtx tem
= force_const_mem (mode
, op
);
3963 /* If we stripped a SUBREG or a PLUS above add it back. */
3964 if (plus
!= NULL_RTX
)
3965 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3967 if (subreg
!= NULL_RTX
)
3968 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3970 this_address_reloaded
= 0;
3971 substed_operand
[i
] = recog_data
.operand
[i
]
3972 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3973 0, insn
, &this_address_reloaded
);
3975 /* If the alternative accepts constant pool refs directly
3976 there will be no reload needed at all. */
3977 if (plus
== NULL_RTX
3978 && subreg
== NULL_RTX
3979 && alternative_allows_const_pool_ref (this_address_reloaded
== 0
3980 ? substed_operand
[i
]
3982 recog_data
.constraints
[i
],
3983 goal_alternative_number
))
3984 goal_alternative_win
[i
] = 1;
3988 /* Record the values of the earlyclobber operands for the caller. */
3989 if (goal_earlyclobber
)
3990 for (i
= 0; i
< noperands
; i
++)
3991 if (goal_alternative_earlyclobber
[i
])
3992 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3994 /* Now record reloads for all the operands that need them. */
3995 for (i
= 0; i
< noperands
; i
++)
3996 if (! goal_alternative_win
[i
])
3998 /* Operands that match previous ones have already been handled. */
3999 if (goal_alternative_matches
[i
] >= 0)
4001 /* Handle an operand with a nonoffsettable address
4002 appearing where an offsettable address will do
4003 by reloading the address into a base register.
4005 ??? We can also do this when the operand is a register and
4006 reg_equiv_mem is not offsettable, but this is a bit tricky,
4007 so we don't bother with it. It may not be worth doing. */
4008 else if (goal_alternative_matched
[i
] == -1
4009 && goal_alternative_offmemok
[i
]
4010 && MEM_P (recog_data
.operand
[i
]))
4012 /* If the address to be reloaded is a VOIDmode constant,
4013 use the default address mode as mode of the reload register,
4014 as would have been done by find_reloads_address. */
4015 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
4016 machine_mode address_mode
;
4018 address_mode
= get_address_mode (recog_data
.operand
[i
]);
4019 operand_reloadnum
[i
]
4020 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
4021 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
4022 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4024 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
4025 rld
[operand_reloadnum
[i
]].inc
4026 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4028 /* If this operand is an output, we will have made any
4029 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4030 now we are treating part of the operand as an input, so
4031 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4033 if (modified
[i
] == RELOAD_WRITE
)
4035 for (j
= 0; j
< n_reloads
; j
++)
4037 if (rld
[j
].opnum
== i
)
4039 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4040 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
4041 else if (rld
[j
].when_needed
4042 == RELOAD_FOR_OUTADDR_ADDRESS
)
4043 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
4048 else if (goal_alternative_matched
[i
] == -1)
4050 operand_reloadnum
[i
]
4051 = push_reload ((modified
[i
] != RELOAD_WRITE
4052 ? recog_data
.operand
[i
] : 0),
4053 (modified
[i
] != RELOAD_READ
4054 ? recog_data
.operand
[i
] : 0),
4055 (modified
[i
] != RELOAD_WRITE
4056 ? recog_data
.operand_loc
[i
] : 0),
4057 (modified
[i
] != RELOAD_READ
4058 ? recog_data
.operand_loc
[i
] : 0),
4059 (enum reg_class
) goal_alternative
[i
],
4060 (modified
[i
] == RELOAD_WRITE
4061 ? VOIDmode
: operand_mode
[i
]),
4062 (modified
[i
] == RELOAD_READ
4063 ? VOIDmode
: operand_mode
[i
]),
4064 (insn_code_number
< 0 ? 0
4065 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4066 0, i
, operand_type
[i
]);
4068 /* In a matching pair of operands, one must be input only
4069 and the other must be output only.
4070 Pass the input operand as IN and the other as OUT. */
4071 else if (modified
[i
] == RELOAD_READ
4072 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4074 operand_reloadnum
[i
]
4075 = push_reload (recog_data
.operand
[i
],
4076 recog_data
.operand
[goal_alternative_matched
[i
]],
4077 recog_data
.operand_loc
[i
],
4078 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4079 (enum reg_class
) goal_alternative
[i
],
4081 operand_mode
[goal_alternative_matched
[i
]],
4082 0, 0, i
, RELOAD_OTHER
);
4083 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4085 else if (modified
[i
] == RELOAD_WRITE
4086 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4088 operand_reloadnum
[goal_alternative_matched
[i
]]
4089 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4090 recog_data
.operand
[i
],
4091 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4092 recog_data
.operand_loc
[i
],
4093 (enum reg_class
) goal_alternative
[i
],
4094 operand_mode
[goal_alternative_matched
[i
]],
4096 0, 0, i
, RELOAD_OTHER
);
4097 operand_reloadnum
[i
] = output_reloadnum
;
4101 gcc_assert (insn_code_number
< 0);
4102 error_for_asm (insn
, "inconsistent operand constraints "
4104 /* Avoid further trouble with this insn. */
4105 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4110 else if (goal_alternative_matched
[i
] < 0
4111 && goal_alternative_matches
[i
] < 0
4112 && address_operand_reloaded
[i
] != 1
4115 /* For each non-matching operand that's a MEM or a pseudo-register
4116 that didn't get a hard register, make an optional reload.
4117 This may get done even if the insn needs no reloads otherwise. */
4119 rtx operand
= recog_data
.operand
[i
];
4121 while (GET_CODE (operand
) == SUBREG
)
4122 operand
= SUBREG_REG (operand
);
4123 if ((MEM_P (operand
)
4125 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4126 /* If this is only for an output, the optional reload would not
4127 actually cause us to use a register now, just note that
4128 something is stored here. */
4129 && (goal_alternative
[i
] != NO_REGS
4130 || modified
[i
] == RELOAD_WRITE
)
4131 && ! no_input_reloads
4132 /* An optional output reload might allow to delete INSN later.
4133 We mustn't make in-out reloads on insns that are not permitted
4135 If this is an asm, we can't delete it; we must not even call
4136 push_reload for an optional output reload in this case,
4137 because we can't be sure that the constraint allows a register,
4138 and push_reload verifies the constraints for asms. */
4139 && (modified
[i
] == RELOAD_READ
4140 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4141 operand_reloadnum
[i
]
4142 = push_reload ((modified
[i
] != RELOAD_WRITE
4143 ? recog_data
.operand
[i
] : 0),
4144 (modified
[i
] != RELOAD_READ
4145 ? recog_data
.operand
[i
] : 0),
4146 (modified
[i
] != RELOAD_WRITE
4147 ? recog_data
.operand_loc
[i
] : 0),
4148 (modified
[i
] != RELOAD_READ
4149 ? recog_data
.operand_loc
[i
] : 0),
4150 (enum reg_class
) goal_alternative
[i
],
4151 (modified
[i
] == RELOAD_WRITE
4152 ? VOIDmode
: operand_mode
[i
]),
4153 (modified
[i
] == RELOAD_READ
4154 ? VOIDmode
: operand_mode
[i
]),
4155 (insn_code_number
< 0 ? 0
4156 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4157 1, i
, operand_type
[i
]);
4158 /* If a memory reference remains (either as a MEM or a pseudo that
4159 did not get a hard register), yet we can't make an optional
4160 reload, check if this is actually a pseudo register reference;
4161 we then need to emit a USE and/or a CLOBBER so that reload
4162 inheritance will do the right thing. */
4166 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4167 && reg_renumber
[REGNO (operand
)] < 0)))
4169 operand
= *recog_data
.operand_loc
[i
];
4171 while (GET_CODE (operand
) == SUBREG
)
4172 operand
= SUBREG_REG (operand
);
4173 if (REG_P (operand
))
4175 if (modified
[i
] != RELOAD_WRITE
)
4176 /* We mark the USE with QImode so that we recognize
4177 it as one that can be safely deleted at the end
4179 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4181 if (modified
[i
] != RELOAD_READ
)
4182 emit_insn_after (gen_clobber (operand
), insn
);
4186 else if (goal_alternative_matches
[i
] >= 0
4187 && goal_alternative_win
[goal_alternative_matches
[i
]]
4188 && modified
[i
] == RELOAD_READ
4189 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4190 && ! no_input_reloads
&& ! no_output_reloads
4193 /* Similarly, make an optional reload for a pair of matching
4194 objects that are in MEM or a pseudo that didn't get a hard reg. */
4196 rtx operand
= recog_data
.operand
[i
];
4198 while (GET_CODE (operand
) == SUBREG
)
4199 operand
= SUBREG_REG (operand
);
4200 if ((MEM_P (operand
)
4202 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4203 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4204 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4205 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4206 recog_data
.operand
[i
],
4207 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4208 recog_data
.operand_loc
[i
],
4209 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4210 operand_mode
[goal_alternative_matches
[i
]],
4212 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4215 /* Perform whatever substitutions on the operands we are supposed
4216 to make due to commutativity or replacement of registers
4217 with equivalent constants or memory slots. */
4219 for (i
= 0; i
< noperands
; i
++)
4221 /* We only do this on the last pass through reload, because it is
4222 possible for some data (like reg_equiv_address) to be changed during
4223 later passes. Moreover, we lose the opportunity to get a useful
4224 reload_{in,out}_reg when we do these replacements. */
4228 rtx substitution
= substed_operand
[i
];
4230 *recog_data
.operand_loc
[i
] = substitution
;
4232 /* If we're replacing an operand with a LABEL_REF, we need to
4233 make sure that there's a REG_LABEL_OPERAND note attached to
4234 this instruction. */
4235 if (GET_CODE (substitution
) == LABEL_REF
4236 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4237 LABEL_REF_LABEL (substitution
))
4238 /* For a JUMP_P, if it was a branch target it must have
4239 already been recorded as such. */
4241 || !label_is_jump_target_p (LABEL_REF_LABEL (substitution
),
4244 add_reg_note (insn
, REG_LABEL_OPERAND
,
4245 LABEL_REF_LABEL (substitution
));
4246 if (LABEL_P (LABEL_REF_LABEL (substitution
)))
4247 ++LABEL_NUSES (LABEL_REF_LABEL (substitution
));
4252 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4255 /* If this insn pattern contains any MATCH_DUP's, make sure that
4256 they will be substituted if the operands they match are substituted.
4257 Also do now any substitutions we already did on the operands.
4259 Don't do this if we aren't making replacements because we might be
4260 propagating things allocated by frame pointer elimination into places
4261 it doesn't expect. */
4263 if (insn_code_number
>= 0 && replace
)
4264 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4266 int opno
= recog_data
.dup_num
[i
];
4267 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4268 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4272 /* This loses because reloading of prior insns can invalidate the equivalence
4273 (or at least find_equiv_reg isn't smart enough to find it any more),
4274 causing this insn to need more reload regs than it needed before.
4275 It may be too late to make the reload regs available.
4276 Now this optimization is done safely in choose_reload_regs. */
4278 /* For each reload of a reg into some other class of reg,
4279 search for an existing equivalent reg (same value now) in the right class.
4280 We can use it as long as we don't need to change its contents. */
4281 for (i
= 0; i
< n_reloads
; i
++)
4282 if (rld
[i
].reg_rtx
== 0
4284 && REG_P (rld
[i
].in
)
4288 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4289 static_reload_reg_p
, 0, rld
[i
].inmode
);
4290 /* Prevent generation of insn to load the value
4291 because the one we found already has the value. */
4293 rld
[i
].in
= rld
[i
].reg_rtx
;
4297 /* If we detected error and replaced asm instruction by USE, forget about the
4299 if (GET_CODE (PATTERN (insn
)) == USE
4300 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4303 /* Perhaps an output reload can be combined with another
4304 to reduce needs by one. */
4305 if (!goal_earlyclobber
)
4308 /* If we have a pair of reloads for parts of an address, they are reloading
4309 the same object, the operands themselves were not reloaded, and they
4310 are for two operands that are supposed to match, merge the reloads and
4311 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4313 for (i
= 0; i
< n_reloads
; i
++)
4317 for (j
= i
+ 1; j
< n_reloads
; j
++)
4318 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4319 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4320 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4321 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4322 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4323 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4324 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4325 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4326 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4327 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4328 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4329 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4330 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4331 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4332 || (goal_alternative_matches
[rld
[j
].opnum
]
4335 for (k
= 0; k
< n_replacements
; k
++)
4336 if (replacements
[k
].what
== j
)
4337 replacements
[k
].what
= i
;
4339 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4340 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4341 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4343 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4348 /* Scan all the reloads and update their type.
4349 If a reload is for the address of an operand and we didn't reload
4350 that operand, change the type. Similarly, change the operand number
4351 of a reload when two operands match. If a reload is optional, treat it
4352 as though the operand isn't reloaded.
4354 ??? This latter case is somewhat odd because if we do the optional
4355 reload, it means the object is hanging around. Thus we need only
4356 do the address reload if the optional reload was NOT done.
4358 Change secondary reloads to be the address type of their operand, not
4361 If an operand's reload is now RELOAD_OTHER, change any
4362 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4363 RELOAD_FOR_OTHER_ADDRESS. */
4365 for (i
= 0; i
< n_reloads
; i
++)
4367 if (rld
[i
].secondary_p
4368 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4369 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4371 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4372 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4373 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4374 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4375 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4376 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4378 /* If we have a secondary reload to go along with this reload,
4379 change its type to RELOAD_FOR_OPADDR_ADDR. */
4381 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4382 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4383 && rld
[i
].secondary_in_reload
!= -1)
4385 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4387 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4389 /* If there's a tertiary reload we have to change it also. */
4390 if (secondary_in_reload
> 0
4391 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4392 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4393 = RELOAD_FOR_OPADDR_ADDR
;
4396 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4397 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4398 && rld
[i
].secondary_out_reload
!= -1)
4400 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4402 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4404 /* If there's a tertiary reload we have to change it also. */
4405 if (secondary_out_reload
4406 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4407 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4408 = RELOAD_FOR_OPADDR_ADDR
;
4411 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4412 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4413 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4415 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4418 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4419 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4420 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4421 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4423 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4425 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4426 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4429 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4430 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4431 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4433 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4434 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4435 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4436 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4437 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4438 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4439 This is complicated by the fact that a single operand can have more
4440 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4441 choose_reload_regs without affecting code quality, and cases that
4442 actually fail are extremely rare, so it turns out to be better to fix
4443 the problem here by not generating cases that choose_reload_regs will
4445 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4446 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4448 We can reduce the register pressure by exploiting that a
4449 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4450 does not conflict with any of them, if it is only used for the first of
4451 the RELOAD_FOR_X_ADDRESS reloads. */
4453 int first_op_addr_num
= -2;
4454 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4455 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4456 int need_change
= 0;
4457 /* We use last_op_addr_reload and the contents of the above arrays
4458 first as flags - -2 means no instance encountered, -1 means exactly
4459 one instance encountered.
4460 If more than one instance has been encountered, we store the reload
4461 number of the first reload of the kind in question; reload numbers
4462 are known to be non-negative. */
4463 for (i
= 0; i
< noperands
; i
++)
4464 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4465 for (i
= n_reloads
- 1; i
>= 0; i
--)
4467 switch (rld
[i
].when_needed
)
4469 case RELOAD_FOR_OPERAND_ADDRESS
:
4470 if (++first_op_addr_num
>= 0)
4472 first_op_addr_num
= i
;
4476 case RELOAD_FOR_INPUT_ADDRESS
:
4477 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4479 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4483 case RELOAD_FOR_OUTPUT_ADDRESS
:
4484 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4486 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4497 for (i
= 0; i
< n_reloads
; i
++)
4500 enum reload_type type
;
4502 switch (rld
[i
].when_needed
)
4504 case RELOAD_FOR_OPADDR_ADDR
:
4505 first_num
= first_op_addr_num
;
4506 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4508 case RELOAD_FOR_INPADDR_ADDRESS
:
4509 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4510 type
= RELOAD_FOR_INPUT_ADDRESS
;
4512 case RELOAD_FOR_OUTADDR_ADDRESS
:
4513 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4514 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4521 else if (i
> first_num
)
4522 rld
[i
].when_needed
= type
;
4525 /* Check if the only TYPE reload that uses reload I is
4526 reload FIRST_NUM. */
4527 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4529 if (rld
[j
].when_needed
== type
4530 && (rld
[i
].secondary_p
4531 ? rld
[j
].secondary_in_reload
== i
4532 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4534 rld
[i
].when_needed
= type
;
4543 /* See if we have any reloads that are now allowed to be merged
4544 because we've changed when the reload is needed to
4545 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4546 check for the most common cases. */
4548 for (i
= 0; i
< n_reloads
; i
++)
4549 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4550 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4551 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4552 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4553 for (j
= 0; j
< n_reloads
; j
++)
4554 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4555 && rld
[j
].when_needed
== rld
[i
].when_needed
4556 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4557 && rld
[i
].rclass
== rld
[j
].rclass
4558 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4559 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4561 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4562 transfer_replacements (i
, j
);
4567 /* If we made any reloads for addresses, see if they violate a
4568 "no input reloads" requirement for this insn. But loads that we
4569 do after the insn (such as for output addresses) are fine. */
4570 if (no_input_reloads
)
4571 for (i
= 0; i
< n_reloads
; i
++)
4572 gcc_assert (rld
[i
].in
== 0
4573 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4574 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4577 /* Compute reload_mode and reload_nregs. */
4578 for (i
= 0; i
< n_reloads
; i
++)
4581 = (rld
[i
].inmode
== VOIDmode
4582 || (GET_MODE_SIZE (rld
[i
].outmode
)
4583 > GET_MODE_SIZE (rld
[i
].inmode
)))
4584 ? rld
[i
].outmode
: rld
[i
].inmode
;
4586 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4589 /* Special case a simple move with an input reload and a
4590 destination of a hard reg, if the hard reg is ok, use it. */
4591 for (i
= 0; i
< n_reloads
; i
++)
4592 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4593 && GET_CODE (PATTERN (insn
)) == SET
4594 && REG_P (SET_DEST (PATTERN (insn
)))
4595 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4596 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4597 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4599 rtx dest
= SET_DEST (PATTERN (insn
));
4600 unsigned int regno
= REGNO (dest
);
4602 if (regno
< FIRST_PSEUDO_REGISTER
4603 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4604 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4606 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4609 for (nri
= 1; nri
< nr
; nri
++)
4610 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4617 rld
[i
].reg_rtx
= dest
;
4624 /* Return true if alternative number ALTNUM in constraint-string
4625 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4626 MEM gives the reference if it didn't need any reloads, otherwise it
4630 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4631 const char *constraint
, int altnum
)
4635 /* Skip alternatives before the one requested. */
4638 while (*constraint
++ != ',')
4642 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4643 If one of them is present, this alternative accepts the result of
4644 passing a constant-pool reference through find_reloads_toplev.
4646 The same is true of extra memory constraints if the address
4647 was reloaded into a register. However, the target may elect
4648 to disallow the original constant address, forcing it to be
4649 reloaded into a register instead. */
4650 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4651 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4653 enum constraint_num cn
= lookup_constraint (constraint
);
4654 if (insn_extra_memory_constraint (cn
)
4655 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4661 /* Scan X for memory references and scan the addresses for reloading.
4662 Also checks for references to "constant" regs that we want to eliminate
4663 and replaces them with the values they stand for.
4664 We may alter X destructively if it contains a reference to such.
4665 If X is just a constant reg, we return the equivalent value
4668 IND_LEVELS says how many levels of indirect addressing this machine
4671 OPNUM and TYPE identify the purpose of the reload.
4673 IS_SET_DEST is true if X is the destination of a SET, which is not
4674 appropriate to be replaced by a constant.
4676 INSN, if nonzero, is the insn in which we do the reload. It is used
4677 to determine if we may generate output reloads, and where to put USEs
4678 for pseudos that we have to replace with stack slots.
4680 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4681 result of find_reloads_address. */
4684 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4685 int ind_levels
, int is_set_dest
, rtx_insn
*insn
,
4686 int *address_reloaded
)
4688 RTX_CODE code
= GET_CODE (x
);
4690 const char *fmt
= GET_RTX_FORMAT (code
);
4696 /* This code is duplicated for speed in find_reloads. */
4697 int regno
= REGNO (x
);
4698 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4699 x
= reg_equiv_constant (regno
);
4701 /* This creates (subreg (mem...)) which would cause an unnecessary
4702 reload of the mem. */
4703 else if (reg_equiv_mem (regno
) != 0)
4704 x
= reg_equiv_mem (regno
);
4706 else if (reg_equiv_memory_loc (regno
)
4707 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4709 rtx mem
= make_memloc (x
, regno
);
4710 if (reg_equiv_address (regno
)
4711 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4713 /* If this is not a toplevel operand, find_reloads doesn't see
4714 this substitution. We have to emit a USE of the pseudo so
4715 that delete_output_reload can see it. */
4716 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4717 /* We mark the USE with QImode so that we recognize it
4718 as one that can be safely deleted at the end of
4720 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4723 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4724 opnum
, type
, ind_levels
, insn
);
4725 if (!rtx_equal_p (x
, mem
))
4726 push_reg_equiv_alt_mem (regno
, x
);
4727 if (address_reloaded
)
4728 *address_reloaded
= i
;
4737 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4738 opnum
, type
, ind_levels
, insn
);
4739 if (address_reloaded
)
4740 *address_reloaded
= i
;
4745 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4747 /* Check for SUBREG containing a REG that's equivalent to a
4748 constant. If the constant has a known value, truncate it
4749 right now. Similarly if we are extracting a single-word of a
4750 multi-word constant. If the constant is symbolic, allow it
4751 to be substituted normally. push_reload will strip the
4752 subreg later. The constant must not be VOIDmode, because we
4753 will lose the mode of the register (this should never happen
4754 because one of the cases above should handle it). */
4756 int regno
= REGNO (SUBREG_REG (x
));
4759 if (regno
>= FIRST_PSEUDO_REGISTER
4760 && reg_renumber
[regno
] < 0
4761 && reg_equiv_constant (regno
) != 0)
4764 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4765 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4767 if (CONSTANT_P (tem
)
4768 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4770 tem
= force_const_mem (GET_MODE (x
), tem
);
4771 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4772 &XEXP (tem
, 0), opnum
, type
,
4774 if (address_reloaded
)
4775 *address_reloaded
= i
;
4780 /* If the subreg contains a reg that will be converted to a mem,
4781 attempt to convert the whole subreg to a (narrower or wider)
4782 memory reference instead. If this succeeds, we're done --
4783 otherwise fall through to check whether the inner reg still
4784 needs address reloads anyway. */
4786 if (regno
>= FIRST_PSEUDO_REGISTER
4787 && reg_equiv_memory_loc (regno
) != 0)
4789 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4790 insn
, address_reloaded
);
4796 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4800 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4801 ind_levels
, is_set_dest
, insn
,
4803 /* If we have replaced a reg with it's equivalent memory loc -
4804 that can still be handled here e.g. if it's in a paradoxical
4805 subreg - we must make the change in a copy, rather than using
4806 a destructive change. This way, find_reloads can still elect
4807 not to do the change. */
4808 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4810 x
= shallow_copy_rtx (x
);
4813 XEXP (x
, i
) = new_part
;
4819 /* Return a mem ref for the memory equivalent of reg REGNO.
4820 This mem ref is not shared with anything. */
4823 make_memloc (rtx ad
, int regno
)
4825 /* We must rerun eliminate_regs, in case the elimination
4826 offsets have changed. */
4828 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4831 /* If TEM might contain a pseudo, we must copy it to avoid
4832 modifying it when we do the substitution for the reload. */
4833 if (rtx_varies_p (tem
, 0))
4834 tem
= copy_rtx (tem
);
4836 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4837 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4839 /* Copy the result if it's still the same as the equivalence, to avoid
4840 modifying it when we do the substitution for the reload. */
4841 if (tem
== reg_equiv_memory_loc (regno
))
4842 tem
= copy_rtx (tem
);
4846 /* Returns true if AD could be turned into a valid memory reference
4847 to mode MODE in address space AS by reloading the part pointed to
4848 by PART into a register. */
4851 maybe_memory_address_addr_space_p (machine_mode mode
, rtx ad
,
4852 addr_space_t as
, rtx
*part
)
4856 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4859 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4865 /* Record all reloads needed for handling memory address AD
4866 which appears in *LOC in a memory reference to mode MODE
4867 which itself is found in location *MEMREFLOC.
4868 Note that we take shortcuts assuming that no multi-reg machine mode
4869 occurs as part of an address.
4871 OPNUM and TYPE specify the purpose of this reload.
4873 IND_LEVELS says how many levels of indirect addressing this machine
4876 INSN, if nonzero, is the insn in which we do the reload. It is used
4877 to determine if we may generate output reloads, and where to put USEs
4878 for pseudos that we have to replace with stack slots.
4880 Value is one if this address is reloaded or replaced as a whole; it is
4881 zero if the top level of this address was not reloaded or replaced, and
4882 it is -1 if it may or may not have been reloaded or replaced.
4884 Note that there is no verification that the address will be valid after
4885 this routine does its work. Instead, we rely on the fact that the address
4886 was valid when reload started. So we need only undo things that reload
4887 could have broken. These are wrong register types, pseudos not allocated
4888 to a hard register, and frame pointer elimination. */
4891 find_reloads_address (machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4892 rtx
*loc
, int opnum
, enum reload_type type
,
4893 int ind_levels
, rtx_insn
*insn
)
4895 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4896 : ADDR_SPACE_GENERIC
;
4898 int removed_and
= 0;
4902 /* If the address is a register, see if it is a legitimate address and
4903 reload if not. We first handle the cases where we need not reload
4904 or where we must reload in a non-standard way. */
4910 if (reg_equiv_constant (regno
) != 0)
4912 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4913 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4914 GET_MODE (ad
), opnum
, type
, ind_levels
);
4918 tem
= reg_equiv_memory_loc (regno
);
4921 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4923 tem
= make_memloc (ad
, regno
);
4924 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4926 MEM_ADDR_SPACE (tem
)))
4930 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4931 &XEXP (tem
, 0), opnum
,
4932 ADDR_TYPE (type
), ind_levels
, insn
);
4933 if (!rtx_equal_p (tem
, orig
))
4934 push_reg_equiv_alt_mem (regno
, tem
);
4936 /* We can avoid a reload if the register's equivalent memory
4937 expression is valid as an indirect memory address.
4938 But not all addresses are valid in a mem used as an indirect
4939 address: only reg or reg+constant. */
4942 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4943 && (REG_P (XEXP (tem
, 0))
4944 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4945 && REG_P (XEXP (XEXP (tem
, 0), 0))
4946 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4948 /* TEM is not the same as what we'll be replacing the
4949 pseudo with after reload, put a USE in front of INSN
4950 in the final reload pass. */
4952 && num_not_at_initial_offset
4953 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4956 /* We mark the USE with QImode so that we
4957 recognize it as one that can be safely
4958 deleted at the end of reload. */
4959 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4962 /* This doesn't really count as replacing the address
4963 as a whole, since it is still a memory access. */
4971 /* The only remaining case where we can avoid a reload is if this is a
4972 hard register that is valid as a base register and which is not the
4973 subject of a CLOBBER in this insn. */
4975 else if (regno
< FIRST_PSEUDO_REGISTER
4976 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
4977 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4980 /* If we do not have one of the cases above, we must do the reload. */
4981 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
4982 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4983 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4987 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4989 /* The address appears valid, so reloads are not needed.
4990 But the address may contain an eliminable register.
4991 This can happen because a machine with indirect addressing
4992 may consider a pseudo register by itself a valid address even when
4993 it has failed to get a hard reg.
4994 So do a tree-walk to find and eliminate all such regs. */
4996 /* But first quickly dispose of a common case. */
4997 if (GET_CODE (ad
) == PLUS
4998 && CONST_INT_P (XEXP (ad
, 1))
4999 && REG_P (XEXP (ad
, 0))
5000 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
5003 subst_reg_equivs_changed
= 0;
5004 *loc
= subst_reg_equivs (ad
, insn
);
5006 if (! subst_reg_equivs_changed
)
5009 /* Check result for validity after substitution. */
5010 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
5014 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5017 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
5019 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
5024 *memrefloc
= copy_rtx (*memrefloc
);
5025 XEXP (*memrefloc
, 0) = ad
;
5026 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5032 /* The address is not valid. We have to figure out why. First see if
5033 we have an outer AND and remove it if so. Then analyze what's inside. */
5035 if (GET_CODE (ad
) == AND
)
5038 loc
= &XEXP (ad
, 0);
5042 /* One possibility for why the address is invalid is that it is itself
5043 a MEM. This can happen when the frame pointer is being eliminated, a
5044 pseudo is not allocated to a hard register, and the offset between the
5045 frame and stack pointers is not its initial value. In that case the
5046 pseudo will have been replaced by a MEM referring to the
5050 /* First ensure that the address in this MEM is valid. Then, unless
5051 indirect addresses are valid, reload the MEM into a register. */
5053 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5054 opnum
, ADDR_TYPE (type
),
5055 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5057 /* If tem was changed, then we must create a new memory reference to
5058 hold it and store it back into memrefloc. */
5059 if (tem
!= ad
&& memrefloc
)
5061 *memrefloc
= copy_rtx (*memrefloc
);
5062 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5063 loc
= &XEXP (*memrefloc
, 0);
5065 loc
= &XEXP (*loc
, 0);
5068 /* Check similar cases as for indirect addresses as above except
5069 that we can allow pseudos and a MEM since they should have been
5070 taken care of above. */
5073 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5074 || MEM_P (XEXP (tem
, 0))
5075 || ! (REG_P (XEXP (tem
, 0))
5076 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5077 && REG_P (XEXP (XEXP (tem
, 0), 0))
5078 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5080 /* Must use TEM here, not AD, since it is the one that will
5081 have any subexpressions reloaded, if needed. */
5082 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5083 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5086 return ! removed_and
;
5092 /* If we have address of a stack slot but it's not valid because the
5093 displacement is too large, compute the sum in a register.
5094 Handle all base registers here, not just fp/ap/sp, because on some
5095 targets (namely SH) we can also get too large displacements from
5096 big-endian corrections. */
5097 else if (GET_CODE (ad
) == PLUS
5098 && REG_P (XEXP (ad
, 0))
5099 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5100 && CONST_INT_P (XEXP (ad
, 1))
5101 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5103 /* Similarly, if we were to reload the base register and the
5104 mem+offset address is still invalid, then we want to reload
5105 the whole address, not just the base register. */
5106 || ! maybe_memory_address_addr_space_p
5107 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5110 /* Unshare the MEM rtx so we can safely alter it. */
5113 *memrefloc
= copy_rtx (*memrefloc
);
5114 loc
= &XEXP (*memrefloc
, 0);
5116 loc
= &XEXP (*loc
, 0);
5119 if (double_reg_address_ok
5120 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5123 /* Unshare the sum as well. */
5124 *loc
= ad
= copy_rtx (ad
);
5126 /* Reload the displacement into an index reg.
5127 We assume the frame pointer or arg pointer is a base reg. */
5128 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5129 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5135 /* If the sum of two regs is not necessarily valid,
5136 reload the sum into a base reg.
5137 That will at least work. */
5138 find_reloads_address_part (ad
, loc
,
5139 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5140 GET_MODE (ad
), opnum
, type
, ind_levels
);
5142 return ! removed_and
;
5145 /* If we have an indexed stack slot, there are three possible reasons why
5146 it might be invalid: The index might need to be reloaded, the address
5147 might have been made by frame pointer elimination and hence have a
5148 constant out of range, or both reasons might apply.
5150 We can easily check for an index needing reload, but even if that is the
5151 case, we might also have an invalid constant. To avoid making the
5152 conservative assumption and requiring two reloads, we see if this address
5153 is valid when not interpreted strictly. If it is, the only problem is
5154 that the index needs a reload and find_reloads_address_1 will take care
5157 Handle all base registers here, not just fp/ap/sp, because on some
5158 targets (namely SPARC) we can also get invalid addresses from preventive
5159 subreg big-endian corrections made by find_reloads_toplev. We
5160 can also get expressions involving LO_SUM (rather than PLUS) from
5161 find_reloads_subreg_address.
5163 If we decide to do something, it must be that `double_reg_address_ok'
5164 is true. We generate a reload of the base register + constant and
5165 rework the sum so that the reload register will be added to the index.
5166 This is safe because we know the address isn't shared.
5168 We check for the base register as both the first and second operand of
5169 the innermost PLUS and/or LO_SUM. */
5171 for (op_index
= 0; op_index
< 2; ++op_index
)
5173 rtx operand
, addend
;
5174 enum rtx_code inner_code
;
5176 if (GET_CODE (ad
) != PLUS
)
5179 inner_code
= GET_CODE (XEXP (ad
, 0));
5180 if (!(GET_CODE (ad
) == PLUS
5181 && CONST_INT_P (XEXP (ad
, 1))
5182 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5185 operand
= XEXP (XEXP (ad
, 0), op_index
);
5186 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5189 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5191 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5193 || operand
== frame_pointer_rtx
5194 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5195 || operand
== hard_frame_pointer_rtx
5197 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5198 || operand
== arg_pointer_rtx
5200 || operand
== stack_pointer_rtx
)
5201 && ! maybe_memory_address_addr_space_p
5202 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5207 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5208 INTVAL (XEXP (ad
, 1)));
5210 /* Form the adjusted address. */
5211 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5212 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5213 op_index
== 0 ? offset_reg
: addend
,
5214 op_index
== 0 ? addend
: offset_reg
);
5216 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5217 op_index
== 0 ? offset_reg
: addend
,
5218 op_index
== 0 ? addend
: offset_reg
);
5221 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5222 find_reloads_address_part (XEXP (ad
, op_index
),
5223 &XEXP (ad
, op_index
), cls
,
5224 GET_MODE (ad
), opnum
, type
, ind_levels
);
5225 find_reloads_address_1 (mode
, as
,
5226 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5227 GET_CODE (XEXP (ad
, op_index
)),
5228 &XEXP (ad
, 1 - op_index
), opnum
,
5235 /* See if address becomes valid when an eliminable register
5236 in a sum is replaced. */
5239 if (GET_CODE (ad
) == PLUS
)
5240 tem
= subst_indexed_address (ad
);
5241 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5243 /* Ok, we win that way. Replace any additional eliminable
5246 subst_reg_equivs_changed
= 0;
5247 tem
= subst_reg_equivs (tem
, insn
);
5249 /* Make sure that didn't make the address invalid again. */
5251 if (! subst_reg_equivs_changed
5252 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5259 /* If constants aren't valid addresses, reload the constant address
5261 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5263 machine_mode address_mode
= GET_MODE (ad
);
5264 if (address_mode
== VOIDmode
)
5265 address_mode
= targetm
.addr_space
.address_mode (as
);
5267 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5268 Unshare it so we can safely alter it. */
5269 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5270 && CONSTANT_POOL_ADDRESS_P (ad
))
5272 *memrefloc
= copy_rtx (*memrefloc
);
5273 loc
= &XEXP (*memrefloc
, 0);
5275 loc
= &XEXP (*loc
, 0);
5278 find_reloads_address_part (ad
, loc
,
5279 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5280 address_mode
, opnum
, type
, ind_levels
);
5281 return ! removed_and
;
5284 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5285 opnum
, type
, ind_levels
, insn
);
5288 /* Find all pseudo regs appearing in AD
5289 that are eliminable in favor of equivalent values
5290 and do not have hard regs; replace them by their equivalents.
5291 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5292 front of it for pseudos that we have to replace with stack slots. */
5295 subst_reg_equivs (rtx ad
, rtx_insn
*insn
)
5297 RTX_CODE code
= GET_CODE (ad
);
5314 int regno
= REGNO (ad
);
5316 if (reg_equiv_constant (regno
) != 0)
5318 subst_reg_equivs_changed
= 1;
5319 return reg_equiv_constant (regno
);
5321 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5323 rtx mem
= make_memloc (ad
, regno
);
5324 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5326 subst_reg_equivs_changed
= 1;
5327 /* We mark the USE with QImode so that we recognize it
5328 as one that can be safely deleted at the end of
5330 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5339 /* Quickly dispose of a common case. */
5340 if (XEXP (ad
, 0) == frame_pointer_rtx
5341 && CONST_INT_P (XEXP (ad
, 1)))
5349 fmt
= GET_RTX_FORMAT (code
);
5350 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5352 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5356 /* Compute the sum of X and Y, making canonicalizations assumed in an
5357 address, namely: sum constant integers, surround the sum of two
5358 constants with a CONST, put the constant as the second operand, and
5359 group the constant on the outermost sum.
5361 This routine assumes both inputs are already in canonical form. */
5364 form_sum (machine_mode mode
, rtx x
, rtx y
)
5368 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5369 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5371 if (CONST_INT_P (x
))
5372 return plus_constant (mode
, y
, INTVAL (x
));
5373 else if (CONST_INT_P (y
))
5374 return plus_constant (mode
, x
, INTVAL (y
));
5375 else if (CONSTANT_P (x
))
5376 tem
= x
, x
= y
, y
= tem
;
5378 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5379 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5381 /* Note that if the operands of Y are specified in the opposite
5382 order in the recursive calls below, infinite recursion will occur. */
5383 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5384 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5386 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5387 constant will have been placed second. */
5388 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5390 if (GET_CODE (x
) == CONST
)
5392 if (GET_CODE (y
) == CONST
)
5395 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5398 return gen_rtx_PLUS (mode
, x
, y
);
5401 /* If ADDR is a sum containing a pseudo register that should be
5402 replaced with a constant (from reg_equiv_constant),
5403 return the result of doing so, and also apply the associative
5404 law so that the result is more likely to be a valid address.
5405 (But it is not guaranteed to be one.)
5407 Note that at most one register is replaced, even if more are
5408 replaceable. Also, we try to put the result into a canonical form
5409 so it is more likely to be a valid address.
5411 In all other cases, return ADDR. */
5414 subst_indexed_address (rtx addr
)
5416 rtx op0
= 0, op1
= 0, op2
= 0;
5420 if (GET_CODE (addr
) == PLUS
)
5422 /* Try to find a register to replace. */
5423 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5425 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5426 && reg_renumber
[regno
] < 0
5427 && reg_equiv_constant (regno
) != 0)
5428 op0
= reg_equiv_constant (regno
);
5429 else if (REG_P (op1
)
5430 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5431 && reg_renumber
[regno
] < 0
5432 && reg_equiv_constant (regno
) != 0)
5433 op1
= reg_equiv_constant (regno
);
5434 else if (GET_CODE (op0
) == PLUS
5435 && (tem
= subst_indexed_address (op0
)) != op0
)
5437 else if (GET_CODE (op1
) == PLUS
5438 && (tem
= subst_indexed_address (op1
)) != op1
)
5443 /* Pick out up to three things to add. */
5444 if (GET_CODE (op1
) == PLUS
)
5445 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5446 else if (GET_CODE (op0
) == PLUS
)
5447 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5449 /* Compute the sum. */
5451 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5453 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5460 /* Update the REG_INC notes for an insn. It updates all REG_INC
5461 notes for the instruction which refer to REGNO the to refer
5462 to the reload number.
5464 INSN is the insn for which any REG_INC notes need updating.
5466 REGNO is the register number which has been reloaded.
5468 RELOADNUM is the reload number. */
5471 update_auto_inc_notes (rtx_insn
*insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5472 int reloadnum ATTRIBUTE_UNUSED
)
5477 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5478 if (REG_NOTE_KIND (link
) == REG_INC
5479 && (int) REGNO (XEXP (link
, 0)) == regno
)
5480 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5484 /* Record the pseudo registers we must reload into hard registers in a
5485 subexpression of a would-be memory address, X referring to a value
5486 in mode MODE. (This function is not called if the address we find
5489 CONTEXT = 1 means we are considering regs as index regs,
5490 = 0 means we are considering them as base regs.
5491 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5493 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5494 is the code of the index part of the address. Otherwise, pass SCRATCH
5496 OPNUM and TYPE specify the purpose of any reloads made.
5498 IND_LEVELS says how many levels of indirect addressing are
5499 supported at this point in the address.
5501 INSN, if nonzero, is the insn in which we do the reload. It is used
5502 to determine if we may generate output reloads.
5504 We return nonzero if X, as a whole, is reloaded or replaced. */
5506 /* Note that we take shortcuts assuming that no multi-reg machine mode
5507 occurs as part of an address.
5508 Also, this is not fully machine-customizable; it works for machines
5509 such as VAXen and 68000's and 32000's, but other possible machines
5510 could have addressing modes that this does not handle right.
5511 If you add push_reload calls here, you need to make sure gen_reload
5512 handles those cases gracefully. */
5515 find_reloads_address_1 (machine_mode mode
, addr_space_t as
,
5517 enum rtx_code outer_code
, enum rtx_code index_code
,
5518 rtx
*loc
, int opnum
, enum reload_type type
,
5519 int ind_levels
, rtx_insn
*insn
)
5521 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5523 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5524 : REGNO_OK_FOR_INDEX_P (REGNO))
5526 enum reg_class context_reg_class
;
5527 RTX_CODE code
= GET_CODE (x
);
5528 bool reloaded_inner_of_autoinc
= false;
5531 context_reg_class
= INDEX_REG_CLASS
;
5533 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5539 rtx orig_op0
= XEXP (x
, 0);
5540 rtx orig_op1
= XEXP (x
, 1);
5541 RTX_CODE code0
= GET_CODE (orig_op0
);
5542 RTX_CODE code1
= GET_CODE (orig_op1
);
5546 if (GET_CODE (op0
) == SUBREG
)
5548 op0
= SUBREG_REG (op0
);
5549 code0
= GET_CODE (op0
);
5550 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5551 op0
= gen_rtx_REG (word_mode
,
5553 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5554 GET_MODE (SUBREG_REG (orig_op0
)),
5555 SUBREG_BYTE (orig_op0
),
5556 GET_MODE (orig_op0
))));
5559 if (GET_CODE (op1
) == SUBREG
)
5561 op1
= SUBREG_REG (op1
);
5562 code1
= GET_CODE (op1
);
5563 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5564 /* ??? Why is this given op1's mode and above for
5565 ??? op0 SUBREGs we use word_mode? */
5566 op1
= gen_rtx_REG (GET_MODE (op1
),
5568 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5569 GET_MODE (SUBREG_REG (orig_op1
)),
5570 SUBREG_BYTE (orig_op1
),
5571 GET_MODE (orig_op1
))));
5573 /* Plus in the index register may be created only as a result of
5574 register rematerialization for expression like &localvar*4. Reload it.
5575 It may be possible to combine the displacement on the outer level,
5576 but it is probably not worthwhile to do so. */
5579 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5580 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5581 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5583 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5587 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5588 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5590 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5591 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5593 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5594 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5598 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5599 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5601 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5602 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5604 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5605 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5609 else if (code0
== CONST_INT
|| code0
== CONST
5610 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5611 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5612 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5615 else if (code1
== CONST_INT
|| code1
== CONST
5616 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5617 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5618 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5621 else if (code0
== REG
&& code1
== REG
)
5623 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5624 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5626 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5627 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5629 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5630 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5631 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5633 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5634 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5635 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5637 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5638 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5639 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5641 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5642 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5643 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5647 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5648 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5650 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5651 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5656 else if (code0
== REG
)
5658 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5659 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5661 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5662 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5666 else if (code1
== REG
)
5668 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5669 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5671 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5672 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5682 rtx op0
= XEXP (x
, 0);
5683 rtx op1
= XEXP (x
, 1);
5684 enum rtx_code index_code
;
5688 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5691 /* Currently, we only support {PRE,POST}_MODIFY constructs
5692 where a base register is {inc,dec}remented by the contents
5693 of another register or by a constant value. Thus, these
5694 operands must match. */
5695 gcc_assert (op0
== XEXP (op1
, 0));
5697 /* Require index register (or constant). Let's just handle the
5698 register case in the meantime... If the target allows
5699 auto-modify by a constant then we could try replacing a pseudo
5700 register with its equivalent constant where applicable.
5702 We also handle the case where the register was eliminated
5703 resulting in a PLUS subexpression.
5705 If we later decide to reload the whole PRE_MODIFY or
5706 POST_MODIFY, inc_for_reload might clobber the reload register
5707 before reading the index. The index register might therefore
5708 need to live longer than a TYPE reload normally would, so be
5709 conservative and class it as RELOAD_OTHER. */
5710 if ((REG_P (XEXP (op1
, 1))
5711 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5712 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5713 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5714 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5717 gcc_assert (REG_P (XEXP (op1
, 0)));
5719 regno
= REGNO (XEXP (op1
, 0));
5720 index_code
= GET_CODE (XEXP (op1
, 1));
5722 /* A register that is incremented cannot be constant! */
5723 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5724 || reg_equiv_constant (regno
) == 0);
5726 /* Handle a register that is equivalent to a memory location
5727 which cannot be addressed directly. */
5728 if (reg_equiv_memory_loc (regno
) != 0
5729 && (reg_equiv_address (regno
) != 0
5730 || num_not_at_initial_offset
))
5732 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5734 if (reg_equiv_address (regno
)
5735 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5739 /* First reload the memory location's address.
5740 We can't use ADDR_TYPE (type) here, because we need to
5741 write back the value after reading it, hence we actually
5742 need two registers. */
5743 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5744 &XEXP (tem
, 0), opnum
,
5748 if (!rtx_equal_p (tem
, orig
))
5749 push_reg_equiv_alt_mem (regno
, tem
);
5751 /* Then reload the memory location into a base
5753 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5755 base_reg_class (mode
, as
,
5757 GET_MODE (x
), GET_MODE (x
), 0,
5758 0, opnum
, RELOAD_OTHER
);
5760 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5765 if (reg_renumber
[regno
] >= 0)
5766 regno
= reg_renumber
[regno
];
5768 /* We require a base register here... */
5769 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5771 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5772 &XEXP (op1
, 0), &XEXP (x
, 0),
5773 base_reg_class (mode
, as
,
5775 GET_MODE (x
), GET_MODE (x
), 0, 0,
5776 opnum
, RELOAD_OTHER
);
5778 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5788 if (REG_P (XEXP (x
, 0)))
5790 int regno
= REGNO (XEXP (x
, 0));
5794 /* A register that is incremented cannot be constant! */
5795 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5796 || reg_equiv_constant (regno
) == 0);
5798 /* Handle a register that is equivalent to a memory location
5799 which cannot be addressed directly. */
5800 if (reg_equiv_memory_loc (regno
) != 0
5801 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5803 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5804 if (reg_equiv_address (regno
)
5805 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5809 /* First reload the memory location's address.
5810 We can't use ADDR_TYPE (type) here, because we need to
5811 write back the value after reading it, hence we actually
5812 need two registers. */
5813 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5814 &XEXP (tem
, 0), opnum
, type
,
5816 reloaded_inner_of_autoinc
= true;
5817 if (!rtx_equal_p (tem
, orig
))
5818 push_reg_equiv_alt_mem (regno
, tem
);
5819 /* Put this inside a new increment-expression. */
5820 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5821 /* Proceed to reload that, as if it contained a register. */
5825 /* If we have a hard register that is ok in this incdec context,
5826 don't make a reload. If the register isn't nice enough for
5827 autoincdec, we can reload it. But, if an autoincrement of a
5828 register that we here verified as playing nice, still outside
5829 isn't "valid", it must be that no autoincrement is "valid".
5830 If that is true and something made an autoincrement anyway,
5831 this must be a special context where one is allowed.
5832 (For example, a "push" instruction.)
5833 We can't improve this address, so leave it alone. */
5835 /* Otherwise, reload the autoincrement into a suitable hard reg
5836 and record how much to increment by. */
5838 if (reg_renumber
[regno
] >= 0)
5839 regno
= reg_renumber
[regno
];
5840 if (regno
>= FIRST_PSEUDO_REGISTER
5841 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5846 /* If we can output the register afterwards, do so, this
5847 saves the extra update.
5848 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5849 CALL_INSN - and it does not set CC0.
5850 But don't do this if we cannot directly address the
5851 memory location, since this will make it harder to
5852 reuse address reloads, and increases register pressure.
5853 Also don't do this if we can probably update x directly. */
5854 rtx equiv
= (MEM_P (XEXP (x
, 0))
5856 : reg_equiv_mem (regno
));
5857 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5858 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5859 && memory_operand (equiv
, GET_MODE (equiv
))
5861 && ! sets_cc0_p (PATTERN (insn
))
5863 && ! (icode
!= CODE_FOR_nothing
5864 && insn_operand_matches (icode
, 0, equiv
)
5865 && insn_operand_matches (icode
, 1, equiv
))
5866 /* Using RELOAD_OTHER means we emit this and the reload we
5867 made earlier in the wrong order. */
5868 && !reloaded_inner_of_autoinc
)
5870 /* We use the original pseudo for loc, so that
5871 emit_reload_insns() knows which pseudo this
5872 reload refers to and updates the pseudo rtx, not
5873 its equivalent memory location, as well as the
5874 corresponding entry in reg_last_reload_reg. */
5875 loc
= &XEXP (x_orig
, 0);
5878 = push_reload (x
, x
, loc
, loc
,
5880 GET_MODE (x
), GET_MODE (x
), 0, 0,
5881 opnum
, RELOAD_OTHER
);
5886 = push_reload (x
, x
, loc
, (rtx
*) 0,
5888 GET_MODE (x
), GET_MODE (x
), 0, 0,
5891 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5896 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5906 /* Look for parts to reload in the inner expression and reload them
5907 too, in addition to this operation. Reloading all inner parts in
5908 addition to this one shouldn't be necessary, but at this point,
5909 we don't know if we can possibly omit any part that *can* be
5910 reloaded. Targets that are better off reloading just either part
5911 (or perhaps even a different part of an outer expression), should
5912 define LEGITIMIZE_RELOAD_ADDRESS. */
5913 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5914 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5915 type
, ind_levels
, insn
);
5916 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5918 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5922 /* This is probably the result of a substitution, by eliminate_regs, of
5923 an equivalent address for a pseudo that was not allocated to a hard
5924 register. Verify that the specified address is valid and reload it
5927 Since we know we are going to reload this item, don't decrement for
5928 the indirection level.
5930 Note that this is actually conservative: it would be slightly more
5931 efficient to use the value of SPILL_INDIRECT_LEVELS from
5934 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5935 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5936 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5938 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5943 int regno
= REGNO (x
);
5945 if (reg_equiv_constant (regno
) != 0)
5947 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5949 GET_MODE (x
), opnum
, type
, ind_levels
);
5953 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5954 that feeds this insn. */
5955 if (reg_equiv_mem (regno
) != 0)
5957 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5959 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5964 if (reg_equiv_memory_loc (regno
)
5965 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5967 rtx tem
= make_memloc (x
, regno
);
5968 if (reg_equiv_address (regno
) != 0
5969 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5972 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5973 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5975 if (!rtx_equal_p (x
, tem
))
5976 push_reg_equiv_alt_mem (regno
, x
);
5980 if (reg_renumber
[regno
] >= 0)
5981 regno
= reg_renumber
[regno
];
5983 if (regno
>= FIRST_PSEUDO_REGISTER
5984 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5987 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5989 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5993 /* If a register appearing in an address is the subject of a CLOBBER
5994 in this insn, reload it into some other register to be safe.
5995 The CLOBBER is supposed to make the register unavailable
5996 from before this insn to after it. */
5997 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5999 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6001 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6008 if (REG_P (SUBREG_REG (x
)))
6010 /* If this is a SUBREG of a hard register and the resulting register
6011 is of the wrong class, reload the whole SUBREG. This avoids
6012 needless copies if SUBREG_REG is multi-word. */
6013 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6015 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
6017 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
6020 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6022 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6026 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6027 is larger than the class size, then reload the whole SUBREG. */
6030 enum reg_class rclass
= context_reg_class
;
6031 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6032 > reg_class_size
[(int) rclass
])
6034 /* If the inner register will be replaced by a memory
6035 reference, we can do this only if we can replace the
6036 whole subreg by a (narrower) memory reference. If
6037 this is not possible, fall through and reload just
6038 the inner register (including address reloads). */
6039 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6041 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6047 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6048 GET_MODE (tem
), VOIDmode
, 0, 0,
6055 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6056 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6069 const char *fmt
= GET_RTX_FORMAT (code
);
6072 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6075 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6077 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6078 code
, SCRATCH
, &XEXP (x
, i
),
6079 opnum
, type
, ind_levels
, insn
);
6083 #undef REG_OK_FOR_CONTEXT
6087 /* X, which is found at *LOC, is a part of an address that needs to be
6088 reloaded into a register of class RCLASS. If X is a constant, or if
6089 X is a PLUS that contains a constant, check that the constant is a
6090 legitimate operand and that we are supposed to be able to load
6091 it into the register.
6093 If not, force the constant into memory and reload the MEM instead.
6095 MODE is the mode to use, in case X is an integer constant.
6097 OPNUM and TYPE describe the purpose of any reloads made.
6099 IND_LEVELS says how many levels of indirect addressing this machine
6103 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6104 machine_mode mode
, int opnum
,
6105 enum reload_type type
, int ind_levels
)
6108 && (!targetm
.legitimate_constant_p (mode
, x
)
6109 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6111 x
= force_const_mem (mode
, x
);
6112 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6113 opnum
, type
, ind_levels
, 0);
6116 else if (GET_CODE (x
) == PLUS
6117 && CONSTANT_P (XEXP (x
, 1))
6118 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6119 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6124 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6125 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6126 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6127 opnum
, type
, ind_levels
, 0);
6130 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6131 mode
, VOIDmode
, 0, 0, opnum
, type
);
6134 /* X, a subreg of a pseudo, is a part of an address that needs to be
6135 reloaded, and the pseusdo is equivalent to a memory location.
6137 Attempt to replace the whole subreg by a (possibly narrower or wider)
6138 memory reference. If this is possible, return this new memory
6139 reference, and push all required address reloads. Otherwise,
6142 OPNUM and TYPE identify the purpose of the reload.
6144 IND_LEVELS says how many levels of indirect addressing are
6145 supported at this point in the address.
6147 INSN, if nonzero, is the insn in which we do the reload. It is used
6148 to determine where to put USEs for pseudos that we have to replace with
6152 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6153 int ind_levels
, rtx_insn
*insn
,
6154 int *address_reloaded
)
6156 machine_mode outer_mode
= GET_MODE (x
);
6157 machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6158 int regno
= REGNO (SUBREG_REG (x
));
6163 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6165 /* We cannot replace the subreg with a modified memory reference if:
6167 - we have a paradoxical subreg that implicitly acts as a zero or
6168 sign extension operation due to LOAD_EXTEND_OP;
6170 - we have a subreg that is implicitly supposed to act on the full
6171 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6173 - the address of the equivalent memory location is mode-dependent; or
6175 - we have a paradoxical subreg and the resulting memory is not
6176 sufficiently aligned to allow access in the wider mode.
6178 In addition, we choose not to perform the replacement for *any*
6179 paradoxical subreg, even if it were possible in principle. This
6180 is to avoid generating wider memory references than necessary.
6182 This corresponds to how previous versions of reload used to handle
6183 paradoxical subregs where no address reload was required. */
6185 if (paradoxical_subreg_p (x
))
6188 #ifdef WORD_REGISTER_OPERATIONS
6189 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
)
6190 && ((GET_MODE_SIZE (outer_mode
) - 1) / UNITS_PER_WORD
6191 == (GET_MODE_SIZE (inner_mode
) - 1) / UNITS_PER_WORD
))
6195 /* Since we don't attempt to handle paradoxical subregs, we can just
6196 call into simplify_subreg, which will handle all remaining checks
6198 orig
= make_memloc (SUBREG_REG (x
), regno
);
6199 offset
= SUBREG_BYTE (x
);
6200 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6201 if (!tem
|| !MEM_P (tem
))
6204 /* Now push all required address reloads, if any. */
6205 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6206 XEXP (tem
, 0), &XEXP (tem
, 0),
6207 opnum
, type
, ind_levels
, insn
);
6208 /* ??? Do we need to handle nonzero offsets somehow? */
6209 if (!offset
&& !rtx_equal_p (tem
, orig
))
6210 push_reg_equiv_alt_mem (regno
, tem
);
6212 /* For some processors an address may be valid in the original mode but
6213 not in a smaller mode. For example, ARM accepts a scaled index register
6214 in SImode but not in HImode. Note that this is only a problem if the
6215 address in reg_equiv_mem is already invalid in the new mode; other
6216 cases would be fixed by find_reloads_address as usual.
6218 ??? We attempt to handle such cases here by doing an additional reload
6219 of the full address after the usual processing by find_reloads_address.
6220 Note that this may not work in the general case, but it seems to cover
6221 the cases where this situation currently occurs. A more general fix
6222 might be to reload the *value* instead of the address, but this would
6223 not be expected by the callers of this routine as-is.
6225 If find_reloads_address already completed replaced the address, there
6226 is nothing further to do. */
6228 && reg_equiv_mem (regno
) != 0
6229 && !strict_memory_address_addr_space_p
6230 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6231 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6233 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6234 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6236 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6240 /* If this is not a toplevel operand, find_reloads doesn't see this
6241 substitution. We have to emit a USE of the pseudo so that
6242 delete_output_reload can see it. */
6243 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6244 /* We mark the USE with QImode so that we recognize it as one that
6245 can be safely deleted at the end of reload. */
6246 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6249 if (address_reloaded
)
6250 *address_reloaded
= reloaded
;
6255 /* Substitute into the current INSN the registers into which we have reloaded
6256 the things that need reloading. The array `replacements'
6257 contains the locations of all pointers that must be changed
6258 and says what to replace them with.
6260 Return the rtx that X translates into; usually X, but modified. */
6263 subst_reloads (rtx_insn
*insn
)
6267 for (i
= 0; i
< n_replacements
; i
++)
6269 struct replacement
*r
= &replacements
[i
];
6270 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6274 /* This checking takes a very long time on some platforms
6275 causing the gcc.c-torture/compile/limits-fnargs.c test
6276 to time out during testing. See PR 31850.
6278 Internal consistency test. Check that we don't modify
6279 anything in the equivalence arrays. Whenever something from
6280 those arrays needs to be reloaded, it must be unshared before
6281 being substituted into; the equivalence must not be modified.
6282 Otherwise, if the equivalence is used after that, it will
6283 have been modified, and the thing substituted (probably a
6284 register) is likely overwritten and not a usable equivalence. */
6287 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6289 #define CHECK_MODF(ARRAY) \
6290 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6291 || !loc_mentioned_in_p (r->where, \
6292 (*reg_equivs)[check_regno].ARRAY))
6294 CHECK_MODF (constant
);
6295 CHECK_MODF (memory_loc
);
6296 CHECK_MODF (address
);
6300 #endif /* DEBUG_RELOAD */
6302 /* If we're replacing a LABEL_REF with a register, there must
6303 already be an indication (to e.g. flow) which label this
6304 register refers to. */
6305 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6307 || find_reg_note (insn
,
6309 XEXP (*r
->where
, 0))
6310 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6312 /* Encapsulate RELOADREG so its machine mode matches what
6313 used to be there. Note that gen_lowpart_common will
6314 do the wrong thing if RELOADREG is multi-word. RELOADREG
6315 will always be a REG here. */
6316 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6317 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6319 *r
->where
= reloadreg
;
6321 /* If reload got no reg and isn't optional, something's wrong. */
6323 gcc_assert (rld
[r
->what
].optional
);
6327 /* Make a copy of any replacements being done into X and move those
6328 copies to locations in Y, a copy of X. */
6331 copy_replacements (rtx x
, rtx y
)
6333 copy_replacements_1 (&x
, &y
, n_replacements
);
6337 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6341 struct replacement
*r
;
6345 for (j
= 0; j
< orig_replacements
; j
++)
6346 if (replacements
[j
].where
== px
)
6348 r
= &replacements
[n_replacements
++];
6350 r
->what
= replacements
[j
].what
;
6351 r
->mode
= replacements
[j
].mode
;
6356 code
= GET_CODE (x
);
6357 fmt
= GET_RTX_FORMAT (code
);
6359 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6362 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6363 else if (fmt
[i
] == 'E')
6364 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6365 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6370 /* Change any replacements being done to *X to be done to *Y. */
6373 move_replacements (rtx
*x
, rtx
*y
)
6377 for (i
= 0; i
< n_replacements
; i
++)
6378 if (replacements
[i
].where
== x
)
6379 replacements
[i
].where
= y
;
6382 /* If LOC was scheduled to be replaced by something, return the replacement.
6383 Otherwise, return *LOC. */
6386 find_replacement (rtx
*loc
)
6388 struct replacement
*r
;
6390 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6392 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6394 if (reloadreg
&& r
->where
== loc
)
6396 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6397 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6401 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6402 && r
->where
== &SUBREG_REG (*loc
))
6404 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6405 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6407 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6408 GET_MODE (SUBREG_REG (*loc
)),
6409 SUBREG_BYTE (*loc
));
6413 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6414 what's inside and make a new rtl if so. */
6415 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6416 || GET_CODE (*loc
) == MULT
)
6418 rtx x
= find_replacement (&XEXP (*loc
, 0));
6419 rtx y
= find_replacement (&XEXP (*loc
, 1));
6421 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6422 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6428 /* Return nonzero if register in range [REGNO, ENDREGNO)
6429 appears either explicitly or implicitly in X
6430 other than being stored into (except for earlyclobber operands).
6432 References contained within the substructure at LOC do not count.
6433 LOC may be zero, meaning don't ignore anything.
6435 This is similar to refers_to_regno_p in rtlanal.c except that we
6436 look at equivalences for pseudos that didn't get hard registers. */
6439 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6451 code
= GET_CODE (x
);
6458 /* If this is a pseudo, a hard register must not have been allocated.
6459 X must therefore either be a constant or be in memory. */
6460 if (r
>= FIRST_PSEUDO_REGISTER
)
6462 if (reg_equiv_memory_loc (r
))
6463 return refers_to_regno_for_reload_p (regno
, endregno
,
6464 reg_equiv_memory_loc (r
),
6467 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6471 return (endregno
> r
6472 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6473 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6477 /* If this is a SUBREG of a hard reg, we can see exactly which
6478 registers are being modified. Otherwise, handle normally. */
6479 if (REG_P (SUBREG_REG (x
))
6480 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6482 unsigned int inner_regno
= subreg_regno (x
);
6483 unsigned int inner_endregno
6484 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6485 ? subreg_nregs (x
) : 1);
6487 return endregno
> inner_regno
&& regno
< inner_endregno
;
6493 if (&SET_DEST (x
) != loc
6494 /* Note setting a SUBREG counts as referring to the REG it is in for
6495 a pseudo but not for hard registers since we can
6496 treat each word individually. */
6497 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6498 && loc
!= &SUBREG_REG (SET_DEST (x
))
6499 && REG_P (SUBREG_REG (SET_DEST (x
)))
6500 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6501 && refers_to_regno_for_reload_p (regno
, endregno
,
6502 SUBREG_REG (SET_DEST (x
)),
6504 /* If the output is an earlyclobber operand, this is
6506 || ((!REG_P (SET_DEST (x
))
6507 || earlyclobber_operand_p (SET_DEST (x
)))
6508 && refers_to_regno_for_reload_p (regno
, endregno
,
6509 SET_DEST (x
), loc
))))
6512 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6521 /* X does not match, so try its subexpressions. */
6523 fmt
= GET_RTX_FORMAT (code
);
6524 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6526 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6534 if (refers_to_regno_for_reload_p (regno
, endregno
,
6538 else if (fmt
[i
] == 'E')
6541 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6542 if (loc
!= &XVECEXP (x
, i
, j
)
6543 && refers_to_regno_for_reload_p (regno
, endregno
,
6544 XVECEXP (x
, i
, j
), loc
))
6551 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6552 we check if any register number in X conflicts with the relevant register
6553 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6554 contains a MEM (we don't bother checking for memory addresses that can't
6555 conflict because we expect this to be a rare case.
6557 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6558 that we look at equivalences for pseudos that didn't get hard registers. */
6561 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6563 int regno
, endregno
;
6565 /* Overly conservative. */
6566 if (GET_CODE (x
) == STRICT_LOW_PART
6567 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6570 /* If either argument is a constant, then modifying X can not affect IN. */
6571 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6573 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6574 return refers_to_mem_for_reload_p (in
);
6575 else if (GET_CODE (x
) == SUBREG
)
6577 regno
= REGNO (SUBREG_REG (x
));
6578 if (regno
< FIRST_PSEUDO_REGISTER
)
6579 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6580 GET_MODE (SUBREG_REG (x
)),
6583 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6584 ? subreg_nregs (x
) : 1);
6586 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6592 /* If this is a pseudo, it must not have been assigned a hard register.
6593 Therefore, it must either be in memory or be a constant. */
6595 if (regno
>= FIRST_PSEUDO_REGISTER
)
6597 if (reg_equiv_memory_loc (regno
))
6598 return refers_to_mem_for_reload_p (in
);
6599 gcc_assert (reg_equiv_constant (regno
));
6603 endregno
= END_HARD_REGNO (x
);
6605 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6608 return refers_to_mem_for_reload_p (in
);
6609 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6610 || GET_CODE (x
) == CC0
)
6611 return reg_mentioned_p (x
, in
);
6614 gcc_assert (GET_CODE (x
) == PLUS
);
6616 /* We actually want to know if X is mentioned somewhere inside IN.
6617 We must not say that (plus (sp) (const_int 124)) is in
6618 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6619 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6620 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6625 else if (GET_CODE (in
) == PLUS
)
6626 return (rtx_equal_p (x
, in
)
6627 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6628 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6629 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6630 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6636 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6640 refers_to_mem_for_reload_p (rtx x
)
6649 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6650 && reg_equiv_memory_loc (REGNO (x
)));
6652 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6653 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6655 && (MEM_P (XEXP (x
, i
))
6656 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6662 /* Check the insns before INSN to see if there is a suitable register
6663 containing the same value as GOAL.
6664 If OTHER is -1, look for a register in class RCLASS.
6665 Otherwise, just see if register number OTHER shares GOAL's value.
6667 Return an rtx for the register found, or zero if none is found.
6669 If RELOAD_REG_P is (short *)1,
6670 we reject any hard reg that appears in reload_reg_rtx
6671 because such a hard reg is also needed coming into this insn.
6673 If RELOAD_REG_P is any other nonzero value,
6674 it is a vector indexed by hard reg number
6675 and we reject any hard reg whose element in the vector is nonnegative
6676 as well as any that appears in reload_reg_rtx.
6678 If GOAL is zero, then GOALREG is a register number; we look
6679 for an equivalent for that register.
6681 MODE is the machine mode of the value we want an equivalence for.
6682 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6684 This function is used by jump.c as well as in the reload pass.
6686 If GOAL is the sum of the stack pointer and a constant, we treat it
6687 as if it were a constant except that sp is required to be unchanging. */
6690 find_equiv_reg (rtx goal
, rtx_insn
*insn
, enum reg_class rclass
, int other
,
6691 short *reload_reg_p
, int goalreg
, machine_mode mode
)
6694 rtx goaltry
, valtry
, value
;
6701 int goal_mem_addr_varies
= 0;
6702 int need_stable_sp
= 0;
6709 else if (REG_P (goal
))
6710 regno
= REGNO (goal
);
6711 else if (MEM_P (goal
))
6713 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6714 if (MEM_VOLATILE_P (goal
))
6716 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6718 /* An address with side effects must be reexecuted. */
6733 else if (CONSTANT_P (goal
))
6735 else if (GET_CODE (goal
) == PLUS
6736 && XEXP (goal
, 0) == stack_pointer_rtx
6737 && CONSTANT_P (XEXP (goal
, 1)))
6738 goal_const
= need_stable_sp
= 1;
6739 else if (GET_CODE (goal
) == PLUS
6740 && XEXP (goal
, 0) == frame_pointer_rtx
6741 && CONSTANT_P (XEXP (goal
, 1)))
6747 /* Scan insns back from INSN, looking for one that copies
6748 a value into or out of GOAL.
6749 Stop and give up if we reach a label. */
6754 if (p
&& DEBUG_INSN_P (p
))
6757 if (p
== 0 || LABEL_P (p
)
6758 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6761 /* Don't reuse register contents from before a setjmp-type
6762 function call; on the second return (from the longjmp) it
6763 might have been clobbered by a later reuse. It doesn't
6764 seem worthwhile to actually go and see if it is actually
6765 reused even if that information would be readily available;
6766 just don't reuse it across the setjmp call. */
6767 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6770 if (NONJUMP_INSN_P (p
)
6771 /* If we don't want spill regs ... */
6772 && (! (reload_reg_p
!= 0
6773 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6774 /* ... then ignore insns introduced by reload; they aren't
6775 useful and can cause results in reload_as_needed to be
6776 different from what they were when calculating the need for
6777 spills. If we notice an input-reload insn here, we will
6778 reject it below, but it might hide a usable equivalent.
6779 That makes bad code. It may even fail: perhaps no reg was
6780 spilled for this insn because it was assumed we would find
6782 || INSN_UID (p
) < reload_first_uid
))
6785 pat
= single_set (p
);
6787 /* First check for something that sets some reg equal to GOAL. */
6790 && true_regnum (SET_SRC (pat
)) == regno
6791 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6794 && true_regnum (SET_DEST (pat
)) == regno
6795 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6797 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6798 /* When looking for stack pointer + const,
6799 make sure we don't use a stack adjust. */
6800 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6801 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6803 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6804 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6806 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6807 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6808 /* If we are looking for a constant,
6809 and something equivalent to that constant was copied
6810 into a reg, we can use that reg. */
6811 || (goal_const
&& REG_NOTES (p
) != 0
6812 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6813 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6815 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6816 || (REG_P (SET_DEST (pat
))
6817 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6818 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6819 && CONST_INT_P (goal
)
6821 = operand_subword (XEXP (tem
, 0), 0, 0,
6823 && rtx_equal_p (goal
, goaltry
)
6825 = operand_subword (SET_DEST (pat
), 0, 0,
6827 && (valueno
= true_regnum (valtry
)) >= 0)))
6828 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6830 && REG_P (SET_DEST (pat
))
6831 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6832 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6833 && CONST_INT_P (goal
)
6834 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6836 && rtx_equal_p (goal
, goaltry
)
6838 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6839 && (valueno
= true_regnum (valtry
)) >= 0)))
6843 if (valueno
!= other
)
6846 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6848 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6858 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6859 (or copying VALUE into GOAL, if GOAL is also a register).
6860 Now verify that VALUE is really valid. */
6862 /* VALUENO is the register number of VALUE; a hard register. */
6864 /* Don't try to re-use something that is killed in this insn. We want
6865 to be able to trust REG_UNUSED notes. */
6866 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6869 /* If we propose to get the value from the stack pointer or if GOAL is
6870 a MEM based on the stack pointer, we need a stable SP. */
6871 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6872 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6876 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6877 if (GET_MODE (value
) != mode
)
6880 /* Reject VALUE if it was loaded from GOAL
6881 and is also a register that appears in the address of GOAL. */
6883 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6884 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6888 /* Reject registers that overlap GOAL. */
6890 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6891 nregs
= hard_regno_nregs
[regno
][mode
];
6894 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6896 if (!goal_mem
&& !goal_const
6897 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6900 /* Reject VALUE if it is one of the regs reserved for reloads.
6901 Reload1 knows how to reuse them anyway, and it would get
6902 confused if we allocated one without its knowledge.
6903 (Now that insns introduced by reload are ignored above,
6904 this case shouldn't happen, but I'm not positive.) */
6906 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6909 for (i
= 0; i
< valuenregs
; ++i
)
6910 if (reload_reg_p
[valueno
+ i
] >= 0)
6914 /* Reject VALUE if it is a register being used for an input reload
6915 even if it is not one of those reserved. */
6917 if (reload_reg_p
!= 0)
6920 for (i
= 0; i
< n_reloads
; i
++)
6921 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6923 int regno1
= REGNO (rld
[i
].reg_rtx
);
6924 int nregs1
= hard_regno_nregs
[regno1
]
6925 [GET_MODE (rld
[i
].reg_rtx
)];
6926 if (regno1
< valueno
+ valuenregs
6927 && regno1
+ nregs1
> valueno
)
6933 /* We must treat frame pointer as varying here,
6934 since it can vary--in a nonlocal goto as generated by expand_goto. */
6935 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6937 /* Now verify that the values of GOAL and VALUE remain unaltered
6938 until INSN is reached. */
6947 /* Don't trust the conversion past a function call
6948 if either of the two is in a call-clobbered register, or memory. */
6953 if (goal_mem
|| need_stable_sp
)
6956 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6957 for (i
= 0; i
< nregs
; ++i
)
6958 if (call_used_regs
[regno
+ i
]
6959 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
6962 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6963 for (i
= 0; i
< valuenregs
; ++i
)
6964 if (call_used_regs
[valueno
+ i
]
6965 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
6973 /* Watch out for unspec_volatile, and volatile asms. */
6974 if (volatile_insn_p (pat
))
6977 /* If this insn P stores in either GOAL or VALUE, return 0.
6978 If GOAL is a memory ref and this insn writes memory, return 0.
6979 If GOAL is a memory ref and its address is not constant,
6980 and this insn P changes a register used in GOAL, return 0. */
6982 if (GET_CODE (pat
) == COND_EXEC
)
6983 pat
= COND_EXEC_CODE (pat
);
6984 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6986 rtx dest
= SET_DEST (pat
);
6987 while (GET_CODE (dest
) == SUBREG
6988 || GET_CODE (dest
) == ZERO_EXTRACT
6989 || GET_CODE (dest
) == STRICT_LOW_PART
)
6990 dest
= XEXP (dest
, 0);
6993 int xregno
= REGNO (dest
);
6995 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6996 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6999 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
7001 if (xregno
< valueno
+ valuenregs
7002 && xregno
+ xnregs
> valueno
)
7004 if (goal_mem_addr_varies
7005 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
7007 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7010 else if (goal_mem
&& MEM_P (dest
)
7011 && ! push_operand (dest
, GET_MODE (dest
)))
7013 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7014 && reg_equiv_memory_loc (regno
) != 0)
7016 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
7019 else if (GET_CODE (pat
) == PARALLEL
)
7022 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
7024 rtx v1
= XVECEXP (pat
, 0, i
);
7025 if (GET_CODE (v1
) == COND_EXEC
)
7026 v1
= COND_EXEC_CODE (v1
);
7027 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7029 rtx dest
= SET_DEST (v1
);
7030 while (GET_CODE (dest
) == SUBREG
7031 || GET_CODE (dest
) == ZERO_EXTRACT
7032 || GET_CODE (dest
) == STRICT_LOW_PART
)
7033 dest
= XEXP (dest
, 0);
7036 int xregno
= REGNO (dest
);
7038 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7039 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7042 if (xregno
< regno
+ nregs
7043 && xregno
+ xnregs
> regno
)
7045 if (xregno
< valueno
+ valuenregs
7046 && xregno
+ xnregs
> valueno
)
7048 if (goal_mem_addr_varies
7049 && reg_overlap_mentioned_for_reload_p (dest
,
7052 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7055 else if (goal_mem
&& MEM_P (dest
)
7056 && ! push_operand (dest
, GET_MODE (dest
)))
7058 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7059 && reg_equiv_memory_loc (regno
) != 0)
7061 else if (need_stable_sp
7062 && push_operand (dest
, GET_MODE (dest
)))
7068 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7072 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7073 link
= XEXP (link
, 1))
7075 pat
= XEXP (link
, 0);
7076 if (GET_CODE (pat
) == CLOBBER
)
7078 rtx dest
= SET_DEST (pat
);
7082 int xregno
= REGNO (dest
);
7084 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7086 if (xregno
< regno
+ nregs
7087 && xregno
+ xnregs
> regno
)
7089 else if (xregno
< valueno
+ valuenregs
7090 && xregno
+ xnregs
> valueno
)
7092 else if (goal_mem_addr_varies
7093 && reg_overlap_mentioned_for_reload_p (dest
,
7098 else if (goal_mem
&& MEM_P (dest
)
7099 && ! push_operand (dest
, GET_MODE (dest
)))
7101 else if (need_stable_sp
7102 && push_operand (dest
, GET_MODE (dest
)))
7109 /* If this insn auto-increments or auto-decrements
7110 either regno or valueno, return 0 now.
7111 If GOAL is a memory ref and its address is not constant,
7112 and this insn P increments a register used in GOAL, return 0. */
7116 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7117 if (REG_NOTE_KIND (link
) == REG_INC
7118 && REG_P (XEXP (link
, 0)))
7120 int incno
= REGNO (XEXP (link
, 0));
7121 if (incno
< regno
+ nregs
&& incno
>= regno
)
7123 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7125 if (goal_mem_addr_varies
7126 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7136 /* Find a place where INCED appears in an increment or decrement operator
7137 within X, and return the amount INCED is incremented or decremented by.
7138 The value is always positive. */
7141 find_inc_amount (rtx x
, rtx inced
)
7143 enum rtx_code code
= GET_CODE (x
);
7149 rtx addr
= XEXP (x
, 0);
7150 if ((GET_CODE (addr
) == PRE_DEC
7151 || GET_CODE (addr
) == POST_DEC
7152 || GET_CODE (addr
) == PRE_INC
7153 || GET_CODE (addr
) == POST_INC
)
7154 && XEXP (addr
, 0) == inced
)
7155 return GET_MODE_SIZE (GET_MODE (x
));
7156 else if ((GET_CODE (addr
) == PRE_MODIFY
7157 || GET_CODE (addr
) == POST_MODIFY
)
7158 && GET_CODE (XEXP (addr
, 1)) == PLUS
7159 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7160 && XEXP (addr
, 0) == inced
7161 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7163 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7164 return i
< 0 ? -i
: i
;
7168 fmt
= GET_RTX_FORMAT (code
);
7169 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7173 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7180 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7182 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7192 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7193 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7197 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7204 if (! INSN_P (insn
))
7207 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7208 if (REG_NOTE_KIND (link
) == REG_INC
)
7210 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7211 if (test
>= regno
&& test
< endregno
)
7218 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7222 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7223 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7224 REG_INC. REGNO must refer to a hard register. */
7227 regno_clobbered_p (unsigned int regno
, rtx_insn
*insn
, machine_mode mode
,
7230 unsigned int nregs
, endregno
;
7232 /* regno must be a hard register. */
7233 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7235 nregs
= hard_regno_nregs
[regno
][mode
];
7236 endregno
= regno
+ nregs
;
7238 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7239 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7240 && REG_P (XEXP (PATTERN (insn
), 0)))
7242 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7244 return test
>= regno
&& test
< endregno
;
7247 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7250 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7252 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7256 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7257 if ((GET_CODE (elt
) == CLOBBER
7258 || (sets
== 1 && GET_CODE (elt
) == SET
))
7259 && REG_P (XEXP (elt
, 0)))
7261 unsigned int test
= REGNO (XEXP (elt
, 0));
7263 if (test
>= regno
&& test
< endregno
)
7267 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7275 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7277 reload_adjust_reg_for_mode (rtx reloadreg
, machine_mode mode
)
7281 if (GET_MODE (reloadreg
) == mode
)
7284 regno
= REGNO (reloadreg
);
7286 if (REG_WORDS_BIG_ENDIAN
)
7287 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7288 - (int) hard_regno_nregs
[regno
][mode
];
7290 return gen_rtx_REG (mode
, regno
);
7293 static const char *const reload_when_needed_name
[] =
7296 "RELOAD_FOR_OUTPUT",
7298 "RELOAD_FOR_INPUT_ADDRESS",
7299 "RELOAD_FOR_INPADDR_ADDRESS",
7300 "RELOAD_FOR_OUTPUT_ADDRESS",
7301 "RELOAD_FOR_OUTADDR_ADDRESS",
7302 "RELOAD_FOR_OPERAND_ADDRESS",
7303 "RELOAD_FOR_OPADDR_ADDR",
7305 "RELOAD_FOR_OTHER_ADDRESS"
7308 /* These functions are used to print the variables set by 'find_reloads' */
7311 debug_reload_to_stream (FILE *f
)
7318 for (r
= 0; r
< n_reloads
; r
++)
7320 fprintf (f
, "Reload %d: ", r
);
7324 fprintf (f
, "reload_in (%s) = ",
7325 GET_MODE_NAME (rld
[r
].inmode
));
7326 print_inline_rtx (f
, rld
[r
].in
, 24);
7327 fprintf (f
, "\n\t");
7330 if (rld
[r
].out
!= 0)
7332 fprintf (f
, "reload_out (%s) = ",
7333 GET_MODE_NAME (rld
[r
].outmode
));
7334 print_inline_rtx (f
, rld
[r
].out
, 24);
7335 fprintf (f
, "\n\t");
7338 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7340 fprintf (f
, "%s (opnum = %d)",
7341 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7344 if (rld
[r
].optional
)
7345 fprintf (f
, ", optional");
7347 if (rld
[r
].nongroup
)
7348 fprintf (f
, ", nongroup");
7350 if (rld
[r
].inc
!= 0)
7351 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7353 if (rld
[r
].nocombine
)
7354 fprintf (f
, ", can't combine");
7356 if (rld
[r
].secondary_p
)
7357 fprintf (f
, ", secondary_reload_p");
7359 if (rld
[r
].in_reg
!= 0)
7361 fprintf (f
, "\n\treload_in_reg: ");
7362 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7365 if (rld
[r
].out_reg
!= 0)
7367 fprintf (f
, "\n\treload_out_reg: ");
7368 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7371 if (rld
[r
].reg_rtx
!= 0)
7373 fprintf (f
, "\n\treload_reg_rtx: ");
7374 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7378 if (rld
[r
].secondary_in_reload
!= -1)
7380 fprintf (f
, "%ssecondary_in_reload = %d",
7381 prefix
, rld
[r
].secondary_in_reload
);
7385 if (rld
[r
].secondary_out_reload
!= -1)
7386 fprintf (f
, "%ssecondary_out_reload = %d\n",
7387 prefix
, rld
[r
].secondary_out_reload
);
7390 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7392 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7393 insn_data
[rld
[r
].secondary_in_icode
].name
);
7397 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7398 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7399 insn_data
[rld
[r
].secondary_out_icode
].name
);
7408 debug_reload_to_stream (stderr
);