gcc/config/aarch64/aarch64-protos.h

   1 /* Machine description for AArch64 architecture.
   2    Copyright (C) 2009-2013 Free Software Foundation, Inc.
   3    Contributed by ARM Ltd.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but
  13    WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15    General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21
  22 #ifndef GCC_AARCH64_PROTOS_H
  23 #define GCC_AARCH64_PROTOS_H
  24
  25 /*
  26   SYMBOL_CONTEXT_ADR
  27   The symbol is used in a load-address operation.
  28   SYMBOL_CONTEXT_MEM
  29   The symbol is used as the address in a MEM.
  30  */
  31 enum aarch64_symbol_context
  32 {
  33   SYMBOL_CONTEXT_MEM,
  34   SYMBOL_CONTEXT_ADR
  35 };
  36
  37 /* SYMBOL_SMALL_ABSOLUTE: Generate symbol accesses through
  38    high and lo relocs that calculate the base address using a PC
  39    relative reloc.
  40    So to get the address of foo, we generate
  41    adrp x0, foo
  42    add  x0, x0, :lo12:foo
  43
  44    To load or store something to foo, we could use the corresponding
  45    load store variants that generate an
  46    ldr x0, [x0,:lo12:foo]
  47    or
  48    str x1, [x0, :lo12:foo]
  49
  50    This corresponds to the small code model of the compiler.
  51
  52    SYMBOL_SMALL_GOT: Similar to the one above but this
  53    gives us the GOT entry of the symbol being referred to :
  54    Thus calculating the GOT entry for foo is done using the
  55    following sequence of instructions.  The ADRP instruction
  56    gets us to the page containing the GOT entry of the symbol
  57    and the got_lo12 gets us the actual offset in it.
  58
  59    adrp  x0, :got:foo
  60    ldr   x0, [x0, :gotoff_lo12:foo]
  61
  62    This corresponds to the small PIC model of the compiler.
  63
  64    SYMBOL_SMALL_TLSGD
  65    SYMBOL_SMALL_TLSDESC
  66    SYMBOL_SMALL_GOTTPREL
  67    SYMBOL_SMALL_TPREL
  68    Each of of these represents a thread-local symbol, and corresponds to the
  69    thread local storage relocation operator for the symbol being referred to.
  70
  71    SYMBOL_TINY_ABSOLUTE
  72
  73    Generate symbol accesses as a PC relative address using a single
  74    instruction.  To compute the address of symbol foo, we generate:
  75
  76    ADR x0, foo
  77
  78    SYMBOL_TINY_GOT
  79
  80    Generate symbol accesses via the GOT using a single PC relative
  81    instruction.  To compute the address of symbol foo, we generate:
  82
  83    ldr t0, :got:foo
  84
  85    The value of foo can subsequently read using:
  86
  87    ldrb    t0, [t0]
  88
  89    SYMBOL_FORCE_TO_MEM : Global variables are addressed using
  90    constant pool.  All variable addresses are spilled into constant
  91    pools.  The constant pools themselves are addressed using PC
  92    relative accesses.  This only works for the large code model.
  93  */
  94 enum aarch64_symbol_type
  95 {
  96   SYMBOL_SMALL_ABSOLUTE,
  97   SYMBOL_SMALL_GOT,
  98   SYMBOL_SMALL_TLSGD,
  99   SYMBOL_SMALL_TLSDESC,
 100   SYMBOL_SMALL_GOTTPREL,
 101   SYMBOL_SMALL_TPREL,
 102   SYMBOL_TINY_ABSOLUTE,
 103   SYMBOL_TINY_GOT,
 104   SYMBOL_FORCE_TO_MEM
 105 };
 106
 107 /* A set of tuning parameters contains references to size and time
 108    cost models and vectors for address cost calculations, register
 109    move costs and memory move costs.  */
 110
 111 /* Extra costs for specific insns.  Only records the cost above a
 112    single insn.  */
 113
 114 struct cpu_rtx_cost_table
 115 {
 116   const int memory_load;
 117   const int memory_store;
 118   const int register_shift;
 119   const int int_divide;
 120   const int float_divide;
 121   const int double_divide;
 122   const int int_multiply;
 123   const int int_multiply_extend;
 124   const int int_multiply_add;
 125   const int int_multiply_extend_add;
 126   const int float_multiply;
 127   const int double_multiply;
 128 };
 129
 130 /* Additional cost for addresses.  */
 131 struct cpu_addrcost_table
 132 {
 133   const int pre_modify;
 134   const int post_modify;
 135   const int register_offset;
 136   const int register_extend;
 137   const int imm_offset;
 138 };
 139
 140 /* Additional costs for register copies.  Cost is for one register.  */
 141 struct cpu_regmove_cost
 142 {
 143   const int GP2GP;
 144   const int GP2FP;
 145   const int FP2GP;
 146   const int FP2FP;
 147 };
 148
 149 /* Cost for vector insn classes.  */
 150 struct cpu_vector_cost
 151 {
 152   const int scalar_stmt_cost;            /* Cost of any scalar operation,
 153                                             excluding load and store.  */
 154   const int scalar_load_cost;            /* Cost of scalar load.  */
 155   const int scalar_store_cost;           /* Cost of scalar store.  */
 156   const int vec_stmt_cost;               /* Cost of any vector operation,
 157                                             excluding load, store,
 158                                             vector-to-scalar and
 159                                             scalar-to-vector operation.  */
 160   const int vec_to_scalar_cost;          /* Cost of vec-to-scalar operation.  */
 161   const int scalar_to_vec_cost;          /* Cost of scalar-to-vector
 162                                             operation.  */
 163   const int vec_align_load_cost;         /* Cost of aligned vector load.  */
 164   const int vec_unalign_load_cost;       /* Cost of unaligned vector load.  */
 165   const int vec_unalign_store_cost;      /* Cost of unaligned vector store.  */
 166   const int vec_store_cost;              /* Cost of vector store.  */
 167   const int cond_taken_branch_cost;      /* Cost of taken branch.  */
 168   const int cond_not_taken_branch_cost;  /* Cost of not taken branch.  */
 169 };
 170
 171 struct tune_params
 172 {
 173   const struct cpu_rtx_cost_table *const insn_extra_cost;
 174   const struct cpu_addrcost_table *const addr_cost;
 175   const struct cpu_regmove_cost *const regmove_cost;
 176   const struct cpu_vector_cost *const vec_costs;
 177   const int memmov_cost;
 178 };
 179
 180 HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned);
 181 bool aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode);
 182 enum aarch64_symbol_type
 183 aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context);
 184 bool aarch64_constant_address_p (rtx);
 185 bool aarch64_float_const_zero_rtx_p (rtx);
 186 bool aarch64_function_arg_regno_p (unsigned);
 187 bool aarch64_gen_movmemqi (rtx *);
 188 bool aarch64_gimple_fold_builtin (gimple_stmt_iterator *);
 189 bool aarch64_is_extend_from_extract (enum machine_mode, rtx, rtx);
 190 bool aarch64_is_long_call_p (rtx);
 191 bool aarch64_label_mentioned_p (rtx);
 192 bool aarch64_legitimate_pic_operand_p (rtx);
 193 bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode);
 194 bool aarch64_mov_operand_p (rtx, enum aarch64_symbol_context,
 195                             enum machine_mode);
 196 char *aarch64_output_scalar_simd_mov_immediate (rtx, enum machine_mode);
 197 char *aarch64_output_simd_mov_immediate (rtx, enum machine_mode, unsigned);
 198 bool aarch64_pad_arg_upward (enum machine_mode, const_tree);
 199 bool aarch64_pad_reg_upward (enum machine_mode, const_tree, bool);
 200 bool aarch64_regno_ok_for_base_p (int, bool);
 201 bool aarch64_regno_ok_for_index_p (int, bool);
 202 bool aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode);
 203 bool aarch64_simd_imm_zero_p (rtx, enum machine_mode);
 204 bool aarch64_simd_scalar_immediate_valid_for_move (rtx, enum machine_mode);
 205 bool aarch64_simd_shift_imm_p (rtx, enum machine_mode, bool);
 206 bool aarch64_simd_valid_immediate (rtx, enum machine_mode, bool,
 207                                    struct simd_immediate_info *);
 208 bool aarch64_symbolic_address_p (rtx);
 209 bool aarch64_uimm12_shift (HOST_WIDE_INT);
 210 const char *aarch64_output_casesi (rtx *);
 211 enum aarch64_symbol_type aarch64_classify_symbol (rtx,
 212                                                   enum aarch64_symbol_context);
 213 enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx);
 214 enum reg_class aarch64_regno_regclass (unsigned);
 215 int aarch64_asm_preferred_eh_data_format (int, int);
 216 int aarch64_hard_regno_mode_ok (unsigned, enum machine_mode);
 217 int aarch64_hard_regno_nregs (unsigned, enum machine_mode);
 218 int aarch64_simd_attr_length_move (rtx);
 219 int aarch64_uxt_size (int, HOST_WIDE_INT);
 220 rtx aarch64_final_eh_return_addr (void);
 221 rtx aarch64_legitimize_reload_address (rtx *, enum machine_mode, int, int, int);
 222 const char *aarch64_output_move_struct (rtx *operands);
 223 rtx aarch64_return_addr (int, rtx);
 224 rtx aarch64_simd_gen_const_vector_dup (enum machine_mode, int);
 225 bool aarch64_simd_mem_operand_p (rtx);
 226 rtx aarch64_simd_vect_par_cnst_half (enum machine_mode, bool);
 227 rtx aarch64_tls_get_addr (void);
 228 tree aarch64_fold_builtin (tree, int, tree *, bool);
 229 unsigned aarch64_dbx_register_number (unsigned);
 230 unsigned aarch64_trampoline_size (void);
 231 void aarch64_asm_output_labelref (FILE *, const char *);
 232 void aarch64_elf_asm_named_section (const char *, unsigned, tree);
 233 void aarch64_expand_epilogue (bool);
 234 void aarch64_expand_mov_immediate (rtx, rtx);
 235 void aarch64_expand_prologue (void);
 236 void aarch64_expand_vector_init (rtx, rtx);
 237 void aarch64_function_profiler (FILE *, int);
 238 void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx,
 239                                    const_tree, unsigned);
 240 void aarch64_init_expanders (void);
 241 void aarch64_print_operand (FILE *, rtx, char);
 242 void aarch64_print_operand_address (FILE *, rtx);
 243
 244 /* Initialize builtins for SIMD intrinsics.  */
 245 void init_aarch64_simd_builtins (void);
 246
 247 void aarch64_simd_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
 248 void aarch64_simd_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
 249
 250 /* Emit code to place a AdvSIMD pair result in memory locations (with equal
 251    registers).  */
 252 void aarch64_simd_emit_pair_result_insn (enum machine_mode,
 253                                          rtx (*intfn) (rtx, rtx, rtx), rtx,
 254                                          rtx);
 255
 256 /* Expand builtins for SIMD intrinsics.  */
 257 rtx aarch64_simd_expand_builtin (int, tree, rtx);
 258
 259 void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
 260
 261 /* Emit code for reinterprets.  */
 262 void aarch64_simd_reinterpret (rtx, rtx);
 263
 264 void aarch64_split_128bit_move (rtx, rtx);
 265
 266 bool aarch64_split_128bit_move_p (rtx, rtx);
 267
 268 void aarch64_split_simd_combine (rtx, rtx, rtx);
 269
 270 void aarch64_split_simd_move (rtx, rtx);
 271
 272 /* Check for a legitimate floating point constant for FMOV.  */
 273 bool aarch64_float_const_representable_p (rtx);
 274
 275 #if defined (RTX_CODE)
 276
 277 bool aarch64_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, bool);
 278 enum machine_mode aarch64_select_cc_mode (RTX_CODE, rtx, rtx);
 279 rtx aarch64_gen_compare_reg (RTX_CODE, rtx, rtx);
 280 rtx aarch64_load_tp (rtx);
 281
 282 void aarch64_expand_compare_and_swap (rtx op[]);
 283 void aarch64_split_compare_and_swap (rtx op[]);
 284 void aarch64_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
 285
 286 #endif /* RTX_CODE */
 287
 288 void aarch64_init_builtins (void);
 289 rtx aarch64_expand_builtin (tree exp,
 290                             rtx target,
 291                             rtx subtarget ATTRIBUTE_UNUSED,
 292                             enum machine_mode mode ATTRIBUTE_UNUSED,
 293                             int ignore ATTRIBUTE_UNUSED);
 294 tree aarch64_builtin_decl (unsigned, bool ATTRIBUTE_UNUSED);
 295
 296 tree
 297 aarch64_builtin_vectorized_function (tree fndecl,
 298                                      tree type_out,
 299                                      tree type_in);
 300
 301 extern void aarch64_split_combinev16qi (rtx operands[3]);
 302 extern void aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
 303 extern bool
 304 aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel);
 305 #endif /* GCC_AARCH64_PROTOS_H */