1 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
4 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
5 types for type comparisons. Refactor code to simplify it.
7 2020-08-08 Jakub Jelinek <jakub@redhat.com>
10 * tree-nested.c (convert_nonlocal_omp_clauses): For
11 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
12 save info->new_local_var_chain around walks of the clause gimple
13 sequences and declare_vars if needed into the sequence.
15 2020-08-08 Jakub Jelinek <jakub@redhat.com>
17 PR tree-optimization/96424
18 * omp-expand.c: Include tree-eh.h.
19 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
20 by forcing floating point comparison into a bool temporary.
22 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
24 * generic-match-head.c (optimize_vectors_before_lowering_p): New
26 * gimple-match-head.c (optimize_vectors_before_lowering_p):
28 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
30 2020-08-07 Richard Biener <rguenther@suse.de>
32 PR tree-optimization/96514
33 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
34 is a call that is control-altering, fail.
36 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
38 * config/bpf/bpf.md: Remove trailing whitespaces.
39 * config/bpf/constraints.md: Likewise.
40 * config/bpf/predicates.md: Likewise.
42 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
44 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
45 (bswapsi2_reg): Add ISA 3.1 support.
46 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
47 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
49 2020-08-07 Alan Modra <amodra@gmail.com>
52 * config/rs6000/predicates.md (current_file_function_operand): Don't
53 accept functions that differ in r2 usage.
55 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
57 * config/mmix/mmix.md (MM): New mode_iterator.
58 ("mov<mode>"): New expander to expand for all MM-modes.
59 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
60 ("*movsf_expanded", "*movdf_expanded"): Rename from the
61 corresponding mov<M> named pattern. Add to the condition that
62 either operand must be a register_operand.
63 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
65 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
68 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
70 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
72 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
75 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
76 Disable split for zero constant source operand.
77 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
79 2020-08-06 Jakub Jelinek <jakub@redhat.com>
81 PR tree-optimization/96480
82 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
83 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
84 through an empty bb to that block too, if PHI args don't match, retry
85 them through the other path from TEST_BB.
86 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
87 through inversion of the condition.
89 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
91 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
92 (KERNEL_VERSION): Remove.
93 * config/bpf/bpf-helpers.def: Delete.
94 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
95 (bpf_attribute_table): Define.
96 (bpf_helper_names): Delete.
97 (bpf_helper_code): Likewise.
98 (enum bpf_builtins): Adjust to new helpers mechanism.
99 (bpf_output_call): Likewise.
100 (bpf_init_builtins): Likewise.
101 (bpf_init_builtins): Likewise.
102 * doc/extend.texi (BPF Function Attributes): New section.
103 (BPF Kernel Helpers): Delete section.
105 2020-08-06 Richard Biener <rguenther@suse.de>
107 PR tree-optimization/96491
108 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
109 sinking across abnormal edges.
111 2020-08-06 Richard Biener <rguenther@suse.de>
113 PR tree-optimization/96483
114 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
117 2020-08-06 Richard Biener <rguenther@suse.de>
119 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
121 (ivs_params_clear): Adjust.
122 (gcc_expression_from_isl_ast_expr_id): Likewise.
123 (graphite_create_new_loop): Likewise.
124 (add_parameters_to_ivs_params): Likewise.
126 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
127 Uroš Bizjak <ubizjak@gmail.com>
129 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
130 (<maxmin><mode>3): Support SWI248 and general_operand for
131 second operand, when TARGET_CMOVE.
132 (<maxmin><mode>3_1 splitter): Optimize comparisons against
133 0, 1 and -1 to use "test" instead of "cmp".
134 (*<maxmin>di3_doubleword): Likewise, allow general_operand
135 and enable on TARGET_CMOVE.
136 (peephole2): Convert clearing a register after a flag setting
137 instruction into an xor followed by the original flag setter.
139 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
141 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
142 Remove direct inclusion of <vector>.
144 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
146 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
148 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
149 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
150 modeling for vector with length.
151 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
152 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
153 Update function comment.
154 * tree-vect-stmts.c (vect_gen_len): Update function comment.
155 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
157 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
159 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
162 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
164 PR tree-optimization/95906
166 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
167 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
168 (op (c ? a : b)): Update to match the new transformations.
170 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
173 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
174 CC register directly, instead of a GPR. Replace the original GPR
175 destination with an extra scratch register. Zero out operand 3
177 (stack_protect_test): Update accordingly.
179 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
181 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
182 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
183 (store_pair_sw_<SX:mode><SX2:mode>)
184 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
185 (*load_pair_extendsidi2_aarch64)
186 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
187 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
188 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
189 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
191 2020-08-05 Richard Biener <rguenther@suse.de>
193 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
194 (invariantness_dom_walker::before_dom_children): Move to ...
195 (compute_invariantness): ... this function.
196 (move_computations): Inline ...
197 (tree_ssa_lim): ... here, share RPO order and avoid some
199 (analyze_memory_references): Remove sorting of location
200 lists, instead assert they are sorted already when checking.
201 (prev_flag_edges): Remove.
202 (execute_sm_if_changed): Pass down and adjust prev edge state.
203 (execute_sm_exit): Likewise.
204 (hoist_memory_references): Likewise. Commit edge insertions
205 of each processed exit.
206 (store_motion_loop): Do not commit edge insertions on all
207 edges in the function.
208 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
209 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
211 2020-08-05 Richard Biener <rguenther@suse.de>
213 * genmatch.c (fail_label): New global.
214 (expr::gen_transform): Branch to fail_label instead of
215 returning. Fix indent of call argument checking.
216 (dt_simplify::gen_1): Compute and emit fail_label, branch
217 to it instead of returning early.
219 2020-08-05 Jakub Jelinek <jakub@redhat.com>
221 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
224 2020-08-05 Jakub Jelinek <jakub@redhat.com>
227 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
230 2020-08-05 Jakub Jelinek <jakub@redhat.com>
232 * omp-expand.c (expand_omp_for_init_counts): Remember
233 first_inner_iterations, factor and n1o from the number of iterations
235 (expand_omp_for_init_vars): Use more efficient logical iteration number
236 to actual iterator values computation even for non-rectangular loops
237 where number of loop iterations could not be computed at compile time.
239 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
241 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
242 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
244 (VM3): New define_mode.
245 (VM3_char): New define_attr.
246 (xxblend_<mode> mode VM3): New define_insn.
247 (xxpermx): New define_expand.
248 (xxpermx_inst): New define_insn.
249 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
250 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
251 BU_P10V_3 definitions.
252 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
253 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
254 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
255 (P10_BUILTIN_VXXPERMX): Add if statement.
256 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
257 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
258 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
259 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
260 overloaded arguments.
261 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
262 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
263 variables, add case statement for P10_BUILTIN_VXXPERMX.
264 (builtin_function_type): Add case statements for
265 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
266 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
267 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
269 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
271 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
273 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
274 UNSPEC_XXSPLTI32DX): New.
275 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
276 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
277 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
278 vxxsplti32dx_v4sf.): New define_expands.
279 * config/rs6000/predicates.md (u1bit_cint_operand,
280 s32bit_cint_operand, c32bit_cint_operand): New predicates.
281 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
282 VXXSPLTID): New definitions.
283 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
285 (XXSPLTIW, XXSPLTID): New definitions.
286 (XXSPLTI32DX): Add definitions.
287 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
288 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
290 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
292 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
293 * doc/extend.texi: Add documentation for vec_splati,
294 vec_splatid, and vec_splati_ins.
296 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
298 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
299 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
300 (SLDB_lr): New attribute.
301 (VSHIFT_DBL_LR): New iterator.
302 (vs<SLDB_lr>db_<mode>): New define_insn.
303 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
304 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
305 VSRDB_V2DI): New BU_P10V_3 definitions.
306 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
307 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
308 P10_BUILTIN_VEC_SRDB): New definitions.
309 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
310 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
311 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
312 CODE_FOR_vsrdb_v2di]: Add clauses.
313 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
315 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
317 * config/rs6000/altivec.h: Add define for vec_replace_elt and
318 vec_replace_unaligned.
319 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
321 (REPLACE_ELT): New mode iterator.
322 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
323 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
324 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
325 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
326 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
327 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
328 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
330 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
331 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
332 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
333 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
334 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
335 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
336 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
337 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
338 * doc/extend.texi: Add description for vec_replace_elt and
339 vec_replace_unaligned builtins.
341 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
343 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
344 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
345 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
346 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
347 VINSERTVPRHR, VINSERTVPRWR): New builtins.
348 (INSERTL, INSERTH): New builtins.
349 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
350 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
351 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
352 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
353 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
354 P10_BUILTIN_VINSERTVPRWL): Add case entries.
355 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
357 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
358 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
359 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
360 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
361 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
363 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
365 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
366 (vextractl<mode>, vextractr<mode>)
367 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
369 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
370 (vextractl<mode>, vextractr<mode>)
371 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
373 * doc/extend.texi: Update documentation for vec_extractl.
374 Replace builtin name vec_extractr with vec_extracth. Update
375 description of vec_extracth.
377 2020-08-04 Jim Wilson <jimw@sifive.com>
379 * doc/invoke.texi (AArch64 Options): Delete duplicate
380 -mstack-protector-guard docs.
382 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
384 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
385 (umulhi3_highpart, umulsi3_highpart): New instructions.
387 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
389 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
390 (R_AMDGPU_ABS32_LO): Delete.
391 (R_AMDGPU_ABS32_HI): Delete.
392 (R_AMDGPU_ABS64): Delete.
393 (R_AMDGPU_REL32): Delete.
394 (R_AMDGPU_REL64): Delete.
395 (R_AMDGPU_ABS32): Delete.
396 (R_AMDGPU_GOTPCREL): Delete.
397 (R_AMDGPU_GOTPCREL32_LO): Delete.
398 (R_AMDGPU_GOTPCREL32_HI): Delete.
399 (R_AMDGPU_REL32_LO): Delete.
400 (R_AMDGPU_REL32_HI): Delete.
402 (R_AMDGPU_RELATIVE64): Delete.
404 2020-08-04 Omar Tahir <omar.tahir@arm.com>
406 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
408 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
410 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
411 redundant extra_cost variable.
413 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
415 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
416 Use FLOAT_MODE_P macro instead of enumerating all floating-point
417 modes and add global flag FLAG_AUTO_FP.
419 2020-08-04 Jakub Jelinek <jakub@redhat.com>
421 * doc/extend.texi (symver): Add @cindex for symver function attribute.
423 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
425 PR tree-optimization/95433
426 * match.pd (X * C1 == C2): New transformation.
428 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
430 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
431 (format_integer): Same.
432 (handle_printf_call): Same.
434 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
436 * config/gcn/gcn.md ("<expander>ti3"): New.
438 2020-08-04 Richard Biener <rguenther@suse.de>
440 PR tree-optimization/88240
441 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
442 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
443 (vn_reference_insert_pieces): Likewise.
444 (visit_reference_op_call): Likewise.
445 (visit_reference_op_load): Track whether a ref was punned.
446 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
447 insertion on punned floating point loads.
449 2020-08-04 Sudakshina Das <sudi.das@arm.com>
451 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
453 (aarch64_gen_load_pair): Likewise.
454 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
455 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
458 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
460 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
462 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
463 target supports option.
465 2020-08-04 Tom de Vries <tdevries@suse.de>
468 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
470 2020-08-04 Jakub Jelinek <jakub@redhat.com>
473 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
474 call with GIMPLE_NOP if there is no lhs.
476 2020-08-04 Jakub Jelinek <jakub@redhat.com>
479 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
480 argument. Return false instead of gcc_unreachable if it is true and
481 get_addr_base_and_unit_offset returns NULL.
482 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
484 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
486 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
487 Call is_gimple_min_invariant dropped from previous patch.
489 2020-08-04 Jakub Jelinek <jakub@redhat.com>
491 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
492 compute number of iterations at runtime more efficiently.
493 (expand_omp_for_init_vars): Adjust immediate dominators.
494 (extract_omp_for_update_vars): Likewise.
496 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
498 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
501 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
503 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
505 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
507 * vr-values.c (test_for_singularity): Use irange API.
508 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
509 special case VR_RANGE.
511 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
513 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
516 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
518 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
521 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
523 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
524 * tree-ssanames.h (get_range_info): Same.
526 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
528 * fold-const.c (expr_not_equal_to): Adjust for irange API.
530 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
532 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
534 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
536 PR rtl-optimization/71309
537 * dse.c (find_shift_sequence): Use subreg of shifted from high part
538 register to avoid loading from address.
540 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
542 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
545 2020-08-03 Nathan Sidwell <nathan@acm.org>
547 * doc/invoke.texi: Refer to c++20
549 2020-08-03 Julian Brown <julian@codesourcery.com>
550 Thomas Schwinge <thomas@codesourcery.com>
552 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
553 without a preceding data-movement mapping.
555 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
557 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
559 (DEF_MIN_OSX_VERSION): Only define if there's no existing
562 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
564 * config/darwin.c (IN_TARGET_CODE): Remove.
565 (darwin_mergeable_constant_section): Handle poly-int machine modes.
566 (machopic_select_rtx_section): Likewise.
568 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
570 PR tree-optimization/96430
571 * range-op.cc (operator_tests): Do not shift by 31 on targets with
572 integer's smaller than 32 bits.
574 2020-08-03 Martin Jambor <mjambor@suse.cz>
576 * hsa-brig-format.h: Moved to brig/brigfrontend.
577 * hsa-brig.c: Removed.
578 * hsa-builtins.def: Likewise.
579 * hsa-common.c: Likewise.
580 * hsa-common.h: Likewise.
581 * hsa-dump.c: Likewise.
582 * hsa-gen.c: Likewise.
583 * hsa-regalloc.c: Likewise.
584 * ipa-hsa.c: Likewise.
585 * omp-grid.c: Likewise.
586 * omp-grid.h: Likewise.
587 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
588 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
589 hsa-dump.o, ipa-hsa.c and omp-grid.o.
590 (GTFILES): Removed hsa-common.c and omp-expand.c.
591 * builtins.def: Remove processing of hsa-builtins.def.
592 (DEF_HSA_BUILTIN): Remove.
593 * common.opt (flag_disable_hsa): Remove.
595 * config.in (ENABLE_HSA): Removed.
596 * configure.ac: Removed handling configuration for hsa offloading.
597 (ENABLE_HSA): Removed.
598 * configure: Regenerated.
599 * doc/install.texi (--enable-offload-targets): Remove hsa from the
601 (--with-hsa-runtime): Reword to reference any HSA run-time, not
602 specifically HSA offloading.
603 * doc/invoke.texi (Option Summary): Remove -Whsa.
604 (Warning Options): Likewise.
605 (Optimize Options): Remove hsa-gen-debug-stores.
606 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
608 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
609 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
610 (dump_gimple_omp_block): Likewise.
611 (pp_gimple_stmt_1): Likewise.
612 * gimple-walk.c (walk_gimple_stmt): Likewise.
613 * gimple.c (gimple_build_omp_grid_body): Removed function.
614 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
615 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
616 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
617 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
618 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
619 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
621 (gimple_build_omp_grid_body): Removed declaration.
622 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
623 (gimple_omp_for_grid_phony): Removed.
624 (gimple_omp_for_set_grid_phony): Likewise.
625 (gimple_omp_for_grid_intra_group): Likewise.
626 (gimple_omp_for_grid_intra_group): Likewise.
627 (gimple_omp_for_grid_group_iter): Likewise.
628 (gimple_omp_for_set_grid_group_iter): Likewise.
629 (gimple_omp_parallel_grid_phony): Likewise.
630 (gimple_omp_parallel_set_grid_phony): Likewise.
631 (gimple_omp_teams_grid_phony): Likewise.
632 (gimple_omp_teams_set_grid_phony): Likewise.
633 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
634 * lto-section-in.c (lto_section_name): Removed hsa.
635 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
636 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
638 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
639 (parallel_needs_hsa_kernel_p): Removed.
640 (grid_launch_attributes_trees): Likewise.
641 (grid_launch_attributes_trees): Likewise.
642 (grid_create_kernel_launch_attr_types): Likewise.
643 (grid_insert_store_range_dim): Likewise.
644 (grid_get_kernel_launch_attributes): Likewise.
645 (get_target_arguments): Remove code passing HSA grid sizes.
646 (grid_expand_omp_for_loop): Remove.
647 (grid_arg_decl_map): Likewise.
648 (grid_remap_kernel_arg_accesses): Likewise.
649 (grid_expand_target_grid_body): Likewise.
650 (expand_omp): Remove call to grid_expand_target_grid_body.
651 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
652 * omp-general.c: Do not include hsa-common.h.
653 (omp_maybe_offloaded): Do not check for HSA offloading.
654 (omp_context_selector_matches): Likewise.
655 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
656 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
657 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
658 (scan_omp_parallel): Remove handling of the phoney variant.
659 (check_omp_nesting_restrictions): Remove handling of
660 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
661 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
662 (lower_omp_for_lastprivate): Remove handling of gridified loops.
663 (lower_omp_for): Remove phony loop handling.
664 (lower_omp_taskreg): Remove phony construct handling.
665 (lower_omp_teams): Likewise.
666 (lower_omp_grid_body): Removed.
667 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
668 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
669 * opts.c (common_handle_option): Do not handle hsa when processing
671 * params.opt (hsa-gen-debug-stores): Remove.
672 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
673 * timevar.def: Remove TV_IPA_HSA.
674 * toplev.c: Do not include hsa-common.h.
675 (compile_file): Do not call hsa_output_brig.
676 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
677 (tree_omp_clause): Remove union field dimension.
678 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
679 OMP_CLAUSE__GRIDDIM_ case.
680 (convert_local_omp_clauses): Likewise.
681 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
682 (make_pass_ipa_hsa): Likewise.
683 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
685 * tree.c (omp_clause_num_ops): Remove the element corresponding to
686 OMP_CLAUSE__GRIDDIM_.
687 (omp_clause_code_name): Likewise.
688 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
689 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
690 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
691 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
693 2020-08-03 Bu Le <bule1@huawei.com>
695 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
698 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
700 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
702 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
704 PR rtl-optimization/95696
705 * regrename.c (regrename_analyze): New param include_all_block_p
706 with default value TRUE. If set to false, avoid disrupting SMS
708 * regrename.h (regrename_analyze): Adjust prototype.
710 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
712 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
713 * doc/tm.texi: Regenerate.
715 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
717 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
719 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
721 * config/aarch64/aarch64-cores.def (a64fx): New core.
722 * config/aarch64/aarch64-tune.md: Regenerated.
723 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
724 * doc/invoke.texi: Add a64fx to the list.
726 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
728 PR rtl-optimization/61494
729 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
730 simplify x - 0.0 with -fsignaling-nans.
732 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
734 * genmatch.c (decision_tree::gen): Emit stub functions for
735 tree code operand counts that have no simplifications.
736 (main): Correct comment typo.
738 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
740 * gimple-ssa-sprintf.c: Fix typos in comments.
742 2020-08-03 Tamar Christina <tamar.christina@arm.com>
744 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
746 2020-08-03 Richard Biener <rguenther@suse.de>
748 * doc/match-and-simplify.texi: Amend accordingly.
750 2020-08-03 Richard Biener <rguenther@suse.de>
752 * genmatch.c (parser::gimple): New.
753 (parser::parser): Initialize gimple flag member.
754 (parser::parse_expr): Error on ! operator modifier when
755 not targeting GIMPLE.
756 (main): Pass down gimple flag to parser ctor.
758 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
760 * Makefile.in (GTFILES): Move value-range.h up.
761 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
762 * ipa-cp.c (initialize_node_lattices): Call value_range
764 (ipcp_propagate_stage): Use in-place new so value_range construct
766 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
767 vec instead of GCC's vec<>.
768 (evaluate_properties_for_edge): Adjust for std vec.
769 (ipa_fn_summary_t::duplicate): Same.
770 (estimate_ipcp_clone_size_and_time): Same.
771 * ipa-prop.c (ipa_get_value_range): Use in-place new for
773 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
774 * range-op.cc (empty_range_check): Rename to...
775 (empty_range_varying): ...this and adjust for varying.
776 (undefined_shift_range_check): Adjust for irange.
777 (range_operator::wi_fold): Same.
778 (range_operator::fold_range): Adjust for irange. Special case
779 single pairs for performance.
780 (range_operator::op1_range): Adjust for irange.
781 (range_operator::op2_range): Same.
782 (value_range_from_overflowed_bounds): Same.
783 (value_range_with_overflow): Same.
784 (create_possibly_reversed_range): Same.
787 (range_true_and_false): Same.
788 (get_bool_state): Adjust for irange and tweak for performance.
789 (operator_equal::fold_range): Adjust for irange.
790 (operator_equal::op1_range): Same.
791 (operator_equal::op2_range): Same.
792 (operator_not_equal::fold_range): Same.
793 (operator_not_equal::op1_range): Same.
794 (operator_not_equal::op2_range): Same.
799 (operator_lt::fold_range): Same.
800 (operator_lt::op1_range): Same.
801 (operator_lt::op2_range): Same.
802 (operator_le::fold_range): Same.
803 (operator_le::op1_range): Same.
804 (operator_le::op2_range): Same.
805 (operator_gt::fold_range): Same.
806 (operator_gt::op1_range): Same.
807 (operator_gt::op2_range): Same.
808 (operator_ge::fold_range): Same.
809 (operator_ge::op1_range): Same.
810 (operator_ge::op2_range): Same.
811 (operator_plus::wi_fold): Same.
812 (operator_plus::op1_range): Same.
813 (operator_plus::op2_range): Same.
814 (operator_minus::wi_fold): Same.
815 (operator_minus::op1_range): Same.
816 (operator_minus::op2_range): Same.
817 (operator_min::wi_fold): Same.
818 (operator_max::wi_fold): Same.
819 (cross_product_operator::wi_cross_product): Same.
820 (operator_mult::op1_range): New.
821 (operator_mult::op2_range): New.
822 (operator_mult::wi_fold): Adjust for irange.
823 (operator_div::wi_fold): Same.
824 (operator_exact_divide::op1_range): Same.
825 (operator_lshift::fold_range): Same.
826 (operator_lshift::wi_fold): Same.
827 (operator_lshift::op1_range): New.
828 (operator_rshift::op1_range): New.
829 (operator_rshift::fold_range): Adjust for irange.
830 (operator_rshift::wi_fold): Same.
831 (operator_cast::truncating_cast_p): Abstract out from
832 operator_cast::fold_range.
833 (operator_cast::fold_range): Adjust for irange and tweak for
835 (operator_cast::inside_domain_p): Abstract out from fold_range.
836 (operator_cast::fold_pair): Same.
837 (operator_cast::op1_range): Use abstracted methods above. Adjust
838 for irange and tweak for performance.
839 (operator_logical_and::fold_range): Adjust for irange.
840 (operator_logical_and::op1_range): Same.
841 (operator_logical_and::op2_range): Same.
842 (unsigned_singleton_p): New.
843 (operator_bitwise_and::remove_impossible_ranges): New.
844 (operator_bitwise_and::fold_range): New.
845 (wi_optimize_and_or): Adjust for irange.
846 (operator_bitwise_and::wi_fold): Same.
847 (set_nonzero_range_from_mask): New.
848 (operator_bitwise_and::simple_op1_range_solver): New.
849 (operator_bitwise_and::op1_range): Adjust for irange.
850 (operator_bitwise_and::op2_range): Same.
851 (operator_logical_or::fold_range): Same.
852 (operator_logical_or::op1_range): Same.
853 (operator_logical_or::op2_range): Same.
854 (operator_bitwise_or::wi_fold): Same.
855 (operator_bitwise_or::op1_range): Same.
856 (operator_bitwise_or::op2_range): Same.
857 (operator_bitwise_xor::wi_fold): Same.
858 (operator_bitwise_xor::op1_range): New.
859 (operator_bitwise_xor::op2_range): New.
860 (operator_trunc_mod::wi_fold): Adjust for irange.
861 (operator_logical_not::fold_range): Same.
862 (operator_logical_not::op1_range): Same.
863 (operator_bitwise_not::fold_range): Same.
864 (operator_bitwise_not::op1_range): Same.
865 (operator_cst::fold_range): Same.
866 (operator_identity::fold_range): Same.
867 (operator_identity::op1_range): Same.
868 (class operator_unknown): New.
869 (operator_unknown::fold_range): New.
870 (class operator_abs): Adjust for irange.
871 (operator_abs::wi_fold): Same.
872 (operator_abs::op1_range): Same.
873 (operator_absu::wi_fold): Same.
874 (class operator_negate): Same.
875 (operator_negate::fold_range): Same.
876 (operator_negate::op1_range): Same.
877 (operator_addr_expr::fold_range): Same.
878 (operator_addr_expr::op1_range): Same.
879 (pointer_plus_operator::wi_fold): Same.
880 (pointer_min_max_operator::wi_fold): Same.
881 (pointer_and_operator::wi_fold): Same.
882 (pointer_or_operator::op1_range): New.
883 (pointer_or_operator::op2_range): New.
884 (pointer_or_operator::wi_fold): Adjust for irange.
885 (integral_table::integral_table): Add entries for IMAGPART_EXPR
886 and POINTER_DIFF_EXPR.
887 (range_cast): Adjust for irange.
890 (widest_irange_tests): New.
891 (multi_precision_range_tests): New.
892 (operator_tests): New.
894 * range-op.h (class range_operator): Adjust for irange.
896 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
897 tweak for performance.
898 (range_fold_binary_expr): Same.
899 (masked_increment): Change to extern.
900 * tree-vrp.h (masked_increment): New.
901 * tree.c (cache_wide_int_in_type_cache): New function abstracted
902 out from wide_int_to_tree_1.
903 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
904 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
906 (value_range_equiv::move): Same.
907 (value_range_equiv::check): Adjust for irange.
908 (value_range_equiv::intersect): Same.
909 (value_range_equiv::union_): Same.
910 (value_range_equiv::dump): Same.
911 * value-range.cc (irange::operator=): Same.
912 (irange::maybe_anti_range): New.
913 (irange::copy_legacy_range): New.
914 (irange::set_undefined): Adjust for irange.
915 (irange::swap_out_of_order_endpoints): Abstract out from set().
916 (irange::set_varying): Adjust for irange.
917 (irange::irange_set): New.
918 (irange::irange_set_anti_range): New.
919 (irange::set): Adjust for irange.
920 (value_range::set_nonzero): Move to header file.
921 (value_range::set_zero): Move to header file.
922 (value_range::check): Rename to...
923 (irange::verify_range): ...this.
924 (value_range::num_pairs): Rename to...
925 (irange::legacy_num_pairs): ...this, and adjust for irange.
926 (value_range::lower_bound): Rename to...
927 (irange::legacy_lower_bound): ...this, and adjust for irange.
928 (value_range::upper_bound): Rename to...
929 (irange::legacy_upper_bound): ...this, and adjust for irange.
930 (value_range::equal_p): Rename to...
931 (irange::legacy_equal_p): ...this.
932 (value_range::operator==): Move to header file.
933 (irange::equal_p): New.
934 (irange::symbolic_p): Adjust for irange.
935 (irange::constant_p): Same.
936 (irange::singleton_p): Same.
937 (irange::value_inside_range): Same.
938 (irange::may_contain_p): Same.
939 (irange::contains_p): Same.
940 (irange::normalize_addresses): Same.
941 (irange::normalize_symbolics): Same.
942 (irange::legacy_intersect): Same.
943 (irange::legacy_union): Same.
944 (irange::union_): Same.
945 (irange::intersect): Same.
946 (irange::irange_union): New.
947 (irange::irange_intersect): New.
949 (irange::invert): Adjust for irange.
950 (dump_bound_with_infinite_markers): New.
951 (irange::dump): Adjust for irange.
952 (debug): Add irange versions.
953 (range_has_numeric_bounds_p): Adjust for irange.
954 (vrp_val_max): Move to header file.
955 (vrp_val_min): Move to header file.
956 (DEFINE_INT_RANGE_GC_STUBS): New.
957 (DEFINE_INT_RANGE_INSTANCE): New.
958 * value-range.h (class irange): New.
959 (class int_range): New.
960 (class value_range): Rename to a instantiation of int_range.
961 (irange::legacy_mode_p): New.
962 (value_range::value_range): Remove.
964 (irange::num_pairs): Adjust for irange.
965 (irange::type): Adjust for irange.
966 (irange::tree_lower_bound): New.
967 (irange::tree_upper_bound): New.
968 (irange::type): Adjust for irange.
971 (irange::varying_p): Same.
972 (irange::undefined_p): Same.
973 (irange::zero_p): Same.
974 (irange::nonzero_p): Same.
975 (irange::supports_type_p): Same.
976 (range_includes_zero_p): Same.
979 (irange::irange): New.
980 (int_range::int_range): New.
981 (int_range::operator=): New.
982 (irange::set): Moved from value-range.cc and adjusted for irange.
983 (irange::set_undefined): Same.
984 (irange::set_varying): Same.
985 (irange::operator==): Same.
986 (irange::lower_bound): Same.
987 (irange::upper_bound): Same.
988 (irange::union_): Same.
989 (irange::intersect): Same.
990 (irange::set_nonzero): Same.
991 (irange::set_zero): Same.
992 (irange::normalize_min_max): New.
993 (vrp_val_max): Move from value-range.cc.
995 * vr-values.c (vr_values::get_lattice_entry): Call value_range
998 2020-08-02 Sergei Trofimovich <siarheit@google.com>
1001 * var-tracking.c (vt_find_locations): Fully initialize
1002 all 'in_pending' bits.
1004 2020-08-01 Jan Hubicka <jh@suse.cz>
1006 * symtab.c (symtab_node::verify_base): Verify order.
1007 (symtab_node::verify_symtab_nodes): Verify order.
1009 2020-08-01 Jan Hubicka <jh@suse.cz>
1011 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
1013 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
1015 * config/csky/csky_opts.h (float_abi_type): New.
1016 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
1017 (TARGET_HARD_FLOAT): New.
1018 (TARGET_HARD_FLOAT_ABI): New.
1019 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
1020 * config/csky/csky.opt (mfloat-abi): New.
1021 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
1023 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
1025 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
1027 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
1028 Tom de Vries <tdevries@suse.de>
1031 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
1032 (TARGET_TRULY_NOOP_TRUNCATION): Define.
1034 2020-07-31 Richard Biener <rguenther@suse.de>
1037 * langhooks-def.h (lhd_finalize_early_debug): Declare.
1038 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
1039 (LANG_HOOKS_INITIALIZER): Amend.
1040 * langhooks.c: Include cgraph.h and debug.h.
1041 (lhd_finalize_early_debug): Default implementation from
1042 former code in finalize_compilation_unit.
1043 * langhooks.h (lang_hooks::finalize_early_debug): Add.
1044 * cgraphunit.c (symbol_table::finalize_compilation_unit):
1045 Call the finalize_early_debug langhook.
1047 2020-07-31 Richard Biener <rguenther@suse.de>
1049 * genmatch.c (expr::force_leaf): Add and initialize.
1050 (expr::gen_transform): Honor force_leaf by passing
1051 NULL as sequence argument to maybe_push_res_to_seq.
1052 (parser::parse_expr): Allow ! marker on result expression
1054 * doc/match-and-simplify.texi: Amend.
1056 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
1058 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
1059 taken costs for prologue and epilogue if they don't exist.
1060 (vect_estimate_min_profitable_iters): Likewise.
1062 2020-07-31 Martin Liska <mliska@suse.cz>
1064 * cgraph.h: Remove leading empty lines.
1065 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
1067 (struct cgraph_order_sort): Add constructors.
1068 (cgraph_order_sort::process): New.
1069 (cgraph_order_cmp): New.
1070 (output_in_order): Simplify and push nodes to vector.
1072 2020-07-31 Richard Biener <rguenther@suse.de>
1075 * fold-const.c (fold_range_test): Special-case constant
1076 LHS for short-circuiting operations.
1078 2020-07-31 Martin Liska <mliska@suse.cz>
1080 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
1082 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
1084 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
1085 Add new argument ATTRS.
1086 (aarch64_call_properties): New function.
1087 (aarch64_modifies_global_state_p): Likewise.
1088 (aarch64_reads_global_state_p): Likewise.
1089 (aarch64_could_trap_p): Likewise.
1090 (aarch64_add_attribute): Likewise.
1091 (aarch64_get_attributes): Likewise.
1092 (aarch64_init_simd_builtins): Add attributes for each built-in function.
1094 2020-07-31 Richard Biener <rguenther@suse.de>
1097 * var-tracking.c (vt_find_locations): Use
1098 rev_post_order_and_mark_dfs_back_seme and separately iterate
1101 2020-07-31 Richard Biener <rguenther@suse.de>
1103 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
1105 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
1106 (tag_header): New helper.
1107 (cmp_edge_dest_pre): Likewise.
1108 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
1109 find SCC exits and perform a DFS walk with extra edges to
1110 compute a RPO with adjacent SCC members when requesting an
1111 iteration optimized order and populate the toplevel SCC array.
1112 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
1113 of max_rpo and fill it in from SCC extent info instead.
1115 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
1117 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
1118 (vec_test_lsbb_all_zeros): New define.
1119 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
1121 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
1122 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
1123 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
1124 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
1125 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
1126 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
1127 (xvtlsbbo, xvtlsbbz): New instruction expands.
1129 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
1131 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
1132 * config/riscv/riscv.c (riscv_option_override): Handle
1134 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
1135 flexible stack protector guard settings.
1136 (stack_protect_set_<mode>): Ditto.
1137 (stack_protect_test): Ditto.
1138 (stack_protect_test_<mode>): Ditto.
1139 * config/riscv/riscv.opt (mstack-protector-guard=,
1140 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
1142 * doc/invoke.texi (Option Summary) [RISC-V Options]:
1143 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
1144 -mstack-protector-guard-offset=.
1145 (RISC-V Options): Ditto.
1147 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
1150 * configure: Regenerated.
1152 2020-07-30 Richard Biener <rguenther@suse.de>
1154 PR tree-optimization/96370
1155 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
1156 code parameter and use it instead of picking it up from
1157 the stmt that is being rewritten.
1158 (reassociate_bb): Pass down the operation code.
1160 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
1161 Tom de Vries <tdevries@suse.de>
1163 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
1164 (VECELEM): New mode attribute for a vector's uppercase element mode.
1165 (Vecelem): New mode attribute for a vector's lowercase element mode.
1166 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
1167 (*vec_set<mode>_3): New instructions.
1168 (vec_set<mode>): New expander to generate one of the above insns.
1169 (vec_extract<mode><Vecelem>): New instruction.
1171 2020-07-30 Martin Liska <mliska@suse.cz>
1174 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
1175 -m32. Start using libcall from 128+ bytes.
1177 2020-07-30 Martin Liska <mliska@suse.cz>
1179 * config/i386/x86-tune-costs.h: Change code formatting.
1181 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
1183 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
1185 2020-07-29 Fangrui Song <maskray@google.com>
1188 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
1189 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
1191 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
1193 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
1195 (arm_mve_mode_and_operands_type_check): Declare prototype.
1196 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
1197 _arm_coproc_mem_operand.
1198 (arm_coproc_mem_operand_wb): New function to cover full, limited
1200 (arm_coproc_mem_operand_no_writeback): New constraint for memory
1201 operand with no writeback.
1202 (arm_print_operand): Extend 'E' specifier for memory operand
1203 that does not support writeback.
1204 (arm_mve_mode_and_operands_type_check): New constraint check for
1205 MVE memory operands.
1206 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
1208 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
1210 (*mov_store_vfp_hf16): New pattern for vstr.16.
1211 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
1213 2020-07-29 Richard Biener <rguenther@suse.de>
1215 PR tree-optimization/96349
1216 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
1217 condition runs into a loop PHI with an abnormal entry value give up.
1219 2020-07-29 Richard Biener <rguenther@suse.de>
1221 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
1222 cache if we removed any SIMD UID SSA defs.
1223 * gimple-loop-interchange.cc (pass_linterchange::execute):
1224 Reset the scev cache if we interchanged a loop.
1226 2020-07-29 Richard Biener <rguenther@suse.de>
1228 PR tree-optimization/95679
1229 * tree-ssa-propagate.h
1230 (substitute_and_fold_engine::propagate_into_phi_args): Return
1231 whether anything changed.
1232 * tree-ssa-propagate.c
1233 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
1234 (substitute_and_fold_dom_walker::before_dom_children): Update
1237 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1239 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
1240 Ensure that loop variable npeel_tmp advances in each iteration.
1242 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
1244 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
1246 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
1248 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
1249 default_elf_asm_output_external.
1251 2020-07-28 Sergei Trofimovich <siarheit@google.com>
1254 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
1255 unoptimized callers as undead.
1257 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
1258 Richard Biener <rguenther@suse.de>
1260 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
1261 (parity(~x) -> parity(x)): New simplification.
1262 (parity(x)^parity(y) -> parity(x^y)): New simplification.
1263 (parity(x&1) -> x&1): New simplification.
1264 (popcount(x) -> x>>C): New simplification.
1266 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
1267 Tom de Vries <tdevries@suse.de>
1269 * config/nvptx/nvptx.md (extendqihi2): New instruction.
1270 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
1272 2020-07-28 Jakub Jelinek <jakub@redhat.com>
1275 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
1276 instead of trying to rediscover them in the body.
1277 (initialize_argument_information): Adjust caller.
1279 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
1281 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
1282 to determine peel_iters_epilogue to...
1283 (vect_get_peel_iters_epilogue): ...this new function.
1284 (vect_estimate_min_profitable_iters): Refactor cost calculation on
1285 peel_iters_prologue and peel_iters_epilogue.
1287 2020-07-27 Martin Sebor <msebor@redhat.com>
1289 PR tree-optimization/84079
1290 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
1291 Only allow just-past-the-end references for the most significant
1294 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
1297 * opts.c (check_alignment_argument): Set the -falign-Name
1298 on/off flag on and set the -falign-Name string value null,
1299 when the command-line specified argument is zero.
1301 2020-07-27 Martin Liska <mliska@suse.cz>
1303 PR tree-optimization/96058
1304 * expr.c (string_constant): Build string_constant only
1305 for a type that has same precision as char_type_node
1306 and is an integral type.
1308 2020-07-27 Richard Biener <rguenther@suse.de>
1310 * var-tracking.c (variable_tracking_main_1): Remove call
1311 to mark_dfs_back_edges.
1313 2020-07-27 Martin Liska <mliska@suse.cz>
1315 PR tree-optimization/96128
1316 * tree-vect-generic.c (expand_vector_comparison): Do not expand
1317 vector comparison with VEC_COND_EXPR.
1319 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
1322 * common.opt: Add -fcf-protection=check.
1323 * flag-types.h (cf_protection_level): Add CF_CHECK.
1324 * lto-wrapper.c (merge_and_complain): Issue an error for
1325 mismatching -fcf-protection values with -fcf-protection=check.
1326 Otherwise, merge -fcf-protection values.
1327 * doc/invoke.texi: Document -fcf-protection=check.
1329 2020-07-27 Martin Liska <mliska@suse.cz>
1332 * symbol-summary.h: Call vec_safe_reserve before grow is called
1333 in order to grow to a reasonable size.
1334 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
1337 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
1339 * configure.ac (out-of-tree linker .hidden support): Don't turn off
1340 for mmix-knuth-mmixware.
1341 * configure: Regenerate.
1343 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
1345 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1346 Set the default value for -mblock-ops-unaligned-vsx.
1347 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
1348 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
1350 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
1352 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
1353 with default_asm_output_ident_directive.
1355 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
1357 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
1358 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
1360 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
1361 Clement Chigot <clement.chigot@atos.net>
1363 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
1365 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
1368 (ASM_CPU_SPEC): Remove vsx and altivec options.
1369 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
1372 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
1373 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
1374 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
1377 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
1380 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
1381 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
1383 (CPLUSPLUS_CPP_SPEC): Same.
1386 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
1387 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
1388 * config/rs6000/defaultaix64.h: Delete.
1390 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
1392 * config/rs6000/rs6000.opt: Delete -mpower10.
1394 2020-07-24 Alexandre Oliva <oliva@adacore.com>
1396 * config/i386/intelmic-mkoffload.c
1397 (generate_target_descr_file): Use dumppfx for save_temps
1398 files. Pass -dumpbase et al down to the compiler.
1399 (generate_target_offloadend_file): Likewise.
1400 (generate_host_descr_file): Likewise.
1401 (prepare_target_image): Likewise. Move out_obj_filename
1403 (main): ... here. Detect -dumpbase, set dumppfx too.
1405 2020-07-24 Alexandre Oliva <oliva@adacore.com>
1408 * gcc.c (process_command): Adjust and document conditions to
1411 2020-07-24 Matthias Klose <doko@ubuntu.com>
1413 * config/aarch64/aarch64.c (+aarch64_offload_options,
1414 TARGET_OFFLOAD_OPTIONS): New.
1416 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
1419 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
1421 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
1423 PR rtl-optimization/96298
1424 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
1425 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
1427 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
1429 PR gcov-profile/96267
1430 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
1432 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
1434 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
1435 (rs6000_adjust_vect_cost_per_stmt): ... here.
1436 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
1437 rs6000_adjust_vect_cost_per_stmt.
1439 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
1441 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
1442 IFN_LEN_LOAD and IFN_LEN_STORE.
1443 (get_alias_ptr_type_for_ptr_address): Likewise.
1445 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
1448 * asan.c (asan_shadow_offset_set_p): New.
1449 * asan.h (asan_shadow_offset_set_p): Ditto.
1450 * toplev.c (process_options): Allow -fsanitize=kernel-address
1451 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
1452 asan stack protection is enabled.
1454 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
1457 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
1458 little-endian memory ordering.
1460 2020-07-22 Nathan Sidwell <nathan@acm.org>
1462 * dumpfile.c (parse_dump_option): Deal with filenames
1465 2020-07-22 Nathan Sidwell <nathan@acm.org>
1467 * incpath.c (add_path): Avoid multiple strlen calls.
1469 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1471 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
1472 is not NULL_RTX before use.
1474 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1476 * expr.c (convert_modes): Allow a constant integer to be converted to
1477 any scalar int mode.
1479 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
1481 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
1482 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
1483 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
1484 Change mode parameter to machine_mode.
1485 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
1487 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
1488 Change mode parameter to machine_mode.
1489 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
1490 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
1492 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
1494 * doc/languages.texi: Fix “then”/“than” typo.
1496 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
1499 * config/i386/i386-protos.h (ix86_local_alignment): Add
1500 another function parameter may_lower alignment. Default is
1502 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
1504 (ix86_local_alignment): Amend ix86_local_alignment to accept
1505 another parameter may_lower. If may_lower is true, new align
1506 may be lower than incoming alignment. If may_lower is false,
1507 new align will be greater or equal to incoming alignment.
1508 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
1509 * doc/tm.texi: Regenerate.
1510 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
1512 * target.def (lower_local_decl_alignment): New hook.
1514 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
1517 * config/i386/sync.md (mfence_sse2): Enable for
1518 TARGET_64BIT and TARGET_SSE2.
1519 (mfence_nosse): Always enable.
1521 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1523 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
1525 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
1526 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
1527 msp430_do_not_relax_short_jumps.
1529 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1531 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
1533 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1535 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
1538 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
1540 PR rtl-optimization/89310
1541 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
1543 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
1545 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
1546 allocated size and set current_function_static_stack_size, if
1547 flag_stack_usage_info.
1549 2020-07-20 Sergei Trofimovich <siarheit@google.com>
1552 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
1553 to get crtendS.o for !no-pie mode.
1554 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
1556 2020-07-20 Yang Yang <yangyang305@huawei.com>
1558 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
1559 VIEW_CONVERT_EXPRs if the arguments types and return type
1560 of simd clone function are distinct with the vectype of stmt.
1562 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
1565 * config/i386/i386.h (TARGET_AVOID_MFENCE):
1566 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
1567 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
1568 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
1569 referred memory in word_mode.
1570 (mem_thread_fence): Do not generate mfence_sse2 pattern when
1571 TARGET_AVOID_MFENCE is true.
1572 (atomic_store<mode>): Update for rename.
1573 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
1574 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
1576 2020-07-20 Martin Sebor <msebor@redhat.com>
1580 * builtins.c (inline_expand_builtin_string_cmp): Rename...
1581 (inline_expand_builtin_bytecmp): ...to this.
1582 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
1583 (expand_builtin_memory_copy_args): Handle object representations
1584 with embedded nul bytes.
1585 (expand_builtin_memcmp): Same.
1586 (expand_builtin_strcmp): Adjust call to naming change.
1587 (expand_builtin_strncmp): Same.
1588 * expr.c (string_constant): Create empty strings with nonzero size.
1589 * fold-const.c (c_getstr): Rename locals and update comments.
1590 * tree.c (build_string): Accept null pointer argument.
1591 (build_string_literal): Same.
1592 * tree.h (build_string): Provide a default.
1593 (build_string_literal): Same.
1595 2020-07-20 Richard Biener <rguenther@suse.de>
1597 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
1598 write-only post array.
1600 2020-07-20 Jakub Jelinek <jakub@redhat.com>
1603 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
1604 of a bitfield not aligned on byte boundaries try to
1605 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
1606 adjust it depending on endianity.
1608 2020-07-20 Jakub Jelinek <jakub@redhat.com>
1611 * fold-const.c (native_encode_initializer): Handle bit-fields.
1613 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
1615 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1616 Set param_vect_partial_vector_usage to 0 explicitly.
1617 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
1618 * optabs-query.c (get_len_load_store_mode): New function.
1619 * optabs-query.h (get_len_load_store_mode): New declare.
1620 * params.opt (vect-partial-vector-usage): New.
1621 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
1622 handlings for vectorization using length-based partial vectors, call
1623 vect_gen_len for length generation, and rename some variables with
1624 items instead of scalars.
1625 (vect_set_loop_condition_partial_vectors): Add the handlings for
1626 vectorization using length-based partial vectors.
1627 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
1628 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
1629 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
1630 epil_using_partial_vectors_p.
1631 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
1632 for lengths destruction.
1633 (vect_verify_loop_lens): New function.
1634 (vect_analyze_loop): Add handlings for epilogue of loop when it's
1635 marked to use vectorization using partial vectors.
1636 (vect_analyze_loop_2): Add the check to allow only one vectorization
1637 approach using partial vectorization at the same time. Check param
1638 vect-partial-vector-usage for partial vectors decision. Mark
1639 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
1640 considerable to use partial vectors. Call release_vec_loop_controls
1641 for lengths destruction.
1642 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
1643 using length-based partial vectors.
1644 (vect_record_loop_mask): Init factor to 1 for vectorization using
1645 mask-based partial vectors.
1646 (vect_record_loop_len): New function.
1647 (vect_get_loop_len): Likewise.
1648 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
1649 checks for vectorization using length-based partial vectors. Factor
1650 some code to lambda function get_valid_nvectors.
1651 (vectorizable_store): Add handlings when using length-based partial
1653 (vectorizable_load): Likewise.
1654 (vect_gen_len): New function.
1655 * tree-vectorizer.h (struct rgroup_controls): Add field factor
1656 mainly for length-based partial vectors.
1657 (vec_loop_lens): New typedef.
1658 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
1659 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
1660 (LOOP_VINFO_LENS): Likewise.
1661 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
1662 (vect_record_loop_len): New declare.
1663 (vect_get_loop_len): Likewise.
1664 (vect_gen_len): Likewise.
1666 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
1668 * config/mmix/mmix.c (mmix_option_override): Reinstate default
1669 integer-emitting targetm.asm_out pseudos when dumping detailed
1671 (mmix_assemble_integer): Update comment.
1673 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
1677 * config/i386/cpuid.h: Add include guard.
1680 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
1683 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
1685 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
1688 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
1689 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
1690 (define_attr "enabled"): Handle p9.
1692 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
1694 * function.c (assign_parm_setup_block): Use the macro
1695 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
1696 targetm.truly_noop_truncation directly.
1698 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
1702 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
1703 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
1704 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
1705 VF1_AVX512ER_128_256.
1707 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1709 * doc/sourcebuild.texi (dg-set-compiler-env-var,
1710 dg-set-target-env-var): Document.
1712 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1714 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
1716 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1718 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
1721 2020-07-17 Tamar Christina <tamar.christina@arm.com>
1723 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
1724 (parse_field): Use std::string.
1725 (split_words, readline, find_field): New.
1726 (host_detect_local_cpu): Fix truncation issues.
1728 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
1730 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
1731 (ELFOSABI_AMDGPU_HSA): Likewise.
1732 (ELFABIVERSION_AMDGPU_HSA): Likewise.
1733 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
1734 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
1735 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
1738 2020-07-17 Andrew Pinski <apinksi@marvell.com>
1739 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
1742 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
1743 (aarch64_expand_vec_perm_const_1): Call it.
1744 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
1745 public, and add a "@" prefix.
1747 2020-07-17 Andrew Pinski <apinksi@marvell.com>
1748 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
1751 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
1752 (aarch64_expand_vec_perm_const_1): Call it.
1754 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
1756 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
1757 Add new field flags.
1758 (VAR1): Add new field FLAG in macro.
1774 (aarch64_general_fold_builtin): Likewise.
1775 (aarch64_general_gimple_fold_builtin): Likewise.
1776 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
1777 each built-in function.
1778 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
1780 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
1783 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
1784 expanders to generate the pattern.
1785 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
1786 '*' to have callable expanders.
1788 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
1789 Segher Boessenkool <segher@kernel.crashing.org>
1792 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
1795 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
1798 * config/i386/sync.md
1799 (peephole2 to remove unneded compare after CMPXCHG):
1800 New pattern, also handle XOR zeroing and load of -1 by OR.
1802 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
1804 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
1805 (ix86_adjust_stack_and_probe): Delete.
1806 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
1807 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
1808 a small dope beyond SIZE bytes.
1809 (ix86_emit_probe_stack_range): Use local variable.
1810 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
1811 and tidy up the stack checking code.
1812 * explow.c (get_stack_check_protect): Fix head comment.
1813 (anti_adjust_stack_and_probe_stack_clash): Likewise.
1814 (allocate_dynamic_stack_space): Add comment.
1815 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
1816 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
1818 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
1820 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
1821 (EM_AMDGPU): New macro.
1822 (ELFOSABI_AMDGPU_HSA): New macro.
1823 (ELFABIVERSION_AMDGPU_HSA): New macro.
1824 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
1825 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
1826 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
1827 (R_AMDGPU_NONE): New macro.
1828 (R_AMDGPU_ABS32_LO): New macro.
1829 (R_AMDGPU_ABS32_HI): New macro.
1830 (R_AMDGPU_ABS64): New macro.
1831 (R_AMDGPU_REL32): New macro.
1832 (R_AMDGPU_REL64): New macro.
1833 (R_AMDGPU_ABS32): New macro.
1834 (R_AMDGPU_GOTPCREL): New macro.
1835 (R_AMDGPU_GOTPCREL32_LO): New macro.
1836 (R_AMDGPU_GOTPCREL32_HI): New macro.
1837 (R_AMDGPU_REL32_LO): New macro.
1838 (R_AMDGPU_REL32_HI): New macro.
1839 (reserved): New macro.
1840 (R_AMDGPU_RELATIVE64): New macro.
1841 (gcn_s1_name): Delete global variable.
1842 (gcn_s2_name): Delete global variable.
1843 (gcn_o_name): Delete global variable.
1844 (gcn_cfile_name): Delete global variable.
1845 (files_to_cleanup): New global variable.
1846 (offload_abi): New global variable.
1847 (tool_cleanup): Use files_to_cleanup, not explicit list.
1848 (copy_early_debug_info): New function.
1849 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
1851 Create files_to_cleanup obstack.
1852 Recognize -march options.
1853 Copy early debug info from input .o files.
1855 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
1857 * Makefile.in (TAGS): Remove 'params.def'.
1859 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
1861 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
1862 targets that return false, indicating SUBREGs shouldn't be
1863 used, also need to provide a trunc?i?i2 optab that performs this
1865 * doc/tm.texi: Regenerate.
1867 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
1870 * config/i386/sync.md
1871 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
1873 2020-07-15 Jakub Jelinek <jakub@redhat.com>
1876 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
1877 member to first_inner_iterations, adjust comment.
1878 * omp-general.c (omp_extract_for_data): Adjust for the above change.
1879 Always use n1first and n2first to compute it, rather than depending
1880 on single_nonrect_cond_code. Similarly, always compute factor
1881 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
1882 depending on single_nonrect_cond_code.
1883 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
1884 to first_inner_iterations and min_inner_iterationsd to
1885 first_inner_iterationsd.
1887 2020-07-15 Jakub Jelinek <jakub@redhat.com>
1890 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
1891 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
1892 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
1893 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
1894 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
1895 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
1896 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
1897 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
1898 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
1899 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
1900 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
1901 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
1902 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
1903 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
1904 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
1905 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
1906 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
1909 2020-07-15 Jakub Jelinek <jakub@redhat.com>
1912 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
1914 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
1915 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
1918 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
1920 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
1922 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
1924 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
1926 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
1927 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
1929 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
1931 PR preprocessor/49973
1933 * common.opt: Handle -ftabstop here instead of in c-family
1934 options. Add -fdiagnostics-column-unit= and
1935 -fdiagnostics-column-origin= options.
1936 * opts.c (common_handle_option): Handle the new options.
1937 * diagnostic-format-json.cc (json_from_expanded_location): Add
1938 diagnostic_context argument. Use it to convert column numbers as per
1940 (json_from_location_range): Likewise.
1941 (json_from_fixit_hint): Likewise.
1942 (json_end_diagnostic): Pass the new context argument to helper
1943 functions above. Add "column-origin" field to the output.
1944 (test_unknown_location): Add the new context argument to calls to
1946 (test_bad_endpoints): Likewise.
1947 * diagnostic-show-locus.c
1948 (exploc_with_display_col::exploc_with_display_col): Support
1950 (layout_point::layout_point): Make use of class
1951 exploc_with_display_col.
1952 (layout_range::layout_range): Likewise.
1953 (struct line_bounds): Clarify that the units are now always
1954 display columns. Rename members accordingly. Add constructor.
1955 (layout::print_source_line): Add support for tab expansion.
1956 (make_range): Adapt to class layout_range changes.
1957 (layout::maybe_add_location_range): Likewise.
1958 (layout::layout): Adapt to class exploc_with_display_col changes.
1959 (layout::calculate_x_offset_display): Support tabstop parameter.
1960 (layout::print_annotation_line): Adapt to struct line_bounds changes.
1961 (layout::print_line): Likewise.
1962 (line_label::line_label): Add diagnostic_context argument.
1963 (get_affected_range): Likewise.
1964 (get_printed_columns): Likewise.
1965 (layout::print_any_labels): Adapt to struct line_label changes.
1966 (class correction): Add m_tabstop member.
1967 (correction::correction): Add tabstop argument.
1968 (correction::compute_display_cols): Use m_tabstop.
1969 (class line_corrections): Add m_context member.
1970 (line_corrections::line_corrections): Add diagnostic_context argument.
1971 (line_corrections::add_hint): Use m_context to handle tabstops.
1972 (layout::print_trailing_fixits): Adapt to class line_corrections
1974 (test_layout_x_offset_display_utf8): Support tabstop parameter.
1975 (test_layout_x_offset_display_tab): New selftest.
1976 (test_one_liner_colorized_utf8): Likewise.
1977 (test_tab_expansion): Likewise.
1978 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
1979 (diagnostic_show_locus_c_tests): Likewise.
1980 (test_overlapped_fixit_printing): Adapt to helper class and
1982 (test_overlapped_fixit_printing_utf8): Likewise.
1983 (test_overlapped_fixit_printing_2): Likewise.
1984 * diagnostic.h (enum diagnostics_column_unit): New enum.
1985 (struct diagnostic_context): Add members for the new options.
1986 (diagnostic_converted_column): Declare.
1987 (json_from_expanded_location): Add new context argument.
1988 * diagnostic.c (diagnostic_initialize): Initialize new members.
1989 (diagnostic_converted_column): New function.
1990 (maybe_line_and_column): Be willing to output a column of 0.
1991 (diagnostic_get_location_text): Convert column number as per the new
1993 (diagnostic_report_current_module): Likewise.
1994 (assert_location_text): Add origin and column_unit arguments for
1995 testing the new functionality.
1996 (test_diagnostic_get_location_text): Test the new functionality.
1997 * doc/invoke.texi: Document the new options and behavior.
1998 * input.h (location_compute_display_column): Add tabstop argument.
1999 * input.c (location_compute_display_column): Likewise.
2000 (test_cpp_utf8): Add selftests for tab expansion.
2001 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
2002 new context argument to json_from_expanded_location().
2004 2020-07-14 Jakub Jelinek <jakub@redhat.com>
2007 * expr.c (expand_constructor): Don't create temporary for store to
2008 volatile MEM if exp has an addressable type.
2010 2020-07-14 Nathan Sidwell <nathan@acm.org>
2012 * hash-map.h (hash_map::get): Note it is a pointer to value.
2013 * incpath.h (incpath_kind): Align comments.
2015 2020-07-14 Nathan Sidwell <nathan@acm.org>
2017 * tree-core.h (tree_decl_with_vis, tree_function_decl):
2018 Note additional padding on 64-bits
2019 * tree.c (cache_integer_cst): Note why no caching of enum literals.
2020 (get_tree_code_name): Robustify error case.
2022 2020-07-14 Nathan Sidwell <nathan@acm.org>
2024 * doc/gty.texi: Fic gt_cleare_cache name.
2025 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
2027 2020-07-14 Jakub Jelinek <jakub@redhat.com>
2029 * omp-general.h (struct omp_for_data): Add adjn1 member.
2030 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
2031 count computing if n1, n2 or step are not INTEGER_CST earlier.
2032 Narrow the outer iterator range if needed so that non-rect loop
2033 has at least one iteration for each outer range iteration. Compute
2035 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
2036 instead of the outer loop's n1.
2038 2020-07-14 Matthias Klose <doko@ubuntu.com>
2041 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
2042 error on different values for -fcf-protection.
2043 (append_compiler_options): Pass -fcf-protection option.
2044 (find_and_merge_options): Add decoded options as parameter,
2045 pass decoded_options to merge_and_complain.
2046 (run_gcc): Pass decoded options to find_and_merge_options.
2047 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
2049 2020-07-13 Alan Modra <amodra@gmail.com>
2051 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
2052 and sibcall_local64.
2053 (sibcall_value_local): Similarly.
2055 2020-07-13 Nathan Sidwell <nathan@acm.org>
2057 * Makefile.in (distclean): Remove long gone cxxmain.c
2059 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
2062 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
2063 length to cmpstrnqi patterns.
2065 2020-07-13 Jakub Jelinek <jakub@redhat.com>
2068 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
2071 2020-07-13 Richard Biener <rguenther@suse.de>
2073 PR tree-optimization/96163
2074 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
2075 at least after region begin.
2077 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2079 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
2080 __ARM_FEATURE_PAC_DEFAULT support.
2082 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2085 * doc/extend.texi: Update the text for __builtin_return_address.
2087 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2090 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
2091 Disable return address signing if __builtin_eh_return is used.
2093 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
2097 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
2098 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
2099 (aarch64_return_addr): Use aarch64_return_addr_rtx.
2100 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
2102 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
2105 * tree.h (virtual_method_call_p): Add a default-false parameter
2106 that indicates whether the function is being called from dump
2108 (obj_type_ref_class): Likewise.
2109 * tree.c (virtual_method_call_p): Likewise.
2110 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
2111 type information for the type when the parameter is false.
2112 * tree-pretty-print.c (dump_generic_node): Update calls to
2113 virtual_method_call_p and obj_type_ref_class accordingly.
2115 2020-07-13 Julian Brown <julian@codesourcery.com>
2116 Thomas Schwinge <thomas@codesourcery.com>
2118 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
2119 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
2120 directives (see also PR92929).
2122 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
2124 * convert.c (convert_to_integer_1): Narrow integer operations
2125 even on targets that require explicit truncation instructions.
2127 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2130 * config/cris/cris-passes.def: New file.
2131 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
2132 * config/cris/cris.c: Add infrastructure bits and pass execute
2133 function cris_postdbr_cmpelim.
2134 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
2136 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2138 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
2140 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2143 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
2144 ("*addi_b_<mode>"): New pattern.
2145 ("*addsi3<setnz>"): Remove stale %-related comment.
2147 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
2149 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
2150 Use match_dup in output template, not match_operand.
2152 2020-07-13 Richard Biener <rguenther@suse.de>
2154 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
2155 (vt_find_locations): Eliminate visited bitmap in favor of
2156 RPO order check. Dump statistics about the number of
2157 local BB dataflow computes.
2159 2020-07-13 Richard Biener <rguenther@suse.de>
2162 * expr.c (expand_constructor): Make a temporary also if we're
2163 storing to volatile memory.
2165 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
2167 * config/rs6000/rs6000.md (rotl_unspec): New
2168 define_insn_and_split.
2170 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
2172 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
2173 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
2175 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
2177 * internal-fn.c (expand_mul_overflow): When checking for signed
2178 overflow from a widening multiplication, we access the truncated
2179 lowpart RES twice, so keep this value in a pseudo register.
2181 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
2183 PR tree-optimization/96146
2184 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
2185 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
2186 involving POLY_INT_CSTs.
2188 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
2191 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
2192 create named section for VAR_DECL or FUNCTION_DECL.
2194 2020-07-10 Joseph Myers <joseph@codesourcery.com>
2196 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
2199 2020-07-10 Alexander Popov <alex.popov@linux.com>
2201 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
2203 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
2206 * expr.c (expand_expr_real_2): When reducing bit fields,
2207 clear the target if it has a different mode from the expression.
2208 (reduce_to_bit_field_precision): Don't do that here. Instead
2209 assert that the target already has the correct mode.
2211 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
2215 * config/arm/arm.c (arm_attribute_table): Add
2216 "Advanced SIMD type".
2217 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
2218 attributes are equal.
2219 * config/arm/arm-builtins.c: Include stringpool.h and
2221 (arm_mangle_builtin_vector_type): Use the mangling recorded
2222 in the "Advanced SIMD type" attribute.
2223 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
2224 attribute to each Advanced SIMD type, using the mangled type
2225 as the attribute's single argument.
2227 2020-07-10 Carl Love <cel@us.ibm.com>
2229 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
2230 (VSX_MM4): New define_mode_iterator.
2231 (vec_mtvsrbmi): New define_insn.
2232 (vec_mtvsr_<mode>): New define_insn.
2233 (vec_cntmb_<mode>): New define_insn.
2234 (vec_extract_<mode>): New define_insn.
2235 (vec_expand_<mode>): New define_insn.
2236 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
2237 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
2238 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
2239 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
2241 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
2242 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
2243 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
2244 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
2245 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
2246 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
2247 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
2248 (BU_P10_OVERLOAD_2): Add defition for cntm.
2249 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
2250 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
2251 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
2252 (altivec_overloaded_builtins): Add overloaded argument entries for
2253 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
2254 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
2255 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
2256 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
2257 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
2258 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
2259 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
2260 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
2261 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
2262 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
2263 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
2264 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
2265 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
2266 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
2267 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
2268 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
2269 P10_BUILTIN_VEXPANDMQ.
2270 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
2271 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
2272 VEXPANDM, VEXTRACTM.
2274 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
2277 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
2278 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
2279 v16qi_ftype_pcvoid with correct number of parameters.
2281 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
2284 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
2285 TARGET_AVX512VL when enabling FMA.
2287 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
2288 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2289 Iain Apreotesei <iain.apreotesei@arm.com>
2291 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
2293 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
2294 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
2295 (arm_target_insn_ok_for_lob): New function.
2296 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
2297 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
2298 (dls_insn): Add new patterns.
2299 (doloop_end): Modify to select LR when LOB is available.
2300 * config/arm/unspecs.md: Add new unspec.
2301 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
2302 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
2305 2020-07-10 Richard Biener <rguenther@suse.de>
2307 PR tree-optimization/96133
2308 * gimple-fold.c (fold_array_ctor_reference): Do not
2309 recurse to folding a CTOR that does not fully cover the
2312 2020-07-10 Cui,Lili <lili.cui@intel.com>
2314 * common/config/i386/cpuinfo.h
2315 (get_intel_cpu): Handle sapphirerapids.
2316 * common/config/i386/i386-common.c
2317 (processor_names): Add sapphirerapids and alderlake.
2318 (processor_alias_table): Add sapphirerapids and alderlake.
2319 * common/config/i386/i386-cpuinfo.h
2320 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
2321 INTEL_COREI7_ALDERLAKE.
2322 * config.gcc: Add -march=sapphirerapids and alderlake.
2323 * config/i386/driver-i386.c
2324 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
2325 * config/i386/i386-c.c
2326 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
2327 * config/i386/i386-options.c
2328 (m_SAPPHIRERAPIDS) : Define.
2329 (m_ALDERLAKE): Ditto.
2330 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
2331 (processor_cost_table): Add sapphirerapids and alderlake.
2332 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
2333 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
2334 * config/i386/i386.h
2335 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
2336 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
2337 PROCESSOR_ALDERLAKE.
2339 (PTA_CLDEMOTE): Ditto.
2340 (PTA_SERIALIZE): Ditto.
2341 (PTA_TSXLDTRK): New.
2342 (PTA_SAPPHIRERAPIDS): Ditto.
2343 (PTA_ALDERLAKE): Ditto.
2344 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
2345 PROCESSOR_ALDERLAKE.
2346 * doc/extend.texi: Add sapphirerapids and alderlake.
2347 * doc/invoke.texi: Add sapphirerapids and alderlake.
2349 2020-07-10 Martin Liska <mliska@suse.cz>
2351 * dumpfile.c [profile-report]: Add new profile dump.
2352 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
2353 * passes.c (pass_manager::dump_profile_report): Change stderr
2356 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
2358 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
2359 is adjusted by considering peeled prologue for non
2360 vect_use_loop_mask_for_alignment_p cases.
2362 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
2365 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
2366 specific types __vector_quad and __vector_pair, and initialize the
2367 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
2368 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
2369 Remove now unneeded mask variable.
2370 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
2371 OPTION_MASK_MMA flag for power10 if not already set.
2373 2020-07-09 Richard Biener <rguenther@suse.de>
2375 PR tree-optimization/96133
2376 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
2377 status between stmts.
2379 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
2382 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
2383 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
2384 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
2385 (rsqrtv16sf2): Removed.
2387 2020-07-09 Richard Biener <rguenther@suse.de>
2389 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
2390 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
2391 (vect_slp_analyze_instance_alignment): ... this.
2392 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
2393 (vect_verify_datarefs_alignment): Likewise.
2394 (vect_enhance_data_refs_alignment): Do not call
2395 vect_verify_datarefs_alignment.
2396 (vect_slp_analyze_node_alignment): Rename from
2397 vect_slp_analyze_and_verify_node_alignment and do not
2398 call verify_data_ref_alignment.
2399 (vect_slp_analyze_instance_alignment): Rename from
2400 vect_slp_analyze_and_verify_instance_alignment.
2401 * tree-vect-stmts.c (vectorizable_store): Dump when
2402 we vectorize an unaligned access.
2403 (vectorizable_load): Likewise.
2404 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
2405 vect_verify_datarefs_alignment.
2406 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
2408 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
2410 PR tree-optimization/95804
2411 * tree-loop-distribution.c (break_alias_scc_partitions): Force
2412 negative post order to reduction partition.
2414 2020-07-09 Jakub Jelinek <jakub@redhat.com>
2416 * omp-general.h (struct omp_for_data): Add min_inner_iterations
2418 * omp-general.c (omp_extract_for_data): Initialize them and remember
2419 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
2420 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
2421 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
2422 (expand_omp_for_init_vars): For
2423 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
2424 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
2425 using fallback method when possible.
2427 2020-07-09 Omar Tahir <omar.tahir@arm.com>
2429 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
2430 last_moveable_pseudo before returning.
2432 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
2434 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
2435 __ARM_FEATURE_BTI_DEFAULT support.
2437 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
2439 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
2441 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
2442 stub registers class.
2443 (aarch64_class_max_nregs): Likewise.
2444 (aarch64_register_move_cost): Likewise.
2445 (aarch64_sls_shared_thunks): Global array to store stub labels.
2446 (aarch64_sls_emit_function_stub): New.
2447 (aarch64_create_blr_label): New.
2448 (aarch64_sls_emit_blr_function_thunks): New.
2449 (aarch64_sls_emit_shared_blr_thunks): New.
2450 (aarch64_asm_file_end): New.
2451 (aarch64_indirect_call_asm): New.
2452 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
2453 (TARGET_ASM_FUNCTION_EPILOGUE): Use
2454 aarch64_sls_emit_blr_function_thunks.
2455 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
2456 (enum reg_class): Add STUB_REGS class.
2457 (machine_function): Introduce `call_via` array for
2458 function-local stub labels.
2459 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
2460 aarch64_indirect_call_asm to emit code when hardening BLR
2462 * config/aarch64/constraints.md (Ucr): New constraint
2463 representing registers for indirect calls. Is GENERAL_REGS
2464 usually, and STUB_REGS when hardening BLR instruction against
2466 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
2467 is also a general register.
2469 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
2471 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
2472 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
2473 speculation barrier after BR instruction if needs be.
2474 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
2476 (aarch64_sls_barrier): New.
2477 (aarch64_asm_trampoline_template): Add needed barriers.
2478 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
2480 (TRAMPOLINE_SIZE): Account for barrier.
2481 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
2482 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
2483 Emit barrier if needs be, also account for possible barrier using
2484 "sls_length" attribute.
2485 (sls_length): New attribute.
2486 (length): Determine default using any non-default sls_length
2489 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
2491 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
2493 (aarch64_harden_sls_blr_p): New.
2494 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
2496 (aarch64_harden_sls_retbr_p): New.
2497 (aarch64_harden_sls_blr_p): New.
2498 (aarch64_validate_sls_mitigation): New.
2499 (aarch64_override_options): Parse options for SLS mitigation.
2500 * config/aarch64/aarch64.opt (-mharden-sls): New option.
2501 * doc/invoke.texi: Document new option.
2503 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
2505 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
2506 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
2507 or nested-cycle reduction.
2509 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
2511 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
2512 for fully masking to be more common.
2514 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
2516 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
2518 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
2519 Document __builtin_thread_pointer.
2521 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
2523 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
2524 Abort if any arguments on stack.
2526 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
2528 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
2529 either type has reverse scalar storage order.
2530 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
2531 a memory copy if either type has reverse scalar storage order.
2533 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
2535 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
2536 on to the native compiler, if used.
2537 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
2539 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
2541 * config/rs6000/altivec.h (vec_vmsumudm): New define.
2542 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
2543 (altivec_vmsumudm): New define_insn.
2544 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
2545 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
2546 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
2547 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
2548 * doc/extend.texi: Add document for vmsumudm behind vmsum.
2550 2020-07-08 Richard Biener <rguenther@suse.de>
2552 * tree-vect-stmts.c (get_group_load_store_type): Pass
2553 in the SLP node and the alignment support scheme output.
2555 (get_load_store_type): Likewise.
2556 (vectorizable_store): Adjust.
2557 (vectorizable_load): Likewise.
2559 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
2562 * expr.c (expand_expr_real_2): Get the mode from the type rather
2563 than the rtx, and assert that it is consistent with the mode of
2564 the rtx (where known). Optimize all constant integers, not just
2565 those that can be represented in poly_int64.
2567 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
2569 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
2570 (len_store_v16qi): Likewise.
2572 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
2574 * doc/md.texi (len_load_@var{m}): Document.
2575 (len_store_@var{m}): Likewise.
2576 * internal-fn.c (len_load_direct): New macro.
2577 (len_store_direct): Likewise.
2578 (expand_len_load_optab_fn): Likewise.
2579 (expand_len_store_optab_fn): Likewise.
2580 (direct_len_load_optab_supported_p): Likewise.
2581 (direct_len_store_optab_supported_p): Likewise.
2582 (expand_mask_load_optab_fn): New macro. Original renamed to ...
2583 (expand_partial_load_optab_fn): ... here. Add handlings for
2585 (expand_mask_store_optab_fn): New macro. Original renamed to ...
2586 (expand_partial_store_optab_fn): ... here. Add handlings for
2588 (internal_load_fn_p): Handle IFN_LEN_LOAD.
2589 (internal_store_fn_p): Handle IFN_LEN_STORE.
2590 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
2591 * internal-fn.def (LEN_LOAD): New internal function.
2592 (LEN_STORE): Likewise.
2593 * optabs.def (len_load_optab, len_store_optab): New optab.
2595 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
2597 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
2598 thunderx2t99_vector_cost): Likewise.
2600 2020-07-07 Richard Biener <rguenther@suse.de>
2602 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
2603 group overlap condition to allow negative step DR groups.
2604 * tree-vect-stmts.c (get_group_load_store_type): For
2605 multi element SLP groups force VMAT_STRIDED_SLP when the step
2608 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
2610 * doc/generic.texi: Fix typo.
2612 2020-07-07 Richard Biener <rguenther@suse.de>
2614 * lto-streamer-out.c (cmp_symbol_files): Use the computed
2615 order map to sort symbols from the same sub-file together.
2616 (lto_output): Compute a map of sub-file to an order number
2617 it appears in the symbol output array.
2619 2020-07-06 Richard Biener <rguenther@suse.de>
2621 PR tree-optimization/96075
2622 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
2623 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
2624 for the misalignment calculation for negative step.
2626 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
2628 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
2629 (*vsub_addsi4): New instruction.
2631 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
2633 * config/cris/cris.md (movulsr): New peephole2.
2635 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
2637 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
2638 Correct gcc_assert of overlapping operands.
2640 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
2642 * config/cris/cris.c (cris_select_cc_mode): Always return
2643 CC_NZmode for matching comparisons. Clarify comments.
2644 * config/cris/cris-modes.def: Clarify mode comment.
2645 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
2647 (addsub, addsubbo, nd): New code iterator attributes.
2648 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
2649 iterator constructs instead of match_operator constructs.
2650 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
2651 "*extop<mode>si<setnz>".
2652 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
2653 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
2654 "*extop<mode>si<setnz>_swap".
2656 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
2658 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
2659 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
2661 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
2663 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
2664 were initially created for the assignment of a variable-sized
2665 object and whose source is now a string constant.
2666 * gimple-ssa-store-merging.c (struct merged_store_group): Document
2667 STRING_CST for rhs_code field.
2668 Add string_concatenation boolean field.
2669 (merged_store_group::merged_store_group): Initialize it as well as
2671 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
2672 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
2673 (merged_store_group::apply_stores): Clear it for small regions.
2674 Do not create a power-of-2-sized buffer if it is still true.
2675 And do not set bit_insertion here again.
2676 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
2677 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
2678 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
2679 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
2680 (count_multiple_uses): Return 0 for STRING_CST.
2681 (split_group): Do not split the group for a string concatenation.
2682 (imm_store_chain_info::output_merged_store): Constify and rename
2683 some local variables. Build an array type as destination type
2684 for a string concatenation, as well as a zero mask, and call
2685 build_string to build the source.
2686 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
2687 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
2688 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
2689 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
2690 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
2692 2020-07-03 Martin Jambor <mjambor@suse.cz>
2695 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
2696 mismatched accesses.
2698 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
2700 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
2701 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
2703 2020-07-03 Martin Liska <mliska@suse.cz>
2704 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2707 * gcov-dump.c (tag_function): Use gcov_position_t
2710 2020-07-03 Richard Biener <rguenther@suse.de>
2712 PR tree-optimization/96037
2713 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
2715 2020-07-03 Richard Biener <rguenther@suse.de>
2717 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
2718 original non-pattern stmts, look at the pattern stmt
2719 vectorization status.
2721 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
2723 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
2725 2020-07-03 Richard Biener <rguenther@suse.de>
2727 * tree-vectorizer.h (vec_info::insert_on_entry): New.
2728 (vec_info::insert_seq_on_entry): Likewise.
2729 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
2730 (vec_info::insert_seq_on_entry): Likewise.
2731 * tree-vect-stmts.c (vect_init_vector_1): Use
2732 vec_info::insert_on_entry.
2733 (vect_finish_stmt_generation): Set modified bit after
2735 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
2736 by using vec_info::insert_seq_on_entry and bypassing
2738 (vect_schedule_slp_instance): Deal with all-constant
2741 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
2742 Tom de Vries <tdevries@suse.de>
2745 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
2746 to access TYPE_SIZE (type). Return at least the mode's alignment.
2748 2020-07-02 Richard Biener <rguenther@suse.de>
2750 PR tree-optimization/96028
2751 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
2752 we have scalar stmts to use.
2753 (vect_slp_analyze_node_operations): When analyzing a child
2754 failed try externalizing the parent node.
2756 2020-07-02 Martin Jambor <mjambor@suse.cz>
2759 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
2760 argument index if necessary.
2762 2020-07-02 Martin Liska <mliska@suse.cz>
2765 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
2766 (expand_vector_comparison): Do not expand a comparison if all
2767 uses are consumed by a VEC_COND_EXPR.
2768 (expand_vector_operation): Change void return type to bool.
2769 (expand_vector_operations_1): Pass dce_ssa_names.
2771 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
2774 * system.h (NULL): Redefine to nullptr.
2776 2020-07-02 Jakub Jelinek <jakub@redhat.com>
2778 PR tree-optimization/95857
2779 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
2780 base_bb, remember all forced and non-local labels on it and later
2781 treat those as if they have NULL label_to_block. Formatting fix.
2784 2020-07-02 Richard Biener <rguenther@suse.de>
2786 PR tree-optimization/96022
2787 * tree-vect-stmts.c (vectorizable_shift): Only use the
2788 first vector stmt when extracting the scalar shift amount.
2789 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
2790 nodes with all-scalar children from scalars but not stores.
2791 (vect_analyze_slp_instance): Mark the node not failed.
2793 2020-07-02 Felix Yang <felix.yang@huawei.com>
2795 PR tree-optimization/95961
2796 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
2797 number of scalars instead of the number of vectors as an upper bound
2798 for the loop saving info about DR in the hash table. Remove unused
2801 2020-07-02 Jakub Jelinek <jakub@redhat.com>
2803 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
2804 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
2805 OpenMP non-rectangular loops. Use XALLOCAVEC.
2807 2020-07-02 Martin Liska <mliska@suse.cz>
2809 PR gcov-profile/95348
2810 * coverage.c (read_counts_file): Read only COUNTERS that are
2812 * gcov-dump.c (tag_function): Change signature from unsigned to
2814 (tag_blocks): Likewise.
2815 (tag_arcs): Likewise.
2816 (tag_lines): Likewise.
2817 (tag_counters): Likewise.
2818 (tag_summary): Likewise.
2819 * gcov.c (read_count_file): Read all non-zero counters
2822 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
2824 * config/riscv/multilib-generator (arch_canonicalize): Handle
2825 multi-letter extension.
2826 Using underline as separator between different extensions.
2828 2020-07-01 Pip Cet <pipcet@gmail.com>
2830 * spellcheck.c (test_data): Add problematic strings.
2831 (test_metric_conditions): Don't test the triangle inequality
2832 condition, which our distance function does not satisfy.
2834 2020-07-01 Omar Tahir <omar.tahir@arm.com>
2836 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
2837 generate a BTI instruction.
2839 2020-07-01 Jeff Law <law@redhat.com>
2841 PR tree-optimization/94882
2842 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
2844 2020-07-01 Jeff Law <law@redhat.com>
2846 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
2847 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
2849 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
2851 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
2852 for 64bits fpsr/fpcr getter setters builtin variants.
2853 (aarch64_init_fpsr_fpcr_builtins): New function.
2854 (aarch64_general_init_builtins): Modify to make use of the later.
2855 (aarch64_expand_fpsr_fpcr_setter): New function.
2856 (aarch64_general_expand_builtin): Modify to make use of the later.
2857 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
2858 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
2859 generalizing 'get_fpcr', 'set_fpsr'.
2860 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
2862 (fpscr_name): New int attribute.
2863 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
2864 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
2865 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
2868 2020-07-01 Martin Liska <mliska@suse.cz>
2870 * gcov.c (print_usage): Avoid trailing space for -j option.
2872 2020-07-01 Richard Biener <rguenther@suse.de>
2874 PR tree-optimization/95839
2875 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
2876 vectors are not uniform.
2877 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
2879 (vect_build_slp_tree_2): For groups of lane extracts
2880 from a vector register generate a permute node
2881 with a special child representing the pre-existing vector.
2882 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
2883 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
2884 (vectorizable_slp_permutation): Do not generate or cost identity
2886 (vect_schedule_slp_instance): Handle pre-existing vector
2887 that are function arguments.
2889 2020-07-01 Richard Biener <rguenther@suse.de>
2891 * system.h (INCLUDE_ISL): New guarded include.
2892 * graphite-dependences.c: Use it.
2893 * graphite-isl-ast-to-gimple.c: Likewise.
2894 * graphite-optimize-isl.c: Likewise.
2895 * graphite-poly.c: Likewise.
2896 * graphite-scop-detection.c: Likewise.
2897 * graphite-sese-to-poly.c: Likewise.
2898 * graphite.c: Likewise.
2899 * graphite.h: Drop the includes here.
2901 2020-07-01 Martin Liska <mliska@suse.cz>
2903 * gcov.c (print_usage): Shorted option description for -j
2906 2020-07-01 Martin Liska <mliska@suse.cz>
2908 * doc/gcov.texi: Rename 2 options.
2909 * gcov.c (print_usage): Rename -i,--json-format to
2910 -j,--json-format and -j,--human-readable to -H,--human-readable.
2911 (process_args): Fix up parsing. Document obsolete options and
2912 how are they changed.
2914 2020-07-01 Jeff Law <law@redhat.com>
2916 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
2917 (pa_output_ascii): Likewise.
2919 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
2921 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
2923 (riscv_subset_list::parsing_subset_version): Add parameter for
2924 indicate explicitly version, and handle explicitly version.
2925 (riscv_subset_list::handle_implied_ext): Ditto.
2926 (riscv_subset_list::add): Ditto.
2927 (riscv_subset_t::riscv_subset_t): Init new field.
2928 (riscv_subset_list::to_string): Always output version info if version
2929 explicitly specified.
2930 (riscv_subset_list::parsing_subset_version): Handle explicitly
2932 (riscv_subset_list::parse_std_ext): Ditto.
2933 (riscv_subset_list::parse_multiletter_ext): Ditto.
2935 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
2939 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
2940 "Advanced SIMD type".
2941 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
2942 attributes are equal.
2943 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
2945 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
2946 in the "Advanced SIMD type" attribute.
2947 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
2948 attribute to each Advanced SIMD type, using the mangled type
2949 as the attribute's single argument.
2951 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
2954 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
2955 -mgeneral-regs-only is not used.
2957 2020-06-30 Yang Yang <yangyang305@huawei.com>
2959 PR tree-optimization/95855
2960 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
2961 checks to recognize a missed if-conversion opportunity when
2962 judging whether to duplicate a block.
2964 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
2966 * doc/extend.texi: Change references to "future architecture" to
2967 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
2968 references to "future" (because the future is now).
2970 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
2972 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
2974 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
2976 * simplify-rtx.c (simplify_distributive_operation): New function
2977 to un-distribute a binary operation of two binary operations.
2978 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
2979 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
2981 (test_scalar_int_ops): New function for unit self-testing
2982 scalar integer transformations in simplify-rtx.c.
2983 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
2984 (simplify_rtx_c_tests): Call test_scalar_ops.
2986 2020-06-29 Richard Biener <rguenther@suse.de>
2988 PR tree-optimization/95916
2989 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
2990 the case of not vectorized externals.
2992 2020-06-29 Richard Biener <rguenther@suse.de>
2994 * tree-vectorizer.h: Do not include <utility>.
2996 2020-06-29 Martin Liska <mliska@suse.cz>
2998 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
2999 instead of gimple_stmt_iterator::bb.
3000 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
3001 * tree-vectorizer.h: Likewise.
3003 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
3005 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
3006 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
3007 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
3008 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
3009 (gcn_dwarf_register_number): New function.
3010 (gcn_dwarf_register_span): New function.
3011 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
3013 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
3015 PR tree-optimization/95854
3016 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
3017 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
3018 unsigned HOST_WIDE_INT.
3020 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3022 * config/sparc/sparc.c (epilogue_renumber): Remove register.
3023 (sparc_print_operand_address): Likewise.
3024 (sparc_type_code): Likewise.
3025 (set_extends): Likewise.
3027 2020-06-29 Martin Liska <mliska@suse.cz>
3029 PR tree-optimization/92860
3030 * optc-save-gen.awk: Add exceptions for arc target.
3032 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
3034 * doc/sourcebuild.texi: Describe globbing of the
3035 dump file scanning commands "suffix" argument.
3037 2020-06-28 Martin Sebor <msebor@redhat.com>
3040 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
3042 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
3044 * tree.c (get_nonnull_args): Consider the this pointer implicitly
3046 * var-tracking.c (deps_vec): New type.
3047 (var_loc_dep_vec): New function.
3048 (VAR_LOC_DEP_VEC): Use it.
3050 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
3052 * internal-fn.c (direct_mask_load_optab_supported_p): Use
3053 convert_optab_supported_p instead of direct_optab_supported_p.
3054 (direct_mask_store_optab_supported_p): Likewise.
3056 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
3058 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
3059 simplify_using_ranges class.
3060 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
3061 field. Adjust all methods to use new field.
3062 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
3063 simplify_using_ranges class.
3064 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
3065 field. Adjust all methods to use new field.
3066 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
3067 (vrp_prop::vrp_finalize): New vrp_folder argument.
3068 (execute_vrp): Pass folder to vrp_finalize. Use
3069 simplify_using_ranges class.
3070 Remove cleanup_edges_and_switches call.
3071 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
3072 value_range_equiv uses to value_range.
3073 (simplify_using_ranges::op_with_boolean_value_range_p): Use
3074 simplify_using_ranges class.
3075 (check_for_binary_op_overflow): Make static.
3076 (vr_values::extract_range_basic): Pass this to
3077 check_for_binary_op_overflow.
3078 (compare_range_with_value): Change value_range_equiv uses to
3080 (vr_values::vr_values): Initialize simplifier field.
3081 Remove uses of to_remove_edges and to_update_switch_stmts.
3082 (vr_values::~vr_values): Remove uses of to_remove_edges and
3083 to_update_switch_stmts.
3084 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
3086 (vr_values::compare_name_with_value): Same.
3087 (vr_values::compare_names): Same.
3088 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
3089 (vr_values::vrp_evaluate_conditional): Same.
3090 (vr_values::vrp_visit_cond_stmt): Same.
3091 (find_case_label_ranges): Change value_range_equiv uses to
3093 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
3094 (vr_values::simplify_truth_ops_using_ranges): Move to
3095 simplify_using_ranges class.
3096 (vr_values::simplify_div_or_mod_using_ranges): Same.
3097 (vr_values::simplify_min_or_max_using_ranges): Same.
3098 (vr_values::simplify_abs_using_ranges): Same.
3099 (vr_values::simplify_bit_ops_using_ranges): Same.
3100 (test_for_singularity): Change value_range_equiv uses to
3102 (range_fits_type_p): Same.
3103 (vr_values::simplify_cond_using_ranges_1): Same.
3104 (vr_values::simplify_cond_using_ranges_2): Make extern.
3105 (vr_values::fold_cond): Move to simplify_using_ranges class.
3106 (vr_values::simplify_switch_using_ranges): Same.
3107 (vr_values::cleanup_edges_and_switches): Same.
3108 (vr_values::simplify_float_conversion_using_ranges): Same.
3109 (vr_values::simplify_internal_call_using_ranges): Same.
3110 (vr_values::two_valued_val_range_p): Same.
3111 (vr_values::simplify_stmt_using_ranges): Move to...
3112 (simplify_using_ranges::simplify): ...here.
3113 * vr-values.h (class vr_values): Move all the simplification of
3114 statements using ranges methods and code from here...
3115 (class simplify_using_ranges): ...to here.
3116 (simplify_cond_using_ranges_2): New extern prototype.
3118 2020-06-27 Jakub Jelinek <jakub@redhat.com>
3120 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
3121 member, move outer member.
3122 (struct omp_for_data): Add first_nonrect and last_nonrect members.
3123 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
3124 last_nonrect and non_rect_referenced members.
3125 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
3127 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
3128 non-rectangular loops.
3129 (extract_omp_for_update_vars): Likewise.
3130 (expand_omp_for_generic, expand_omp_for_static_nochunk,
3131 expand_omp_for_static_chunk, expand_omp_simd,
3132 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
3133 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
3134 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
3137 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
3140 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
3142 * config/i386/i386.c (ix86_frame_pointer_required): Update
3145 2020-06-26 Yichao Yu <yyc1992@gmail.com>
3147 * multiple_target.c (redirect_to_specific_clone): Fix tests
3148 to check individual attribute rather than an attribute list.
3150 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
3152 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
3153 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
3156 2020-06-26 Marek Polacek <polacek@redhat.com>
3158 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
3159 * doc/standards.texi (C Language): Correct the default dialect.
3160 (C++ Language): Update the default for C++ to gnu++17.
3162 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
3164 * tree-ssa-reassoc.c (dump_range_entry): New function.
3165 (debug_range_entry): New debug function.
3166 (update_range_test): Invoke dump_range_entry for dumping.
3167 (optimize_range_tests_to_bit_test): Merge the entry test in the
3168 bit test when possible and lower the profitability threshold.
3170 2020-06-26 Richard Biener <rguenther@suse.de>
3172 PR tree-optimization/95897
3173 * tree-vectorizer.h (vectorizable_induction): Remove
3174 unused gimple_stmt_iterator * parameter.
3175 * tree-vect-loop.c (vectorizable_induction): Likewise.
3176 (vect_analyze_loop_operations): Adjust.
3177 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
3178 (vect_transform_stmt): Likewise.
3179 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
3180 for fold-left reductions, clarify existing reduction case.
3182 2020-06-25 Nick Clifton <nickc@redhat.com>
3184 * config/m32r/m32r.md (movsicc): Disable pattern.
3186 2020-06-25 Richard Biener <rguenther@suse.de>
3188 PR tree-optimization/95839
3189 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
3190 check on the number of datarefs.
3192 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
3194 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
3195 the insn_data n_operands value to unsigned.
3197 2020-06-25 Richard Biener <rguenther@suse.de>
3199 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
3200 vector defs to determine insertion place.
3202 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
3205 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
3206 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
3207 (PTA_TIGERLAKE): Add PTA_CLWB.
3209 2020-06-25 Richard Biener <rguenther@suse.de>
3211 PR tree-optimization/95866
3212 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
3213 vectorized shift operands. For scalar shifts use lane zero
3214 of a vectorized shift operand.
3216 2020-06-25 Martin Liska <mliska@suse.cz>
3218 PR tree-optimization/95745
3220 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
3221 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
3223 * tree-vect-generic.c (expand_vector_condition): Remove dead
3224 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
3226 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
3229 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
3230 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
3231 (convert_4f32_8f16): New define_expand
3232 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
3234 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
3235 overloaded builtin entry.
3236 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
3237 (vsx_xvcvsphp): New define_insn.
3239 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
3240 Segher Boessenkool <segher@kernel.crashing.org>
3242 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
3244 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
3246 * simplify-rtx.c (simplify_unary_operation_1): Simplify
3247 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
3249 2020-06-24 Richard Biener <rguenther@suse.de>
3251 PR tree-optimization/95866
3252 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
3253 (vect_build_slp_tree_2): Properly reset matches[0],
3254 ignore uniform constants.
3256 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3259 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
3260 (cpu_indicator_init): Likewise.
3261 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
3263 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3266 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
3267 detection with AVX512BF16.
3269 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3272 * common/config/i386/i386-isas.h: New file. Extracted from
3273 gcc/config/i386/i386-builtins.c.
3274 (_isa_names_table): Add option.
3275 (ISA_NAMES_TABLE_START): New.
3276 (ISA_NAMES_TABLE_END): Likewise.
3277 (ISA_NAMES_TABLE_ENTRY): Likewise.
3278 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
3279 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
3280 from enum processor_features.
3281 * config/i386/driver-i386.c: Include
3282 "common/config/i386/cpuinfo.h" and
3283 "common/config/i386/i386-isas.h".
3284 (has_feature): New macro.
3285 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
3286 features. Use has_feature to detect processor features. Call
3287 Call get_intel_cpu to get the newer Intel CPU name. Use
3288 isa_names_table to generate command-line options.
3289 * config/i386/i386-builtins.c: Include
3290 "common/config/i386/i386-isas.h".
3291 (_arch_names_table): Removed.
3292 (isa_names_table): Likewise.
3294 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3297 * common/config/i386/cpuinfo.h: New file.
3298 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
3299 (__processor_model2): New.
3300 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
3301 (has_cpu_feature): New function.
3302 (set_cpu_feature): Likewise.
3303 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
3304 CHECK___builtin_cpu_is. Return AMD CPU name.
3305 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
3306 Use CHECK___builtin_cpu_is. Return Intel CPU name.
3307 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
3308 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
3309 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
3310 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
3311 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
3312 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
3313 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
3314 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
3315 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
3316 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
3317 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
3318 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
3319 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
3320 FEATURE_XSAVEOPT and FEATURE_XSAVES
3321 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
3322 Also update cpu_model2.
3323 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
3324 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
3325 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
3326 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
3327 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
3328 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
3329 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
3330 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
3331 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
3332 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
3333 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
3334 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
3335 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
3336 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
3337 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
3338 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
3339 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
3340 (SIZE_OF_CPU_FEATURES): New.
3341 * config/i386/i386-builtins.c (processor_features): Removed.
3342 (isa_names_table): Replace F_XXX with FEATURE_XXX.
3343 (fold_builtin_cpu): Change __cpu_features2 to an array.
3345 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
3348 * common/config/i386/i386-common.c (processor_alias_table): Add
3349 processor model and priority to each entry.
3350 (pta_size): Updated with -6.
3351 (num_arch_names): New.
3352 * common/config/i386/i386-cpuinfo.h: New file.
3353 * config/i386/i386-builtins.c (feature_priority): Removed.
3354 (processor_model): Likewise.
3355 (_arch_names_table): Likewise.
3356 (arch_names_table): Likewise.
3357 (_isa_names_table): Replace P_ZERO with P_NONE.
3358 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
3359 processor_alias_table.
3360 (fold_builtin_cpu): Replace arch_names_table with
3361 processor_alias_table.
3362 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
3363 (pta): Add model and priority.
3364 (num_arch_names): New.
3366 2020-06-24 Richard Biener <rguenther@suse.de>
3368 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
3370 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
3371 Simplify for new position of vectorized SLP loads.
3372 (vect_slp_analyze_node_dependences): Adjust for it.
3373 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
3374 for the first stmts dataref.
3375 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
3376 (vect_schedule_slp_instance): Emit loads before the
3378 * tree-vect-stmts.c (vectorizable_load): Do what the comment
3379 says and use vect_find_first_scalar_stmt_in_slp.
3381 2020-06-24 Richard Biener <rguenther@suse.de>
3383 PR tree-optimization/95856
3384 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
3387 2020-06-24 Jakub Jelinek <jakub@redhat.com>
3390 * fold-const.c (fold_cond_expr_with_comparison): Optimize
3391 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
3393 2020-06-24 Jakub Jelinek <jakub@redhat.com>
3395 * omp-low.c (lower_omp_for): Fix two pastos.
3397 2020-06-24 Martin Liska <mliska@suse.cz>
3399 * optc-save-gen.awk: Compare string options in cl_optimization_compare
3402 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
3404 * config.gcc: Identify power10 as a 64-bit processor and as valid
3405 for --with-cpu and --with-tune.
3407 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
3409 * Makefile.in (LANG_MAKEFRAGS): Same.
3410 (tmake_file): Use -include.
3413 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
3415 * REVISION: Delete file meant for a private branch.
3417 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
3420 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
3421 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
3423 2020-06-23 Alexandre Oliva <oliva@adacore.com>
3425 * collect-utils.h (dumppfx): New.
3426 * collect-utils.c (dumppfx): Likewise.
3427 * lto-wrapper.c (run_gcc): Set global dumppfx.
3428 (compile_offload_image): Pass a -dumpbase on to mkoffload.
3429 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
3430 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
3432 (compile_native): Pass -dumpbase et al to compiler.
3433 * config/gcn/mkoffload.c (gcn_dumpbase): New.
3434 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
3435 save_temps. Pass -dumpbase et al to offload target compiler.
3436 (compile_native): Pass -dumpbase et al to compiler.
3438 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
3440 * REVISION: New file.
3442 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
3444 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
3445 Update comment for ISA 3.1.
3446 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
3447 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
3448 on AIX, and -mpower10 elsewhere.
3449 * config/rs6000/future.md: Delete.
3450 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
3452 * config/rs6000/power10.md: New file.
3453 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
3454 PPC_PLATFORM_FUTURE.
3455 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
3456 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
3457 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
3458 Use BU_P10_* instead of BU_FUTURE_*.
3459 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
3460 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
3461 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
3462 FUTURE_BUILTIN_VEC_XXEVAL.
3463 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
3464 Update compiler messages.
3465 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
3466 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
3467 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
3469 * config/rs6000/rs6000-string.c: Ditto.
3470 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
3471 instead of "future", reorder it to right after "power9".
3472 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
3473 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
3474 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
3475 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
3476 not ISA_FUTURE_MASKS_SERVER.
3477 (rs6000_opt_masks): Use "power10" instead of "future".
3478 (rs6000_builtin_mask_names): Ditto.
3479 (rs6000_disable_incompatible_switches): Ditto.
3480 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
3481 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
3482 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
3483 not RS6000_BTM_FUTURE.
3484 * config/rs6000/rs6000.md: Use "power10", not "future". Use
3485 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
3487 * config/rs6000/rs6000.opt (mfuture): Delete.
3489 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
3490 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
3492 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
3494 * coretypes.h (first_type): Delete.
3495 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
3497 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3499 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
3500 (arm_mve_hw): Likewise.
3502 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
3505 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
3508 2020-06-22 Richard Biener <rguenther@suse.de>
3510 PR tree-optimization/95770
3511 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
3514 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
3516 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
3517 (gcn_return_in_memory): Return vectors in memory.
3519 2020-06-22 Jakub Jelinek <jakub@redhat.com>
3521 * omp-general.c (omp_extract_for_data): For triangular loops with
3522 all loop invariant expressions constant where the innermost loop is
3523 executed at least once compute number of iterations at compile time.
3525 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
3527 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
3528 (DRIVER_SELF_SPECS): New.
3530 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
3532 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
3533 (RISCV_FTYPE_ATYPES0): New.
3534 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
3535 * config/riscv/riscv-ftypes.def: Remove VOID argument.
3537 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
3539 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
3540 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
3543 (ASM_CPU_SPEC): Remove vsx and altivec options.
3544 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
3547 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
3548 (TARGET_DEFAULT): Only define if not BIARCH.
3549 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
3552 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
3555 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
3556 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
3558 (CPLUSPLUS_CPP_SPEC): Same.
3561 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
3562 * config/rs6000/defaultaix64.h: New file.
3563 * config/rs6000/t-aix64: New file.
3565 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
3567 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
3568 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
3569 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
3571 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
3572 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
3573 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
3574 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
3575 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
3576 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
3577 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
3578 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
3579 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
3580 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
3581 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
3582 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
3583 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
3584 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
3585 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
3586 Allow zero constants.
3587 (print_operand) <case 'A'>: New output modifier.
3588 (rs6000_split_multireg_move): Add support for inserting accumulator
3589 priming and depriming instructions. Add support for splitting an
3590 assemble accumulator pattern.
3591 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
3592 rs6000_gimple_fold_mma_builtin): New functions.
3593 (RS6000_BUILTIN_M): New macro.
3594 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
3595 (bdesc_mma): Add new MMA built-in support.
3596 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
3597 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
3599 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
3600 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
3601 and rs6000_gimple_fold_mma_builtin.
3602 (rs6000_expand_builtin): Call mma_expand_builtin.
3603 Use RS6000_BTC_OPND_MASK.
3604 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
3605 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
3606 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
3607 VSX_BUILTIN_XVCVBF16SP.
3608 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
3609 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
3610 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
3611 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
3612 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
3613 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
3614 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
3615 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
3616 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
3617 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
3618 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
3619 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
3620 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
3621 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
3622 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
3623 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
3624 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
3625 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
3626 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
3627 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
3628 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
3629 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
3630 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
3631 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
3632 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
3633 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
3634 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
3635 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
3636 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
3637 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
3638 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
3639 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
3640 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
3641 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
3642 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
3643 MMA_AVVI4I4I4): New define_int_iterator.
3644 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
3645 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
3646 avvi4i4i4): New define_int_attr.
3647 (*movpxi): Add zero constant alternative.
3648 (mma_assemble_pair, mma_assemble_acc): New define_expand.
3649 (*mma_assemble_acc): New define_insn_and_split.
3650 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
3651 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
3652 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
3653 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
3654 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
3655 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
3656 (UNSPEC_VSX_XVCVSPBF16): Likewise.
3657 (XVCVBF16): New define_int_iterator.
3658 (xvcvbf16): New define_int_attr.
3659 (vsx_<xvcvbf16>): New define_insn.
3660 * doc/extend.texi: Document the mma built-ins.
3662 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
3663 Michael Meissner <meissner@linux.ibm.com>
3665 * config/rs6000/mma.md: New file.
3666 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
3668 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
3669 for __vector_pair and __vector_quad types.
3670 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
3672 (POWERPC_MASKS): Likewise.
3673 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
3674 (POI, PXI): New partial integer modes.
3675 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
3676 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
3677 (rs6000_hard_regno_mode_ok_uncached): Likewise.
3678 Add support for POImode being allowed in VSX registers and PXImode
3679 being allowed in FP registers.
3680 (rs6000_modes_tieable_p): Adjust comment.
3681 Add support for POImode and PXImode.
3682 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
3683 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
3684 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
3685 Set up appropriate addr_masks for vector pair and vector quad addresses.
3686 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
3687 vector quad registers. Setup reload handlers for POImode and PXImode.
3688 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
3689 (rs6000_option_override_internal): Error if -mmma is specified
3690 without -mcpu=future.
3691 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
3692 (quad_address_p): Change size test to less than 16 bytes.
3693 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
3694 and vector quad instructions.
3695 (avoiding_indexed_address_p): Likewise.
3696 (rs6000_emit_move): Disallow POImode and PXImode moves involving
3698 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
3699 and FP registers for PXImode.
3700 (rs6000_split_multireg_move): Support splitting POImode and PXImode
3702 (rs6000_mangle_type): Adjust comment. Add support for mangling
3703 __vector_pair and __vector_quad types.
3704 (rs6000_opt_masks): Add entry for mma.
3705 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
3706 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
3707 (address_to_insn_form): Likewise.
3708 (reg_to_non_prefixed): Likewise.
3709 (rs6000_invalid_conversion): New function.
3710 * config/rs6000/rs6000.h (MASK_MMA): Define.
3711 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
3712 (VECTOR_ALIGNMENT_P): New helper macro.
3713 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
3714 (RS6000_BTM_MMA): Define.
3715 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
3716 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
3717 RS6000_BTI_vector_quad.
3718 (vector_pair_type_node): New.
3719 (vector_quad_type_node): New.
3720 * config/rs6000/rs6000.md: Include mma.md.
3721 (define_mode_iterator RELOAD): Add POI and PXI.
3722 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
3723 * config/rs6000/rs6000.opt (-mmma): New.
3724 * doc/invoke.texi: Document -mmma.
3726 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
3728 PR tree-optimization/95638
3729 * tree-loop-distribution.c (pg_edge_callback_data): New field.
3730 (loop_distribution::break_alias_scc_partitions): Record and restore
3731 postorder information. Fix memory leak.
3733 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
3735 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
3736 (output_file_start): Use const 'char *'.
3738 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
3740 PR tree-optimization/94880
3741 * match.pd (A | B) - B -> (A & ~B): New simplification.
3743 2020-06-19 Richard Biener <rguenther@suse.de>
3745 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
3746 for lane permutations.
3748 2020-06-19 Richard Biener <rguenther@suse.de>
3750 PR tree-optimization/95761
3751 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
3752 vectorized stmts for finding the last one.
3754 2020-06-18 Felix Yang <felix.yang@huawei.com>
3756 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
3757 vect_relevant_for_alignment_p to filter out data references in
3758 the loop whose alignment is irrelevant when trying loop peeling
3761 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
3763 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
3764 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
3765 mode iterator for the first operand of ZERO_EXTRACT RTX.
3766 Change ext_register_operand predicate to register_operand.
3767 Rename from *cmpqi_ext_1.
3768 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
3769 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
3770 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
3771 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3772 (*extv<mode>): Use SWI24 mode iterator for the first operand
3773 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3774 to register_operand.
3775 (*extzv<mode>): Use SWI248 mode iterator for the first operand
3776 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3777 to register_operand.
3778 (*extzvqi): Use SWI248 mode iterator instead of SImode for
3779 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
3780 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
3782 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
3783 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
3784 mode iterator for the first operand of ZERO_EXTRACT RTX.
3785 Change ext_register_operand predicate to register_operand.
3786 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
3787 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
3789 (*insvqi_1): Use SWI248 mode iterator instead of SImode
3790 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
3791 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
3792 predicate to register_operand.
3795 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
3796 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
3797 mode iterator for the first operand of ZERO_EXTRACT RTX.
3798 Change ext_register_operand predicate to register_operand.
3799 (addqi_ext_1): New expander.
3800 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
3801 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3802 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3803 to register_operand. Rename from *addqi_ext_1.
3804 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
3805 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3806 (udivmodqi4): Ditto.
3807 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3808 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
3809 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3810 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3811 to register_operand. Rename from *testqi_ext_1.
3812 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
3813 (andqi_ext_1): New expander.
3814 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
3815 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3816 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3817 to register_operand. Rename from andqi_ext_1.
3818 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
3819 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
3820 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
3821 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
3822 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
3823 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
3824 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
3825 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
3826 to register_operand. Rename from *xorqi_ext_1_cc.
3827 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
3828 in mode, matching its first operand.
3829 (promote_duplicated_reg): Update for renamed insv<mode>_1.
3830 * config/i386/predicates.md (ext_register_operand): Remove predicate.
3832 2020-06-18 Martin Sebor <msebor@redhat.com>
3836 * builtins.c (compute_objsize): Remove call to
3837 compute_builtin_object_size and instead compute conservative sizes
3840 2020-06-18 Martin Liska <mliska@suse.cz>
3842 * coretypes.h (struct iterator_range): New type.
3843 * tree-vect-patterns.c (vect_determine_precisions): Use
3844 range-based iterator.
3845 (vect_pattern_recog): Likewise.
3846 * tree-vect-slp.c (_bb_vec_info): Likewise.
3847 (_bb_vec_info::~_bb_vec_info): Likewise.
3848 (vect_slp_check_for_constructors): Likewise.
3849 * tree-vectorizer.h:Add new iterators
3850 and functions that use it.
3852 2020-06-18 Martin Liska <mliska@suse.cz>
3854 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
3855 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
3856 of a VEC_COND_EXPR cannot be tcc_comparison and so that
3857 a SSA_NAME needs to be created before we use it for the first
3858 argument of the VEC_COND_EXPR.
3859 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
3861 2020-06-18 Richard Biener <rguenther@suse.de>
3864 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
3865 to the target if necessary.
3866 (expand_vect_cond_mask_optab_fn): Likewise.
3868 2020-06-18 Martin Liska <mliska@suse.cz>
3870 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
3871 vcond as we check for NULL pointer.
3873 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
3875 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
3876 silence empty-body warning with gcc_fallthrough.
3878 2020-06-18 Jakub Jelinek <jakub@redhat.com>
3880 PR tree-optimization/95699
3881 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
3882 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
3883 declarations to the statements that set them where possible.
3885 2020-06-18 Jakub Jelinek <jakub@redhat.com>
3888 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
3889 scalar mode halfvectype other than vector boolean for
3890 VEC_PACK_TRUNC_EXPR.
3892 2020-06-18 Richard Biener <rguenther@suse.de>
3894 * varasm.c (assemble_variable): Make sure to not
3895 defer output when outputting addressed constants.
3896 (output_constant_def_contents): Likewise.
3897 (add_constant_to_table): Take and pass on whether to
3899 (output_addressed_constants): Likewise.
3900 (output_constant_def): Pass on whether to defer output
3901 to add_constant_to_table.
3902 (tree_output_constant_def): Defer output of constants.
3904 2020-06-18 Richard Biener <rguenther@suse.de>
3906 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
3907 (_slp_tree::lane_permutation): New member.
3908 (_slp_tree::code): Likewise.
3909 (SLP_TREE_TWO_OPERATORS): Remove.
3910 (SLP_TREE_LANE_PERMUTATION): New.
3911 (SLP_TREE_CODE): Likewise.
3912 (vect_stmt_dominates_stmt_p): Declare.
3913 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
3914 * tree-vect-stmts.c (vect_model_simple_cost): Remove
3915 SLP_TREE_TWO_OPERATORS handling.
3916 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
3917 (_slp_tree::~_slp_tree): Likewise.
3918 (vect_two_operations_perm_ok_p): Remove.
3919 (vect_build_slp_tree_1): Remove verification of two-operator
3921 (vect_build_slp_tree_2): When we have two different operators
3922 build two computation SLP nodes and a blend.
3923 (vect_print_slp_tree): Print the lane permutation if it exists.
3924 (slp_copy_subtree): Copy it.
3925 (vect_slp_rearrange_stmts): Re-arrange it.
3926 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
3927 VEC_PERM_EXPR explicitely.
3928 (vect_schedule_slp_instance): Likewise. Remove old
3929 SLP_TREE_TWO_OPERATORS code.
3930 (vectorizable_slp_permutation): New function.
3932 2020-06-18 Martin Liska <mliska@suse.cz>
3934 * tree-vect-generic.c (expand_vector_condition): Check
3935 for gassign before inspecting RHS.
3937 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
3939 * gimplify.c (omp_notice_threadprivate_variable)
3940 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
3941 diagnostic. Adjust all users.
3943 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
3945 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
3946 NULL_TREE' check earlier.
3948 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
3950 * doc/extend.texi (attribute access): Fix a typo.
3952 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
3953 Kaipeng Zhou <zhoukaipeng3@huawei.com>
3955 PR tree-optimization/95199
3956 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
3957 strided load/store operations and remove redundant code.
3959 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
3961 * coretypes.h (first_type): New alias template.
3962 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
3963 Remove spurious “...” and split the function type out into a typedef.
3965 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
3967 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
3970 2020-06-17 Richard Biener <rguenther@suse.de>
3972 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
3973 in *vectype parameter.
3974 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
3975 vect_build_slp_tree_1 computed.
3976 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
3977 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
3978 (vect_schedule_slp_instance): Likewise.
3979 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
3980 from SLP_TREE_VECTYPE.
3982 2020-06-17 Richard Biener <rguenther@suse.de>
3984 PR tree-optimization/95717
3985 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
3986 Move BB SSA updating before exit/latch PHI current def copying.
3988 2020-06-17 Martin Liska <mliska@suse.cz>
3990 * Makefile.in: Add new file.
3991 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
3992 not meet this condition.
3993 (do_store_flag): Likewise.
3994 * gimplify.c (gimplify_expr): Gimplify first argument of
3995 VEC_COND_EXPR to be a SSA name.
3996 * internal-fn.c (vec_cond_mask_direct): New.
3997 (vec_cond_direct): Likewise.
3998 (vec_condu_direct): Likewise.
3999 (vec_condeq_direct): Likewise.
4000 (expand_vect_cond_optab_fn): New.
4001 (expand_vec_cond_optab_fn): Likewise.
4002 (expand_vec_condu_optab_fn): Likewise.
4003 (expand_vec_condeq_optab_fn): Likewise.
4004 (expand_vect_cond_mask_optab_fn): Likewise.
4005 (expand_vec_cond_mask_optab_fn): Likewise.
4006 (direct_vec_cond_mask_optab_supported_p): Likewise.
4007 (direct_vec_cond_optab_supported_p): Likewise.
4008 (direct_vec_condu_optab_supported_p): Likewise.
4009 (direct_vec_condeq_optab_supported_p): Likewise.
4010 * internal-fn.def (VCOND): New OPTAB.
4012 (VCONDEQ): Likewise.
4013 (VCOND_MASK): Likewise.
4014 * optabs.c (get_rtx_code): Make it global.
4015 (expand_vec_cond_mask_expr): Removed.
4016 (expand_vec_cond_expr): Removed.
4017 * optabs.h (expand_vec_cond_expr): Likewise.
4018 (vector_compare_rtx): Make it global.
4019 * passes.def: Add new pass_gimple_isel pass.
4020 * tree-cfg.c (verify_gimple_assign_ternary): Add check
4021 for VEC_COND_EXPR about first argument.
4022 * tree-pass.h (make_pass_gimple_isel): New.
4023 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
4024 propagation of the first argument of a VEC_COND_EXPR.
4025 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
4026 first argument of a VEC_COND_EXPR.
4027 (optimize_vec_cond_expr): Likewise.
4028 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
4029 for a first argument of created VEC_COND_EXPR.
4030 (expand_vector_condition): Fix coding style.
4031 * tree-vect-stmts.c (vectorizable_condition): Gimplify
4033 * gimple-isel.cc: New file.
4035 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
4037 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
4038 (BSS_SECTION_ASM_OP): Use ".bss".
4039 (ASM_SPEC): Remove "-mattr=-code-object-v3".
4040 (LINK_SPEC): Add "--export-dynamic".
4041 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
4042 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
4043 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
4044 (load_image): Remove obsolete relocation handling.
4045 Add ".kd" suffix to the symbol names.
4046 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
4047 (gcn_option_override): Update gcn_isa test.
4048 (gcn_kernel_arg_types): Update all the assembler directives.
4049 Remove the obsolete options.
4050 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
4051 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
4053 (output_file_start): Rework assembler file header.
4054 (gcn_hsa_declare_function_name): Rework kernel metadata.
4055 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
4056 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
4057 (PROCESSOR_VEGA10): New enum value.
4058 (PROCESSOR_VEGA20): New enum value.
4060 2020-06-17 Martin Liska <mliska@suse.cz>
4062 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
4064 * gcov-tool.c (print_version): Likewise.
4065 * gcov.c (print_version): Likewise.
4067 2020-06-17 liuhongt <hongtao.liu@intel.com>
4070 * config/i386/i386-expand.c
4071 (ix86_expand_vec_shift_qihi_constant): New function.
4072 * config/i386/i386-protos.h
4073 (ix86_expand_vec_shift_qihi_constant): Declare.
4074 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
4075 V*QImode by constant.
4077 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
4079 PR tree-optimization/95649
4080 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
4081 value is a constant.
4083 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4085 * config.in: Regenerate.
4086 * config/s390/s390.c (print_operand): Emit vector alignment hints
4087 for target z13, if AS accepts them. For other targets the logic
4089 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
4091 * configure: Regenerate.
4092 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
4094 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4096 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
4098 (__arm_vaddq_m_n_s32): Likewise.
4099 (__arm_vaddq_m_n_s16): Likewise.
4100 (__arm_vaddq_m_n_u8): Likewise.
4101 (__arm_vaddq_m_n_u32): Likewise.
4102 (__arm_vaddq_m_n_u16): Likewise.
4103 (__arm_vaddq_m): Modify polymorphic variant.
4105 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4107 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
4108 and constraint of all the operands.
4109 (mve_sqrshrl_sat<supf>_di): Likewise.
4110 (mve_uqrshl_si): Likewise.
4111 (mve_sqrshr_si): Likewise.
4112 (mve_uqshll_di): Likewise.
4113 (mve_urshrl_di): Likewise.
4114 (mve_uqshl_si): Likewise.
4115 (mve_urshr_si): Likewise.
4116 (mve_sqshl_si): Likewise.
4117 (mve_srshr_si): Likewise.
4118 (mve_srshrl_di): Likewise.
4119 (mve_sqshll_di): Likewise.
4120 * config/arm/predicates.md (arm_low_register_operand): Define.
4122 2020-06-16 Jakub Jelinek <jakub@redhat.com>
4124 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
4125 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
4126 or dist_schedule clause on non-rectangular loops. Handle
4127 gimplification of non-rectangular lb/b expressions. When changing
4128 iteration variable, adjust also non-rectangular lb/b expressions
4130 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
4132 (struct omp_for_data): Add non_rect member.
4133 * omp-general.c (omp_extract_for_data): Handle non-rectangular
4134 loops. Fill in non_rect, m1, m2 and outer.
4135 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
4136 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
4137 non-rectangular loop cases and assert for cases that can't be
4139 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
4140 (dump_omp_loop_non_rect_expr): New function.
4141 (dump_generic_node): Handle non-rectangular OpenMP loops.
4142 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
4143 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
4146 2020-06-16 Richard Biener <rguenther@suse.de>
4149 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
4151 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
4154 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
4155 assertion and turn it into a early exit check.
4157 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
4159 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
4160 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
4161 true and all elements are zero, then always clear. Return GS_ERROR
4162 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
4163 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
4164 the type is aggregate non-addressable, ask gimplify_init_constructor
4165 whether it can generate a single access to the target.
4167 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
4169 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
4170 access on the LHS is replaced with a scalar access, propagate the
4171 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
4173 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
4175 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
4176 TARGET_THREADPTR reference.
4177 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
4178 targetm.have_tls instead of TARGET_HAVE_TLS.
4179 (xtensa_option_override): Set targetm.have_tls to false in
4180 configurations without THREADPTR.
4182 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
4184 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
4186 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
4187 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
4188 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
4189 xtensa_windowed_abi if needed.
4190 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
4192 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
4193 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
4195 (mabi=call0, mabi=windowed): New options.
4196 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
4198 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
4200 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
4201 (TARGET_CAN_ELIMINATE): New macro.
4202 * config/xtensa/xtensa.h
4203 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
4204 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
4205 (HARD_FRAME_POINTER_REGNUM): Define using
4206 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
4207 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
4208 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
4209 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
4211 2020-06-15 Felix Yang <felix.yang@huawei.com>
4213 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
4214 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
4216 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
4218 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
4219 LOOP_VINFO_DATAREFS when possible.
4220 (update_epilogue_loop_vinfo): Likewise.
4222 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
4224 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
4226 (riscv_gpr_save_operation_p): Change type to unsigned for i and
4229 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
4232 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
4234 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
4235 * config/i386/sse.md (mul<mode>3): Drop mask_name since
4236 there's no real simd int8 multiplication instruction with
4237 mask. Also optimize it under TARGET_AVX512BW.
4238 (mulv8qi3): New expander.
4240 2020-06-12 Marco Elver <elver@google.com>
4242 * gimplify.c (gimplify_function_tree): Optimize and do not emit
4243 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
4244 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
4245 * tsan.c (instrument_memory_accesses): Make
4246 fentry_exit_instrument bool depend on new param.
4248 2020-06-12 Felix Yang <felix.yang@huawei.com>
4250 PR tree-optimization/95570
4251 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
4252 (vect_verify_datarefs_alignment): Call it to filter out data references
4253 in the loop whose alignment is irrelevant.
4254 (vect_get_peeling_costs_all_drs): Likewise.
4255 (vect_peeling_supportable): Likewise.
4256 (vect_enhance_data_refs_alignment): Likewise.
4258 2020-06-12 Richard Biener <rguenther@suse.de>
4260 PR tree-optimization/95633
4261 * tree-vect-stmts.c (vectorizable_condition): Properly
4262 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
4264 2020-06-12 Martin Liška <mliska@suse.cz>
4266 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
4267 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
4269 * lto-wrapper.c (merge_and_complain): Wrap option names.
4271 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
4273 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
4274 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
4275 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
4276 (vect_set_loop_condition_masked): Renamed to ...
4277 (vect_set_loop_condition_partial_vectors): ... this. Rename
4278 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
4279 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
4280 (vect_set_loop_condition_unmasked): Renamed to ...
4281 (vect_set_loop_condition_normal): ... this.
4282 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
4283 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
4284 to vect_set_loop_condition_partial_vectors.
4285 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
4286 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
4287 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
4289 (vect_analyze_loop_costing): ... this.
4290 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
4292 (vect_min_prec_for_max_niters): New, factored out from ...
4293 (vect_verify_full_masking): ... this. Rename
4294 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
4295 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
4296 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
4297 (vectorizable_reduction): Update some dumpings with partial
4298 vectors instead of fully-masked.
4299 (vectorizable_live_operation): Likewise.
4300 (vect_iv_limit_for_full_masking): Renamed to ...
4301 (vect_iv_limit_for_partial_vectors): ... this.
4302 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
4303 (check_load_store_for_partial_vectors): ... this. Update some
4304 dumpings with partial vectors instead of fully-masked.
4305 (vectorizable_store): Rename check_load_store_masking to
4306 check_load_store_for_partial_vectors.
4307 (vectorizable_load): Likewise.
4308 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
4309 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
4310 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
4311 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
4312 (vect_iv_limit_for_full_masking): Renamed to ...
4313 (vect_iv_limit_for_partial_vectors): this.
4314 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
4315 Rename iv_type to rgroup_iv_type.
4317 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
4319 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
4320 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
4321 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
4322 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
4323 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
4324 (insn_gen_fn::operator()): Replace overloaded definitions with
4325 a parameter-pack version.
4327 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
4330 * config/i386/i386-features.c (rest_of_insert_endbranch):
4332 (rest_of_insert_endbr_and_patchable_area): Change return type
4333 to void. Add need_endbr and patchable_area_size arguments.
4334 Don't call timevar_push nor timevar_pop. Replace
4335 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
4336 UNSPECV_PATCHABLE_AREA for patchable area.
4337 (pass_data_insert_endbranch): Renamed to ...
4338 (pass_data_insert_endbr_and_patchable_area): This. Change
4339 pass name to endbr_and_patchable_area.
4340 (pass_insert_endbranch): Renamed to ...
4341 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
4342 and patchable_area_size;.
4343 (pass_insert_endbr_and_patchable_area::gate): Set and check
4344 need_endbr and patchable_area_size.
4345 (pass_insert_endbr_and_patchable_area::execute): Call
4346 timevar_push and timevar_pop. Pass need_endbr and
4347 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
4348 (make_pass_insert_endbranch): Renamed to ...
4349 (make_pass_insert_endbr_and_patchable_area): This.
4350 * config/i386/i386-passes.def: Replace pass_insert_endbranch
4351 with pass_insert_endbr_and_patchable_area.
4352 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
4353 (make_pass_insert_endbranch): Renamed to ...
4354 (make_pass_insert_endbr_and_patchable_area): This.
4355 * config/i386/i386.c (ix86_asm_output_function_label): Set
4356 function_label_emitted to true.
4357 (ix86_print_patchable_function_entry): New function.
4358 (ix86_output_patchable_area): Likewise.
4359 (x86_function_profiler): Replace endbr_queued_at_entrance with
4360 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
4361 Call ix86_output_patchable_area to generate patchable area if
4363 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
4364 * config/i386/i386.h (queued_insn_type): New.
4365 (machine_function): Add function_label_emitted. Replace
4366 endbr_queued_at_entrance with insn_queued_at_entrance.
4367 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
4368 (patchable_area): New.
4370 2020-06-11 Martin Liska <mliska@suse.cz>
4372 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
4375 2020-06-11 Martin Liska <mliska@suse.cz>
4378 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
4381 2020-06-11 Martin Liska <mliska@suse.cz>
4382 Jakub Jelinek <jakub@redhat.com>
4385 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
4386 by using Pmode instead of ptr_mode.
4388 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
4390 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
4391 (vect_set_loop_control): ... this.
4392 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
4393 (vect_set_loop_masks_directly): Renamed to ...
4394 (vect_set_loop_controls_directly): ... this. Also rename some
4395 variables with ctrl instead of mask. Rename vect_set_loop_mask to
4396 vect_set_loop_control.
4397 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
4398 Also rename some variables with ctrl instead of mask.
4399 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
4400 (release_vec_loop_controls): ... this. Rename rgroup_masks related
4402 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
4403 release_vec_loop_controls.
4404 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
4405 (vect_get_max_nscalars_per_iter): Likewise.
4406 (vect_estimate_min_profitable_iters): Likewise.
4407 (vect_record_loop_mask): Likewise.
4408 (vect_get_loop_mask): Likewise.
4409 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
4410 (struct rgroup_controls): ... this. Also rename mask_type
4411 to type and rename masks to controls.
4413 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
4415 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
4416 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
4417 (vect_gen_vector_loop_niters): Likewise.
4418 (vect_do_peeling): Likewise.
4419 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
4420 fully_masked_p to using_partial_vectors_p.
4421 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
4422 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
4423 (determine_peel_for_niter): Likewise.
4424 (vect_estimate_min_profitable_iters): Likewise.
4425 (vect_transform_loop): Likewise.
4426 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
4427 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
4429 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
4431 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
4432 can_fully_mask_p to can_use_partial_vectors_p.
4433 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
4434 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
4435 to saved_can_use_partial_vectors_p.
4436 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
4437 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
4438 (vectorizable_live_operation): Likewise.
4439 * tree-vect-stmts.c (permute_vec_elements): Likewise.
4440 (check_load_store_masking): Likewise.
4441 (vectorizable_operation): Likewise.
4442 (vectorizable_store): Likewise.
4443 (vectorizable_load): Likewise.
4444 (vectorizable_condition): Likewise.
4445 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
4446 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
4447 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
4449 2020-06-11 Martin Liska <mliska@suse.cz>
4451 * optc-save-gen.awk: Quote error string.
4453 2020-06-11 Alexandre Oliva <oliva@adacore.com>
4455 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
4457 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
4459 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
4460 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
4462 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
4463 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
4465 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
4467 * config/riscv/predicates.md (gpr_save_operation): New.
4468 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
4469 (riscv_gpr_save_operation_p): Ditto.
4470 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
4471 Ignore USEs for gpr_save patter.
4472 * config/riscv/riscv.c (gpr_save_reg_order): New.
4473 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
4474 (riscv_gen_gpr_save_insn): New.
4475 (riscv_gpr_save_operation_p): Ditto.
4476 * config/riscv/riscv.md (S3_REGNUM): New.
4483 (S10_REGNUM): Ditto.
4484 (S11_REGNUM): Ditto.
4485 (gpr_save): Model USEs correctly.
4487 2020-06-10 Martin Sebor <msebor@redhat.com>
4491 * builtins.c (inform_access): New function.
4492 (check_access): Call it. Add argument.
4493 (addr_decl_size): Remove.
4494 (get_range): New function.
4495 (compute_objsize): New overload. Only use compute_builtin_object_size
4496 with raw memory function.
4497 (check_memop_access): Pass new argument to compute_objsize and
4499 (expand_builtin_memchr, expand_builtin_strcat): Same.
4500 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
4501 (expand_builtin_stpncpy, check_strncat_sizes): Same.
4502 (expand_builtin_strncat, expand_builtin_strncpy): Same.
4503 (expand_builtin_memcmp): Same.
4504 * builtins.h (check_nul_terminated_array): Declare extern.
4505 (check_access): Add argument.
4506 (struct access_ref, struct access_data): New structs.
4507 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
4508 (builtin_access::overlap): Call it.
4509 * tree-object-size.c (decl_init_size): Declare extern.
4510 (addr_object_size): Correct offset computation.
4511 * tree-object-size.h (decl_init_size): Declare.
4512 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
4513 to maybe_warn_overflow when assigning to an SSA_NAME.
4515 2020-06-10 Richard Biener <rguenther@suse.de>
4517 * tree-vect-loop.c (vect_determine_vectorization_factor):
4519 (_loop_vec_info::_loop_vec_info): Likewise.
4520 (vect_update_vf_for_slp): Likewise.
4521 (vect_analyze_loop_operations): Likewise.
4522 (update_epilogue_loop_vinfo): Likewise.
4523 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
4524 (vect_pattern_recog): Likewise.
4525 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
4526 (_bb_vec_info::_bb_vec_info): Likewise.
4527 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
4530 2020-06-10 Richard Biener <rguenther@suse.de>
4532 PR tree-optimization/95576
4533 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
4535 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
4538 * config/aarch64/aarch64-sve-builtins.h
4539 (sve_switcher::m_old_maximum_field_alignment): New member.
4540 * config/aarch64/aarch64-sve-builtins.cc
4541 (sve_switcher::sve_switcher): Save maximum_field_alignment in
4542 m_old_maximum_field_alignment and clear maximum_field_alignment.
4543 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
4545 2020-06-10 Richard Biener <rguenther@suse.de>
4547 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
4549 (_stmt_vec_info::vec_stmts): Likewise.
4550 (vec_info::stmt_vec_info_ro): New flag.
4551 (vect_finish_replace_stmt): Adjust declaration.
4552 (vect_finish_stmt_generation): Likewise.
4553 (vectorizable_induction): Likewise.
4554 (vect_transform_reduction): Likewise.
4555 (vectorizable_lc_phi): Likewise.
4556 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
4557 allocate stmt infos for increments.
4558 (vect_record_grouped_load_vectors): Adjust.
4559 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
4560 (vectorize_fold_left_reduction): Likewise.
4561 (vect_transform_reduction): Likewise.
4562 (vect_transform_cycle_phi): Likewise.
4563 (vectorizable_lc_phi): Likewise.
4564 (vectorizable_induction): Likewise.
4565 (vectorizable_live_operation): Likewise.
4566 (vect_transform_loop): Likewise.
4567 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
4568 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
4569 (vect_get_slp_defs): Likewise.
4570 (vect_transform_slp_perm_load): Likewise.
4571 (vect_schedule_slp_instance): Likewise.
4572 (vectorize_slp_instance_root_stmt): Likewise.
4573 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
4574 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
4575 (vect_finish_replace_stmt): Do not return anything.
4576 (vect_finish_stmt_generation): Likewise.
4577 (vect_build_gather_load_calls): Adjust.
4578 (vectorizable_bswap): Likewise.
4579 (vectorizable_call): Likewise.
4580 (vectorizable_simd_clone_call): Likewise.
4581 (vect_create_vectorized_demotion_stmts): Likewise.
4582 (vectorizable_conversion): Likewise.
4583 (vectorizable_assignment): Likewise.
4584 (vectorizable_shift): Likewise.
4585 (vectorizable_operation): Likewise.
4586 (vectorizable_scan_store): Likewise.
4587 (vectorizable_store): Likewise.
4588 (vectorizable_load): Likewise.
4589 (vectorizable_condition): Likewise.
4590 (vectorizable_comparison): Likewise.
4591 (vect_transform_stmt): Likewise.
4592 * tree-vectorizer.c (vec_info::vec_info): Initialize
4594 (vec_info::replace_stmt): Copy over stmt UID rather than
4595 unsetting/setting a stmt info allocating a new UID.
4596 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
4598 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
4600 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
4602 * gimple-ssa-evrp.c (class evrp_folder): New.
4603 (class evrp_dom_walker): Remove.
4604 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
4605 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
4606 * tree-ssa-copy.c (copy_folder::get_value): Same.
4607 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
4608 Pass stmt to get_value.
4609 (substitute_and_fold_engine::replace_phi_args_in): Same.
4610 (substitute_and_fold_dom_walker::after_dom_children): Call
4612 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
4613 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
4614 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
4615 call virtual functions for folding, pre_folding, and post folding.
4616 Call get_value with PHI. Tweak dump.
4617 * tree-ssa-propagate.h (class substitute_and_fold_engine):
4618 New argument to get_value.
4619 New virtual function pre_fold_bb.
4620 New virtual function post_fold_bb.
4621 New virtual function pre_fold_stmt.
4622 New virtual function post_new_stmt.
4623 New function propagate_into_phi_args.
4624 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
4625 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
4627 (vr_values::fold_cond): New.
4628 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
4629 * vr-values.h (class vr_values): Add
4630 simplify_cond_using_ranges_when_edge_is_known.
4632 2020-06-10 Martin Liska <mliska@suse.cz>
4635 * asan.c (asan_emit_stack_protection): Emit
4636 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
4639 2020-06-10 Tamar Christina <tamar.christina@arm.com>
4641 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
4643 2020-06-10 Richard Biener <rguenther@suse.de>
4645 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
4646 (vect_record_grouped_load_vectors): Likewise.
4647 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
4648 (vectorize_fold_left_reduction): Likewise.
4649 (vect_transform_reduction): Likewise.
4650 (vect_transform_cycle_phi): Likewise.
4651 (vectorizable_lc_phi): Likewise.
4652 (vectorizable_induction): Likewise.
4653 (vectorizable_live_operation): Likewise.
4654 (vect_transform_loop): Likewise.
4655 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
4657 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
4658 (vect_get_vec_def_for_operand): Likewise.
4659 (vect_get_vec_def_for_stmt_copy): Likewise.
4660 (vect_get_vec_defs_for_stmt_copy): Likewise.
4661 (vect_get_vec_defs_for_operand): New function.
4662 (vect_get_vec_defs): Likewise.
4663 (vect_build_gather_load_calls): Adjust.
4664 (vect_get_gather_scatter_ops): Likewise.
4665 (vectorizable_bswap): Likewise.
4666 (vectorizable_call): Likewise.
4667 (vectorizable_simd_clone_call): Likewise.
4668 (vect_get_loop_based_defs): Remove.
4669 (vect_create_vectorized_demotion_stmts): Adjust.
4670 (vectorizable_conversion): Likewise.
4671 (vectorizable_assignment): Likewise.
4672 (vectorizable_shift): Likewise.
4673 (vectorizable_operation): Likewise.
4674 (vectorizable_scan_store): Likewise.
4675 (vectorizable_store): Likewise.
4676 (vectorizable_load): Likewise.
4677 (vectorizable_condition): Likewise.
4678 (vectorizable_comparison): Likewise.
4679 (vect_transform_stmt): Adjust and remove no longer applicable
4681 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
4682 STMT_VINFO_VEC_STMTS.
4683 (vec_info::free_stmt_vec_info): Relase it.
4684 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
4685 (_stmt_vec_info::vec_stmts): Add.
4686 (STMT_VINFO_VEC_STMT): Remove.
4687 (STMT_VINFO_VEC_STMTS): New.
4688 (vect_get_vec_def_for_operand_1): Remove.
4689 (vect_get_vec_def_for_operand): Likewise.
4690 (vect_get_vec_defs_for_stmt_copy): Likewise.
4691 (vect_get_vec_def_for_stmt_copy): Likewise.
4692 (vect_get_vec_defs): New overloads.
4693 (vect_get_vec_defs_for_operand): New.
4694 (vect_get_slp_defs): Declare.
4696 2020-06-10 Qian Chao <qianchao9@huawei.com>
4698 PR tree-optimization/95569
4699 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
4701 2020-06-10 Martin Liska <mliska@suse.cz>
4703 PR tree-optimization/92860
4704 * optc-save-gen.awk: Generate new function cl_optimization_compare.
4705 * opth-gen.awk: Generate declaration of the function.
4707 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
4709 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
4710 'future' PowerPC platform.
4711 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
4712 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
4713 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
4715 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
4716 (rs6000_clone_map): Add 'future' system target_clones support.
4718 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
4720 * Makefile.in (ZSTD_INC): Define.
4721 (ZSTD_LIB): Include ZSTD_LDFLAGS.
4722 (CFLAGS-lto-compress.o): Add ZSTD_INC.
4723 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
4725 * configure: Rebuilt.
4727 2020-06-09 Jason Merrill <jason@redhat.com>
4730 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
4732 2020-06-09 Marco Elver <elver@google.com>
4734 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
4735 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
4736 builtin for volatile instrumentation of reads/writes.
4737 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
4738 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
4739 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
4740 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
4741 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
4742 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
4743 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
4744 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
4745 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
4746 * tsan.c (get_memory_access_decl): Argument if access is
4747 volatile. If param tsan-distinguish-volatile is non-zero, and
4748 access if volatile, return volatile instrumentation decl.
4749 (instrument_expr): Check if access is volatile.
4751 2020-06-09 Richard Biener <rguenther@suse.de>
4753 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
4755 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
4757 * omp-offload.c (add_decls_addresses_to_decl_constructor,
4758 omp_finish_file): With in_lto_p, stream out all offload-table
4759 items even if the symtab_node does not exist.
4761 2020-06-09 Richard Biener <rguenther@suse.de>
4763 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
4765 2020-06-09 Martin Liska <mliska@suse.cz>
4767 * gcov-dump.c (print_usage): Fix spacing for --raw option
4770 2020-06-09 Martin Liska <mliska@suse.cz>
4772 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
4773 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
4774 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
4775 Handle all sanitizer options.
4776 (can_inline_edge_p): Use renamed CIF_* enum value.
4778 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
4780 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
4782 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
4783 (@aarch64_bic<mode>): Enable unpacked BIC.
4784 (*bic<mode>3): Enable unpacked BIC.
4786 2020-06-09 Martin Liska <mliska@suse.cz>
4788 PR gcov-profile/95365
4789 * doc/gcov.texi: Compile and link one example in 2 steps.
4791 2020-06-09 Jakub Jelinek <jakub@redhat.com>
4793 PR tree-optimization/95527
4794 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
4796 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
4798 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
4799 'future' PowerPC platform.
4800 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
4801 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
4802 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
4804 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
4805 (rs6000_clone_map): Add 'future' system target_clones support.
4807 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
4811 * omp-offload.c (add_decls_addresses_to_decl_constructor,
4812 omp_finish_file): Skip removed items.
4813 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
4814 to this node for variables and functions.
4816 2020-06-08 Jason Merrill <jason@redhat.com>
4818 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
4819 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
4820 * configure: Regenerate.
4822 2020-06-08 Martin Sebor <msebor@redhat.com>
4824 * postreload.c (reload_cse_simplify_operands): Clear first array element
4825 before using it. Assert a precondition.
4827 2020-06-08 Jakub Jelinek <jakub@redhat.com>
4830 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
4831 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
4832 type is vector boolean.
4834 2020-06-08 Tamar Christina <tamar.christina@arm.com>
4836 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
4838 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
4840 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
4841 instead of VFP_REGS.
4843 2020-06-08 Martin Liska <mliska@suse.cz>
4845 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
4846 in all vcond* patterns.
4848 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
4850 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
4851 Define. No longer include <algorithm>.
4853 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
4855 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
4856 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
4857 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
4858 (parityhi2, parityqi2): New expanders.
4859 (parityhi2_cmp): Implement set parity flag with xorb insn.
4860 (parityqi2_cmp): Implement set parity flag with testb insn.
4861 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
4863 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
4866 * config/rs6000/rs6000.c (rs6000_option_override_internal):
4867 Override flag_cunroll_grow_size.
4869 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
4871 * common.opt (flag_cunroll_grow_size): New flag.
4872 * toplev.c (process_options): Set flag_cunroll_grow_size.
4873 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
4874 Use flag_cunroll_grow_size.
4876 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
4879 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
4880 (ipa_odr_summary_write): Update streaming.
4881 (ipa_odr_read_section): Update streaming.
4883 2020-06-06 Alexandre Oliva <oliva@adacore.com>
4886 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
4888 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
4889 Julian Brown <julian@codesourcery.com>
4891 * gimplify.c (gimplify_adjust_omp_clauses): Remove
4892 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
4894 2020-06-05 Richard Biener <rguenther@suse.de>
4896 PR tree-optimization/95539
4897 * tree-vect-data-refs.c
4898 (vect_slp_analyze_and_verify_instance_alignment): Use
4899 SLP_TREE_REPRESENTATIVE for the data-ref check.
4900 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
4901 back to the first scalar stmt rather than the
4902 SLP_TREE_REPRESENTATIVE to match previous behavior.
4904 2020-06-05 Felix Yang <felix.yang@huawei.com>
4907 * expr.c (emit_move_insn): Check src and dest of the copy to see
4908 if one or both of them are subregs, try to remove the subregs when
4909 innermode and outermode are equal in size and the mode change involves
4910 an implicit round trip through memory.
4912 2020-06-05 Jakub Jelinek <jakub@redhat.com>
4915 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
4916 define_insn_and_split patterns.
4917 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
4918 define_insn patterns.
4920 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
4922 * alloc-pool.h (object_allocator::remove_raw): New.
4923 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
4924 (occurrence::occurrence): Add.
4925 (occurrence::~occurrence): Likewise.
4926 (occurrence::new): Likewise.
4927 (occurrence::delete): Likewise.
4929 (insert_bb): Use new occurence (...) instead of occ_new.
4930 (register_division_in): Likewise.
4931 (free_bb): Use delete occ instead of manually removing
4934 2020-06-05 Richard Biener <rguenther@suse.de>
4937 * cfgexpand.c (expand_debug_expr): Avoid calling
4938 set_mem_attributes_minus_bitpos when we were expanding
4940 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
4941 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
4942 special-cases we do not want MEM_EXPRs for. Assert
4943 we end up with reasonable MEM_EXPRs.
4945 2020-06-05 Lili Cui <lili.cui@intel.com>
4948 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
4950 2020-06-04 Martin Sebor <msebor@redhat.com>
4954 * attribs.c (init_attr_rdwr_indices): Move function here.
4955 * attribs.h (rdwr_access_hash, rdwr_map): Define.
4956 (attr_access): Add 'none'.
4957 (init_attr_rdwr_indices): Declared function.
4958 * builtins.c (warn_for_access)): New function.
4959 (check_access): Call it.
4960 * builtins.h (checK-access): Add an optional argument.
4961 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
4962 (init_attr_rdwr_indices): Declare extern.
4963 (append_attrname): Handle attr_access::none.
4964 (maybe_warn_rdwr_sizes): Same.
4965 (initialize_argument_information): Update comments.
4966 * doc/extend.texi (attribute access): Document 'none'.
4967 * tree-ssa-uninit.c (struct wlimits): New.
4968 (maybe_warn_operand): New function.
4969 (maybe_warn_pass_by_reference): Same.
4970 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
4971 Also call for function calls.
4972 (pass_late_warn_uninitialized::execute): Adjust comments.
4973 (execute_early_warn_uninitialized): Same.
4975 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
4978 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
4979 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
4980 reload if the original insn has it too.
4982 2020-06-04 Richard Biener <rguenther@suse.de>
4984 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
4985 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
4987 2020-06-04 Martin Jambor <mjambor@suse.cz>
4990 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
4991 exceptions check to...
4992 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
4994 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
4995 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
4998 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5001 * config/arm/predicates.md (mve_scatter_memory): Define to
5002 match (mem (reg)) for scatter store memory.
5003 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
5004 define_insn to define_expand.
5005 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
5006 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
5007 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
5008 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
5009 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
5010 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
5011 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
5012 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
5013 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
5014 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
5015 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
5016 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
5017 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
5018 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
5019 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
5020 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
5021 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
5022 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
5023 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
5024 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
5025 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
5027 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
5028 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
5029 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
5030 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
5031 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
5032 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
5033 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
5034 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
5035 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
5036 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
5037 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
5038 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
5039 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
5040 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
5041 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
5042 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
5043 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
5044 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
5045 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
5046 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
5048 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5050 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
5052 (__arm_vbicq_n_s16): Likewise.
5053 (__arm_vbicq_n_u32): Likewise.
5054 (__arm_vbicq_n_s32): Likewise.
5055 (__arm_vbicq): Modify polymorphic variant.
5057 2020-06-04 Richard Biener <rguenther@suse.de>
5059 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
5060 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
5061 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
5062 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
5063 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
5065 (vect_get_slp_defs): ... here.
5066 (vect_get_slp_vect_def): New function.
5068 2020-06-04 Richard Biener <rguenther@suse.de>
5070 * tree-vectorizer.h (_slp_tree::lanes): New.
5071 (SLP_TREE_LANES): Likewise.
5072 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
5073 (vectorizable_reduction): Likewise.
5074 (vect_transform_cycle_phi): Likewise.
5075 (vectorizable_induction): Likewise.
5076 (vectorizable_live_operation): Likewise.
5077 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
5078 (vect_create_new_slp_node): Likewise.
5079 (slp_copy_subtree): Copy it.
5080 (vect_optimize_slp): Use it.
5081 (vect_slp_analyze_node_operations_1): Likewise.
5082 (vect_slp_convert_to_external): Likewise.
5083 (vect_bb_vectorization_profitable_p): Likewise.
5084 * tree-vect-stmts.c (vectorizable_load): Likewise.
5085 (get_vectype_for_scalar_type): Likewise.
5087 2020-06-04 Richard Biener <rguenther@suse.de>
5089 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
5090 (vect_build_slp_tree_2): Simplify building all external op
5092 (vect_slp_analyze_node_operations): Remove push/pop of
5093 STMT_VINFO_DEF_TYPE.
5094 (vect_schedule_slp_instance): Likewise.
5095 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
5096 stmt_info, use the vect_is_simple_use overload combining
5097 SLP and stmt_info analysis.
5098 (vect_is_simple_cond): Likewise.
5099 (vectorizable_store): Adjust.
5100 (vectorizable_condition): Likewise.
5101 (vect_is_simple_use): Fully handle invariant SLP nodes
5102 here. Amend stmt_info operand extraction with COND_EXPR
5104 * tree-vect-loop.c (vectorizable_reduction): Deal with
5105 COND_EXPR representation ugliness.
5107 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
5110 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
5111 Refine from *vcvtps2ph_store<mask_name>.
5112 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
5113 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
5114 (*vcvtps2ph256<merge_mask_name>): New define_insn.
5115 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
5116 * config/i386/subst.md (merge_mask): New define_subst.
5117 (merge_mask_name): New define_subst_attr.
5118 (merge_mask_operand3): Ditto.
5120 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
5122 PR tree-optimization/89430
5124 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
5125 remove ssa_name_ver, store, offset fields.
5126 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
5127 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
5128 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
5131 2020-06-04 Andreas Schwab <schwab@suse.de>
5134 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
5136 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
5138 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
5139 (trunc<mode><pmov_dst_3_lower>2): Refine from
5140 trunc<mode><pmov_dst_3>2.
5142 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
5144 * match.pd (tanh/sinh -> 1/cosh): New simplification.
5146 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
5149 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
5150 is_lfs_stfs_insn and make it recognize lfs as well.
5151 (prefixed_store_p): Use is_lfs_stfs_insn().
5152 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
5154 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
5156 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
5158 (odr_enums): New static var.
5159 (struct odr_enum_val): New struct.
5160 (class odr_enum): New struct.
5161 (odr_enum_map): New hashtable.
5162 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
5163 (add_type_duplicate): Likewise.
5164 (free_odr_warning_data): Do not free TYPE_VALUES.
5165 (register_odr_enum): New function.
5166 (ipa_odr_summary_write): New function.
5167 (ipa_odr_read_section): New function.
5168 (ipa_odr_summary_read): New function.
5169 (class pass_ipa_odr): New pass.
5170 (make_pass_ipa_odr): New function.
5171 * ipa-utils.h (register_odr_enum): Declare.
5172 * lto-section-in.c: (lto_section_name): Add odr_types section.
5173 * lto-streamer.h (enum lto_section_type): Add odr_types section.
5174 * passes.def: Add odr_types pass.
5175 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
5177 (hash_tree): Likewise.
5178 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
5180 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
5182 * timevar.def (TV_IPA_ODR): New timervar.
5183 * tree-pass.h (make_pass_ipa_odr): Declare.
5184 * tree.c (free_lang_data_in_type): Regiser ODR types.
5186 2020-06-03 Romain Naour <romain.naour@gmail.com>
5188 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
5191 2020-06-03 Richard Biener <rguenther@suse.de>
5193 PR tree-optimization/95487
5194 * tree-vect-stmts.c (vectorizable_store): Use a truth type
5195 for the scatter mask.
5197 2020-06-03 Richard Biener <rguenther@suse.de>
5199 PR tree-optimization/95495
5200 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
5201 SLP_TREE_REPRESENTATIVE in the shift assertion.
5203 2020-06-03 Tom Tromey <tromey@adacore.com>
5205 * spellcheck.c (CASE_COST): New define.
5206 (BASE_COST): New define.
5207 (get_edit_distance): Recognize case changes.
5208 (get_edit_distance_cutoff): Update.
5209 (test_edit_distances): Update.
5210 (get_old_cutoff): Update.
5211 (test_find_closest_string): Add case sensitivity test.
5213 2020-06-03 Richard Biener <rguenther@suse.de>
5215 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
5216 the cost vector to unset the visited flag on stmts.
5218 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
5220 * gimplify.c (omp_notice_variable): Use new hook.
5221 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
5222 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
5223 (LANG_HOOKS_DECLS): Add it.
5224 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
5225 (lhd_omp_predetermined_mapping): New.
5226 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
5228 2020-06-03 Jan Hubicka <jh@suse.cz>
5230 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
5231 add LTO_first_tree_tag and LTO_first_gimple_tag.
5232 (lto_tag_is_tree_code_p): Update.
5233 (lto_tag_is_gimple_code_p): Update.
5234 (lto_gimple_code_to_tag): Update.
5235 (lto_tag_to_gimple_code): Update.
5236 (lto_tree_code_to_tag): Update.
5237 (lto_tag_to_tree_code): Update.
5239 2020-06-02 Felix Yang <felix.yang@huawei.com>
5242 * config/aarch64/aarch64.c (aarch64_short_vector_p):
5243 Leave later code to report an error if SVE is disabled.
5245 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5247 * config/aarch64/aarch64-cores.def (zeus): Define.
5248 * config/aarch64/aarch64-tune.md: Regenerate.
5249 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
5251 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
5254 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
5256 (is_stfs_insn): New helper function.
5258 2020-06-02 Jan Hubicka <jh@suse.cz>
5260 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
5262 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
5264 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
5266 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
5267 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
5268 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
5270 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
5273 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
5274 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
5276 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5278 * config/s390/s390.c (print_operand): Emit vector alignment
5281 2020-06-02 Martin Liska <mliska@suse.cz>
5283 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
5284 as they have variable number of counters.
5285 * gcov-dump.c (main): Add new option -r.
5286 (print_usage): Likewise.
5287 (tag_counters): All new raw format.
5288 * gcov-io.h (struct gcov_kvp): New.
5289 (GCOV_TOPN_VALUES): Remove.
5290 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
5291 (GCOV_TOPN_MEM_COUNTERS): New.
5292 (GCOV_TOPN_DISK_COUNTERS): Likewise.
5293 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
5294 * ipa-profile.c (ipa_profile_generate_summary): Use
5295 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
5296 (ipa_profile_write_edge_summary): Likewise.
5297 (ipa_profile_read_edge_summary): Likewise.
5298 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
5299 * profile.c (sort_hist_values): Sort variable number
5301 (compute_value_histograms): Special case for TOP N counters
5302 that have dynamic number of key-value pairs.
5303 * value-prof.c (dump_histogram_value): Dump variable number
5305 (stream_in_histogram_value): Stream in variable number
5306 of key-value pairs for TOP N counter.
5307 (get_nth_most_common_value): Deal with variable number
5309 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
5311 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
5313 * doc/gcov-dump.texi: Document new -r option.
5315 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
5318 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
5320 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
5322 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
5323 returns (const_int 0) for the destination, then emit nothing.
5325 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
5327 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
5328 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
5329 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
5330 LTO_const_decl_ref, LTO_imported_decl_ref,
5331 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
5332 LTO_namelist_decl_ref; add LTO_global_stream_ref.
5333 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
5334 (lto_input_scc): Update.
5335 (lto_input_tree_1): Update.
5336 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
5337 * lto-streamer.c (lto_tag_name): Update.
5339 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
5341 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
5342 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
5343 * lto-cgraph.c (lto_output_node): Likewise.
5344 (lto_output_varpool_node): Likewise.
5345 (output_offload_tables): Likewise.
5346 (input_node): Likewise.
5347 (input_varpool_node): Likewise.
5348 (input_offload_tables): Likewise.
5349 * lto-streamer-in.c (lto_input_tree_ref): Declare.
5350 (lto_input_var_decl_ref): Declare.
5351 (lto_input_fn_decl_ref): Declare.
5352 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
5353 (lto_output_var_decl_index): Rename to ..
5354 (lto_output_var_decl_ref): ... this.
5355 (lto_output_fn_decl_index): Rename to ...
5356 (lto_output_fn_decl_ref): ... this.
5357 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
5358 (DEFINE_DECL_STREAM_FUNCS): Remove.
5359 (lto_output_var_decl_index): Remove.
5360 (lto_output_fn_decl_index): Remove.
5361 (lto_output_var_decl_ref): Declare.
5362 (lto_output_fn_decl_ref): Declare.
5363 (lto_input_var_decl_ref): Declare.
5364 (lto_input_fn_decl_ref): Declare.
5366 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
5368 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
5369 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
5370 dump infomation if there is no adjusted parameter.
5371 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
5373 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
5375 * Makefile.in (gimple-array-bounds.o): New.
5376 * tree-vrp.c: Move array bounds code...
5377 * gimple-array-bounds.cc: ...here...
5378 * gimple-array-bounds.h: ...and here.
5380 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
5382 * Makefile.in (OBJS): Add value-range-equiv.o.
5383 * tree-vrp.c (*value_range_equiv*): Move to...
5384 * value-range-equiv.cc: ...here.
5385 * tree-vrp.h (class value_range_equiv): Move to...
5386 * value-range-equiv.h: ...here.
5387 * vr-values.h: Include value-range-equiv.h.
5389 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
5392 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
5393 lattice for simple pass-through by-ref argument.
5395 2020-05-31 Jeff Law <law@redhat.com>
5397 * lra.c (add_auto_inc_notes): Remove function.
5398 * reload1.c (add_auto_inc_notes): Similarly. Move into...
5399 * rtlanal.c (add_auto_inc_notes): New function.
5400 * rtl.h (add_auto_inc_notes): Add prototype.
5401 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
5404 2020-05-31 Jan Hubicka <jh@suse.cz>
5406 * lto-section-out.c (lto_output_decl_index): Remove.
5407 (lto_output_field_decl_index): Move to lto-streamer-out.c
5408 (lto_output_fn_decl_index): Move to lto-streamer-out.c
5409 (lto_output_namespace_decl_index): Remove.
5410 (lto_output_var_decl_index): Remove.
5411 (lto_output_type_decl_index): Remove.
5412 (lto_output_type_ref_index): Remove.
5413 * lto-streamer-out.c (output_type_ref): Remove.
5414 (lto_get_index): New function.
5415 (lto_output_tree_ref): Remove.
5416 (lto_indexable_tree_ref): New function.
5417 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
5418 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
5419 (stream_write_tree_ref): Update.
5420 (lto_output_tree): Update.
5421 * lto-streamer.h (lto_output_decl_index): Remove prototype.
5422 (lto_output_field_decl_index): Remove prototype.
5423 (lto_output_namespace_decl_index): Remove prototype.
5424 (lto_output_type_decl_index): Remove prototype.
5425 (lto_output_type_ref_index): Remove prototype.
5426 (lto_output_var_decl_index): Move.
5427 (lto_output_fn_decl_index): Move
5429 2020-05-31 Jakub Jelinek <jakub@redhat.com>
5432 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
5435 2020-05-31 Jeff Law <law@redhat.com>
5437 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
5439 2020-05-31 Jim Wilson <jimw@sifive.com>
5441 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
5443 2020-05-30 Jonathan Yong <10walls@gmail.com>
5445 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
5446 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
5447 import library, but also contains some functions that invoke
5448 others in KERNEL32.DLL.
5450 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
5452 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
5453 (altivec_vmrglw_direct): Ditto.
5454 (altivec_vperm_<mode>_direct): Ditto.
5455 (altivec_vperm_v8hiv16qi): Ditto.
5456 (*altivec_vperm_<mode>_uns_internal): Ditto.
5457 (*altivec_vpermr_<mode>_internal): Ditto.
5458 (vperm_v8hiv4si): Ditto.
5459 (vperm_v16qiv8hi): Ditto.
5461 2020-05-29 Jan Hubicka <jh@suse.cz>
5463 * lto-streamer-in.c (streamer_read_chain): Move here from
5465 (stream_read_tree_ref): New.
5466 (lto_input_tree_1): Simplify.
5467 * lto-streamer-out.c (stream_write_tree_ref): New.
5468 (lto_write_tree_1): Simplify.
5469 (lto_output_tree_1): Simplify.
5470 (DFS::DFS_write_tree): Simplify.
5471 (streamer_write_chain): Move here from tree-stremaer-out.c.
5472 * lto-streamer.h (lto_output_tree_ref): Update prototype.
5473 (stream_read_tree_ref): Declare
5474 (stream_write_tree_ref): Declare
5475 * tree-streamer-in.c (streamer_read_chain): Update to use
5476 stream_read_tree_ref.
5477 (lto_input_ts_common_tree_pointers): Likewise.
5478 (lto_input_ts_vector_tree_pointers): Likewise.
5479 (lto_input_ts_poly_tree_pointers): Likewise.
5480 (lto_input_ts_complex_tree_pointers): Likewise.
5481 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
5482 (lto_input_ts_decl_common_tree_pointers): Likewise.
5483 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
5484 (lto_input_ts_field_decl_tree_pointers): Likewise.
5485 (lto_input_ts_function_decl_tree_pointers): Likewise.
5486 (lto_input_ts_type_common_tree_pointers): Likewise.
5487 (lto_input_ts_type_non_common_tree_pointers): Likewise.
5488 (lto_input_ts_list_tree_pointers): Likewise.
5489 (lto_input_ts_vec_tree_pointers): Likewise.
5490 (lto_input_ts_exp_tree_pointers): Likewise.
5491 (lto_input_ts_block_tree_pointers): Likewise.
5492 (lto_input_ts_binfo_tree_pointers): Likewise.
5493 (lto_input_ts_constructor_tree_pointers): Likewise.
5494 (lto_input_ts_omp_clause_tree_pointers): Likewise.
5495 * tree-streamer-out.c (streamer_write_chain): Update to use
5496 stream_write_tree_ref.
5497 (write_ts_common_tree_pointers): Likewise.
5498 (write_ts_vector_tree_pointers): Likewise.
5499 (write_ts_poly_tree_pointers): Likewise.
5500 (write_ts_complex_tree_pointers): Likewise.
5501 (write_ts_decl_minimal_tree_pointers): Likewise.
5502 (write_ts_decl_common_tree_pointers): Likewise.
5503 (write_ts_decl_non_common_tree_pointers): Likewise.
5504 (write_ts_decl_with_vis_tree_pointers): Likewise.
5505 (write_ts_field_decl_tree_pointers): Likewise.
5506 (write_ts_function_decl_tree_pointers): Likewise.
5507 (write_ts_type_common_tree_pointers): Likewise.
5508 (write_ts_type_non_common_tree_pointers): Likewise.
5509 (write_ts_list_tree_pointers): Likewise.
5510 (write_ts_vec_tree_pointers): Likewise.
5511 (write_ts_exp_tree_pointers): Likewise.
5512 (write_ts_block_tree_pointers): Likewise.
5513 (write_ts_binfo_tree_pointers): Likewise.
5514 (write_ts_constructor_tree_pointers): Likewise.
5515 (write_ts_omp_clause_tree_pointers): Likewise.
5516 (streamer_write_tree_body): Likewise.
5517 (streamer_write_integer_cst): Likewise.
5518 * tree-streamer.h (streamer_read_chain):Declare.
5519 (streamer_write_chain):Declare.
5520 (streamer_write_tree_body): Update prototype.
5521 (streamer_write_integer_cst): Update prototype.
5523 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
5526 * configure: Regenerated.
5528 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
5530 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
5531 (add<mode>3_vcc_zext_dup_exec): Likewise.
5532 (add<mode>3_vcc_zext_dup2): Likewise.
5533 (add<mode>3_vcc_zext_dup2_exec): Likewise.
5535 2020-05-29 Richard Biener <rguenther@suse.de>
5537 PR tree-optimization/95272
5538 * tree-vectorizer.h (_slp_tree::representative): Add.
5539 (SLP_TREE_REPRESENTATIVE): Likewise.
5540 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
5542 (vectorizable_live_operation): Use the representative to
5543 attach the reduction info to.
5544 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
5545 SLP_TREE_REPRESENTATIVE.
5546 (vect_create_new_slp_node): Likewise.
5547 (slp_copy_subtree): Copy it.
5548 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
5549 (vect_slp_analyze_node_operations_1): Pass the representative
5550 to vect_analyze_stmt.
5551 (vect_schedule_slp_instance): Pass the representative to
5552 vect_transform_stmt.
5554 2020-05-29 Richard Biener <rguenther@suse.de>
5556 PR tree-optimization/95356
5557 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
5558 node hacking during analysis.
5560 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
5563 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
5565 2020-05-29 Richard Biener <rguenther@suse.de>
5567 PR tree-optimization/95403
5568 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
5571 2020-05-29 Jakub Jelinek <jakub@redhat.com>
5574 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
5575 declare variant cgraph node removal callback.
5577 2020-05-29 Jakub Jelinek <jakub@redhat.com>
5580 * expr.c (store_expr): If expr_size is constant and significantly
5581 larger than TREE_STRING_LENGTH, set temp to just the
5582 TREE_STRING_LENGTH portion of the STRING_CST.
5584 2020-05-29 Richard Biener <rguenther@suse.de>
5586 PR tree-optimization/95393
5587 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
5588 to build the min/max expression so we simplify cases like
5589 MAX(0, s) immediately.
5591 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
5593 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
5594 for unpacked EOR, ORR, AND.
5596 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
5598 * Makefile.in: don't look for libiberty in the "pic" subdirectory
5599 when building for Mingw. Add dependency on xgcc with the proper
5602 2020-05-28 Jeff Law <law@redhat.com>
5604 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
5606 2020-05-28 Jeff Law <law@redhat.com>
5608 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
5609 make a nonzero adjustment to the memory offset.
5610 (b<ior,xor>hi_msx): Turn into a splitter.
5612 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
5614 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
5615 Fix off-by-one error.
5617 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
5619 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
5620 wb_candidate1 and wb_candidate2.
5621 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
5622 wb_candidate1 and wb_candidate2 if we decided not to use them.
5624 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
5627 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
5628 we have at least some CFI operations when using a frame pointer.
5629 Only redefine the CFA if we have CFI operations.
5631 2020-05-28 Richard Biener <rguenther@suse.de>
5633 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
5634 case for !SLP_TREE_VECTYPE.
5635 (vect_slp_analyze_node_operations): Adjust.
5637 2020-05-28 Richard Biener <rguenther@suse.de>
5639 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
5640 (SLP_TREE_VEC_DEFS): Likewise.
5641 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
5642 (_slp_tree::~_slp_tree): Likewise.
5643 (vect_mask_constant_operand_p): Remove unused function.
5644 (vect_get_constant_vectors): Rename to...
5645 (vect_create_constant_vectors): ... this. Take the
5646 invariant node as argument and code generate it. Remove
5647 dead code, remove temporary asserts. Pass a NULL stmt_info
5648 to vect_init_vector.
5649 (vect_get_slp_defs): Simplify.
5650 (vect_schedule_slp_instance): Code-generate externals and
5651 invariants using vect_create_constant_vectors.
5653 2020-05-28 Richard Biener <rguenther@suse.de>
5655 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
5656 Conditionalize stmt_info use, assert the new stmt cannot throw
5658 (vect_finish_stmt_generation): Adjust assert.
5660 2020-05-28 Richard Biener <rguenther@suse.de>
5662 PR tree-optimization/95273
5663 PR tree-optimization/95356
5664 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
5665 what we set the vector type of the shift operand SLP node
5668 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
5670 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
5673 2020-05-28 Martin Liska <mliska@suse.cz>
5676 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
5677 rename ipcp-unit-growth to ipa-cp-unit-growth.
5679 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
5681 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
5682 from *avx512vl_<code>v2div2qi_store and refine memory size of
5684 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
5685 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
5686 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
5687 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
5688 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
5689 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
5690 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
5691 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
5692 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
5693 (*avx512vl_<code>v2div2si2_store_1): Ditto.
5694 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
5695 (*avx512f_<code>v8div16qi2_store_1): Ditto.
5696 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
5697 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
5698 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
5699 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
5700 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
5701 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
5702 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
5703 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
5704 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
5705 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
5706 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
5707 (*avx512vl_<code>v2div2si2_store_2): Ditto.
5708 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
5709 (*avx512f_<code>v8div16qi2_store_2): Ditto.
5710 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
5711 * config/i386/i386-builtin-types.def: Adjust builtin type.
5712 * config/i386/i386-expand.c: Ditto.
5713 * config/i386/i386-builtin.def: Adjust builtin.
5714 * config/i386/avx512fintrin.h: Ditto.
5715 * config/i386/avx512vlbwintrin.h: Ditto.
5716 * config/i386/avx512vlintrin.h: Ditto.
5718 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
5720 PR gcov-profile/95332
5721 * gcov-io.c (gcov_var::endian): Move field.
5722 (from_file): Add IN_GCOV_TOOL check.
5723 * gcov-io.h (gcov_magic): Ditto.
5725 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
5727 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
5729 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
5731 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
5733 * builtin-types.def (BT_UINT128): New primitive type.
5734 (BT_FN_UINT128_UINT128): New function type.
5735 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
5736 * doc/extend.texi (__builtin_bswap128): Document it.
5737 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
5738 (is_inexpensive_builtin): Likewise.
5739 * fold-const-call.c (fold_const_call_ss): Likewise.
5740 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
5741 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
5742 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
5743 (vectorizable_call): Likewise.
5744 * optabs.c (expand_unop): Always use the double word path for it.
5745 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
5746 * tree.h (uint128_type_node): New global type.
5747 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
5749 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
5751 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
5752 (mmx_hsubv2sf3): Ditto.
5753 (mmx_haddsubv2sf3): New expander.
5754 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
5755 RTL template to model horizontal subtraction and addition.
5756 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
5759 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
5762 * config/i386/sse.md
5763 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
5764 Remove %q operand modifier from insn template.
5765 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
5767 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
5769 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
5770 Enable insn pattern for TARGET_MMX_WITH_SSE.
5771 (*mmx_movshdup): New insn pattern.
5772 (*mmx_movsldup): Ditto.
5773 (*mmx_movss): Ditto.
5774 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
5776 (expand_vec_perm_movs): Handle E_V2SFmode.
5777 (expand_vec_perm_even_odd): Ditto.
5778 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
5779 is already handled by standard shuffle patterns.
5781 2020-05-27 Richard Biener <rguenther@suse.de>
5783 PR tree-optimization/95295
5784 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
5785 merging stores from paths.
5787 2020-05-27 Richard Biener <rguenther@suse.de>
5789 PR tree-optimization/95356
5790 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
5791 type for the shift operand.
5793 2020-05-27 Richard Biener <rguenther@suse.de>
5795 PR tree-optimization/95335
5796 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
5797 lvisited for nodes made external.
5799 2020-05-27 Richard Biener <rguenther@suse.de>
5801 * dump-context.h (debug_dump_context): New class.
5802 (dump_context): Make it friend.
5803 * dumpfile.c (debug_dump_context::debug_dump_context):
5805 (debug_dump_context::~debug_dump_context): Likewise.
5806 * tree-vect-slp.c: Include dump-context.h.
5807 (vect_print_slp_tree): Dump a single SLP node.
5808 (debug): New overload for slp_tree.
5809 (vect_print_slp_graph): Rename from vect_print_slp_tree and
5811 (vect_analyze_slp_instance): Adjust.
5813 2020-05-27 Jakub Jelinek <jakub@redhat.com>
5816 * omp-general.c (omp_declare_variant_remove_hook): New function.
5817 (omp_resolve_declare_variant): Always return base if it is already
5818 declare_variant_alt magic decl itself. Register
5819 omp_declare_variant_remove_hook as cgraph node removal hook.
5821 2020-05-27 Jeff Law <law@redhat.com>
5823 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
5824 for the primary input operand.
5825 (tstsi_variable_bit_qi): Similarly.
5827 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
5829 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
5831 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
5834 * ipa-utils.h (odr_type_p): Also permit calls with
5835 only flag_generate_offload set.
5837 2020-05-26 Alexandre Oliva <oliva@adacore.com>
5839 * gcc.c (validate_switches): Add braced parameter. Adjust all
5840 callers. Expected and skip trailing brace only if braced.
5841 Return after handling one atom otherwise.
5842 (DUMPS_OPTIONS): New.
5843 (cpp_debug_options): Define in terms of it.
5845 2020-05-26 Richard Biener <rguenther@suse.de>
5847 PR tree-optimization/95327
5848 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
5849 when we are not using a scalar shift.
5851 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
5853 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
5854 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
5855 Handle E_V2SImode and E_V4HImode.
5856 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
5857 Assert that E_V2SImode is already handled.
5858 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
5859 is already handled by standard shuffle patterns.
5861 2020-05-26 Jan Hubicka <jh@suse.cz>
5863 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
5866 2020-05-26 Jakub Jelinek <jakub@redhat.com>
5869 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
5870 * omp-general.h (find_combined_omp_for): Declare.
5871 * omp-general.c: Include tree-iterator.h.
5872 (find_combined_omp_for): New function, moved from gimplify.c.
5874 2020-05-26 Alexandre Oliva <oliva@adacore.com>
5876 * common.opt (aux_base_name): Define.
5877 (dumpbase, dumpdir): Mark as Driver options.
5878 (-dumpbase, -dumpdir): Likewise.
5879 (dumpbase-ext, -dumpbase-ext): New.
5880 (auxbase, auxbase-strip): Drop.
5881 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
5883 (-o): Introduce the notion of primary output, mention it
5884 influences auxiliary and dump output names as well, add
5886 (-save-temps): Adjust, move examples into -dump*.
5887 (-save-temps=cwd, -save-temps=obj): Likewise.
5888 (-fdump-final-insns): Adjust.
5889 * dwarf2out.c (gen_producer_string): Drop auxbase and
5890 auxbase_strip; add dumpbase_ext.
5891 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
5892 (save_temps_prefix, save_temps_length): Drop.
5893 (save_temps_overrides_dumpdir): New.
5894 (dumpdir, dumpbase, dumpbase_ext): New.
5895 (dumpdir_length, dumpdir_trailing_dash_added): New.
5896 (outbase, outbase_length): New.
5897 (The Specs Language): Introduce %". Adjust %b and %B.
5898 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
5899 Precede object file with %w when it's the primary output.
5900 (cpp_debug_options): Do not pass on incoming -dumpdir,
5901 -dumpbase and -dumpbase-ext options; recompute them with
5903 (cc1_options): Drop auxbase with and without compare-debug;
5904 use cpp_debug_options instead of dumpbase. Mark asm output
5905 with %w when it's the primary output.
5906 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
5907 %:replace-exception. Add %:dumps.
5908 (driver_handle_option): Implement -save-temps=*/-dumpdir
5909 mutual overriding logic. Save dumpdir, dumpbase and
5910 dumpbase-ext options. Do not save output_file in
5912 (adds_single_suffix_p): New.
5913 (single_input_file_index): New.
5914 (process_command): Combine output dir, output base name, and
5915 dumpbase into dumpdir and outbase.
5916 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
5917 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
5918 and outbase instead of input_basename in %b, %B and in
5919 -save-temps aux files. Handle empty argument %".
5920 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
5921 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
5922 naming. Spec-quote the computed -fdump-final-insns file name.
5923 (debug_auxbase_opt): Drop.
5924 (compare_debug_self_opt_spec_function): Drop auxbase-strip
5926 (compare_debug_auxbase_opt_spec_function): Drop.
5927 (not_actual_file_p): New.
5928 (replace_extension_spec_func): Drop.
5929 (dumps_spec_func): New.
5930 (convert_white_space): Split-out parts into...
5931 (quote_string, whitespace_to_convert_p): ... these. New.
5932 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
5933 (driver::finalize): Release and reset new variables; drop
5935 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
5936 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
5937 empty string otherwise.
5938 (DUMPBASE_SUFFIX): Drop leading period.
5939 (debug_objcopy): Use concat.
5940 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
5941 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
5942 component. Simplify temp file names.
5943 * opts.c (finish_options): Drop aux base name handling.
5944 (common_handle_option): Drop auxbase-strip handling.
5945 * toplev.c (print_switch_values): Drop auxbase, add
5947 (process_options): Derive aux_base_name from dump_base_name
5949 (lang_dependent_init): Compute dump_base_ext along with
5950 dump_base_name. Disable stack usage and callgraph-info during
5951 lto generation and compare-debug recompilation.
5953 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
5954 Uroš Bizjak <ubizjak@gmail.com>
5958 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
5959 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5960 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
5961 float<floatunssuffix>v2div2sf2.
5962 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5963 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
5964 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
5965 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
5966 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5967 * config/i386/i386-builtin.def: Ditto.
5968 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
5969 subregs when both omode and imode are vector mode and
5970 have the same inner mode.
5972 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
5974 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
5975 Only turn MEM_REFs into bit-field stores for small bit-field regions.
5976 (imm_store_chain_info::output_merged_store): Be prepared for sources
5977 with non-integral type in the bit-field insertion case.
5978 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
5979 the largest size for the bit-field case.
5981 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
5983 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
5984 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
5985 (*vec_dupv4hi): Redefine as define_insn.
5986 Remove alternative with general register input.
5987 (*vec_dupv2si): Ditto.
5989 2020-05-25 Richard Biener <rguenther@suse.de>
5991 PR tree-optimization/95309
5992 * tree-vect-slp.c (vect_get_constant_vectors): Move number
5993 of vector computation ...
5994 (vect_slp_analyze_node_operations): ... to analysis phase.
5996 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
5998 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
5999 * lto-streamer.h (streamer_debugging): New constant
6000 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
6001 streamer_debugging check.
6002 (streamer_get_pickled_tree): Likewise.
6003 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
6005 2020-05-25 Richard Biener <rguenther@suse.de>
6007 PR tree-optimization/95308
6008 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
6009 test for TARGET_MEM_REFs.
6011 2020-05-25 Richard Biener <rguenther@suse.de>
6013 PR tree-optimization/95295
6014 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
6015 RHSes and drop to full sm_other if they are not equal.
6017 2020-05-25 Richard Biener <rguenther@suse.de>
6019 PR tree-optimization/95271
6020 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
6021 children vector type.
6022 (vectorizable_call): Pass down slp ops.
6024 2020-05-25 Richard Biener <rguenther@suse.de>
6026 PR tree-optimization/95297
6027 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
6028 skip updating operand 1 vector type.
6030 2020-05-25 Richard Biener <rguenther@suse.de>
6032 PR tree-optimization/95284
6033 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
6036 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
6039 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
6040 (trunc<mode><sf2dfmode_lower>2) New expander.
6041 (extend<sf2dfmode_lower><mode>2): Ditto.
6043 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
6045 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
6046 ubsan_{data,type},ASAN symbols linker-visible.
6048 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6050 * lto-streamer-out.c (DFS::DFS): Silence warning.
6052 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
6055 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
6056 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
6058 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6060 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
6063 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6065 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
6066 * lto-streamer-out.c (create_output_block): Fix whitespace
6067 (lto_write_tree_1): Add (debug) dump.
6068 (DFS::DFS): Add dump.
6069 (DFS::DFS_write_tree_body): Do not dump here.
6070 (lto_output_tree): Improve dumping; do not stream ref when not needed.
6071 (produce_asm_for_decls): Fix whitespace.
6072 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
6073 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
6075 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
6078 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
6079 (truncv32hiv32qi2): Ditto.
6080 (trunc<ssedoublemodelower><mode>2): Ditto.
6081 (trunc<mode><pmov_dst_3>2): Ditto.
6082 (trunc<mode><pmov_dst_mode_4>2): Ditto.
6083 (truncv2div2si2): Ditto.
6084 (truncv8div8qi2): Ditto.
6085 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
6086 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
6087 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
6088 *avx512vl_<code><mode>v<ssescalarnum>qi2.
6090 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
6093 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
6096 2020-05-22 Richard Biener <rguenther@suse.de>
6098 PR tree-optimization/95268
6099 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
6102 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6104 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
6107 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
6109 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
6110 (lto_input_scc): Optimize streaming of entry lengths.
6111 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
6112 (DFS::DFS): Optimize stremaing of entry lengths
6114 2020-05-22 Richard Biener <rguenther@suse.de>
6117 * doc/invoke.texi (flto): Document behavior of diagnostic
6120 2020-05-22 Richard Biener <rguenther@suse.de>
6122 * tree-vectorizer.h (vect_is_simple_use): New overload.
6123 (vect_maybe_update_slp_op_vectype): New.
6124 * tree-vect-stmts.c (vect_is_simple_use): New overload
6125 accessing operands of SLP vs. non-SLP operation transparently.
6126 (vect_maybe_update_slp_op_vectype): New function updating
6127 the possibly shared SLP operands vector type.
6128 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
6129 using the new vect_is_simple_use overload; update SLP invariant
6130 operand nodes vector type.
6131 (vectorizable_comparison): Likewise.
6132 (vectorizable_call): Likewise.
6133 (vectorizable_conversion): Likewise.
6134 (vectorizable_shift): Likewise.
6135 (vectorizable_store): Likewise.
6136 (vectorizable_condition): Likewise.
6137 (vectorizable_assignment): Likewise.
6138 * tree-vect-loop.c (vectorizable_reduction): Likewise.
6139 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
6140 present SLP_TREE_VECTYPE and check it matches previous
6143 2020-05-22 Richard Biener <rguenther@suse.de>
6145 PR tree-optimization/95248
6146 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
6148 2020-05-22 Richard Biener <rguenther@suse.de>
6150 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
6151 (_slp_tree::~_slp_tree): Likewise.
6152 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
6154 (_slp_tree::~_slp_tree): Implement.
6155 (vect_free_slp_tree): Simplify.
6156 (vect_create_new_slp_node): Likewise. Add nops parameter.
6157 (vect_build_slp_tree_2): Adjust.
6158 (vect_analyze_slp_instance): Likewise.
6160 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
6162 * adjust-alignment.c: Include memmodel.h.
6164 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
6167 * config/i386/cpuid.h: Use hexadecimal in comments.
6169 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
6172 * config/i386/i386-builtins.c (processor_features): Move
6173 F_AVX512VP2INTERSECT after F_AVX512BF16.
6174 (isa_names_table): Likewise.
6176 2020-05-21 Martin Liska <mliska@suse.cz>
6178 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
6179 Handle OPT_moutline_atomics.
6180 * config/aarch64/aarch64.c: Add outline-atomics to
6182 * doc/extend.texi: Document the newly added target attribute.
6184 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
6188 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
6189 operands 1 and 2 commutative. Manually swap operands.
6190 (*mmx_nabsv2sf2): Ditto.
6193 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
6195 * config/i386/i386.md (*<code>tf2_1):
6196 Mark operands 1 and 2 commutative.
6197 (*nabstf2_1): Ditto.
6198 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
6199 commutative. Do not swap operands.
6200 (*nabs<mode>2): Ditto.
6202 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
6205 * config/i386/sse.md (<code>v8qiv8hi2): Use
6206 simplify_gen_subreg instead of simplify_subreg.
6207 (<code>v8qiv8si2): Ditto.
6208 (<code>v4qiv4si2): Ditto.
6209 (<code>v4hiv4si2): Ditto.
6210 (<code>v8qiv8di2): Ditto.
6211 (<code>v4qiv4di2): Ditto.
6212 (<code>v2qiv2di2): Ditto.
6213 (<code>v4hiv4di2): Ditto.
6214 (<code>v2hiv2di2): Ditto.
6215 (<code>v2siv2di2): Ditto.
6217 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
6220 * config/i386/i386.md (*pushsi2_rex64):
6221 Use "e" constraint instead of "i".
6223 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
6225 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
6226 (lto_input_tree_1): Strenghten sanity check.
6227 (lto_input_tree): Update call of lto_input_scc.
6228 * lto-streamer-out.c: Include ipa-utils.h
6229 (create_output_block): Initialize local_trees if merigng is going
6231 (destroy_output_block): Destroy local_trees.
6232 (DFS): Add max_local_entry.
6233 (local_tree_p): New function.
6234 (DFS::DFS): Initialize and maintain it.
6235 (DFS::DFS_write_tree): Decide on streaming format.
6236 (lto_output_tree): Stream inline singleton SCCs
6237 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
6238 (struct output_block): Add local_trees.
6239 (lto_input_scc): Update prototype.
6241 2020-05-20 Patrick Palka <ppalka@redhat.com>
6244 * hash-table.h (hash_table::find_with_hash): Move up the call to
6247 2020-05-20 Martin Liska <mliska@suse.cz>
6249 * lto-compress.c (lto_compression_zstd): Fill up
6250 num_compressed_il_bytes.
6251 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
6253 2020-05-20 Richard Biener <rguenther@suse.de>
6255 PR tree-optimization/95219
6256 * tree-vect-loop.c (vectorizable_induction): Reduce
6257 group_size before computing the number of required IVs.
6259 2020-05-20 Richard Biener <rguenther@suse.de>
6262 * tree-inline.c (remap_gimple_stmt): Revert adjusting
6263 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
6265 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6266 Andre Vieira <andre.simoesdiasvieira@arm.com>
6269 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
6271 (mve_vector_mem_operand): Likewise.
6272 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
6273 the load from memory to a core register is legitimate for give mode.
6274 (mve_vector_mem_operand): Define function.
6275 (arm_print_operand): Modify comment.
6276 (arm_mode_base_reg_class): Define.
6277 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
6278 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
6279 * config/arm/constraints.md (Ux): Likewise.
6281 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
6282 add support for missing Vector Store Register and Vector Load Register.
6283 Add a new alternative to support load from memory to PC (or label) in
6285 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
6286 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
6287 mve_memory_operand and also modify the MVE instructions to emit.
6288 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
6289 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
6290 mve_memory_operand and also modify the MVE instructions to emit.
6291 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
6292 mve_memory_operand and also modify the MVE instructions to emit.
6293 (mve_vldrhq_z_fv8hf): Likewise.
6294 (mve_vldrhq_z_<supf><mode>): Likewise.
6295 (mve_vldrwq_fv4sf): Likewise.
6296 (mve_vldrwq_<supf>v4si): Likewise.
6297 (mve_vldrwq_z_fv4sf): Likewise.
6298 (mve_vldrwq_z_<supf>v4si): Likewise.
6299 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
6300 (mve_vld1q_<supf><mode>): Likewise.
6301 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
6303 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
6304 mve_memory_operand and also modify the MVE instructions to emit.
6305 (mve_vstrhq_p_<supf><mode>): Likewise.
6306 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
6308 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
6309 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
6310 instructions to emit.
6311 (mve_vstrwq_p_<supf>v4si): Likewise.
6312 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
6313 * config/arm/predicates.md (mve_memory_operand): Define.
6315 2020-05-30 Richard Biener <rguenther@suse.de>
6318 * c-fold.c (c_fully_fold_internal): Enhance guard on
6321 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
6324 * Makefile.in (OBJS): Add adjust-alignment.o.
6325 * adjust-alignment.c (pass_data_adjust_alignment): New.
6326 (pass_adjust_alignment): New.
6327 (pass_adjust_alignment::execute): New.
6328 (make_pass_adjust_alignment): New.
6329 * tree-pass.h (make_pass_adjust_alignment): New.
6330 * passes.def: Add pass_adjust_alignment.
6332 2020-05-19 Alex Coplan <alex.coplan@arm.com>
6335 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
6336 identity permutation.
6338 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6340 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
6341 msp430_small, msp430_large and size24plus DejaGNU effective
6343 Improve grammar in descriptions for size20plus and size32plus effective
6346 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
6348 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
6349 callee saved registers only in xBPF.
6350 (bpf_expand_prologue): Save callee saved registers only in xBPF.
6351 (bpf_expand_epilogue): Likewise for restoring.
6352 * doc/invoke.texi (eBPF Options): Document this is activated by
6355 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
6357 * config/bpf/bpf.opt (mxbpf): New option.
6358 * doc/invoke.texi (Option Summary): Add -mxbpf.
6359 (eBPF Options): Document -mxbbpf.
6361 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
6364 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
6365 (<code>v32qiv32hi2): Ditto.
6366 (<code>v8qiv8hi2): Ditto.
6367 (<code>v16qiv16si2): Ditto.
6368 (<code>v8qiv8si2): Ditto.
6369 (<code>v4qiv4si2): Ditto.
6370 (<code>v16hiv16si2): Ditto.
6371 (<code>v8hiv8si2): Ditto.
6372 (<code>v4hiv4si2): Ditto.
6373 (<code>v8qiv8di2): Ditto.
6374 (<code>v4qiv4di2): Ditto.
6375 (<code>v2qiv2di2): Ditto.
6376 (<code>v8hiv8di2): Ditto.
6377 (<code>v4hiv4di2): Ditto.
6378 (<code>v2hiv2di2): Ditto.
6379 (<code>v8siv8di2): Ditto.
6380 (<code>v4siv4di2): Ditto.
6381 (<code>v2siv2di2): Ditto.
6383 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
6385 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
6386 (riscv_implied_info): New.
6387 (riscv_subset_list): Add handle_implied_ext.
6388 (riscv_subset_list::to_string): New parameter version_p to
6389 control output format.
6390 (riscv_subset_list::handle_implied_ext): New.
6391 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
6392 (riscv_arch_str): New parameter version_p to control output format.
6393 (riscv_expand_arch): New.
6394 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
6396 * config/riscv/riscv.h (riscv_expand_arch): New,
6397 (EXTRA_SPEC_FUNCTIONS): Define.
6398 (ASM_SPEC): Transform -march= via riscv_expand_arch.
6400 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
6402 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
6403 parse_multiletter_ext.
6404 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
6405 adjust parsing order for 's' and 'x'.
6407 2020-05-19 Richard Biener <rguenther@suse.de>
6409 * tree-vectorizer.h (_slp_tree::vectype): Add field.
6410 (SLP_TREE_VECTYPE): New.
6411 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
6413 (vect_create_new_slp_node): Likewise.
6414 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
6416 (vect_slp_analyze_node_operations): Walk nodes children for
6418 (vect_get_constant_vectors): Use local scope op variable.
6419 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
6420 (vect_model_simple_cost): Adjust.
6421 (vect_model_store_cost): Likewise.
6422 (vectorizable_store): Likewise.
6424 2020-05-18 Martin Sebor <msebor@redhat.com>
6427 * tree-object-size.c (decl_init_size): New function.
6428 (addr_object_size): Call it.
6429 * tree.h (last_field): Declare.
6430 (first_field): Add attribute nonnull.
6432 2020-05-18 Martin Sebor <msebor@redhat.com>
6435 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
6436 * tree.c (component_ref_size): Correct the handling or array members
6438 Drop a pointless test.
6439 Rename a local variable.
6441 2020-05-18 Jason Merrill <jason@redhat.com>
6443 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
6444 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
6446 2020-05-14 Jason Merrill <jason@redhat.com>
6448 * doc/install.texi (Prerequisites): Update boostrap compiler
6449 requirement to C++11/GCC 4.8.
6451 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6453 PR tree-optimization/94952
6454 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
6455 Initialize variables bitpos, bitregion_start, and bitregion_end in
6456 order to silence warnings about use of uninitialized variables.
6458 2020-05-18 Carl Love <cel@us.ibm.com>
6461 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
6462 first_match_index_<mode>.
6463 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
6464 additional test cases with zero vector elements.
6466 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
6469 * config/i386/i386-expand.c (ix86_expand_int_movcc):
6470 Avoid reversing a non-trapping comparison to a trapping one.
6472 2020-05-18 Alex Coplan <alex.coplan@arm.com>
6474 * config/arm/arm.c (output_move_double): Fix codegen when loading into
6475 a register pair with an odd base register.
6477 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
6479 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
6480 Do not emit FLAGS_REG clobber for TFmode.
6481 * config/i386/i386.md (*<code>tf2_1): Rewrite as
6482 define_insn_and_split. Mark operands 1 and 2 commutative.
6483 (*nabstf2_1): Ditto.
6484 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
6485 Do not swap memory operands. Simplify RTX generation.
6486 (neg abs SSE splitter): Ditto.
6487 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
6488 commutative. Do not swap operands. Simplify RTX generation.
6489 (*nabs<mode>2): Ditto.
6491 2020-05-18 Richard Biener <rguenther@suse.de>
6493 * tree-vect-slp.c (vect_slp_bb): Start after labels.
6494 (vect_get_constant_vectors): Really place init stmt after scalar defs.
6495 * tree-vect-stmts.c (vect_init_vector_1): Insert before
6498 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
6500 * config/i386/driver-i386.c (host_detect_local_cpu): Support
6501 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
6504 2020-05-18 Richard Biener <rguenther@suse.de>
6507 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
6508 when inlining into a non-call EH function.
6510 2020-05-18 Richard Biener <rguenther@suse.de>
6512 PR tree-optimization/95172
6513 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
6514 eventually need the conditional processing.
6515 (execute_sm_exit): When processing an orderd sequence
6516 avoid doing any conditional processing.
6517 (hoist_memory_references): Pass down whether all edges
6518 have ordered processing for a ref to execute_sm.
6520 2020-05-17 Jeff Law <law@redhat.com>
6522 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
6523 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
6524 into a single pattern using pc_or_label_operand.
6525 * config/h8300/combiner.md (bit branch patterns): Likewise.
6526 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
6528 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
6531 * config/i386/i386-features.c (has_non_address_hard_reg):
6533 (pseudo_reg_set): This. Return the SET expression. Ignore
6534 pseudo register push.
6535 (general_scalar_to_vector_candidate_p): Combine single_set and
6536 has_non_address_hard_reg calls to pseudo_reg_set.
6537 (timode_scalar_to_vector_candidate_p): Likewise.
6538 * config/i386/i386.md (*pushv1ti2): New pattern.
6540 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6543 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6545 * tree-vrp.c (operand_less_p): Move to...
6546 * vr-values.c (operand_less_p): ...here.
6547 * tree-vrp.h (operand_less_p): Remove.
6549 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6551 * tree-vrp.c (operand_less_p): Move to...
6552 * vr-values.c (operand_less_p): ...here.
6553 * tree-vrp.h (operand_less_p): Remove.
6555 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6557 * tree-vrp.c (class vrp_insert): Remove prototype for
6560 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6562 * tree-vrp.c (class live_names): New.
6563 (live_on_edge): Move into live_names.
6564 (build_assert_expr_for): Move into vrp_insert.
6565 (find_assert_locations_in_bb): Rename from
6566 find_assert_locations_1.
6567 (process_assert_insertions_for): Move into vrp_insert.
6568 (compare_assert_loc): Same.
6569 (remove_range_assertions): Same.
6570 (dump_asserts_for): Rename to vrp_insert::dump.
6571 (debug_asserts_for): Rename to vrp_insert::debug.
6572 (dump_all_asserts): Rename to vrp_insert::dump.
6573 (debug_all_asserts): Rename to vrp_insert::debug.
6575 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
6577 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
6578 check_array_ref, check_mem_ref, and search_for_addr_array
6580 (class array_bounds_checker): ...here.
6581 (class check_array_bounds_dom_walker): Adjust to use
6582 array_bounds_checker.
6583 (check_all_array_refs): Move into array_bounds_checker and rename
6585 (class vrp_folder): Make fold_predicate_in private.
6587 2020-05-15 Jeff Law <law@redhat.com>
6589 * config/h8300/h8300.md (SFI iterator): New iterator for
6591 * config/h8300/peepholes.md (memory comparison): Use mode
6592 iterator to consolidate 3 patterns into one.
6593 (stack allocation and stack store): Handle SFmode. Handle
6596 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
6598 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
6599 RS6000_BTM_POWERPC64.
6601 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
6603 * config/i386/i386.md (SWI48DWI): New mode iterator.
6604 (*push<mode>2): Allow XMM registers.
6605 (*pushdi2_rex64): Ditto.
6606 (*pushsi2_rex64): Ditto.
6608 (push XMM reg splitter): New splitter
6610 (*pushdf) Change "x" operand constraint to "v".
6611 (*pushsf_rex64): Ditto.
6614 2020-05-15 Richard Biener <rguenther@suse.de>
6616 PR tree-optimization/92260
6617 * tree-vect-slp.c (vect_get_constant_vectors): Compute
6618 the number of vector stmts in a canonical way.
6620 2020-05-15 Martin Liska <mliska@suse.cz>
6622 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
6625 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
6627 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
6629 2020-05-15 Richard Biener <rguenther@suse.de>
6631 PR tree-optimization/95133
6632 * gimple-ssa-split-paths.c
6633 (find_block_to_duplicate_for_splitting_paths): Check for
6636 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
6638 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
6640 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
6642 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
6645 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
6646 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
6649 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
6652 * config/i386/i386.md (isa): Add sse3_noavx.
6653 (enabled): Handle sse3_noavx.
6655 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
6656 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
6657 alternatives. Match commutative vec_select selector operands.
6658 (*mmx_haddv2sf3_low): New insn pattern.
6660 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
6661 (*mmx_hsubv2sf3_low): New insn pattern.
6663 2020-05-15 Richard Biener <rguenther@suse.de>
6665 PR tree-optimization/33315
6666 * tree-ssa-sink.c: Include tree-eh.h.
6667 (sink_stats): Add commoned member.
6668 (sink_common_stores_to_bb): New function implementing store
6669 commoning by sinking to the successor.
6670 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
6671 (pass_sink_code::execute): Likewise. Record commoned stores
6674 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
6676 PR rtl-optimization/37451, part of PR target/61837
6677 * loop-doloop.c (doloop_simplify_count): New function. Simplify
6678 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
6679 (doloop_modify): Call doloop_simplify_count.
6681 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
6684 * doc/sourcebuild.texi: Document effective target lgccjit.
6686 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
6688 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
6689 define_expand, and rename the original to ...
6690 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
6691 (add<mode>3_zext_dup_exec): Likewise, with ...
6692 (add<mode>3_vcc_zext_dup_exec): ... this.
6693 (add<mode>3_zext_dup2): Likewise, with ...
6694 (add<mode>3_zext_dup_exec): ... this.
6695 (add<mode>3_zext_dup2_exec): Likewise, with ...
6696 (add<mode>3_zext_dup2): ... this.
6697 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
6698 addv64di3_zext* calls to use addv64di3_vcc_zext*.
6700 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
6703 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
6704 (extendv2sfv2df2): Ditto.
6706 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
6708 * configure: Regenerated.
6710 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
6712 * config/arm/arm.c (reg_needs_saving_p): New function.
6713 (use_return_insn): Use reg_needs_saving_p.
6714 (arm_get_vfp_saved_size): Likewise.
6715 (arm_compute_frame_layout): Likewise.
6716 (arm_save_coproc_regs): Likewise.
6717 (thumb1_expand_epilogue): Likewise.
6718 (arm_expand_epilogue_apcs_frame): Likewise.
6719 (arm_expand_epilogue): Likewise.
6721 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
6723 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
6725 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
6728 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
6730 (floatv2siv2df2): New expander.
6731 (floatunsv2siv2df2): New insn pattern.
6733 (fix_truncv2dfv2si2): New expander.
6734 (fixuns_truncv2dfv2si2): New insn pattern.
6736 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
6739 * config/aarch64/aarch64-sve-builtins.cc
6740 (handle_arm_sve_vector_bits_attribute): Create a copy of the
6741 original type's TYPE_MAIN_VARIANT, then reapply all the differences
6742 between the original type and its main variant.
6744 2020-05-14 Richard Biener <rguenther@suse.de>
6747 * real.c (real_to_decimal_for_mode): Make sure we handle
6748 a zero with nonzero exponent.
6750 2020-05-14 Jakub Jelinek <jakub@redhat.com>
6752 * Makefile.in (GTFILES): Add omp-general.c.
6753 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
6754 calls_declare_variant_alt members and initialize them in the
6756 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
6757 calls to declare_variant_alt nodes.
6758 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
6759 and calls_declare_variant_alt.
6760 (input_overwrite_node): Read them back.
6761 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
6763 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
6765 (tree_function_versioning): Copy calls_declare_variant_alt bit.
6766 * omp-offload.c (execute_omp_device_lower): Call
6767 omp_resolve_declare_variant on direct function calls.
6768 (pass_omp_device_lower::gate): Also enable for
6769 calls_declare_variant_alt functions.
6770 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
6771 (omp_context_selector_matches): Handle the case when
6772 cfun->curr_properties has PROP_gimple_any bit set.
6773 (struct omp_declare_variant_entry): New type.
6774 (struct omp_declare_variant_base_entry): New type.
6775 (struct omp_declare_variant_hasher): New type.
6776 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
6778 (omp_declare_variants): New variable.
6779 (struct omp_declare_variant_alt_hasher): New type.
6780 (omp_declare_variant_alt_hasher::hash,
6781 omp_declare_variant_alt_hasher::equal): New methods.
6782 (omp_declare_variant_alt): New variables.
6783 (omp_resolve_late_declare_variant): New function.
6784 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
6785 when called late. Create a magic declare_variant_alt fndecl and
6786 cgraph node and return that if decision needs to be deferred until
6787 after gimplification.
6788 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
6792 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
6793 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
6794 entry block if info->after_stmt is NULL, otherwise add after that stmt
6795 and update it after adding each stmt.
6796 (ipa_simd_modify_function_body): Initialize info.after_stmt.
6798 * function.h (struct function): Add has_omp_target bit.
6799 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
6801 (omp_discover_declare_target_tgt_fn_r): ... this.
6802 (omp_discover_declare_target_var_r): Call
6803 omp_discover_declare_target_tgt_fn_r instead of
6804 omp_discover_declare_target_fn_r.
6805 (omp_discover_implicit_declare_target): Also queue functions with
6806 has_omp_target bit set, for those walk with
6807 omp_discover_declare_target_fn_r, for declare target to functions
6808 walk with omp_discover_declare_target_tgt_fn_r.
6810 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
6813 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
6814 Add SSE/AVX alternative. Change operand predicates from
6815 nonimmediate_operand to register_mmxmem_operand.
6816 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6817 (fix_truncv2sfv2si2): New expander.
6818 (fixuns_truncv2sfv2si2): New insn pattern.
6820 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
6821 Add SSE/AVX alternative. Change operand predicates from
6822 nonimmediate_operand to register_mmxmem_operand.
6823 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6824 (floatv2siv2sf2): New expander.
6825 (floatunsv2siv2sf2): New insn pattern.
6827 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
6829 (IX86_BUILTIN_PI2FD): Ditto.
6831 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
6833 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
6835 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
6838 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
6840 * config/s390/s390.c (allocate_stack_space): Add missing updates
6841 of last_probe_offset.
6843 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
6845 * config/s390/s390.md ("allocate_stack"): Call
6846 anti_adjust_stack_and_probe_stack_clash when stack clash
6847 protection is enabled.
6848 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
6849 prototype. Remove static.
6850 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
6853 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
6855 * config/rs6000/altivec.h (vec_extractl): New #define.
6856 (vec_extracth): Likewise.
6857 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
6858 (UNSPEC_EXTRACTR): Likewise.
6859 (vextractl<mode>): New expansion.
6860 (vextractl<mode>_internal): New insn.
6861 (vextractr<mode>): New expansion.
6862 (vextractr<mode>_internal): New insn.
6863 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
6864 New built-in function.
6865 (__builtin_altivec_vextduhvlx): Likewise.
6866 (__builtin_altivec_vextduwvlx): Likewise.
6867 (__builtin_altivec_vextddvlx): Likewise.
6868 (__builtin_altivec_vextdubvhx): Likewise.
6869 (__builtin_altivec_vextduhvhx): Likewise.
6870 (__builtin_altivec_vextduwvhx): Likewise.
6871 (__builtin_altivec_vextddvhx): Likewise.
6872 (__builtin_vec_extractl): New overloaded built-in function.
6873 (__builtin_vec_extracth): Likewise.
6874 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
6875 Define overloaded forms of __builtin_vec_extractl and
6876 __builtin_vec_extracth.
6877 (builtin_function_type): Add cases to mark arguments of new
6878 built-in functions as unsigned.
6879 (rs6000_common_init_builtins): Add
6880 opaque_ftype_opaque_opaque_opaque_opaque.
6881 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
6882 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6883 for a Future Architecture): Add description of vec_extractl and
6884 vec_extractr built-in functions.
6886 2020-05-13 Richard Biener <rguenther@suse.de>
6888 * target.def (add_stmt_cost): Add new vectype parameter.
6889 * targhooks.c (default_add_stmt_cost): Adjust.
6890 * targhooks.h (default_add_stmt_cost): Likewise.
6891 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
6893 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
6894 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
6895 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
6897 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
6898 (dump_stmt_cost): Add new vectype parameter.
6899 (add_stmt_cost): Likewise.
6900 (record_stmt_cost): Likewise.
6901 (record_stmt_cost): Add overload with old signature.
6902 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
6904 (vect_get_known_peeling_cost): Likewise.
6905 (vect_estimate_min_profitable_iters): Likewise.
6906 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
6907 * tree-vect-stmts.c (record_stmt_cost): Likewise.
6908 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
6909 and pass down correct vectype and NULL stmt_info.
6910 (vect_model_simple_cost): Adjust.
6911 (vect_model_store_cost): Likewise.
6913 2020-05-13 Richard Biener <rguenther@suse.de>
6915 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
6916 (_slp_instance::group_size): Likewise.
6917 * tree-vect-loop.c (vectorizable_reduction): The group size
6918 is the number of lanes in the node.
6919 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
6920 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
6921 verify it matches the instance trees number of lanes.
6922 (vect_slp_analyze_node_operations_1): Use the numer of lanes
6923 in the node as group size.
6924 (vect_bb_vectorization_profitable_p): Use the instance root
6925 number of lanes for the size of life.
6926 (vect_schedule_slp_instance): Use the number of lanes as
6928 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
6929 parameter. Use the number of lanes of the load for the group
6930 size in the gap adjustment code.
6931 (vect_analyze_stmt): Adjust.
6932 (vect_transform_stmt): Likewise.
6934 2020-05-13 Jakub Jelinek <jakub@redhat.com>
6937 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
6938 if the last insn is a note.
6940 PR tree-optimization/95060
6941 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
6942 if it is the single use of the FMA internal builtin.
6944 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
6946 PR tree-optimization/94969
6947 * tree-data-dependence.c (constant_access_functions): Rename to...
6948 (invariant_access_functions): ...this. Add parameter. Check for
6949 invariant access function, rather than constant.
6950 (build_classic_dist_vector): Call above function.
6951 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
6953 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
6956 * doc/extend.texi (x86Operandmodifiers): Document more x86
6958 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
6960 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
6962 * tree-vrp.c (class vrp_insert): New.
6963 (insert_range_assertions): Move to class vrp_insert.
6964 (dump_all_asserts): Same as above.
6965 (dump_asserts_for): Same as above.
6966 (live): Same as above.
6967 (need_assert_for): Same as above.
6968 (live_on_edge): Same as above.
6969 (finish_register_edge_assert_for): Same as above.
6970 (find_switch_asserts): Same as above.
6971 (find_assert_locations): Same as above.
6972 (find_assert_locations_1): Same as above.
6973 (find_conditional_asserts): Same as above.
6974 (process_assert_insertions): Same as above.
6975 (register_new_assert_for): Same as above.
6976 (vrp_prop): New variable fun.
6977 (vrp_initialize): New parameter.
6978 (identify_jump_threads): Same as above.
6979 (execute_vrp): Same as above.
6982 2020-05-12 Keith Packard <keith.packard@sifive.com>
6984 * config/riscv/riscv.c (riscv_unique_section): New.
6985 (TARGET_ASM_UNIQUE_SECTION): New.
6987 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
6989 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
6990 * config/riscv/riscv-passes.def: New file.
6991 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
6992 * config/riscv/riscv-shorten-memrefs.c: New file.
6993 * config/riscv/riscv.c (tree-pass.h): New include.
6994 (riscv_compressed_reg_p): New Function
6995 (riscv_compressed_lw_offset_p): Likewise.
6996 (riscv_compressed_lw_address_p): Likewise.
6997 (riscv_shorten_lw_offset): Likewise.
6998 (riscv_legitimize_address): Attempt to convert base + large_offset
6999 to compressible new_base + small_offset.
7000 (riscv_address_cost): Make anticipated compressed load/stores
7001 cheaper for code size than uncompressed load/stores.
7002 (riscv_register_priority): Move compressed register check to
7003 riscv_compressed_reg_p.
7004 * config/riscv/riscv.h (C_S_BITS): Define.
7005 (CSW_MAX_OFFSET): Define.
7006 * config/riscv/riscv.opt (mshorten-memefs): New option.
7007 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
7008 (PASSES_EXTRA): Add riscv-passes.def.
7009 * doc/invoke.texi: Document -mshorten-memrefs.
7011 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
7012 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
7013 * doc/tm.texi: Regenerate.
7014 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
7015 * sched-deps.c (attempt_change): Use old address if it is cheaper than
7017 * target.def (new_address_profitable_p): New hook.
7018 * targhooks.c (default_new_address_profitable_p): New function.
7019 * targhooks.h (default_new_address_profitable_p): Declare.
7021 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
7024 * config/i386/mmx.md (copysignv2sf3): New expander.
7025 (xorsignv2sf3): Ditto.
7026 (signbitv2sf3): Ditto.
7028 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
7031 * config/i386/mmx.md (fmav2sf4): New insn pattern.
7036 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
7038 * Makefile.in (CET_HOST_FLAGS): New.
7039 (COMPILER): Add $(CET_HOST_FLAGS).
7040 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
7041 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
7043 * aclocal.m4: Regenerated.
7044 * configure: Likewise.
7046 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
7049 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
7050 (*mmx_<code>v2sf2): New insn_and_split pattern.
7051 (*mmx_nabsv2sf2): Ditto.
7052 (*mmx_andnotv2sf3): New insn pattern.
7053 (*mmx_<code>v2sf3): Ditto.
7054 * config/i386/i386.md (absneg_op): New code attribute.
7055 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
7056 (ix86_build_signbit_mask): Ditto.
7058 2020-05-12 Richard Biener <rguenther@suse.de>
7060 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
7063 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7065 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
7066 Update prototype to include "local" argument.
7067 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
7068 "local" argument. Handle local common decls.
7069 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
7070 msp430_output_aligned_decl_common call with 0 for "local" argument.
7071 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
7073 2020-05-12 Richard Biener <rguenther@suse.de>
7075 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
7077 2020-05-12 Martin Liska <mliska@suse.cz>
7081 * sanopt.c (sanitize_rewrite_addressable_params):
7082 Clear DECL_NOT_GIMPLE_REG_P for argument.
7084 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7086 PR tree-optimization/94980
7087 * tree-vect-generic.c (expand_vector_comparison): Use
7088 vector_element_bits_tree to get the element size in bits,
7089 rather than using TYPE_SIZE.
7090 (expand_vector_condition, vector_element): Likewise.
7092 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7094 PR tree-optimization/94980
7095 * tree-vect-generic.c (build_replicated_const): Take the number
7096 of bits as a parameter, instead of the type of the elements.
7097 (do_plus_minus): Update accordingly, using vector_element_bits
7098 to calculate the correct number of bits.
7099 (do_negate): Likewise.
7101 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
7103 PR tree-optimization/94980
7104 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
7105 * tree.c (vector_element_bits, vector_element_bits_tree): New.
7106 * match.pd: Use the new functions instead of determining the
7107 vector element size directly from TYPE_SIZE(_UNIT).
7108 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
7109 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
7110 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
7111 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
7112 (expand_vector_conversion): Likewise.
7113 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
7114 a divisor. Convert the dividend to bits to compensate.
7115 * tree-vect-loop.c (vectorizable_live_operation): Call
7116 vector_element_bits instead of open-coding it.
7118 2020-05-12 Jakub Jelinek <jakub@redhat.com>
7120 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
7121 * omp-offload.c: Include context.h.
7122 (omp_declare_target_fn_p, omp_declare_target_var_p,
7123 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
7124 omp_discover_implicit_declare_target): New functions.
7125 * cgraphunit.c (analyze_functions): Call
7126 omp_discover_implicit_declare_target.
7128 2020-05-12 Richard Biener <rguenther@suse.de>
7130 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
7131 literal constant &MEM[..] to a constant literal.
7133 2020-05-12 Richard Biener <rguenther@suse.de>
7135 PR tree-optimization/95045
7136 * dbgcnt.def (lim): Add debug-counter.
7137 * tree-ssa-loop-im.c: Include dbgcnt.h.
7138 (find_refs_for_sm): Use lim debug counter for store motion
7140 (do_store_motion): Rename form store_motion. Commit edge
7142 (store_motion_loop): ... here.
7143 (tree_ssa_lim): Adjust.
7145 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7147 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
7148 (vec_ctzm): Rename to vec_cnttzm.
7149 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
7150 Change fourth operand for vec_ternarylogic to require
7151 compatibility with unsigned SImode rather than unsigned QImode.
7152 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7153 Remove overloaded forms of vec_gnb that are no longer needed.
7154 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7155 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
7156 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
7157 vec_gnb; move vec_ternarylogic documentation into this section
7158 and replace const unsigned char with const unsigned int as its
7161 2020-05-11 Carl Love <cel@us.ibm.com>
7163 * config/rs6000/altivec.h (vec_genpcvm): New #define.
7164 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
7166 (XXGENPCVM_V8HI): Likewise.
7167 (XXGENPCVM_V4SI): Likewise.
7168 (XXGENPCVM_V2DI): Likewise.
7169 (XXGENPCVM): New overloaded built-in instantiation.
7170 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
7171 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
7172 (altivec_expand_builtin): Add special handling for
7173 FUTURE_BUILTIN_VEC_XXGENPCVM.
7174 (builtin_function_type): Add handling for
7175 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
7176 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
7177 (UNSPEC_XXGENPCV): New constant.
7178 (xxgenpcvm_<mode>_internal): New insn.
7179 (xxgenpcvm_<mode>): New expansion.
7180 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
7182 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7184 * config/rs6000/altivec.h (vec_strir): New #define.
7185 (vec_stril): Likewise.
7186 (vec_strir_p): Likewise.
7187 (vec_stril_p): Likewise.
7188 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
7189 (UNSPEC_VSTRIL): Likewise.
7190 (vstrir_<mode>): New expansion.
7191 (vstrir_code_<mode>): New insn.
7192 (vstrir_p_<mode>): New expansion.
7193 (vstrir_p_code_<mode>): New insn.
7194 (vstril_<mode>): New expansion.
7195 (vstril_code_<mode>): New insn.
7196 (vstril_p_<mode>): New expansion.
7197 (vstril_p_code_<mode>): New insn.
7198 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
7199 New built-in function.
7200 (__builtin_altivec_vstrihr): Likewise.
7201 (__builtin_altivec_vstribl): Likewise.
7202 (__builtin_altivec_vstrihl): Likewise.
7203 (__builtin_altivec_vstribr_p): Likewise.
7204 (__builtin_altivec_vstrihr_p): Likewise.
7205 (__builtin_altivec_vstribl_p): Likewise.
7206 (__builtin_altivec_vstrihl_p): Likewise.
7207 (__builtin_vec_strir): New overloaded built-in function.
7208 (__builtin_vec_stril): Likewise.
7209 (__builtin_vec_strir_p): Likewise.
7210 (__builtin_vec_stril_p): Likewise.
7211 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7212 Define overloaded forms of __builtin_vec_strir,
7213 __builtin_vec_stril, __builtin_vec_strir_p, and
7214 __builtin_vec_stril_p.
7215 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7216 for a Future Architecture): Add description of vec_stril,
7217 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
7219 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
7221 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
7222 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
7224 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
7225 * config/rs6000/rs6000-builtin.def: Add handling of new macro
7227 (BU_FUTURE_V_4): New macro. Use it.
7228 (BU_FUTURE_OVERLOAD_4): Likewise.
7229 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
7230 handling for quaternary built-in functions.
7231 (altivec_resolve_overloaded_builtin): Add special-case handling
7232 for __builtin_vec_xxeval.
7233 * config/rs6000/rs6000-call.c: Add handling of new macro
7234 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
7235 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
7236 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
7237 (altivec_overloaded_builtins): Add definitions for
7238 FUTURE_BUILTIN_VEC_XXEVAL.
7239 (bdesc_4arg): New array.
7240 (htm_expand_builtin): Add handling for quaternary built-in
7242 (rs6000_expand_quaternop_builtin): New function.
7243 (rs6000_expand_builtin): Add handling for quaternary built-in
7245 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
7246 for unsigned QImode and unsigned HImode.
7247 (builtin_quaternary_function_type): New function.
7248 (rs6000_common_init_builtins): Add handling of quaternary
7250 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
7252 (RS6000_BTC_PREDICATE): Change value of constant.
7253 (RS6000_BTC_ABS): Likewise.
7254 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
7255 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
7256 for a Future Architecture): Add description of vec_ternarylogic
7259 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7261 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
7263 (__builtin_pextd): Likewise.
7264 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
7265 (UNSPEC_PEXTD): Likewise.
7268 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
7269 a Future Architecture): Add descriptions of __builtin_pdepd and
7270 __builtin_pextd functions.
7272 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7274 * config/rs6000/altivec.h (vec_clrl): New #define.
7275 (vec_clrr): Likewise.
7276 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
7277 (UNSPEC_VCLRRB): Likewise.
7280 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
7282 (__builtin_altivec_vclrrb): Likewise.
7283 (__builtin_vec_clrl): New overloaded built-in function.
7284 (__builtin_vec_clrr): Likewise.
7285 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7286 Define overloaded forms of __builtin_vec_clrl and
7288 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7289 for a Future Architecture): Add descriptions of vec_clrl and
7292 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7294 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
7295 built-in function definition.
7296 (__builtin_cnttzdm): Likewise.
7297 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
7298 (UNSPEC_CNTTZDM): Likewise.
7299 (cntlzdm): New insn.
7300 (cnttzdm): Likewise.
7301 * doc/extend.texi (Basic PowerPC Built-in Functions available for
7302 a Future Architecture): Add descriptions of __builtin_cntlzdm and
7303 __builtin_cnttzdm functions.
7305 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
7308 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
7310 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7312 * config/rs6000/altivec.h (vec_cfuge): New #define.
7313 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
7314 (vcfuged): New insn.
7315 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
7316 New built-in function.
7317 * config/rs6000/rs6000-call.c (builtin_function_type): Add
7318 handling for FUTURE_BUILTIN_VCFUGED case.
7319 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7320 for a Future Architecture): Add description of vec_cfuge built-in
7323 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7325 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
7327 (BU_FUTURE_MISC_1): Likewise.
7328 (BU_FUTURE_MISC_2): Likewise.
7329 (BU_FUTURE_MISC_3): Likewise.
7330 (__builtin_cfuged): New built-in function definition.
7331 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
7333 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
7334 a Future Architecture): New subsubsection.
7336 2020-05-11 Richard Biener <rguenther@suse.de>
7338 PR tree-optimization/95049
7339 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
7340 between different constants.
7342 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
7344 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
7346 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7347 Bill Schmidt <wschmidt@linux.ibm.com>
7349 * config/rs6000/altivec.h (vec_gnb): New #define.
7350 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
7352 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
7354 (BU_FUTURE_OVERLOAD_2): Likewise.
7355 (BU_FUTURE_OVERLOAD_3): Likewise.
7356 (__builtin_altivec_gnb): New built-in function.
7357 (__buiiltin_vec_gnb): New overloaded built-in function.
7358 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
7359 Define overloaded forms of __builtin_vec_gnb.
7360 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
7361 of __builtin_vec_gnb.
7362 (builtin_function_type): Mark return value and arguments unsigned
7363 for FUTURE_BUILTIN_VGNB.
7364 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
7365 for a Future Architecture): Add description of vec_gnb built-in
7368 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7369 Bill Schmidt <wschmidt@linux.ibm.com>
7371 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
7373 (vec_pext): Likewise.
7374 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
7375 (UNSPEC_VPEXTD): Likewise.
7378 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
7380 (__builtin_altivec_vpextd): Likewise.
7381 * config/rs6000/rs6000-call.c (builtin_function_type): Add
7382 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
7384 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
7385 for a Future Architecture): Add description of vec_pdep and
7386 vec_pext built-in functions.
7388 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
7389 Bill Schmidt <wschmidt@linux.ibm.com>
7391 * config/rs6000/altivec.h (vec_clzm): New macro.
7392 (vec_ctzm): Likewise.
7393 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
7394 (UNSPEC_VCTZDM): Likewise.
7397 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
7398 (BU_FUTURE_V_1): Likewise.
7399 (BU_FUTURE_V_2): Likewise.
7400 (BU_FUTURE_V_3): Likewise.
7401 (__builtin_altivec_vclzdm): New builtin definition.
7402 (__builtin_altivec_vctzdm): Likewise.
7403 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
7404 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
7406 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
7407 value and parameter types to be unsigned for VCLZDM and VCTZDM.
7408 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
7409 support for TARGET_FUTURE flag.
7410 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
7411 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
7412 for a Future Architecture): New subsubsection.
7414 2020-05-11 Richard Biener <rguenther@suse.de>
7416 PR tree-optimization/94988
7417 PR tree-optimization/95025
7418 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
7419 (sm_seq_push_down): Take extra parameter denoting where we
7421 (execute_sm_exit): Re-issue sm_other stores in the correct
7423 (sm_seq_valid_bb): When always executed, allow sm_other to
7424 prevail inbetween sm_ord and record their stored value.
7425 (hoist_memory_references): Adjust refs_not_supported propagation
7426 and prune sm_other from the end of the ordered sequences.
7428 2020-05-11 Felix Yang <felix.yang@huawei.com>
7431 * config/aarch64/aarch64.md (mov<mode>):
7432 Bitcasts to the equivalent integer mode using gen_lowpart
7433 instead of doing FAIL for scalar floating point move.
7435 2020-05-11 Alex Coplan <alex.coplan@arm.com>
7437 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
7438 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
7439 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
7440 (*csinv3_uxtw_insn2): New.
7441 (*csinv3_uxtw_insn3): New.
7442 * config/aarch64/iterators.md (neg_not_cs): New.
7444 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
7447 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
7448 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
7449 (*mmx_addv2sf3): Ditto.
7450 (*mmx_subv2sf3): Ditto.
7451 (*mmx_mulv2sf3): Ditto.
7452 (*mmx_<code>v2sf3): Ditto.
7453 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
7455 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
7458 * config/i386/i386.c (ix86_vector_mode_supported_p):
7459 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
7460 * config/i386/mmx.md (*mov<mode>_internal): Do not set
7461 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
7463 (mmx_addv2sf3): Change operand predicates from
7464 nonimmediate_operand to register_mmxmem_operand.
7465 (addv2sf3): New expander.
7466 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
7467 predicates from nonimmediate_operand to register_mmxmem_operand.
7468 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7470 (mmx_subv2sf3): Change operand predicate from
7471 nonimmediate_operand to register_mmxmem_operand.
7472 (mmx_subrv2sf3): Ditto.
7473 (subv2sf3): New expander.
7474 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
7475 predicates from nonimmediate_operand to register_mmxmem_operand.
7476 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7478 (mmx_mulv2sf3): Change operand predicates from
7479 nonimmediate_operand to register_mmxmem_operand.
7480 (mulv2sf3): New expander.
7481 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
7482 predicates from nonimmediate_operand to register_mmxmem_operand.
7483 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7485 (mmx_<code>v2sf3): Change operand predicates from
7486 nonimmediate_operand to register_mmxmem_operand.
7487 (<code>v2sf3): New expander.
7488 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
7489 predicates from nonimmediate_operand to register_mmxmem_operand.
7490 Enable instruction pattern for TARGET_MMX_WITH_SSE.
7491 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
7493 2020-05-11 Martin Liska <mliska@suse.cz>
7496 * common.opt: Fix typo in option description.
7498 2020-05-11 Martin Liska <mliska@suse.cz>
7500 PR gcov-profile/94928
7501 * gcov-io.h: Add caveat about coverage format parsing and
7502 possible outdated documentation.
7504 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
7506 PR tree-optimization/83403
7507 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
7508 determine_value_range, Add fold conversion of MULT_EXPR, fix the
7511 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
7513 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
7514 __ILP32__ for 32-bit targets.
7516 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
7518 * tree.h (expr_align): Delete.
7519 * tree.c (expr_align): Likewise.
7521 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
7523 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
7524 from end_of_function_needs.
7526 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
7527 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
7529 * config/cris/t-elfmulti: Remove crisv32 multilib.
7530 * config/cris: Remove shared-library and CRIS v32 support.
7532 Move trivially from cc0 to reg:CC model, removing most optimizations.
7533 * config/cris/cris.md: Remove all side-effect patterns and their
7534 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
7535 to all but post-reload control-flow and movem insns. Remove
7536 constraints on all modified expanders. Remove obsoleted cc0-related
7538 (attr "cc"): Remove alternative "rev".
7539 (mode_iterator BWDD, DI_, SI_): New.
7540 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
7541 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
7542 ("mstep_shift", "mstep_mul"): Remove patterns.
7543 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
7544 * config/cris/cris.c: Change all non-condition-code,
7545 non-control-flow emitted insns to add a parallel with clobber of
7546 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
7547 emit_insn to use of emit_move_insn, gen_add2_insn or
7548 cris_emit_insn, as convenient.
7549 (cris_reg_overlap_mentioned_p)
7550 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
7551 (cris_movem_load_rest_p): Don't assume all elements in a
7553 (cris_store_multiple_op_p): Ditto.
7554 (cris_emit_insn): New function.
7555 * cris/cris-protos.h (cris_emit_insn): Declare.
7558 * config/cris/cris.md (zcond): New code_iterator.
7559 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
7561 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
7563 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
7565 * config/cris/cris.md ("movsi"): For memory destination
7566 post-reload, generate clobberless variant. Similarly for a
7567 zero-source post-reload.
7568 ("*mov_tomem<mode>_split"): New split.
7569 ("*mov_tomem<mode>"): New insn.
7570 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
7571 "Q>m" for less-than-SImode.
7572 ("*mov_fromzero<mode>_split"): New split.
7573 ("*mov_fromzero<mode>"): New insn.
7575 Prepare for cmpelim pass to eliminate redundant compare insns.
7576 * config/cris/cris-modes.def: New file.
7577 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
7578 (cris_notice_update_cc): Remove left-over declaration.
7579 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
7580 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
7581 * config/cris/cris.h (SELECT_CC_MODE): Define.
7582 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
7584 (cond): New code_iterator.
7585 (nzcond): Replacement for incorrect ncond. All callers changed.
7586 (nzvccond): Replacement for ocond. All callers changed.
7587 (rnzcond): Replacement for rcond. All callers changed.
7588 (xCC): New code_attr.
7589 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
7591 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
7592 CCmode with iteration over NZVCSET.
7593 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
7595 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
7596 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
7597 ("*btst<mode>"): Similarly, from "*btst".
7598 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
7599 iterating over cond instead of matching the comparison with
7600 ordered_comparison_operator.
7601 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
7602 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
7604 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
7605 NZVCUSE. Remove FIXME.
7606 ("*b<nzcond:code>_reversed<mode>"): Similarly from
7607 "*b<ncond:code>_reversed", over NZUSE.
7608 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
7609 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
7610 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
7611 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
7612 depending on CC_NZmode vs. CCmode. Remove FIXME.
7613 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
7614 "*b<rcond:code>_reversed", over NZUSE.
7615 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
7616 iterating over cond instead of matching the comparison with
7617 ordered_comparison_operator.
7618 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
7619 iterating over NZUSE.
7620 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
7621 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
7622 depending on CC_NZmode vs. CCmode.
7623 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
7624 NZVCUSE. Remove FIXME.
7625 ("cc"): Comment on new use.
7626 ("cc_enabled"): New attribute.
7627 ("enabled"): Make default fall back to cc_enabled.
7628 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
7629 default_subst_attrs.
7630 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
7631 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
7632 "*movsi_internal". Correct contents of, and rename attribute
7633 "cc" to "cc<cccc><ccnz><ccnzvc>".
7634 ("anz", "anzvc", "acc"): New define_subst_attrs.
7635 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
7636 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
7637 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
7638 "movqi". Correct contents of, and rename "cc" attribute to
7639 "cc<cccc><ccnz><ccnzvc>".
7640 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
7641 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
7642 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
7643 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
7644 Rename from "extend<mode>si2".
7645 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
7646 Similar, from "zero_extend<mode>si2".
7647 ("*adddi3<setnz>"): Rename from "*adddi3".
7648 ("*subdi3<setnz>"): Similarly from "*subdi3".
7649 ("*addsi3<setnz>"): Similarly from "*addsi3".
7650 ("*subsi3<setnz>"): Similarly from "*subsi3".
7651 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
7652 "cc" attribute to "cc<ccnz>".
7653 ("*addqi3<setnz>"): Similarly from "*addqi3".
7654 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
7655 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
7657 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
7658 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
7659 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
7660 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
7661 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
7662 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
7663 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
7664 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
7666 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
7668 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
7670 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
7672 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
7674 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
7676 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
7677 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
7678 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
7679 (znnCC, rznnCC): New code_attrs.
7680 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
7681 obseolete comment. Add belt-and-suspenders mode-test to condition.
7682 Add fixme regarding remaining matched-but-not-generated case.
7683 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
7684 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
7685 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
7686 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
7687 Handle output of CC_ZnNmode.
7688 ("*b<nzcond:code>_reversed<mode>"): Ditto.
7690 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
7691 NEG too. Correct comment.
7692 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
7695 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
7697 * ira-color.c (update_costs_from_allocno): Remove
7698 conflict_cost_update_p argument. Propagate costs only along
7699 threads. Always do conflict cost update. Add printing debugging
7701 (update_costs_from_copies): Add printing debugging info.
7702 (restore_costs_from_copies): Ditto.
7703 (assign_hard_reg): Improve debug info.
7704 (push_only_colorable): Ditto. Call update_costs_from_prefs.
7705 (color_allocnos): Remove update_costs_from_prefs.
7707 2020-05-08 Richard Biener <rguenther@suse.de>
7709 * tree-vectorizer.h (vec_info::slp_loads): New.
7710 (vect_optimize_slp): Declare.
7711 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
7712 nothing when there are no loads.
7713 (vect_gather_slp_loads): Gather loads into a vector.
7714 (vect_supported_load_permutation_p): Remove.
7715 (vect_analyze_slp_instance): Do not verify permutation
7717 (vect_analyze_slp): Optimize permutations of reductions
7718 after all SLP instances have been gathered and gather
7720 (vect_optimize_slp): New function split out from
7721 vect_supported_load_permutation_p. Elide some permutations.
7722 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
7723 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
7724 * tree-vect-stmts.c (vectorizable_load): Check whether
7725 the load can be permuted. When generating code assert we can.
7727 2020-05-08 Richard Biener <rguenther@suse.de>
7729 * tree-ssa-sccvn.c (rpo_avail): Change type to
7730 eliminate_dom_walker *.
7731 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
7732 use the DOM walker availability.
7733 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
7734 with vn_valueize as valueization callback.
7735 (vn_reference_maybe_forwprop_address): Likewise.
7736 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
7737 array_ref_low_bound.
7739 2020-05-08 Jakub Jelinek <jakub@redhat.com>
7741 PR tree-optimization/94786
7742 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
7746 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
7750 * tree.c (get_narrower): Reuse the op temporary instead of
7753 PR tree-optimization/94783
7754 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
7757 PR tree-optimization/94956
7758 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
7759 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
7761 PR tree-optimization/94913
7762 * match.pd (A - B + -1 >= A to B >= A): New simplification.
7763 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
7764 true for TYPE_UNSIGNED integral types.
7767 PR rtl-optimization/94516
7768 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
7770 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
7771 Call df_notes_rescan if that argument is not true and returning true.
7772 * combine.c (adjust_for_new_dest): Pass true as second argument to
7773 remove_reg_equal_equiv_notes.
7774 * postreload.c (reload_combine_recognize_pattern): Don't call
7777 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
7779 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
7781 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
7782 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
7783 (*neg_ne_<mode>): Likewise.
7785 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
7787 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
7789 (*setbcr_<un>signed_<GPR:mode>): Likewise.
7790 (cstore<mode>4): Use setbc[r] if available.
7791 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
7792 (eq<mode>3): Use setbc for TARGET_FUTURE.
7793 (*eq<mode>3): Avoid for TARGET_FUTURE.
7794 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
7795 else for non-Pmode, use gen_eq and gen_xor.
7796 (*ne<mode>3): Avoid for TARGET_FUTURE.
7797 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
7799 2020-05-07 Jeff Law <law@redhat.com>
7801 * config/h8300/h8300.md: Move expanders and patterns into
7802 files based on functionality.
7803 * config/h8300/addsub.md: New file.
7804 * config/h8300/bitfield.md: New file
7805 * config/h8300/combiner.md: New file
7806 * config/h8300/divmod.md: New file
7807 * config/h8300/extensions.md: New file
7808 * config/h8300/jumpcall.md: New file
7809 * config/h8300/logical.md: New file
7810 * config/h8300/movepush.md: New file
7811 * config/h8300/multiply.md: New file
7812 * config/h8300/other.md: New file
7813 * config/h8300/proepi.md: New file
7814 * config/h8300/shiftrotate.md: New file
7815 * config/h8300/testcompare.md: New file
7817 * config/h8300/h8300.md (adds/subs splitters): Merge into single
7819 (negation expanders and patterns): Simplify and combine using
7821 (one_cmpl expanders and patterns): Likewise.
7822 (tablejump, indirect_jump patterns ): Likewise.
7823 (shift and rotate expanders and patterns): Likewise.
7824 (absolute value expander and pattern): Drop expander, rename pattern
7826 (peephole2 patterns): Move into...
7827 * config/h8300/peepholes.md: New file.
7829 * config/h8300/constraints.md (L and N): Simplify now that we're not
7830 longer supporting the original H8/300 chip.
7831 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
7832 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
7833 (shift_alg_hi, shift_alg_si): Similarly.
7834 (h8300_option_overrides): Similarly. Default to H8/300H. If
7835 compiling for H8/S, then turn off H8/300H. Do not update the
7836 shift_alg tables for H8/300 port.
7837 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
7839 (push, split_adds_subs, h8300_rtx_costs): Likewise.
7840 (h8300_print_operand, compute_mov_length): Likewise.
7841 (output_plussi, compute_plussi_length): Likewise.
7842 (compute_plussi_cc, output_logical_op): Likewise.
7843 (compute_logical_op_length, compute_logical_op_cc): Likewise.
7844 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
7845 (output_a_shift, compute_a_shift_length): Likewise.
7846 (output_a_rotate, compute_a_rotate_length): Likewise.
7847 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
7848 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
7849 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
7850 (attr_cpu, TARGET_H8300): Remove.
7851 (TARGET_DEFAULT): Update.
7852 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
7853 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
7854 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
7855 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
7856 * config/h8300/h8300.md: Simplify patterns throughout.
7857 * config/h8300/t-h8300: Update multilib configuration.
7859 * config/h8300/h8300.h (LINK_SPEC): Remove.
7860 (USER_LABEL_PREFIX): Likewise.
7862 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
7863 (h8300_option_override): Remove remnants of COFF support.
7865 2020-05-07 Alan Modra <amodra@gmail.com>
7867 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
7868 set_rtx_cost with set_src_cost.
7869 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
7871 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
7873 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
7874 redundant half vector handlings for no peeling gaps.
7876 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
7878 * tree-ssa-operands.c (operands_scanner): New class.
7879 (operands_bitmap_obstack): Remove.
7880 (n_initialized): Remove.
7881 (build_uses): Move to operands_scanner class.
7882 (build_vuse): Same as above.
7883 (build_vdef): Same as above.
7884 (verify_ssa_operands): Same as above.
7885 (finalize_ssa_uses): Same as above.
7886 (cleanup_build_arrays): Same as above.
7887 (finalize_ssa_stmt_operands): Same as above.
7888 (start_ssa_stmt_operands): Same as above.
7889 (append_use): Same as above.
7890 (append_vdef): Same as above.
7891 (add_virtual_operand): Same as above.
7892 (add_stmt_operand): Same as above.
7893 (get_mem_ref_operands): Same as above.
7894 (get_tmr_operands): Same as above.
7895 (maybe_add_call_vops): Same as above.
7896 (get_asm_stmt_operands): Same as above.
7897 (get_expr_operands): Same as above.
7898 (parse_ssa_operands): Same as above.
7899 (finalize_ssa_defs): Same as above.
7900 (build_ssa_operands): Same as above, plus create a C-like wrapper.
7901 (update_stmt_operands): Create an instance of operands_scanner.
7903 2020-05-07 Richard Biener <rguenther@suse.de>
7906 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
7907 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
7908 (refered_from_nonlocal_var): Likewise.
7909 (ipa_pta_execute): Likewise.
7911 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
7913 * gcc/tree-ssa-struct-alias.c: Fix comments
7915 2020-05-07 Martin Liska <mliska@suse.cz>
7917 * doc/invoke.texi: Fix 2 optindex entries.
7919 2020-05-07 Richard Biener <rguenther@suse.de>
7922 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
7923 (tree_decl_common::not_gimple_reg_flag): ... to this.
7924 * tree.h (DECL_GIMPLE_REG_P): Rename ...
7925 (DECL_NOT_GIMPLE_REG_P): ... to this.
7926 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
7927 (create_tmp_reg): Simplify.
7928 (create_tmp_reg_fn): Likewise.
7929 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
7930 * gimplify.c (create_tmp_from_val): Simplify.
7931 (gimplify_bind_expr): Likewise.
7932 (gimplify_compound_literal_expr): Likewise.
7933 (gimplify_function_tree): Likewise.
7934 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
7935 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
7936 (asan_add_global): Copy it.
7937 * cgraphunit.c (cgraph_node::expand_thunk): Force args
7939 * function.c (gimplify_parameters): Copy
7940 DECL_NOT_GIMPLE_REG_P.
7941 * ipa-param-manipulation.c
7942 (ipa_param_body_adjustments::common_initialization): Simplify.
7943 (ipa_param_body_adjustments::reset_debug_stmts): Copy
7944 DECL_NOT_GIMPLE_REG_P.
7945 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
7946 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
7947 * tree-cfg.c (make_blocks_1): Simplify.
7948 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
7949 * tree-eh.c (lower_eh_constructs_2): Simplify.
7950 * tree-inline.c (declare_return_variable): Adjust and
7952 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
7953 (copy_result_decl_to_var): Likewise.
7954 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
7955 * tree-nested.c (create_tmp_var_for): Simplify.
7956 * tree-parloops.c (separate_decls_in_region_name): Copy
7957 DECL_NOT_GIMPLE_REG_P.
7958 * tree-sra.c (create_access_replacement): Adjust and
7959 generalize partial def support.
7960 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
7961 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
7962 * tree-ssa.c (maybe_optimize_var): Handle clearing of
7963 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
7965 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
7966 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
7967 DECL_NOT_GIMPLE_REG_P.
7968 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
7969 * cfgexpand.c (avoid_type_punning_on_regs): New.
7970 (discover_nonconstant_array_refs): Call
7971 avoid_type_punning_on_regs to avoid unsupported mode punning.
7973 2020-05-07 Alex Coplan <alex.coplan@arm.com>
7975 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
7978 2020-05-07 Richard Biener <rguenther@suse.de>
7980 PR tree-optimization/57359
7981 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
7982 (in_mem_ref::dep_loop): Repurpose.
7983 (LOOP_DEP_BIT): Remove.
7984 (enum dep_kind): New.
7985 (enum dep_state): Likewise.
7986 (record_loop_dependence): New function to populate the
7988 (query_loop_dependence): New function to query the dependence
7990 (memory_accesses::refs_in_loop): Rename to ...
7991 (memory_accesses::refs_loaded_in_loop): ... this and change to
7993 (outermost_indep_loop): Adjust.
7994 (mem_ref_alloc): Likewise.
7995 (gather_mem_refs_stmt): Likewise.
7996 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
7997 (struct sm_aux): New.
7998 (execute_sm): Split code generation on exits, record state
8000 (enum sm_kind): New.
8001 (execute_sm_exit): Exit code generation part.
8002 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
8003 dependence checking on stores reached from exits.
8004 (sm_seq_valid_bb): New function gathering SM stores on exits.
8005 (hoist_memory_references): Re-implement.
8006 (refs_independent_p): Add tbaa_p parameter and pass it down.
8007 (record_dep_loop): Remove.
8008 (ref_indep_loop_p_1): Fold into ...
8009 (ref_indep_loop_p): ... this and generalize for three kinds
8010 of dependence queries.
8011 (can_sm_ref_p): Adjust according to hoist_memory_references
8013 (store_motion_loop): Don't do anything if the set of SM
8014 candidates is empty.
8015 (tree_ssa_lim_initialize): Adjust.
8016 (tree_ssa_lim_finalize): Likewise.
8018 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
8019 Pierre-Marie de Rodat <derodat@adacore.com>
8021 * dwarf2out.c (add_data_member_location_attribute): Take into account
8022 the variant part offset in the computation of the data bit offset.
8023 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
8024 in the call to field_byte_offset.
8025 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
8026 confusing assertion.
8027 (analyze_variant_discr): Deal with boolean subtypes.
8029 2020-05-07 Martin Liska <mliska@suse.cz>
8031 * lto-wrapper.c: Split arguments of MAKE environment
8034 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
8036 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
8037 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
8038 fenv_var and new_fenv_var.
8040 2020-05-06 Jakub Jelinek <jakub@redhat.com>
8043 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
8045 (avx512dq_vextract<shuffletype>64x2_1_maskm,
8046 avx512f_vextract<shuffletype>32x4_1_maskm,
8047 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
8048 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
8050 (*avx512dq_vextract<shuffletype>64x2_1,
8051 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
8052 define_insns. Even in the masked variant allow memory output but in
8053 that case use 0 rather than 0C constraint on the source of masked-out
8055 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
8057 (*avx512f_vextract<shuffletype>32x4_1,
8058 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
8059 Even in the masked variant allow memory output but in that case use
8060 0 rather than 0C constraint on the source of masked-out elts.
8061 (vec_extract_lo_<mode><mask_name>): Split into ...
8062 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
8063 define_insns. Even in the masked variant allow memory output but in
8064 that case use 0 rather than 0C constraint on the source of masked-out
8066 (vec_extract_hi_<mode><mask_name>): Split into ...
8067 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
8068 define_insns. Even in the masked variant allow memory output but in
8069 that case use 0 rather than 0C constraint on the source of masked-out
8072 2020-05-06 qing zhao <qing.zhao@oracle.com>
8075 * common.opt: Add -flarge-source-files.
8076 * doc/invoke.texi: Document it.
8077 * toplev.c (process_options): set line_table->default_range_bits
8078 to 0 when flag_large_source_files is true.
8080 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
8083 * config/i386/predicates.md (add_comparison_operator): New predicate.
8084 * config/i386/i386.md (compare->add splitter): New splitters.
8086 2020-05-06 Richard Biener <rguenther@suse.de>
8088 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
8089 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
8090 Remove slp_instance parameter, just iterate over all scalar stmts.
8091 (vect_slp_analyze_instance_dependence): Adjust and likewise.
8092 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
8094 (vect_schedule_slp): Just iterate over all scalar stmts.
8095 (vect_supported_load_permutation_p): Adjust.
8096 (vect_transform_slp_perm_load): Remove slp_instance parameter,
8097 instead use the number of lanes in the node as group size.
8098 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
8099 factor instead of slp_instance as parameter.
8100 (vectorizable_load): Adjust.
8102 2020-05-06 Andreas Schwab <schwab@suse.de>
8104 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
8105 (aarch64_get_extension_string_for_isa_flags): Don't declare.
8107 2020-05-06 Richard Biener <rguenther@suse.de>
8110 * cfgloopmanip.c (create_preheader): Require non-complex
8111 preheader edge for CP_SIMPLE_PREHEADERS.
8113 2020-05-06 Richard Biener <rguenther@suse.de>
8115 PR tree-optimization/94963
8116 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
8117 no-warning marking of the conditional store.
8118 (execute_sm): Instead mark the uninitialized state
8119 on loop entry to be not warned about.
8121 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
8123 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
8124 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
8125 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
8126 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
8128 * config/i386/i386-builtin.def: Add new builtins.
8129 * config/i386/i386-c.c (ix86_target_macros_internal): Define
8131 * config/i386/i386-options.c (ix86_target_string): Add
8133 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
8134 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
8136 * config/i386/i386.md (define_c_enum "unspec"): Add
8137 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
8138 (TSXLDTRK): New define_int_iterator.
8139 ("<tsxldtrk>"): New define_insn.
8140 * config/i386/i386.opt: Add -mtsxldtrk.
8141 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
8142 * config/i386/tsxldtrkintrin.h: New.
8143 * doc/invoke.texi: Document -mtsxldtrk.
8145 2020-05-06 Jakub Jelinek <jakub@redhat.com>
8147 PR tree-optimization/94921
8148 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
8151 2020-05-06 Richard Biener <rguenther@suse.de>
8153 PR tree-optimization/94965
8154 * tree-vect-stmts.c (vectorizable_load): Fix typo.
8156 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8158 * doc/install.texi: Replace Sun with Solaris as appropriate.
8159 (Tools/packages necessary for building GCC, Perl version between
8160 5.6.1 and 5.6.24): Remove Solaris 8 reference.
8161 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
8163 (Specific, i?86-*-solaris2*): Update version references for
8164 Solaris 11.3 and later. Remove gas 2.26 caveat.
8165 (Specific, *-*-solaris2*): Update version references for
8166 Solaris 11.3 and later. Remove boehm-gc reference.
8167 Document GMP, MPFR caveats on Solaris 11.3.
8168 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
8169 (Specific, sparc64-*-solaris2*): Likewise.
8170 Document --build requirement.
8172 2020-05-06 Jakub Jelinek <jakub@redhat.com>
8175 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
8176 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
8178 PR rtl-optimization/94873
8179 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
8180 note if SET_SRC (set) has side-effects.
8182 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
8183 Wei Xiao <wei3.xiao@intel.com>
8185 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
8186 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
8187 (ix86_handle_option): Handle -mserialize.
8188 * config.gcc (serializeintrin.h): New header file.
8189 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
8190 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
8192 * config/i386/i386-builtin.def: Add new builtin.
8193 * config/i386/i386-c.c (__SERIALIZE__): New macro.
8194 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
8196 * (ix86_valid_target_attribute_inner_p): Add target attribute
8198 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
8200 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
8201 (serialize): New define_insn.
8202 * config/i386/i386.opt (mserialize): New option
8203 * config/i386/immintrin.h: Include serailizeintrin.h.
8204 * config/i386/serializeintrin.h: New header file.
8205 * doc/invoke.texi: Add documents for -mserialize.
8207 2020-05-06 Richard Biener <rguenther@suse.de>
8209 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
8210 to/from pointer conversion checking.
8212 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
8214 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
8216 * config/rs6000/rs6000-c.c: Likewise.
8217 * config/rs6000/rs6000-call.c: Likewise.
8218 * config/rs6000/rs6000.c: Likewise.
8220 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
8222 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
8223 (RTEMS_ENDFILE_SPEC): Likewise.
8224 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
8225 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
8226 (LIB_SPECS): Support -nodefaultlibs option.
8227 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
8228 (RTEMS_ENDFILE_SPEC): Likewise.
8229 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
8230 (RTEMS_ENDFILE_SPEC): Likewise.
8231 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
8232 (RTEMS_ENDFILE_SPEC): Likewise.
8234 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8236 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
8237 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
8239 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8241 * config/pru/pru.h: Mark R3.w0 as caller saved.
8243 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8245 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
8246 and gen_doloop_begin_internal.
8247 (pru_reorg_loop): Use gen_pruloop with mode.
8248 * config/pru/pru.md: Use new @insn syntax.
8250 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
8252 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
8254 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
8256 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
8257 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
8258 (addqi3_cconly_overflow): Ditto.
8259 (umulv<mode>4): Ditto.
8260 (<s>mul<mode>3_highpart): Ditto.
8261 (tls_global_dynamic_32): Ditto.
8262 (tls_local_dynamic_base_32): Ditto.
8269 (*adddi_4): Remove "m" constraint from scratch operand.
8270 (*add<mode>_4): Ditto.
8272 2020-05-05 Jakub Jelinek <jakub@redhat.com>
8274 PR rtl-optimization/94516
8275 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
8276 with sp = reg, add REG_EQUAL note with sp + const.
8277 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
8278 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
8279 postreload sp = sp + const to sp = reg optimization if needed and
8281 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
8282 reg = sp insn with sp + const REG_EQUAL note. Adjust
8283 try_apply_stack_adjustment caller, call
8284 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
8285 (combine_stack_adjustments): Allocate and free LIVE bitmap,
8286 adjust combine_stack_adjustments_for_block caller.
8288 2020-05-05 Martin Liska <mliska@suse.cz>
8290 PR gcov-profile/93623
8291 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
8294 2020-05-05 Martin Liska <mliska@suse.cz>
8296 * opt-functions.awk (opt_args_non_empty): New function.
8297 * opt-read.awk: Use the function for various option arguments.
8299 2020-05-05 Martin Liska <mliska@suse.cz>
8302 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
8303 report warning when the jobserver is not detected.
8305 2020-05-05 Martin Liska <mliska@suse.cz>
8307 PR gcov-profile/94636
8308 * gcov.c (main): Print total lines summary at the end.
8309 (generate_results): Expect file_name always being non-null.
8310 Print newline after intermediate file is printed in order to align with
8311 what we do for normal files.
8313 2020-05-05 Martin Liska <mliska@suse.cz>
8315 * dumpfile.c (dump_switch_p): Change return type
8316 and print option suggestion.
8317 * dumpfile.h: Change return type.
8318 * opts-global.c (handle_common_deferred_options):
8319 Move error into dump_switch_p function.
8321 2020-05-05 Martin Liska <mliska@suse.cz>
8324 * alloc-pool.h: Use const for some arguments.
8325 * bitmap.h: Likewise.
8326 * mem-stats.h: Likewise.
8327 * sese.h (get_entry_bb): Likewise.
8328 (get_exit_bb): Likewise.
8330 2020-05-05 Richard Biener <rguenther@suse.de>
8332 * tree-vect-slp.c (struct vdhs_data): New.
8333 (vect_detect_hybrid_slp): New walker.
8334 (vect_detect_hybrid_slp): Rewrite.
8336 2020-05-05 Richard Biener <rguenther@suse.de>
8339 * tree-ssa-structalias.c (ipa_pta_execute): Use
8340 varpool_node::externally_visible_p ().
8341 (refered_from_nonlocal_var): Likewise.
8343 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
8345 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
8346 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
8347 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
8349 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
8351 * gimplify.c (gimplify_init_constructor): Do not put the constructor
8352 into static memory if it is not complete.
8354 2020-05-05 Richard Biener <rguenther@suse.de>
8356 PR tree-optimization/94949
8357 * tree-ssa-loop-im.c (execute_sm): Check whether we use
8358 the multithreaded model or always compute the stored value
8359 before eliding a load.
8361 2020-05-05 Alex Coplan <alex.coplan@arm.com>
8363 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
8365 2020-05-05 Jakub Jelinek <jakub@redhat.com>
8367 PR tree-optimization/94800
8368 * match.pd (X + (X << C) to X * (1 + (1 << C)),
8369 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
8373 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
8375 PR tree-optimization/94914
8376 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
8379 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
8381 * config/i386/i386.md (*testqi_ext_3): Use
8382 int_nonimmediate_operand instead of manual mode checks.
8383 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
8384 Use int_nonimmediate_operand predicate. Rewrite
8385 define_insn_and_split pattern to a combine pass splitter.
8387 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8389 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
8390 * configure: Regenerate.
8392 2020-05-05 Jakub Jelinek <jakub@redhat.com>
8395 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
8396 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
8397 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
8398 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
8400 2020-05-04 Clement Chigot <clement.chigot@atos.net>
8401 David Edelsohn <dje.gcc@gmail.com>
8403 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
8404 for fmodl, frexpl, ldexpl and modfl builtins.
8406 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
8409 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
8410 chosen lhs is different from the gcall lhs.
8411 (expand_mask_load_optab_fn): Likewise.
8412 (expand_gather_load_optab_fn): Likewise.
8414 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
8417 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
8418 (EQ compare->LTU compare splitter): New splitter.
8419 (NE compare->NEG splitter): Ditto.
8421 2020-05-04 Marek Polacek <polacek@redhat.com>
8424 2020-04-30 Marek Polacek <polacek@redhat.com>
8427 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
8428 (check_aligned_type): Check if TYPE_USER_ALIGN match.
8430 2020-05-04 Richard Biener <rguenther@suse.de>
8432 PR tree-optimization/93891
8433 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
8434 the original reference tree for assessing access alignment.
8436 2020-05-04 Richard Biener <rguenther@suse.de>
8438 PR tree-optimization/39612
8439 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
8440 (set_ref_loaded_in_loop): New.
8441 (mark_ref_loaded): Likewise.
8442 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
8443 (execute_sm): Avoid issueing a load when it was not there.
8444 (execute_sm_if_changed): Avoid issueing warnings for the
8447 2020-05-04 Martin Jambor <mjambor@suse.cz>
8450 * tree-inline.c (tree_function_versioning): Leave any type conversion
8451 of replacements to setup_one_parameter and its friend
8452 force_value_to_type.
8454 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
8457 * config/i386/predicates.md (shr_comparison_operator): New predicate.
8458 * config/i386/i386.md (compare->shr splitter): New splitters.
8460 2020-05-04 Jakub Jelinek <jakub@redhat.com>
8462 PR tree-optimization/94718
8463 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
8465 PR tree-optimization/94718
8466 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
8467 replace two nop conversions on bit_{and,ior,xor} argument
8468 and result with just one conversion on the result or another argument.
8470 PR tree-optimization/94718
8471 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
8472 -> (X ^ Y) & C eqne 0 optimization to ...
8473 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
8475 * opts.c (get_option_html_page): Instead of hardcoding a list of
8476 options common between C/C++ and Fortran only use gfortran/
8477 documentation for warnings that have CL_Fortran set but not
8480 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
8482 * config/i386/i386-expand.c (ix86_expand_int_movcc):
8483 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
8484 (emit_memmov): Ditto.
8485 (emit_memset): Ditto.
8486 (ix86_expand_strlensi_unroll_1): Ditto.
8487 (release_scratch_register_on_entry): Ditto.
8488 (gen_frame_set): Ditto.
8489 (ix86_emit_restore_reg_using_pop): Ditto.
8490 (ix86_emit_outlined_ms2sysv_restore): Ditto.
8491 (ix86_expand_epilogue): Ditto.
8492 (ix86_expand_split_stack_prologue): Ditto.
8493 * config/i386/i386.md (push immediate splitter): Ditto.
8497 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
8499 PR translation/93861
8500 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
8503 2020-05-02 Jakub Jelinek <jakub@redhat.com>
8505 * config/tilegx/tilegx.md
8506 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
8507 rather than just <n>.
8509 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
8512 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
8513 and crtl->patch_area_entry.
8514 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
8515 * opts.c (common_handle_option): Limit
8516 function_entry_patch_area_size and function_entry_patch_area_start
8517 to USHRT_MAX. Fix a typo in error message.
8518 * varasm.c (assemble_start_function): Use crtl->patch_area_size
8519 and crtl->patch_area_entry.
8520 * doc/invoke.texi: Document the maximum value for
8521 -fpatchable-function-entry.
8523 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
8525 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
8526 Override SUBTARGET_SHADOW_OFFSET macro.
8528 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
8530 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
8531 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
8532 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
8533 * config/i386/freebsd.h: Likewise.
8534 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
8535 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
8537 2020-04-30 Alexandre Oliva <oliva@adacore.com>
8539 * doc/sourcebuild.texi (Effective-Target Keywords): Document
8540 the newly-introduced fileio effective target.
8542 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
8544 PR rtl-optimization/94740
8545 * cse.c (cse_process_notes_1): Replace with...
8546 (cse_process_note_1): ...this new function, acting as a
8547 simplify_replace_fn_rtx callback to process_note. Handle only
8548 REGs and MEMs directly. Validate the MEM if cse_process_note
8549 changes its address.
8550 (cse_process_notes): Replace with...
8551 (cse_process_note): ...this new function.
8552 (cse_extended_basic_block): Update accordingly, iterating over
8553 the register notes and passing individual notes to cse_process_note.
8555 2020-04-30 Carl Love <cel@us.ibm.com>
8557 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
8559 2020-04-30 Martin Jambor <mjambor@suse.cz>
8562 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
8563 saved by the inliner and thunks which had their call inlined.
8564 * ipa-inline-transform.c (save_inline_function_body): Fill in
8565 former_clone_of of new body holders.
8567 2020-04-30 Jakub Jelinek <jakub@redhat.com>
8569 * BASE-VER: Set to 11.0.0.
8571 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
8573 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
8575 2020-04-30 Marek Polacek <polacek@redhat.com>
8578 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
8579 (check_aligned_type): Check if TYPE_USER_ALIGN match.
8581 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8583 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
8584 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
8585 * doc/invoke.texi (moutline-atomics): Document as on by default.
8587 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
8590 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
8591 the check for NOTE_INSN_DELETED_LABEL.
8593 2020-04-30 Jakub Jelinek <jakub@redhat.com>
8595 * configure.ac (--with-documentation-root-url,
8596 --with-changes-root-url): Diagnose URL not ending with /,
8597 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
8598 * opts.h (get_changes_url): Remove.
8599 * opts.c (get_changes_url): Remove.
8600 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
8601 or -DCHANGES_ROOT_URL.
8602 * doc/install.texi (--with-documentation-root-url,
8603 --with-changes-root-url): Document.
8604 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
8605 get_changes_url and free, change url variable type to const char * and
8606 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
8607 * config/s390/s390.c (s390_function_arg_vector,
8608 s390_function_arg_float): Likewise.
8609 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
8611 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
8613 * config.in: Regenerate.
8614 * configure: Regenerate.
8616 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
8619 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
8621 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
8623 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
8624 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
8626 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
8628 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
8629 Change constraint for vlrl/vstrl to jb4.
8631 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8633 * var-tracking.c (vt_initialize): Move variables pre and post
8634 into inner block and initialize both in order to fix warning
8635 about uninitialized use. Remove unnecessary checks for
8636 frame_pointer_needed.
8638 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8640 * toplev.c (output_stack_usage_1): Ensure that first
8641 argument to fprintf is not null.
8643 2020-04-29 Jakub Jelinek <jakub@redhat.com>
8645 * configure.ac (-with-changes-root-url): New configure option,
8646 defaulting to https://gcc.gnu.org/.
8647 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
8649 * pretty-print.c (get_end_url_string): New function.
8650 (pp_format): Handle %{ and %} for URLs.
8651 (pp_begin_url): Use pp_string instead of pp_printf.
8652 (pp_end_url): Use get_end_url_string.
8653 * opts.h (get_changes_url): Declare.
8654 * opts.c (get_changes_url): New function.
8655 * config/rs6000/rs6000-call.c: Include opts.h.
8656 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
8657 of just in GCC 10.1 in diagnostics and add URL.
8658 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
8659 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
8661 * config/s390/s390.c (s390_function_arg_vector,
8662 s390_function_arg_float): Likewise.
8663 * configure: Regenerated.
8666 * config/s390/s390.c (s390_function_arg_vector,
8667 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
8668 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
8669 passed to the function rather than the type of the single element.
8670 Rename cxx17_empty_base_seen variable to empty_base_seen, change
8671 type to int, and adjust diagnostics depending on if the field
8672 has [[no_unique_attribute]] or not.
8675 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
8676 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
8677 used in casts into parens.
8678 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
8679 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
8680 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
8681 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
8682 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
8683 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
8684 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
8685 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
8686 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
8687 _mm256_mask_cmp_epu8_mask): Likewise.
8688 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
8689 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
8690 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
8691 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
8694 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
8695 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
8696 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
8697 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
8698 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
8699 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
8700 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
8701 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
8702 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
8703 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
8704 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
8705 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
8706 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
8708 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
8709 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
8710 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
8711 as mask vector containing -1.0 or -1.0f elts, but instead vector
8712 with all bits set using _mm*_cmpeq_p? with zero operands.
8713 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
8714 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
8715 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
8716 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
8717 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
8718 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
8719 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
8720 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
8721 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
8722 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
8723 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
8724 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
8725 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
8726 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
8727 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
8728 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
8729 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
8731 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
8732 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
8733 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
8734 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
8735 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
8736 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
8737 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
8738 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
8739 _mm512_mask_prefetch_i64scatter_ps): Likewise.
8740 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
8741 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
8742 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
8743 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
8744 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
8745 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
8746 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
8747 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
8748 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
8749 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
8750 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
8751 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
8752 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
8753 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
8754 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
8755 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
8756 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
8757 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
8758 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
8759 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
8760 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
8761 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
8762 _mm_mask_i64scatter_epi64): Likewise.
8764 2020-04-29 Jeff Law <law@redhat.com>
8766 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
8767 division instructions are 4 bytes long.
8769 2020-04-29 Jakub Jelinek <jakub@redhat.com>
8772 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
8773 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
8774 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
8775 take address of TARGET_EXPR of fenv_var with void_node initializer.
8778 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8780 PR tree-optimization/94774
8781 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
8784 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8786 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
8787 * calls.c (cxx17_empty_base_field_p): New function. Check
8788 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
8791 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
8794 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
8795 Allow -fcf-protection with -mindirect-branch=thunk-extern and
8796 -mfunction-return=thunk-extern.
8797 * doc/invoke.texi: Update notes for -fcf-protection=branch with
8798 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
8800 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8802 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
8804 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8806 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
8807 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
8808 fenv_var and new_fenv_var.
8810 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8812 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
8813 effective-target keyword.
8814 (arm_arch_v8a_hard_multilib): Likewise.
8815 (arm_arch_v8a_hard): Document new dg-add-options keyword.
8816 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
8817 code is deprecated and has not been updated to handle
8818 DECL_FIELD_ABI_IGNORED.
8819 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
8820 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
8821 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
8822 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
8823 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
8824 something actually is a HFA or HVA. Record whether we see a
8825 [[no_unique_address]] field that previous GCCs would not have
8826 ignored in this way.
8827 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
8828 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
8829 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
8830 diagnostic messages.
8831 (arm_needs_doubleword_align): Add a comment explaining why we
8832 consider even zero-sized fields.
8834 2020-04-29 Richard Biener <rguenther@suse.de>
8835 Li Zekun <lizekun1@huawei.com>
8838 * tree.c (component_ref_size): Guard against error_mark_node
8839 DECL_INITIAL as it happens with LTO.
8841 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
8843 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
8844 comment explaining why we consider even zero-sized fields.
8845 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
8846 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
8847 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
8848 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
8849 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
8850 something actually is a HFA or HVA. Record whether we see a
8851 [[no_unique_address]] field that previous GCCs would not have
8852 ignored in this way.
8853 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
8854 whether diagnostics should be suppressed. Update the calls to
8855 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
8856 [[no_unique_address]] case.
8857 (aarch64_return_in_msb): Update call accordingly, never silencing
8859 (aarch64_function_value): Likewise.
8860 (aarch64_return_in_memory_1): Likewise.
8861 (aarch64_init_cumulative_args): Likewise.
8862 (aarch64_gimplify_va_arg_expr): Likewise.
8863 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
8864 use it to decide whether arch64_vfp_is_call_or_return_candidate
8866 (aarch64_pass_by_reference): Update calls accordingly.
8867 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
8868 to decide whether arch64_vfp_is_call_or_return_candidate should be
8871 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
8874 * config/aarch64/aarch64-builtins.c
8875 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
8876 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
8879 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
8881 * configure.ac <$enable_offload_targets>: Do parsing as done
8883 * configure: Regenerate.
8885 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
8886 * configure: Regenerate.
8889 * rtlanal.c (set_noop_p): Handle non-constant selectors.
8892 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
8894 (TARGET_EXCEPT_UNWIND_INFO): Define.
8896 2020-04-29 Jakub Jelinek <jakub@redhat.com>
8899 * config/gcn/gcn.md (*mov<mode>_insn): Use
8900 'reg_overlap_mentioned_p' to check for overlap.
8903 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
8904 instead of cxx17_empty_base_field_p.
8907 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
8908 DECL_FIELD_ABI_IGNORED.
8909 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
8910 * calls.h (cxx17_empty_base_field_p): Change into a temporary
8911 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
8913 * calls.c (cxx17_empty_base_field_p): Remove.
8914 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
8915 DECL_FIELD_ABI_IGNORED.
8916 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
8917 * lto-streamer-out.c (hash_tree): Likewise.
8918 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
8919 cxx17_empty_base_seen to empty_base_seen, change type to int *,
8920 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
8921 cxx17_empty_base_field_p, if "no_unique_address" attribute is
8922 present, propagate that to the caller too.
8923 (rs6000_discover_homogeneous_aggregate): Adjust
8924 rs6000_aggregate_candidate caller, emit different diagnostics
8925 when c++17 empty base fields are present and when empty
8926 [[no_unique_address]] fields are present.
8927 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
8928 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
8931 2020-04-29 Richard Biener <rguenther@suse.de>
8933 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
8934 Just check whether the stmt stores.
8936 2020-04-28 Alexandre Oliva <oliva@adacore.com>
8939 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
8940 output operand in emulation. Don't overwrite pseudos.
8942 2020-04-28 Jeff Law <law@redhat.com>
8944 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
8945 multiply patterns are 4 bytes long.
8947 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8949 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
8950 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
8952 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
8953 Jakub Jelinek <jakub@redhat.com>
8956 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
8957 base class artificial fields.
8958 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
8959 decision is different after this fix.
8961 2020-04-28 David Malcolm <dmalcolm@redhat.com>
8967 * doc/invoke.texi (Static Analyzer Options): Remove
8968 -Wanalyzer-use-of-uninitialized-value.
8969 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
8971 2020-04-28 Jakub Jelinek <jakub@redhat.com>
8973 PR tree-optimization/94809
8974 * tree.c (build_call_expr_internal_loc_array): Call
8975 process_call_operands.
8977 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
8979 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
8980 * config/aarch64/aarch64-tune.md: Regenerate.
8981 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
8982 (thunderx3t110_regmove_cost): Likewise.
8983 (thunderx3t110_vector_cost): Likewise.
8984 (thunderx3t110_prefetch_tune): Likewise.
8985 (thunderx3t110_tunings): Likewise.
8986 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
8988 * config/aarch64/thunderx3t110.md: New file.
8989 * config/aarch64/aarch64.md: Include thunderx3t110.md.
8990 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
8992 2020-04-28 Jakub Jelinek <jakub@redhat.com>
8995 * config/s390/s390.c (s390_function_arg_vector,
8996 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
8998 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
9000 PR tree-optimization/94727
9001 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
9002 operands are invariant booleans, use the mask type associated with the
9003 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
9004 (vectorizable_condition): Pass vectype unconditionally to
9005 vect_is_simple_cond.
9007 2020-04-27 Jakub Jelinek <jakub@redhat.com>
9010 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
9011 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
9012 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
9014 2020-04-27 David Malcolm <dmalcolm@redhat.com>
9017 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
9018 default value, so that it can by supplied by get_option_html_page.
9019 * configure: Regenerate.
9020 * opts.c: Include "selftest.h".
9021 (get_option_html_page): New function.
9022 (get_option_url): Use it. Reformat to place comments next to the
9023 expressions they refer to.
9024 (selftest::test_get_option_html_page): New.
9025 (selftest::opts_c_tests): New.
9026 * selftest-run-tests.c (selftest::run_tests): Call
9027 selftest::opts_c_tests.
9028 * selftest.h (selftest::opts_c_tests): New decl.
9030 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
9032 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
9033 UINTVAL to CONST_INTs.
9035 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9037 * config/arm/constraints.md (e): Remove constraint.
9038 (Te): Define constraint.
9039 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
9040 operand 0 from "e" to "Te".
9041 (vaddvaq_<supf><mode>): Likewise.
9042 (vaddvq_p_<supf><mode>): Likewise.
9043 (vmladavq_<supf><mode>): Likewise.
9044 (vmladavxq_s<mode>): Likewise.
9045 (vmlsdavq_s<mode>): Likewise.
9046 (vmlsdavxq_s<mode>): Likewise.
9047 (vaddvaq_p_<supf><mode>): Likewise.
9048 (vmladavaq_<supf><mode>): Likewise.
9049 (vmladavq_p_<supf><mode>): Likewise.
9050 (vmladavxq_p_s<mode>): Likewise.
9051 (vmlsdavq_p_s<mode>): Likewise.
9052 (vmlsdavxq_p_s<mode>): Likewise.
9053 (vmlsdavaxq_s<mode>): Likewise.
9054 (vmlsdavaq_s<mode>): Likewise.
9055 (vmladavaxq_s<mode>): Likewise.
9056 (vmladavaq_p_<supf><mode>): Likewise.
9057 (vmladavaxq_p_s<mode>): Likewise.
9058 (vmlsdavaq_p_s<mode>): Likewise.
9059 (vmlsdavaxq_p_s<mode>): Likewise.
9061 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
9063 * config/arm/arm.c (output_move_neon): Only get the first operand if
9066 2020-04-27 Felix Yang <felix.yang@huawei.com>
9068 PR tree-optimization/94784
9069 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
9070 assert around so that it checks that the two vectors have equal
9071 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
9072 types is a useless_type_conversion_p.
9074 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
9077 * dwarf2cfi.c (struct GTY): Add ra_mangled.
9078 (cfi_row_equal_p): Check ra_mangled.
9079 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
9080 this only handles the sparc logic now.
9081 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
9082 the aarch64 specific logic.
9083 (dwarf2out_frame_debug): Update to use the new subroutines.
9084 (change_cfi_row): Check ra_mangled.
9086 2020-04-27 Jakub Jelinek <jakub@redhat.com>
9089 * config/s390/s390.c (s390_function_arg_vector,
9090 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
9092 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
9094 * common/config/rs6000/rs6000-common.c
9095 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
9097 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
9100 2020-04-27 Martin Liska <mliska@suse.cz>
9103 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
9104 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
9106 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
9109 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
9111 (rs6000_emit_prologue_components):
9112 Check with frame_pointer_needed_indeed.
9113 (rs6000_emit_epilogue_components): Likewise.
9114 (rs6000_emit_prologue): Likewise.
9115 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
9117 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
9119 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
9120 stack frame when debugging and flag_compare_debug is enabled.
9122 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
9124 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
9125 enable PC-relative addressing for -mcpu=future.
9126 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
9127 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
9128 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
9129 suppress PC-relative addressing.
9130 (rs6000_option_override_internal): Split up error messages
9131 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
9134 2020-04-25 Jakub Jelinek <jakub@redhat.com>
9135 Richard Biener <rguenther@suse.de>
9137 PR tree-optimization/94734
9138 PR tree-optimization/89430
9139 * tree-ssa-phiopt.c: Include tree-eh.h.
9140 (cond_store_replacement): Return false if an automatic variable
9141 access could trap. If -fstore-data-races, don't return false
9142 just because an automatic variable is addressable.
9144 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
9146 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
9148 (add<mode>_sext_dup2_exec): Likewise.
9150 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
9153 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
9154 endian byteshift_val calculation.
9156 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
9158 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
9160 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
9162 * config/aarch64/arm_sve.h: Add a comment.
9164 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
9166 PR rtl-optimization/94708
9167 * combine.c (simplify_if_then_else): Add check for
9168 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
9170 2020-04-23 Martin Sebor <msebor@redhat.com>
9173 * common.opt (-Wno-frame-larger-than): New option.
9174 (-Wno-larger-than, -Wno-stack-usage): Same.
9176 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
9178 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
9180 (mov<mode>_exec): Likewise.
9181 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
9182 (<convop><mode><vndi>2_exec): Likewise.
9184 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
9186 PR tree-optimization/94717
9187 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
9188 of the stores doesn't have the same landing pad number as the first.
9189 (coalesce_immediate_stores): Do not try to coalesce the store using
9190 bswap if it doesn't have the same landing pad number as the first.
9192 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
9194 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
9195 Replace outdated link to ELFv2 ABI.
9197 2020-04-23 Jakub Jelinek <jakub@redhat.com>
9200 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
9204 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
9205 temporarily with non-final second operand and updating it later,
9206 push COMPOUND_EXPRs into a vector and process it in reverse,
9207 creating COMPOUND_EXPRs with the final operands.
9209 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
9212 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
9213 bti c and bti j handling.
9215 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
9216 Thomas Schwinge <thomas@codesourcery.com>
9220 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
9221 t_async and the wait arguments.
9223 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
9225 PR tree-optimization/94727
9226 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
9227 comparing invariant scalar booleans.
9229 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
9230 Jakub Jelinek <jakub@redhat.com>
9233 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
9234 empty base class artificial fields.
9235 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
9236 different after this fix.
9238 2020-04-23 Jakub Jelinek <jakub@redhat.com>
9241 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
9242 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
9243 if the same type has been diagnosed most recently already.
9245 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9247 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
9249 (__arm_vbicq_n_s16): Likewise.
9250 (__arm_vbicq_n_u32): Likewise.
9251 (__arm_vbicq_n_s32): Likewise.
9252 (__arm_vbicq): Likewise.
9253 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
9254 (__arm_vbicq_n_s32): Likewise.
9255 (__arm_vbicq_n_u16): Likewise.
9256 (__arm_vbicq_n_u32): Likewise.
9257 (__arm_vdupq_m_n_s8): Likewise.
9258 (__arm_vdupq_m_n_s16): Likewise.
9259 (__arm_vdupq_m_n_s32): Likewise.
9260 (__arm_vdupq_m_n_u8): Likewise.
9261 (__arm_vdupq_m_n_u16): Likewise.
9262 (__arm_vdupq_m_n_u32): Likewise.
9263 (__arm_vdupq_m_n_f16): Likewise.
9264 (__arm_vdupq_m_n_f32): Likewise.
9265 (__arm_vldrhq_gather_offset_s16): Likewise.
9266 (__arm_vldrhq_gather_offset_s32): Likewise.
9267 (__arm_vldrhq_gather_offset_u16): Likewise.
9268 (__arm_vldrhq_gather_offset_u32): Likewise.
9269 (__arm_vldrhq_gather_offset_f16): Likewise.
9270 (__arm_vldrhq_gather_offset_z_s16): Likewise.
9271 (__arm_vldrhq_gather_offset_z_s32): Likewise.
9272 (__arm_vldrhq_gather_offset_z_u16): Likewise.
9273 (__arm_vldrhq_gather_offset_z_u32): Likewise.
9274 (__arm_vldrhq_gather_offset_z_f16): Likewise.
9275 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
9276 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
9277 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
9278 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
9279 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
9280 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
9281 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
9282 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
9283 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
9284 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
9285 (__arm_vldrwq_gather_offset_s32): Likewise.
9286 (__arm_vldrwq_gather_offset_u32): Likewise.
9287 (__arm_vldrwq_gather_offset_f32): Likewise.
9288 (__arm_vldrwq_gather_offset_z_s32): Likewise.
9289 (__arm_vldrwq_gather_offset_z_u32): Likewise.
9290 (__arm_vldrwq_gather_offset_z_f32): Likewise.
9291 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
9292 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
9293 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
9294 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
9295 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
9296 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
9297 (__arm_vdwdupq_x_n_u8): Likewise.
9298 (__arm_vdwdupq_x_n_u16): Likewise.
9299 (__arm_vdwdupq_x_n_u32): Likewise.
9300 (__arm_viwdupq_x_n_u8): Likewise.
9301 (__arm_viwdupq_x_n_u16): Likewise.
9302 (__arm_viwdupq_x_n_u32): Likewise.
9303 (__arm_vidupq_x_n_u8): Likewise.
9304 (__arm_vddupq_x_n_u8): Likewise.
9305 (__arm_vidupq_x_n_u16): Likewise.
9306 (__arm_vddupq_x_n_u16): Likewise.
9307 (__arm_vidupq_x_n_u32): Likewise.
9308 (__arm_vddupq_x_n_u32): Likewise.
9309 (__arm_vldrdq_gather_offset_s64): Likewise.
9310 (__arm_vldrdq_gather_offset_u64): Likewise.
9311 (__arm_vldrdq_gather_offset_z_s64): Likewise.
9312 (__arm_vldrdq_gather_offset_z_u64): Likewise.
9313 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
9314 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
9315 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
9316 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
9317 (__arm_vidupq_m_n_u8): Likewise.
9318 (__arm_vidupq_m_n_u16): Likewise.
9319 (__arm_vidupq_m_n_u32): Likewise.
9320 (__arm_vddupq_m_n_u8): Likewise.
9321 (__arm_vddupq_m_n_u16): Likewise.
9322 (__arm_vddupq_m_n_u32): Likewise.
9323 (__arm_vidupq_n_u16): Likewise.
9324 (__arm_vidupq_n_u32): Likewise.
9325 (__arm_vidupq_n_u8): Likewise.
9326 (__arm_vddupq_n_u16): Likewise.
9327 (__arm_vddupq_n_u32): Likewise.
9328 (__arm_vddupq_n_u8): Likewise.
9330 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
9332 * doc/install.texi (D-Specific Options): Document
9333 --enable-libphobos-checking and --with-libphobos-druntime-only.
9335 2020-04-23 Jakub Jelinek <jakub@redhat.com>
9338 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
9339 cxx17_empty_base_seen argument. Pass it to recursive calls.
9340 Ignore cxx17_empty_base_field_p fields after setting
9341 *cxx17_empty_base_seen to true.
9342 (rs6000_discover_homogeneous_aggregate): Adjust
9343 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
9344 aggregates with C++17 empty base fields.
9347 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
9348 if last_decl is error_mark_node or has such a TREE_TYPE.
9351 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
9352 if last_decl is error_mark_node or has such a TREE_TYPE.
9354 2020-04-22 Felix Yang <felix.yang@huawei.com>
9357 * config/aarch64/aarch64.h (TARGET_SVE):
9358 Add && !TARGET_GENERAL_REGS_ONLY.
9359 (TARGET_SVE2): Add && TARGET_SVE.
9360 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
9361 TARGET_SVE2_SM4): Add && TARGET_SVE2.
9362 * config/aarch64/aarch64-sve-builtins.h
9363 (sve_switcher::m_old_general_regs_only): New member.
9364 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
9366 (reported_missing_registers_p): New variable.
9367 (check_required_extensions): Call check_required_registers before
9368 return if all required extenstions are present.
9369 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
9370 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
9371 global_options.x_target_flags.
9372 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
9373 global_options.x_target_flags if m_old_general_regs_only is true.
9375 2020-04-22 Zackery Spytz <zspytz@gmail.com>
9377 * doc/extend.exi: Add "free" to list of other builtin functions
9380 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
9383 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
9385 (store_quadpti): Ditto.
9386 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
9387 plq will be used and doesn't need it.
9388 (atomic_store<mode>): Ditto, for pstq.
9390 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
9392 * doc/invoke.texi: Update flags turned on by -O3.
9394 2020-04-22 Jakub Jelinek <jakub@redhat.com>
9397 * config/ia64/ia64.c (hfa_element_mode): Ignore
9398 cxx17_empty_base_field_p fields.
9401 * calls.h (cxx17_empty_base_field_p): Declare.
9402 * calls.c (cxx17_empty_base_field_p): Define.
9404 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
9406 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
9408 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
9409 Andre Vieira <andre.simoesdiasvieira@arm.com>
9410 Mihail Ionescu <mihail.ionescu@arm.com>
9412 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
9413 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
9414 (ALL_QUIRKS): Add quirk_no_asmcpu.
9415 (cortex-m55): Define new cpu.
9416 * config/arm/arm-tables.opt: Regenerate.
9417 * config/arm/arm-tune.md: Likewise.
9418 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
9420 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
9422 PR tree-optimization/94700
9423 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
9424 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
9425 of similarly-structured but distinct vector types.
9427 2020-04-21 Martin Sebor <msebor@redhat.com>
9430 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
9431 the computation of the lower bound of the source access size.
9432 (builtin_access::generic_overlap): Remove a hack for setting ranges
9435 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
9437 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
9438 (ASM_WEAKEN_DECL): New define.
9439 (HAVE_GAS_WEAKREF): Undefine.
9441 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
9443 PR tree-optimization/94683
9444 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
9445 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
9446 but distinct vector types.
9448 2020-04-21 Jakub Jelinek <jakub@redhat.com>
9451 * stor-layout.c (place_field, finalize_record_size): Don't emit
9452 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
9453 * ubsan.c (ubsan_get_type_descriptor_type,
9454 ubsan_get_source_location_type, ubsan_create_data): Set
9456 * asan.c (asan_global_struct): Likewise.
9458 2020-04-21 Duan bo <duanbo3@huawei.com>
9461 * config/aarch64/aarch64.c: Add an error message for option conflict.
9462 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
9463 incompatible with -fpic, -fPIC and -mabi=ilp32.
9465 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
9468 * omp-low.c (new_omp_context): Remove assignments to
9469 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
9471 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
9473 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
9474 ("popcountv2di2_vx"): Use simplify_gen_subreg.
9476 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
9479 * config/s390/s390-builtin-types.def: Add 3 new function modes.
9480 * config/s390/s390-builtins.def: Add mode dependent low-level
9481 builtin and map the overloaded builtins to these.
9482 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
9483 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
9485 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
9487 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
9488 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
9489 estimated VF and is no worse at double the estimated VF.
9491 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
9494 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
9495 order of arguments to rtx_vector_builder.
9496 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
9497 When extending the trailing constants to a full vector, replace any
9498 variables with zeros.
9500 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
9503 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
9506 2020-04-20 Martin Liska <mliska@suse.cz>
9508 * symtab.c (symtab_node::dump_references): Add space after
9510 (symtab_node::dump_referring): Likewise.
9512 2020-04-18 Jeff Law <law@redhat.com>
9515 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
9518 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
9520 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
9521 attributes): Document d_runtime_has_std_library.
9523 2020-04-17 Jeff Law <law@redhat.com>
9525 PR rtl-optimization/90275
9526 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
9527 when the destination has a REG_UNUSED note.
9529 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
9532 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
9535 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
9537 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
9538 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
9539 cost of load and store insns if one loop iteration has enough scalar
9540 elements to use an Advanced SIMD LDP or STP.
9541 (aarch64_add_stmt_cost): Update call accordingly.
9543 2020-04-17 Jakub Jelinek <jakub@redhat.com>
9544 Jeff Law <law@redhat.com>
9547 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
9548 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
9549 or pos + len >= 32, or pos + len is equal to operands[2] precision
9550 and operands[2] is not a register operand. During splitting perform
9551 SImode AND if operands[0] doesn't have CCZmode and pos + len is
9552 equal to mode precision.
9554 2020-04-17 Richard Biener <rguenther@suse.de>
9557 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
9559 * dwarf2out.c (dw_val_equal_p): Fix pasto in
9560 dw_val_class_vms_delta comparison.
9561 * optabs.c (expand_binop_directly): Fix pasto in commutation
9563 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
9566 2020-04-17 Jakub Jelinek <jakub@redhat.com>
9568 PR rtl-optimization/94618
9569 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
9570 insn is the BB_END of its block, but also when it is only followed
9571 by DEBUG_INSNs in its block.
9573 PR tree-optimization/94621
9574 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
9575 Move id->adjust_array_error_bounds check first in the condition.
9577 2020-04-17 Martin Liska <mliska@suse.cz>
9578 Jonathan Yong <10walls@gmail.com>
9580 PR gcov-profile/94570
9581 * coverage.c (coverage_init): Use separator properly.
9583 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
9585 PR rtl-optimization/93974
9586 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
9587 (rs6000_cannot_substitute_mem_equiv_p): New function.
9589 2020-04-16 Martin Jambor <mjambor@suse.cz>
9592 * ipa-inline.h (ipa_saved_clone_sources): Declare.
9593 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
9594 (save_inline_function_body): Link the new body holder with the
9596 * cgraph.c: Include ipa-inline.h.
9597 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
9598 the statement in ipa_saved_clone_sources.
9599 * cgraphunit.c: Include ipa-inline.h.
9600 (expand_all_functions): Free ipa_saved_clone_sources.
9602 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
9605 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
9606 the VNx16BI lowpart of the recursively-generated constant.
9608 2020-04-16 Martin Liska <mliska@suse.cz>
9609 Jakub Jelinek <jakub@redhat.com>
9612 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
9613 DECL_IS_REPLACEABLE_OPERATOR during cloning.
9614 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
9615 (propagate_necessity): Check operator names.
9617 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
9619 PR rtl-optimization/94605
9620 * early-remat.c (early_remat::process_block): Handle insns that
9621 set multiple candidate registers.
9622 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
9624 PR gcov-profile/93401
9625 * common.opt (profile-prefix-path): New option.
9626 * coverae.c: Include diagnostics.h.
9627 (coverage_init): Strip profile prefix path.
9628 * doc/invoke.texi (-fprofile-prefix-path): Document.
9630 2020-04-16 Richard Biener <rguenther@suse.de>
9633 * expr.c (emit_move_multi_word): Do not generate code when
9634 the destination part is undefined_operand_subword_p.
9635 * lower-subreg.c (resolve_clobber): Look through a paradoxica
9638 2020-04-16 Martin Jambor <mjambor@suse.cz>
9640 PR tree-optimization/94598
9641 * tree-sra.c (verify_sra_access_forest): Fix verification of total
9642 scalarization accesses under access to one-element arrays.
9644 2020-04-16 Jakub Jelinek <jakub@redhat.com>
9647 * function.c (assign_parm_find_data_types): Add workaround for
9648 BROKEN_VALUE_INITIALIZATION compilers.
9650 2020-04-16 Richard Biener <rguenther@suse.de>
9652 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
9655 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
9658 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
9659 Require OPTION_MASK_ISA_SSE2.
9661 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
9664 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
9665 Don't construct a dump_context temporary to call static method.
9667 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
9669 * config/aarch64/falkor-tag-collision-avoidance.c
9670 (valid_src_p): Check for aarch64_address_info type before
9671 accessing base field.
9673 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
9675 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
9676 (V_sz_elem2): Remove unused mode attribute.
9678 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
9680 * config/arm/arm.md (arm_movdi): Disallow for MVE.
9682 2020-04-15 Richard Biener <rguenther@suse.de>
9685 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
9686 alias_sets_conflict_p for pointers.
9688 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
9691 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
9692 (extendhisi2_internal): Add %v1 before the load instructions.
9694 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
9697 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
9698 use PC-relative addressing for TLS references.
9700 2020-04-14 Martin Jambor <mjambor@suse.cz>
9703 * ipa-sra.c: Include internal-fn.h.
9704 (enum isra_scan_context): Update comment.
9705 (scan_function): Treat calls to internal_functions like loads or stores.
9707 2020-04-14 Yang Yang <yangyang305@huawei.com>
9709 PR tree-optimization/94574
9710 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
9711 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
9713 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
9716 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
9718 2020-04-13 Martin Sebor <msebor@redhat.com>
9720 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
9721 -Wformat-truncation. Move -Wzero-length-bounds last.
9722 (-Wrestrict): Document positive form of option enabled by -Wall.
9724 2020-04-13 Zachary Spytz <zspytz@gmail.com>
9726 * doc/extend.texi: Add realloc to list of built-in functions
9727 are recognized by the compiler.
9729 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
9732 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
9733 pointer in word_mode for eh_return epilogues.
9735 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9737 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
9738 memory references in %B, %C and %D operand selectors when the inner
9739 operand is a post increment address.
9741 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9743 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
9744 reference by 4 bytes, and %D memory reference by 6 bytes.
9746 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
9749 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
9750 condition for V4SI, V8HI and V16QI modes.
9752 2020-04-11 Jakub Jelinek <jakub@redhat.com>
9756 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
9759 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
9763 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
9764 "#pragma omp declare target" has also been applied.
9766 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
9768 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
9769 when to emit the epilogue_helper insn.
9770 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
9773 2020-04-09 Jakub Jelinek <jakub@redhat.com>
9776 * cselib.h (cselib_record_sp_cfa_base_equiv,
9777 cselib_sp_derived_value_p): Declare.
9778 * cselib.c (cselib_record_sp_cfa_base_equiv,
9779 cselib_sp_derived_value_p): New functions.
9780 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
9781 cselib_sp_derived_value_p values.
9782 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
9783 start of extended basic blocks other than the first one
9784 for !frame_pointer_needed functions.
9786 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
9788 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
9789 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
9790 (aarch64_sve2048_hw): Document.
9791 * config/aarch64/aarch64-protos.h
9792 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
9793 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
9794 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
9795 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
9797 (find_type_suffix_for_scalar_type): Use it instead of comparing
9799 (function_resolver::infer_vector_or_tuple_type): Likewise.
9800 (function_resolver::require_vector_type): Likewise.
9801 (handle_arm_sve_vector_bits_attribute): New function.
9802 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
9803 (aarch64_attribute_table): Add arm_sve_vector_bits.
9804 (aarch64_return_in_memory_1):
9805 (pure_scalable_type_info::piece::get_rtx): New function.
9806 (pure_scalable_type_info::num_zr): Likewise.
9807 (pure_scalable_type_info::num_pr): Likewise.
9808 (pure_scalable_type_info::get_rtx): Likewise.
9809 (pure_scalable_type_info::analyze): Likewise.
9810 (pure_scalable_type_info::analyze_registers): Likewise.
9811 (pure_scalable_type_info::analyze_array): Likewise.
9812 (pure_scalable_type_info::analyze_record): Likewise.
9813 (pure_scalable_type_info::add_piece): Likewise.
9814 (aarch64_some_values_include_pst_objects_p): Likewise.
9815 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
9816 to analyze whether the type is returned in SVE registers.
9817 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
9818 is passed in SVE registers.
9819 (aarch64_pass_by_reference_1): New function, extracted from...
9820 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
9821 to analyze whether the type is a pure scalable type and, if so,
9822 whether it should be passed by reference.
9823 (aarch64_return_in_msb): Return false for pure scalable types.
9824 (aarch64_function_value_1): Fold back into...
9825 (aarch64_function_value): ...this function. Use
9826 pure_scalable_type_info to analyze whether the type is a pure
9827 scalable type and, if so, which registers it should use. Handle
9828 types that include pure scalable types but are not themselves
9829 pure scalable types.
9830 (aarch64_return_in_memory_1): New function, split out from...
9831 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
9832 to analyze whether the type is a pure scalable type and, if so,
9833 whether it should be returned by reference.
9834 (aarch64_layout_arg): Remove orig_mode argument. Use
9835 pure_scalable_type_info to analyze whether the type is a pure
9836 scalable type and, if so, which registers it should use. Handle
9837 types that include pure scalable types but are not themselves
9838 pure scalable types.
9839 (aarch64_function_arg): Update call accordingly.
9840 (aarch64_function_arg_advance): Likewise.
9841 (aarch64_pad_reg_upward): On big-endian targets, return false for
9842 pure scalable types that are smaller than 16 bytes.
9843 (aarch64_member_type_forces_blk): New function.
9844 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
9845 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
9846 correspond to built-in SVE types. Do not rely on a vector mode
9847 if the type includes an pure scalable type. When returning true,
9848 assert that the mode is not an SVE mode.
9849 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
9850 built-in types here. When returning true, assert that the type
9851 does not have an SVE mode.
9852 (aarch64_can_change_mode_class): Don't allow anything to change
9853 between a predicate mode and a non-predicate mode. Also don't
9854 allow changes between SVE vector modes and other modes that
9855 might be bigger than 128 bits.
9856 (aarch64_invalid_binary_op): Reject binary operations that mix
9857 SVE and GNU vector types.
9858 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
9860 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
9862 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
9863 "SVE sizeless type".
9864 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
9865 (sizeless_type_p): New functions.
9866 (register_builtin_types): Apply make_type_sizeless to the type.
9867 (register_tuple_type): Likewise.
9868 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
9870 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
9872 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
9875 2020-04-09 Martin Jambor <mjambor@suse.cz>
9876 Richard Biener <rguenther@suse.de>
9878 PR tree-optimization/94482
9879 * tree-sra.c (create_access_replacement): Dump new replacement with
9881 (sra_modify_expr): Fix handling of cases when the original EXPR writes
9882 to only part of the replacement.
9883 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
9884 the first operand of combinations into REAL/IMAGPART_EXPR and
9887 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
9889 * doc/sourcebuild.texi (check-function-bodies): Treat the third
9890 parameter as a list of option regexps and require each regexp
9893 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
9896 * config/aarch64/falkor-tag-collision-avoidance.c
9897 (valid_src_p): Fix missing rtx type check.
9899 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
9900 Richard Biener <rguenther@suse.de>
9902 PR tree-optimization/93674
9903 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
9904 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
9905 or non-mode precision type, add candidate in unsigned type with the
9908 2020-04-08 Clement Chigot <clement.chigot@atos.net>
9910 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
9911 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
9912 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
9914 2020-04-08 Jakub Jelinek <jakub@redhat.com>
9917 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
9919 * reload1.c (eliminate_regs_1): Avoid creating
9920 (plus (reg) (const_int 0)) in DEBUG_INSNs.
9922 PR tree-optimization/94524
9923 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
9924 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
9925 op1 rather than op1 itself at the end. Punt for signed modulo by
9926 most negative constant.
9927 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
9928 modulo by most negative constant.
9930 2020-04-08 Richard Biener <rguenther@suse.de>
9932 PR rtl-optimization/93946
9933 * cse.c (cse_insn): Record the tabled expression in
9934 src_related. Verify a redundant store removal is valid.
9936 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
9939 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
9940 ENDBR at function entry if function will be called indirectly.
9942 2020-04-08 Jakub Jelinek <jakub@redhat.com>
9945 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
9948 2020-04-08 Martin Liska <mliska@suse.cz>
9951 * gimple.c (gimple_call_operator_delete_p): Rename to...
9952 (gimple_call_replaceable_operator_delete_p): ... this.
9953 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
9954 * gimple.h (gimple_call_operator_delete_p): Rename to ...
9955 (gimple_call_replaceable_operator_delete_p): ... this.
9956 * tree-core.h (tree_function_decl): Add replaceable_operator
9958 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
9959 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
9960 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
9961 (eliminate_unnecessary_stmts): Likewise.
9962 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
9963 Pack DECL_IS_REPLACEABLE_OPERATOR.
9964 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
9965 Unpack the field here.
9966 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
9967 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
9968 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
9969 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
9970 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
9971 replaceable operator flags.
9973 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
9974 Matthew Malcomson <matthew.malcomson@arm.com>
9976 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
9977 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
9978 (CX_TERNARY_QUALIFIERS): Likewise.
9979 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
9980 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
9981 (arm_init_acle_builtins): Initialize CDE builtins.
9982 (arm_expand_acle_builtin): Check CDE constant operands.
9983 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
9984 of CDE constant operand.
9985 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
9987 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
9988 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
9989 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
9990 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
9991 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
9992 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
9993 * config/arm/arm_cde_builtins.def: New file.
9994 * config/arm/iterators.md (V_reg): New attribute of SI.
9995 * config/arm/predicates.md (const_int_coproc_operand): New.
9996 (const_int_vcde1_operand, const_int_vcde2_operand): New.
9997 (const_int_vcde3_operand): New.
9998 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
9999 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
10000 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
10001 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
10003 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
10005 * config.gcc: Add arm_cde.h.
10006 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
10007 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
10008 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
10009 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
10010 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
10011 * config/arm/arm.h (TARGET_CDE): New macro.
10012 * config/arm/arm_cde.h: New file.
10013 * doc/invoke.texi: Document CDE options +cdecp[0-7].
10014 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
10016 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
10018 2020-04-08 Jakub Jelinek <jakub@redhat.com>
10020 PR rtl-optimization/94516
10021 * postreload.c: Include rtl-iter.h.
10022 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
10023 looking for all MEMs with RTX_AUTOINC operand.
10024 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
10026 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
10028 * omp-grid.c (grid_eliminate_combined_simd_part): Use
10029 OMP_CLAUSE_CODE to access the omp clause code.
10031 2020-04-07 Jeff Law <law@redhat.com>
10033 PR rtl-optimization/92264
10034 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
10035 the destination is the stack pointer.
10037 2020-04-07 Jakub Jelinek <jakub@redhat.com>
10039 PR rtl-optimization/94291
10040 PR rtl-optimization/84169
10041 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
10042 must be a REG or SUBREG of REG; if it is not one of these, don't
10045 2020-04-07 Richard Biener <rguenther@suse.de>
10047 PR middle-end/94479
10048 * gimplify.c (gimplify_addr_expr): Also consider generated
10051 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10053 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
10055 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10057 * config/arm/arm_mve.h: Cast some pointers to expected types.
10059 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10061 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
10062 same with '__arm_' prefix.
10064 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10066 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
10068 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10070 * config/arm/arm.c (arm_mve_immediate_check): Removed.
10071 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
10072 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
10073 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
10074 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
10075 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
10076 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
10078 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10080 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
10082 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10084 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
10085 * config/arm/mve/md: Fix v[id]wdup patterns.
10087 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10089 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
10090 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
10092 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10094 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
10095 and remove const_ptr enums.
10097 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
10099 * config/arm/arm_mve.h (vsubq_n): Merge with...
10101 (vmulq_n): Merge with...
10103 (__ARM_mve_typeid): Simplify scalar and constant detection.
10105 2020-04-07 Jakub Jelinek <jakub@redhat.com>
10108 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
10109 for inter-lane permutation for 64-byte modes.
10112 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
10113 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
10114 Assume it is a REG after that instead of testing it and doing FAIL
10115 otherwise. Formatting fix.
10117 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
10119 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
10121 2020-04-07 Jakub Jelinek <jakub@redhat.com>
10124 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
10125 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
10127 2020-04-06 Jakub Jelinek <jakub@redhat.com>
10129 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
10130 + const0_rtx return the SP_DERIVED_VALUE_P.
10132 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
10134 PR rtl-optimization/92989
10135 * lra-lives.c (process_bb_lives): Do not treat eh_return data
10136 registers as being live at the beginning of the EH receiver.
10138 2020-04-05 Zachary Spytz <zspytz@gmail.com>
10140 * extend.texi: Add free to list of ISO C90 functions that
10141 are recognized by the compiler.
10143 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
10145 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
10146 for fast_interrupt.
10148 * config/microblaze/microblaze.md (trap): Update output pattern.
10150 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
10151 Jakub Jelinek <jakub@redhat.com>
10154 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
10155 arrays, pointer-to-members, function types and qualifiers when
10156 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
10157 to emit type again on definition.
10159 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
10162 * ipa-fnsummary.c (vrp_will_run_p): New function.
10163 (fre_will_run_p): New function.
10164 (evaluate_properties_for_edge): Use it.
10165 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
10166 !optimize_debug to optimize_debug.
10168 2020-04-04 Jakub Jelinek <jakub@redhat.com>
10170 PR rtl-optimization/94468
10171 * cselib.c (references_value_p): Formatting fix.
10172 (cselib_useless_value_p): New function.
10173 (discard_useless_locs, discard_useless_values,
10174 cselib_invalidate_regno_val, cselib_invalidate_mem,
10175 cselib_record_set): Use it instead of
10176 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
10179 * tree-iterator.h (expr_single): Declare.
10180 * tree-iterator.c (expr_single): New function.
10181 * tree.h (protected_set_expr_location_if_unset): Declare.
10182 * tree.c (protected_set_expr_location): Use expr_single.
10183 (protected_set_expr_location_if_unset): New function.
10185 2020-04-03 Jeff Law <law@redhat.com>
10187 PR rtl-optimization/92264
10188 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
10189 reloading of auto-increment addressing modes.
10191 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
10194 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
10197 2020-04-03 Jeff Law <law@redhat.com>
10199 PR rtl-optimization/92264
10200 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
10201 post-increment addressing of source operands as well as residuals
10202 when computing any adjustments to the input pointer.
10204 2020-04-03 Jakub Jelinek <jakub@redhat.com>
10207 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
10208 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
10209 second half of first lane from first lane of second operand and
10210 first half of second lane from second lane of first operand.
10212 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
10214 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
10216 2020-04-03 Tamar Christina <tamar.christina@arm.com>
10219 * common/config/aarch64/aarch64-common.c
10220 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
10222 2020-04-03 Richard Biener <rguenther@suse.de>
10224 PR middle-end/94465
10225 * tree.c (array_ref_low_bound): Deal with released SSA names
10228 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
10230 * config/gcn/gcn.c (print_operand): Handle unordered comparison
10232 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
10233 comparison operators.
10235 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
10237 PR tree-optimization/94443
10238 * tree-vect-loop.c (vectorizable_live_operation): Use
10239 gsi_insert_seq_before to replace gsi_insert_before.
10241 2020-04-03 Martin Liska <mliska@suse.cz>
10244 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
10245 Compare type attributes for gimple_call_fntypes.
10247 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
10249 * alias.c (get_alias_set): Fix comment typos.
10251 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
10254 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
10255 attribute checking used by TYPE.
10257 2020-04-02 Martin Jambor <mjambor@suse.cz>
10260 * ipa-sra.c (struct caller_issues): New fields candidate and
10261 call_from_outside_comdat.
10262 (check_for_caller_issues): Check for calls from outsied of
10263 candidate's same_comdat_group.
10264 (check_all_callers_for_issues): Set up issues.candidate, check result
10266 (mark_callers_calls_comdat_local): New function.
10267 (process_isra_node_results): Set calls_comdat_local of callers if
10270 2020-04-02 Richard Biener <rguenther@suse.de>
10273 * common.opt (ffinite-loops): Initialize to zero.
10274 * opts.c (default_options_table): Remove OPT_ffinite_loops
10276 * cfgloop.h (loop::finite_p): New member.
10277 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
10278 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
10280 * lto-streamer-in.c (input_cfg): Stream finite_p.
10281 * lto-streamer-out.c (output_cfg): Likewise.
10282 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
10283 from flag_finite_loops at CFG build time.
10284 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
10285 finite_p flag instead of flag_finite_loops.
10286 * doc/invoke.texi (ffinite-loops): Adjust documentation of
10289 2020-04-02 Richard Biener <rguenther@suse.de>
10292 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
10293 DW_TAG_imported_unit.
10295 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
10297 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
10298 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
10301 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
10303 PR tree-optimization/94401
10304 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
10305 access type when loading halves of vector to avoid peeling for gaps.
10307 2020-04-02 Jakub Jelinek <jakub@redhat.com>
10309 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
10310 between a string literal and MIPS_SYSVERSION_SPEC macro.
10312 2020-04-02 Martin Jambor <mjambor@suse.cz>
10314 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
10316 2020-04-02 Jakub Jelinek <jakub@redhat.com>
10318 PR rtl-optimization/92264
10319 * params.opt (-param=max-find-base-term-values=): Decrease default
10322 PR rtl-optimization/92264
10323 * rtl.h (struct rtx_def): Mention that call bit is used as
10324 SP_DERIVED_VALUE_P in cselib.c.
10325 * cselib.c (SP_DERIVED_VALUE_P): Define.
10326 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
10327 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
10328 val_rtx and sp based expression where offsets cancel each other.
10329 (preserve_constants_and_equivs): Formatting fix.
10330 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
10331 locs list for cfa_base_preserved_val if needed. Formatting fix.
10332 (autoinc_split): If the to be returned value is a REG, MEM or
10333 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
10334 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
10335 (rtx_equal_for_cselib_1): Call autoinc_split even if both
10336 expressions are PLUS in Pmode with CONST_INT second operands.
10337 Handle SP_DERIVED_VALUE_P cases.
10338 (cselib_hash_plus_const_int): New function.
10339 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
10340 second operand, as well as for PRE_DEC etc. that ought to be
10341 hashed the same way.
10342 (cselib_subst_to_values): Substitute PLUS with Pmode and
10343 CONST_INT operand if the first operand is a VALUE which has
10344 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
10345 SP_DERIVED_VALUE_P + adjusted offset.
10346 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
10347 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
10348 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
10349 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
10350 on the sp value before calling cselib_add_permanent_equiv on the
10352 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
10353 in the insn without REG_INC note.
10354 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
10355 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
10358 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
10359 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
10361 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10364 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
10365 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
10366 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
10367 intrinsic defintion by adding a new builtin call to writeback into base
10369 (__arm_vldrdq_gather_base_wb_u64): Likewise.
10370 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
10371 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
10372 (__arm_vldrwq_gather_base_wb_s32): Likewise.
10373 (__arm_vldrwq_gather_base_wb_u32): Likewise.
10374 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
10375 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
10376 (__arm_vldrwq_gather_base_wb_f32): Likewise.
10377 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
10378 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
10379 builtin's qualifier.
10380 (vldrdq_gather_base_wb_z_u): Likewise.
10381 (vldrwq_gather_base_wb_u): Likewise.
10382 (vldrdq_gather_base_wb_u): Likewise.
10383 (vldrwq_gather_base_wb_z_s): Likewise.
10384 (vldrwq_gather_base_wb_z_f): Likewise.
10385 (vldrdq_gather_base_wb_z_s): Likewise.
10386 (vldrwq_gather_base_wb_s): Likewise.
10387 (vldrwq_gather_base_wb_f): Likewise.
10388 (vldrdq_gather_base_wb_s): Likewise.
10389 (vldrwq_gather_base_nowb_z_u): Define builtin.
10390 (vldrdq_gather_base_nowb_z_u): Likewise.
10391 (vldrwq_gather_base_nowb_u): Likewise.
10392 (vldrdq_gather_base_nowb_u): Likewise.
10393 (vldrwq_gather_base_nowb_z_s): Likewise.
10394 (vldrwq_gather_base_nowb_z_f): Likewise.
10395 (vldrdq_gather_base_nowb_z_s): Likewise.
10396 (vldrwq_gather_base_nowb_s): Likewise.
10397 (vldrwq_gather_base_nowb_f): Likewise.
10398 (vldrdq_gather_base_nowb_s): Likewise.
10399 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
10401 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
10402 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
10403 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
10404 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
10405 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
10406 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
10407 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
10408 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
10409 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
10410 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
10411 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
10413 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
10415 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
10416 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
10417 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
10418 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
10419 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
10420 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
10421 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
10422 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
10423 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
10425 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
10426 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
10427 Remove constraints from expander.
10428 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
10429 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
10430 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
10431 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
10432 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
10433 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
10435 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
10437 PR rtl-optimization/94123
10438 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
10439 flag_split_wide_types_early.
10441 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
10443 * doc/extend.texi (Common Function Attributes): Fix typo.
10445 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
10448 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
10451 2020-04-01 Zackery Spytz <zspytz@gmail.com>
10453 * doc/extend.texi: Fix a typo in the documentation of the
10454 copy function attribute.
10456 2020-04-01 Jakub Jelinek <jakub@redhat.com>
10458 PR middle-end/94423
10459 * tree-object-size.c (pass_object_sizes::execute): Don't call
10460 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
10461 call replace_call_with_value.
10463 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
10465 PR tree-optimization/94043
10466 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
10467 phi for vec_lhs and use it for lane extraction.
10469 2020-03-31 Felix Yang <felix.yang@huawei.com>
10471 PR tree-optimization/94398
10472 * tree-vect-stmts.c (vectorizable_store): Instead of calling
10473 vect_supportable_dr_alignment, set alignment_support_scheme to
10474 dr_unaligned_supported for gather-scatter accesses.
10475 (vectorizable_load): Likewise.
10477 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
10479 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
10480 New mode iterators.
10481 (vnsi, VnSI, vndi, VnDI): New mode attributes.
10482 (mov<mode>): Use <VnDI> in place of V64DI.
10483 (mov<mode>_exec): Likewise.
10484 (mov<mode>_sgprbase): Likewise.
10485 (reload_out<mode>): Likewise.
10486 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
10487 (gather_load<mode>v64si): Rename to ...
10488 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
10489 and <VnDI> in place of V64DI.
10490 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
10491 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
10492 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
10493 (scatter_store<mode>v64si): Rename to ...
10494 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
10495 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
10496 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
10497 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
10498 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
10499 (ds_bpermute<mode>): Use <VnSI>.
10500 (addv64si3_vcc<exec_vcc>): Rename to ...
10501 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
10502 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
10503 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
10504 (addcv64si3<exec_vcc>): Rename to ...
10505 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
10506 (subv64si3_vcc<exec_vcc>): Rename to ...
10507 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
10508 (subcv64si3<exec_vcc>): Rename to ...
10509 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
10510 (addv64di3): Rename to ...
10511 (add<mode>3): ... this, and use V_DI.
10512 (addv64di3_exec): Rename to ...
10513 (add<mode>3_exec): ... this, and use V_DI.
10514 (subv64di3): Rename to ...
10515 (sub<mode>3): ... this, and use V_DI.
10516 (subv64di3_exec): Rename to ...
10517 (sub<mode>3_exec): ... this, and use V_DI.
10518 (addv64di3_zext): Rename to ...
10519 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
10520 (addv64di3_zext_exec): Rename to ...
10521 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
10522 (addv64di3_zext_dup): Rename to ...
10523 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
10524 (addv64di3_zext_dup_exec): Rename to ...
10525 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
10526 (addv64di3_zext_dup2): Rename to ...
10527 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
10528 (addv64di3_zext_dup2_exec): Rename to ...
10529 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
10530 (addv64di3_sext_dup2): Rename to ...
10531 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
10532 (addv64di3_sext_dup2_exec): Rename to ...
10533 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
10534 (<su>mulv64si3_highpart<exec>): Rename to ...
10535 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
10536 (mulv64di3): Rename to ...
10537 (mul<mode>3): ... this, and use V_DI and <VnSI>.
10538 (mulv64di3_exec): Rename to ...
10539 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
10540 (mulv64di3_zext): Rename to ...
10541 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
10542 (mulv64di3_zext_exec): Rename to ...
10543 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
10544 (mulv64di3_zext_dup2): Rename to ...
10545 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
10546 (mulv64di3_zext_dup2_exec): Rename to ...
10547 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
10548 (<expander>v64di3): Rename to ...
10549 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
10550 (<expander>v64di3_exec): Rename to ...
10551 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
10552 (<expander>v64si3<exec>): Rename to ...
10553 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
10554 (v<expander>v64si3<exec>): Rename to ...
10555 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
10556 (<expander>v64si3<exec>): Rename to ...
10557 (<expander><vnsi>3<exec>): ... this, and use V_SI.
10558 (subv64df3<exec>): Rename to ...
10559 (sub<mode>3<exec>): ... this, and use V_DF.
10560 (truncv64di<mode>2): Rename to ...
10561 (trunc<vndi><mode>2): ... this, and use <VnDI>.
10562 (truncv64di<mode>2_exec): Rename to ...
10563 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
10564 (<convop><mode>v64di2): Rename to ...
10565 (<convop><mode><vndi>2): ... this, and use <VnDI>.
10566 (<convop><mode>v64di2_exec): Rename to ...
10567 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
10568 (vec_cmp<u>v64qidi): Rename to ...
10569 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
10570 (vec_cmp<u>v64qidi_exec): Rename to ...
10571 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
10572 (vcond_mask_<mode>di): Use <VnDI>.
10573 (maskload<mode>di): Likewise.
10574 (maskstore<mode>di): Likewise.
10575 (mask_gather_load<mode>v64si): Rename to ...
10576 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
10577 (mask_scatter_store<mode>v64si): Rename to ...
10578 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
10579 (*<reduc_op>_dpp_shr_v64di): Rename to ...
10580 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
10581 (*plus_carry_in_dpp_shr_v64si): Rename to ...
10582 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
10583 (*plus_carry_dpp_shr_v64di): Rename to ...
10584 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
10585 (vec_seriesv64si): Rename to ...
10586 (vec_series<mode>): ... this, and use V_SI.
10587 (vec_seriesv64di): Rename to ...
10588 (vec_series<mode>): ... this, and use V_DI.
10590 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
10592 * config/arc/arc.c (arc_print_operand): Use
10593 HOST_WIDE_INT_PRINT_DEC macro.
10595 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
10597 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
10599 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10601 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
10603 (__arm_vbicq): Likewise.
10605 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
10607 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
10609 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10611 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
10612 common section of both MVE Integer and MVE Floating Point.
10613 (vaddvq): Likewise.
10614 (vaddlvq_p): Likewise.
10615 (vaddvaq): Likewise.
10616 (vaddvq_p): Likewise.
10617 (vcmpcsq): Likewise.
10618 (vmlsdavxq): Likewise.
10619 (vmlsdavq): Likewise.
10620 (vmladavxq): Likewise.
10621 (vmladavq): Likewise.
10622 (vminvq): Likewise.
10623 (vminavq): Likewise.
10624 (vmaxvq): Likewise.
10625 (vmaxavq): Likewise.
10626 (vmlaldavq): Likewise.
10627 (vcmphiq): Likewise.
10628 (vaddlvaq): Likewise.
10629 (vrmlaldavhq): Likewise.
10630 (vrmlaldavhxq): Likewise.
10631 (vrmlsldavhq): Likewise.
10632 (vrmlsldavhxq): Likewise.
10633 (vmlsldavxq): Likewise.
10634 (vmlsldavq): Likewise.
10635 (vabavq): Likewise.
10636 (vrmlaldavhaq): Likewise.
10637 (vcmpgeq_m_n): Likewise.
10638 (vmlsdavxq_p): Likewise.
10639 (vmlsdavq_p): Likewise.
10640 (vmlsdavaxq): Likewise.
10641 (vmlsdavaq): Likewise.
10642 (vaddvaq_p): Likewise.
10643 (vcmpcsq_m_n): Likewise.
10644 (vcmpcsq_m): Likewise.
10645 (vmladavxq_p): Likewise.
10646 (vmladavq_p): Likewise.
10647 (vmladavaxq): Likewise.
10648 (vmladavaq): Likewise.
10649 (vminvq_p): Likewise.
10650 (vminavq_p): Likewise.
10651 (vmaxvq_p): Likewise.
10652 (vmaxavq_p): Likewise.
10653 (vcmphiq_m): Likewise.
10654 (vaddlvaq_p): Likewise.
10655 (vmlaldavaq): Likewise.
10656 (vmlaldavaxq): Likewise.
10657 (vmlaldavq_p): Likewise.
10658 (vmlaldavxq_p): Likewise.
10659 (vmlsldavaq): Likewise.
10660 (vmlsldavaxq): Likewise.
10661 (vmlsldavq_p): Likewise.
10662 (vmlsldavxq_p): Likewise.
10663 (vrmlaldavhaxq): Likewise.
10664 (vrmlaldavhq_p): Likewise.
10665 (vrmlaldavhxq_p): Likewise.
10666 (vrmlsldavhaq): Likewise.
10667 (vrmlsldavhaxq): Likewise.
10668 (vrmlsldavhq_p): Likewise.
10669 (vrmlsldavhxq_p): Likewise.
10670 (vabavq_p): Likewise.
10671 (vmladavaq_p): Likewise.
10672 (vstrbq_scatter_offset): Likewise.
10673 (vstrbq_p): Likewise.
10674 (vstrbq_scatter_offset_p): Likewise.
10675 (vstrdq_scatter_base_p): Likewise.
10676 (vstrdq_scatter_base): Likewise.
10677 (vstrdq_scatter_offset_p): Likewise.
10678 (vstrdq_scatter_offset): Likewise.
10679 (vstrdq_scatter_shifted_offset_p): Likewise.
10680 (vstrdq_scatter_shifted_offset): Likewise.
10681 (vmaxq_x): Likewise.
10682 (vminq_x): Likewise.
10683 (vmovlbq_x): Likewise.
10684 (vmovltq_x): Likewise.
10685 (vmulhq_x): Likewise.
10686 (vmullbq_int_x): Likewise.
10687 (vmullbq_poly_x): Likewise.
10688 (vmulltq_int_x): Likewise.
10689 (vmulltq_poly_x): Likewise.
10690 (vstrbq): Likewise.
10692 2020-03-31 Jakub Jelinek <jakub@redhat.com>
10695 * config/aarch64/constraints.md (Uph): New constraint.
10696 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
10697 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
10700 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
10701 Jakub Jelinek <jakub@redhat.com>
10703 PR middle-end/94412
10704 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
10705 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
10707 2020-03-31 Jakub Jelinek <jakub@redhat.com>
10709 PR tree-optimization/94403
10710 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
10711 ENUMERAL_TYPE lhs_type.
10713 PR rtl-optimization/94344
10714 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
10715 conversions, either on both operands of |^+ or just one. Handle
10716 also extra same precision conversion on RSHIFT_EXPR first operand
10717 provided RSHIFT_EXPR is performed in unsigned type.
10719 2020-03-30 David Malcolm <dmalcolm@redhat.com>
10721 * lra.c (finish_insn_code_data_once): Set the array elements
10722 to NULL after freeing them.
10724 2020-03-30 Andreas Schwab <schwab@suse.de>
10726 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
10729 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
10731 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
10732 to skip defining builtins based on builtin_mask.
10734 2020-03-30 Jakub Jelinek <jakub@redhat.com>
10737 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
10738 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
10739 operand is a register. Don't enable masked variants for V*[QH]Imode.
10742 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
10743 <store_mask_constraint> instead of m in output operand constraint.
10744 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
10747 2020-03-30 Alan Modra <amodra@gmail.com>
10749 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
10750 (rs6000_indirect_call_template_1): Adjust to suit.
10751 * config/rs6000/rs6000.md (call_local): Merge call_local32,
10752 call_local64, and call_local_aix.
10753 (call_value_local): Simlarly.
10754 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
10755 and disable pattern when CALL_LONG.
10756 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
10757 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
10758 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
10760 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
10763 * doc/invoke.texi: Update -falign-functions, -falign-loops and
10764 -falign-jumps documentation.
10766 2020-03-29 Martin Liska <mliska@suse.cz>
10769 * cgraphunit.c (process_function_and_variable_attributes): Remove
10770 double 'attribute' words.
10772 2020-03-29 John David Anglin <dave.anglin@bell.net>
10774 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
10777 2020-03-28 Jakub Jelinek <jakub@redhat.com>
10780 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
10781 to true after setting size to integer_one_node.
10783 PR tree-optimization/94329
10784 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
10785 on the last stmt in a bb, make sure gsi_prev isn't done immediately
10788 2020-03-27 Alan Modra <amodra@gmail.com>
10791 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
10792 for PLT16_LO and PLT_PCREL.
10793 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
10794 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
10795 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
10797 2020-03-27 Martin Sebor <msebor@redhat.com>
10800 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
10802 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
10804 * config/gcn/gcn-valu.md:
10805 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
10806 (VEC_1REG_MODE): Delete.
10807 (VEC_1REG_ALT): Delete.
10808 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
10809 (VEC_1REG_INT_MODE): Delete.
10810 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
10811 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
10812 (VEC_2REG_MODE): Rename to V_2REG throughout.
10813 (VEC_REG_MODE): Rename to V_noHI throughout.
10814 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
10815 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
10816 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
10817 (VEC_INT_MODE): Delete.
10818 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
10819 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
10820 (FP_MODE): Delete and replace with FP throughout.
10821 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
10822 (VCMP_MODE): Rename to V_noQI throughout and move to top.
10823 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
10824 * config/gcn/gcn.md (FP): New mode iterator.
10825 (FP_1REG): New mode iterator.
10827 2020-03-27 David Malcolm <dmalcolm@redhat.com>
10829 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
10830 now emits two .dot files.
10831 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
10832 (graphviz_out::end_tr): Only close a TR, not a TD.
10833 (graphviz_out::begin_td): New.
10834 (graphviz_out::end_td): New.
10835 (graphviz_out::begin_trtd): New, replacing the old implementation
10836 of graphviz_out::begin_tr.
10837 (graphviz_out::end_tdtr): New, replacing the old implementation
10838 of graphviz_out::end_tr.
10839 * graphviz.h (graphviz_out::begin_td): New decl.
10840 (graphviz_out::end_td): New decl.
10841 (graphviz_out::begin_trtd): New decl.
10842 (graphviz_out::end_tdtr): New decl.
10844 2020-03-27 Richard Biener <rguenther@suse.de>
10847 * dwarf2out.c (should_emit_struct_debug): Return false for
10850 2020-03-27 Richard Biener <rguenther@suse.de>
10852 PR tree-optimization/94352
10853 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
10855 (ssa_propagation_engine::ssa_propagate): ... here after
10856 initializing curr_order.
10858 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
10860 PR tree-optimization/90332
10861 * tree-vect-stmts.c (vector_vector_composition_type): New function.
10862 (get_group_load_store_type): Adjust to call
10863 vector_vector_composition_type, extend it to construct with scalar
10865 (vectorizable_load): Likewise.
10867 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
10869 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
10870 (create_ddg_dep_no_link): Likewise.
10871 (add_cross_iteration_register_deps): Move debug instruction check.
10872 Other minor refactoring.
10873 (add_intra_loop_mem_dep): Do not check for debug instructions.
10874 (add_inter_loop_mem_dep): Likewise.
10875 (build_intra_loop_deps): Likewise.
10876 (create_ddg): Do not include debug insns into the graph.
10877 * ddg.h (struct ddg): Remove num_debug field.
10878 * modulo-sched.c (doloop_register_get): Adjust condition.
10879 (res_MII): Remove DDG num_debug field usage.
10880 (sms_schedule_by_order): Use assertion against debug insns.
10881 (ps_has_conflicts): Drop debug insn check.
10883 2020-03-26 Jakub Jelinek <jakub@redhat.com>
10886 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
10887 that contains exactly one non-DEBUG_BEGIN_STMT statement.
10890 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
10891 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
10892 a single non-debug stmt followed by one or more debug stmts.
10893 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
10894 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
10895 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
10896 gimple_seq_last to check if outer_stmt gbind could be reused and
10897 if yes and it is surrounded by any debug stmts, move them into the
10900 PR rtl-optimization/92264
10901 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
10902 for sp based values in !frame_pointer_needed
10903 && !ACCUMULATE_OUTGOING_ARGS functions.
10905 2020-03-26 Felix Yang <felix.yang@huawei.com>
10907 PR tree-optimization/94269
10908 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
10910 operation to single basic block.
10912 2020-03-25 Jeff Law <law@redhat.com>
10914 PR rtl-optimization/90275
10915 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
10918 2020-03-25 Jakub Jelinek <jakub@redhat.com>
10921 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
10922 mode rather than VOIDmode.
10924 2020-03-25 Martin Sebor <msebor@redhat.com>
10926 PR middle-end/94004
10927 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
10928 even for alloca calls resulting from system macro expansion.
10929 Include inlining context in all warnings.
10931 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
10934 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
10935 FPRs to change between SDmode and DDmode.
10937 2020-03-25 Martin Sebor <msebor@redhat.com>
10939 PR tree-optimization/94131
10940 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
10942 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
10943 types have constant sizes.
10945 2020-03-25 Martin Liska <mliska@suse.cz>
10948 * configure.ac: Report error only when --with-zstd
10950 * configure: Regenerate.
10952 2020-03-25 Jakub Jelinek <jakub@redhat.com>
10955 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
10956 INSN_CODE (insn) to -1 when changing the pattern.
10958 2020-03-25 Martin Liska <mliska@suse.cz>
10962 * config/i386/i386-features.c (make_resolver_func): Drop
10963 public flag for resolver.
10964 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
10965 group for resolver and drop public flag if possible.
10966 * multiple_target.c (create_dispatcher_calls): Drop unique_name
10967 and resolution as we want to enable LTO privatization of the default
10970 2020-03-25 Martin Liska <mliska@suse.cz>
10973 * configure.ac: Respect --without-zstd and report
10974 error when we can't find header file with --with-zstd.
10975 * configure: Regenerate.
10977 2020-03-25 Jakub Jelinek <jakub@redhat.com>
10979 PR middle-end/94303
10980 * varasm.c (output_constructor_array_range): If local->index
10981 RANGE_EXPR doesn't start at the current location in the constructor,
10982 skip needed number of bytes using assemble_zeros or assert we don't
10986 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
10987 counter instead of DECL_UID.
10989 PR tree-optimization/94300
10990 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
10991 is positive, make sure that off + size isn't larger than needed_len.
10993 2020-03-25 Richard Biener <rguenther@suse.de>
10994 Jakub Jelinek <jakub@redhat.com>
10997 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
10999 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
11001 * doc/sourcebuild.texi (ARM-specific attributes): Add
11003 (Features for dg-add-options): Add arm_fp_dp.
11005 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
11008 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
11010 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
11013 * omp-offload.c (omp_finish_file): Fix target-link handling if
11014 targetm_common.have_named_sections is false.
11016 2020-03-24 Jakub Jelinek <jakub@redhat.com>
11019 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
11020 instead of GEN_INT.
11023 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
11024 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
11025 If not after and at *incr_pos is a debug stmt, set stmt location to
11026 location of next non-debug stmt after it if any.
11029 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
11030 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
11031 worklist or set GF_PLF_2 just because it is used in a debug stmt in
11032 another bb. Formatting improvements.
11035 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
11036 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
11037 regardless of whether TREE_NO_WARNING is set on it or whether
11038 warn_unused_function is true or not.
11040 2020-03-23 Jeff Law <law@redhat.com>
11042 PR rtl-optimization/90275
11045 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
11046 (simplify_logical_relational_operation): Use it.
11048 2020-03-23 Jakub Jelinek <jakub@redhat.com>
11051 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
11052 ultimate rhs and if returned something different, reconstructing
11053 the COMPOUND_EXPRs.
11055 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
11057 * opts.c (print_filtered_help): Improve the help text for alias options.
11059 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11060 Andre Vieira <andre.simoesdiasvieira@arm.com>
11061 Mihail Ionescu <mihail.ionescu@arm.com>
11063 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
11064 (vshlcq_m_u8): Likewise.
11065 (vshlcq_m_s16): Likewise.
11066 (vshlcq_m_u16): Likewise.
11067 (vshlcq_m_s32): Likewise.
11068 (vshlcq_m_u32): Likewise.
11069 (__arm_vshlcq_m_s8): Define intrinsic.
11070 (__arm_vshlcq_m_u8): Likewise.
11071 (__arm_vshlcq_m_s16): Likewise.
11072 (__arm_vshlcq_m_u16): Likewise.
11073 (__arm_vshlcq_m_s32): Likewise.
11074 (__arm_vshlcq_m_u32): Likewise.
11075 (vshlcq_m): Define polymorphic variant.
11076 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
11077 Use builtin qualifier.
11078 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
11079 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
11080 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
11081 (mve_vshlcq_m_<supf><mode>): Likewise.
11083 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11085 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
11086 (UQSHL_QUALIFIERS): Likewise.
11087 (ASRL_QUALIFIERS): Likewise.
11088 (SQSHL_QUALIFIERS): Likewise.
11089 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
11091 (sqrshr): Define macro.
11092 (sqrshrl): Likewise.
11093 (sqrshrl_sat48): Likewise.
11095 (sqshll): Likewise.
11097 (srshrl): Likewise.
11098 (uqrshl): Likewise.
11099 (uqrshll): Likewise.
11100 (uqrshll_sat48): Likewise.
11102 (uqshll): Likewise.
11104 (urshrl): Likewise.
11107 (__arm_lsll): Define intrinsic.
11108 (__arm_asrl): Likewise.
11109 (__arm_uqrshll): Likewise.
11110 (__arm_uqrshll_sat48): Likewise.
11111 (__arm_sqrshrl): Likewise.
11112 (__arm_sqrshrl_sat48): Likewise.
11113 (__arm_uqshll): Likewise.
11114 (__arm_urshrl): Likewise.
11115 (__arm_srshrl): Likewise.
11116 (__arm_sqshll): Likewise.
11117 (__arm_uqrshl): Likewise.
11118 (__arm_sqrshr): Likewise.
11119 (__arm_uqshl): Likewise.
11120 (__arm_urshr): Likewise.
11121 (__arm_sqshl): Likewise.
11122 (__arm_srshr): Likewise.
11123 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
11125 (UQSHL_QUALIFIERS): Likewise.
11126 (ASRL_QUALIFIERS): Likewise.
11127 (SQSHL_QUALIFIERS): Likewise.
11128 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
11129 (mve_sqrshrl_sat<supf>_di): Likewise.
11130 (mve_uqrshl_si): Likewise.
11131 (mve_sqrshr_si): Likewise.
11132 (mve_uqshll_di): Likewise.
11133 (mve_urshrl_di): Likewise.
11134 (mve_uqshl_si): Likewise.
11135 (mve_urshr_si): Likewise.
11136 (mve_sqshl_si): Likewise.
11137 (mve_srshr_si): Likewise.
11138 (mve_srshrl_di): Likewise.
11139 (mve_sqshll_di): Likewise.
11141 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11142 Andre Vieira <andre.simoesdiasvieira@arm.com>
11143 Mihail Ionescu <mihail.ionescu@arm.com>
11145 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
11146 (vsetq_lane_f32): Likewise.
11147 (vsetq_lane_s16): Likewise.
11148 (vsetq_lane_s32): Likewise.
11149 (vsetq_lane_s8): Likewise.
11150 (vsetq_lane_s64): Likewise.
11151 (vsetq_lane_u8): Likewise.
11152 (vsetq_lane_u16): Likewise.
11153 (vsetq_lane_u32): Likewise.
11154 (vsetq_lane_u64): Likewise.
11155 (vgetq_lane_f16): Likewise.
11156 (vgetq_lane_f32): Likewise.
11157 (vgetq_lane_s16): Likewise.
11158 (vgetq_lane_s32): Likewise.
11159 (vgetq_lane_s8): Likewise.
11160 (vgetq_lane_s64): Likewise.
11161 (vgetq_lane_u8): Likewise.
11162 (vgetq_lane_u16): Likewise.
11163 (vgetq_lane_u32): Likewise.
11164 (vgetq_lane_u64): Likewise.
11165 (__ARM_NUM_LANES): Likewise.
11166 (__ARM_LANEQ): Likewise.
11167 (__ARM_CHECK_LANEQ): Likewise.
11168 (__arm_vsetq_lane_s16): Define intrinsic.
11169 (__arm_vsetq_lane_s32): Likewise.
11170 (__arm_vsetq_lane_s8): Likewise.
11171 (__arm_vsetq_lane_s64): Likewise.
11172 (__arm_vsetq_lane_u8): Likewise.
11173 (__arm_vsetq_lane_u16): Likewise.
11174 (__arm_vsetq_lane_u32): Likewise.
11175 (__arm_vsetq_lane_u64): Likewise.
11176 (__arm_vgetq_lane_s16): Likewise.
11177 (__arm_vgetq_lane_s32): Likewise.
11178 (__arm_vgetq_lane_s8): Likewise.
11179 (__arm_vgetq_lane_s64): Likewise.
11180 (__arm_vgetq_lane_u8): Likewise.
11181 (__arm_vgetq_lane_u16): Likewise.
11182 (__arm_vgetq_lane_u32): Likewise.
11183 (__arm_vgetq_lane_u64): Likewise.
11184 (__arm_vsetq_lane_f16): Likewise.
11185 (__arm_vsetq_lane_f32): Likewise.
11186 (__arm_vgetq_lane_f16): Likewise.
11187 (__arm_vgetq_lane_f32): Likewise.
11188 (vgetq_lane): Define polymorphic variant.
11189 (vsetq_lane): Likewise.
11190 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
11192 (mve_vec_extractv2didi): Likewise.
11193 (mve_vec_extract_sext_internal<mode>): Likewise.
11194 (mve_vec_extract_zext_internal<mode>): Likewise.
11195 (mve_vec_set<mode>_internal): Likewise.
11196 (mve_vec_setv2di_internal): Likewise.
11197 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
11199 (vec_extract<mode><V_elem_l>): Rename to
11200 "neon_vec_extract<mode><V_elem_l>".
11201 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
11202 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
11203 pattern common for MVE and NEON.
11204 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
11207 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
11209 * config/arm/mve.md (earlyclobber_32): New mode attribute.
11210 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
11211 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
11213 2020-03-23 Richard Biener <rguenther@suse.de>
11215 PR tree-optimization/94261
11216 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
11217 IL operand swapping code.
11218 (vect_slp_rearrange_stmts): Do not arrange isomorphic
11219 nodes that would need operation code adjustments.
11221 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
11223 * doc/install.texi (amdgcn-*-amdhsa): Renamed
11224 from amdgcn-unknown-amdhsa; change
11225 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
11227 2020-03-23 Richard Biener <rguenther@suse.de>
11230 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
11231 directly rather than also folding it via build_fold_addr_expr.
11233 2020-03-23 Richard Biener <rguenther@suse.de>
11235 PR tree-optimization/94266
11236 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
11237 addresses of TARGET_MEM_REFs.
11239 2020-03-23 Martin Liska <mliska@suse.cz>
11242 * symtab.c (symtab_node::clone_references): Save speculative_id
11243 as ref may be overwritten by create_reference.
11244 (symtab_node::clone_referring): Likewise.
11245 (symtab_node::clone_reference): Likewise.
11247 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
11249 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
11250 references to Darwin.
11251 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
11252 unconditionally and comment on why.
11254 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
11256 * config/darwin.c (darwin_mergeable_constant_section): Collect
11257 section anchor checks into the caller.
11258 (machopic_select_section): Collect section anchor checks into
11259 the determination of 'effective zero-size' objects. When the
11260 size is unknown, assume it is non-zero, and thus return the
11261 'generic' section for the DECL.
11263 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
11266 * config/darwin.opt: Amend options descriptions.
11268 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
11270 PR rtl-optimization/94052
11271 * lra-constraints.c (simplify_operand_subreg): Reload the inner
11272 register of a paradoxical subreg if simplify_subreg_regno fails
11273 to give a valid hard register for the outer mode.
11275 2020-03-20 Martin Jambor <mjambor@suse.cz>
11277 PR tree-optimization/93435
11278 * params.opt (sra-max-propagations): New parameter.
11279 * tree-sra.c (propagation_budget): New variable.
11280 (budget_for_propagation_access): New function.
11281 (propagate_subaccesses_from_rhs): Use it.
11282 (propagate_subaccesses_from_lhs): Likewise.
11283 (propagate_all_subaccesses): Set up and destroy propagation_budget.
11285 2020-03-20 Carl Love <cel@us.ibm.com>
11288 * config/rs6000/rs6000.c (rs6000_option_override_internal):
11289 Add check for TARGET_FPRND for Power 7 or newer.
11291 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
11294 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
11295 (cgraph_edge::redirect_callee): Move here; likewise.
11296 (cgraph_node::remove_callees): Update calls_comdat_local flag.
11297 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
11299 (cgraph_node::check_calls_comdat_local_p): New member function.
11300 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
11301 (cgraph_edge::redirect_callee): Move offline.
11302 * ipa-fnsummary.c (compute_fn_summary): Do not compute
11303 calls_comdat_local flag here.
11304 * ipa-inline-transform.c (inline_call): Fix updating of
11305 calls_comdat_local flag.
11306 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
11307 * symtab.c (symtab_node::add_to_same_comdat_group): Update
11308 calls_comdat_local flag.
11310 2020-03-20 Richard Biener <rguenther@suse.de>
11312 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
11313 from the possibly modified root.
11315 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11316 Andre Vieira <andre.simoesdiasvieira@arm.com>
11317 Mihail Ionescu <mihail.ionescu@arm.com>
11319 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
11320 (vst1q_p_s8): Likewise.
11321 (vst2q_s8): Likewise.
11322 (vst2q_u8): Likewise.
11323 (vld1q_z_u8): Likewise.
11324 (vld1q_z_s8): Likewise.
11325 (vld2q_s8): Likewise.
11326 (vld2q_u8): Likewise.
11327 (vld4q_s8): Likewise.
11328 (vld4q_u8): Likewise.
11329 (vst1q_p_u16): Likewise.
11330 (vst1q_p_s16): Likewise.
11331 (vst2q_s16): Likewise.
11332 (vst2q_u16): Likewise.
11333 (vld1q_z_u16): Likewise.
11334 (vld1q_z_s16): Likewise.
11335 (vld2q_s16): Likewise.
11336 (vld2q_u16): Likewise.
11337 (vld4q_s16): Likewise.
11338 (vld4q_u16): Likewise.
11339 (vst1q_p_u32): Likewise.
11340 (vst1q_p_s32): Likewise.
11341 (vst2q_s32): Likewise.
11342 (vst2q_u32): Likewise.
11343 (vld1q_z_u32): Likewise.
11344 (vld1q_z_s32): Likewise.
11345 (vld2q_s32): Likewise.
11346 (vld2q_u32): Likewise.
11347 (vld4q_s32): Likewise.
11348 (vld4q_u32): Likewise.
11349 (vld4q_f16): Likewise.
11350 (vld2q_f16): Likewise.
11351 (vld1q_z_f16): Likewise.
11352 (vst2q_f16): Likewise.
11353 (vst1q_p_f16): Likewise.
11354 (vld4q_f32): Likewise.
11355 (vld2q_f32): Likewise.
11356 (vld1q_z_f32): Likewise.
11357 (vst2q_f32): Likewise.
11358 (vst1q_p_f32): Likewise.
11359 (__arm_vst1q_p_u8): Define intrinsic.
11360 (__arm_vst1q_p_s8): Likewise.
11361 (__arm_vst2q_s8): Likewise.
11362 (__arm_vst2q_u8): Likewise.
11363 (__arm_vld1q_z_u8): Likewise.
11364 (__arm_vld1q_z_s8): Likewise.
11365 (__arm_vld2q_s8): Likewise.
11366 (__arm_vld2q_u8): Likewise.
11367 (__arm_vld4q_s8): Likewise.
11368 (__arm_vld4q_u8): Likewise.
11369 (__arm_vst1q_p_u16): Likewise.
11370 (__arm_vst1q_p_s16): Likewise.
11371 (__arm_vst2q_s16): Likewise.
11372 (__arm_vst2q_u16): Likewise.
11373 (__arm_vld1q_z_u16): Likewise.
11374 (__arm_vld1q_z_s16): Likewise.
11375 (__arm_vld2q_s16): Likewise.
11376 (__arm_vld2q_u16): Likewise.
11377 (__arm_vld4q_s16): Likewise.
11378 (__arm_vld4q_u16): Likewise.
11379 (__arm_vst1q_p_u32): Likewise.
11380 (__arm_vst1q_p_s32): Likewise.
11381 (__arm_vst2q_s32): Likewise.
11382 (__arm_vst2q_u32): Likewise.
11383 (__arm_vld1q_z_u32): Likewise.
11384 (__arm_vld1q_z_s32): Likewise.
11385 (__arm_vld2q_s32): Likewise.
11386 (__arm_vld2q_u32): Likewise.
11387 (__arm_vld4q_s32): Likewise.
11388 (__arm_vld4q_u32): Likewise.
11389 (__arm_vld4q_f16): Likewise.
11390 (__arm_vld2q_f16): Likewise.
11391 (__arm_vld1q_z_f16): Likewise.
11392 (__arm_vst2q_f16): Likewise.
11393 (__arm_vst1q_p_f16): Likewise.
11394 (__arm_vld4q_f32): Likewise.
11395 (__arm_vld2q_f32): Likewise.
11396 (__arm_vld1q_z_f32): Likewise.
11397 (__arm_vst2q_f32): Likewise.
11398 (__arm_vst1q_p_f32): Likewise.
11399 (vld1q_z): Define polymorphic variant.
11402 (vst1q_p): Likewise.
11404 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
11406 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
11407 (mve_vld2q<mode>): Likewise.
11408 (mve_vld4q<mode>): Likewise.
11410 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11411 Andre Vieira <andre.simoesdiasvieira@arm.com>
11412 Mihail Ionescu <mihail.ionescu@arm.com>
11414 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
11415 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
11416 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
11417 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
11418 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
11419 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
11420 * config/arm/arm_mve.h (vadciq_s32): Define macro.
11421 (vadciq_u32): Likewise.
11422 (vadciq_m_s32): Likewise.
11423 (vadciq_m_u32): Likewise.
11424 (vadcq_s32): Likewise.
11425 (vadcq_u32): Likewise.
11426 (vadcq_m_s32): Likewise.
11427 (vadcq_m_u32): Likewise.
11428 (vsbciq_s32): Likewise.
11429 (vsbciq_u32): Likewise.
11430 (vsbciq_m_s32): Likewise.
11431 (vsbciq_m_u32): Likewise.
11432 (vsbcq_s32): Likewise.
11433 (vsbcq_u32): Likewise.
11434 (vsbcq_m_s32): Likewise.
11435 (vsbcq_m_u32): Likewise.
11436 (__arm_vadciq_s32): Define intrinsic.
11437 (__arm_vadciq_u32): Likewise.
11438 (__arm_vadciq_m_s32): Likewise.
11439 (__arm_vadciq_m_u32): Likewise.
11440 (__arm_vadcq_s32): Likewise.
11441 (__arm_vadcq_u32): Likewise.
11442 (__arm_vadcq_m_s32): Likewise.
11443 (__arm_vadcq_m_u32): Likewise.
11444 (__arm_vsbciq_s32): Likewise.
11445 (__arm_vsbciq_u32): Likewise.
11446 (__arm_vsbciq_m_s32): Likewise.
11447 (__arm_vsbciq_m_u32): Likewise.
11448 (__arm_vsbcq_s32): Likewise.
11449 (__arm_vsbcq_u32): Likewise.
11450 (__arm_vsbcq_m_s32): Likewise.
11451 (__arm_vsbcq_m_u32): Likewise.
11452 (vadciq_m): Define polymorphic variant.
11453 (vadciq): Likewise.
11454 (vadcq_m): Likewise.
11456 (vsbciq_m): Likewise.
11457 (vsbciq): Likewise.
11458 (vsbcq_m): Likewise.
11460 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
11462 (BINOP_UNONE_UNONE_UNONE): Likewise.
11463 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
11464 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
11465 * config/arm/mve.md (VADCIQ): Define iterator.
11466 (VADCIQ_M): Likewise.
11468 (VSBCQ_M): Likewise.
11469 (VSBCIQ): Likewise.
11470 (VSBCIQ_M): Likewise.
11472 (VADCQ_M): Likewise.
11473 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
11474 (mve_vadciq_<supf>v4si): Likewise.
11475 (mve_vadcq_m_<supf>v4si): Likewise.
11476 (mve_vadcq_<supf>v4si): Likewise.
11477 (mve_vsbciq_m_<supf>v4si): Likewise.
11478 (mve_vsbciq_<supf>v4si): Likewise.
11479 (mve_vsbcq_m_<supf>v4si): Likewise.
11480 (mve_vsbcq_<supf>v4si): Likewise.
11481 (get_fpscr_nzcvqc): Define isns.
11482 (set_fpscr_nzcvqc): Define isns.
11483 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
11484 (UNSPEC_SET_FPSCR_NZCVQC): Define.
11486 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11488 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
11489 (vddupq_x_n_u16): Likewise.
11490 (vddupq_x_n_u32): Likewise.
11491 (vddupq_x_wb_u8): Likewise.
11492 (vddupq_x_wb_u16): Likewise.
11493 (vddupq_x_wb_u32): Likewise.
11494 (vdwdupq_x_n_u8): Likewise.
11495 (vdwdupq_x_n_u16): Likewise.
11496 (vdwdupq_x_n_u32): Likewise.
11497 (vdwdupq_x_wb_u8): Likewise.
11498 (vdwdupq_x_wb_u16): Likewise.
11499 (vdwdupq_x_wb_u32): Likewise.
11500 (vidupq_x_n_u8): Likewise.
11501 (vidupq_x_n_u16): Likewise.
11502 (vidupq_x_n_u32): Likewise.
11503 (vidupq_x_wb_u8): Likewise.
11504 (vidupq_x_wb_u16): Likewise.
11505 (vidupq_x_wb_u32): Likewise.
11506 (viwdupq_x_n_u8): Likewise.
11507 (viwdupq_x_n_u16): Likewise.
11508 (viwdupq_x_n_u32): Likewise.
11509 (viwdupq_x_wb_u8): Likewise.
11510 (viwdupq_x_wb_u16): Likewise.
11511 (viwdupq_x_wb_u32): Likewise.
11512 (vdupq_x_n_s8): Likewise.
11513 (vdupq_x_n_s16): Likewise.
11514 (vdupq_x_n_s32): Likewise.
11515 (vdupq_x_n_u8): Likewise.
11516 (vdupq_x_n_u16): Likewise.
11517 (vdupq_x_n_u32): Likewise.
11518 (vminq_x_s8): Likewise.
11519 (vminq_x_s16): Likewise.
11520 (vminq_x_s32): Likewise.
11521 (vminq_x_u8): Likewise.
11522 (vminq_x_u16): Likewise.
11523 (vminq_x_u32): Likewise.
11524 (vmaxq_x_s8): Likewise.
11525 (vmaxq_x_s16): Likewise.
11526 (vmaxq_x_s32): Likewise.
11527 (vmaxq_x_u8): Likewise.
11528 (vmaxq_x_u16): Likewise.
11529 (vmaxq_x_u32): Likewise.
11530 (vabdq_x_s8): Likewise.
11531 (vabdq_x_s16): Likewise.
11532 (vabdq_x_s32): Likewise.
11533 (vabdq_x_u8): Likewise.
11534 (vabdq_x_u16): Likewise.
11535 (vabdq_x_u32): Likewise.
11536 (vabsq_x_s8): Likewise.
11537 (vabsq_x_s16): Likewise.
11538 (vabsq_x_s32): Likewise.
11539 (vaddq_x_s8): Likewise.
11540 (vaddq_x_s16): Likewise.
11541 (vaddq_x_s32): Likewise.
11542 (vaddq_x_n_s8): Likewise.
11543 (vaddq_x_n_s16): Likewise.
11544 (vaddq_x_n_s32): Likewise.
11545 (vaddq_x_u8): Likewise.
11546 (vaddq_x_u16): Likewise.
11547 (vaddq_x_u32): Likewise.
11548 (vaddq_x_n_u8): Likewise.
11549 (vaddq_x_n_u16): Likewise.
11550 (vaddq_x_n_u32): Likewise.
11551 (vclsq_x_s8): Likewise.
11552 (vclsq_x_s16): Likewise.
11553 (vclsq_x_s32): Likewise.
11554 (vclzq_x_s8): Likewise.
11555 (vclzq_x_s16): Likewise.
11556 (vclzq_x_s32): Likewise.
11557 (vclzq_x_u8): Likewise.
11558 (vclzq_x_u16): Likewise.
11559 (vclzq_x_u32): Likewise.
11560 (vnegq_x_s8): Likewise.
11561 (vnegq_x_s16): Likewise.
11562 (vnegq_x_s32): Likewise.
11563 (vmulhq_x_s8): Likewise.
11564 (vmulhq_x_s16): Likewise.
11565 (vmulhq_x_s32): Likewise.
11566 (vmulhq_x_u8): Likewise.
11567 (vmulhq_x_u16): Likewise.
11568 (vmulhq_x_u32): Likewise.
11569 (vmullbq_poly_x_p8): Likewise.
11570 (vmullbq_poly_x_p16): Likewise.
11571 (vmullbq_int_x_s8): Likewise.
11572 (vmullbq_int_x_s16): Likewise.
11573 (vmullbq_int_x_s32): Likewise.
11574 (vmullbq_int_x_u8): Likewise.
11575 (vmullbq_int_x_u16): Likewise.
11576 (vmullbq_int_x_u32): Likewise.
11577 (vmulltq_poly_x_p8): Likewise.
11578 (vmulltq_poly_x_p16): Likewise.
11579 (vmulltq_int_x_s8): Likewise.
11580 (vmulltq_int_x_s16): Likewise.
11581 (vmulltq_int_x_s32): Likewise.
11582 (vmulltq_int_x_u8): Likewise.
11583 (vmulltq_int_x_u16): Likewise.
11584 (vmulltq_int_x_u32): Likewise.
11585 (vmulq_x_s8): Likewise.
11586 (vmulq_x_s16): Likewise.
11587 (vmulq_x_s32): Likewise.
11588 (vmulq_x_n_s8): Likewise.
11589 (vmulq_x_n_s16): Likewise.
11590 (vmulq_x_n_s32): Likewise.
11591 (vmulq_x_u8): Likewise.
11592 (vmulq_x_u16): Likewise.
11593 (vmulq_x_u32): Likewise.
11594 (vmulq_x_n_u8): Likewise.
11595 (vmulq_x_n_u16): Likewise.
11596 (vmulq_x_n_u32): Likewise.
11597 (vsubq_x_s8): Likewise.
11598 (vsubq_x_s16): Likewise.
11599 (vsubq_x_s32): Likewise.
11600 (vsubq_x_n_s8): Likewise.
11601 (vsubq_x_n_s16): Likewise.
11602 (vsubq_x_n_s32): Likewise.
11603 (vsubq_x_u8): Likewise.
11604 (vsubq_x_u16): Likewise.
11605 (vsubq_x_u32): Likewise.
11606 (vsubq_x_n_u8): Likewise.
11607 (vsubq_x_n_u16): Likewise.
11608 (vsubq_x_n_u32): Likewise.
11609 (vcaddq_rot90_x_s8): Likewise.
11610 (vcaddq_rot90_x_s16): Likewise.
11611 (vcaddq_rot90_x_s32): Likewise.
11612 (vcaddq_rot90_x_u8): Likewise.
11613 (vcaddq_rot90_x_u16): Likewise.
11614 (vcaddq_rot90_x_u32): Likewise.
11615 (vcaddq_rot270_x_s8): Likewise.
11616 (vcaddq_rot270_x_s16): Likewise.
11617 (vcaddq_rot270_x_s32): Likewise.
11618 (vcaddq_rot270_x_u8): Likewise.
11619 (vcaddq_rot270_x_u16): Likewise.
11620 (vcaddq_rot270_x_u32): Likewise.
11621 (vhaddq_x_n_s8): Likewise.
11622 (vhaddq_x_n_s16): Likewise.
11623 (vhaddq_x_n_s32): Likewise.
11624 (vhaddq_x_n_u8): Likewise.
11625 (vhaddq_x_n_u16): Likewise.
11626 (vhaddq_x_n_u32): Likewise.
11627 (vhaddq_x_s8): Likewise.
11628 (vhaddq_x_s16): Likewise.
11629 (vhaddq_x_s32): Likewise.
11630 (vhaddq_x_u8): Likewise.
11631 (vhaddq_x_u16): Likewise.
11632 (vhaddq_x_u32): Likewise.
11633 (vhcaddq_rot90_x_s8): Likewise.
11634 (vhcaddq_rot90_x_s16): Likewise.
11635 (vhcaddq_rot90_x_s32): Likewise.
11636 (vhcaddq_rot270_x_s8): Likewise.
11637 (vhcaddq_rot270_x_s16): Likewise.
11638 (vhcaddq_rot270_x_s32): Likewise.
11639 (vhsubq_x_n_s8): Likewise.
11640 (vhsubq_x_n_s16): Likewise.
11641 (vhsubq_x_n_s32): Likewise.
11642 (vhsubq_x_n_u8): Likewise.
11643 (vhsubq_x_n_u16): Likewise.
11644 (vhsubq_x_n_u32): Likewise.
11645 (vhsubq_x_s8): Likewise.
11646 (vhsubq_x_s16): Likewise.
11647 (vhsubq_x_s32): Likewise.
11648 (vhsubq_x_u8): Likewise.
11649 (vhsubq_x_u16): Likewise.
11650 (vhsubq_x_u32): Likewise.
11651 (vrhaddq_x_s8): Likewise.
11652 (vrhaddq_x_s16): Likewise.
11653 (vrhaddq_x_s32): Likewise.
11654 (vrhaddq_x_u8): Likewise.
11655 (vrhaddq_x_u16): Likewise.
11656 (vrhaddq_x_u32): Likewise.
11657 (vrmulhq_x_s8): Likewise.
11658 (vrmulhq_x_s16): Likewise.
11659 (vrmulhq_x_s32): Likewise.
11660 (vrmulhq_x_u8): Likewise.
11661 (vrmulhq_x_u16): Likewise.
11662 (vrmulhq_x_u32): Likewise.
11663 (vandq_x_s8): Likewise.
11664 (vandq_x_s16): Likewise.
11665 (vandq_x_s32): Likewise.
11666 (vandq_x_u8): Likewise.
11667 (vandq_x_u16): Likewise.
11668 (vandq_x_u32): Likewise.
11669 (vbicq_x_s8): Likewise.
11670 (vbicq_x_s16): Likewise.
11671 (vbicq_x_s32): Likewise.
11672 (vbicq_x_u8): Likewise.
11673 (vbicq_x_u16): Likewise.
11674 (vbicq_x_u32): Likewise.
11675 (vbrsrq_x_n_s8): Likewise.
11676 (vbrsrq_x_n_s16): Likewise.
11677 (vbrsrq_x_n_s32): Likewise.
11678 (vbrsrq_x_n_u8): Likewise.
11679 (vbrsrq_x_n_u16): Likewise.
11680 (vbrsrq_x_n_u32): Likewise.
11681 (veorq_x_s8): Likewise.
11682 (veorq_x_s16): Likewise.
11683 (veorq_x_s32): Likewise.
11684 (veorq_x_u8): Likewise.
11685 (veorq_x_u16): Likewise.
11686 (veorq_x_u32): Likewise.
11687 (vmovlbq_x_s8): Likewise.
11688 (vmovlbq_x_s16): Likewise.
11689 (vmovlbq_x_u8): Likewise.
11690 (vmovlbq_x_u16): Likewise.
11691 (vmovltq_x_s8): Likewise.
11692 (vmovltq_x_s16): Likewise.
11693 (vmovltq_x_u8): Likewise.
11694 (vmovltq_x_u16): Likewise.
11695 (vmvnq_x_s8): Likewise.
11696 (vmvnq_x_s16): Likewise.
11697 (vmvnq_x_s32): Likewise.
11698 (vmvnq_x_u8): Likewise.
11699 (vmvnq_x_u16): Likewise.
11700 (vmvnq_x_u32): Likewise.
11701 (vmvnq_x_n_s16): Likewise.
11702 (vmvnq_x_n_s32): Likewise.
11703 (vmvnq_x_n_u16): Likewise.
11704 (vmvnq_x_n_u32): Likewise.
11705 (vornq_x_s8): Likewise.
11706 (vornq_x_s16): Likewise.
11707 (vornq_x_s32): Likewise.
11708 (vornq_x_u8): Likewise.
11709 (vornq_x_u16): Likewise.
11710 (vornq_x_u32): Likewise.
11711 (vorrq_x_s8): Likewise.
11712 (vorrq_x_s16): Likewise.
11713 (vorrq_x_s32): Likewise.
11714 (vorrq_x_u8): Likewise.
11715 (vorrq_x_u16): Likewise.
11716 (vorrq_x_u32): Likewise.
11717 (vrev16q_x_s8): Likewise.
11718 (vrev16q_x_u8): Likewise.
11719 (vrev32q_x_s8): Likewise.
11720 (vrev32q_x_s16): Likewise.
11721 (vrev32q_x_u8): Likewise.
11722 (vrev32q_x_u16): Likewise.
11723 (vrev64q_x_s8): Likewise.
11724 (vrev64q_x_s16): Likewise.
11725 (vrev64q_x_s32): Likewise.
11726 (vrev64q_x_u8): Likewise.
11727 (vrev64q_x_u16): Likewise.
11728 (vrev64q_x_u32): Likewise.
11729 (vrshlq_x_s8): Likewise.
11730 (vrshlq_x_s16): Likewise.
11731 (vrshlq_x_s32): Likewise.
11732 (vrshlq_x_u8): Likewise.
11733 (vrshlq_x_u16): Likewise.
11734 (vrshlq_x_u32): Likewise.
11735 (vshllbq_x_n_s8): Likewise.
11736 (vshllbq_x_n_s16): Likewise.
11737 (vshllbq_x_n_u8): Likewise.
11738 (vshllbq_x_n_u16): Likewise.
11739 (vshlltq_x_n_s8): Likewise.
11740 (vshlltq_x_n_s16): Likewise.
11741 (vshlltq_x_n_u8): Likewise.
11742 (vshlltq_x_n_u16): Likewise.
11743 (vshlq_x_s8): Likewise.
11744 (vshlq_x_s16): Likewise.
11745 (vshlq_x_s32): Likewise.
11746 (vshlq_x_u8): Likewise.
11747 (vshlq_x_u16): Likewise.
11748 (vshlq_x_u32): Likewise.
11749 (vshlq_x_n_s8): Likewise.
11750 (vshlq_x_n_s16): Likewise.
11751 (vshlq_x_n_s32): Likewise.
11752 (vshlq_x_n_u8): Likewise.
11753 (vshlq_x_n_u16): Likewise.
11754 (vshlq_x_n_u32): Likewise.
11755 (vrshrq_x_n_s8): Likewise.
11756 (vrshrq_x_n_s16): Likewise.
11757 (vrshrq_x_n_s32): Likewise.
11758 (vrshrq_x_n_u8): Likewise.
11759 (vrshrq_x_n_u16): Likewise.
11760 (vrshrq_x_n_u32): Likewise.
11761 (vshrq_x_n_s8): Likewise.
11762 (vshrq_x_n_s16): Likewise.
11763 (vshrq_x_n_s32): Likewise.
11764 (vshrq_x_n_u8): Likewise.
11765 (vshrq_x_n_u16): Likewise.
11766 (vshrq_x_n_u32): Likewise.
11767 (vdupq_x_n_f16): Likewise.
11768 (vdupq_x_n_f32): Likewise.
11769 (vminnmq_x_f16): Likewise.
11770 (vminnmq_x_f32): Likewise.
11771 (vmaxnmq_x_f16): Likewise.
11772 (vmaxnmq_x_f32): Likewise.
11773 (vabdq_x_f16): Likewise.
11774 (vabdq_x_f32): Likewise.
11775 (vabsq_x_f16): Likewise.
11776 (vabsq_x_f32): Likewise.
11777 (vaddq_x_f16): Likewise.
11778 (vaddq_x_f32): Likewise.
11779 (vaddq_x_n_f16): Likewise.
11780 (vaddq_x_n_f32): Likewise.
11781 (vnegq_x_f16): Likewise.
11782 (vnegq_x_f32): Likewise.
11783 (vmulq_x_f16): Likewise.
11784 (vmulq_x_f32): Likewise.
11785 (vmulq_x_n_f16): Likewise.
11786 (vmulq_x_n_f32): Likewise.
11787 (vsubq_x_f16): Likewise.
11788 (vsubq_x_f32): Likewise.
11789 (vsubq_x_n_f16): Likewise.
11790 (vsubq_x_n_f32): Likewise.
11791 (vcaddq_rot90_x_f16): Likewise.
11792 (vcaddq_rot90_x_f32): Likewise.
11793 (vcaddq_rot270_x_f16): Likewise.
11794 (vcaddq_rot270_x_f32): Likewise.
11795 (vcmulq_x_f16): Likewise.
11796 (vcmulq_x_f32): Likewise.
11797 (vcmulq_rot90_x_f16): Likewise.
11798 (vcmulq_rot90_x_f32): Likewise.
11799 (vcmulq_rot180_x_f16): Likewise.
11800 (vcmulq_rot180_x_f32): Likewise.
11801 (vcmulq_rot270_x_f16): Likewise.
11802 (vcmulq_rot270_x_f32): Likewise.
11803 (vcvtaq_x_s16_f16): Likewise.
11804 (vcvtaq_x_s32_f32): Likewise.
11805 (vcvtaq_x_u16_f16): Likewise.
11806 (vcvtaq_x_u32_f32): Likewise.
11807 (vcvtnq_x_s16_f16): Likewise.
11808 (vcvtnq_x_s32_f32): Likewise.
11809 (vcvtnq_x_u16_f16): Likewise.
11810 (vcvtnq_x_u32_f32): Likewise.
11811 (vcvtpq_x_s16_f16): Likewise.
11812 (vcvtpq_x_s32_f32): Likewise.
11813 (vcvtpq_x_u16_f16): Likewise.
11814 (vcvtpq_x_u32_f32): Likewise.
11815 (vcvtmq_x_s16_f16): Likewise.
11816 (vcvtmq_x_s32_f32): Likewise.
11817 (vcvtmq_x_u16_f16): Likewise.
11818 (vcvtmq_x_u32_f32): Likewise.
11819 (vcvtbq_x_f32_f16): Likewise.
11820 (vcvttq_x_f32_f16): Likewise.
11821 (vcvtq_x_f16_u16): Likewise.
11822 (vcvtq_x_f16_s16): Likewise.
11823 (vcvtq_x_f32_s32): Likewise.
11824 (vcvtq_x_f32_u32): Likewise.
11825 (vcvtq_x_n_f16_s16): Likewise.
11826 (vcvtq_x_n_f16_u16): Likewise.
11827 (vcvtq_x_n_f32_s32): Likewise.
11828 (vcvtq_x_n_f32_u32): Likewise.
11829 (vcvtq_x_s16_f16): Likewise.
11830 (vcvtq_x_s32_f32): Likewise.
11831 (vcvtq_x_u16_f16): Likewise.
11832 (vcvtq_x_u32_f32): Likewise.
11833 (vcvtq_x_n_s16_f16): Likewise.
11834 (vcvtq_x_n_s32_f32): Likewise.
11835 (vcvtq_x_n_u16_f16): Likewise.
11836 (vcvtq_x_n_u32_f32): Likewise.
11837 (vrndq_x_f16): Likewise.
11838 (vrndq_x_f32): Likewise.
11839 (vrndnq_x_f16): Likewise.
11840 (vrndnq_x_f32): Likewise.
11841 (vrndmq_x_f16): Likewise.
11842 (vrndmq_x_f32): Likewise.
11843 (vrndpq_x_f16): Likewise.
11844 (vrndpq_x_f32): Likewise.
11845 (vrndaq_x_f16): Likewise.
11846 (vrndaq_x_f32): Likewise.
11847 (vrndxq_x_f16): Likewise.
11848 (vrndxq_x_f32): Likewise.
11849 (vandq_x_f16): Likewise.
11850 (vandq_x_f32): Likewise.
11851 (vbicq_x_f16): Likewise.
11852 (vbicq_x_f32): Likewise.
11853 (vbrsrq_x_n_f16): Likewise.
11854 (vbrsrq_x_n_f32): Likewise.
11855 (veorq_x_f16): Likewise.
11856 (veorq_x_f32): Likewise.
11857 (vornq_x_f16): Likewise.
11858 (vornq_x_f32): Likewise.
11859 (vorrq_x_f16): Likewise.
11860 (vorrq_x_f32): Likewise.
11861 (vrev32q_x_f16): Likewise.
11862 (vrev64q_x_f16): Likewise.
11863 (vrev64q_x_f32): Likewise.
11864 (__arm_vddupq_x_n_u8): Define intrinsic.
11865 (__arm_vddupq_x_n_u16): Likewise.
11866 (__arm_vddupq_x_n_u32): Likewise.
11867 (__arm_vddupq_x_wb_u8): Likewise.
11868 (__arm_vddupq_x_wb_u16): Likewise.
11869 (__arm_vddupq_x_wb_u32): Likewise.
11870 (__arm_vdwdupq_x_n_u8): Likewise.
11871 (__arm_vdwdupq_x_n_u16): Likewise.
11872 (__arm_vdwdupq_x_n_u32): Likewise.
11873 (__arm_vdwdupq_x_wb_u8): Likewise.
11874 (__arm_vdwdupq_x_wb_u16): Likewise.
11875 (__arm_vdwdupq_x_wb_u32): Likewise.
11876 (__arm_vidupq_x_n_u8): Likewise.
11877 (__arm_vidupq_x_n_u16): Likewise.
11878 (__arm_vidupq_x_n_u32): Likewise.
11879 (__arm_vidupq_x_wb_u8): Likewise.
11880 (__arm_vidupq_x_wb_u16): Likewise.
11881 (__arm_vidupq_x_wb_u32): Likewise.
11882 (__arm_viwdupq_x_n_u8): Likewise.
11883 (__arm_viwdupq_x_n_u16): Likewise.
11884 (__arm_viwdupq_x_n_u32): Likewise.
11885 (__arm_viwdupq_x_wb_u8): Likewise.
11886 (__arm_viwdupq_x_wb_u16): Likewise.
11887 (__arm_viwdupq_x_wb_u32): Likewise.
11888 (__arm_vdupq_x_n_s8): Likewise.
11889 (__arm_vdupq_x_n_s16): Likewise.
11890 (__arm_vdupq_x_n_s32): Likewise.
11891 (__arm_vdupq_x_n_u8): Likewise.
11892 (__arm_vdupq_x_n_u16): Likewise.
11893 (__arm_vdupq_x_n_u32): Likewise.
11894 (__arm_vminq_x_s8): Likewise.
11895 (__arm_vminq_x_s16): Likewise.
11896 (__arm_vminq_x_s32): Likewise.
11897 (__arm_vminq_x_u8): Likewise.
11898 (__arm_vminq_x_u16): Likewise.
11899 (__arm_vminq_x_u32): Likewise.
11900 (__arm_vmaxq_x_s8): Likewise.
11901 (__arm_vmaxq_x_s16): Likewise.
11902 (__arm_vmaxq_x_s32): Likewise.
11903 (__arm_vmaxq_x_u8): Likewise.
11904 (__arm_vmaxq_x_u16): Likewise.
11905 (__arm_vmaxq_x_u32): Likewise.
11906 (__arm_vabdq_x_s8): Likewise.
11907 (__arm_vabdq_x_s16): Likewise.
11908 (__arm_vabdq_x_s32): Likewise.
11909 (__arm_vabdq_x_u8): Likewise.
11910 (__arm_vabdq_x_u16): Likewise.
11911 (__arm_vabdq_x_u32): Likewise.
11912 (__arm_vabsq_x_s8): Likewise.
11913 (__arm_vabsq_x_s16): Likewise.
11914 (__arm_vabsq_x_s32): Likewise.
11915 (__arm_vaddq_x_s8): Likewise.
11916 (__arm_vaddq_x_s16): Likewise.
11917 (__arm_vaddq_x_s32): Likewise.
11918 (__arm_vaddq_x_n_s8): Likewise.
11919 (__arm_vaddq_x_n_s16): Likewise.
11920 (__arm_vaddq_x_n_s32): Likewise.
11921 (__arm_vaddq_x_u8): Likewise.
11922 (__arm_vaddq_x_u16): Likewise.
11923 (__arm_vaddq_x_u32): Likewise.
11924 (__arm_vaddq_x_n_u8): Likewise.
11925 (__arm_vaddq_x_n_u16): Likewise.
11926 (__arm_vaddq_x_n_u32): Likewise.
11927 (__arm_vclsq_x_s8): Likewise.
11928 (__arm_vclsq_x_s16): Likewise.
11929 (__arm_vclsq_x_s32): Likewise.
11930 (__arm_vclzq_x_s8): Likewise.
11931 (__arm_vclzq_x_s16): Likewise.
11932 (__arm_vclzq_x_s32): Likewise.
11933 (__arm_vclzq_x_u8): Likewise.
11934 (__arm_vclzq_x_u16): Likewise.
11935 (__arm_vclzq_x_u32): Likewise.
11936 (__arm_vnegq_x_s8): Likewise.
11937 (__arm_vnegq_x_s16): Likewise.
11938 (__arm_vnegq_x_s32): Likewise.
11939 (__arm_vmulhq_x_s8): Likewise.
11940 (__arm_vmulhq_x_s16): Likewise.
11941 (__arm_vmulhq_x_s32): Likewise.
11942 (__arm_vmulhq_x_u8): Likewise.
11943 (__arm_vmulhq_x_u16): Likewise.
11944 (__arm_vmulhq_x_u32): Likewise.
11945 (__arm_vmullbq_poly_x_p8): Likewise.
11946 (__arm_vmullbq_poly_x_p16): Likewise.
11947 (__arm_vmullbq_int_x_s8): Likewise.
11948 (__arm_vmullbq_int_x_s16): Likewise.
11949 (__arm_vmullbq_int_x_s32): Likewise.
11950 (__arm_vmullbq_int_x_u8): Likewise.
11951 (__arm_vmullbq_int_x_u16): Likewise.
11952 (__arm_vmullbq_int_x_u32): Likewise.
11953 (__arm_vmulltq_poly_x_p8): Likewise.
11954 (__arm_vmulltq_poly_x_p16): Likewise.
11955 (__arm_vmulltq_int_x_s8): Likewise.
11956 (__arm_vmulltq_int_x_s16): Likewise.
11957 (__arm_vmulltq_int_x_s32): Likewise.
11958 (__arm_vmulltq_int_x_u8): Likewise.
11959 (__arm_vmulltq_int_x_u16): Likewise.
11960 (__arm_vmulltq_int_x_u32): Likewise.
11961 (__arm_vmulq_x_s8): Likewise.
11962 (__arm_vmulq_x_s16): Likewise.
11963 (__arm_vmulq_x_s32): Likewise.
11964 (__arm_vmulq_x_n_s8): Likewise.
11965 (__arm_vmulq_x_n_s16): Likewise.
11966 (__arm_vmulq_x_n_s32): Likewise.
11967 (__arm_vmulq_x_u8): Likewise.
11968 (__arm_vmulq_x_u16): Likewise.
11969 (__arm_vmulq_x_u32): Likewise.
11970 (__arm_vmulq_x_n_u8): Likewise.
11971 (__arm_vmulq_x_n_u16): Likewise.
11972 (__arm_vmulq_x_n_u32): Likewise.
11973 (__arm_vsubq_x_s8): Likewise.
11974 (__arm_vsubq_x_s16): Likewise.
11975 (__arm_vsubq_x_s32): Likewise.
11976 (__arm_vsubq_x_n_s8): Likewise.
11977 (__arm_vsubq_x_n_s16): Likewise.
11978 (__arm_vsubq_x_n_s32): Likewise.
11979 (__arm_vsubq_x_u8): Likewise.
11980 (__arm_vsubq_x_u16): Likewise.
11981 (__arm_vsubq_x_u32): Likewise.
11982 (__arm_vsubq_x_n_u8): Likewise.
11983 (__arm_vsubq_x_n_u16): Likewise.
11984 (__arm_vsubq_x_n_u32): Likewise.
11985 (__arm_vcaddq_rot90_x_s8): Likewise.
11986 (__arm_vcaddq_rot90_x_s16): Likewise.
11987 (__arm_vcaddq_rot90_x_s32): Likewise.
11988 (__arm_vcaddq_rot90_x_u8): Likewise.
11989 (__arm_vcaddq_rot90_x_u16): Likewise.
11990 (__arm_vcaddq_rot90_x_u32): Likewise.
11991 (__arm_vcaddq_rot270_x_s8): Likewise.
11992 (__arm_vcaddq_rot270_x_s16): Likewise.
11993 (__arm_vcaddq_rot270_x_s32): Likewise.
11994 (__arm_vcaddq_rot270_x_u8): Likewise.
11995 (__arm_vcaddq_rot270_x_u16): Likewise.
11996 (__arm_vcaddq_rot270_x_u32): Likewise.
11997 (__arm_vhaddq_x_n_s8): Likewise.
11998 (__arm_vhaddq_x_n_s16): Likewise.
11999 (__arm_vhaddq_x_n_s32): Likewise.
12000 (__arm_vhaddq_x_n_u8): Likewise.
12001 (__arm_vhaddq_x_n_u16): Likewise.
12002 (__arm_vhaddq_x_n_u32): Likewise.
12003 (__arm_vhaddq_x_s8): Likewise.
12004 (__arm_vhaddq_x_s16): Likewise.
12005 (__arm_vhaddq_x_s32): Likewise.
12006 (__arm_vhaddq_x_u8): Likewise.
12007 (__arm_vhaddq_x_u16): Likewise.
12008 (__arm_vhaddq_x_u32): Likewise.
12009 (__arm_vhcaddq_rot90_x_s8): Likewise.
12010 (__arm_vhcaddq_rot90_x_s16): Likewise.
12011 (__arm_vhcaddq_rot90_x_s32): Likewise.
12012 (__arm_vhcaddq_rot270_x_s8): Likewise.
12013 (__arm_vhcaddq_rot270_x_s16): Likewise.
12014 (__arm_vhcaddq_rot270_x_s32): Likewise.
12015 (__arm_vhsubq_x_n_s8): Likewise.
12016 (__arm_vhsubq_x_n_s16): Likewise.
12017 (__arm_vhsubq_x_n_s32): Likewise.
12018 (__arm_vhsubq_x_n_u8): Likewise.
12019 (__arm_vhsubq_x_n_u16): Likewise.
12020 (__arm_vhsubq_x_n_u32): Likewise.
12021 (__arm_vhsubq_x_s8): Likewise.
12022 (__arm_vhsubq_x_s16): Likewise.
12023 (__arm_vhsubq_x_s32): Likewise.
12024 (__arm_vhsubq_x_u8): Likewise.
12025 (__arm_vhsubq_x_u16): Likewise.
12026 (__arm_vhsubq_x_u32): Likewise.
12027 (__arm_vrhaddq_x_s8): Likewise.
12028 (__arm_vrhaddq_x_s16): Likewise.
12029 (__arm_vrhaddq_x_s32): Likewise.
12030 (__arm_vrhaddq_x_u8): Likewise.
12031 (__arm_vrhaddq_x_u16): Likewise.
12032 (__arm_vrhaddq_x_u32): Likewise.
12033 (__arm_vrmulhq_x_s8): Likewise.
12034 (__arm_vrmulhq_x_s16): Likewise.
12035 (__arm_vrmulhq_x_s32): Likewise.
12036 (__arm_vrmulhq_x_u8): Likewise.
12037 (__arm_vrmulhq_x_u16): Likewise.
12038 (__arm_vrmulhq_x_u32): Likewise.
12039 (__arm_vandq_x_s8): Likewise.
12040 (__arm_vandq_x_s16): Likewise.
12041 (__arm_vandq_x_s32): Likewise.
12042 (__arm_vandq_x_u8): Likewise.
12043 (__arm_vandq_x_u16): Likewise.
12044 (__arm_vandq_x_u32): Likewise.
12045 (__arm_vbicq_x_s8): Likewise.
12046 (__arm_vbicq_x_s16): Likewise.
12047 (__arm_vbicq_x_s32): Likewise.
12048 (__arm_vbicq_x_u8): Likewise.
12049 (__arm_vbicq_x_u16): Likewise.
12050 (__arm_vbicq_x_u32): Likewise.
12051 (__arm_vbrsrq_x_n_s8): Likewise.
12052 (__arm_vbrsrq_x_n_s16): Likewise.
12053 (__arm_vbrsrq_x_n_s32): Likewise.
12054 (__arm_vbrsrq_x_n_u8): Likewise.
12055 (__arm_vbrsrq_x_n_u16): Likewise.
12056 (__arm_vbrsrq_x_n_u32): Likewise.
12057 (__arm_veorq_x_s8): Likewise.
12058 (__arm_veorq_x_s16): Likewise.
12059 (__arm_veorq_x_s32): Likewise.
12060 (__arm_veorq_x_u8): Likewise.
12061 (__arm_veorq_x_u16): Likewise.
12062 (__arm_veorq_x_u32): Likewise.
12063 (__arm_vmovlbq_x_s8): Likewise.
12064 (__arm_vmovlbq_x_s16): Likewise.
12065 (__arm_vmovlbq_x_u8): Likewise.
12066 (__arm_vmovlbq_x_u16): Likewise.
12067 (__arm_vmovltq_x_s8): Likewise.
12068 (__arm_vmovltq_x_s16): Likewise.
12069 (__arm_vmovltq_x_u8): Likewise.
12070 (__arm_vmovltq_x_u16): Likewise.
12071 (__arm_vmvnq_x_s8): Likewise.
12072 (__arm_vmvnq_x_s16): Likewise.
12073 (__arm_vmvnq_x_s32): Likewise.
12074 (__arm_vmvnq_x_u8): Likewise.
12075 (__arm_vmvnq_x_u16): Likewise.
12076 (__arm_vmvnq_x_u32): Likewise.
12077 (__arm_vmvnq_x_n_s16): Likewise.
12078 (__arm_vmvnq_x_n_s32): Likewise.
12079 (__arm_vmvnq_x_n_u16): Likewise.
12080 (__arm_vmvnq_x_n_u32): Likewise.
12081 (__arm_vornq_x_s8): Likewise.
12082 (__arm_vornq_x_s16): Likewise.
12083 (__arm_vornq_x_s32): Likewise.
12084 (__arm_vornq_x_u8): Likewise.
12085 (__arm_vornq_x_u16): Likewise.
12086 (__arm_vornq_x_u32): Likewise.
12087 (__arm_vorrq_x_s8): Likewise.
12088 (__arm_vorrq_x_s16): Likewise.
12089 (__arm_vorrq_x_s32): Likewise.
12090 (__arm_vorrq_x_u8): Likewise.
12091 (__arm_vorrq_x_u16): Likewise.
12092 (__arm_vorrq_x_u32): Likewise.
12093 (__arm_vrev16q_x_s8): Likewise.
12094 (__arm_vrev16q_x_u8): Likewise.
12095 (__arm_vrev32q_x_s8): Likewise.
12096 (__arm_vrev32q_x_s16): Likewise.
12097 (__arm_vrev32q_x_u8): Likewise.
12098 (__arm_vrev32q_x_u16): Likewise.
12099 (__arm_vrev64q_x_s8): Likewise.
12100 (__arm_vrev64q_x_s16): Likewise.
12101 (__arm_vrev64q_x_s32): Likewise.
12102 (__arm_vrev64q_x_u8): Likewise.
12103 (__arm_vrev64q_x_u16): Likewise.
12104 (__arm_vrev64q_x_u32): Likewise.
12105 (__arm_vrshlq_x_s8): Likewise.
12106 (__arm_vrshlq_x_s16): Likewise.
12107 (__arm_vrshlq_x_s32): Likewise.
12108 (__arm_vrshlq_x_u8): Likewise.
12109 (__arm_vrshlq_x_u16): Likewise.
12110 (__arm_vrshlq_x_u32): Likewise.
12111 (__arm_vshllbq_x_n_s8): Likewise.
12112 (__arm_vshllbq_x_n_s16): Likewise.
12113 (__arm_vshllbq_x_n_u8): Likewise.
12114 (__arm_vshllbq_x_n_u16): Likewise.
12115 (__arm_vshlltq_x_n_s8): Likewise.
12116 (__arm_vshlltq_x_n_s16): Likewise.
12117 (__arm_vshlltq_x_n_u8): Likewise.
12118 (__arm_vshlltq_x_n_u16): Likewise.
12119 (__arm_vshlq_x_s8): Likewise.
12120 (__arm_vshlq_x_s16): Likewise.
12121 (__arm_vshlq_x_s32): Likewise.
12122 (__arm_vshlq_x_u8): Likewise.
12123 (__arm_vshlq_x_u16): Likewise.
12124 (__arm_vshlq_x_u32): Likewise.
12125 (__arm_vshlq_x_n_s8): Likewise.
12126 (__arm_vshlq_x_n_s16): Likewise.
12127 (__arm_vshlq_x_n_s32): Likewise.
12128 (__arm_vshlq_x_n_u8): Likewise.
12129 (__arm_vshlq_x_n_u16): Likewise.
12130 (__arm_vshlq_x_n_u32): Likewise.
12131 (__arm_vrshrq_x_n_s8): Likewise.
12132 (__arm_vrshrq_x_n_s16): Likewise.
12133 (__arm_vrshrq_x_n_s32): Likewise.
12134 (__arm_vrshrq_x_n_u8): Likewise.
12135 (__arm_vrshrq_x_n_u16): Likewise.
12136 (__arm_vrshrq_x_n_u32): Likewise.
12137 (__arm_vshrq_x_n_s8): Likewise.
12138 (__arm_vshrq_x_n_s16): Likewise.
12139 (__arm_vshrq_x_n_s32): Likewise.
12140 (__arm_vshrq_x_n_u8): Likewise.
12141 (__arm_vshrq_x_n_u16): Likewise.
12142 (__arm_vshrq_x_n_u32): Likewise.
12143 (__arm_vdupq_x_n_f16): Likewise.
12144 (__arm_vdupq_x_n_f32): Likewise.
12145 (__arm_vminnmq_x_f16): Likewise.
12146 (__arm_vminnmq_x_f32): Likewise.
12147 (__arm_vmaxnmq_x_f16): Likewise.
12148 (__arm_vmaxnmq_x_f32): Likewise.
12149 (__arm_vabdq_x_f16): Likewise.
12150 (__arm_vabdq_x_f32): Likewise.
12151 (__arm_vabsq_x_f16): Likewise.
12152 (__arm_vabsq_x_f32): Likewise.
12153 (__arm_vaddq_x_f16): Likewise.
12154 (__arm_vaddq_x_f32): Likewise.
12155 (__arm_vaddq_x_n_f16): Likewise.
12156 (__arm_vaddq_x_n_f32): Likewise.
12157 (__arm_vnegq_x_f16): Likewise.
12158 (__arm_vnegq_x_f32): Likewise.
12159 (__arm_vmulq_x_f16): Likewise.
12160 (__arm_vmulq_x_f32): Likewise.
12161 (__arm_vmulq_x_n_f16): Likewise.
12162 (__arm_vmulq_x_n_f32): Likewise.
12163 (__arm_vsubq_x_f16): Likewise.
12164 (__arm_vsubq_x_f32): Likewise.
12165 (__arm_vsubq_x_n_f16): Likewise.
12166 (__arm_vsubq_x_n_f32): Likewise.
12167 (__arm_vcaddq_rot90_x_f16): Likewise.
12168 (__arm_vcaddq_rot90_x_f32): Likewise.
12169 (__arm_vcaddq_rot270_x_f16): Likewise.
12170 (__arm_vcaddq_rot270_x_f32): Likewise.
12171 (__arm_vcmulq_x_f16): Likewise.
12172 (__arm_vcmulq_x_f32): Likewise.
12173 (__arm_vcmulq_rot90_x_f16): Likewise.
12174 (__arm_vcmulq_rot90_x_f32): Likewise.
12175 (__arm_vcmulq_rot180_x_f16): Likewise.
12176 (__arm_vcmulq_rot180_x_f32): Likewise.
12177 (__arm_vcmulq_rot270_x_f16): Likewise.
12178 (__arm_vcmulq_rot270_x_f32): Likewise.
12179 (__arm_vcvtaq_x_s16_f16): Likewise.
12180 (__arm_vcvtaq_x_s32_f32): Likewise.
12181 (__arm_vcvtaq_x_u16_f16): Likewise.
12182 (__arm_vcvtaq_x_u32_f32): Likewise.
12183 (__arm_vcvtnq_x_s16_f16): Likewise.
12184 (__arm_vcvtnq_x_s32_f32): Likewise.
12185 (__arm_vcvtnq_x_u16_f16): Likewise.
12186 (__arm_vcvtnq_x_u32_f32): Likewise.
12187 (__arm_vcvtpq_x_s16_f16): Likewise.
12188 (__arm_vcvtpq_x_s32_f32): Likewise.
12189 (__arm_vcvtpq_x_u16_f16): Likewise.
12190 (__arm_vcvtpq_x_u32_f32): Likewise.
12191 (__arm_vcvtmq_x_s16_f16): Likewise.
12192 (__arm_vcvtmq_x_s32_f32): Likewise.
12193 (__arm_vcvtmq_x_u16_f16): Likewise.
12194 (__arm_vcvtmq_x_u32_f32): Likewise.
12195 (__arm_vcvtbq_x_f32_f16): Likewise.
12196 (__arm_vcvttq_x_f32_f16): Likewise.
12197 (__arm_vcvtq_x_f16_u16): Likewise.
12198 (__arm_vcvtq_x_f16_s16): Likewise.
12199 (__arm_vcvtq_x_f32_s32): Likewise.
12200 (__arm_vcvtq_x_f32_u32): Likewise.
12201 (__arm_vcvtq_x_n_f16_s16): Likewise.
12202 (__arm_vcvtq_x_n_f16_u16): Likewise.
12203 (__arm_vcvtq_x_n_f32_s32): Likewise.
12204 (__arm_vcvtq_x_n_f32_u32): Likewise.
12205 (__arm_vcvtq_x_s16_f16): Likewise.
12206 (__arm_vcvtq_x_s32_f32): Likewise.
12207 (__arm_vcvtq_x_u16_f16): Likewise.
12208 (__arm_vcvtq_x_u32_f32): Likewise.
12209 (__arm_vcvtq_x_n_s16_f16): Likewise.
12210 (__arm_vcvtq_x_n_s32_f32): Likewise.
12211 (__arm_vcvtq_x_n_u16_f16): Likewise.
12212 (__arm_vcvtq_x_n_u32_f32): Likewise.
12213 (__arm_vrndq_x_f16): Likewise.
12214 (__arm_vrndq_x_f32): Likewise.
12215 (__arm_vrndnq_x_f16): Likewise.
12216 (__arm_vrndnq_x_f32): Likewise.
12217 (__arm_vrndmq_x_f16): Likewise.
12218 (__arm_vrndmq_x_f32): Likewise.
12219 (__arm_vrndpq_x_f16): Likewise.
12220 (__arm_vrndpq_x_f32): Likewise.
12221 (__arm_vrndaq_x_f16): Likewise.
12222 (__arm_vrndaq_x_f32): Likewise.
12223 (__arm_vrndxq_x_f16): Likewise.
12224 (__arm_vrndxq_x_f32): Likewise.
12225 (__arm_vandq_x_f16): Likewise.
12226 (__arm_vandq_x_f32): Likewise.
12227 (__arm_vbicq_x_f16): Likewise.
12228 (__arm_vbicq_x_f32): Likewise.
12229 (__arm_vbrsrq_x_n_f16): Likewise.
12230 (__arm_vbrsrq_x_n_f32): Likewise.
12231 (__arm_veorq_x_f16): Likewise.
12232 (__arm_veorq_x_f32): Likewise.
12233 (__arm_vornq_x_f16): Likewise.
12234 (__arm_vornq_x_f32): Likewise.
12235 (__arm_vorrq_x_f16): Likewise.
12236 (__arm_vorrq_x_f32): Likewise.
12237 (__arm_vrev32q_x_f16): Likewise.
12238 (__arm_vrev64q_x_f16): Likewise.
12239 (__arm_vrev64q_x_f32): Likewise.
12240 (vabdq_x): Define polymorphic variant.
12241 (vabsq_x): Likewise.
12242 (vaddq_x): Likewise.
12243 (vandq_x): Likewise.
12244 (vbicq_x): Likewise.
12245 (vbrsrq_x): Likewise.
12246 (vcaddq_rot270_x): Likewise.
12247 (vcaddq_rot90_x): Likewise.
12248 (vcmulq_rot180_x): Likewise.
12249 (vcmulq_rot270_x): Likewise.
12250 (vcmulq_x): Likewise.
12251 (vcvtq_x): Likewise.
12252 (vcvtq_x_n): Likewise.
12253 (vcvtnq_m): Likewise.
12254 (veorq_x): Likewise.
12255 (vmaxnmq_x): Likewise.
12256 (vminnmq_x): Likewise.
12257 (vmulq_x): Likewise.
12258 (vnegq_x): Likewise.
12259 (vornq_x): Likewise.
12260 (vorrq_x): Likewise.
12261 (vrev32q_x): Likewise.
12262 (vrev64q_x): Likewise.
12263 (vrndaq_x): Likewise.
12264 (vrndmq_x): Likewise.
12265 (vrndnq_x): Likewise.
12266 (vrndpq_x): Likewise.
12267 (vrndq_x): Likewise.
12268 (vrndxq_x): Likewise.
12269 (vsubq_x): Likewise.
12270 (vcmulq_rot90_x): Likewise.
12271 (vadciq): Likewise.
12272 (vclsq_x): Likewise.
12273 (vclzq_x): Likewise.
12274 (vhaddq_x): Likewise.
12275 (vhcaddq_rot270_x): Likewise.
12276 (vhcaddq_rot90_x): Likewise.
12277 (vhsubq_x): Likewise.
12278 (vmaxq_x): Likewise.
12279 (vminq_x): Likewise.
12280 (vmovlbq_x): Likewise.
12281 (vmovltq_x): Likewise.
12282 (vmulhq_x): Likewise.
12283 (vmullbq_int_x): Likewise.
12284 (vmullbq_poly_x): Likewise.
12285 (vmulltq_int_x): Likewise.
12286 (vmulltq_poly_x): Likewise.
12287 (vmvnq_x): Likewise.
12288 (vrev16q_x): Likewise.
12289 (vrhaddq_x): Likewise.
12290 (vrmulhq_x): Likewise.
12291 (vrshlq_x): Likewise.
12292 (vrshrq_x): Likewise.
12293 (vshllbq_x): Likewise.
12294 (vshlltq_x): Likewise.
12295 (vshlq_x_n): Likewise.
12296 (vshlq_x): Likewise.
12297 (vdwdupq_x_u8): Likewise.
12298 (vdwdupq_x_u16): Likewise.
12299 (vdwdupq_x_u32): Likewise.
12300 (viwdupq_x_u8): Likewise.
12301 (viwdupq_x_u16): Likewise.
12302 (viwdupq_x_u32): Likewise.
12303 (vidupq_x_u8): Likewise.
12304 (vddupq_x_u8): Likewise.
12305 (vidupq_x_u16): Likewise.
12306 (vddupq_x_u16): Likewise.
12307 (vidupq_x_u32): Likewise.
12308 (vddupq_x_u32): Likewise.
12309 (vshrq_x): Likewise.
12311 2020-03-20 Richard Biener <rguenther@suse.de>
12313 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
12314 to vectorize for CTOR defs.
12316 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12317 Andre Vieira <andre.simoesdiasvieira@arm.com>
12318 Mihail Ionescu <mihail.ionescu@arm.com>
12320 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
12322 (LDRGBWBU_QUALIFIERS): Likewise.
12323 (LDRGBWBS_Z_QUALIFIERS): Likewise.
12324 (LDRGBWBU_Z_QUALIFIERS): Likewise.
12325 (STRSBWBS_QUALIFIERS): Likewise.
12326 (STRSBWBU_QUALIFIERS): Likewise.
12327 (STRSBWBS_P_QUALIFIERS): Likewise.
12328 (STRSBWBU_P_QUALIFIERS): Likewise.
12329 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
12330 (vldrdq_gather_base_wb_u64): Likewise.
12331 (vldrdq_gather_base_wb_z_s64): Likewise.
12332 (vldrdq_gather_base_wb_z_u64): Likewise.
12333 (vldrwq_gather_base_wb_f32): Likewise.
12334 (vldrwq_gather_base_wb_s32): Likewise.
12335 (vldrwq_gather_base_wb_u32): Likewise.
12336 (vldrwq_gather_base_wb_z_f32): Likewise.
12337 (vldrwq_gather_base_wb_z_s32): Likewise.
12338 (vldrwq_gather_base_wb_z_u32): Likewise.
12339 (vstrdq_scatter_base_wb_p_s64): Likewise.
12340 (vstrdq_scatter_base_wb_p_u64): Likewise.
12341 (vstrdq_scatter_base_wb_s64): Likewise.
12342 (vstrdq_scatter_base_wb_u64): Likewise.
12343 (vstrwq_scatter_base_wb_p_s32): Likewise.
12344 (vstrwq_scatter_base_wb_p_f32): Likewise.
12345 (vstrwq_scatter_base_wb_p_u32): Likewise.
12346 (vstrwq_scatter_base_wb_s32): Likewise.
12347 (vstrwq_scatter_base_wb_u32): Likewise.
12348 (vstrwq_scatter_base_wb_f32): Likewise.
12349 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
12350 (__arm_vldrdq_gather_base_wb_u64): Likewise.
12351 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
12352 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
12353 (__arm_vldrwq_gather_base_wb_s32): Likewise.
12354 (__arm_vldrwq_gather_base_wb_u32): Likewise.
12355 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
12356 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
12357 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
12358 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
12359 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
12360 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
12361 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
12362 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
12363 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
12364 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
12365 (__arm_vldrwq_gather_base_wb_f32): Likewise.
12366 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
12367 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
12368 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
12369 (vstrwq_scatter_base_wb): Define polymorphic variant.
12370 (vstrwq_scatter_base_wb_p): Likewise.
12371 (vstrdq_scatter_base_wb_p): Likewise.
12372 (vstrdq_scatter_base_wb): Likewise.
12373 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
12375 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
12377 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
12378 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
12379 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
12380 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
12381 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
12382 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
12383 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
12384 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
12385 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
12386 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
12387 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
12388 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
12389 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
12390 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
12391 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
12392 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
12393 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
12394 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
12395 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
12396 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
12397 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
12398 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
12399 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
12400 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
12401 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
12402 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
12403 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
12404 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
12405 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
12407 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12408 Andre Vieira <andre.simoesdiasvieira@arm.com>
12409 Mihail Ionescu <mihail.ionescu@arm.com>
12411 * config/arm/arm-builtins.c
12412 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
12414 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
12415 (vddupq_m_n_u32): Likewise.
12416 (vddupq_m_n_u16): Likewise.
12417 (vddupq_m_wb_u8): Likewise.
12418 (vddupq_m_wb_u16): Likewise.
12419 (vddupq_m_wb_u32): Likewise.
12420 (vddupq_n_u8): Likewise.
12421 (vddupq_n_u32): Likewise.
12422 (vddupq_n_u16): Likewise.
12423 (vddupq_wb_u8): Likewise.
12424 (vddupq_wb_u16): Likewise.
12425 (vddupq_wb_u32): Likewise.
12426 (vdwdupq_m_n_u8): Likewise.
12427 (vdwdupq_m_n_u32): Likewise.
12428 (vdwdupq_m_n_u16): Likewise.
12429 (vdwdupq_m_wb_u8): Likewise.
12430 (vdwdupq_m_wb_u32): Likewise.
12431 (vdwdupq_m_wb_u16): Likewise.
12432 (vdwdupq_n_u8): Likewise.
12433 (vdwdupq_n_u32): Likewise.
12434 (vdwdupq_n_u16): Likewise.
12435 (vdwdupq_wb_u8): Likewise.
12436 (vdwdupq_wb_u32): Likewise.
12437 (vdwdupq_wb_u16): Likewise.
12438 (vidupq_m_n_u8): Likewise.
12439 (vidupq_m_n_u32): Likewise.
12440 (vidupq_m_n_u16): Likewise.
12441 (vidupq_m_wb_u8): Likewise.
12442 (vidupq_m_wb_u16): Likewise.
12443 (vidupq_m_wb_u32): Likewise.
12444 (vidupq_n_u8): Likewise.
12445 (vidupq_n_u32): Likewise.
12446 (vidupq_n_u16): Likewise.
12447 (vidupq_wb_u8): Likewise.
12448 (vidupq_wb_u16): Likewise.
12449 (vidupq_wb_u32): Likewise.
12450 (viwdupq_m_n_u8): Likewise.
12451 (viwdupq_m_n_u32): Likewise.
12452 (viwdupq_m_n_u16): Likewise.
12453 (viwdupq_m_wb_u8): Likewise.
12454 (viwdupq_m_wb_u32): Likewise.
12455 (viwdupq_m_wb_u16): Likewise.
12456 (viwdupq_n_u8): Likewise.
12457 (viwdupq_n_u32): Likewise.
12458 (viwdupq_n_u16): Likewise.
12459 (viwdupq_wb_u8): Likewise.
12460 (viwdupq_wb_u32): Likewise.
12461 (viwdupq_wb_u16): Likewise.
12462 (__arm_vddupq_m_n_u8): Define intrinsic.
12463 (__arm_vddupq_m_n_u32): Likewise.
12464 (__arm_vddupq_m_n_u16): Likewise.
12465 (__arm_vddupq_m_wb_u8): Likewise.
12466 (__arm_vddupq_m_wb_u16): Likewise.
12467 (__arm_vddupq_m_wb_u32): Likewise.
12468 (__arm_vddupq_n_u8): Likewise.
12469 (__arm_vddupq_n_u32): Likewise.
12470 (__arm_vddupq_n_u16): Likewise.
12471 (__arm_vdwdupq_m_n_u8): Likewise.
12472 (__arm_vdwdupq_m_n_u32): Likewise.
12473 (__arm_vdwdupq_m_n_u16): Likewise.
12474 (__arm_vdwdupq_m_wb_u8): Likewise.
12475 (__arm_vdwdupq_m_wb_u32): Likewise.
12476 (__arm_vdwdupq_m_wb_u16): Likewise.
12477 (__arm_vdwdupq_n_u8): Likewise.
12478 (__arm_vdwdupq_n_u32): Likewise.
12479 (__arm_vdwdupq_n_u16): Likewise.
12480 (__arm_vdwdupq_wb_u8): Likewise.
12481 (__arm_vdwdupq_wb_u32): Likewise.
12482 (__arm_vdwdupq_wb_u16): Likewise.
12483 (__arm_vidupq_m_n_u8): Likewise.
12484 (__arm_vidupq_m_n_u32): Likewise.
12485 (__arm_vidupq_m_n_u16): Likewise.
12486 (__arm_vidupq_n_u8): Likewise.
12487 (__arm_vidupq_m_wb_u8): Likewise.
12488 (__arm_vidupq_m_wb_u16): Likewise.
12489 (__arm_vidupq_m_wb_u32): Likewise.
12490 (__arm_vidupq_n_u32): Likewise.
12491 (__arm_vidupq_n_u16): Likewise.
12492 (__arm_vidupq_wb_u8): Likewise.
12493 (__arm_vidupq_wb_u16): Likewise.
12494 (__arm_vidupq_wb_u32): Likewise.
12495 (__arm_vddupq_wb_u8): Likewise.
12496 (__arm_vddupq_wb_u16): Likewise.
12497 (__arm_vddupq_wb_u32): Likewise.
12498 (__arm_viwdupq_m_n_u8): Likewise.
12499 (__arm_viwdupq_m_n_u32): Likewise.
12500 (__arm_viwdupq_m_n_u16): Likewise.
12501 (__arm_viwdupq_m_wb_u8): Likewise.
12502 (__arm_viwdupq_m_wb_u32): Likewise.
12503 (__arm_viwdupq_m_wb_u16): Likewise.
12504 (__arm_viwdupq_n_u8): Likewise.
12505 (__arm_viwdupq_n_u32): Likewise.
12506 (__arm_viwdupq_n_u16): Likewise.
12507 (__arm_viwdupq_wb_u8): Likewise.
12508 (__arm_viwdupq_wb_u32): Likewise.
12509 (__arm_viwdupq_wb_u16): Likewise.
12510 (vidupq_m): Define polymorphic variant.
12511 (vddupq_m): Likewise.
12512 (vidupq_u16): Likewise.
12513 (vidupq_u32): Likewise.
12514 (vidupq_u8): Likewise.
12515 (vddupq_u16): Likewise.
12516 (vddupq_u32): Likewise.
12517 (vddupq_u8): Likewise.
12518 (viwdupq_m): Likewise.
12519 (viwdupq_u16): Likewise.
12520 (viwdupq_u32): Likewise.
12521 (viwdupq_u8): Likewise.
12522 (vdwdupq_m): Likewise.
12523 (vdwdupq_u16): Likewise.
12524 (vdwdupq_u32): Likewise.
12525 (vdwdupq_u8): Likewise.
12526 * config/arm/arm_mve_builtins.def
12527 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
12529 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
12530 (mve_vidupq_u<mode>_insn): Likewise.
12531 (mve_vidupq_m_n_u<mode>): Likewise.
12532 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
12533 (mve_vddupq_n_u<mode>): Likewise.
12534 (mve_vddupq_u<mode>_insn): Likewise.
12535 (mve_vddupq_m_n_u<mode>): Likewise.
12536 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
12537 (mve_vdwdupq_n_u<mode>): Likewise.
12538 (mve_vdwdupq_wb_u<mode>): Likewise.
12539 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
12540 (mve_vdwdupq_m_n_u<mode>): Likewise.
12541 (mve_vdwdupq_m_wb_u<mode>): Likewise.
12542 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
12543 (mve_viwdupq_n_u<mode>): Likewise.
12544 (mve_viwdupq_wb_u<mode>): Likewise.
12545 (mve_viwdupq_wb_u<mode>_insn): Likewise.
12546 (mve_viwdupq_m_n_u<mode>): Likewise.
12547 (mve_viwdupq_m_wb_u<mode>): Likewise.
12548 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
12550 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12552 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
12553 (vreinterpretq_s16_s64): Likewise.
12554 (vreinterpretq_s16_s8): Likewise.
12555 (vreinterpretq_s16_u16): Likewise.
12556 (vreinterpretq_s16_u32): Likewise.
12557 (vreinterpretq_s16_u64): Likewise.
12558 (vreinterpretq_s16_u8): Likewise.
12559 (vreinterpretq_s32_s16): Likewise.
12560 (vreinterpretq_s32_s64): Likewise.
12561 (vreinterpretq_s32_s8): Likewise.
12562 (vreinterpretq_s32_u16): Likewise.
12563 (vreinterpretq_s32_u32): Likewise.
12564 (vreinterpretq_s32_u64): Likewise.
12565 (vreinterpretq_s32_u8): Likewise.
12566 (vreinterpretq_s64_s16): Likewise.
12567 (vreinterpretq_s64_s32): Likewise.
12568 (vreinterpretq_s64_s8): Likewise.
12569 (vreinterpretq_s64_u16): Likewise.
12570 (vreinterpretq_s64_u32): Likewise.
12571 (vreinterpretq_s64_u64): Likewise.
12572 (vreinterpretq_s64_u8): Likewise.
12573 (vreinterpretq_s8_s16): Likewise.
12574 (vreinterpretq_s8_s32): Likewise.
12575 (vreinterpretq_s8_s64): Likewise.
12576 (vreinterpretq_s8_u16): Likewise.
12577 (vreinterpretq_s8_u32): Likewise.
12578 (vreinterpretq_s8_u64): Likewise.
12579 (vreinterpretq_s8_u8): Likewise.
12580 (vreinterpretq_u16_s16): Likewise.
12581 (vreinterpretq_u16_s32): Likewise.
12582 (vreinterpretq_u16_s64): Likewise.
12583 (vreinterpretq_u16_s8): Likewise.
12584 (vreinterpretq_u16_u32): Likewise.
12585 (vreinterpretq_u16_u64): Likewise.
12586 (vreinterpretq_u16_u8): Likewise.
12587 (vreinterpretq_u32_s16): Likewise.
12588 (vreinterpretq_u32_s32): Likewise.
12589 (vreinterpretq_u32_s64): Likewise.
12590 (vreinterpretq_u32_s8): Likewise.
12591 (vreinterpretq_u32_u16): Likewise.
12592 (vreinterpretq_u32_u64): Likewise.
12593 (vreinterpretq_u32_u8): Likewise.
12594 (vreinterpretq_u64_s16): Likewise.
12595 (vreinterpretq_u64_s32): Likewise.
12596 (vreinterpretq_u64_s64): Likewise.
12597 (vreinterpretq_u64_s8): Likewise.
12598 (vreinterpretq_u64_u16): Likewise.
12599 (vreinterpretq_u64_u32): Likewise.
12600 (vreinterpretq_u64_u8): Likewise.
12601 (vreinterpretq_u8_s16): Likewise.
12602 (vreinterpretq_u8_s32): Likewise.
12603 (vreinterpretq_u8_s64): Likewise.
12604 (vreinterpretq_u8_s8): Likewise.
12605 (vreinterpretq_u8_u16): Likewise.
12606 (vreinterpretq_u8_u32): Likewise.
12607 (vreinterpretq_u8_u64): Likewise.
12608 (vreinterpretq_s32_f16): Likewise.
12609 (vreinterpretq_s32_f32): Likewise.
12610 (vreinterpretq_u16_f16): Likewise.
12611 (vreinterpretq_u16_f32): Likewise.
12612 (vreinterpretq_u32_f16): Likewise.
12613 (vreinterpretq_u32_f32): Likewise.
12614 (vreinterpretq_u64_f16): Likewise.
12615 (vreinterpretq_u64_f32): Likewise.
12616 (vreinterpretq_u8_f16): Likewise.
12617 (vreinterpretq_u8_f32): Likewise.
12618 (vreinterpretq_f16_f32): Likewise.
12619 (vreinterpretq_f16_s16): Likewise.
12620 (vreinterpretq_f16_s32): Likewise.
12621 (vreinterpretq_f16_s64): Likewise.
12622 (vreinterpretq_f16_s8): Likewise.
12623 (vreinterpretq_f16_u16): Likewise.
12624 (vreinterpretq_f16_u32): Likewise.
12625 (vreinterpretq_f16_u64): Likewise.
12626 (vreinterpretq_f16_u8): Likewise.
12627 (vreinterpretq_f32_f16): Likewise.
12628 (vreinterpretq_f32_s16): Likewise.
12629 (vreinterpretq_f32_s32): Likewise.
12630 (vreinterpretq_f32_s64): Likewise.
12631 (vreinterpretq_f32_s8): Likewise.
12632 (vreinterpretq_f32_u16): Likewise.
12633 (vreinterpretq_f32_u32): Likewise.
12634 (vreinterpretq_f32_u64): Likewise.
12635 (vreinterpretq_f32_u8): Likewise.
12636 (vreinterpretq_s16_f16): Likewise.
12637 (vreinterpretq_s16_f32): Likewise.
12638 (vreinterpretq_s64_f16): Likewise.
12639 (vreinterpretq_s64_f32): Likewise.
12640 (vreinterpretq_s8_f16): Likewise.
12641 (vreinterpretq_s8_f32): Likewise.
12642 (vuninitializedq_u8): Likewise.
12643 (vuninitializedq_u16): Likewise.
12644 (vuninitializedq_u32): Likewise.
12645 (vuninitializedq_u64): Likewise.
12646 (vuninitializedq_s8): Likewise.
12647 (vuninitializedq_s16): Likewise.
12648 (vuninitializedq_s32): Likewise.
12649 (vuninitializedq_s64): Likewise.
12650 (vuninitializedq_f16): Likewise.
12651 (vuninitializedq_f32): Likewise.
12652 (__arm_vuninitializedq_u8): Define intrinsic.
12653 (__arm_vuninitializedq_u16): Likewise.
12654 (__arm_vuninitializedq_u32): Likewise.
12655 (__arm_vuninitializedq_u64): Likewise.
12656 (__arm_vuninitializedq_s8): Likewise.
12657 (__arm_vuninitializedq_s16): Likewise.
12658 (__arm_vuninitializedq_s32): Likewise.
12659 (__arm_vuninitializedq_s64): Likewise.
12660 (__arm_vreinterpretq_s16_s32): Likewise.
12661 (__arm_vreinterpretq_s16_s64): Likewise.
12662 (__arm_vreinterpretq_s16_s8): Likewise.
12663 (__arm_vreinterpretq_s16_u16): Likewise.
12664 (__arm_vreinterpretq_s16_u32): Likewise.
12665 (__arm_vreinterpretq_s16_u64): Likewise.
12666 (__arm_vreinterpretq_s16_u8): Likewise.
12667 (__arm_vreinterpretq_s32_s16): Likewise.
12668 (__arm_vreinterpretq_s32_s64): Likewise.
12669 (__arm_vreinterpretq_s32_s8): Likewise.
12670 (__arm_vreinterpretq_s32_u16): Likewise.
12671 (__arm_vreinterpretq_s32_u32): Likewise.
12672 (__arm_vreinterpretq_s32_u64): Likewise.
12673 (__arm_vreinterpretq_s32_u8): Likewise.
12674 (__arm_vreinterpretq_s64_s16): Likewise.
12675 (__arm_vreinterpretq_s64_s32): Likewise.
12676 (__arm_vreinterpretq_s64_s8): Likewise.
12677 (__arm_vreinterpretq_s64_u16): Likewise.
12678 (__arm_vreinterpretq_s64_u32): Likewise.
12679 (__arm_vreinterpretq_s64_u64): Likewise.
12680 (__arm_vreinterpretq_s64_u8): Likewise.
12681 (__arm_vreinterpretq_s8_s16): Likewise.
12682 (__arm_vreinterpretq_s8_s32): Likewise.
12683 (__arm_vreinterpretq_s8_s64): Likewise.
12684 (__arm_vreinterpretq_s8_u16): Likewise.
12685 (__arm_vreinterpretq_s8_u32): Likewise.
12686 (__arm_vreinterpretq_s8_u64): Likewise.
12687 (__arm_vreinterpretq_s8_u8): Likewise.
12688 (__arm_vreinterpretq_u16_s16): Likewise.
12689 (__arm_vreinterpretq_u16_s32): Likewise.
12690 (__arm_vreinterpretq_u16_s64): Likewise.
12691 (__arm_vreinterpretq_u16_s8): Likewise.
12692 (__arm_vreinterpretq_u16_u32): Likewise.
12693 (__arm_vreinterpretq_u16_u64): Likewise.
12694 (__arm_vreinterpretq_u16_u8): Likewise.
12695 (__arm_vreinterpretq_u32_s16): Likewise.
12696 (__arm_vreinterpretq_u32_s32): Likewise.
12697 (__arm_vreinterpretq_u32_s64): Likewise.
12698 (__arm_vreinterpretq_u32_s8): Likewise.
12699 (__arm_vreinterpretq_u32_u16): Likewise.
12700 (__arm_vreinterpretq_u32_u64): Likewise.
12701 (__arm_vreinterpretq_u32_u8): Likewise.
12702 (__arm_vreinterpretq_u64_s16): Likewise.
12703 (__arm_vreinterpretq_u64_s32): Likewise.
12704 (__arm_vreinterpretq_u64_s64): Likewise.
12705 (__arm_vreinterpretq_u64_s8): Likewise.
12706 (__arm_vreinterpretq_u64_u16): Likewise.
12707 (__arm_vreinterpretq_u64_u32): Likewise.
12708 (__arm_vreinterpretq_u64_u8): Likewise.
12709 (__arm_vreinterpretq_u8_s16): Likewise.
12710 (__arm_vreinterpretq_u8_s32): Likewise.
12711 (__arm_vreinterpretq_u8_s64): Likewise.
12712 (__arm_vreinterpretq_u8_s8): Likewise.
12713 (__arm_vreinterpretq_u8_u16): Likewise.
12714 (__arm_vreinterpretq_u8_u32): Likewise.
12715 (__arm_vreinterpretq_u8_u64): Likewise.
12716 (__arm_vuninitializedq_f16): Likewise.
12717 (__arm_vuninitializedq_f32): Likewise.
12718 (__arm_vreinterpretq_s32_f16): Likewise.
12719 (__arm_vreinterpretq_s32_f32): Likewise.
12720 (__arm_vreinterpretq_s16_f16): Likewise.
12721 (__arm_vreinterpretq_s16_f32): Likewise.
12722 (__arm_vreinterpretq_s64_f16): Likewise.
12723 (__arm_vreinterpretq_s64_f32): Likewise.
12724 (__arm_vreinterpretq_s8_f16): Likewise.
12725 (__arm_vreinterpretq_s8_f32): Likewise.
12726 (__arm_vreinterpretq_u16_f16): Likewise.
12727 (__arm_vreinterpretq_u16_f32): Likewise.
12728 (__arm_vreinterpretq_u32_f16): Likewise.
12729 (__arm_vreinterpretq_u32_f32): Likewise.
12730 (__arm_vreinterpretq_u64_f16): Likewise.
12731 (__arm_vreinterpretq_u64_f32): Likewise.
12732 (__arm_vreinterpretq_u8_f16): Likewise.
12733 (__arm_vreinterpretq_u8_f32): Likewise.
12734 (__arm_vreinterpretq_f16_f32): Likewise.
12735 (__arm_vreinterpretq_f16_s16): Likewise.
12736 (__arm_vreinterpretq_f16_s32): Likewise.
12737 (__arm_vreinterpretq_f16_s64): Likewise.
12738 (__arm_vreinterpretq_f16_s8): Likewise.
12739 (__arm_vreinterpretq_f16_u16): Likewise.
12740 (__arm_vreinterpretq_f16_u32): Likewise.
12741 (__arm_vreinterpretq_f16_u64): Likewise.
12742 (__arm_vreinterpretq_f16_u8): Likewise.
12743 (__arm_vreinterpretq_f32_f16): Likewise.
12744 (__arm_vreinterpretq_f32_s16): Likewise.
12745 (__arm_vreinterpretq_f32_s32): Likewise.
12746 (__arm_vreinterpretq_f32_s64): Likewise.
12747 (__arm_vreinterpretq_f32_s8): Likewise.
12748 (__arm_vreinterpretq_f32_u16): Likewise.
12749 (__arm_vreinterpretq_f32_u32): Likewise.
12750 (__arm_vreinterpretq_f32_u64): Likewise.
12751 (__arm_vreinterpretq_f32_u8): Likewise.
12752 (vuninitializedq): Define polymorphic variant.
12753 (vreinterpretq_f16): Likewise.
12754 (vreinterpretq_f32): Likewise.
12755 (vreinterpretq_s16): Likewise.
12756 (vreinterpretq_s32): Likewise.
12757 (vreinterpretq_s64): Likewise.
12758 (vreinterpretq_s8): Likewise.
12759 (vreinterpretq_u16): Likewise.
12760 (vreinterpretq_u32): Likewise.
12761 (vreinterpretq_u64): Likewise.
12762 (vreinterpretq_u8): Likewise.
12764 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12765 Andre Vieira <andre.simoesdiasvieira@arm.com>
12766 Mihail Ionescu <mihail.ionescu@arm.com>
12768 * config/arm/arm_mve.h (vaddq_s8): Define macro.
12769 (vaddq_s16): Likewise.
12770 (vaddq_s32): Likewise.
12771 (vaddq_u8): Likewise.
12772 (vaddq_u16): Likewise.
12773 (vaddq_u32): Likewise.
12774 (vaddq_f16): Likewise.
12775 (vaddq_f32): Likewise.
12776 (__arm_vaddq_s8): Define intrinsic.
12777 (__arm_vaddq_s16): Likewise.
12778 (__arm_vaddq_s32): Likewise.
12779 (__arm_vaddq_u8): Likewise.
12780 (__arm_vaddq_u16): Likewise.
12781 (__arm_vaddq_u32): Likewise.
12782 (__arm_vaddq_f16): Likewise.
12783 (__arm_vaddq_f32): Likewise.
12784 (vaddq): Define polymorphic variant.
12785 * config/arm/iterators.md (VNIM): Define mode iterator for common types
12786 Neon, IWMMXT and MVE.
12787 (VNINOTM): Likewise.
12788 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
12789 (mve_vaddq_f<mode>): Define RTL pattern.
12790 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
12791 (addv8hf3_neon): Define RTL pattern.
12792 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
12794 (addv8hf3): Define standard RTL pattern for MVE and Neon.
12795 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
12797 2020-03-20 Martin Liska <mliska@suse.cz>
12800 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
12801 build_ref_for_offset function was used and it transforms off to bytes
12804 2020-03-20 Richard Biener <rguenther@suse.de>
12806 PR tree-optimization/94266
12807 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
12808 type of the underlying object to adjust for the containing
12809 field if available.
12811 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12813 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
12814 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
12815 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
12817 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12819 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
12821 2020-03-20 Jakub Jelinek <jakub@redhat.com>
12823 PR tree-optimization/94224
12824 * gimple-ssa-store-merging.c
12825 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
12826 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
12829 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
12831 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
12833 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
12836 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
12837 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
12839 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
12842 * cgraphunit.c (process_function_and_variable_attributes): warn
12843 for flatten attribute on alias.
12844 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
12846 2020-03-19 Martin Liska <mliska@suse.cz>
12848 * lto-section-in.c: Add ext_symtab.
12849 * lto-streamer-out.c (write_symbol_extension_info): New.
12850 (produce_symtab_extension): New.
12851 (produce_asm_for_decls): Stream also produce_symtab_extension.
12852 * lto-streamer.h (enum lto_section_type): New section.
12854 2020-03-19 Jakub Jelinek <jakub@redhat.com>
12856 PR tree-optimization/94211
12857 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
12858 instead of estimate_num_insns for bb_seq (middle_bb). Rename
12859 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
12862 2020-03-19 Richard Biener <rguenther@suse.de>
12865 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
12866 and build_ref_for_offset.
12868 2020-03-19 Richard Biener <rguenther@suse.de>
12870 PR middle-end/94216
12871 * fold-const.c (fold_binary_loc): Avoid using
12872 build_fold_addr_expr when we really want an ADDR_EXPR.
12874 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
12876 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
12879 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
12881 PR rtl-optimization/90275
12882 * cse.c (cse_insn): Delete no-op register moves too.
12884 2020-03-18 Martin Sebor <msebor@redhat.com>
12887 * cgraphunit.c (process_function_and_variable_attributes): Also
12888 complain about weakref function definitions and drop all effects
12891 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12892 Mihail Ionescu <mihail.ionescu@arm.com>
12893 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12895 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
12896 (vstrdq_scatter_base_p_u64): Likewise.
12897 (vstrdq_scatter_base_s64): Likewise.
12898 (vstrdq_scatter_base_u64): Likewise.
12899 (vstrdq_scatter_offset_p_s64): Likewise.
12900 (vstrdq_scatter_offset_p_u64): Likewise.
12901 (vstrdq_scatter_offset_s64): Likewise.
12902 (vstrdq_scatter_offset_u64): Likewise.
12903 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
12904 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
12905 (vstrdq_scatter_shifted_offset_s64): Likewise.
12906 (vstrdq_scatter_shifted_offset_u64): Likewise.
12907 (vstrhq_scatter_offset_f16): Likewise.
12908 (vstrhq_scatter_offset_p_f16): Likewise.
12909 (vstrhq_scatter_shifted_offset_f16): Likewise.
12910 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
12911 (vstrwq_scatter_base_f32): Likewise.
12912 (vstrwq_scatter_base_p_f32): Likewise.
12913 (vstrwq_scatter_offset_f32): Likewise.
12914 (vstrwq_scatter_offset_p_f32): Likewise.
12915 (vstrwq_scatter_offset_p_s32): Likewise.
12916 (vstrwq_scatter_offset_p_u32): Likewise.
12917 (vstrwq_scatter_offset_s32): Likewise.
12918 (vstrwq_scatter_offset_u32): Likewise.
12919 (vstrwq_scatter_shifted_offset_f32): Likewise.
12920 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
12921 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
12922 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
12923 (vstrwq_scatter_shifted_offset_s32): Likewise.
12924 (vstrwq_scatter_shifted_offset_u32): Likewise.
12925 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
12926 (__arm_vstrdq_scatter_base_p_u64): Likewise.
12927 (__arm_vstrdq_scatter_base_s64): Likewise.
12928 (__arm_vstrdq_scatter_base_u64): Likewise.
12929 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
12930 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
12931 (__arm_vstrdq_scatter_offset_s64): Likewise.
12932 (__arm_vstrdq_scatter_offset_u64): Likewise.
12933 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
12934 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
12935 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
12936 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
12937 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
12938 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
12939 (__arm_vstrwq_scatter_offset_s32): Likewise.
12940 (__arm_vstrwq_scatter_offset_u32): Likewise.
12941 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
12942 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
12943 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
12944 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
12945 (__arm_vstrhq_scatter_offset_f16): Likewise.
12946 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
12947 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
12948 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
12949 (__arm_vstrwq_scatter_base_f32): Likewise.
12950 (__arm_vstrwq_scatter_base_p_f32): Likewise.
12951 (__arm_vstrwq_scatter_offset_f32): Likewise.
12952 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
12953 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
12954 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
12955 (vstrhq_scatter_offset): Define polymorphic variant.
12956 (vstrhq_scatter_offset_p): Likewise.
12957 (vstrhq_scatter_shifted_offset): Likewise.
12958 (vstrhq_scatter_shifted_offset_p): Likewise.
12959 (vstrwq_scatter_base): Likewise.
12960 (vstrwq_scatter_base_p): Likewise.
12961 (vstrwq_scatter_offset): Likewise.
12962 (vstrwq_scatter_offset_p): Likewise.
12963 (vstrwq_scatter_shifted_offset): Likewise.
12964 (vstrwq_scatter_shifted_offset_p): Likewise.
12965 (vstrdq_scatter_base_p): Likewise.
12966 (vstrdq_scatter_base): Likewise.
12967 (vstrdq_scatter_offset_p): Likewise.
12968 (vstrdq_scatter_offset): Likewise.
12969 (vstrdq_scatter_shifted_offset_p): Likewise.
12970 (vstrdq_scatter_shifted_offset): Likewise.
12971 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
12972 (STRSBS_P): Likewise.
12973 (STRSBU): Likewise.
12974 (STRSBU_P): Likewise.
12976 (STRSS_P): Likewise.
12978 (STRSU_P): Likewise.
12979 * config/arm/constraints.md (Ri): Define.
12980 * config/arm/mve.md (VSTRDSBQ): Define iterator.
12981 (VSTRDSOQ): Likewise.
12982 (VSTRDSSOQ): Likewise.
12983 (VSTRWSOQ): Likewise.
12984 (VSTRWSSOQ): Likewise.
12985 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
12986 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
12987 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
12988 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
12989 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
12990 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
12991 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
12992 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
12993 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
12994 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
12995 (mve_vstrwq_scatter_base_fv4sf): Likewise.
12996 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
12997 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
12998 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
12999 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
13000 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
13001 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
13002 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
13003 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
13004 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
13005 * config/arm/predicates.md (Ri): Define predicate to check immediate
13006 is the range +/-1016 and multiple of 8.
13008 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13009 Mihail Ionescu <mihail.ionescu@arm.com>
13010 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13012 * config/arm/arm_mve.h (vst1q_f32): Define macro.
13013 (vst1q_f16): Likewise.
13014 (vst1q_s8): Likewise.
13015 (vst1q_s32): Likewise.
13016 (vst1q_s16): Likewise.
13017 (vst1q_u8): Likewise.
13018 (vst1q_u32): Likewise.
13019 (vst1q_u16): Likewise.
13020 (vstrhq_f16): Likewise.
13021 (vstrhq_scatter_offset_s32): Likewise.
13022 (vstrhq_scatter_offset_s16): Likewise.
13023 (vstrhq_scatter_offset_u32): Likewise.
13024 (vstrhq_scatter_offset_u16): Likewise.
13025 (vstrhq_scatter_offset_p_s32): Likewise.
13026 (vstrhq_scatter_offset_p_s16): Likewise.
13027 (vstrhq_scatter_offset_p_u32): Likewise.
13028 (vstrhq_scatter_offset_p_u16): Likewise.
13029 (vstrhq_scatter_shifted_offset_s32): Likewise.
13030 (vstrhq_scatter_shifted_offset_s16): Likewise.
13031 (vstrhq_scatter_shifted_offset_u32): Likewise.
13032 (vstrhq_scatter_shifted_offset_u16): Likewise.
13033 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
13034 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
13035 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
13036 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
13037 (vstrhq_s32): Likewise.
13038 (vstrhq_s16): Likewise.
13039 (vstrhq_u32): Likewise.
13040 (vstrhq_u16): Likewise.
13041 (vstrhq_p_f16): Likewise.
13042 (vstrhq_p_s32): Likewise.
13043 (vstrhq_p_s16): Likewise.
13044 (vstrhq_p_u32): Likewise.
13045 (vstrhq_p_u16): Likewise.
13046 (vstrwq_f32): Likewise.
13047 (vstrwq_s32): Likewise.
13048 (vstrwq_u32): Likewise.
13049 (vstrwq_p_f32): Likewise.
13050 (vstrwq_p_s32): Likewise.
13051 (vstrwq_p_u32): Likewise.
13052 (__arm_vst1q_s8): Define intrinsic.
13053 (__arm_vst1q_s32): Likewise.
13054 (__arm_vst1q_s16): Likewise.
13055 (__arm_vst1q_u8): Likewise.
13056 (__arm_vst1q_u32): Likewise.
13057 (__arm_vst1q_u16): Likewise.
13058 (__arm_vstrhq_scatter_offset_s32): Likewise.
13059 (__arm_vstrhq_scatter_offset_s16): Likewise.
13060 (__arm_vstrhq_scatter_offset_u32): Likewise.
13061 (__arm_vstrhq_scatter_offset_u16): Likewise.
13062 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
13063 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
13064 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
13065 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
13066 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
13067 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
13068 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
13069 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
13070 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
13071 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
13072 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
13073 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
13074 (__arm_vstrhq_s32): Likewise.
13075 (__arm_vstrhq_s16): Likewise.
13076 (__arm_vstrhq_u32): Likewise.
13077 (__arm_vstrhq_u16): Likewise.
13078 (__arm_vstrhq_p_s32): Likewise.
13079 (__arm_vstrhq_p_s16): Likewise.
13080 (__arm_vstrhq_p_u32): Likewise.
13081 (__arm_vstrhq_p_u16): Likewise.
13082 (__arm_vstrwq_s32): Likewise.
13083 (__arm_vstrwq_u32): Likewise.
13084 (__arm_vstrwq_p_s32): Likewise.
13085 (__arm_vstrwq_p_u32): Likewise.
13086 (__arm_vstrwq_p_f32): Likewise.
13087 (__arm_vstrwq_f32): Likewise.
13088 (__arm_vst1q_f32): Likewise.
13089 (__arm_vst1q_f16): Likewise.
13090 (__arm_vstrhq_f16): Likewise.
13091 (__arm_vstrhq_p_f16): Likewise.
13092 (vst1q): Define polymorphic variant.
13093 (vstrhq): Likewise.
13094 (vstrhq_p): Likewise.
13095 (vstrhq_scatter_offset_p): Likewise.
13096 (vstrhq_scatter_offset): Likewise.
13097 (vstrhq_scatter_shifted_offset_p): Likewise.
13098 (vstrhq_scatter_shifted_offset): Likewise.
13099 (vstrwq_p): Likewise.
13100 (vstrwq): Likewise.
13101 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
13102 (STRS_P): Likewise.
13104 (STRSS_P): Likewise.
13106 (STRSU_P): Likewise.
13108 (STRU_P): Likewise.
13109 * config/arm/mve.md (VST1Q): Define iterator.
13110 (VSTRHSOQ): Likewise.
13111 (VSTRHSSOQ): Likewise.
13112 (VSTRHQ): Likewise.
13113 (VSTRWQ): Likewise.
13114 (mve_vstrhq_fv8hf): Define RTL pattern.
13115 (mve_vstrhq_p_fv8hf): Likewise.
13116 (mve_vstrhq_p_<supf><mode>): Likewise.
13117 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
13118 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
13119 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
13120 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
13121 (mve_vstrhq_<supf><mode>): Likewise.
13122 (mve_vstrwq_fv4sf): Likewise.
13123 (mve_vstrwq_p_fv4sf): Likewise.
13124 (mve_vstrwq_p_<supf>v4si): Likewise.
13125 (mve_vstrwq_<supf>v4si): Likewise.
13126 (mve_vst1q_f<mode>): Define expand.
13127 (mve_vst1q_<supf><mode>): Likewise.
13129 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13130 Mihail Ionescu <mihail.ionescu@arm.com>
13131 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13133 * config/arm/arm_mve.h (vld1q_s8): Define macro.
13134 (vld1q_s32): Likewise.
13135 (vld1q_s16): Likewise.
13136 (vld1q_u8): Likewise.
13137 (vld1q_u32): Likewise.
13138 (vld1q_u16): Likewise.
13139 (vldrhq_gather_offset_s32): Likewise.
13140 (vldrhq_gather_offset_s16): Likewise.
13141 (vldrhq_gather_offset_u32): Likewise.
13142 (vldrhq_gather_offset_u16): Likewise.
13143 (vldrhq_gather_offset_z_s32): Likewise.
13144 (vldrhq_gather_offset_z_s16): Likewise.
13145 (vldrhq_gather_offset_z_u32): Likewise.
13146 (vldrhq_gather_offset_z_u16): Likewise.
13147 (vldrhq_gather_shifted_offset_s32): Likewise.
13148 (vldrhq_gather_shifted_offset_s16): Likewise.
13149 (vldrhq_gather_shifted_offset_u32): Likewise.
13150 (vldrhq_gather_shifted_offset_u16): Likewise.
13151 (vldrhq_gather_shifted_offset_z_s32): Likewise.
13152 (vldrhq_gather_shifted_offset_z_s16): Likewise.
13153 (vldrhq_gather_shifted_offset_z_u32): Likewise.
13154 (vldrhq_gather_shifted_offset_z_u16): Likewise.
13155 (vldrhq_s32): Likewise.
13156 (vldrhq_s16): Likewise.
13157 (vldrhq_u32): Likewise.
13158 (vldrhq_u16): Likewise.
13159 (vldrhq_z_s32): Likewise.
13160 (vldrhq_z_s16): Likewise.
13161 (vldrhq_z_u32): Likewise.
13162 (vldrhq_z_u16): Likewise.
13163 (vldrwq_s32): Likewise.
13164 (vldrwq_u32): Likewise.
13165 (vldrwq_z_s32): Likewise.
13166 (vldrwq_z_u32): Likewise.
13167 (vld1q_f32): Likewise.
13168 (vld1q_f16): Likewise.
13169 (vldrhq_f16): Likewise.
13170 (vldrhq_z_f16): Likewise.
13171 (vldrwq_f32): Likewise.
13172 (vldrwq_z_f32): Likewise.
13173 (__arm_vld1q_s8): Define intrinsic.
13174 (__arm_vld1q_s32): Likewise.
13175 (__arm_vld1q_s16): Likewise.
13176 (__arm_vld1q_u8): Likewise.
13177 (__arm_vld1q_u32): Likewise.
13178 (__arm_vld1q_u16): Likewise.
13179 (__arm_vldrhq_gather_offset_s32): Likewise.
13180 (__arm_vldrhq_gather_offset_s16): Likewise.
13181 (__arm_vldrhq_gather_offset_u32): Likewise.
13182 (__arm_vldrhq_gather_offset_u16): Likewise.
13183 (__arm_vldrhq_gather_offset_z_s32): Likewise.
13184 (__arm_vldrhq_gather_offset_z_s16): Likewise.
13185 (__arm_vldrhq_gather_offset_z_u32): Likewise.
13186 (__arm_vldrhq_gather_offset_z_u16): Likewise.
13187 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
13188 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
13189 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
13190 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
13191 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
13192 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
13193 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
13194 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
13195 (__arm_vldrhq_s32): Likewise.
13196 (__arm_vldrhq_s16): Likewise.
13197 (__arm_vldrhq_u32): Likewise.
13198 (__arm_vldrhq_u16): Likewise.
13199 (__arm_vldrhq_z_s32): Likewise.
13200 (__arm_vldrhq_z_s16): Likewise.
13201 (__arm_vldrhq_z_u32): Likewise.
13202 (__arm_vldrhq_z_u16): Likewise.
13203 (__arm_vldrwq_s32): Likewise.
13204 (__arm_vldrwq_u32): Likewise.
13205 (__arm_vldrwq_z_s32): Likewise.
13206 (__arm_vldrwq_z_u32): Likewise.
13207 (__arm_vld1q_f32): Likewise.
13208 (__arm_vld1q_f16): Likewise.
13209 (__arm_vldrwq_f32): Likewise.
13210 (__arm_vldrwq_z_f32): Likewise.
13211 (__arm_vldrhq_z_f16): Likewise.
13212 (__arm_vldrhq_f16): Likewise.
13213 (vld1q): Define polymorphic variant.
13214 (vldrhq_gather_offset): Likewise.
13215 (vldrhq_gather_offset_z): Likewise.
13216 (vldrhq_gather_shifted_offset): Likewise.
13217 (vldrhq_gather_shifted_offset_z): Likewise.
13218 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
13220 (LDRU_Z): Likewise.
13221 (LDRS_Z): Likewise.
13222 (LDRGU_Z): Likewise.
13224 (LDRGS_Z): Likewise.
13226 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
13227 (V_sz_elem1): Likewise.
13228 (VLD1Q): Define iterator.
13229 (VLDRHGOQ): Likewise.
13230 (VLDRHGSOQ): Likewise.
13231 (VLDRHQ): Likewise.
13232 (VLDRWQ): Likewise.
13233 (mve_vldrhq_fv8hf): Define RTL pattern.
13234 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
13235 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
13236 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
13237 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
13238 (mve_vldrhq_<supf><mode>): Likewise.
13239 (mve_vldrhq_z_fv8hf): Likewise.
13240 (mve_vldrhq_z_<supf><mode>): Likewise.
13241 (mve_vldrwq_fv4sf): Likewise.
13242 (mve_vldrwq_<supf>v4si): Likewise.
13243 (mve_vldrwq_z_fv4sf): Likewise.
13244 (mve_vldrwq_z_<supf>v4si): Likewise.
13245 (mve_vld1q_f<mode>): Define RTL expand pattern.
13246 (mve_vld1q_<supf><mode>): Likewise.
13248 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13249 Mihail Ionescu <mihail.ionescu@arm.com>
13250 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13252 * config/arm/arm_mve.h (vld1q_s8): Define macro.
13253 (vld1q_s32): Likewise.
13254 (vld1q_s16): Likewise.
13255 (vld1q_u8): Likewise.
13256 (vld1q_u32): Likewise.
13257 (vld1q_u16): Likewise.
13258 (vldrhq_gather_offset_s32): Likewise.
13259 (vldrhq_gather_offset_s16): Likewise.
13260 (vldrhq_gather_offset_u32): Likewise.
13261 (vldrhq_gather_offset_u16): Likewise.
13262 (vldrhq_gather_offset_z_s32): Likewise.
13263 (vldrhq_gather_offset_z_s16): Likewise.
13264 (vldrhq_gather_offset_z_u32): Likewise.
13265 (vldrhq_gather_offset_z_u16): Likewise.
13266 (vldrhq_gather_shifted_offset_s32): Likewise.
13267 (vldrhq_gather_shifted_offset_s16): Likewise.
13268 (vldrhq_gather_shifted_offset_u32): Likewise.
13269 (vldrhq_gather_shifted_offset_u16): Likewise.
13270 (vldrhq_gather_shifted_offset_z_s32): Likewise.
13271 (vldrhq_gather_shifted_offset_z_s16): Likewise.
13272 (vldrhq_gather_shifted_offset_z_u32): Likewise.
13273 (vldrhq_gather_shifted_offset_z_u16): Likewise.
13274 (vldrhq_s32): Likewise.
13275 (vldrhq_s16): Likewise.
13276 (vldrhq_u32): Likewise.
13277 (vldrhq_u16): Likewise.
13278 (vldrhq_z_s32): Likewise.
13279 (vldrhq_z_s16): Likewise.
13280 (vldrhq_z_u32): Likewise.
13281 (vldrhq_z_u16): Likewise.
13282 (vldrwq_s32): Likewise.
13283 (vldrwq_u32): Likewise.
13284 (vldrwq_z_s32): Likewise.
13285 (vldrwq_z_u32): Likewise.
13286 (vld1q_f32): Likewise.
13287 (vld1q_f16): Likewise.
13288 (vldrhq_f16): Likewise.
13289 (vldrhq_z_f16): Likewise.
13290 (vldrwq_f32): Likewise.
13291 (vldrwq_z_f32): Likewise.
13292 (__arm_vld1q_s8): Define intrinsic.
13293 (__arm_vld1q_s32): Likewise.
13294 (__arm_vld1q_s16): Likewise.
13295 (__arm_vld1q_u8): Likewise.
13296 (__arm_vld1q_u32): Likewise.
13297 (__arm_vld1q_u16): Likewise.
13298 (__arm_vldrhq_gather_offset_s32): Likewise.
13299 (__arm_vldrhq_gather_offset_s16): Likewise.
13300 (__arm_vldrhq_gather_offset_u32): Likewise.
13301 (__arm_vldrhq_gather_offset_u16): Likewise.
13302 (__arm_vldrhq_gather_offset_z_s32): Likewise.
13303 (__arm_vldrhq_gather_offset_z_s16): Likewise.
13304 (__arm_vldrhq_gather_offset_z_u32): Likewise.
13305 (__arm_vldrhq_gather_offset_z_u16): Likewise.
13306 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
13307 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
13308 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
13309 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
13310 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
13311 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
13312 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
13313 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
13314 (__arm_vldrhq_s32): Likewise.
13315 (__arm_vldrhq_s16): Likewise.
13316 (__arm_vldrhq_u32): Likewise.
13317 (__arm_vldrhq_u16): Likewise.
13318 (__arm_vldrhq_z_s32): Likewise.
13319 (__arm_vldrhq_z_s16): Likewise.
13320 (__arm_vldrhq_z_u32): Likewise.
13321 (__arm_vldrhq_z_u16): Likewise.
13322 (__arm_vldrwq_s32): Likewise.
13323 (__arm_vldrwq_u32): Likewise.
13324 (__arm_vldrwq_z_s32): Likewise.
13325 (__arm_vldrwq_z_u32): Likewise.
13326 (__arm_vld1q_f32): Likewise.
13327 (__arm_vld1q_f16): Likewise.
13328 (__arm_vldrwq_f32): Likewise.
13329 (__arm_vldrwq_z_f32): Likewise.
13330 (__arm_vldrhq_z_f16): Likewise.
13331 (__arm_vldrhq_f16): Likewise.
13332 (vld1q): Define polymorphic variant.
13333 (vldrhq_gather_offset): Likewise.
13334 (vldrhq_gather_offset_z): Likewise.
13335 (vldrhq_gather_shifted_offset): Likewise.
13336 (vldrhq_gather_shifted_offset_z): Likewise.
13337 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
13339 (LDRU_Z): Likewise.
13340 (LDRS_Z): Likewise.
13341 (LDRGU_Z): Likewise.
13343 (LDRGS_Z): Likewise.
13345 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
13346 (V_sz_elem1): Likewise.
13347 (VLD1Q): Define iterator.
13348 (VLDRHGOQ): Likewise.
13349 (VLDRHGSOQ): Likewise.
13350 (VLDRHQ): Likewise.
13351 (VLDRWQ): Likewise.
13352 (mve_vldrhq_fv8hf): Define RTL pattern.
13353 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
13354 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
13355 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
13356 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
13357 (mve_vldrhq_<supf><mode>): Likewise.
13358 (mve_vldrhq_z_fv8hf): Likewise.
13359 (mve_vldrhq_z_<supf><mode>): Likewise.
13360 (mve_vldrwq_fv4sf): Likewise.
13361 (mve_vldrwq_<supf>v4si): Likewise.
13362 (mve_vldrwq_z_fv4sf): Likewise.
13363 (mve_vldrwq_z_<supf>v4si): Likewise.
13364 (mve_vld1q_f<mode>): Define RTL expand pattern.
13365 (mve_vld1q_<supf><mode>): Likewise.
13367 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13368 Mihail Ionescu <mihail.ionescu@arm.com>
13369 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13371 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
13373 (LDRGBU_Z_QUALIFIERS): Likewise.
13374 (LDRGS_Z_QUALIFIERS): Likewise.
13375 (LDRGU_Z_QUALIFIERS): Likewise.
13376 (LDRS_Z_QUALIFIERS): Likewise.
13377 (LDRU_Z_QUALIFIERS): Likewise.
13378 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
13379 (vldrbq_gather_offset_z_u8): Likewise.
13380 (vldrbq_gather_offset_z_s32): Likewise.
13381 (vldrbq_gather_offset_z_u16): Likewise.
13382 (vldrbq_gather_offset_z_u32): Likewise.
13383 (vldrbq_gather_offset_z_s8): Likewise.
13384 (vldrbq_z_s16): Likewise.
13385 (vldrbq_z_u8): Likewise.
13386 (vldrbq_z_s8): Likewise.
13387 (vldrbq_z_s32): Likewise.
13388 (vldrbq_z_u16): Likewise.
13389 (vldrbq_z_u32): Likewise.
13390 (vldrwq_gather_base_z_u32): Likewise.
13391 (vldrwq_gather_base_z_s32): Likewise.
13392 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
13393 (__arm_vldrbq_gather_offset_z_s32): Likewise.
13394 (__arm_vldrbq_gather_offset_z_s16): Likewise.
13395 (__arm_vldrbq_gather_offset_z_u8): Likewise.
13396 (__arm_vldrbq_gather_offset_z_u32): Likewise.
13397 (__arm_vldrbq_gather_offset_z_u16): Likewise.
13398 (__arm_vldrbq_z_s8): Likewise.
13399 (__arm_vldrbq_z_s32): Likewise.
13400 (__arm_vldrbq_z_s16): Likewise.
13401 (__arm_vldrbq_z_u8): Likewise.
13402 (__arm_vldrbq_z_u32): Likewise.
13403 (__arm_vldrbq_z_u16): Likewise.
13404 (__arm_vldrwq_gather_base_z_s32): Likewise.
13405 (__arm_vldrwq_gather_base_z_u32): Likewise.
13406 (vldrbq_gather_offset_z): Define polymorphic variant.
13407 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
13409 (LDRGBU_Z_QUALIFIERS): Likewise.
13410 (LDRGS_Z_QUALIFIERS): Likewise.
13411 (LDRGU_Z_QUALIFIERS): Likewise.
13412 (LDRS_Z_QUALIFIERS): Likewise.
13413 (LDRU_Z_QUALIFIERS): Likewise.
13414 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
13416 (mve_vldrbq_z_<supf><mode>): Likewise.
13417 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
13419 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13420 Mihail Ionescu <mihail.ionescu@arm.com>
13421 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13423 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
13425 (STRU_P_QUALIFIERS): Likewise.
13426 (STRSU_P_QUALIFIERS): Likewise.
13427 (STRSS_P_QUALIFIERS): Likewise.
13428 (STRSBS_P_QUALIFIERS): Likewise.
13429 (STRSBU_P_QUALIFIERS): Likewise.
13430 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
13431 (vstrbq_p_s32): Likewise.
13432 (vstrbq_p_s16): Likewise.
13433 (vstrbq_p_u8): Likewise.
13434 (vstrbq_p_u32): Likewise.
13435 (vstrbq_p_u16): Likewise.
13436 (vstrbq_scatter_offset_p_s8): Likewise.
13437 (vstrbq_scatter_offset_p_s32): Likewise.
13438 (vstrbq_scatter_offset_p_s16): Likewise.
13439 (vstrbq_scatter_offset_p_u8): Likewise.
13440 (vstrbq_scatter_offset_p_u32): Likewise.
13441 (vstrbq_scatter_offset_p_u16): Likewise.
13442 (vstrwq_scatter_base_p_s32): Likewise.
13443 (vstrwq_scatter_base_p_u32): Likewise.
13444 (__arm_vstrbq_p_s8): Define intrinsic.
13445 (__arm_vstrbq_p_s32): Likewise.
13446 (__arm_vstrbq_p_s16): Likewise.
13447 (__arm_vstrbq_p_u8): Likewise.
13448 (__arm_vstrbq_p_u32): Likewise.
13449 (__arm_vstrbq_p_u16): Likewise.
13450 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
13451 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
13452 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
13453 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
13454 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
13455 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
13456 (__arm_vstrwq_scatter_base_p_s32): Likewise.
13457 (__arm_vstrwq_scatter_base_p_u32): Likewise.
13458 (vstrbq_p): Define polymorphic variant.
13459 (vstrbq_scatter_offset_p): Likewise.
13460 (vstrwq_scatter_base_p): Likewise.
13461 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
13463 (STRU_P_QUALIFIERS): Likewise.
13464 (STRSU_P_QUALIFIERS): Likewise.
13465 (STRSS_P_QUALIFIERS): Likewise.
13466 (STRSBS_P_QUALIFIERS): Likewise.
13467 (STRSBU_P_QUALIFIERS): Likewise.
13468 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
13470 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
13471 (mve_vstrbq_p_<supf><mode>): Likewise.
13473 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13474 Mihail Ionescu <mihail.ionescu@arm.com>
13475 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13477 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
13479 (LDRGS_QUALIFIERS): Likewise.
13480 (LDRS_QUALIFIERS): Likewise.
13481 (LDRU_QUALIFIERS): Likewise.
13482 (LDRGBS_QUALIFIERS): Likewise.
13483 (LDRGBU_QUALIFIERS): Likewise.
13484 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
13485 (vldrbq_gather_offset_s8): Likewise.
13486 (vldrbq_s8): Likewise.
13487 (vldrbq_u8): Likewise.
13488 (vldrbq_gather_offset_u16): Likewise.
13489 (vldrbq_gather_offset_s16): Likewise.
13490 (vldrbq_s16): Likewise.
13491 (vldrbq_u16): Likewise.
13492 (vldrbq_gather_offset_u32): Likewise.
13493 (vldrbq_gather_offset_s32): Likewise.
13494 (vldrbq_s32): Likewise.
13495 (vldrbq_u32): Likewise.
13496 (vldrwq_gather_base_s32): Likewise.
13497 (vldrwq_gather_base_u32): Likewise.
13498 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
13499 (__arm_vldrbq_gather_offset_s8): Likewise.
13500 (__arm_vldrbq_s8): Likewise.
13501 (__arm_vldrbq_u8): Likewise.
13502 (__arm_vldrbq_gather_offset_u16): Likewise.
13503 (__arm_vldrbq_gather_offset_s16): Likewise.
13504 (__arm_vldrbq_s16): Likewise.
13505 (__arm_vldrbq_u16): Likewise.
13506 (__arm_vldrbq_gather_offset_u32): Likewise.
13507 (__arm_vldrbq_gather_offset_s32): Likewise.
13508 (__arm_vldrbq_s32): Likewise.
13509 (__arm_vldrbq_u32): Likewise.
13510 (__arm_vldrwq_gather_base_s32): Likewise.
13511 (__arm_vldrwq_gather_base_u32): Likewise.
13512 (vldrbq_gather_offset): Define polymorphic variant.
13513 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
13515 (LDRGS_QUALIFIERS): Likewise.
13516 (LDRS_QUALIFIERS): Likewise.
13517 (LDRU_QUALIFIERS): Likewise.
13518 (LDRGBS_QUALIFIERS): Likewise.
13519 (LDRGBU_QUALIFIERS): Likewise.
13520 * config/arm/mve.md (VLDRBGOQ): Define iterator.
13521 (VLDRBQ): Likewise.
13522 (VLDRWGBQ): Likewise.
13523 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
13524 (mve_vldrbq_<supf><mode>): Likewise.
13525 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
13527 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13528 Mihail Ionescu <mihail.ionescu@arm.com>
13529 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13531 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
13532 (STRU_QUALIFIERS): Likewise.
13533 (STRSS_QUALIFIERS): Likewise.
13534 (STRSU_QUALIFIERS): Likewise.
13535 (STRSBS_QUALIFIERS): Likewise.
13536 (STRSBU_QUALIFIERS): Likewise.
13537 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
13538 (vstrbq_u8): Likewise.
13539 (vstrbq_u16): Likewise.
13540 (vstrbq_scatter_offset_s8): Likewise.
13541 (vstrbq_scatter_offset_u8): Likewise.
13542 (vstrbq_scatter_offset_u16): Likewise.
13543 (vstrbq_s16): Likewise.
13544 (vstrbq_u32): Likewise.
13545 (vstrbq_scatter_offset_s16): Likewise.
13546 (vstrbq_scatter_offset_u32): Likewise.
13547 (vstrbq_s32): Likewise.
13548 (vstrbq_scatter_offset_s32): Likewise.
13549 (vstrwq_scatter_base_s32): Likewise.
13550 (vstrwq_scatter_base_u32): Likewise.
13551 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
13552 (__arm_vstrbq_scatter_offset_s32): Likewise.
13553 (__arm_vstrbq_scatter_offset_s16): Likewise.
13554 (__arm_vstrbq_scatter_offset_u8): Likewise.
13555 (__arm_vstrbq_scatter_offset_u32): Likewise.
13556 (__arm_vstrbq_scatter_offset_u16): Likewise.
13557 (__arm_vstrbq_s8): Likewise.
13558 (__arm_vstrbq_s32): Likewise.
13559 (__arm_vstrbq_s16): Likewise.
13560 (__arm_vstrbq_u8): Likewise.
13561 (__arm_vstrbq_u32): Likewise.
13562 (__arm_vstrbq_u16): Likewise.
13563 (__arm_vstrwq_scatter_base_s32): Likewise.
13564 (__arm_vstrwq_scatter_base_u32): Likewise.
13565 (vstrbq): Define polymorphic variant.
13566 (vstrbq_scatter_offset): Likewise.
13567 (vstrwq_scatter_base): Likewise.
13568 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
13570 (STRU_QUALIFIERS): Likewise.
13571 (STRSS_QUALIFIERS): Likewise.
13572 (STRSU_QUALIFIERS): Likewise.
13573 (STRSBS_QUALIFIERS): Likewise.
13574 (STRSBU_QUALIFIERS): Likewise.
13575 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
13576 (VSTRWSBQ): Define iterators.
13577 (VSTRBSOQ): Likewise.
13578 (VSTRBQ): Likewise.
13579 (mve_vstrbq_<supf><mode>): Define RTL pattern.
13580 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
13581 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
13583 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13584 Mihail Ionescu <mihail.ionescu@arm.com>
13585 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13587 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
13588 (vabdq_m_f16): Likewise.
13589 (vaddq_m_f32): Likewise.
13590 (vaddq_m_f16): Likewise.
13591 (vaddq_m_n_f32): Likewise.
13592 (vaddq_m_n_f16): Likewise.
13593 (vandq_m_f32): Likewise.
13594 (vandq_m_f16): Likewise.
13595 (vbicq_m_f32): Likewise.
13596 (vbicq_m_f16): Likewise.
13597 (vbrsrq_m_n_f32): Likewise.
13598 (vbrsrq_m_n_f16): Likewise.
13599 (vcaddq_rot270_m_f32): Likewise.
13600 (vcaddq_rot270_m_f16): Likewise.
13601 (vcaddq_rot90_m_f32): Likewise.
13602 (vcaddq_rot90_m_f16): Likewise.
13603 (vcmlaq_m_f32): Likewise.
13604 (vcmlaq_m_f16): Likewise.
13605 (vcmlaq_rot180_m_f32): Likewise.
13606 (vcmlaq_rot180_m_f16): Likewise.
13607 (vcmlaq_rot270_m_f32): Likewise.
13608 (vcmlaq_rot270_m_f16): Likewise.
13609 (vcmlaq_rot90_m_f32): Likewise.
13610 (vcmlaq_rot90_m_f16): Likewise.
13611 (vcmulq_m_f32): Likewise.
13612 (vcmulq_m_f16): Likewise.
13613 (vcmulq_rot180_m_f32): Likewise.
13614 (vcmulq_rot180_m_f16): Likewise.
13615 (vcmulq_rot270_m_f32): Likewise.
13616 (vcmulq_rot270_m_f16): Likewise.
13617 (vcmulq_rot90_m_f32): Likewise.
13618 (vcmulq_rot90_m_f16): Likewise.
13619 (vcvtq_m_n_s32_f32): Likewise.
13620 (vcvtq_m_n_s16_f16): Likewise.
13621 (vcvtq_m_n_u32_f32): Likewise.
13622 (vcvtq_m_n_u16_f16): Likewise.
13623 (veorq_m_f32): Likewise.
13624 (veorq_m_f16): Likewise.
13625 (vfmaq_m_f32): Likewise.
13626 (vfmaq_m_f16): Likewise.
13627 (vfmaq_m_n_f32): Likewise.
13628 (vfmaq_m_n_f16): Likewise.
13629 (vfmasq_m_n_f32): Likewise.
13630 (vfmasq_m_n_f16): Likewise.
13631 (vfmsq_m_f32): Likewise.
13632 (vfmsq_m_f16): Likewise.
13633 (vmaxnmq_m_f32): Likewise.
13634 (vmaxnmq_m_f16): Likewise.
13635 (vminnmq_m_f32): Likewise.
13636 (vminnmq_m_f16): Likewise.
13637 (vmulq_m_f32): Likewise.
13638 (vmulq_m_f16): Likewise.
13639 (vmulq_m_n_f32): Likewise.
13640 (vmulq_m_n_f16): Likewise.
13641 (vornq_m_f32): Likewise.
13642 (vornq_m_f16): Likewise.
13643 (vorrq_m_f32): Likewise.
13644 (vorrq_m_f16): Likewise.
13645 (vsubq_m_f32): Likewise.
13646 (vsubq_m_f16): Likewise.
13647 (vsubq_m_n_f32): Likewise.
13648 (vsubq_m_n_f16): Likewise.
13649 (__attribute__): Likewise.
13650 (__arm_vabdq_m_f32): Likewise.
13651 (__arm_vabdq_m_f16): Likewise.
13652 (__arm_vaddq_m_f32): Likewise.
13653 (__arm_vaddq_m_f16): Likewise.
13654 (__arm_vaddq_m_n_f32): Likewise.
13655 (__arm_vaddq_m_n_f16): Likewise.
13656 (__arm_vandq_m_f32): Likewise.
13657 (__arm_vandq_m_f16): Likewise.
13658 (__arm_vbicq_m_f32): Likewise.
13659 (__arm_vbicq_m_f16): Likewise.
13660 (__arm_vbrsrq_m_n_f32): Likewise.
13661 (__arm_vbrsrq_m_n_f16): Likewise.
13662 (__arm_vcaddq_rot270_m_f32): Likewise.
13663 (__arm_vcaddq_rot270_m_f16): Likewise.
13664 (__arm_vcaddq_rot90_m_f32): Likewise.
13665 (__arm_vcaddq_rot90_m_f16): Likewise.
13666 (__arm_vcmlaq_m_f32): Likewise.
13667 (__arm_vcmlaq_m_f16): Likewise.
13668 (__arm_vcmlaq_rot180_m_f32): Likewise.
13669 (__arm_vcmlaq_rot180_m_f16): Likewise.
13670 (__arm_vcmlaq_rot270_m_f32): Likewise.
13671 (__arm_vcmlaq_rot270_m_f16): Likewise.
13672 (__arm_vcmlaq_rot90_m_f32): Likewise.
13673 (__arm_vcmlaq_rot90_m_f16): Likewise.
13674 (__arm_vcmulq_m_f32): Likewise.
13675 (__arm_vcmulq_m_f16): Likewise.
13676 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
13677 (__arm_vcmulq_rot180_m_f16): Likewise.
13678 (__arm_vcmulq_rot270_m_f32): Likewise.
13679 (__arm_vcmulq_rot270_m_f16): Likewise.
13680 (__arm_vcmulq_rot90_m_f32): Likewise.
13681 (__arm_vcmulq_rot90_m_f16): Likewise.
13682 (__arm_vcvtq_m_n_s32_f32): Likewise.
13683 (__arm_vcvtq_m_n_s16_f16): Likewise.
13684 (__arm_vcvtq_m_n_u32_f32): Likewise.
13685 (__arm_vcvtq_m_n_u16_f16): Likewise.
13686 (__arm_veorq_m_f32): Likewise.
13687 (__arm_veorq_m_f16): Likewise.
13688 (__arm_vfmaq_m_f32): Likewise.
13689 (__arm_vfmaq_m_f16): Likewise.
13690 (__arm_vfmaq_m_n_f32): Likewise.
13691 (__arm_vfmaq_m_n_f16): Likewise.
13692 (__arm_vfmasq_m_n_f32): Likewise.
13693 (__arm_vfmasq_m_n_f16): Likewise.
13694 (__arm_vfmsq_m_f32): Likewise.
13695 (__arm_vfmsq_m_f16): Likewise.
13696 (__arm_vmaxnmq_m_f32): Likewise.
13697 (__arm_vmaxnmq_m_f16): Likewise.
13698 (__arm_vminnmq_m_f32): Likewise.
13699 (__arm_vminnmq_m_f16): Likewise.
13700 (__arm_vmulq_m_f32): Likewise.
13701 (__arm_vmulq_m_f16): Likewise.
13702 (__arm_vmulq_m_n_f32): Likewise.
13703 (__arm_vmulq_m_n_f16): Likewise.
13704 (__arm_vornq_m_f32): Likewise.
13705 (__arm_vornq_m_f16): Likewise.
13706 (__arm_vorrq_m_f32): Likewise.
13707 (__arm_vorrq_m_f16): Likewise.
13708 (__arm_vsubq_m_f32): Likewise.
13709 (__arm_vsubq_m_f16): Likewise.
13710 (__arm_vsubq_m_n_f32): Likewise.
13711 (__arm_vsubq_m_n_f16): Likewise.
13712 (vabdq_m): Define polymorphic variant.
13713 (vaddq_m): Likewise.
13714 (vaddq_m_n): Likewise.
13715 (vandq_m): Likewise.
13716 (vbicq_m): Likewise.
13717 (vbrsrq_m_n): Likewise.
13718 (vcaddq_rot270_m): Likewise.
13719 (vcaddq_rot90_m): Likewise.
13720 (vcmlaq_m): Likewise.
13721 (vcmlaq_rot180_m): Likewise.
13722 (vcmlaq_rot270_m): Likewise.
13723 (vcmlaq_rot90_m): Likewise.
13724 (vcmulq_m): Likewise.
13725 (vcmulq_rot180_m): Likewise.
13726 (vcmulq_rot270_m): Likewise.
13727 (vcmulq_rot90_m): Likewise.
13728 (veorq_m): Likewise.
13729 (vfmaq_m): Likewise.
13730 (vfmaq_m_n): Likewise.
13731 (vfmasq_m_n): Likewise.
13732 (vfmsq_m): Likewise.
13733 (vmaxnmq_m): Likewise.
13734 (vminnmq_m): Likewise.
13735 (vmulq_m): Likewise.
13736 (vmulq_m_n): Likewise.
13737 (vornq_m): Likewise.
13738 (vsubq_m): Likewise.
13739 (vsubq_m_n): Likewise.
13740 (vorrq_m): Likewise.
13741 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
13743 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13744 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
13745 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
13746 (mve_vaddq_m_f<mode>): Likewise.
13747 (mve_vaddq_m_n_f<mode>): Likewise.
13748 (mve_vandq_m_f<mode>): Likewise.
13749 (mve_vbicq_m_f<mode>): Likewise.
13750 (mve_vbrsrq_m_n_f<mode>): Likewise.
13751 (mve_vcaddq_rot270_m_f<mode>): Likewise.
13752 (mve_vcaddq_rot90_m_f<mode>): Likewise.
13753 (mve_vcmlaq_m_f<mode>): Likewise.
13754 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
13755 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
13756 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
13757 (mve_vcmulq_m_f<mode>): Likewise.
13758 (mve_vcmulq_rot180_m_f<mode>): Likewise.
13759 (mve_vcmulq_rot270_m_f<mode>): Likewise.
13760 (mve_vcmulq_rot90_m_f<mode>): Likewise.
13761 (mve_veorq_m_f<mode>): Likewise.
13762 (mve_vfmaq_m_f<mode>): Likewise.
13763 (mve_vfmaq_m_n_f<mode>): Likewise.
13764 (mve_vfmasq_m_n_f<mode>): Likewise.
13765 (mve_vfmsq_m_f<mode>): Likewise.
13766 (mve_vmaxnmq_m_f<mode>): Likewise.
13767 (mve_vminnmq_m_f<mode>): Likewise.
13768 (mve_vmulq_m_f<mode>): Likewise.
13769 (mve_vmulq_m_n_f<mode>): Likewise.
13770 (mve_vornq_m_f<mode>): Likewise.
13771 (mve_vorrq_m_f<mode>): Likewise.
13772 (mve_vsubq_m_f<mode>): Likewise.
13773 (mve_vsubq_m_n_f<mode>): Likewise.
13775 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13776 Mihail Ionescu <mihail.ionescu@arm.com>
13777 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13779 * config/arm/arm-protos.h (arm_mve_immediate_check):
13780 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
13781 mode and interger value.
13782 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
13783 (vmlaldavaq_p_s16): Likewise.
13784 (vmlaldavaq_p_u32): Likewise.
13785 (vmlaldavaq_p_u16): Likewise.
13786 (vmlaldavaxq_p_s32): Likewise.
13787 (vmlaldavaxq_p_s16): Likewise.
13788 (vmlaldavaxq_p_u32): Likewise.
13789 (vmlaldavaxq_p_u16): Likewise.
13790 (vmlsldavaq_p_s32): Likewise.
13791 (vmlsldavaq_p_s16): Likewise.
13792 (vmlsldavaxq_p_s32): Likewise.
13793 (vmlsldavaxq_p_s16): Likewise.
13794 (vmullbq_poly_m_p8): Likewise.
13795 (vmullbq_poly_m_p16): Likewise.
13796 (vmulltq_poly_m_p8): Likewise.
13797 (vmulltq_poly_m_p16): Likewise.
13798 (vqdmullbq_m_n_s32): Likewise.
13799 (vqdmullbq_m_n_s16): Likewise.
13800 (vqdmullbq_m_s32): Likewise.
13801 (vqdmullbq_m_s16): Likewise.
13802 (vqdmulltq_m_n_s32): Likewise.
13803 (vqdmulltq_m_n_s16): Likewise.
13804 (vqdmulltq_m_s32): Likewise.
13805 (vqdmulltq_m_s16): Likewise.
13806 (vqrshrnbq_m_n_s32): Likewise.
13807 (vqrshrnbq_m_n_s16): Likewise.
13808 (vqrshrnbq_m_n_u32): Likewise.
13809 (vqrshrnbq_m_n_u16): Likewise.
13810 (vqrshrntq_m_n_s32): Likewise.
13811 (vqrshrntq_m_n_s16): Likewise.
13812 (vqrshrntq_m_n_u32): Likewise.
13813 (vqrshrntq_m_n_u16): Likewise.
13814 (vqrshrunbq_m_n_s32): Likewise.
13815 (vqrshrunbq_m_n_s16): Likewise.
13816 (vqrshruntq_m_n_s32): Likewise.
13817 (vqrshruntq_m_n_s16): Likewise.
13818 (vqshrnbq_m_n_s32): Likewise.
13819 (vqshrnbq_m_n_s16): Likewise.
13820 (vqshrnbq_m_n_u32): Likewise.
13821 (vqshrnbq_m_n_u16): Likewise.
13822 (vqshrntq_m_n_s32): Likewise.
13823 (vqshrntq_m_n_s16): Likewise.
13824 (vqshrntq_m_n_u32): Likewise.
13825 (vqshrntq_m_n_u16): Likewise.
13826 (vqshrunbq_m_n_s32): Likewise.
13827 (vqshrunbq_m_n_s16): Likewise.
13828 (vqshruntq_m_n_s32): Likewise.
13829 (vqshruntq_m_n_s16): Likewise.
13830 (vrmlaldavhaq_p_s32): Likewise.
13831 (vrmlaldavhaq_p_u32): Likewise.
13832 (vrmlaldavhaxq_p_s32): Likewise.
13833 (vrmlsldavhaq_p_s32): Likewise.
13834 (vrmlsldavhaxq_p_s32): Likewise.
13835 (vrshrnbq_m_n_s32): Likewise.
13836 (vrshrnbq_m_n_s16): Likewise.
13837 (vrshrnbq_m_n_u32): Likewise.
13838 (vrshrnbq_m_n_u16): Likewise.
13839 (vrshrntq_m_n_s32): Likewise.
13840 (vrshrntq_m_n_s16): Likewise.
13841 (vrshrntq_m_n_u32): Likewise.
13842 (vrshrntq_m_n_u16): Likewise.
13843 (vshllbq_m_n_s8): Likewise.
13844 (vshllbq_m_n_s16): Likewise.
13845 (vshllbq_m_n_u8): Likewise.
13846 (vshllbq_m_n_u16): Likewise.
13847 (vshlltq_m_n_s8): Likewise.
13848 (vshlltq_m_n_s16): Likewise.
13849 (vshlltq_m_n_u8): Likewise.
13850 (vshlltq_m_n_u16): Likewise.
13851 (vshrnbq_m_n_s32): Likewise.
13852 (vshrnbq_m_n_s16): Likewise.
13853 (vshrnbq_m_n_u32): Likewise.
13854 (vshrnbq_m_n_u16): Likewise.
13855 (vshrntq_m_n_s32): Likewise.
13856 (vshrntq_m_n_s16): Likewise.
13857 (vshrntq_m_n_u32): Likewise.
13858 (vshrntq_m_n_u16): Likewise.
13859 (__arm_vmlaldavaq_p_s32): Define intrinsic.
13860 (__arm_vmlaldavaq_p_s16): Likewise.
13861 (__arm_vmlaldavaq_p_u32): Likewise.
13862 (__arm_vmlaldavaq_p_u16): Likewise.
13863 (__arm_vmlaldavaxq_p_s32): Likewise.
13864 (__arm_vmlaldavaxq_p_s16): Likewise.
13865 (__arm_vmlaldavaxq_p_u32): Likewise.
13866 (__arm_vmlaldavaxq_p_u16): Likewise.
13867 (__arm_vmlsldavaq_p_s32): Likewise.
13868 (__arm_vmlsldavaq_p_s16): Likewise.
13869 (__arm_vmlsldavaxq_p_s32): Likewise.
13870 (__arm_vmlsldavaxq_p_s16): Likewise.
13871 (__arm_vmullbq_poly_m_p8): Likewise.
13872 (__arm_vmullbq_poly_m_p16): Likewise.
13873 (__arm_vmulltq_poly_m_p8): Likewise.
13874 (__arm_vmulltq_poly_m_p16): Likewise.
13875 (__arm_vqdmullbq_m_n_s32): Likewise.
13876 (__arm_vqdmullbq_m_n_s16): Likewise.
13877 (__arm_vqdmullbq_m_s32): Likewise.
13878 (__arm_vqdmullbq_m_s16): Likewise.
13879 (__arm_vqdmulltq_m_n_s32): Likewise.
13880 (__arm_vqdmulltq_m_n_s16): Likewise.
13881 (__arm_vqdmulltq_m_s32): Likewise.
13882 (__arm_vqdmulltq_m_s16): Likewise.
13883 (__arm_vqrshrnbq_m_n_s32): Likewise.
13884 (__arm_vqrshrnbq_m_n_s16): Likewise.
13885 (__arm_vqrshrnbq_m_n_u32): Likewise.
13886 (__arm_vqrshrnbq_m_n_u16): Likewise.
13887 (__arm_vqrshrntq_m_n_s32): Likewise.
13888 (__arm_vqrshrntq_m_n_s16): Likewise.
13889 (__arm_vqrshrntq_m_n_u32): Likewise.
13890 (__arm_vqrshrntq_m_n_u16): Likewise.
13891 (__arm_vqrshrunbq_m_n_s32): Likewise.
13892 (__arm_vqrshrunbq_m_n_s16): Likewise.
13893 (__arm_vqrshruntq_m_n_s32): Likewise.
13894 (__arm_vqrshruntq_m_n_s16): Likewise.
13895 (__arm_vqshrnbq_m_n_s32): Likewise.
13896 (__arm_vqshrnbq_m_n_s16): Likewise.
13897 (__arm_vqshrnbq_m_n_u32): Likewise.
13898 (__arm_vqshrnbq_m_n_u16): Likewise.
13899 (__arm_vqshrntq_m_n_s32): Likewise.
13900 (__arm_vqshrntq_m_n_s16): Likewise.
13901 (__arm_vqshrntq_m_n_u32): Likewise.
13902 (__arm_vqshrntq_m_n_u16): Likewise.
13903 (__arm_vqshrunbq_m_n_s32): Likewise.
13904 (__arm_vqshrunbq_m_n_s16): Likewise.
13905 (__arm_vqshruntq_m_n_s32): Likewise.
13906 (__arm_vqshruntq_m_n_s16): Likewise.
13907 (__arm_vrmlaldavhaq_p_s32): Likewise.
13908 (__arm_vrmlaldavhaq_p_u32): Likewise.
13909 (__arm_vrmlaldavhaxq_p_s32): Likewise.
13910 (__arm_vrmlsldavhaq_p_s32): Likewise.
13911 (__arm_vrmlsldavhaxq_p_s32): Likewise.
13912 (__arm_vrshrnbq_m_n_s32): Likewise.
13913 (__arm_vrshrnbq_m_n_s16): Likewise.
13914 (__arm_vrshrnbq_m_n_u32): Likewise.
13915 (__arm_vrshrnbq_m_n_u16): Likewise.
13916 (__arm_vrshrntq_m_n_s32): Likewise.
13917 (__arm_vrshrntq_m_n_s16): Likewise.
13918 (__arm_vrshrntq_m_n_u32): Likewise.
13919 (__arm_vrshrntq_m_n_u16): Likewise.
13920 (__arm_vshllbq_m_n_s8): Likewise.
13921 (__arm_vshllbq_m_n_s16): Likewise.
13922 (__arm_vshllbq_m_n_u8): Likewise.
13923 (__arm_vshllbq_m_n_u16): Likewise.
13924 (__arm_vshlltq_m_n_s8): Likewise.
13925 (__arm_vshlltq_m_n_s16): Likewise.
13926 (__arm_vshlltq_m_n_u8): Likewise.
13927 (__arm_vshlltq_m_n_u16): Likewise.
13928 (__arm_vshrnbq_m_n_s32): Likewise.
13929 (__arm_vshrnbq_m_n_s16): Likewise.
13930 (__arm_vshrnbq_m_n_u32): Likewise.
13931 (__arm_vshrnbq_m_n_u16): Likewise.
13932 (__arm_vshrntq_m_n_s32): Likewise.
13933 (__arm_vshrntq_m_n_s16): Likewise.
13934 (__arm_vshrntq_m_n_u32): Likewise.
13935 (__arm_vshrntq_m_n_u16): Likewise.
13936 (vmullbq_poly_m): Define polymorphic variant.
13937 (vmulltq_poly_m): Likewise.
13938 (vshllbq_m): Likewise.
13939 (vshrntq_m_n): Likewise.
13940 (vshrnbq_m_n): Likewise.
13941 (vshlltq_m_n): Likewise.
13942 (vshllbq_m_n): Likewise.
13943 (vrshrntq_m_n): Likewise.
13944 (vrshrnbq_m_n): Likewise.
13945 (vqshruntq_m_n): Likewise.
13946 (vqshrunbq_m_n): Likewise.
13947 (vqdmullbq_m_n): Likewise.
13948 (vqdmullbq_m): Likewise.
13949 (vqdmulltq_m_n): Likewise.
13950 (vqdmulltq_m): Likewise.
13951 (vqrshrnbq_m_n): Likewise.
13952 (vqrshrntq_m_n): Likewise.
13953 (vqrshrunbq_m_n): Likewise.
13954 (vqrshruntq_m_n): Likewise.
13955 (vqshrnbq_m_n): Likewise.
13956 (vqshrntq_m_n): Likewise.
13957 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
13958 builtin qualifiers.
13959 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13960 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
13961 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
13962 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13963 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
13964 (VMLALDAVAXQ_P): Likewise.
13965 (VQRSHRNBQ_M_N): Likewise.
13966 (VQRSHRNTQ_M_N): Likewise.
13967 (VQSHRNBQ_M_N): Likewise.
13968 (VQSHRNTQ_M_N): Likewise.
13969 (VRSHRNBQ_M_N): Likewise.
13970 (VRSHRNTQ_M_N): Likewise.
13971 (VSHLLBQ_M_N): Likewise.
13972 (VSHLLTQ_M_N): Likewise.
13973 (VSHRNBQ_M_N): Likewise.
13974 (VSHRNTQ_M_N): Likewise.
13975 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
13976 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
13977 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
13978 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
13979 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
13980 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
13981 (mve_vrmlaldavhaq_p_sv4si): Likewise.
13982 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
13983 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
13984 (mve_vshllbq_m_n_<supf><mode>): Likewise.
13985 (mve_vshlltq_m_n_<supf><mode>): Likewise.
13986 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
13987 (mve_vshrntq_m_n_<supf><mode>): Likewise.
13988 (mve_vmlsldavaq_p_s<mode>): Likewise.
13989 (mve_vmlsldavaxq_p_s<mode>): Likewise.
13990 (mve_vmullbq_poly_m_p<mode>): Likewise.
13991 (mve_vmulltq_poly_m_p<mode>): Likewise.
13992 (mve_vqdmullbq_m_n_s<mode>): Likewise.
13993 (mve_vqdmullbq_m_s<mode>): Likewise.
13994 (mve_vqdmulltq_m_n_s<mode>): Likewise.
13995 (mve_vqdmulltq_m_s<mode>): Likewise.
13996 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
13997 (mve_vqrshruntq_m_n_s<mode>): Likewise.
13998 (mve_vqshrunbq_m_n_s<mode>): Likewise.
13999 (mve_vqshruntq_m_n_s<mode>): Likewise.
14000 (mve_vrmlaldavhaq_p_uv4si): Likewise.
14001 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
14002 (mve_vrmlsldavhaq_p_sv4si): Likewise.
14003 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
14005 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14006 Mihail Ionescu <mihail.ionescu@arm.com>
14007 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14009 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
14010 (vabdq_m_s32): Likewise.
14011 (vabdq_m_s16): Likewise.
14012 (vabdq_m_u8): Likewise.
14013 (vabdq_m_u32): Likewise.
14014 (vabdq_m_u16): Likewise.
14015 (vaddq_m_n_s8): Likewise.
14016 (vaddq_m_n_s32): Likewise.
14017 (vaddq_m_n_s16): Likewise.
14018 (vaddq_m_n_u8): Likewise.
14019 (vaddq_m_n_u32): Likewise.
14020 (vaddq_m_n_u16): Likewise.
14021 (vaddq_m_s8): Likewise.
14022 (vaddq_m_s32): Likewise.
14023 (vaddq_m_s16): Likewise.
14024 (vaddq_m_u8): Likewise.
14025 (vaddq_m_u32): Likewise.
14026 (vaddq_m_u16): Likewise.
14027 (vandq_m_s8): Likewise.
14028 (vandq_m_s32): Likewise.
14029 (vandq_m_s16): Likewise.
14030 (vandq_m_u8): Likewise.
14031 (vandq_m_u32): Likewise.
14032 (vandq_m_u16): Likewise.
14033 (vbicq_m_s8): Likewise.
14034 (vbicq_m_s32): Likewise.
14035 (vbicq_m_s16): Likewise.
14036 (vbicq_m_u8): Likewise.
14037 (vbicq_m_u32): Likewise.
14038 (vbicq_m_u16): Likewise.
14039 (vbrsrq_m_n_s8): Likewise.
14040 (vbrsrq_m_n_s32): Likewise.
14041 (vbrsrq_m_n_s16): Likewise.
14042 (vbrsrq_m_n_u8): Likewise.
14043 (vbrsrq_m_n_u32): Likewise.
14044 (vbrsrq_m_n_u16): Likewise.
14045 (vcaddq_rot270_m_s8): Likewise.
14046 (vcaddq_rot270_m_s32): Likewise.
14047 (vcaddq_rot270_m_s16): Likewise.
14048 (vcaddq_rot270_m_u8): Likewise.
14049 (vcaddq_rot270_m_u32): Likewise.
14050 (vcaddq_rot270_m_u16): Likewise.
14051 (vcaddq_rot90_m_s8): Likewise.
14052 (vcaddq_rot90_m_s32): Likewise.
14053 (vcaddq_rot90_m_s16): Likewise.
14054 (vcaddq_rot90_m_u8): Likewise.
14055 (vcaddq_rot90_m_u32): Likewise.
14056 (vcaddq_rot90_m_u16): Likewise.
14057 (veorq_m_s8): Likewise.
14058 (veorq_m_s32): Likewise.
14059 (veorq_m_s16): Likewise.
14060 (veorq_m_u8): Likewise.
14061 (veorq_m_u32): Likewise.
14062 (veorq_m_u16): Likewise.
14063 (vhaddq_m_n_s8): Likewise.
14064 (vhaddq_m_n_s32): Likewise.
14065 (vhaddq_m_n_s16): Likewise.
14066 (vhaddq_m_n_u8): Likewise.
14067 (vhaddq_m_n_u32): Likewise.
14068 (vhaddq_m_n_u16): Likewise.
14069 (vhaddq_m_s8): Likewise.
14070 (vhaddq_m_s32): Likewise.
14071 (vhaddq_m_s16): Likewise.
14072 (vhaddq_m_u8): Likewise.
14073 (vhaddq_m_u32): Likewise.
14074 (vhaddq_m_u16): Likewise.
14075 (vhcaddq_rot270_m_s8): Likewise.
14076 (vhcaddq_rot270_m_s32): Likewise.
14077 (vhcaddq_rot270_m_s16): Likewise.
14078 (vhcaddq_rot90_m_s8): Likewise.
14079 (vhcaddq_rot90_m_s32): Likewise.
14080 (vhcaddq_rot90_m_s16): Likewise.
14081 (vhsubq_m_n_s8): Likewise.
14082 (vhsubq_m_n_s32): Likewise.
14083 (vhsubq_m_n_s16): Likewise.
14084 (vhsubq_m_n_u8): Likewise.
14085 (vhsubq_m_n_u32): Likewise.
14086 (vhsubq_m_n_u16): Likewise.
14087 (vhsubq_m_s8): Likewise.
14088 (vhsubq_m_s32): Likewise.
14089 (vhsubq_m_s16): Likewise.
14090 (vhsubq_m_u8): Likewise.
14091 (vhsubq_m_u32): Likewise.
14092 (vhsubq_m_u16): Likewise.
14093 (vmaxq_m_s8): Likewise.
14094 (vmaxq_m_s32): Likewise.
14095 (vmaxq_m_s16): Likewise.
14096 (vmaxq_m_u8): Likewise.
14097 (vmaxq_m_u32): Likewise.
14098 (vmaxq_m_u16): Likewise.
14099 (vminq_m_s8): Likewise.
14100 (vminq_m_s32): Likewise.
14101 (vminq_m_s16): Likewise.
14102 (vminq_m_u8): Likewise.
14103 (vminq_m_u32): Likewise.
14104 (vminq_m_u16): Likewise.
14105 (vmladavaq_p_s8): Likewise.
14106 (vmladavaq_p_s32): Likewise.
14107 (vmladavaq_p_s16): Likewise.
14108 (vmladavaq_p_u8): Likewise.
14109 (vmladavaq_p_u32): Likewise.
14110 (vmladavaq_p_u16): Likewise.
14111 (vmladavaxq_p_s8): Likewise.
14112 (vmladavaxq_p_s32): Likewise.
14113 (vmladavaxq_p_s16): Likewise.
14114 (vmlaq_m_n_s8): Likewise.
14115 (vmlaq_m_n_s32): Likewise.
14116 (vmlaq_m_n_s16): Likewise.
14117 (vmlaq_m_n_u8): Likewise.
14118 (vmlaq_m_n_u32): Likewise.
14119 (vmlaq_m_n_u16): Likewise.
14120 (vmlasq_m_n_s8): Likewise.
14121 (vmlasq_m_n_s32): Likewise.
14122 (vmlasq_m_n_s16): Likewise.
14123 (vmlasq_m_n_u8): Likewise.
14124 (vmlasq_m_n_u32): Likewise.
14125 (vmlasq_m_n_u16): Likewise.
14126 (vmlsdavaq_p_s8): Likewise.
14127 (vmlsdavaq_p_s32): Likewise.
14128 (vmlsdavaq_p_s16): Likewise.
14129 (vmlsdavaxq_p_s8): Likewise.
14130 (vmlsdavaxq_p_s32): Likewise.
14131 (vmlsdavaxq_p_s16): Likewise.
14132 (vmulhq_m_s8): Likewise.
14133 (vmulhq_m_s32): Likewise.
14134 (vmulhq_m_s16): Likewise.
14135 (vmulhq_m_u8): Likewise.
14136 (vmulhq_m_u32): Likewise.
14137 (vmulhq_m_u16): Likewise.
14138 (vmullbq_int_m_s8): Likewise.
14139 (vmullbq_int_m_s32): Likewise.
14140 (vmullbq_int_m_s16): Likewise.
14141 (vmullbq_int_m_u8): Likewise.
14142 (vmullbq_int_m_u32): Likewise.
14143 (vmullbq_int_m_u16): Likewise.
14144 (vmulltq_int_m_s8): Likewise.
14145 (vmulltq_int_m_s32): Likewise.
14146 (vmulltq_int_m_s16): Likewise.
14147 (vmulltq_int_m_u8): Likewise.
14148 (vmulltq_int_m_u32): Likewise.
14149 (vmulltq_int_m_u16): Likewise.
14150 (vmulq_m_n_s8): Likewise.
14151 (vmulq_m_n_s32): Likewise.
14152 (vmulq_m_n_s16): Likewise.
14153 (vmulq_m_n_u8): Likewise.
14154 (vmulq_m_n_u32): Likewise.
14155 (vmulq_m_n_u16): Likewise.
14156 (vmulq_m_s8): Likewise.
14157 (vmulq_m_s32): Likewise.
14158 (vmulq_m_s16): Likewise.
14159 (vmulq_m_u8): Likewise.
14160 (vmulq_m_u32): Likewise.
14161 (vmulq_m_u16): Likewise.
14162 (vornq_m_s8): Likewise.
14163 (vornq_m_s32): Likewise.
14164 (vornq_m_s16): Likewise.
14165 (vornq_m_u8): Likewise.
14166 (vornq_m_u32): Likewise.
14167 (vornq_m_u16): Likewise.
14168 (vorrq_m_s8): Likewise.
14169 (vorrq_m_s32): Likewise.
14170 (vorrq_m_s16): Likewise.
14171 (vorrq_m_u8): Likewise.
14172 (vorrq_m_u32): Likewise.
14173 (vorrq_m_u16): Likewise.
14174 (vqaddq_m_n_s8): Likewise.
14175 (vqaddq_m_n_s32): Likewise.
14176 (vqaddq_m_n_s16): Likewise.
14177 (vqaddq_m_n_u8): Likewise.
14178 (vqaddq_m_n_u32): Likewise.
14179 (vqaddq_m_n_u16): Likewise.
14180 (vqaddq_m_s8): Likewise.
14181 (vqaddq_m_s32): Likewise.
14182 (vqaddq_m_s16): Likewise.
14183 (vqaddq_m_u8): Likewise.
14184 (vqaddq_m_u32): Likewise.
14185 (vqaddq_m_u16): Likewise.
14186 (vqdmladhq_m_s8): Likewise.
14187 (vqdmladhq_m_s32): Likewise.
14188 (vqdmladhq_m_s16): Likewise.
14189 (vqdmladhxq_m_s8): Likewise.
14190 (vqdmladhxq_m_s32): Likewise.
14191 (vqdmladhxq_m_s16): Likewise.
14192 (vqdmlahq_m_n_s8): Likewise.
14193 (vqdmlahq_m_n_s32): Likewise.
14194 (vqdmlahq_m_n_s16): Likewise.
14195 (vqdmlahq_m_n_u8): Likewise.
14196 (vqdmlahq_m_n_u32): Likewise.
14197 (vqdmlahq_m_n_u16): Likewise.
14198 (vqdmlsdhq_m_s8): Likewise.
14199 (vqdmlsdhq_m_s32): Likewise.
14200 (vqdmlsdhq_m_s16): Likewise.
14201 (vqdmlsdhxq_m_s8): Likewise.
14202 (vqdmlsdhxq_m_s32): Likewise.
14203 (vqdmlsdhxq_m_s16): Likewise.
14204 (vqdmulhq_m_n_s8): Likewise.
14205 (vqdmulhq_m_n_s32): Likewise.
14206 (vqdmulhq_m_n_s16): Likewise.
14207 (vqdmulhq_m_s8): Likewise.
14208 (vqdmulhq_m_s32): Likewise.
14209 (vqdmulhq_m_s16): Likewise.
14210 (vqrdmladhq_m_s8): Likewise.
14211 (vqrdmladhq_m_s32): Likewise.
14212 (vqrdmladhq_m_s16): Likewise.
14213 (vqrdmladhxq_m_s8): Likewise.
14214 (vqrdmladhxq_m_s32): Likewise.
14215 (vqrdmladhxq_m_s16): Likewise.
14216 (vqrdmlahq_m_n_s8): Likewise.
14217 (vqrdmlahq_m_n_s32): Likewise.
14218 (vqrdmlahq_m_n_s16): Likewise.
14219 (vqrdmlahq_m_n_u8): Likewise.
14220 (vqrdmlahq_m_n_u32): Likewise.
14221 (vqrdmlahq_m_n_u16): Likewise.
14222 (vqrdmlashq_m_n_s8): Likewise.
14223 (vqrdmlashq_m_n_s32): Likewise.
14224 (vqrdmlashq_m_n_s16): Likewise.
14225 (vqrdmlashq_m_n_u8): Likewise.
14226 (vqrdmlashq_m_n_u32): Likewise.
14227 (vqrdmlashq_m_n_u16): Likewise.
14228 (vqrdmlsdhq_m_s8): Likewise.
14229 (vqrdmlsdhq_m_s32): Likewise.
14230 (vqrdmlsdhq_m_s16): Likewise.
14231 (vqrdmlsdhxq_m_s8): Likewise.
14232 (vqrdmlsdhxq_m_s32): Likewise.
14233 (vqrdmlsdhxq_m_s16): Likewise.
14234 (vqrdmulhq_m_n_s8): Likewise.
14235 (vqrdmulhq_m_n_s32): Likewise.
14236 (vqrdmulhq_m_n_s16): Likewise.
14237 (vqrdmulhq_m_s8): Likewise.
14238 (vqrdmulhq_m_s32): Likewise.
14239 (vqrdmulhq_m_s16): Likewise.
14240 (vqrshlq_m_s8): Likewise.
14241 (vqrshlq_m_s32): Likewise.
14242 (vqrshlq_m_s16): Likewise.
14243 (vqrshlq_m_u8): Likewise.
14244 (vqrshlq_m_u32): Likewise.
14245 (vqrshlq_m_u16): Likewise.
14246 (vqshlq_m_n_s8): Likewise.
14247 (vqshlq_m_n_s32): Likewise.
14248 (vqshlq_m_n_s16): Likewise.
14249 (vqshlq_m_n_u8): Likewise.
14250 (vqshlq_m_n_u32): Likewise.
14251 (vqshlq_m_n_u16): Likewise.
14252 (vqshlq_m_s8): Likewise.
14253 (vqshlq_m_s32): Likewise.
14254 (vqshlq_m_s16): Likewise.
14255 (vqshlq_m_u8): Likewise.
14256 (vqshlq_m_u32): Likewise.
14257 (vqshlq_m_u16): Likewise.
14258 (vqsubq_m_n_s8): Likewise.
14259 (vqsubq_m_n_s32): Likewise.
14260 (vqsubq_m_n_s16): Likewise.
14261 (vqsubq_m_n_u8): Likewise.
14262 (vqsubq_m_n_u32): Likewise.
14263 (vqsubq_m_n_u16): Likewise.
14264 (vqsubq_m_s8): Likewise.
14265 (vqsubq_m_s32): Likewise.
14266 (vqsubq_m_s16): Likewise.
14267 (vqsubq_m_u8): Likewise.
14268 (vqsubq_m_u32): Likewise.
14269 (vqsubq_m_u16): Likewise.
14270 (vrhaddq_m_s8): Likewise.
14271 (vrhaddq_m_s32): Likewise.
14272 (vrhaddq_m_s16): Likewise.
14273 (vrhaddq_m_u8): Likewise.
14274 (vrhaddq_m_u32): Likewise.
14275 (vrhaddq_m_u16): Likewise.
14276 (vrmulhq_m_s8): Likewise.
14277 (vrmulhq_m_s32): Likewise.
14278 (vrmulhq_m_s16): Likewise.
14279 (vrmulhq_m_u8): Likewise.
14280 (vrmulhq_m_u32): Likewise.
14281 (vrmulhq_m_u16): Likewise.
14282 (vrshlq_m_s8): Likewise.
14283 (vrshlq_m_s32): Likewise.
14284 (vrshlq_m_s16): Likewise.
14285 (vrshlq_m_u8): Likewise.
14286 (vrshlq_m_u32): Likewise.
14287 (vrshlq_m_u16): Likewise.
14288 (vrshrq_m_n_s8): Likewise.
14289 (vrshrq_m_n_s32): Likewise.
14290 (vrshrq_m_n_s16): Likewise.
14291 (vrshrq_m_n_u8): Likewise.
14292 (vrshrq_m_n_u32): Likewise.
14293 (vrshrq_m_n_u16): Likewise.
14294 (vshlq_m_n_s8): Likewise.
14295 (vshlq_m_n_s32): Likewise.
14296 (vshlq_m_n_s16): Likewise.
14297 (vshlq_m_n_u8): Likewise.
14298 (vshlq_m_n_u32): Likewise.
14299 (vshlq_m_n_u16): Likewise.
14300 (vshrq_m_n_s8): Likewise.
14301 (vshrq_m_n_s32): Likewise.
14302 (vshrq_m_n_s16): Likewise.
14303 (vshrq_m_n_u8): Likewise.
14304 (vshrq_m_n_u32): Likewise.
14305 (vshrq_m_n_u16): Likewise.
14306 (vsliq_m_n_s8): Likewise.
14307 (vsliq_m_n_s32): Likewise.
14308 (vsliq_m_n_s16): Likewise.
14309 (vsliq_m_n_u8): Likewise.
14310 (vsliq_m_n_u32): Likewise.
14311 (vsliq_m_n_u16): Likewise.
14312 (vsubq_m_n_s8): Likewise.
14313 (vsubq_m_n_s32): Likewise.
14314 (vsubq_m_n_s16): Likewise.
14315 (vsubq_m_n_u8): Likewise.
14316 (vsubq_m_n_u32): Likewise.
14317 (vsubq_m_n_u16): Likewise.
14318 (__arm_vabdq_m_s8): Define intrinsic.
14319 (__arm_vabdq_m_s32): Likewise.
14320 (__arm_vabdq_m_s16): Likewise.
14321 (__arm_vabdq_m_u8): Likewise.
14322 (__arm_vabdq_m_u32): Likewise.
14323 (__arm_vabdq_m_u16): Likewise.
14324 (__arm_vaddq_m_n_s8): Likewise.
14325 (__arm_vaddq_m_n_s32): Likewise.
14326 (__arm_vaddq_m_n_s16): Likewise.
14327 (__arm_vaddq_m_n_u8): Likewise.
14328 (__arm_vaddq_m_n_u32): Likewise.
14329 (__arm_vaddq_m_n_u16): Likewise.
14330 (__arm_vaddq_m_s8): Likewise.
14331 (__arm_vaddq_m_s32): Likewise.
14332 (__arm_vaddq_m_s16): Likewise.
14333 (__arm_vaddq_m_u8): Likewise.
14334 (__arm_vaddq_m_u32): Likewise.
14335 (__arm_vaddq_m_u16): Likewise.
14336 (__arm_vandq_m_s8): Likewise.
14337 (__arm_vandq_m_s32): Likewise.
14338 (__arm_vandq_m_s16): Likewise.
14339 (__arm_vandq_m_u8): Likewise.
14340 (__arm_vandq_m_u32): Likewise.
14341 (__arm_vandq_m_u16): Likewise.
14342 (__arm_vbicq_m_s8): Likewise.
14343 (__arm_vbicq_m_s32): Likewise.
14344 (__arm_vbicq_m_s16): Likewise.
14345 (__arm_vbicq_m_u8): Likewise.
14346 (__arm_vbicq_m_u32): Likewise.
14347 (__arm_vbicq_m_u16): Likewise.
14348 (__arm_vbrsrq_m_n_s8): Likewise.
14349 (__arm_vbrsrq_m_n_s32): Likewise.
14350 (__arm_vbrsrq_m_n_s16): Likewise.
14351 (__arm_vbrsrq_m_n_u8): Likewise.
14352 (__arm_vbrsrq_m_n_u32): Likewise.
14353 (__arm_vbrsrq_m_n_u16): Likewise.
14354 (__arm_vcaddq_rot270_m_s8): Likewise.
14355 (__arm_vcaddq_rot270_m_s32): Likewise.
14356 (__arm_vcaddq_rot270_m_s16): Likewise.
14357 (__arm_vcaddq_rot270_m_u8): Likewise.
14358 (__arm_vcaddq_rot270_m_u32): Likewise.
14359 (__arm_vcaddq_rot270_m_u16): Likewise.
14360 (__arm_vcaddq_rot90_m_s8): Likewise.
14361 (__arm_vcaddq_rot90_m_s32): Likewise.
14362 (__arm_vcaddq_rot90_m_s16): Likewise.
14363 (__arm_vcaddq_rot90_m_u8): Likewise.
14364 (__arm_vcaddq_rot90_m_u32): Likewise.
14365 (__arm_vcaddq_rot90_m_u16): Likewise.
14366 (__arm_veorq_m_s8): Likewise.
14367 (__arm_veorq_m_s32): Likewise.
14368 (__arm_veorq_m_s16): Likewise.
14369 (__arm_veorq_m_u8): Likewise.
14370 (__arm_veorq_m_u32): Likewise.
14371 (__arm_veorq_m_u16): Likewise.
14372 (__arm_vhaddq_m_n_s8): Likewise.
14373 (__arm_vhaddq_m_n_s32): Likewise.
14374 (__arm_vhaddq_m_n_s16): Likewise.
14375 (__arm_vhaddq_m_n_u8): Likewise.
14376 (__arm_vhaddq_m_n_u32): Likewise.
14377 (__arm_vhaddq_m_n_u16): Likewise.
14378 (__arm_vhaddq_m_s8): Likewise.
14379 (__arm_vhaddq_m_s32): Likewise.
14380 (__arm_vhaddq_m_s16): Likewise.
14381 (__arm_vhaddq_m_u8): Likewise.
14382 (__arm_vhaddq_m_u32): Likewise.
14383 (__arm_vhaddq_m_u16): Likewise.
14384 (__arm_vhcaddq_rot270_m_s8): Likewise.
14385 (__arm_vhcaddq_rot270_m_s32): Likewise.
14386 (__arm_vhcaddq_rot270_m_s16): Likewise.
14387 (__arm_vhcaddq_rot90_m_s8): Likewise.
14388 (__arm_vhcaddq_rot90_m_s32): Likewise.
14389 (__arm_vhcaddq_rot90_m_s16): Likewise.
14390 (__arm_vhsubq_m_n_s8): Likewise.
14391 (__arm_vhsubq_m_n_s32): Likewise.
14392 (__arm_vhsubq_m_n_s16): Likewise.
14393 (__arm_vhsubq_m_n_u8): Likewise.
14394 (__arm_vhsubq_m_n_u32): Likewise.
14395 (__arm_vhsubq_m_n_u16): Likewise.
14396 (__arm_vhsubq_m_s8): Likewise.
14397 (__arm_vhsubq_m_s32): Likewise.
14398 (__arm_vhsubq_m_s16): Likewise.
14399 (__arm_vhsubq_m_u8): Likewise.
14400 (__arm_vhsubq_m_u32): Likewise.
14401 (__arm_vhsubq_m_u16): Likewise.
14402 (__arm_vmaxq_m_s8): Likewise.
14403 (__arm_vmaxq_m_s32): Likewise.
14404 (__arm_vmaxq_m_s16): Likewise.
14405 (__arm_vmaxq_m_u8): Likewise.
14406 (__arm_vmaxq_m_u32): Likewise.
14407 (__arm_vmaxq_m_u16): Likewise.
14408 (__arm_vminq_m_s8): Likewise.
14409 (__arm_vminq_m_s32): Likewise.
14410 (__arm_vminq_m_s16): Likewise.
14411 (__arm_vminq_m_u8): Likewise.
14412 (__arm_vminq_m_u32): Likewise.
14413 (__arm_vminq_m_u16): Likewise.
14414 (__arm_vmladavaq_p_s8): Likewise.
14415 (__arm_vmladavaq_p_s32): Likewise.
14416 (__arm_vmladavaq_p_s16): Likewise.
14417 (__arm_vmladavaq_p_u8): Likewise.
14418 (__arm_vmladavaq_p_u32): Likewise.
14419 (__arm_vmladavaq_p_u16): Likewise.
14420 (__arm_vmladavaxq_p_s8): Likewise.
14421 (__arm_vmladavaxq_p_s32): Likewise.
14422 (__arm_vmladavaxq_p_s16): Likewise.
14423 (__arm_vmlaq_m_n_s8): Likewise.
14424 (__arm_vmlaq_m_n_s32): Likewise.
14425 (__arm_vmlaq_m_n_s16): Likewise.
14426 (__arm_vmlaq_m_n_u8): Likewise.
14427 (__arm_vmlaq_m_n_u32): Likewise.
14428 (__arm_vmlaq_m_n_u16): Likewise.
14429 (__arm_vmlasq_m_n_s8): Likewise.
14430 (__arm_vmlasq_m_n_s32): Likewise.
14431 (__arm_vmlasq_m_n_s16): Likewise.
14432 (__arm_vmlasq_m_n_u8): Likewise.
14433 (__arm_vmlasq_m_n_u32): Likewise.
14434 (__arm_vmlasq_m_n_u16): Likewise.
14435 (__arm_vmlsdavaq_p_s8): Likewise.
14436 (__arm_vmlsdavaq_p_s32): Likewise.
14437 (__arm_vmlsdavaq_p_s16): Likewise.
14438 (__arm_vmlsdavaxq_p_s8): Likewise.
14439 (__arm_vmlsdavaxq_p_s32): Likewise.
14440 (__arm_vmlsdavaxq_p_s16): Likewise.
14441 (__arm_vmulhq_m_s8): Likewise.
14442 (__arm_vmulhq_m_s32): Likewise.
14443 (__arm_vmulhq_m_s16): Likewise.
14444 (__arm_vmulhq_m_u8): Likewise.
14445 (__arm_vmulhq_m_u32): Likewise.
14446 (__arm_vmulhq_m_u16): Likewise.
14447 (__arm_vmullbq_int_m_s8): Likewise.
14448 (__arm_vmullbq_int_m_s32): Likewise.
14449 (__arm_vmullbq_int_m_s16): Likewise.
14450 (__arm_vmullbq_int_m_u8): Likewise.
14451 (__arm_vmullbq_int_m_u32): Likewise.
14452 (__arm_vmullbq_int_m_u16): Likewise.
14453 (__arm_vmulltq_int_m_s8): Likewise.
14454 (__arm_vmulltq_int_m_s32): Likewise.
14455 (__arm_vmulltq_int_m_s16): Likewise.
14456 (__arm_vmulltq_int_m_u8): Likewise.
14457 (__arm_vmulltq_int_m_u32): Likewise.
14458 (__arm_vmulltq_int_m_u16): Likewise.
14459 (__arm_vmulq_m_n_s8): Likewise.
14460 (__arm_vmulq_m_n_s32): Likewise.
14461 (__arm_vmulq_m_n_s16): Likewise.
14462 (__arm_vmulq_m_n_u8): Likewise.
14463 (__arm_vmulq_m_n_u32): Likewise.
14464 (__arm_vmulq_m_n_u16): Likewise.
14465 (__arm_vmulq_m_s8): Likewise.
14466 (__arm_vmulq_m_s32): Likewise.
14467 (__arm_vmulq_m_s16): Likewise.
14468 (__arm_vmulq_m_u8): Likewise.
14469 (__arm_vmulq_m_u32): Likewise.
14470 (__arm_vmulq_m_u16): Likewise.
14471 (__arm_vornq_m_s8): Likewise.
14472 (__arm_vornq_m_s32): Likewise.
14473 (__arm_vornq_m_s16): Likewise.
14474 (__arm_vornq_m_u8): Likewise.
14475 (__arm_vornq_m_u32): Likewise.
14476 (__arm_vornq_m_u16): Likewise.
14477 (__arm_vorrq_m_s8): Likewise.
14478 (__arm_vorrq_m_s32): Likewise.
14479 (__arm_vorrq_m_s16): Likewise.
14480 (__arm_vorrq_m_u8): Likewise.
14481 (__arm_vorrq_m_u32): Likewise.
14482 (__arm_vorrq_m_u16): Likewise.
14483 (__arm_vqaddq_m_n_s8): Likewise.
14484 (__arm_vqaddq_m_n_s32): Likewise.
14485 (__arm_vqaddq_m_n_s16): Likewise.
14486 (__arm_vqaddq_m_n_u8): Likewise.
14487 (__arm_vqaddq_m_n_u32): Likewise.
14488 (__arm_vqaddq_m_n_u16): Likewise.
14489 (__arm_vqaddq_m_s8): Likewise.
14490 (__arm_vqaddq_m_s32): Likewise.
14491 (__arm_vqaddq_m_s16): Likewise.
14492 (__arm_vqaddq_m_u8): Likewise.
14493 (__arm_vqaddq_m_u32): Likewise.
14494 (__arm_vqaddq_m_u16): Likewise.
14495 (__arm_vqdmladhq_m_s8): Likewise.
14496 (__arm_vqdmladhq_m_s32): Likewise.
14497 (__arm_vqdmladhq_m_s16): Likewise.
14498 (__arm_vqdmladhxq_m_s8): Likewise.
14499 (__arm_vqdmladhxq_m_s32): Likewise.
14500 (__arm_vqdmladhxq_m_s16): Likewise.
14501 (__arm_vqdmlahq_m_n_s8): Likewise.
14502 (__arm_vqdmlahq_m_n_s32): Likewise.
14503 (__arm_vqdmlahq_m_n_s16): Likewise.
14504 (__arm_vqdmlahq_m_n_u8): Likewise.
14505 (__arm_vqdmlahq_m_n_u32): Likewise.
14506 (__arm_vqdmlahq_m_n_u16): Likewise.
14507 (__arm_vqdmlsdhq_m_s8): Likewise.
14508 (__arm_vqdmlsdhq_m_s32): Likewise.
14509 (__arm_vqdmlsdhq_m_s16): Likewise.
14510 (__arm_vqdmlsdhxq_m_s8): Likewise.
14511 (__arm_vqdmlsdhxq_m_s32): Likewise.
14512 (__arm_vqdmlsdhxq_m_s16): Likewise.
14513 (__arm_vqdmulhq_m_n_s8): Likewise.
14514 (__arm_vqdmulhq_m_n_s32): Likewise.
14515 (__arm_vqdmulhq_m_n_s16): Likewise.
14516 (__arm_vqdmulhq_m_s8): Likewise.
14517 (__arm_vqdmulhq_m_s32): Likewise.
14518 (__arm_vqdmulhq_m_s16): Likewise.
14519 (__arm_vqrdmladhq_m_s8): Likewise.
14520 (__arm_vqrdmladhq_m_s32): Likewise.
14521 (__arm_vqrdmladhq_m_s16): Likewise.
14522 (__arm_vqrdmladhxq_m_s8): Likewise.
14523 (__arm_vqrdmladhxq_m_s32): Likewise.
14524 (__arm_vqrdmladhxq_m_s16): Likewise.
14525 (__arm_vqrdmlahq_m_n_s8): Likewise.
14526 (__arm_vqrdmlahq_m_n_s32): Likewise.
14527 (__arm_vqrdmlahq_m_n_s16): Likewise.
14528 (__arm_vqrdmlahq_m_n_u8): Likewise.
14529 (__arm_vqrdmlahq_m_n_u32): Likewise.
14530 (__arm_vqrdmlahq_m_n_u16): Likewise.
14531 (__arm_vqrdmlashq_m_n_s8): Likewise.
14532 (__arm_vqrdmlashq_m_n_s32): Likewise.
14533 (__arm_vqrdmlashq_m_n_s16): Likewise.
14534 (__arm_vqrdmlashq_m_n_u8): Likewise.
14535 (__arm_vqrdmlashq_m_n_u32): Likewise.
14536 (__arm_vqrdmlashq_m_n_u16): Likewise.
14537 (__arm_vqrdmlsdhq_m_s8): Likewise.
14538 (__arm_vqrdmlsdhq_m_s32): Likewise.
14539 (__arm_vqrdmlsdhq_m_s16): Likewise.
14540 (__arm_vqrdmlsdhxq_m_s8): Likewise.
14541 (__arm_vqrdmlsdhxq_m_s32): Likewise.
14542 (__arm_vqrdmlsdhxq_m_s16): Likewise.
14543 (__arm_vqrdmulhq_m_n_s8): Likewise.
14544 (__arm_vqrdmulhq_m_n_s32): Likewise.
14545 (__arm_vqrdmulhq_m_n_s16): Likewise.
14546 (__arm_vqrdmulhq_m_s8): Likewise.
14547 (__arm_vqrdmulhq_m_s32): Likewise.
14548 (__arm_vqrdmulhq_m_s16): Likewise.
14549 (__arm_vqrshlq_m_s8): Likewise.
14550 (__arm_vqrshlq_m_s32): Likewise.
14551 (__arm_vqrshlq_m_s16): Likewise.
14552 (__arm_vqrshlq_m_u8): Likewise.
14553 (__arm_vqrshlq_m_u32): Likewise.
14554 (__arm_vqrshlq_m_u16): Likewise.
14555 (__arm_vqshlq_m_n_s8): Likewise.
14556 (__arm_vqshlq_m_n_s32): Likewise.
14557 (__arm_vqshlq_m_n_s16): Likewise.
14558 (__arm_vqshlq_m_n_u8): Likewise.
14559 (__arm_vqshlq_m_n_u32): Likewise.
14560 (__arm_vqshlq_m_n_u16): Likewise.
14561 (__arm_vqshlq_m_s8): Likewise.
14562 (__arm_vqshlq_m_s32): Likewise.
14563 (__arm_vqshlq_m_s16): Likewise.
14564 (__arm_vqshlq_m_u8): Likewise.
14565 (__arm_vqshlq_m_u32): Likewise.
14566 (__arm_vqshlq_m_u16): Likewise.
14567 (__arm_vqsubq_m_n_s8): Likewise.
14568 (__arm_vqsubq_m_n_s32): Likewise.
14569 (__arm_vqsubq_m_n_s16): Likewise.
14570 (__arm_vqsubq_m_n_u8): Likewise.
14571 (__arm_vqsubq_m_n_u32): Likewise.
14572 (__arm_vqsubq_m_n_u16): Likewise.
14573 (__arm_vqsubq_m_s8): Likewise.
14574 (__arm_vqsubq_m_s32): Likewise.
14575 (__arm_vqsubq_m_s16): Likewise.
14576 (__arm_vqsubq_m_u8): Likewise.
14577 (__arm_vqsubq_m_u32): Likewise.
14578 (__arm_vqsubq_m_u16): Likewise.
14579 (__arm_vrhaddq_m_s8): Likewise.
14580 (__arm_vrhaddq_m_s32): Likewise.
14581 (__arm_vrhaddq_m_s16): Likewise.
14582 (__arm_vrhaddq_m_u8): Likewise.
14583 (__arm_vrhaddq_m_u32): Likewise.
14584 (__arm_vrhaddq_m_u16): Likewise.
14585 (__arm_vrmulhq_m_s8): Likewise.
14586 (__arm_vrmulhq_m_s32): Likewise.
14587 (__arm_vrmulhq_m_s16): Likewise.
14588 (__arm_vrmulhq_m_u8): Likewise.
14589 (__arm_vrmulhq_m_u32): Likewise.
14590 (__arm_vrmulhq_m_u16): Likewise.
14591 (__arm_vrshlq_m_s8): Likewise.
14592 (__arm_vrshlq_m_s32): Likewise.
14593 (__arm_vrshlq_m_s16): Likewise.
14594 (__arm_vrshlq_m_u8): Likewise.
14595 (__arm_vrshlq_m_u32): Likewise.
14596 (__arm_vrshlq_m_u16): Likewise.
14597 (__arm_vrshrq_m_n_s8): Likewise.
14598 (__arm_vrshrq_m_n_s32): Likewise.
14599 (__arm_vrshrq_m_n_s16): Likewise.
14600 (__arm_vrshrq_m_n_u8): Likewise.
14601 (__arm_vrshrq_m_n_u32): Likewise.
14602 (__arm_vrshrq_m_n_u16): Likewise.
14603 (__arm_vshlq_m_n_s8): Likewise.
14604 (__arm_vshlq_m_n_s32): Likewise.
14605 (__arm_vshlq_m_n_s16): Likewise.
14606 (__arm_vshlq_m_n_u8): Likewise.
14607 (__arm_vshlq_m_n_u32): Likewise.
14608 (__arm_vshlq_m_n_u16): Likewise.
14609 (__arm_vshrq_m_n_s8): Likewise.
14610 (__arm_vshrq_m_n_s32): Likewise.
14611 (__arm_vshrq_m_n_s16): Likewise.
14612 (__arm_vshrq_m_n_u8): Likewise.
14613 (__arm_vshrq_m_n_u32): Likewise.
14614 (__arm_vshrq_m_n_u16): Likewise.
14615 (__arm_vsliq_m_n_s8): Likewise.
14616 (__arm_vsliq_m_n_s32): Likewise.
14617 (__arm_vsliq_m_n_s16): Likewise.
14618 (__arm_vsliq_m_n_u8): Likewise.
14619 (__arm_vsliq_m_n_u32): Likewise.
14620 (__arm_vsliq_m_n_u16): Likewise.
14621 (__arm_vsubq_m_n_s8): Likewise.
14622 (__arm_vsubq_m_n_s32): Likewise.
14623 (__arm_vsubq_m_n_s16): Likewise.
14624 (__arm_vsubq_m_n_u8): Likewise.
14625 (__arm_vsubq_m_n_u32): Likewise.
14626 (__arm_vsubq_m_n_u16): Likewise.
14627 (vqdmladhq_m): Define polymorphic variant.
14628 (vqdmladhxq_m): Likewise.
14629 (vqdmlsdhq_m): Likewise.
14630 (vqdmlsdhxq_m): Likewise.
14631 (vabdq_m): Likewise.
14632 (vandq_m): Likewise.
14633 (vbicq_m): Likewise.
14634 (vbrsrq_m_n): Likewise.
14635 (vcaddq_rot270_m): Likewise.
14636 (vcaddq_rot90_m): Likewise.
14637 (veorq_m): Likewise.
14638 (vmaxq_m): Likewise.
14639 (vminq_m): Likewise.
14640 (vmladavaq_p): Likewise.
14641 (vmlaq_m_n): Likewise.
14642 (vmlasq_m_n): Likewise.
14643 (vmulhq_m): Likewise.
14644 (vmullbq_int_m): Likewise.
14645 (vmulltq_int_m): Likewise.
14646 (vornq_m): Likewise.
14647 (vorrq_m): Likewise.
14648 (vqdmlahq_m_n): Likewise.
14649 (vqrdmlahq_m_n): Likewise.
14650 (vqrdmlashq_m_n): Likewise.
14651 (vqrshlq_m): Likewise.
14652 (vqshlq_m_n): Likewise.
14653 (vqshlq_m): Likewise.
14654 (vrhaddq_m): Likewise.
14655 (vrmulhq_m): Likewise.
14656 (vrshlq_m): Likewise.
14657 (vrshrq_m_n): Likewise.
14658 (vshlq_m_n): Likewise.
14659 (vshrq_m_n): Likewise.
14660 (vsliq_m): Likewise.
14661 (vaddq_m_n): Likewise.
14662 (vaddq_m): Likewise.
14663 (vhaddq_m_n): Likewise.
14664 (vhaddq_m): Likewise.
14665 (vhcaddq_rot270_m): Likewise.
14666 (vhcaddq_rot90_m): Likewise.
14667 (vhsubq_m): Likewise.
14668 (vhsubq_m_n): Likewise.
14669 (vmulq_m_n): Likewise.
14670 (vmulq_m): Likewise.
14671 (vqaddq_m_n): Likewise.
14672 (vqaddq_m): Likewise.
14673 (vqdmulhq_m_n): Likewise.
14674 (vqdmulhq_m): Likewise.
14675 (vsubq_m_n): Likewise.
14676 (vsliq_m_n): Likewise.
14677 (vqsubq_m_n): Likewise.
14678 (vqsubq_m): Likewise.
14679 (vqrdmulhq_m): Likewise.
14680 (vqrdmulhq_m_n): Likewise.
14681 (vqrdmlsdhxq_m): Likewise.
14682 (vqrdmlsdhq_m): Likewise.
14683 (vqrdmladhq_m): Likewise.
14684 (vqrdmladhxq_m): Likewise.
14685 (vmlsdavaxq_p): Likewise.
14686 (vmlsdavaq_p): Likewise.
14687 (vmladavaxq_p): Likewise.
14688 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
14690 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
14691 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
14692 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
14693 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
14694 * config/arm/mve.md (VHSUBQ_M): Define iterators.
14695 (VSLIQ_M_N): Likewise.
14696 (VQRDMLAHQ_M_N): Likewise.
14697 (VRSHLQ_M): Likewise.
14698 (VMINQ_M): Likewise.
14699 (VMULLBQ_INT_M): Likewise.
14700 (VMULHQ_M): Likewise.
14701 (VMULQ_M): Likewise.
14702 (VHSUBQ_M_N): Likewise.
14703 (VHADDQ_M_N): Likewise.
14704 (VORRQ_M): Likewise.
14705 (VRMULHQ_M): Likewise.
14706 (VQADDQ_M): Likewise.
14707 (VRSHRQ_M_N): Likewise.
14708 (VQSUBQ_M_N): Likewise.
14709 (VADDQ_M): Likewise.
14710 (VORNQ_M): Likewise.
14711 (VQDMLAHQ_M_N): Likewise.
14712 (VRHADDQ_M): Likewise.
14713 (VQSHLQ_M): Likewise.
14714 (VANDQ_M): Likewise.
14715 (VBICQ_M): Likewise.
14716 (VSHLQ_M_N): Likewise.
14717 (VCADDQ_ROT270_M): Likewise.
14718 (VQRSHLQ_M): Likewise.
14719 (VQADDQ_M_N): Likewise.
14720 (VADDQ_M_N): Likewise.
14721 (VMAXQ_M): Likewise.
14722 (VQSUBQ_M): Likewise.
14723 (VMLASQ_M_N): Likewise.
14724 (VMLADAVAQ_P): Likewise.
14725 (VBRSRQ_M_N): Likewise.
14726 (VMULQ_M_N): Likewise.
14727 (VCADDQ_ROT90_M): Likewise.
14728 (VMULLTQ_INT_M): Likewise.
14729 (VEORQ_M): Likewise.
14730 (VSHRQ_M_N): Likewise.
14731 (VSUBQ_M_N): Likewise.
14732 (VHADDQ_M): Likewise.
14733 (VABDQ_M): Likewise.
14734 (VQRDMLASHQ_M_N): Likewise.
14735 (VMLAQ_M_N): Likewise.
14736 (VQSHLQ_M_N): Likewise.
14737 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
14738 (mve_vaddq_m_n_<supf><mode>): Likewise.
14739 (mve_vaddq_m_<supf><mode>): Likewise.
14740 (mve_vandq_m_<supf><mode>): Likewise.
14741 (mve_vbicq_m_<supf><mode>): Likewise.
14742 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
14743 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
14744 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
14745 (mve_veorq_m_<supf><mode>): Likewise.
14746 (mve_vhaddq_m_n_<supf><mode>): Likewise.
14747 (mve_vhaddq_m_<supf><mode>): Likewise.
14748 (mve_vhsubq_m_n_<supf><mode>): Likewise.
14749 (mve_vhsubq_m_<supf><mode>): Likewise.
14750 (mve_vmaxq_m_<supf><mode>): Likewise.
14751 (mve_vminq_m_<supf><mode>): Likewise.
14752 (mve_vmladavaq_p_<supf><mode>): Likewise.
14753 (mve_vmlaq_m_n_<supf><mode>): Likewise.
14754 (mve_vmlasq_m_n_<supf><mode>): Likewise.
14755 (mve_vmulhq_m_<supf><mode>): Likewise.
14756 (mve_vmullbq_int_m_<supf><mode>): Likewise.
14757 (mve_vmulltq_int_m_<supf><mode>): Likewise.
14758 (mve_vmulq_m_n_<supf><mode>): Likewise.
14759 (mve_vmulq_m_<supf><mode>): Likewise.
14760 (mve_vornq_m_<supf><mode>): Likewise.
14761 (mve_vorrq_m_<supf><mode>): Likewise.
14762 (mve_vqaddq_m_n_<supf><mode>): Likewise.
14763 (mve_vqaddq_m_<supf><mode>): Likewise.
14764 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
14765 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
14766 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
14767 (mve_vqrshlq_m_<supf><mode>): Likewise.
14768 (mve_vqshlq_m_n_<supf><mode>): Likewise.
14769 (mve_vqshlq_m_<supf><mode>): Likewise.
14770 (mve_vqsubq_m_n_<supf><mode>): Likewise.
14771 (mve_vqsubq_m_<supf><mode>): Likewise.
14772 (mve_vrhaddq_m_<supf><mode>): Likewise.
14773 (mve_vrmulhq_m_<supf><mode>): Likewise.
14774 (mve_vrshlq_m_<supf><mode>): Likewise.
14775 (mve_vrshrq_m_n_<supf><mode>): Likewise.
14776 (mve_vshlq_m_n_<supf><mode>): Likewise.
14777 (mve_vshrq_m_n_<supf><mode>): Likewise.
14778 (mve_vsliq_m_n_<supf><mode>): Likewise.
14779 (mve_vsubq_m_n_<supf><mode>): Likewise.
14780 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
14781 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
14782 (mve_vmladavaxq_p_s<mode>): Likewise.
14783 (mve_vmlsdavaq_p_s<mode>): Likewise.
14784 (mve_vmlsdavaxq_p_s<mode>): Likewise.
14785 (mve_vqdmladhq_m_s<mode>): Likewise.
14786 (mve_vqdmladhxq_m_s<mode>): Likewise.
14787 (mve_vqdmlsdhq_m_s<mode>): Likewise.
14788 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
14789 (mve_vqdmulhq_m_n_s<mode>): Likewise.
14790 (mve_vqdmulhq_m_s<mode>): Likewise.
14791 (mve_vqrdmladhq_m_s<mode>): Likewise.
14792 (mve_vqrdmladhxq_m_s<mode>): Likewise.
14793 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
14794 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
14795 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
14796 (mve_vqrdmulhq_m_s<mode>): Likewise.
14798 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14799 Mihail Ionescu <mihail.ionescu@arm.com>
14800 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14802 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
14803 Define builtin qualifier.
14804 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14805 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14806 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14807 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14808 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14809 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14810 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14811 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
14812 (vsubq_m_s8): Likewise.
14813 (vcvtq_m_n_f16_u16): Likewise.
14814 (vqshluq_m_n_s8): Likewise.
14815 (vabavq_p_s8): Likewise.
14816 (vsriq_m_n_u8): Likewise.
14817 (vshlq_m_u8): Likewise.
14818 (vsubq_m_u8): Likewise.
14819 (vabavq_p_u8): Likewise.
14820 (vshlq_m_s8): Likewise.
14821 (vcvtq_m_n_f16_s16): Likewise.
14822 (vsriq_m_n_s16): Likewise.
14823 (vsubq_m_s16): Likewise.
14824 (vcvtq_m_n_f32_u32): Likewise.
14825 (vqshluq_m_n_s16): Likewise.
14826 (vabavq_p_s16): Likewise.
14827 (vsriq_m_n_u16): Likewise.
14828 (vshlq_m_u16): Likewise.
14829 (vsubq_m_u16): Likewise.
14830 (vabavq_p_u16): Likewise.
14831 (vshlq_m_s16): Likewise.
14832 (vcvtq_m_n_f32_s32): Likewise.
14833 (vsriq_m_n_s32): Likewise.
14834 (vsubq_m_s32): Likewise.
14835 (vqshluq_m_n_s32): Likewise.
14836 (vabavq_p_s32): Likewise.
14837 (vsriq_m_n_u32): Likewise.
14838 (vshlq_m_u32): Likewise.
14839 (vsubq_m_u32): Likewise.
14840 (vabavq_p_u32): Likewise.
14841 (vshlq_m_s32): Likewise.
14842 (__arm_vsriq_m_n_s8): Define intrinsic.
14843 (__arm_vsubq_m_s8): Likewise.
14844 (__arm_vqshluq_m_n_s8): Likewise.
14845 (__arm_vabavq_p_s8): Likewise.
14846 (__arm_vsriq_m_n_u8): Likewise.
14847 (__arm_vshlq_m_u8): Likewise.
14848 (__arm_vsubq_m_u8): Likewise.
14849 (__arm_vabavq_p_u8): Likewise.
14850 (__arm_vshlq_m_s8): Likewise.
14851 (__arm_vsriq_m_n_s16): Likewise.
14852 (__arm_vsubq_m_s16): Likewise.
14853 (__arm_vqshluq_m_n_s16): Likewise.
14854 (__arm_vabavq_p_s16): Likewise.
14855 (__arm_vsriq_m_n_u16): Likewise.
14856 (__arm_vshlq_m_u16): Likewise.
14857 (__arm_vsubq_m_u16): Likewise.
14858 (__arm_vabavq_p_u16): Likewise.
14859 (__arm_vshlq_m_s16): Likewise.
14860 (__arm_vsriq_m_n_s32): Likewise.
14861 (__arm_vsubq_m_s32): Likewise.
14862 (__arm_vqshluq_m_n_s32): Likewise.
14863 (__arm_vabavq_p_s32): Likewise.
14864 (__arm_vsriq_m_n_u32): Likewise.
14865 (__arm_vshlq_m_u32): Likewise.
14866 (__arm_vsubq_m_u32): Likewise.
14867 (__arm_vabavq_p_u32): Likewise.
14868 (__arm_vshlq_m_s32): Likewise.
14869 (__arm_vcvtq_m_n_f16_u16): Likewise.
14870 (__arm_vcvtq_m_n_f16_s16): Likewise.
14871 (__arm_vcvtq_m_n_f32_u32): Likewise.
14872 (__arm_vcvtq_m_n_f32_s32): Likewise.
14873 (vcvtq_m_n): Define polymorphic variant.
14874 (vqshluq_m_n): Likewise.
14875 (vshlq_m): Likewise.
14876 (vsriq_m_n): Likewise.
14877 (vsubq_m): Likewise.
14878 (vabavq_p): Likewise.
14879 * config/arm/arm_mve_builtins.def
14880 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
14881 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
14882 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14883 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14884 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
14885 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14886 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
14887 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
14888 * config/arm/mve.md (VABAVQ_P): Define iterator.
14889 (VSHLQ_M): Likewise.
14890 (VSRIQ_M_N): Likewise.
14891 (VSUBQ_M): Likewise.
14892 (VCVTQ_M_N_TO_F): Likewise.
14893 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
14894 (mve_vqshluq_m_n_s<mode>): Likewise.
14895 (mve_vshlq_m_<supf><mode>): Likewise.
14896 (mve_vsriq_m_n_<supf><mode>): Likewise.
14897 (mve_vsubq_m_<supf><mode>): Likewise.
14898 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
14900 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14901 Mihail Ionescu <mihail.ionescu@arm.com>
14902 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14904 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
14905 (vrmlsldavhaq_s32): Likewise.
14906 (vrmlsldavhaxq_s32): Likewise.
14907 (vaddlvaq_p_s32): Likewise.
14908 (vcvtbq_m_f16_f32): Likewise.
14909 (vcvtbq_m_f32_f16): Likewise.
14910 (vcvttq_m_f16_f32): Likewise.
14911 (vcvttq_m_f32_f16): Likewise.
14912 (vrev16q_m_s8): Likewise.
14913 (vrev32q_m_f16): Likewise.
14914 (vrmlaldavhq_p_s32): Likewise.
14915 (vrmlaldavhxq_p_s32): Likewise.
14916 (vrmlsldavhq_p_s32): Likewise.
14917 (vrmlsldavhxq_p_s32): Likewise.
14918 (vaddlvaq_p_u32): Likewise.
14919 (vrev16q_m_u8): Likewise.
14920 (vrmlaldavhq_p_u32): Likewise.
14921 (vmvnq_m_n_s16): Likewise.
14922 (vorrq_m_n_s16): Likewise.
14923 (vqrshrntq_n_s16): Likewise.
14924 (vqshrnbq_n_s16): Likewise.
14925 (vqshrntq_n_s16): Likewise.
14926 (vrshrnbq_n_s16): Likewise.
14927 (vrshrntq_n_s16): Likewise.
14928 (vshrnbq_n_s16): Likewise.
14929 (vshrntq_n_s16): Likewise.
14930 (vcmlaq_f16): Likewise.
14931 (vcmlaq_rot180_f16): Likewise.
14932 (vcmlaq_rot270_f16): Likewise.
14933 (vcmlaq_rot90_f16): Likewise.
14934 (vfmaq_f16): Likewise.
14935 (vfmaq_n_f16): Likewise.
14936 (vfmasq_n_f16): Likewise.
14937 (vfmsq_f16): Likewise.
14938 (vmlaldavaq_s16): Likewise.
14939 (vmlaldavaxq_s16): Likewise.
14940 (vmlsldavaq_s16): Likewise.
14941 (vmlsldavaxq_s16): Likewise.
14942 (vabsq_m_f16): Likewise.
14943 (vcvtmq_m_s16_f16): Likewise.
14944 (vcvtnq_m_s16_f16): Likewise.
14945 (vcvtpq_m_s16_f16): Likewise.
14946 (vcvtq_m_s16_f16): Likewise.
14947 (vdupq_m_n_f16): Likewise.
14948 (vmaxnmaq_m_f16): Likewise.
14949 (vmaxnmavq_p_f16): Likewise.
14950 (vmaxnmvq_p_f16): Likewise.
14951 (vminnmaq_m_f16): Likewise.
14952 (vminnmavq_p_f16): Likewise.
14953 (vminnmvq_p_f16): Likewise.
14954 (vmlaldavq_p_s16): Likewise.
14955 (vmlaldavxq_p_s16): Likewise.
14956 (vmlsldavq_p_s16): Likewise.
14957 (vmlsldavxq_p_s16): Likewise.
14958 (vmovlbq_m_s8): Likewise.
14959 (vmovltq_m_s8): Likewise.
14960 (vmovnbq_m_s16): Likewise.
14961 (vmovntq_m_s16): Likewise.
14962 (vnegq_m_f16): Likewise.
14963 (vpselq_f16): Likewise.
14964 (vqmovnbq_m_s16): Likewise.
14965 (vqmovntq_m_s16): Likewise.
14966 (vrev32q_m_s8): Likewise.
14967 (vrev64q_m_f16): Likewise.
14968 (vrndaq_m_f16): Likewise.
14969 (vrndmq_m_f16): Likewise.
14970 (vrndnq_m_f16): Likewise.
14971 (vrndpq_m_f16): Likewise.
14972 (vrndq_m_f16): Likewise.
14973 (vrndxq_m_f16): Likewise.
14974 (vcmpeqq_m_n_f16): Likewise.
14975 (vcmpgeq_m_f16): Likewise.
14976 (vcmpgeq_m_n_f16): Likewise.
14977 (vcmpgtq_m_f16): Likewise.
14978 (vcmpgtq_m_n_f16): Likewise.
14979 (vcmpleq_m_f16): Likewise.
14980 (vcmpleq_m_n_f16): Likewise.
14981 (vcmpltq_m_f16): Likewise.
14982 (vcmpltq_m_n_f16): Likewise.
14983 (vcmpneq_m_f16): Likewise.
14984 (vcmpneq_m_n_f16): Likewise.
14985 (vmvnq_m_n_u16): Likewise.
14986 (vorrq_m_n_u16): Likewise.
14987 (vqrshruntq_n_s16): Likewise.
14988 (vqshrunbq_n_s16): Likewise.
14989 (vqshruntq_n_s16): Likewise.
14990 (vcvtmq_m_u16_f16): Likewise.
14991 (vcvtnq_m_u16_f16): Likewise.
14992 (vcvtpq_m_u16_f16): Likewise.
14993 (vcvtq_m_u16_f16): Likewise.
14994 (vqmovunbq_m_s16): Likewise.
14995 (vqmovuntq_m_s16): Likewise.
14996 (vqrshrntq_n_u16): Likewise.
14997 (vqshrnbq_n_u16): Likewise.
14998 (vqshrntq_n_u16): Likewise.
14999 (vrshrnbq_n_u16): Likewise.
15000 (vrshrntq_n_u16): Likewise.
15001 (vshrnbq_n_u16): Likewise.
15002 (vshrntq_n_u16): Likewise.
15003 (vmlaldavaq_u16): Likewise.
15004 (vmlaldavaxq_u16): Likewise.
15005 (vmlaldavq_p_u16): Likewise.
15006 (vmlaldavxq_p_u16): Likewise.
15007 (vmovlbq_m_u8): Likewise.
15008 (vmovltq_m_u8): Likewise.
15009 (vmovnbq_m_u16): Likewise.
15010 (vmovntq_m_u16): Likewise.
15011 (vqmovnbq_m_u16): Likewise.
15012 (vqmovntq_m_u16): Likewise.
15013 (vrev32q_m_u8): Likewise.
15014 (vmvnq_m_n_s32): Likewise.
15015 (vorrq_m_n_s32): Likewise.
15016 (vqrshrntq_n_s32): Likewise.
15017 (vqshrnbq_n_s32): Likewise.
15018 (vqshrntq_n_s32): Likewise.
15019 (vrshrnbq_n_s32): Likewise.
15020 (vrshrntq_n_s32): Likewise.
15021 (vshrnbq_n_s32): Likewise.
15022 (vshrntq_n_s32): Likewise.
15023 (vcmlaq_f32): Likewise.
15024 (vcmlaq_rot180_f32): Likewise.
15025 (vcmlaq_rot270_f32): Likewise.
15026 (vcmlaq_rot90_f32): Likewise.
15027 (vfmaq_f32): Likewise.
15028 (vfmaq_n_f32): Likewise.
15029 (vfmasq_n_f32): Likewise.
15030 (vfmsq_f32): Likewise.
15031 (vmlaldavaq_s32): Likewise.
15032 (vmlaldavaxq_s32): Likewise.
15033 (vmlsldavaq_s32): Likewise.
15034 (vmlsldavaxq_s32): Likewise.
15035 (vabsq_m_f32): Likewise.
15036 (vcvtmq_m_s32_f32): Likewise.
15037 (vcvtnq_m_s32_f32): Likewise.
15038 (vcvtpq_m_s32_f32): Likewise.
15039 (vcvtq_m_s32_f32): Likewise.
15040 (vdupq_m_n_f32): Likewise.
15041 (vmaxnmaq_m_f32): Likewise.
15042 (vmaxnmavq_p_f32): Likewise.
15043 (vmaxnmvq_p_f32): Likewise.
15044 (vminnmaq_m_f32): Likewise.
15045 (vminnmavq_p_f32): Likewise.
15046 (vminnmvq_p_f32): Likewise.
15047 (vmlaldavq_p_s32): Likewise.
15048 (vmlaldavxq_p_s32): Likewise.
15049 (vmlsldavq_p_s32): Likewise.
15050 (vmlsldavxq_p_s32): Likewise.
15051 (vmovlbq_m_s16): Likewise.
15052 (vmovltq_m_s16): Likewise.
15053 (vmovnbq_m_s32): Likewise.
15054 (vmovntq_m_s32): Likewise.
15055 (vnegq_m_f32): Likewise.
15056 (vpselq_f32): Likewise.
15057 (vqmovnbq_m_s32): Likewise.
15058 (vqmovntq_m_s32): Likewise.
15059 (vrev32q_m_s16): Likewise.
15060 (vrev64q_m_f32): Likewise.
15061 (vrndaq_m_f32): Likewise.
15062 (vrndmq_m_f32): Likewise.
15063 (vrndnq_m_f32): Likewise.
15064 (vrndpq_m_f32): Likewise.
15065 (vrndq_m_f32): Likewise.
15066 (vrndxq_m_f32): Likewise.
15067 (vcmpeqq_m_n_f32): Likewise.
15068 (vcmpgeq_m_f32): Likewise.
15069 (vcmpgeq_m_n_f32): Likewise.
15070 (vcmpgtq_m_f32): Likewise.
15071 (vcmpgtq_m_n_f32): Likewise.
15072 (vcmpleq_m_f32): Likewise.
15073 (vcmpleq_m_n_f32): Likewise.
15074 (vcmpltq_m_f32): Likewise.
15075 (vcmpltq_m_n_f32): Likewise.
15076 (vcmpneq_m_f32): Likewise.
15077 (vcmpneq_m_n_f32): Likewise.
15078 (vmvnq_m_n_u32): Likewise.
15079 (vorrq_m_n_u32): Likewise.
15080 (vqrshruntq_n_s32): Likewise.
15081 (vqshrunbq_n_s32): Likewise.
15082 (vqshruntq_n_s32): Likewise.
15083 (vcvtmq_m_u32_f32): Likewise.
15084 (vcvtnq_m_u32_f32): Likewise.
15085 (vcvtpq_m_u32_f32): Likewise.
15086 (vcvtq_m_u32_f32): Likewise.
15087 (vqmovunbq_m_s32): Likewise.
15088 (vqmovuntq_m_s32): Likewise.
15089 (vqrshrntq_n_u32): Likewise.
15090 (vqshrnbq_n_u32): Likewise.
15091 (vqshrntq_n_u32): Likewise.
15092 (vrshrnbq_n_u32): Likewise.
15093 (vrshrntq_n_u32): Likewise.
15094 (vshrnbq_n_u32): Likewise.
15095 (vshrntq_n_u32): Likewise.
15096 (vmlaldavaq_u32): Likewise.
15097 (vmlaldavaxq_u32): Likewise.
15098 (vmlaldavq_p_u32): Likewise.
15099 (vmlaldavxq_p_u32): Likewise.
15100 (vmovlbq_m_u16): Likewise.
15101 (vmovltq_m_u16): Likewise.
15102 (vmovnbq_m_u32): Likewise.
15103 (vmovntq_m_u32): Likewise.
15104 (vqmovnbq_m_u32): Likewise.
15105 (vqmovntq_m_u32): Likewise.
15106 (vrev32q_m_u16): Likewise.
15107 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
15108 (__arm_vrmlsldavhaq_s32): Likewise.
15109 (__arm_vrmlsldavhaxq_s32): Likewise.
15110 (__arm_vaddlvaq_p_s32): Likewise.
15111 (__arm_vrev16q_m_s8): Likewise.
15112 (__arm_vrmlaldavhq_p_s32): Likewise.
15113 (__arm_vrmlaldavhxq_p_s32): Likewise.
15114 (__arm_vrmlsldavhq_p_s32): Likewise.
15115 (__arm_vrmlsldavhxq_p_s32): Likewise.
15116 (__arm_vaddlvaq_p_u32): Likewise.
15117 (__arm_vrev16q_m_u8): Likewise.
15118 (__arm_vrmlaldavhq_p_u32): Likewise.
15119 (__arm_vmvnq_m_n_s16): Likewise.
15120 (__arm_vorrq_m_n_s16): Likewise.
15121 (__arm_vqrshrntq_n_s16): Likewise.
15122 (__arm_vqshrnbq_n_s16): Likewise.
15123 (__arm_vqshrntq_n_s16): Likewise.
15124 (__arm_vrshrnbq_n_s16): Likewise.
15125 (__arm_vrshrntq_n_s16): Likewise.
15126 (__arm_vshrnbq_n_s16): Likewise.
15127 (__arm_vshrntq_n_s16): Likewise.
15128 (__arm_vmlaldavaq_s16): Likewise.
15129 (__arm_vmlaldavaxq_s16): Likewise.
15130 (__arm_vmlsldavaq_s16): Likewise.
15131 (__arm_vmlsldavaxq_s16): Likewise.
15132 (__arm_vmlaldavq_p_s16): Likewise.
15133 (__arm_vmlaldavxq_p_s16): Likewise.
15134 (__arm_vmlsldavq_p_s16): Likewise.
15135 (__arm_vmlsldavxq_p_s16): Likewise.
15136 (__arm_vmovlbq_m_s8): Likewise.
15137 (__arm_vmovltq_m_s8): Likewise.
15138 (__arm_vmovnbq_m_s16): Likewise.
15139 (__arm_vmovntq_m_s16): Likewise.
15140 (__arm_vqmovnbq_m_s16): Likewise.
15141 (__arm_vqmovntq_m_s16): Likewise.
15142 (__arm_vrev32q_m_s8): Likewise.
15143 (__arm_vmvnq_m_n_u16): Likewise.
15144 (__arm_vorrq_m_n_u16): Likewise.
15145 (__arm_vqrshruntq_n_s16): Likewise.
15146 (__arm_vqshrunbq_n_s16): Likewise.
15147 (__arm_vqshruntq_n_s16): Likewise.
15148 (__arm_vqmovunbq_m_s16): Likewise.
15149 (__arm_vqmovuntq_m_s16): Likewise.
15150 (__arm_vqrshrntq_n_u16): Likewise.
15151 (__arm_vqshrnbq_n_u16): Likewise.
15152 (__arm_vqshrntq_n_u16): Likewise.
15153 (__arm_vrshrnbq_n_u16): Likewise.
15154 (__arm_vrshrntq_n_u16): Likewise.
15155 (__arm_vshrnbq_n_u16): Likewise.
15156 (__arm_vshrntq_n_u16): Likewise.
15157 (__arm_vmlaldavaq_u16): Likewise.
15158 (__arm_vmlaldavaxq_u16): Likewise.
15159 (__arm_vmlaldavq_p_u16): Likewise.
15160 (__arm_vmlaldavxq_p_u16): Likewise.
15161 (__arm_vmovlbq_m_u8): Likewise.
15162 (__arm_vmovltq_m_u8): Likewise.
15163 (__arm_vmovnbq_m_u16): Likewise.
15164 (__arm_vmovntq_m_u16): Likewise.
15165 (__arm_vqmovnbq_m_u16): Likewise.
15166 (__arm_vqmovntq_m_u16): Likewise.
15167 (__arm_vrev32q_m_u8): Likewise.
15168 (__arm_vmvnq_m_n_s32): Likewise.
15169 (__arm_vorrq_m_n_s32): Likewise.
15170 (__arm_vqrshrntq_n_s32): Likewise.
15171 (__arm_vqshrnbq_n_s32): Likewise.
15172 (__arm_vqshrntq_n_s32): Likewise.
15173 (__arm_vrshrnbq_n_s32): Likewise.
15174 (__arm_vrshrntq_n_s32): Likewise.
15175 (__arm_vshrnbq_n_s32): Likewise.
15176 (__arm_vshrntq_n_s32): Likewise.
15177 (__arm_vmlaldavaq_s32): Likewise.
15178 (__arm_vmlaldavaxq_s32): Likewise.
15179 (__arm_vmlsldavaq_s32): Likewise.
15180 (__arm_vmlsldavaxq_s32): Likewise.
15181 (__arm_vmlaldavq_p_s32): Likewise.
15182 (__arm_vmlaldavxq_p_s32): Likewise.
15183 (__arm_vmlsldavq_p_s32): Likewise.
15184 (__arm_vmlsldavxq_p_s32): Likewise.
15185 (__arm_vmovlbq_m_s16): Likewise.
15186 (__arm_vmovltq_m_s16): Likewise.
15187 (__arm_vmovnbq_m_s32): Likewise.
15188 (__arm_vmovntq_m_s32): Likewise.
15189 (__arm_vqmovnbq_m_s32): Likewise.
15190 (__arm_vqmovntq_m_s32): Likewise.
15191 (__arm_vrev32q_m_s16): Likewise.
15192 (__arm_vmvnq_m_n_u32): Likewise.
15193 (__arm_vorrq_m_n_u32): Likewise.
15194 (__arm_vqrshruntq_n_s32): Likewise.
15195 (__arm_vqshrunbq_n_s32): Likewise.
15196 (__arm_vqshruntq_n_s32): Likewise.
15197 (__arm_vqmovunbq_m_s32): Likewise.
15198 (__arm_vqmovuntq_m_s32): Likewise.
15199 (__arm_vqrshrntq_n_u32): Likewise.
15200 (__arm_vqshrnbq_n_u32): Likewise.
15201 (__arm_vqshrntq_n_u32): Likewise.
15202 (__arm_vrshrnbq_n_u32): Likewise.
15203 (__arm_vrshrntq_n_u32): Likewise.
15204 (__arm_vshrnbq_n_u32): Likewise.
15205 (__arm_vshrntq_n_u32): Likewise.
15206 (__arm_vmlaldavaq_u32): Likewise.
15207 (__arm_vmlaldavaxq_u32): Likewise.
15208 (__arm_vmlaldavq_p_u32): Likewise.
15209 (__arm_vmlaldavxq_p_u32): Likewise.
15210 (__arm_vmovlbq_m_u16): Likewise.
15211 (__arm_vmovltq_m_u16): Likewise.
15212 (__arm_vmovnbq_m_u32): Likewise.
15213 (__arm_vmovntq_m_u32): Likewise.
15214 (__arm_vqmovnbq_m_u32): Likewise.
15215 (__arm_vqmovntq_m_u32): Likewise.
15216 (__arm_vrev32q_m_u16): Likewise.
15217 (__arm_vcvtbq_m_f16_f32): Likewise.
15218 (__arm_vcvtbq_m_f32_f16): Likewise.
15219 (__arm_vcvttq_m_f16_f32): Likewise.
15220 (__arm_vcvttq_m_f32_f16): Likewise.
15221 (__arm_vrev32q_m_f16): Likewise.
15222 (__arm_vcmlaq_f16): Likewise.
15223 (__arm_vcmlaq_rot180_f16): Likewise.
15224 (__arm_vcmlaq_rot270_f16): Likewise.
15225 (__arm_vcmlaq_rot90_f16): Likewise.
15226 (__arm_vfmaq_f16): Likewise.
15227 (__arm_vfmaq_n_f16): Likewise.
15228 (__arm_vfmasq_n_f16): Likewise.
15229 (__arm_vfmsq_f16): Likewise.
15230 (__arm_vabsq_m_f16): Likewise.
15231 (__arm_vcvtmq_m_s16_f16): Likewise.
15232 (__arm_vcvtnq_m_s16_f16): Likewise.
15233 (__arm_vcvtpq_m_s16_f16): Likewise.
15234 (__arm_vcvtq_m_s16_f16): Likewise.
15235 (__arm_vdupq_m_n_f16): Likewise.
15236 (__arm_vmaxnmaq_m_f16): Likewise.
15237 (__arm_vmaxnmavq_p_f16): Likewise.
15238 (__arm_vmaxnmvq_p_f16): Likewise.
15239 (__arm_vminnmaq_m_f16): Likewise.
15240 (__arm_vminnmavq_p_f16): Likewise.
15241 (__arm_vminnmvq_p_f16): Likewise.
15242 (__arm_vnegq_m_f16): Likewise.
15243 (__arm_vpselq_f16): Likewise.
15244 (__arm_vrev64q_m_f16): Likewise.
15245 (__arm_vrndaq_m_f16): Likewise.
15246 (__arm_vrndmq_m_f16): Likewise.
15247 (__arm_vrndnq_m_f16): Likewise.
15248 (__arm_vrndpq_m_f16): Likewise.
15249 (__arm_vrndq_m_f16): Likewise.
15250 (__arm_vrndxq_m_f16): Likewise.
15251 (__arm_vcmpeqq_m_n_f16): Likewise.
15252 (__arm_vcmpgeq_m_f16): Likewise.
15253 (__arm_vcmpgeq_m_n_f16): Likewise.
15254 (__arm_vcmpgtq_m_f16): Likewise.
15255 (__arm_vcmpgtq_m_n_f16): Likewise.
15256 (__arm_vcmpleq_m_f16): Likewise.
15257 (__arm_vcmpleq_m_n_f16): Likewise.
15258 (__arm_vcmpltq_m_f16): Likewise.
15259 (__arm_vcmpltq_m_n_f16): Likewise.
15260 (__arm_vcmpneq_m_f16): Likewise.
15261 (__arm_vcmpneq_m_n_f16): Likewise.
15262 (__arm_vcvtmq_m_u16_f16): Likewise.
15263 (__arm_vcvtnq_m_u16_f16): Likewise.
15264 (__arm_vcvtpq_m_u16_f16): Likewise.
15265 (__arm_vcvtq_m_u16_f16): Likewise.
15266 (__arm_vcmlaq_f32): Likewise.
15267 (__arm_vcmlaq_rot180_f32): Likewise.
15268 (__arm_vcmlaq_rot270_f32): Likewise.
15269 (__arm_vcmlaq_rot90_f32): Likewise.
15270 (__arm_vfmaq_f32): Likewise.
15271 (__arm_vfmaq_n_f32): Likewise.
15272 (__arm_vfmasq_n_f32): Likewise.
15273 (__arm_vfmsq_f32): Likewise.
15274 (__arm_vabsq_m_f32): Likewise.
15275 (__arm_vcvtmq_m_s32_f32): Likewise.
15276 (__arm_vcvtnq_m_s32_f32): Likewise.
15277 (__arm_vcvtpq_m_s32_f32): Likewise.
15278 (__arm_vcvtq_m_s32_f32): Likewise.
15279 (__arm_vdupq_m_n_f32): Likewise.
15280 (__arm_vmaxnmaq_m_f32): Likewise.
15281 (__arm_vmaxnmavq_p_f32): Likewise.
15282 (__arm_vmaxnmvq_p_f32): Likewise.
15283 (__arm_vminnmaq_m_f32): Likewise.
15284 (__arm_vminnmavq_p_f32): Likewise.
15285 (__arm_vminnmvq_p_f32): Likewise.
15286 (__arm_vnegq_m_f32): Likewise.
15287 (__arm_vpselq_f32): Likewise.
15288 (__arm_vrev64q_m_f32): Likewise.
15289 (__arm_vrndaq_m_f32): Likewise.
15290 (__arm_vrndmq_m_f32): Likewise.
15291 (__arm_vrndnq_m_f32): Likewise.
15292 (__arm_vrndpq_m_f32): Likewise.
15293 (__arm_vrndq_m_f32): Likewise.
15294 (__arm_vrndxq_m_f32): Likewise.
15295 (__arm_vcmpeqq_m_n_f32): Likewise.
15296 (__arm_vcmpgeq_m_f32): Likewise.
15297 (__arm_vcmpgeq_m_n_f32): Likewise.
15298 (__arm_vcmpgtq_m_f32): Likewise.
15299 (__arm_vcmpgtq_m_n_f32): Likewise.
15300 (__arm_vcmpleq_m_f32): Likewise.
15301 (__arm_vcmpleq_m_n_f32): Likewise.
15302 (__arm_vcmpltq_m_f32): Likewise.
15303 (__arm_vcmpltq_m_n_f32): Likewise.
15304 (__arm_vcmpneq_m_f32): Likewise.
15305 (__arm_vcmpneq_m_n_f32): Likewise.
15306 (__arm_vcvtmq_m_u32_f32): Likewise.
15307 (__arm_vcvtnq_m_u32_f32): Likewise.
15308 (__arm_vcvtpq_m_u32_f32): Likewise.
15309 (__arm_vcvtq_m_u32_f32): Likewise.
15310 (vcvtq_m): Define polymorphic variant.
15311 (vabsq_m): Likewise.
15312 (vcmlaq): Likewise.
15313 (vcmlaq_rot180): Likewise.
15314 (vcmlaq_rot270): Likewise.
15315 (vcmlaq_rot90): Likewise.
15316 (vcmpeqq_m_n): Likewise.
15317 (vcmpgeq_m_n): Likewise.
15318 (vrndxq_m): Likewise.
15319 (vrndq_m): Likewise.
15320 (vrndpq_m): Likewise.
15321 (vcmpgtq_m_n): Likewise.
15322 (vcmpgtq_m): Likewise.
15323 (vcmpleq_m): Likewise.
15324 (vcmpleq_m_n): Likewise.
15325 (vcmpltq_m_n): Likewise.
15326 (vcmpltq_m): Likewise.
15327 (vcmpneq_m): Likewise.
15328 (vcmpneq_m_n): Likewise.
15329 (vcvtbq_m): Likewise.
15330 (vcvttq_m): Likewise.
15331 (vcvtmq_m): Likewise.
15332 (vcvtnq_m): Likewise.
15333 (vcvtpq_m): Likewise.
15334 (vdupq_m_n): Likewise.
15335 (vfmaq_n): Likewise.
15337 (vfmasq_n): Likewise.
15339 (vmaxnmaq_m): Likewise.
15340 (vmaxnmavq_m): Likewise.
15341 (vmaxnmvq_m): Likewise.
15342 (vmaxnmavq_p): Likewise.
15343 (vmaxnmvq_p): Likewise.
15344 (vminnmaq_m): Likewise.
15345 (vminnmavq_p): Likewise.
15346 (vminnmvq_p): Likewise.
15347 (vrndnq_m): Likewise.
15348 (vrndaq_m): Likewise.
15349 (vrndmq_m): Likewise.
15350 (vrev64q_m): Likewise.
15351 (vrev32q_m): Likewise.
15352 (vpselq): Likewise.
15353 (vnegq_m): Likewise.
15354 (vcmpgeq_m): Likewise.
15355 (vshrntq_n): Likewise.
15356 (vrshrntq_n): Likewise.
15357 (vmovlbq_m): Likewise.
15358 (vmovnbq_m): Likewise.
15359 (vmovntq_m): Likewise.
15360 (vmvnq_m_n): Likewise.
15361 (vmvnq_m): Likewise.
15362 (vshrnbq_n): Likewise.
15363 (vrshrnbq_n): Likewise.
15364 (vqshruntq_n): Likewise.
15365 (vrev16q_m): Likewise.
15366 (vqshrunbq_n): Likewise.
15367 (vqshrntq_n): Likewise.
15368 (vqrshruntq_n): Likewise.
15369 (vqrshrntq_n): Likewise.
15370 (vqshrnbq_n): Likewise.
15371 (vqmovuntq_m): Likewise.
15372 (vqmovntq_m): Likewise.
15373 (vqmovnbq_m): Likewise.
15374 (vorrq_m_n): Likewise.
15375 (vmovltq_m): Likewise.
15376 (vqmovunbq_m): Likewise.
15377 (vaddlvaq_p): Likewise.
15378 (vmlaldavaq): Likewise.
15379 (vmlaldavaxq): Likewise.
15380 (vmlaldavq_p): Likewise.
15381 (vmlaldavxq_p): Likewise.
15382 (vmlsldavaq): Likewise.
15383 (vmlsldavaxq): Likewise.
15384 (vmlsldavq_p): Likewise.
15385 (vmlsldavxq_p): Likewise.
15386 (vrmlaldavhaxq): Likewise.
15387 (vrmlaldavhq_p): Likewise.
15388 (vrmlaldavhxq_p): Likewise.
15389 (vrmlsldavhaq): Likewise.
15390 (vrmlsldavhaxq): Likewise.
15391 (vrmlsldavhq_p): Likewise.
15392 (vrmlsldavhxq_p): Likewise.
15393 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
15395 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
15396 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
15397 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
15398 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
15399 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
15400 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
15401 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
15402 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
15403 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
15404 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
15405 (MVE_pred3): Likewise.
15406 (MVE_constraint1): Likewise.
15407 (MVE_pred1): Likewise.
15408 (VMLALDAVQ_P): Define iterator.
15409 (VQMOVNBQ_M): Likewise.
15410 (VMOVLTQ_M): Likewise.
15411 (VMOVNBQ_M): Likewise.
15412 (VRSHRNTQ_N): Likewise.
15413 (VORRQ_M_N): Likewise.
15414 (VREV32Q_M): Likewise.
15415 (VREV16Q_M): Likewise.
15416 (VQRSHRNTQ_N): Likewise.
15417 (VMOVNTQ_M): Likewise.
15418 (VMOVLBQ_M): Likewise.
15419 (VMLALDAVAQ): Likewise.
15420 (VQSHRNBQ_N): Likewise.
15421 (VSHRNBQ_N): Likewise.
15422 (VRSHRNBQ_N): Likewise.
15423 (VMLALDAVXQ_P): Likewise.
15424 (VQMOVNTQ_M): Likewise.
15425 (VMVNQ_M_N): Likewise.
15426 (VQSHRNTQ_N): Likewise.
15427 (VMLALDAVAXQ): Likewise.
15428 (VSHRNTQ_N): Likewise.
15429 (VCVTMQ_M): Likewise.
15430 (VCVTNQ_M): Likewise.
15431 (VCVTPQ_M): Likewise.
15432 (VCVTQ_M_N_FROM_F): Likewise.
15433 (VCVTQ_M_FROM_F): Likewise.
15434 (VRMLALDAVHQ_P): Likewise.
15435 (VADDLVAQ_P): Likewise.
15436 (mve_vrndq_m_f<mode>): Define RTL pattern.
15437 (mve_vabsq_m_f<mode>): Likewise.
15438 (mve_vaddlvaq_p_<supf>v4si): Likewise.
15439 (mve_vcmlaq_f<mode>): Likewise.
15440 (mve_vcmlaq_rot180_f<mode>): Likewise.
15441 (mve_vcmlaq_rot270_f<mode>): Likewise.
15442 (mve_vcmlaq_rot90_f<mode>): Likewise.
15443 (mve_vcmpeqq_m_n_f<mode>): Likewise.
15444 (mve_vcmpgeq_m_f<mode>): Likewise.
15445 (mve_vcmpgeq_m_n_f<mode>): Likewise.
15446 (mve_vcmpgtq_m_f<mode>): Likewise.
15447 (mve_vcmpgtq_m_n_f<mode>): Likewise.
15448 (mve_vcmpleq_m_f<mode>): Likewise.
15449 (mve_vcmpleq_m_n_f<mode>): Likewise.
15450 (mve_vcmpltq_m_f<mode>): Likewise.
15451 (mve_vcmpltq_m_n_f<mode>): Likewise.
15452 (mve_vcmpneq_m_f<mode>): Likewise.
15453 (mve_vcmpneq_m_n_f<mode>): Likewise.
15454 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
15455 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
15456 (mve_vcvttq_m_f16_f32v8hf): Likewise.
15457 (mve_vcvttq_m_f32_f16v4sf): Likewise.
15458 (mve_vdupq_m_n_f<mode>): Likewise.
15459 (mve_vfmaq_f<mode>): Likewise.
15460 (mve_vfmaq_n_f<mode>): Likewise.
15461 (mve_vfmasq_n_f<mode>): Likewise.
15462 (mve_vfmsq_f<mode>): Likewise.
15463 (mve_vmaxnmaq_m_f<mode>): Likewise.
15464 (mve_vmaxnmavq_p_f<mode>): Likewise.
15465 (mve_vmaxnmvq_p_f<mode>): Likewise.
15466 (mve_vminnmaq_m_f<mode>): Likewise.
15467 (mve_vminnmavq_p_f<mode>): Likewise.
15468 (mve_vminnmvq_p_f<mode>): Likewise.
15469 (mve_vmlaldavaq_<supf><mode>): Likewise.
15470 (mve_vmlaldavaxq_<supf><mode>): Likewise.
15471 (mve_vmlaldavq_p_<supf><mode>): Likewise.
15472 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
15473 (mve_vmlsldavaq_s<mode>): Likewise.
15474 (mve_vmlsldavaxq_s<mode>): Likewise.
15475 (mve_vmlsldavq_p_s<mode>): Likewise.
15476 (mve_vmlsldavxq_p_s<mode>): Likewise.
15477 (mve_vmovlbq_m_<supf><mode>): Likewise.
15478 (mve_vmovltq_m_<supf><mode>): Likewise.
15479 (mve_vmovnbq_m_<supf><mode>): Likewise.
15480 (mve_vmovntq_m_<supf><mode>): Likewise.
15481 (mve_vmvnq_m_n_<supf><mode>): Likewise.
15482 (mve_vnegq_m_f<mode>): Likewise.
15483 (mve_vorrq_m_n_<supf><mode>): Likewise.
15484 (mve_vpselq_f<mode>): Likewise.
15485 (mve_vqmovnbq_m_<supf><mode>): Likewise.
15486 (mve_vqmovntq_m_<supf><mode>): Likewise.
15487 (mve_vqmovunbq_m_s<mode>): Likewise.
15488 (mve_vqmovuntq_m_s<mode>): Likewise.
15489 (mve_vqrshrntq_n_<supf><mode>): Likewise.
15490 (mve_vqrshruntq_n_s<mode>): Likewise.
15491 (mve_vqshrnbq_n_<supf><mode>): Likewise.
15492 (mve_vqshrntq_n_<supf><mode>): Likewise.
15493 (mve_vqshrunbq_n_s<mode>): Likewise.
15494 (mve_vqshruntq_n_s<mode>): Likewise.
15495 (mve_vrev32q_m_fv8hf): Likewise.
15496 (mve_vrev32q_m_<supf><mode>): Likewise.
15497 (mve_vrev64q_m_f<mode>): Likewise.
15498 (mve_vrmlaldavhaxq_sv4si): Likewise.
15499 (mve_vrmlaldavhxq_p_sv4si): Likewise.
15500 (mve_vrmlsldavhaxq_sv4si): Likewise.
15501 (mve_vrmlsldavhq_p_sv4si): Likewise.
15502 (mve_vrmlsldavhxq_p_sv4si): Likewise.
15503 (mve_vrndaq_m_f<mode>): Likewise.
15504 (mve_vrndmq_m_f<mode>): Likewise.
15505 (mve_vrndnq_m_f<mode>): Likewise.
15506 (mve_vrndpq_m_f<mode>): Likewise.
15507 (mve_vrndxq_m_f<mode>): Likewise.
15508 (mve_vrshrnbq_n_<supf><mode>): Likewise.
15509 (mve_vrshrntq_n_<supf><mode>): Likewise.
15510 (mve_vshrnbq_n_<supf><mode>): Likewise.
15511 (mve_vshrntq_n_<supf><mode>): Likewise.
15512 (mve_vcvtmq_m_<supf><mode>): Likewise.
15513 (mve_vcvtpq_m_<supf><mode>): Likewise.
15514 (mve_vcvtnq_m_<supf><mode>): Likewise.
15515 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
15516 (mve_vrev16q_m_<supf>v16qi): Likewise.
15517 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
15518 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
15519 (mve_vrmlsldavhaq_sv4si): Likewise.
15521 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15522 Mihail Ionescu <mihail.ionescu@arm.com>
15523 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15525 * config/arm/arm_mve.h (vpselq_u8): Define macro.
15526 (vpselq_s8): Likewise.
15527 (vrev64q_m_u8): Likewise.
15528 (vqrdmlashq_n_u8): Likewise.
15529 (vqrdmlahq_n_u8): Likewise.
15530 (vqdmlahq_n_u8): Likewise.
15531 (vmvnq_m_u8): Likewise.
15532 (vmlasq_n_u8): Likewise.
15533 (vmlaq_n_u8): Likewise.
15534 (vmladavq_p_u8): Likewise.
15535 (vmladavaq_u8): Likewise.
15536 (vminvq_p_u8): Likewise.
15537 (vmaxvq_p_u8): Likewise.
15538 (vdupq_m_n_u8): Likewise.
15539 (vcmpneq_m_u8): Likewise.
15540 (vcmpneq_m_n_u8): Likewise.
15541 (vcmphiq_m_u8): Likewise.
15542 (vcmphiq_m_n_u8): Likewise.
15543 (vcmpeqq_m_u8): Likewise.
15544 (vcmpeqq_m_n_u8): Likewise.
15545 (vcmpcsq_m_u8): Likewise.
15546 (vcmpcsq_m_n_u8): Likewise.
15547 (vclzq_m_u8): Likewise.
15548 (vaddvaq_p_u8): Likewise.
15549 (vsriq_n_u8): Likewise.
15550 (vsliq_n_u8): Likewise.
15551 (vshlq_m_r_u8): Likewise.
15552 (vrshlq_m_n_u8): Likewise.
15553 (vqshlq_m_r_u8): Likewise.
15554 (vqrshlq_m_n_u8): Likewise.
15555 (vminavq_p_s8): Likewise.
15556 (vminaq_m_s8): Likewise.
15557 (vmaxavq_p_s8): Likewise.
15558 (vmaxaq_m_s8): Likewise.
15559 (vcmpneq_m_s8): Likewise.
15560 (vcmpneq_m_n_s8): Likewise.
15561 (vcmpltq_m_s8): Likewise.
15562 (vcmpltq_m_n_s8): Likewise.
15563 (vcmpleq_m_s8): Likewise.
15564 (vcmpleq_m_n_s8): Likewise.
15565 (vcmpgtq_m_s8): Likewise.
15566 (vcmpgtq_m_n_s8): Likewise.
15567 (vcmpgeq_m_s8): Likewise.
15568 (vcmpgeq_m_n_s8): Likewise.
15569 (vcmpeqq_m_s8): Likewise.
15570 (vcmpeqq_m_n_s8): Likewise.
15571 (vshlq_m_r_s8): Likewise.
15572 (vrshlq_m_n_s8): Likewise.
15573 (vrev64q_m_s8): Likewise.
15574 (vqshlq_m_r_s8): Likewise.
15575 (vqrshlq_m_n_s8): Likewise.
15576 (vqnegq_m_s8): Likewise.
15577 (vqabsq_m_s8): Likewise.
15578 (vnegq_m_s8): Likewise.
15579 (vmvnq_m_s8): Likewise.
15580 (vmlsdavxq_p_s8): Likewise.
15581 (vmlsdavq_p_s8): Likewise.
15582 (vmladavxq_p_s8): Likewise.
15583 (vmladavq_p_s8): Likewise.
15584 (vminvq_p_s8): Likewise.
15585 (vmaxvq_p_s8): Likewise.
15586 (vdupq_m_n_s8): Likewise.
15587 (vclzq_m_s8): Likewise.
15588 (vclsq_m_s8): Likewise.
15589 (vaddvaq_p_s8): Likewise.
15590 (vabsq_m_s8): Likewise.
15591 (vqrdmlsdhxq_s8): Likewise.
15592 (vqrdmlsdhq_s8): Likewise.
15593 (vqrdmlashq_n_s8): Likewise.
15594 (vqrdmlahq_n_s8): Likewise.
15595 (vqrdmladhxq_s8): Likewise.
15596 (vqrdmladhq_s8): Likewise.
15597 (vqdmlsdhxq_s8): Likewise.
15598 (vqdmlsdhq_s8): Likewise.
15599 (vqdmlahq_n_s8): Likewise.
15600 (vqdmladhxq_s8): Likewise.
15601 (vqdmladhq_s8): Likewise.
15602 (vmlsdavaxq_s8): Likewise.
15603 (vmlsdavaq_s8): Likewise.
15604 (vmlasq_n_s8): Likewise.
15605 (vmlaq_n_s8): Likewise.
15606 (vmladavaxq_s8): Likewise.
15607 (vmladavaq_s8): Likewise.
15608 (vsriq_n_s8): Likewise.
15609 (vsliq_n_s8): Likewise.
15610 (vpselq_u16): Likewise.
15611 (vpselq_s16): Likewise.
15612 (vrev64q_m_u16): Likewise.
15613 (vqrdmlashq_n_u16): Likewise.
15614 (vqrdmlahq_n_u16): Likewise.
15615 (vqdmlahq_n_u16): Likewise.
15616 (vmvnq_m_u16): Likewise.
15617 (vmlasq_n_u16): Likewise.
15618 (vmlaq_n_u16): Likewise.
15619 (vmladavq_p_u16): Likewise.
15620 (vmladavaq_u16): Likewise.
15621 (vminvq_p_u16): Likewise.
15622 (vmaxvq_p_u16): Likewise.
15623 (vdupq_m_n_u16): Likewise.
15624 (vcmpneq_m_u16): Likewise.
15625 (vcmpneq_m_n_u16): Likewise.
15626 (vcmphiq_m_u16): Likewise.
15627 (vcmphiq_m_n_u16): Likewise.
15628 (vcmpeqq_m_u16): Likewise.
15629 (vcmpeqq_m_n_u16): Likewise.
15630 (vcmpcsq_m_u16): Likewise.
15631 (vcmpcsq_m_n_u16): Likewise.
15632 (vclzq_m_u16): Likewise.
15633 (vaddvaq_p_u16): Likewise.
15634 (vsriq_n_u16): Likewise.
15635 (vsliq_n_u16): Likewise.
15636 (vshlq_m_r_u16): Likewise.
15637 (vrshlq_m_n_u16): Likewise.
15638 (vqshlq_m_r_u16): Likewise.
15639 (vqrshlq_m_n_u16): Likewise.
15640 (vminavq_p_s16): Likewise.
15641 (vminaq_m_s16): Likewise.
15642 (vmaxavq_p_s16): Likewise.
15643 (vmaxaq_m_s16): Likewise.
15644 (vcmpneq_m_s16): Likewise.
15645 (vcmpneq_m_n_s16): Likewise.
15646 (vcmpltq_m_s16): Likewise.
15647 (vcmpltq_m_n_s16): Likewise.
15648 (vcmpleq_m_s16): Likewise.
15649 (vcmpleq_m_n_s16): Likewise.
15650 (vcmpgtq_m_s16): Likewise.
15651 (vcmpgtq_m_n_s16): Likewise.
15652 (vcmpgeq_m_s16): Likewise.
15653 (vcmpgeq_m_n_s16): Likewise.
15654 (vcmpeqq_m_s16): Likewise.
15655 (vcmpeqq_m_n_s16): Likewise.
15656 (vshlq_m_r_s16): Likewise.
15657 (vrshlq_m_n_s16): Likewise.
15658 (vrev64q_m_s16): Likewise.
15659 (vqshlq_m_r_s16): Likewise.
15660 (vqrshlq_m_n_s16): Likewise.
15661 (vqnegq_m_s16): Likewise.
15662 (vqabsq_m_s16): Likewise.
15663 (vnegq_m_s16): Likewise.
15664 (vmvnq_m_s16): Likewise.
15665 (vmlsdavxq_p_s16): Likewise.
15666 (vmlsdavq_p_s16): Likewise.
15667 (vmladavxq_p_s16): Likewise.
15668 (vmladavq_p_s16): Likewise.
15669 (vminvq_p_s16): Likewise.
15670 (vmaxvq_p_s16): Likewise.
15671 (vdupq_m_n_s16): Likewise.
15672 (vclzq_m_s16): Likewise.
15673 (vclsq_m_s16): Likewise.
15674 (vaddvaq_p_s16): Likewise.
15675 (vabsq_m_s16): Likewise.
15676 (vqrdmlsdhxq_s16): Likewise.
15677 (vqrdmlsdhq_s16): Likewise.
15678 (vqrdmlashq_n_s16): Likewise.
15679 (vqrdmlahq_n_s16): Likewise.
15680 (vqrdmladhxq_s16): Likewise.
15681 (vqrdmladhq_s16): Likewise.
15682 (vqdmlsdhxq_s16): Likewise.
15683 (vqdmlsdhq_s16): Likewise.
15684 (vqdmlahq_n_s16): Likewise.
15685 (vqdmladhxq_s16): Likewise.
15686 (vqdmladhq_s16): Likewise.
15687 (vmlsdavaxq_s16): Likewise.
15688 (vmlsdavaq_s16): Likewise.
15689 (vmlasq_n_s16): Likewise.
15690 (vmlaq_n_s16): Likewise.
15691 (vmladavaxq_s16): Likewise.
15692 (vmladavaq_s16): Likewise.
15693 (vsriq_n_s16): Likewise.
15694 (vsliq_n_s16): Likewise.
15695 (vpselq_u32): Likewise.
15696 (vpselq_s32): Likewise.
15697 (vrev64q_m_u32): Likewise.
15698 (vqrdmlashq_n_u32): Likewise.
15699 (vqrdmlahq_n_u32): Likewise.
15700 (vqdmlahq_n_u32): Likewise.
15701 (vmvnq_m_u32): Likewise.
15702 (vmlasq_n_u32): Likewise.
15703 (vmlaq_n_u32): Likewise.
15704 (vmladavq_p_u32): Likewise.
15705 (vmladavaq_u32): Likewise.
15706 (vminvq_p_u32): Likewise.
15707 (vmaxvq_p_u32): Likewise.
15708 (vdupq_m_n_u32): Likewise.
15709 (vcmpneq_m_u32): Likewise.
15710 (vcmpneq_m_n_u32): Likewise.
15711 (vcmphiq_m_u32): Likewise.
15712 (vcmphiq_m_n_u32): Likewise.
15713 (vcmpeqq_m_u32): Likewise.
15714 (vcmpeqq_m_n_u32): Likewise.
15715 (vcmpcsq_m_u32): Likewise.
15716 (vcmpcsq_m_n_u32): Likewise.
15717 (vclzq_m_u32): Likewise.
15718 (vaddvaq_p_u32): Likewise.
15719 (vsriq_n_u32): Likewise.
15720 (vsliq_n_u32): Likewise.
15721 (vshlq_m_r_u32): Likewise.
15722 (vrshlq_m_n_u32): Likewise.
15723 (vqshlq_m_r_u32): Likewise.
15724 (vqrshlq_m_n_u32): Likewise.
15725 (vminavq_p_s32): Likewise.
15726 (vminaq_m_s32): Likewise.
15727 (vmaxavq_p_s32): Likewise.
15728 (vmaxaq_m_s32): Likewise.
15729 (vcmpneq_m_s32): Likewise.
15730 (vcmpneq_m_n_s32): Likewise.
15731 (vcmpltq_m_s32): Likewise.
15732 (vcmpltq_m_n_s32): Likewise.
15733 (vcmpleq_m_s32): Likewise.
15734 (vcmpleq_m_n_s32): Likewise.
15735 (vcmpgtq_m_s32): Likewise.
15736 (vcmpgtq_m_n_s32): Likewise.
15737 (vcmpgeq_m_s32): Likewise.
15738 (vcmpgeq_m_n_s32): Likewise.
15739 (vcmpeqq_m_s32): Likewise.
15740 (vcmpeqq_m_n_s32): Likewise.
15741 (vshlq_m_r_s32): Likewise.
15742 (vrshlq_m_n_s32): Likewise.
15743 (vrev64q_m_s32): Likewise.
15744 (vqshlq_m_r_s32): Likewise.
15745 (vqrshlq_m_n_s32): Likewise.
15746 (vqnegq_m_s32): Likewise.
15747 (vqabsq_m_s32): Likewise.
15748 (vnegq_m_s32): Likewise.
15749 (vmvnq_m_s32): Likewise.
15750 (vmlsdavxq_p_s32): Likewise.
15751 (vmlsdavq_p_s32): Likewise.
15752 (vmladavxq_p_s32): Likewise.
15753 (vmladavq_p_s32): Likewise.
15754 (vminvq_p_s32): Likewise.
15755 (vmaxvq_p_s32): Likewise.
15756 (vdupq_m_n_s32): Likewise.
15757 (vclzq_m_s32): Likewise.
15758 (vclsq_m_s32): Likewise.
15759 (vaddvaq_p_s32): Likewise.
15760 (vabsq_m_s32): Likewise.
15761 (vqrdmlsdhxq_s32): Likewise.
15762 (vqrdmlsdhq_s32): Likewise.
15763 (vqrdmlashq_n_s32): Likewise.
15764 (vqrdmlahq_n_s32): Likewise.
15765 (vqrdmladhxq_s32): Likewise.
15766 (vqrdmladhq_s32): Likewise.
15767 (vqdmlsdhxq_s32): Likewise.
15768 (vqdmlsdhq_s32): Likewise.
15769 (vqdmlahq_n_s32): Likewise.
15770 (vqdmladhxq_s32): Likewise.
15771 (vqdmladhq_s32): Likewise.
15772 (vmlsdavaxq_s32): Likewise.
15773 (vmlsdavaq_s32): Likewise.
15774 (vmlasq_n_s32): Likewise.
15775 (vmlaq_n_s32): Likewise.
15776 (vmladavaxq_s32): Likewise.
15777 (vmladavaq_s32): Likewise.
15778 (vsriq_n_s32): Likewise.
15779 (vsliq_n_s32): Likewise.
15780 (vpselq_u64): Likewise.
15781 (vpselq_s64): Likewise.
15782 (__arm_vpselq_u8): Define intrinsic.
15783 (__arm_vpselq_s8): Likewise.
15784 (__arm_vrev64q_m_u8): Likewise.
15785 (__arm_vqrdmlashq_n_u8): Likewise.
15786 (__arm_vqrdmlahq_n_u8): Likewise.
15787 (__arm_vqdmlahq_n_u8): Likewise.
15788 (__arm_vmvnq_m_u8): Likewise.
15789 (__arm_vmlasq_n_u8): Likewise.
15790 (__arm_vmlaq_n_u8): Likewise.
15791 (__arm_vmladavq_p_u8): Likewise.
15792 (__arm_vmladavaq_u8): Likewise.
15793 (__arm_vminvq_p_u8): Likewise.
15794 (__arm_vmaxvq_p_u8): Likewise.
15795 (__arm_vdupq_m_n_u8): Likewise.
15796 (__arm_vcmpneq_m_u8): Likewise.
15797 (__arm_vcmpneq_m_n_u8): Likewise.
15798 (__arm_vcmphiq_m_u8): Likewise.
15799 (__arm_vcmphiq_m_n_u8): Likewise.
15800 (__arm_vcmpeqq_m_u8): Likewise.
15801 (__arm_vcmpeqq_m_n_u8): Likewise.
15802 (__arm_vcmpcsq_m_u8): Likewise.
15803 (__arm_vcmpcsq_m_n_u8): Likewise.
15804 (__arm_vclzq_m_u8): Likewise.
15805 (__arm_vaddvaq_p_u8): Likewise.
15806 (__arm_vsriq_n_u8): Likewise.
15807 (__arm_vsliq_n_u8): Likewise.
15808 (__arm_vshlq_m_r_u8): Likewise.
15809 (__arm_vrshlq_m_n_u8): Likewise.
15810 (__arm_vqshlq_m_r_u8): Likewise.
15811 (__arm_vqrshlq_m_n_u8): Likewise.
15812 (__arm_vminavq_p_s8): Likewise.
15813 (__arm_vminaq_m_s8): Likewise.
15814 (__arm_vmaxavq_p_s8): Likewise.
15815 (__arm_vmaxaq_m_s8): Likewise.
15816 (__arm_vcmpneq_m_s8): Likewise.
15817 (__arm_vcmpneq_m_n_s8): Likewise.
15818 (__arm_vcmpltq_m_s8): Likewise.
15819 (__arm_vcmpltq_m_n_s8): Likewise.
15820 (__arm_vcmpleq_m_s8): Likewise.
15821 (__arm_vcmpleq_m_n_s8): Likewise.
15822 (__arm_vcmpgtq_m_s8): Likewise.
15823 (__arm_vcmpgtq_m_n_s8): Likewise.
15824 (__arm_vcmpgeq_m_s8): Likewise.
15825 (__arm_vcmpgeq_m_n_s8): Likewise.
15826 (__arm_vcmpeqq_m_s8): Likewise.
15827 (__arm_vcmpeqq_m_n_s8): Likewise.
15828 (__arm_vshlq_m_r_s8): Likewise.
15829 (__arm_vrshlq_m_n_s8): Likewise.
15830 (__arm_vrev64q_m_s8): Likewise.
15831 (__arm_vqshlq_m_r_s8): Likewise.
15832 (__arm_vqrshlq_m_n_s8): Likewise.
15833 (__arm_vqnegq_m_s8): Likewise.
15834 (__arm_vqabsq_m_s8): Likewise.
15835 (__arm_vnegq_m_s8): Likewise.
15836 (__arm_vmvnq_m_s8): Likewise.
15837 (__arm_vmlsdavxq_p_s8): Likewise.
15838 (__arm_vmlsdavq_p_s8): Likewise.
15839 (__arm_vmladavxq_p_s8): Likewise.
15840 (__arm_vmladavq_p_s8): Likewise.
15841 (__arm_vminvq_p_s8): Likewise.
15842 (__arm_vmaxvq_p_s8): Likewise.
15843 (__arm_vdupq_m_n_s8): Likewise.
15844 (__arm_vclzq_m_s8): Likewise.
15845 (__arm_vclsq_m_s8): Likewise.
15846 (__arm_vaddvaq_p_s8): Likewise.
15847 (__arm_vabsq_m_s8): Likewise.
15848 (__arm_vqrdmlsdhxq_s8): Likewise.
15849 (__arm_vqrdmlsdhq_s8): Likewise.
15850 (__arm_vqrdmlashq_n_s8): Likewise.
15851 (__arm_vqrdmlahq_n_s8): Likewise.
15852 (__arm_vqrdmladhxq_s8): Likewise.
15853 (__arm_vqrdmladhq_s8): Likewise.
15854 (__arm_vqdmlsdhxq_s8): Likewise.
15855 (__arm_vqdmlsdhq_s8): Likewise.
15856 (__arm_vqdmlahq_n_s8): Likewise.
15857 (__arm_vqdmladhxq_s8): Likewise.
15858 (__arm_vqdmladhq_s8): Likewise.
15859 (__arm_vmlsdavaxq_s8): Likewise.
15860 (__arm_vmlsdavaq_s8): Likewise.
15861 (__arm_vmlasq_n_s8): Likewise.
15862 (__arm_vmlaq_n_s8): Likewise.
15863 (__arm_vmladavaxq_s8): Likewise.
15864 (__arm_vmladavaq_s8): Likewise.
15865 (__arm_vsriq_n_s8): Likewise.
15866 (__arm_vsliq_n_s8): Likewise.
15867 (__arm_vpselq_u16): Likewise.
15868 (__arm_vpselq_s16): Likewise.
15869 (__arm_vrev64q_m_u16): Likewise.
15870 (__arm_vqrdmlashq_n_u16): Likewise.
15871 (__arm_vqrdmlahq_n_u16): Likewise.
15872 (__arm_vqdmlahq_n_u16): Likewise.
15873 (__arm_vmvnq_m_u16): Likewise.
15874 (__arm_vmlasq_n_u16): Likewise.
15875 (__arm_vmlaq_n_u16): Likewise.
15876 (__arm_vmladavq_p_u16): Likewise.
15877 (__arm_vmladavaq_u16): Likewise.
15878 (__arm_vminvq_p_u16): Likewise.
15879 (__arm_vmaxvq_p_u16): Likewise.
15880 (__arm_vdupq_m_n_u16): Likewise.
15881 (__arm_vcmpneq_m_u16): Likewise.
15882 (__arm_vcmpneq_m_n_u16): Likewise.
15883 (__arm_vcmphiq_m_u16): Likewise.
15884 (__arm_vcmphiq_m_n_u16): Likewise.
15885 (__arm_vcmpeqq_m_u16): Likewise.
15886 (__arm_vcmpeqq_m_n_u16): Likewise.
15887 (__arm_vcmpcsq_m_u16): Likewise.
15888 (__arm_vcmpcsq_m_n_u16): Likewise.
15889 (__arm_vclzq_m_u16): Likewise.
15890 (__arm_vaddvaq_p_u16): Likewise.
15891 (__arm_vsriq_n_u16): Likewise.
15892 (__arm_vsliq_n_u16): Likewise.
15893 (__arm_vshlq_m_r_u16): Likewise.
15894 (__arm_vrshlq_m_n_u16): Likewise.
15895 (__arm_vqshlq_m_r_u16): Likewise.
15896 (__arm_vqrshlq_m_n_u16): Likewise.
15897 (__arm_vminavq_p_s16): Likewise.
15898 (__arm_vminaq_m_s16): Likewise.
15899 (__arm_vmaxavq_p_s16): Likewise.
15900 (__arm_vmaxaq_m_s16): Likewise.
15901 (__arm_vcmpneq_m_s16): Likewise.
15902 (__arm_vcmpneq_m_n_s16): Likewise.
15903 (__arm_vcmpltq_m_s16): Likewise.
15904 (__arm_vcmpltq_m_n_s16): Likewise.
15905 (__arm_vcmpleq_m_s16): Likewise.
15906 (__arm_vcmpleq_m_n_s16): Likewise.
15907 (__arm_vcmpgtq_m_s16): Likewise.
15908 (__arm_vcmpgtq_m_n_s16): Likewise.
15909 (__arm_vcmpgeq_m_s16): Likewise.
15910 (__arm_vcmpgeq_m_n_s16): Likewise.
15911 (__arm_vcmpeqq_m_s16): Likewise.
15912 (__arm_vcmpeqq_m_n_s16): Likewise.
15913 (__arm_vshlq_m_r_s16): Likewise.
15914 (__arm_vrshlq_m_n_s16): Likewise.
15915 (__arm_vrev64q_m_s16): Likewise.
15916 (__arm_vqshlq_m_r_s16): Likewise.
15917 (__arm_vqrshlq_m_n_s16): Likewise.
15918 (__arm_vqnegq_m_s16): Likewise.
15919 (__arm_vqabsq_m_s16): Likewise.
15920 (__arm_vnegq_m_s16): Likewise.
15921 (__arm_vmvnq_m_s16): Likewise.
15922 (__arm_vmlsdavxq_p_s16): Likewise.
15923 (__arm_vmlsdavq_p_s16): Likewise.
15924 (__arm_vmladavxq_p_s16): Likewise.
15925 (__arm_vmladavq_p_s16): Likewise.
15926 (__arm_vminvq_p_s16): Likewise.
15927 (__arm_vmaxvq_p_s16): Likewise.
15928 (__arm_vdupq_m_n_s16): Likewise.
15929 (__arm_vclzq_m_s16): Likewise.
15930 (__arm_vclsq_m_s16): Likewise.
15931 (__arm_vaddvaq_p_s16): Likewise.
15932 (__arm_vabsq_m_s16): Likewise.
15933 (__arm_vqrdmlsdhxq_s16): Likewise.
15934 (__arm_vqrdmlsdhq_s16): Likewise.
15935 (__arm_vqrdmlashq_n_s16): Likewise.
15936 (__arm_vqrdmlahq_n_s16): Likewise.
15937 (__arm_vqrdmladhxq_s16): Likewise.
15938 (__arm_vqrdmladhq_s16): Likewise.
15939 (__arm_vqdmlsdhxq_s16): Likewise.
15940 (__arm_vqdmlsdhq_s16): Likewise.
15941 (__arm_vqdmlahq_n_s16): Likewise.
15942 (__arm_vqdmladhxq_s16): Likewise.
15943 (__arm_vqdmladhq_s16): Likewise.
15944 (__arm_vmlsdavaxq_s16): Likewise.
15945 (__arm_vmlsdavaq_s16): Likewise.
15946 (__arm_vmlasq_n_s16): Likewise.
15947 (__arm_vmlaq_n_s16): Likewise.
15948 (__arm_vmladavaxq_s16): Likewise.
15949 (__arm_vmladavaq_s16): Likewise.
15950 (__arm_vsriq_n_s16): Likewise.
15951 (__arm_vsliq_n_s16): Likewise.
15952 (__arm_vpselq_u32): Likewise.
15953 (__arm_vpselq_s32): Likewise.
15954 (__arm_vrev64q_m_u32): Likewise.
15955 (__arm_vqrdmlashq_n_u32): Likewise.
15956 (__arm_vqrdmlahq_n_u32): Likewise.
15957 (__arm_vqdmlahq_n_u32): Likewise.
15958 (__arm_vmvnq_m_u32): Likewise.
15959 (__arm_vmlasq_n_u32): Likewise.
15960 (__arm_vmlaq_n_u32): Likewise.
15961 (__arm_vmladavq_p_u32): Likewise.
15962 (__arm_vmladavaq_u32): Likewise.
15963 (__arm_vminvq_p_u32): Likewise.
15964 (__arm_vmaxvq_p_u32): Likewise.
15965 (__arm_vdupq_m_n_u32): Likewise.
15966 (__arm_vcmpneq_m_u32): Likewise.
15967 (__arm_vcmpneq_m_n_u32): Likewise.
15968 (__arm_vcmphiq_m_u32): Likewise.
15969 (__arm_vcmphiq_m_n_u32): Likewise.
15970 (__arm_vcmpeqq_m_u32): Likewise.
15971 (__arm_vcmpeqq_m_n_u32): Likewise.
15972 (__arm_vcmpcsq_m_u32): Likewise.
15973 (__arm_vcmpcsq_m_n_u32): Likewise.
15974 (__arm_vclzq_m_u32): Likewise.
15975 (__arm_vaddvaq_p_u32): Likewise.
15976 (__arm_vsriq_n_u32): Likewise.
15977 (__arm_vsliq_n_u32): Likewise.
15978 (__arm_vshlq_m_r_u32): Likewise.
15979 (__arm_vrshlq_m_n_u32): Likewise.
15980 (__arm_vqshlq_m_r_u32): Likewise.
15981 (__arm_vqrshlq_m_n_u32): Likewise.
15982 (__arm_vminavq_p_s32): Likewise.
15983 (__arm_vminaq_m_s32): Likewise.
15984 (__arm_vmaxavq_p_s32): Likewise.
15985 (__arm_vmaxaq_m_s32): Likewise.
15986 (__arm_vcmpneq_m_s32): Likewise.
15987 (__arm_vcmpneq_m_n_s32): Likewise.
15988 (__arm_vcmpltq_m_s32): Likewise.
15989 (__arm_vcmpltq_m_n_s32): Likewise.
15990 (__arm_vcmpleq_m_s32): Likewise.
15991 (__arm_vcmpleq_m_n_s32): Likewise.
15992 (__arm_vcmpgtq_m_s32): Likewise.
15993 (__arm_vcmpgtq_m_n_s32): Likewise.
15994 (__arm_vcmpgeq_m_s32): Likewise.
15995 (__arm_vcmpgeq_m_n_s32): Likewise.
15996 (__arm_vcmpeqq_m_s32): Likewise.
15997 (__arm_vcmpeqq_m_n_s32): Likewise.
15998 (__arm_vshlq_m_r_s32): Likewise.
15999 (__arm_vrshlq_m_n_s32): Likewise.
16000 (__arm_vrev64q_m_s32): Likewise.
16001 (__arm_vqshlq_m_r_s32): Likewise.
16002 (__arm_vqrshlq_m_n_s32): Likewise.
16003 (__arm_vqnegq_m_s32): Likewise.
16004 (__arm_vqabsq_m_s32): Likewise.
16005 (__arm_vnegq_m_s32): Likewise.
16006 (__arm_vmvnq_m_s32): Likewise.
16007 (__arm_vmlsdavxq_p_s32): Likewise.
16008 (__arm_vmlsdavq_p_s32): Likewise.
16009 (__arm_vmladavxq_p_s32): Likewise.
16010 (__arm_vmladavq_p_s32): Likewise.
16011 (__arm_vminvq_p_s32): Likewise.
16012 (__arm_vmaxvq_p_s32): Likewise.
16013 (__arm_vdupq_m_n_s32): Likewise.
16014 (__arm_vclzq_m_s32): Likewise.
16015 (__arm_vclsq_m_s32): Likewise.
16016 (__arm_vaddvaq_p_s32): Likewise.
16017 (__arm_vabsq_m_s32): Likewise.
16018 (__arm_vqrdmlsdhxq_s32): Likewise.
16019 (__arm_vqrdmlsdhq_s32): Likewise.
16020 (__arm_vqrdmlashq_n_s32): Likewise.
16021 (__arm_vqrdmlahq_n_s32): Likewise.
16022 (__arm_vqrdmladhxq_s32): Likewise.
16023 (__arm_vqrdmladhq_s32): Likewise.
16024 (__arm_vqdmlsdhxq_s32): Likewise.
16025 (__arm_vqdmlsdhq_s32): Likewise.
16026 (__arm_vqdmlahq_n_s32): Likewise.
16027 (__arm_vqdmladhxq_s32): Likewise.
16028 (__arm_vqdmladhq_s32): Likewise.
16029 (__arm_vmlsdavaxq_s32): Likewise.
16030 (__arm_vmlsdavaq_s32): Likewise.
16031 (__arm_vmlasq_n_s32): Likewise.
16032 (__arm_vmlaq_n_s32): Likewise.
16033 (__arm_vmladavaxq_s32): Likewise.
16034 (__arm_vmladavaq_s32): Likewise.
16035 (__arm_vsriq_n_s32): Likewise.
16036 (__arm_vsliq_n_s32): Likewise.
16037 (__arm_vpselq_u64): Likewise.
16038 (__arm_vpselq_s64): Likewise.
16039 (vcmpneq_m_n): Define polymorphic variant.
16040 (vcmpneq_m): Likewise.
16041 (vqrdmlsdhq): Likewise.
16042 (vqrdmlsdhxq): Likewise.
16043 (vqrshlq_m_n): Likewise.
16044 (vqshlq_m_r): Likewise.
16045 (vrev64q_m): Likewise.
16046 (vrshlq_m_n): Likewise.
16047 (vshlq_m_r): Likewise.
16048 (vsliq_n): Likewise.
16049 (vsriq_n): Likewise.
16050 (vqrdmlashq_n): Likewise.
16051 (vqrdmlahq): Likewise.
16052 (vqrdmladhxq): Likewise.
16053 (vqrdmladhq): Likewise.
16054 (vqnegq_m): Likewise.
16055 (vqdmlsdhxq): Likewise.
16056 (vabsq_m): Likewise.
16057 (vclsq_m): Likewise.
16058 (vclzq_m): Likewise.
16059 (vcmpgeq_m): Likewise.
16060 (vcmpgeq_m_n): Likewise.
16061 (vdupq_m_n): Likewise.
16062 (vmaxaq_m): Likewise.
16063 (vmlaq_n): Likewise.
16064 (vmlasq_n): Likewise.
16065 (vmvnq_m): Likewise.
16066 (vnegq_m): Likewise.
16067 (vpselq): Likewise.
16068 (vqdmlahq_n): Likewise.
16069 (vqrdmlahq_n): Likewise.
16070 (vqdmlsdhq): Likewise.
16071 (vqdmladhq): Likewise.
16072 (vqabsq_m): Likewise.
16073 (vminaq_m): Likewise.
16074 (vrmlaldavhaq): Likewise.
16075 (vmlsdavxq_p): Likewise.
16076 (vmlsdavq_p): Likewise.
16077 (vmlsdavaxq): Likewise.
16078 (vmlsdavaq): Likewise.
16079 (vaddvaq_p): Likewise.
16080 (vcmpcsq_m_n): Likewise.
16081 (vcmpcsq_m): Likewise.
16082 (vcmpeqq_m_n): Likewise.
16083 (vcmpeqq_m): Likewise.
16084 (vmladavxq_p): Likewise.
16085 (vmladavq_p): Likewise.
16086 (vmladavaxq): Likewise.
16087 (vmladavaq): Likewise.
16088 (vminvq_p): Likewise.
16089 (vminavq_p): Likewise.
16090 (vmaxvq_p): Likewise.
16091 (vmaxavq_p): Likewise.
16092 (vcmpltq_m_n): Likewise.
16093 (vcmpltq_m): Likewise.
16094 (vcmpleq_m): Likewise.
16095 (vcmpleq_m_n): Likewise.
16096 (vcmphiq_m_n): Likewise.
16097 (vcmphiq_m): Likewise.
16098 (vcmpgtq_m_n): Likewise.
16099 (vcmpgtq_m): Likewise.
16100 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
16102 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
16103 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
16104 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
16105 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
16106 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
16107 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
16108 * config/arm/constraints.md (Rc): Define constraint to check constant is
16109 in the range of 0 to 15.
16110 (Re): Define constraint to check constant is in the range of 0 to 31.
16111 * config/arm/mve.md (VADDVAQ_P): Define iterator.
16112 (VCLZQ_M): Likewise.
16113 (VCMPEQQ_M_N): Likewise.
16114 (VCMPEQQ_M): Likewise.
16115 (VCMPNEQ_M_N): Likewise.
16116 (VCMPNEQ_M): Likewise.
16117 (VDUPQ_M_N): Likewise.
16118 (VMAXVQ_P): Likewise.
16119 (VMINVQ_P): Likewise.
16120 (VMLADAVAQ): Likewise.
16121 (VMLADAVQ_P): Likewise.
16122 (VMLAQ_N): Likewise.
16123 (VMLASQ_N): Likewise.
16124 (VMVNQ_M): Likewise.
16125 (VPSELQ): Likewise.
16126 (VQDMLAHQ_N): Likewise.
16127 (VQRDMLAHQ_N): Likewise.
16128 (VQRDMLASHQ_N): Likewise.
16129 (VQRSHLQ_M_N): Likewise.
16130 (VQSHLQ_M_R): Likewise.
16131 (VREV64Q_M): Likewise.
16132 (VRSHLQ_M_N): Likewise.
16133 (VSHLQ_M_R): Likewise.
16134 (VSLIQ_N): Likewise.
16135 (VSRIQ_N): Likewise.
16136 (mve_vabsq_m_s<mode>): Define RTL pattern.
16137 (mve_vaddvaq_p_<supf><mode>): Likewise.
16138 (mve_vclsq_m_s<mode>): Likewise.
16139 (mve_vclzq_m_<supf><mode>): Likewise.
16140 (mve_vcmpcsq_m_n_u<mode>): Likewise.
16141 (mve_vcmpcsq_m_u<mode>): Likewise.
16142 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
16143 (mve_vcmpeqq_m_<supf><mode>): Likewise.
16144 (mve_vcmpgeq_m_n_s<mode>): Likewise.
16145 (mve_vcmpgeq_m_s<mode>): Likewise.
16146 (mve_vcmpgtq_m_n_s<mode>): Likewise.
16147 (mve_vcmpgtq_m_s<mode>): Likewise.
16148 (mve_vcmphiq_m_n_u<mode>): Likewise.
16149 (mve_vcmphiq_m_u<mode>): Likewise.
16150 (mve_vcmpleq_m_n_s<mode>): Likewise.
16151 (mve_vcmpleq_m_s<mode>): Likewise.
16152 (mve_vcmpltq_m_n_s<mode>): Likewise.
16153 (mve_vcmpltq_m_s<mode>): Likewise.
16154 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
16155 (mve_vcmpneq_m_<supf><mode>): Likewise.
16156 (mve_vdupq_m_n_<supf><mode>): Likewise.
16157 (mve_vmaxaq_m_s<mode>): Likewise.
16158 (mve_vmaxavq_p_s<mode>): Likewise.
16159 (mve_vmaxvq_p_<supf><mode>): Likewise.
16160 (mve_vminaq_m_s<mode>): Likewise.
16161 (mve_vminavq_p_s<mode>): Likewise.
16162 (mve_vminvq_p_<supf><mode>): Likewise.
16163 (mve_vmladavaq_<supf><mode>): Likewise.
16164 (mve_vmladavq_p_<supf><mode>): Likewise.
16165 (mve_vmladavxq_p_s<mode>): Likewise.
16166 (mve_vmlaq_n_<supf><mode>): Likewise.
16167 (mve_vmlasq_n_<supf><mode>): Likewise.
16168 (mve_vmlsdavq_p_s<mode>): Likewise.
16169 (mve_vmlsdavxq_p_s<mode>): Likewise.
16170 (mve_vmvnq_m_<supf><mode>): Likewise.
16171 (mve_vnegq_m_s<mode>): Likewise.
16172 (mve_vpselq_<supf><mode>): Likewise.
16173 (mve_vqabsq_m_s<mode>): Likewise.
16174 (mve_vqdmlahq_n_<supf><mode>): Likewise.
16175 (mve_vqnegq_m_s<mode>): Likewise.
16176 (mve_vqrdmladhq_s<mode>): Likewise.
16177 (mve_vqrdmladhxq_s<mode>): Likewise.
16178 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
16179 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
16180 (mve_vqrdmlsdhq_s<mode>): Likewise.
16181 (mve_vqrdmlsdhxq_s<mode>): Likewise.
16182 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
16183 (mve_vqshlq_m_r_<supf><mode>): Likewise.
16184 (mve_vrev64q_m_<supf><mode>): Likewise.
16185 (mve_vrshlq_m_n_<supf><mode>): Likewise.
16186 (mve_vshlq_m_r_<supf><mode>): Likewise.
16187 (mve_vsliq_n_<supf><mode>): Likewise.
16188 (mve_vsriq_n_<supf><mode>): Likewise.
16189 (mve_vqdmlsdhxq_s<mode>): Likewise.
16190 (mve_vqdmlsdhq_s<mode>): Likewise.
16191 (mve_vqdmladhxq_s<mode>): Likewise.
16192 (mve_vqdmladhq_s<mode>): Likewise.
16193 (mve_vmlsdavaxq_s<mode>): Likewise.
16194 (mve_vmlsdavaq_s<mode>): Likewise.
16195 (mve_vmladavaxq_s<mode>): Likewise.
16196 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
16197 matching constraint Rc.
16198 (mve_imm_31): Define predicate to check the matching constraint Re.
16200 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
16202 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
16203 (vec_cmp<mode>di_dup): Likewise.
16204 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
16206 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
16208 * config/gcn/gcn-valu.md (COND_MODE): Delete.
16209 (COND_INT_MODE): Delete.
16210 (cond_op): Add "mult".
16211 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
16212 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
16214 2020-03-18 Richard Biener <rguenther@suse.de>
16216 PR middle-end/94206
16217 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
16218 partial int modes or not mode-precision integer types for
16221 2020-03-18 Jakub Jelinek <jakub@redhat.com>
16223 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
16225 * config/arc/arc.c (frame_stack_add): Likewise.
16226 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
16228 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
16229 * tree-ssa-strlen.h (handle_printf_call): Likewise.
16230 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
16231 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
16233 2020-03-18 Duan bo <duanbo3@huawei.com>
16236 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
16237 (@ldr_got_tiny_<mode>): New pattern.
16238 (ldr_got_tiny_sidi): Likewise.
16239 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
16240 them to handle SYMBOL_TINY_GOT for ILP32.
16242 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
16244 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
16245 call-preserved for SVE PCS functions.
16246 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
16247 Optimize the case in which there are no following vector save slots.
16249 2020-03-18 Richard Biener <rguenther@suse.de>
16251 PR middle-end/94188
16252 * fold-const.c (build_fold_addr_expr): Convert address to
16254 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
16255 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
16256 to build the ADDR_EXPR which we don't really want to simplify.
16257 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
16258 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
16259 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
16260 (simplify_builtin_call): Strip useless type conversions.
16261 * tree-ssa-strlen.c (new_strinfo): Likewise.
16263 2020-03-17 Alexey Neyman <stilor@att.net>
16266 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
16267 the debug level is terse and the declaration is public. Do not
16268 generate type info.
16269 (dwarf2out_decl): Same.
16270 (add_type_attribute): Return immediately if debug level is
16273 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
16275 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
16277 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16278 Mihail Ionescu <mihail.ionescu@arm.com>
16279 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16281 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
16282 Define qualifier for ternary operands.
16283 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16284 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16285 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16286 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16287 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16288 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16289 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16290 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
16291 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16292 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16293 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16294 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16295 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
16296 * config/arm/arm_mve.h (vabavq_s8): Define macro.
16297 (vabavq_s16): Likewise.
16298 (vabavq_s32): Likewise.
16299 (vbicq_m_n_s16): Likewise.
16300 (vbicq_m_n_s32): Likewise.
16301 (vbicq_m_n_u16): Likewise.
16302 (vbicq_m_n_u32): Likewise.
16303 (vcmpeqq_m_f16): Likewise.
16304 (vcmpeqq_m_f32): Likewise.
16305 (vcvtaq_m_s16_f16): Likewise.
16306 (vcvtaq_m_u16_f16): Likewise.
16307 (vcvtaq_m_s32_f32): Likewise.
16308 (vcvtaq_m_u32_f32): Likewise.
16309 (vcvtq_m_f16_s16): Likewise.
16310 (vcvtq_m_f16_u16): Likewise.
16311 (vcvtq_m_f32_s32): Likewise.
16312 (vcvtq_m_f32_u32): Likewise.
16313 (vqrshrnbq_n_s16): Likewise.
16314 (vqrshrnbq_n_u16): Likewise.
16315 (vqrshrnbq_n_s32): Likewise.
16316 (vqrshrnbq_n_u32): Likewise.
16317 (vqrshrunbq_n_s16): Likewise.
16318 (vqrshrunbq_n_s32): Likewise.
16319 (vrmlaldavhaq_s32): Likewise.
16320 (vrmlaldavhaq_u32): Likewise.
16321 (vshlcq_s8): Likewise.
16322 (vshlcq_u8): Likewise.
16323 (vshlcq_s16): Likewise.
16324 (vshlcq_u16): Likewise.
16325 (vshlcq_s32): Likewise.
16326 (vshlcq_u32): Likewise.
16327 (vabavq_u8): Likewise.
16328 (vabavq_u16): Likewise.
16329 (vabavq_u32): Likewise.
16330 (__arm_vabavq_s8): Define intrinsic.
16331 (__arm_vabavq_s16): Likewise.
16332 (__arm_vabavq_s32): Likewise.
16333 (__arm_vabavq_u8): Likewise.
16334 (__arm_vabavq_u16): Likewise.
16335 (__arm_vabavq_u32): Likewise.
16336 (__arm_vbicq_m_n_s16): Likewise.
16337 (__arm_vbicq_m_n_s32): Likewise.
16338 (__arm_vbicq_m_n_u16): Likewise.
16339 (__arm_vbicq_m_n_u32): Likewise.
16340 (__arm_vqrshrnbq_n_s16): Likewise.
16341 (__arm_vqrshrnbq_n_u16): Likewise.
16342 (__arm_vqrshrnbq_n_s32): Likewise.
16343 (__arm_vqrshrnbq_n_u32): Likewise.
16344 (__arm_vqrshrunbq_n_s16): Likewise.
16345 (__arm_vqrshrunbq_n_s32): Likewise.
16346 (__arm_vrmlaldavhaq_s32): Likewise.
16347 (__arm_vrmlaldavhaq_u32): Likewise.
16348 (__arm_vshlcq_s8): Likewise.
16349 (__arm_vshlcq_u8): Likewise.
16350 (__arm_vshlcq_s16): Likewise.
16351 (__arm_vshlcq_u16): Likewise.
16352 (__arm_vshlcq_s32): Likewise.
16353 (__arm_vshlcq_u32): Likewise.
16354 (__arm_vcmpeqq_m_f16): Likewise.
16355 (__arm_vcmpeqq_m_f32): Likewise.
16356 (__arm_vcvtaq_m_s16_f16): Likewise.
16357 (__arm_vcvtaq_m_u16_f16): Likewise.
16358 (__arm_vcvtaq_m_s32_f32): Likewise.
16359 (__arm_vcvtaq_m_u32_f32): Likewise.
16360 (__arm_vcvtq_m_f16_s16): Likewise.
16361 (__arm_vcvtq_m_f16_u16): Likewise.
16362 (__arm_vcvtq_m_f32_s32): Likewise.
16363 (__arm_vcvtq_m_f32_u32): Likewise.
16364 (vcvtaq_m): Define polymorphic variant.
16365 (vcvtq_m): Likewise.
16366 (vabavq): Likewise.
16367 (vshlcq): Likewise.
16368 (vbicq_m_n): Likewise.
16369 (vqrshrnbq_n): Likewise.
16370 (vqrshrunbq_n): Likewise.
16371 * config/arm/arm_mve_builtins.def
16372 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
16373 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16374 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16375 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16376 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16377 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16378 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16379 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16380 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
16381 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16382 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16383 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16384 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16385 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
16386 * config/arm/mve.md (VBICQ_M_N): Define iterator.
16387 (VCVTAQ_M): Likewise.
16388 (VCVTQ_M_TO_F): Likewise.
16389 (VQRSHRNBQ_N): Likewise.
16390 (VABAVQ): Likewise.
16391 (VSHLCQ): Likewise.
16392 (VRMLALDAVHAQ): Likewise.
16393 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
16394 (mve_vcmpeqq_m_f<mode>): Likewise.
16395 (mve_vcvtaq_m_<supf><mode>): Likewise.
16396 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
16397 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
16398 (mve_vqrshrunbq_n_s<mode>): Likewise.
16399 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
16400 (mve_vabavq_<supf><mode>): Likewise.
16401 (mve_vshlcq_<supf><mode>): Likewise.
16402 (mve_vshlcq_<supf><mode>): Likewise.
16403 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
16404 (mve_vshlcq_carry_<supf><mode>): Likewise.
16406 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16407 Mihail Ionescu <mihail.ionescu@arm.com>
16408 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16410 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
16411 (vqmovnbq_u16): Likewise.
16412 (vmulltq_poly_p8): Likewise.
16413 (vmullbq_poly_p8): Likewise.
16414 (vmovntq_u16): Likewise.
16415 (vmovnbq_u16): Likewise.
16416 (vmlaldavxq_u16): Likewise.
16417 (vmlaldavq_u16): Likewise.
16418 (vqmovuntq_s16): Likewise.
16419 (vqmovunbq_s16): Likewise.
16420 (vshlltq_n_u8): Likewise.
16421 (vshllbq_n_u8): Likewise.
16422 (vorrq_n_u16): Likewise.
16423 (vbicq_n_u16): Likewise.
16424 (vcmpneq_n_f16): Likewise.
16425 (vcmpneq_f16): Likewise.
16426 (vcmpltq_n_f16): Likewise.
16427 (vcmpltq_f16): Likewise.
16428 (vcmpleq_n_f16): Likewise.
16429 (vcmpleq_f16): Likewise.
16430 (vcmpgtq_n_f16): Likewise.
16431 (vcmpgtq_f16): Likewise.
16432 (vcmpgeq_n_f16): Likewise.
16433 (vcmpgeq_f16): Likewise.
16434 (vcmpeqq_n_f16): Likewise.
16435 (vcmpeqq_f16): Likewise.
16436 (vsubq_f16): Likewise.
16437 (vqmovntq_s16): Likewise.
16438 (vqmovnbq_s16): Likewise.
16439 (vqdmulltq_s16): Likewise.
16440 (vqdmulltq_n_s16): Likewise.
16441 (vqdmullbq_s16): Likewise.
16442 (vqdmullbq_n_s16): Likewise.
16443 (vorrq_f16): Likewise.
16444 (vornq_f16): Likewise.
16445 (vmulq_n_f16): Likewise.
16446 (vmulq_f16): Likewise.
16447 (vmovntq_s16): Likewise.
16448 (vmovnbq_s16): Likewise.
16449 (vmlsldavxq_s16): Likewise.
16450 (vmlsldavq_s16): Likewise.
16451 (vmlaldavxq_s16): Likewise.
16452 (vmlaldavq_s16): Likewise.
16453 (vminnmvq_f16): Likewise.
16454 (vminnmq_f16): Likewise.
16455 (vminnmavq_f16): Likewise.
16456 (vminnmaq_f16): Likewise.
16457 (vmaxnmvq_f16): Likewise.
16458 (vmaxnmq_f16): Likewise.
16459 (vmaxnmavq_f16): Likewise.
16460 (vmaxnmaq_f16): Likewise.
16461 (veorq_f16): Likewise.
16462 (vcmulq_rot90_f16): Likewise.
16463 (vcmulq_rot270_f16): Likewise.
16464 (vcmulq_rot180_f16): Likewise.
16465 (vcmulq_f16): Likewise.
16466 (vcaddq_rot90_f16): Likewise.
16467 (vcaddq_rot270_f16): Likewise.
16468 (vbicq_f16): Likewise.
16469 (vandq_f16): Likewise.
16470 (vaddq_n_f16): Likewise.
16471 (vabdq_f16): Likewise.
16472 (vshlltq_n_s8): Likewise.
16473 (vshllbq_n_s8): Likewise.
16474 (vorrq_n_s16): Likewise.
16475 (vbicq_n_s16): Likewise.
16476 (vqmovntq_u32): Likewise.
16477 (vqmovnbq_u32): Likewise.
16478 (vmulltq_poly_p16): Likewise.
16479 (vmullbq_poly_p16): Likewise.
16480 (vmovntq_u32): Likewise.
16481 (vmovnbq_u32): Likewise.
16482 (vmlaldavxq_u32): Likewise.
16483 (vmlaldavq_u32): Likewise.
16484 (vqmovuntq_s32): Likewise.
16485 (vqmovunbq_s32): Likewise.
16486 (vshlltq_n_u16): Likewise.
16487 (vshllbq_n_u16): Likewise.
16488 (vorrq_n_u32): Likewise.
16489 (vbicq_n_u32): Likewise.
16490 (vcmpneq_n_f32): Likewise.
16491 (vcmpneq_f32): Likewise.
16492 (vcmpltq_n_f32): Likewise.
16493 (vcmpltq_f32): Likewise.
16494 (vcmpleq_n_f32): Likewise.
16495 (vcmpleq_f32): Likewise.
16496 (vcmpgtq_n_f32): Likewise.
16497 (vcmpgtq_f32): Likewise.
16498 (vcmpgeq_n_f32): Likewise.
16499 (vcmpgeq_f32): Likewise.
16500 (vcmpeqq_n_f32): Likewise.
16501 (vcmpeqq_f32): Likewise.
16502 (vsubq_f32): Likewise.
16503 (vqmovntq_s32): Likewise.
16504 (vqmovnbq_s32): Likewise.
16505 (vqdmulltq_s32): Likewise.
16506 (vqdmulltq_n_s32): Likewise.
16507 (vqdmullbq_s32): Likewise.
16508 (vqdmullbq_n_s32): Likewise.
16509 (vorrq_f32): Likewise.
16510 (vornq_f32): Likewise.
16511 (vmulq_n_f32): Likewise.
16512 (vmulq_f32): Likewise.
16513 (vmovntq_s32): Likewise.
16514 (vmovnbq_s32): Likewise.
16515 (vmlsldavxq_s32): Likewise.
16516 (vmlsldavq_s32): Likewise.
16517 (vmlaldavxq_s32): Likewise.
16518 (vmlaldavq_s32): Likewise.
16519 (vminnmvq_f32): Likewise.
16520 (vminnmq_f32): Likewise.
16521 (vminnmavq_f32): Likewise.
16522 (vminnmaq_f32): Likewise.
16523 (vmaxnmvq_f32): Likewise.
16524 (vmaxnmq_f32): Likewise.
16525 (vmaxnmavq_f32): Likewise.
16526 (vmaxnmaq_f32): Likewise.
16527 (veorq_f32): Likewise.
16528 (vcmulq_rot90_f32): Likewise.
16529 (vcmulq_rot270_f32): Likewise.
16530 (vcmulq_rot180_f32): Likewise.
16531 (vcmulq_f32): Likewise.
16532 (vcaddq_rot90_f32): Likewise.
16533 (vcaddq_rot270_f32): Likewise.
16534 (vbicq_f32): Likewise.
16535 (vandq_f32): Likewise.
16536 (vaddq_n_f32): Likewise.
16537 (vabdq_f32): Likewise.
16538 (vshlltq_n_s16): Likewise.
16539 (vshllbq_n_s16): Likewise.
16540 (vorrq_n_s32): Likewise.
16541 (vbicq_n_s32): Likewise.
16542 (vrmlaldavhq_u32): Likewise.
16543 (vctp8q_m): Likewise.
16544 (vctp64q_m): Likewise.
16545 (vctp32q_m): Likewise.
16546 (vctp16q_m): Likewise.
16547 (vaddlvaq_u32): Likewise.
16548 (vrmlsldavhxq_s32): Likewise.
16549 (vrmlsldavhq_s32): Likewise.
16550 (vrmlaldavhxq_s32): Likewise.
16551 (vrmlaldavhq_s32): Likewise.
16552 (vcvttq_f16_f32): Likewise.
16553 (vcvtbq_f16_f32): Likewise.
16554 (vaddlvaq_s32): Likewise.
16555 (__arm_vqmovntq_u16): Define intrinsic.
16556 (__arm_vqmovnbq_u16): Likewise.
16557 (__arm_vmulltq_poly_p8): Likewise.
16558 (__arm_vmullbq_poly_p8): Likewise.
16559 (__arm_vmovntq_u16): Likewise.
16560 (__arm_vmovnbq_u16): Likewise.
16561 (__arm_vmlaldavxq_u16): Likewise.
16562 (__arm_vmlaldavq_u16): Likewise.
16563 (__arm_vqmovuntq_s16): Likewise.
16564 (__arm_vqmovunbq_s16): Likewise.
16565 (__arm_vshlltq_n_u8): Likewise.
16566 (__arm_vshllbq_n_u8): Likewise.
16567 (__arm_vorrq_n_u16): Likewise.
16568 (__arm_vbicq_n_u16): Likewise.
16569 (__arm_vcmpneq_n_f16): Likewise.
16570 (__arm_vcmpneq_f16): Likewise.
16571 (__arm_vcmpltq_n_f16): Likewise.
16572 (__arm_vcmpltq_f16): Likewise.
16573 (__arm_vcmpleq_n_f16): Likewise.
16574 (__arm_vcmpleq_f16): Likewise.
16575 (__arm_vcmpgtq_n_f16): Likewise.
16576 (__arm_vcmpgtq_f16): Likewise.
16577 (__arm_vcmpgeq_n_f16): Likewise.
16578 (__arm_vcmpgeq_f16): Likewise.
16579 (__arm_vcmpeqq_n_f16): Likewise.
16580 (__arm_vcmpeqq_f16): Likewise.
16581 (__arm_vsubq_f16): Likewise.
16582 (__arm_vqmovntq_s16): Likewise.
16583 (__arm_vqmovnbq_s16): Likewise.
16584 (__arm_vqdmulltq_s16): Likewise.
16585 (__arm_vqdmulltq_n_s16): Likewise.
16586 (__arm_vqdmullbq_s16): Likewise.
16587 (__arm_vqdmullbq_n_s16): Likewise.
16588 (__arm_vorrq_f16): Likewise.
16589 (__arm_vornq_f16): Likewise.
16590 (__arm_vmulq_n_f16): Likewise.
16591 (__arm_vmulq_f16): Likewise.
16592 (__arm_vmovntq_s16): Likewise.
16593 (__arm_vmovnbq_s16): Likewise.
16594 (__arm_vmlsldavxq_s16): Likewise.
16595 (__arm_vmlsldavq_s16): Likewise.
16596 (__arm_vmlaldavxq_s16): Likewise.
16597 (__arm_vmlaldavq_s16): Likewise.
16598 (__arm_vminnmvq_f16): Likewise.
16599 (__arm_vminnmq_f16): Likewise.
16600 (__arm_vminnmavq_f16): Likewise.
16601 (__arm_vminnmaq_f16): Likewise.
16602 (__arm_vmaxnmvq_f16): Likewise.
16603 (__arm_vmaxnmq_f16): Likewise.
16604 (__arm_vmaxnmavq_f16): Likewise.
16605 (__arm_vmaxnmaq_f16): Likewise.
16606 (__arm_veorq_f16): Likewise.
16607 (__arm_vcmulq_rot90_f16): Likewise.
16608 (__arm_vcmulq_rot270_f16): Likewise.
16609 (__arm_vcmulq_rot180_f16): Likewise.
16610 (__arm_vcmulq_f16): Likewise.
16611 (__arm_vcaddq_rot90_f16): Likewise.
16612 (__arm_vcaddq_rot270_f16): Likewise.
16613 (__arm_vbicq_f16): Likewise.
16614 (__arm_vandq_f16): Likewise.
16615 (__arm_vaddq_n_f16): Likewise.
16616 (__arm_vabdq_f16): Likewise.
16617 (__arm_vshlltq_n_s8): Likewise.
16618 (__arm_vshllbq_n_s8): Likewise.
16619 (__arm_vorrq_n_s16): Likewise.
16620 (__arm_vbicq_n_s16): Likewise.
16621 (__arm_vqmovntq_u32): Likewise.
16622 (__arm_vqmovnbq_u32): Likewise.
16623 (__arm_vmulltq_poly_p16): Likewise.
16624 (__arm_vmullbq_poly_p16): Likewise.
16625 (__arm_vmovntq_u32): Likewise.
16626 (__arm_vmovnbq_u32): Likewise.
16627 (__arm_vmlaldavxq_u32): Likewise.
16628 (__arm_vmlaldavq_u32): Likewise.
16629 (__arm_vqmovuntq_s32): Likewise.
16630 (__arm_vqmovunbq_s32): Likewise.
16631 (__arm_vshlltq_n_u16): Likewise.
16632 (__arm_vshllbq_n_u16): Likewise.
16633 (__arm_vorrq_n_u32): Likewise.
16634 (__arm_vbicq_n_u32): Likewise.
16635 (__arm_vcmpneq_n_f32): Likewise.
16636 (__arm_vcmpneq_f32): Likewise.
16637 (__arm_vcmpltq_n_f32): Likewise.
16638 (__arm_vcmpltq_f32): Likewise.
16639 (__arm_vcmpleq_n_f32): Likewise.
16640 (__arm_vcmpleq_f32): Likewise.
16641 (__arm_vcmpgtq_n_f32): Likewise.
16642 (__arm_vcmpgtq_f32): Likewise.
16643 (__arm_vcmpgeq_n_f32): Likewise.
16644 (__arm_vcmpgeq_f32): Likewise.
16645 (__arm_vcmpeqq_n_f32): Likewise.
16646 (__arm_vcmpeqq_f32): Likewise.
16647 (__arm_vsubq_f32): Likewise.
16648 (__arm_vqmovntq_s32): Likewise.
16649 (__arm_vqmovnbq_s32): Likewise.
16650 (__arm_vqdmulltq_s32): Likewise.
16651 (__arm_vqdmulltq_n_s32): Likewise.
16652 (__arm_vqdmullbq_s32): Likewise.
16653 (__arm_vqdmullbq_n_s32): Likewise.
16654 (__arm_vorrq_f32): Likewise.
16655 (__arm_vornq_f32): Likewise.
16656 (__arm_vmulq_n_f32): Likewise.
16657 (__arm_vmulq_f32): Likewise.
16658 (__arm_vmovntq_s32): Likewise.
16659 (__arm_vmovnbq_s32): Likewise.
16660 (__arm_vmlsldavxq_s32): Likewise.
16661 (__arm_vmlsldavq_s32): Likewise.
16662 (__arm_vmlaldavxq_s32): Likewise.
16663 (__arm_vmlaldavq_s32): Likewise.
16664 (__arm_vminnmvq_f32): Likewise.
16665 (__arm_vminnmq_f32): Likewise.
16666 (__arm_vminnmavq_f32): Likewise.
16667 (__arm_vminnmaq_f32): Likewise.
16668 (__arm_vmaxnmvq_f32): Likewise.
16669 (__arm_vmaxnmq_f32): Likewise.
16670 (__arm_vmaxnmavq_f32): Likewise.
16671 (__arm_vmaxnmaq_f32): Likewise.
16672 (__arm_veorq_f32): Likewise.
16673 (__arm_vcmulq_rot90_f32): Likewise.
16674 (__arm_vcmulq_rot270_f32): Likewise.
16675 (__arm_vcmulq_rot180_f32): Likewise.
16676 (__arm_vcmulq_f32): Likewise.
16677 (__arm_vcaddq_rot90_f32): Likewise.
16678 (__arm_vcaddq_rot270_f32): Likewise.
16679 (__arm_vbicq_f32): Likewise.
16680 (__arm_vandq_f32): Likewise.
16681 (__arm_vaddq_n_f32): Likewise.
16682 (__arm_vabdq_f32): Likewise.
16683 (__arm_vshlltq_n_s16): Likewise.
16684 (__arm_vshllbq_n_s16): Likewise.
16685 (__arm_vorrq_n_s32): Likewise.
16686 (__arm_vbicq_n_s32): Likewise.
16687 (__arm_vrmlaldavhq_u32): Likewise.
16688 (__arm_vctp8q_m): Likewise.
16689 (__arm_vctp64q_m): Likewise.
16690 (__arm_vctp32q_m): Likewise.
16691 (__arm_vctp16q_m): Likewise.
16692 (__arm_vaddlvaq_u32): Likewise.
16693 (__arm_vrmlsldavhxq_s32): Likewise.
16694 (__arm_vrmlsldavhq_s32): Likewise.
16695 (__arm_vrmlaldavhxq_s32): Likewise.
16696 (__arm_vrmlaldavhq_s32): Likewise.
16697 (__arm_vcvttq_f16_f32): Likewise.
16698 (__arm_vcvtbq_f16_f32): Likewise.
16699 (__arm_vaddlvaq_s32): Likewise.
16700 (vst4q): Define polymorphic variant.
16701 (vrndxq): Likewise.
16703 (vrndpq): Likewise.
16704 (vrndnq): Likewise.
16705 (vrndmq): Likewise.
16706 (vrndaq): Likewise.
16707 (vrev64q): Likewise.
16709 (vdupq_n): Likewise.
16711 (vrev32q): Likewise.
16712 (vcvtbq_f32): Likewise.
16713 (vcvttq_f32): Likewise.
16715 (vsubq_n): Likewise.
16716 (vbrsrq_n): Likewise.
16717 (vcvtq_n): Likewise.
16721 (vaddq_n): Likewise.
16725 (vmulq_n): Likewise.
16727 (vcaddq_rot270): Likewise.
16728 (vcmpeqq_n): Likewise.
16729 (vcmpeqq): Likewise.
16730 (vcaddq_rot90): Likewise.
16731 (vcmpgeq_n): Likewise.
16732 (vcmpgeq): Likewise.
16733 (vcmpgtq_n): Likewise.
16734 (vcmpgtq): Likewise.
16735 (vcmpgtq): Likewise.
16736 (vcmpleq_n): Likewise.
16737 (vcmpleq_n): Likewise.
16738 (vcmpleq): Likewise.
16739 (vcmpleq): Likewise.
16740 (vcmpltq_n): Likewise.
16741 (vcmpltq_n): Likewise.
16742 (vcmpltq): Likewise.
16743 (vcmpltq): Likewise.
16744 (vcmpneq_n): Likewise.
16745 (vcmpneq_n): Likewise.
16746 (vcmpneq): Likewise.
16747 (vcmpneq): Likewise.
16748 (vcmulq): Likewise.
16749 (vcmulq): Likewise.
16750 (vcmulq_rot180): Likewise.
16751 (vcmulq_rot180): Likewise.
16752 (vcmulq_rot270): Likewise.
16753 (vcmulq_rot270): Likewise.
16754 (vcmulq_rot90): Likewise.
16755 (vcmulq_rot90): Likewise.
16758 (vmaxnmaq): Likewise.
16759 (vmaxnmaq): Likewise.
16760 (vmaxnmavq): Likewise.
16761 (vmaxnmavq): Likewise.
16762 (vmaxnmq): Likewise.
16763 (vmaxnmq): Likewise.
16764 (vmaxnmvq): Likewise.
16765 (vmaxnmvq): Likewise.
16766 (vminnmaq): Likewise.
16767 (vminnmaq): Likewise.
16768 (vminnmavq): Likewise.
16769 (vminnmavq): Likewise.
16770 (vminnmq): Likewise.
16771 (vminnmq): Likewise.
16772 (vminnmvq): Likewise.
16773 (vminnmvq): Likewise.
16774 (vbicq_n): Likewise.
16775 (vqmovntq): Likewise.
16776 (vqmovntq): Likewise.
16777 (vqmovnbq): Likewise.
16778 (vqmovnbq): Likewise.
16779 (vmulltq_poly): Likewise.
16780 (vmulltq_poly): Likewise.
16781 (vmullbq_poly): Likewise.
16782 (vmullbq_poly): Likewise.
16783 (vmovntq): Likewise.
16784 (vmovntq): Likewise.
16785 (vmovnbq): Likewise.
16786 (vmovnbq): Likewise.
16787 (vmlaldavxq): Likewise.
16788 (vmlaldavxq): Likewise.
16789 (vqmovuntq): Likewise.
16790 (vqmovuntq): Likewise.
16791 (vshlltq_n): Likewise.
16792 (vshlltq_n): Likewise.
16793 (vshllbq_n): Likewise.
16794 (vshllbq_n): Likewise.
16795 (vorrq_n): Likewise.
16796 (vorrq_n): Likewise.
16797 (vmlaldavq): Likewise.
16798 (vmlaldavq): Likewise.
16799 (vqmovunbq): Likewise.
16800 (vqmovunbq): Likewise.
16801 (vqdmulltq_n): Likewise.
16802 (vqdmulltq_n): Likewise.
16803 (vqdmulltq): Likewise.
16804 (vqdmulltq): Likewise.
16805 (vqdmullbq_n): Likewise.
16806 (vqdmullbq_n): Likewise.
16807 (vqdmullbq): Likewise.
16808 (vqdmullbq): Likewise.
16809 (vaddlvaq): Likewise.
16810 (vaddlvaq): Likewise.
16811 (vrmlaldavhq): Likewise.
16812 (vrmlaldavhq): Likewise.
16813 (vrmlaldavhxq): Likewise.
16814 (vrmlaldavhxq): Likewise.
16815 (vrmlsldavhq): Likewise.
16816 (vrmlsldavhq): Likewise.
16817 (vrmlsldavhxq): Likewise.
16818 (vrmlsldavhxq): Likewise.
16819 (vmlsldavxq): Likewise.
16820 (vmlsldavxq): Likewise.
16821 (vmlsldavq): Likewise.
16822 (vmlsldavq): Likewise.
16823 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
16824 (BINOP_NONE_NONE_NONE): Likewise.
16825 (BINOP_UNONE_NONE_NONE): Likewise.
16826 (BINOP_UNONE_UNONE_IMM): Likewise.
16827 (BINOP_UNONE_UNONE_NONE): Likewise.
16828 (BINOP_UNONE_UNONE_UNONE): Likewise.
16829 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
16830 (mve_vaddlvaq_<supf>v4si): Likewise.
16831 (mve_vaddq_n_f<mode>): Likewise.
16832 (mve_vandq_f<mode>): Likewise.
16833 (mve_vbicq_f<mode>): Likewise.
16834 (mve_vbicq_n_<supf><mode>): Likewise.
16835 (mve_vcaddq_rot270_f<mode>): Likewise.
16836 (mve_vcaddq_rot90_f<mode>): Likewise.
16837 (mve_vcmpeqq_f<mode>): Likewise.
16838 (mve_vcmpeqq_n_f<mode>): Likewise.
16839 (mve_vcmpgeq_f<mode>): Likewise.
16840 (mve_vcmpgeq_n_f<mode>): Likewise.
16841 (mve_vcmpgtq_f<mode>): Likewise.
16842 (mve_vcmpgtq_n_f<mode>): Likewise.
16843 (mve_vcmpleq_f<mode>): Likewise.
16844 (mve_vcmpleq_n_f<mode>): Likewise.
16845 (mve_vcmpltq_f<mode>): Likewise.
16846 (mve_vcmpltq_n_f<mode>): Likewise.
16847 (mve_vcmpneq_f<mode>): Likewise.
16848 (mve_vcmpneq_n_f<mode>): Likewise.
16849 (mve_vcmulq_f<mode>): Likewise.
16850 (mve_vcmulq_rot180_f<mode>): Likewise.
16851 (mve_vcmulq_rot270_f<mode>): Likewise.
16852 (mve_vcmulq_rot90_f<mode>): Likewise.
16853 (mve_vctp<mode1>q_mhi): Likewise.
16854 (mve_vcvtbq_f16_f32v8hf): Likewise.
16855 (mve_vcvttq_f16_f32v8hf): Likewise.
16856 (mve_veorq_f<mode>): Likewise.
16857 (mve_vmaxnmaq_f<mode>): Likewise.
16858 (mve_vmaxnmavq_f<mode>): Likewise.
16859 (mve_vmaxnmq_f<mode>): Likewise.
16860 (mve_vmaxnmvq_f<mode>): Likewise.
16861 (mve_vminnmaq_f<mode>): Likewise.
16862 (mve_vminnmavq_f<mode>): Likewise.
16863 (mve_vminnmq_f<mode>): Likewise.
16864 (mve_vminnmvq_f<mode>): Likewise.
16865 (mve_vmlaldavq_<supf><mode>): Likewise.
16866 (mve_vmlaldavxq_<supf><mode>): Likewise.
16867 (mve_vmlsldavq_s<mode>): Likewise.
16868 (mve_vmlsldavxq_s<mode>): Likewise.
16869 (mve_vmovnbq_<supf><mode>): Likewise.
16870 (mve_vmovntq_<supf><mode>): Likewise.
16871 (mve_vmulq_f<mode>): Likewise.
16872 (mve_vmulq_n_f<mode>): Likewise.
16873 (mve_vornq_f<mode>): Likewise.
16874 (mve_vorrq_f<mode>): Likewise.
16875 (mve_vorrq_n_<supf><mode>): Likewise.
16876 (mve_vqdmullbq_n_s<mode>): Likewise.
16877 (mve_vqdmullbq_s<mode>): Likewise.
16878 (mve_vqdmulltq_n_s<mode>): Likewise.
16879 (mve_vqdmulltq_s<mode>): Likewise.
16880 (mve_vqmovnbq_<supf><mode>): Likewise.
16881 (mve_vqmovntq_<supf><mode>): Likewise.
16882 (mve_vqmovunbq_s<mode>): Likewise.
16883 (mve_vqmovuntq_s<mode>): Likewise.
16884 (mve_vrmlaldavhxq_sv4si): Likewise.
16885 (mve_vrmlsldavhq_sv4si): Likewise.
16886 (mve_vrmlsldavhxq_sv4si): Likewise.
16887 (mve_vshllbq_n_<supf><mode>): Likewise.
16888 (mve_vshlltq_n_<supf><mode>): Likewise.
16889 (mve_vsubq_f<mode>): Likewise.
16890 (mve_vmulltq_poly_p<mode>): Likewise.
16891 (mve_vmullbq_poly_p<mode>): Likewise.
16892 (mve_vrmlaldavhq_<supf>v4si): Likewise.
16894 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16895 Mihail Ionescu <mihail.ionescu@arm.com>
16896 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16898 * config/arm/arm_mve.h (vsubq_u8): Define macro.
16899 (vsubq_n_u8): Likewise.
16900 (vrmulhq_u8): Likewise.
16901 (vrhaddq_u8): Likewise.
16902 (vqsubq_u8): Likewise.
16903 (vqsubq_n_u8): Likewise.
16904 (vqaddq_u8): Likewise.
16905 (vqaddq_n_u8): Likewise.
16906 (vorrq_u8): Likewise.
16907 (vornq_u8): Likewise.
16908 (vmulq_u8): Likewise.
16909 (vmulq_n_u8): Likewise.
16910 (vmulltq_int_u8): Likewise.
16911 (vmullbq_int_u8): Likewise.
16912 (vmulhq_u8): Likewise.
16913 (vmladavq_u8): Likewise.
16914 (vminvq_u8): Likewise.
16915 (vminq_u8): Likewise.
16916 (vmaxvq_u8): Likewise.
16917 (vmaxq_u8): Likewise.
16918 (vhsubq_u8): Likewise.
16919 (vhsubq_n_u8): Likewise.
16920 (vhaddq_u8): Likewise.
16921 (vhaddq_n_u8): Likewise.
16922 (veorq_u8): Likewise.
16923 (vcmpneq_n_u8): Likewise.
16924 (vcmphiq_u8): Likewise.
16925 (vcmphiq_n_u8): Likewise.
16926 (vcmpeqq_u8): Likewise.
16927 (vcmpeqq_n_u8): Likewise.
16928 (vcmpcsq_u8): Likewise.
16929 (vcmpcsq_n_u8): Likewise.
16930 (vcaddq_rot90_u8): Likewise.
16931 (vcaddq_rot270_u8): Likewise.
16932 (vbicq_u8): Likewise.
16933 (vandq_u8): Likewise.
16934 (vaddvq_p_u8): Likewise.
16935 (vaddvaq_u8): Likewise.
16936 (vaddq_n_u8): Likewise.
16937 (vabdq_u8): Likewise.
16938 (vshlq_r_u8): Likewise.
16939 (vrshlq_u8): Likewise.
16940 (vrshlq_n_u8): Likewise.
16941 (vqshlq_u8): Likewise.
16942 (vqshlq_r_u8): Likewise.
16943 (vqrshlq_u8): Likewise.
16944 (vqrshlq_n_u8): Likewise.
16945 (vminavq_s8): Likewise.
16946 (vminaq_s8): Likewise.
16947 (vmaxavq_s8): Likewise.
16948 (vmaxaq_s8): Likewise.
16949 (vbrsrq_n_u8): Likewise.
16950 (vshlq_n_u8): Likewise.
16951 (vrshrq_n_u8): Likewise.
16952 (vqshlq_n_u8): Likewise.
16953 (vcmpneq_n_s8): Likewise.
16954 (vcmpltq_s8): Likewise.
16955 (vcmpltq_n_s8): Likewise.
16956 (vcmpleq_s8): Likewise.
16957 (vcmpleq_n_s8): Likewise.
16958 (vcmpgtq_s8): Likewise.
16959 (vcmpgtq_n_s8): Likewise.
16960 (vcmpgeq_s8): Likewise.
16961 (vcmpgeq_n_s8): Likewise.
16962 (vcmpeqq_s8): Likewise.
16963 (vcmpeqq_n_s8): Likewise.
16964 (vqshluq_n_s8): Likewise.
16965 (vaddvq_p_s8): Likewise.
16966 (vsubq_s8): Likewise.
16967 (vsubq_n_s8): Likewise.
16968 (vshlq_r_s8): Likewise.
16969 (vrshlq_s8): Likewise.
16970 (vrshlq_n_s8): Likewise.
16971 (vrmulhq_s8): Likewise.
16972 (vrhaddq_s8): Likewise.
16973 (vqsubq_s8): Likewise.
16974 (vqsubq_n_s8): Likewise.
16975 (vqshlq_s8): Likewise.
16976 (vqshlq_r_s8): Likewise.
16977 (vqrshlq_s8): Likewise.
16978 (vqrshlq_n_s8): Likewise.
16979 (vqrdmulhq_s8): Likewise.
16980 (vqrdmulhq_n_s8): Likewise.
16981 (vqdmulhq_s8): Likewise.
16982 (vqdmulhq_n_s8): Likewise.
16983 (vqaddq_s8): Likewise.
16984 (vqaddq_n_s8): Likewise.
16985 (vorrq_s8): Likewise.
16986 (vornq_s8): Likewise.
16987 (vmulq_s8): Likewise.
16988 (vmulq_n_s8): Likewise.
16989 (vmulltq_int_s8): Likewise.
16990 (vmullbq_int_s8): Likewise.
16991 (vmulhq_s8): Likewise.
16992 (vmlsdavxq_s8): Likewise.
16993 (vmlsdavq_s8): Likewise.
16994 (vmladavxq_s8): Likewise.
16995 (vmladavq_s8): Likewise.
16996 (vminvq_s8): Likewise.
16997 (vminq_s8): Likewise.
16998 (vmaxvq_s8): Likewise.
16999 (vmaxq_s8): Likewise.
17000 (vhsubq_s8): Likewise.
17001 (vhsubq_n_s8): Likewise.
17002 (vhcaddq_rot90_s8): Likewise.
17003 (vhcaddq_rot270_s8): Likewise.
17004 (vhaddq_s8): Likewise.
17005 (vhaddq_n_s8): Likewise.
17006 (veorq_s8): Likewise.
17007 (vcaddq_rot90_s8): Likewise.
17008 (vcaddq_rot270_s8): Likewise.
17009 (vbrsrq_n_s8): Likewise.
17010 (vbicq_s8): Likewise.
17011 (vandq_s8): Likewise.
17012 (vaddvaq_s8): Likewise.
17013 (vaddq_n_s8): Likewise.
17014 (vabdq_s8): Likewise.
17015 (vshlq_n_s8): Likewise.
17016 (vrshrq_n_s8): Likewise.
17017 (vqshlq_n_s8): Likewise.
17018 (vsubq_u16): Likewise.
17019 (vsubq_n_u16): Likewise.
17020 (vrmulhq_u16): Likewise.
17021 (vrhaddq_u16): Likewise.
17022 (vqsubq_u16): Likewise.
17023 (vqsubq_n_u16): Likewise.
17024 (vqaddq_u16): Likewise.
17025 (vqaddq_n_u16): Likewise.
17026 (vorrq_u16): Likewise.
17027 (vornq_u16): Likewise.
17028 (vmulq_u16): Likewise.
17029 (vmulq_n_u16): Likewise.
17030 (vmulltq_int_u16): Likewise.
17031 (vmullbq_int_u16): Likewise.
17032 (vmulhq_u16): Likewise.
17033 (vmladavq_u16): Likewise.
17034 (vminvq_u16): Likewise.
17035 (vminq_u16): Likewise.
17036 (vmaxvq_u16): Likewise.
17037 (vmaxq_u16): Likewise.
17038 (vhsubq_u16): Likewise.
17039 (vhsubq_n_u16): Likewise.
17040 (vhaddq_u16): Likewise.
17041 (vhaddq_n_u16): Likewise.
17042 (veorq_u16): Likewise.
17043 (vcmpneq_n_u16): Likewise.
17044 (vcmphiq_u16): Likewise.
17045 (vcmphiq_n_u16): Likewise.
17046 (vcmpeqq_u16): Likewise.
17047 (vcmpeqq_n_u16): Likewise.
17048 (vcmpcsq_u16): Likewise.
17049 (vcmpcsq_n_u16): Likewise.
17050 (vcaddq_rot90_u16): Likewise.
17051 (vcaddq_rot270_u16): Likewise.
17052 (vbicq_u16): Likewise.
17053 (vandq_u16): Likewise.
17054 (vaddvq_p_u16): Likewise.
17055 (vaddvaq_u16): Likewise.
17056 (vaddq_n_u16): Likewise.
17057 (vabdq_u16): Likewise.
17058 (vshlq_r_u16): Likewise.
17059 (vrshlq_u16): Likewise.
17060 (vrshlq_n_u16): Likewise.
17061 (vqshlq_u16): Likewise.
17062 (vqshlq_r_u16): Likewise.
17063 (vqrshlq_u16): Likewise.
17064 (vqrshlq_n_u16): Likewise.
17065 (vminavq_s16): Likewise.
17066 (vminaq_s16): Likewise.
17067 (vmaxavq_s16): Likewise.
17068 (vmaxaq_s16): Likewise.
17069 (vbrsrq_n_u16): Likewise.
17070 (vshlq_n_u16): Likewise.
17071 (vrshrq_n_u16): Likewise.
17072 (vqshlq_n_u16): Likewise.
17073 (vcmpneq_n_s16): Likewise.
17074 (vcmpltq_s16): Likewise.
17075 (vcmpltq_n_s16): Likewise.
17076 (vcmpleq_s16): Likewise.
17077 (vcmpleq_n_s16): Likewise.
17078 (vcmpgtq_s16): Likewise.
17079 (vcmpgtq_n_s16): Likewise.
17080 (vcmpgeq_s16): Likewise.
17081 (vcmpgeq_n_s16): Likewise.
17082 (vcmpeqq_s16): Likewise.
17083 (vcmpeqq_n_s16): Likewise.
17084 (vqshluq_n_s16): Likewise.
17085 (vaddvq_p_s16): Likewise.
17086 (vsubq_s16): Likewise.
17087 (vsubq_n_s16): Likewise.
17088 (vshlq_r_s16): Likewise.
17089 (vrshlq_s16): Likewise.
17090 (vrshlq_n_s16): Likewise.
17091 (vrmulhq_s16): Likewise.
17092 (vrhaddq_s16): Likewise.
17093 (vqsubq_s16): Likewise.
17094 (vqsubq_n_s16): Likewise.
17095 (vqshlq_s16): Likewise.
17096 (vqshlq_r_s16): Likewise.
17097 (vqrshlq_s16): Likewise.
17098 (vqrshlq_n_s16): Likewise.
17099 (vqrdmulhq_s16): Likewise.
17100 (vqrdmulhq_n_s16): Likewise.
17101 (vqdmulhq_s16): Likewise.
17102 (vqdmulhq_n_s16): Likewise.
17103 (vqaddq_s16): Likewise.
17104 (vqaddq_n_s16): Likewise.
17105 (vorrq_s16): Likewise.
17106 (vornq_s16): Likewise.
17107 (vmulq_s16): Likewise.
17108 (vmulq_n_s16): Likewise.
17109 (vmulltq_int_s16): Likewise.
17110 (vmullbq_int_s16): Likewise.
17111 (vmulhq_s16): Likewise.
17112 (vmlsdavxq_s16): Likewise.
17113 (vmlsdavq_s16): Likewise.
17114 (vmladavxq_s16): Likewise.
17115 (vmladavq_s16): Likewise.
17116 (vminvq_s16): Likewise.
17117 (vminq_s16): Likewise.
17118 (vmaxvq_s16): Likewise.
17119 (vmaxq_s16): Likewise.
17120 (vhsubq_s16): Likewise.
17121 (vhsubq_n_s16): Likewise.
17122 (vhcaddq_rot90_s16): Likewise.
17123 (vhcaddq_rot270_s16): Likewise.
17124 (vhaddq_s16): Likewise.
17125 (vhaddq_n_s16): Likewise.
17126 (veorq_s16): Likewise.
17127 (vcaddq_rot90_s16): Likewise.
17128 (vcaddq_rot270_s16): Likewise.
17129 (vbrsrq_n_s16): Likewise.
17130 (vbicq_s16): Likewise.
17131 (vandq_s16): Likewise.
17132 (vaddvaq_s16): Likewise.
17133 (vaddq_n_s16): Likewise.
17134 (vabdq_s16): Likewise.
17135 (vshlq_n_s16): Likewise.
17136 (vrshrq_n_s16): Likewise.
17137 (vqshlq_n_s16): Likewise.
17138 (vsubq_u32): Likewise.
17139 (vsubq_n_u32): Likewise.
17140 (vrmulhq_u32): Likewise.
17141 (vrhaddq_u32): Likewise.
17142 (vqsubq_u32): Likewise.
17143 (vqsubq_n_u32): Likewise.
17144 (vqaddq_u32): Likewise.
17145 (vqaddq_n_u32): Likewise.
17146 (vorrq_u32): Likewise.
17147 (vornq_u32): Likewise.
17148 (vmulq_u32): Likewise.
17149 (vmulq_n_u32): Likewise.
17150 (vmulltq_int_u32): Likewise.
17151 (vmullbq_int_u32): Likewise.
17152 (vmulhq_u32): Likewise.
17153 (vmladavq_u32): Likewise.
17154 (vminvq_u32): Likewise.
17155 (vminq_u32): Likewise.
17156 (vmaxvq_u32): Likewise.
17157 (vmaxq_u32): Likewise.
17158 (vhsubq_u32): Likewise.
17159 (vhsubq_n_u32): Likewise.
17160 (vhaddq_u32): Likewise.
17161 (vhaddq_n_u32): Likewise.
17162 (veorq_u32): Likewise.
17163 (vcmpneq_n_u32): Likewise.
17164 (vcmphiq_u32): Likewise.
17165 (vcmphiq_n_u32): Likewise.
17166 (vcmpeqq_u32): Likewise.
17167 (vcmpeqq_n_u32): Likewise.
17168 (vcmpcsq_u32): Likewise.
17169 (vcmpcsq_n_u32): Likewise.
17170 (vcaddq_rot90_u32): Likewise.
17171 (vcaddq_rot270_u32): Likewise.
17172 (vbicq_u32): Likewise.
17173 (vandq_u32): Likewise.
17174 (vaddvq_p_u32): Likewise.
17175 (vaddvaq_u32): Likewise.
17176 (vaddq_n_u32): Likewise.
17177 (vabdq_u32): Likewise.
17178 (vshlq_r_u32): Likewise.
17179 (vrshlq_u32): Likewise.
17180 (vrshlq_n_u32): Likewise.
17181 (vqshlq_u32): Likewise.
17182 (vqshlq_r_u32): Likewise.
17183 (vqrshlq_u32): Likewise.
17184 (vqrshlq_n_u32): Likewise.
17185 (vminavq_s32): Likewise.
17186 (vminaq_s32): Likewise.
17187 (vmaxavq_s32): Likewise.
17188 (vmaxaq_s32): Likewise.
17189 (vbrsrq_n_u32): Likewise.
17190 (vshlq_n_u32): Likewise.
17191 (vrshrq_n_u32): Likewise.
17192 (vqshlq_n_u32): Likewise.
17193 (vcmpneq_n_s32): Likewise.
17194 (vcmpltq_s32): Likewise.
17195 (vcmpltq_n_s32): Likewise.
17196 (vcmpleq_s32): Likewise.
17197 (vcmpleq_n_s32): Likewise.
17198 (vcmpgtq_s32): Likewise.
17199 (vcmpgtq_n_s32): Likewise.
17200 (vcmpgeq_s32): Likewise.
17201 (vcmpgeq_n_s32): Likewise.
17202 (vcmpeqq_s32): Likewise.
17203 (vcmpeqq_n_s32): Likewise.
17204 (vqshluq_n_s32): Likewise.
17205 (vaddvq_p_s32): Likewise.
17206 (vsubq_s32): Likewise.
17207 (vsubq_n_s32): Likewise.
17208 (vshlq_r_s32): Likewise.
17209 (vrshlq_s32): Likewise.
17210 (vrshlq_n_s32): Likewise.
17211 (vrmulhq_s32): Likewise.
17212 (vrhaddq_s32): Likewise.
17213 (vqsubq_s32): Likewise.
17214 (vqsubq_n_s32): Likewise.
17215 (vqshlq_s32): Likewise.
17216 (vqshlq_r_s32): Likewise.
17217 (vqrshlq_s32): Likewise.
17218 (vqrshlq_n_s32): Likewise.
17219 (vqrdmulhq_s32): Likewise.
17220 (vqrdmulhq_n_s32): Likewise.
17221 (vqdmulhq_s32): Likewise.
17222 (vqdmulhq_n_s32): Likewise.
17223 (vqaddq_s32): Likewise.
17224 (vqaddq_n_s32): Likewise.
17225 (vorrq_s32): Likewise.
17226 (vornq_s32): Likewise.
17227 (vmulq_s32): Likewise.
17228 (vmulq_n_s32): Likewise.
17229 (vmulltq_int_s32): Likewise.
17230 (vmullbq_int_s32): Likewise.
17231 (vmulhq_s32): Likewise.
17232 (vmlsdavxq_s32): Likewise.
17233 (vmlsdavq_s32): Likewise.
17234 (vmladavxq_s32): Likewise.
17235 (vmladavq_s32): Likewise.
17236 (vminvq_s32): Likewise.
17237 (vminq_s32): Likewise.
17238 (vmaxvq_s32): Likewise.
17239 (vmaxq_s32): Likewise.
17240 (vhsubq_s32): Likewise.
17241 (vhsubq_n_s32): Likewise.
17242 (vhcaddq_rot90_s32): Likewise.
17243 (vhcaddq_rot270_s32): Likewise.
17244 (vhaddq_s32): Likewise.
17245 (vhaddq_n_s32): Likewise.
17246 (veorq_s32): Likewise.
17247 (vcaddq_rot90_s32): Likewise.
17248 (vcaddq_rot270_s32): Likewise.
17249 (vbrsrq_n_s32): Likewise.
17250 (vbicq_s32): Likewise.
17251 (vandq_s32): Likewise.
17252 (vaddvaq_s32): Likewise.
17253 (vaddq_n_s32): Likewise.
17254 (vabdq_s32): Likewise.
17255 (vshlq_n_s32): Likewise.
17256 (vrshrq_n_s32): Likewise.
17257 (vqshlq_n_s32): Likewise.
17258 (__arm_vsubq_u8): Define intrinsic.
17259 (__arm_vsubq_n_u8): Likewise.
17260 (__arm_vrmulhq_u8): Likewise.
17261 (__arm_vrhaddq_u8): Likewise.
17262 (__arm_vqsubq_u8): Likewise.
17263 (__arm_vqsubq_n_u8): Likewise.
17264 (__arm_vqaddq_u8): Likewise.
17265 (__arm_vqaddq_n_u8): Likewise.
17266 (__arm_vorrq_u8): Likewise.
17267 (__arm_vornq_u8): Likewise.
17268 (__arm_vmulq_u8): Likewise.
17269 (__arm_vmulq_n_u8): Likewise.
17270 (__arm_vmulltq_int_u8): Likewise.
17271 (__arm_vmullbq_int_u8): Likewise.
17272 (__arm_vmulhq_u8): Likewise.
17273 (__arm_vmladavq_u8): Likewise.
17274 (__arm_vminvq_u8): Likewise.
17275 (__arm_vminq_u8): Likewise.
17276 (__arm_vmaxvq_u8): Likewise.
17277 (__arm_vmaxq_u8): Likewise.
17278 (__arm_vhsubq_u8): Likewise.
17279 (__arm_vhsubq_n_u8): Likewise.
17280 (__arm_vhaddq_u8): Likewise.
17281 (__arm_vhaddq_n_u8): Likewise.
17282 (__arm_veorq_u8): Likewise.
17283 (__arm_vcmpneq_n_u8): Likewise.
17284 (__arm_vcmphiq_u8): Likewise.
17285 (__arm_vcmphiq_n_u8): Likewise.
17286 (__arm_vcmpeqq_u8): Likewise.
17287 (__arm_vcmpeqq_n_u8): Likewise.
17288 (__arm_vcmpcsq_u8): Likewise.
17289 (__arm_vcmpcsq_n_u8): Likewise.
17290 (__arm_vcaddq_rot90_u8): Likewise.
17291 (__arm_vcaddq_rot270_u8): Likewise.
17292 (__arm_vbicq_u8): Likewise.
17293 (__arm_vandq_u8): Likewise.
17294 (__arm_vaddvq_p_u8): Likewise.
17295 (__arm_vaddvaq_u8): Likewise.
17296 (__arm_vaddq_n_u8): Likewise.
17297 (__arm_vabdq_u8): Likewise.
17298 (__arm_vshlq_r_u8): Likewise.
17299 (__arm_vrshlq_u8): Likewise.
17300 (__arm_vrshlq_n_u8): Likewise.
17301 (__arm_vqshlq_u8): Likewise.
17302 (__arm_vqshlq_r_u8): Likewise.
17303 (__arm_vqrshlq_u8): Likewise.
17304 (__arm_vqrshlq_n_u8): Likewise.
17305 (__arm_vminavq_s8): Likewise.
17306 (__arm_vminaq_s8): Likewise.
17307 (__arm_vmaxavq_s8): Likewise.
17308 (__arm_vmaxaq_s8): Likewise.
17309 (__arm_vbrsrq_n_u8): Likewise.
17310 (__arm_vshlq_n_u8): Likewise.
17311 (__arm_vrshrq_n_u8): Likewise.
17312 (__arm_vqshlq_n_u8): Likewise.
17313 (__arm_vcmpneq_n_s8): Likewise.
17314 (__arm_vcmpltq_s8): Likewise.
17315 (__arm_vcmpltq_n_s8): Likewise.
17316 (__arm_vcmpleq_s8): Likewise.
17317 (__arm_vcmpleq_n_s8): Likewise.
17318 (__arm_vcmpgtq_s8): Likewise.
17319 (__arm_vcmpgtq_n_s8): Likewise.
17320 (__arm_vcmpgeq_s8): Likewise.
17321 (__arm_vcmpgeq_n_s8): Likewise.
17322 (__arm_vcmpeqq_s8): Likewise.
17323 (__arm_vcmpeqq_n_s8): Likewise.
17324 (__arm_vqshluq_n_s8): Likewise.
17325 (__arm_vaddvq_p_s8): Likewise.
17326 (__arm_vsubq_s8): Likewise.
17327 (__arm_vsubq_n_s8): Likewise.
17328 (__arm_vshlq_r_s8): Likewise.
17329 (__arm_vrshlq_s8): Likewise.
17330 (__arm_vrshlq_n_s8): Likewise.
17331 (__arm_vrmulhq_s8): Likewise.
17332 (__arm_vrhaddq_s8): Likewise.
17333 (__arm_vqsubq_s8): Likewise.
17334 (__arm_vqsubq_n_s8): Likewise.
17335 (__arm_vqshlq_s8): Likewise.
17336 (__arm_vqshlq_r_s8): Likewise.
17337 (__arm_vqrshlq_s8): Likewise.
17338 (__arm_vqrshlq_n_s8): Likewise.
17339 (__arm_vqrdmulhq_s8): Likewise.
17340 (__arm_vqrdmulhq_n_s8): Likewise.
17341 (__arm_vqdmulhq_s8): Likewise.
17342 (__arm_vqdmulhq_n_s8): Likewise.
17343 (__arm_vqaddq_s8): Likewise.
17344 (__arm_vqaddq_n_s8): Likewise.
17345 (__arm_vorrq_s8): Likewise.
17346 (__arm_vornq_s8): Likewise.
17347 (__arm_vmulq_s8): Likewise.
17348 (__arm_vmulq_n_s8): Likewise.
17349 (__arm_vmulltq_int_s8): Likewise.
17350 (__arm_vmullbq_int_s8): Likewise.
17351 (__arm_vmulhq_s8): Likewise.
17352 (__arm_vmlsdavxq_s8): Likewise.
17353 (__arm_vmlsdavq_s8): Likewise.
17354 (__arm_vmladavxq_s8): Likewise.
17355 (__arm_vmladavq_s8): Likewise.
17356 (__arm_vminvq_s8): Likewise.
17357 (__arm_vminq_s8): Likewise.
17358 (__arm_vmaxvq_s8): Likewise.
17359 (__arm_vmaxq_s8): Likewise.
17360 (__arm_vhsubq_s8): Likewise.
17361 (__arm_vhsubq_n_s8): Likewise.
17362 (__arm_vhcaddq_rot90_s8): Likewise.
17363 (__arm_vhcaddq_rot270_s8): Likewise.
17364 (__arm_vhaddq_s8): Likewise.
17365 (__arm_vhaddq_n_s8): Likewise.
17366 (__arm_veorq_s8): Likewise.
17367 (__arm_vcaddq_rot90_s8): Likewise.
17368 (__arm_vcaddq_rot270_s8): Likewise.
17369 (__arm_vbrsrq_n_s8): Likewise.
17370 (__arm_vbicq_s8): Likewise.
17371 (__arm_vandq_s8): Likewise.
17372 (__arm_vaddvaq_s8): Likewise.
17373 (__arm_vaddq_n_s8): Likewise.
17374 (__arm_vabdq_s8): Likewise.
17375 (__arm_vshlq_n_s8): Likewise.
17376 (__arm_vrshrq_n_s8): Likewise.
17377 (__arm_vqshlq_n_s8): Likewise.
17378 (__arm_vsubq_u16): Likewise.
17379 (__arm_vsubq_n_u16): Likewise.
17380 (__arm_vrmulhq_u16): Likewise.
17381 (__arm_vrhaddq_u16): Likewise.
17382 (__arm_vqsubq_u16): Likewise.
17383 (__arm_vqsubq_n_u16): Likewise.
17384 (__arm_vqaddq_u16): Likewise.
17385 (__arm_vqaddq_n_u16): Likewise.
17386 (__arm_vorrq_u16): Likewise.
17387 (__arm_vornq_u16): Likewise.
17388 (__arm_vmulq_u16): Likewise.
17389 (__arm_vmulq_n_u16): Likewise.
17390 (__arm_vmulltq_int_u16): Likewise.
17391 (__arm_vmullbq_int_u16): Likewise.
17392 (__arm_vmulhq_u16): Likewise.
17393 (__arm_vmladavq_u16): Likewise.
17394 (__arm_vminvq_u16): Likewise.
17395 (__arm_vminq_u16): Likewise.
17396 (__arm_vmaxvq_u16): Likewise.
17397 (__arm_vmaxq_u16): Likewise.
17398 (__arm_vhsubq_u16): Likewise.
17399 (__arm_vhsubq_n_u16): Likewise.
17400 (__arm_vhaddq_u16): Likewise.
17401 (__arm_vhaddq_n_u16): Likewise.
17402 (__arm_veorq_u16): Likewise.
17403 (__arm_vcmpneq_n_u16): Likewise.
17404 (__arm_vcmphiq_u16): Likewise.
17405 (__arm_vcmphiq_n_u16): Likewise.
17406 (__arm_vcmpeqq_u16): Likewise.
17407 (__arm_vcmpeqq_n_u16): Likewise.
17408 (__arm_vcmpcsq_u16): Likewise.
17409 (__arm_vcmpcsq_n_u16): Likewise.
17410 (__arm_vcaddq_rot90_u16): Likewise.
17411 (__arm_vcaddq_rot270_u16): Likewise.
17412 (__arm_vbicq_u16): Likewise.
17413 (__arm_vandq_u16): Likewise.
17414 (__arm_vaddvq_p_u16): Likewise.
17415 (__arm_vaddvaq_u16): Likewise.
17416 (__arm_vaddq_n_u16): Likewise.
17417 (__arm_vabdq_u16): Likewise.
17418 (__arm_vshlq_r_u16): Likewise.
17419 (__arm_vrshlq_u16): Likewise.
17420 (__arm_vrshlq_n_u16): Likewise.
17421 (__arm_vqshlq_u16): Likewise.
17422 (__arm_vqshlq_r_u16): Likewise.
17423 (__arm_vqrshlq_u16): Likewise.
17424 (__arm_vqrshlq_n_u16): Likewise.
17425 (__arm_vminavq_s16): Likewise.
17426 (__arm_vminaq_s16): Likewise.
17427 (__arm_vmaxavq_s16): Likewise.
17428 (__arm_vmaxaq_s16): Likewise.
17429 (__arm_vbrsrq_n_u16): Likewise.
17430 (__arm_vshlq_n_u16): Likewise.
17431 (__arm_vrshrq_n_u16): Likewise.
17432 (__arm_vqshlq_n_u16): Likewise.
17433 (__arm_vcmpneq_n_s16): Likewise.
17434 (__arm_vcmpltq_s16): Likewise.
17435 (__arm_vcmpltq_n_s16): Likewise.
17436 (__arm_vcmpleq_s16): Likewise.
17437 (__arm_vcmpleq_n_s16): Likewise.
17438 (__arm_vcmpgtq_s16): Likewise.
17439 (__arm_vcmpgtq_n_s16): Likewise.
17440 (__arm_vcmpgeq_s16): Likewise.
17441 (__arm_vcmpgeq_n_s16): Likewise.
17442 (__arm_vcmpeqq_s16): Likewise.
17443 (__arm_vcmpeqq_n_s16): Likewise.
17444 (__arm_vqshluq_n_s16): Likewise.
17445 (__arm_vaddvq_p_s16): Likewise.
17446 (__arm_vsubq_s16): Likewise.
17447 (__arm_vsubq_n_s16): Likewise.
17448 (__arm_vshlq_r_s16): Likewise.
17449 (__arm_vrshlq_s16): Likewise.
17450 (__arm_vrshlq_n_s16): Likewise.
17451 (__arm_vrmulhq_s16): Likewise.
17452 (__arm_vrhaddq_s16): Likewise.
17453 (__arm_vqsubq_s16): Likewise.
17454 (__arm_vqsubq_n_s16): Likewise.
17455 (__arm_vqshlq_s16): Likewise.
17456 (__arm_vqshlq_r_s16): Likewise.
17457 (__arm_vqrshlq_s16): Likewise.
17458 (__arm_vqrshlq_n_s16): Likewise.
17459 (__arm_vqrdmulhq_s16): Likewise.
17460 (__arm_vqrdmulhq_n_s16): Likewise.
17461 (__arm_vqdmulhq_s16): Likewise.
17462 (__arm_vqdmulhq_n_s16): Likewise.
17463 (__arm_vqaddq_s16): Likewise.
17464 (__arm_vqaddq_n_s16): Likewise.
17465 (__arm_vorrq_s16): Likewise.
17466 (__arm_vornq_s16): Likewise.
17467 (__arm_vmulq_s16): Likewise.
17468 (__arm_vmulq_n_s16): Likewise.
17469 (__arm_vmulltq_int_s16): Likewise.
17470 (__arm_vmullbq_int_s16): Likewise.
17471 (__arm_vmulhq_s16): Likewise.
17472 (__arm_vmlsdavxq_s16): Likewise.
17473 (__arm_vmlsdavq_s16): Likewise.
17474 (__arm_vmladavxq_s16): Likewise.
17475 (__arm_vmladavq_s16): Likewise.
17476 (__arm_vminvq_s16): Likewise.
17477 (__arm_vminq_s16): Likewise.
17478 (__arm_vmaxvq_s16): Likewise.
17479 (__arm_vmaxq_s16): Likewise.
17480 (__arm_vhsubq_s16): Likewise.
17481 (__arm_vhsubq_n_s16): Likewise.
17482 (__arm_vhcaddq_rot90_s16): Likewise.
17483 (__arm_vhcaddq_rot270_s16): Likewise.
17484 (__arm_vhaddq_s16): Likewise.
17485 (__arm_vhaddq_n_s16): Likewise.
17486 (__arm_veorq_s16): Likewise.
17487 (__arm_vcaddq_rot90_s16): Likewise.
17488 (__arm_vcaddq_rot270_s16): Likewise.
17489 (__arm_vbrsrq_n_s16): Likewise.
17490 (__arm_vbicq_s16): Likewise.
17491 (__arm_vandq_s16): Likewise.
17492 (__arm_vaddvaq_s16): Likewise.
17493 (__arm_vaddq_n_s16): Likewise.
17494 (__arm_vabdq_s16): Likewise.
17495 (__arm_vshlq_n_s16): Likewise.
17496 (__arm_vrshrq_n_s16): Likewise.
17497 (__arm_vqshlq_n_s16): Likewise.
17498 (__arm_vsubq_u32): Likewise.
17499 (__arm_vsubq_n_u32): Likewise.
17500 (__arm_vrmulhq_u32): Likewise.
17501 (__arm_vrhaddq_u32): Likewise.
17502 (__arm_vqsubq_u32): Likewise.
17503 (__arm_vqsubq_n_u32): Likewise.
17504 (__arm_vqaddq_u32): Likewise.
17505 (__arm_vqaddq_n_u32): Likewise.
17506 (__arm_vorrq_u32): Likewise.
17507 (__arm_vornq_u32): Likewise.
17508 (__arm_vmulq_u32): Likewise.
17509 (__arm_vmulq_n_u32): Likewise.
17510 (__arm_vmulltq_int_u32): Likewise.
17511 (__arm_vmullbq_int_u32): Likewise.
17512 (__arm_vmulhq_u32): Likewise.
17513 (__arm_vmladavq_u32): Likewise.
17514 (__arm_vminvq_u32): Likewise.
17515 (__arm_vminq_u32): Likewise.
17516 (__arm_vmaxvq_u32): Likewise.
17517 (__arm_vmaxq_u32): Likewise.
17518 (__arm_vhsubq_u32): Likewise.
17519 (__arm_vhsubq_n_u32): Likewise.
17520 (__arm_vhaddq_u32): Likewise.
17521 (__arm_vhaddq_n_u32): Likewise.
17522 (__arm_veorq_u32): Likewise.
17523 (__arm_vcmpneq_n_u32): Likewise.
17524 (__arm_vcmphiq_u32): Likewise.
17525 (__arm_vcmphiq_n_u32): Likewise.
17526 (__arm_vcmpeqq_u32): Likewise.
17527 (__arm_vcmpeqq_n_u32): Likewise.
17528 (__arm_vcmpcsq_u32): Likewise.
17529 (__arm_vcmpcsq_n_u32): Likewise.
17530 (__arm_vcaddq_rot90_u32): Likewise.
17531 (__arm_vcaddq_rot270_u32): Likewise.
17532 (__arm_vbicq_u32): Likewise.
17533 (__arm_vandq_u32): Likewise.
17534 (__arm_vaddvq_p_u32): Likewise.
17535 (__arm_vaddvaq_u32): Likewise.
17536 (__arm_vaddq_n_u32): Likewise.
17537 (__arm_vabdq_u32): Likewise.
17538 (__arm_vshlq_r_u32): Likewise.
17539 (__arm_vrshlq_u32): Likewise.
17540 (__arm_vrshlq_n_u32): Likewise.
17541 (__arm_vqshlq_u32): Likewise.
17542 (__arm_vqshlq_r_u32): Likewise.
17543 (__arm_vqrshlq_u32): Likewise.
17544 (__arm_vqrshlq_n_u32): Likewise.
17545 (__arm_vminavq_s32): Likewise.
17546 (__arm_vminaq_s32): Likewise.
17547 (__arm_vmaxavq_s32): Likewise.
17548 (__arm_vmaxaq_s32): Likewise.
17549 (__arm_vbrsrq_n_u32): Likewise.
17550 (__arm_vshlq_n_u32): Likewise.
17551 (__arm_vrshrq_n_u32): Likewise.
17552 (__arm_vqshlq_n_u32): Likewise.
17553 (__arm_vcmpneq_n_s32): Likewise.
17554 (__arm_vcmpltq_s32): Likewise.
17555 (__arm_vcmpltq_n_s32): Likewise.
17556 (__arm_vcmpleq_s32): Likewise.
17557 (__arm_vcmpleq_n_s32): Likewise.
17558 (__arm_vcmpgtq_s32): Likewise.
17559 (__arm_vcmpgtq_n_s32): Likewise.
17560 (__arm_vcmpgeq_s32): Likewise.
17561 (__arm_vcmpgeq_n_s32): Likewise.
17562 (__arm_vcmpeqq_s32): Likewise.
17563 (__arm_vcmpeqq_n_s32): Likewise.
17564 (__arm_vqshluq_n_s32): Likewise.
17565 (__arm_vaddvq_p_s32): Likewise.
17566 (__arm_vsubq_s32): Likewise.
17567 (__arm_vsubq_n_s32): Likewise.
17568 (__arm_vshlq_r_s32): Likewise.
17569 (__arm_vrshlq_s32): Likewise.
17570 (__arm_vrshlq_n_s32): Likewise.
17571 (__arm_vrmulhq_s32): Likewise.
17572 (__arm_vrhaddq_s32): Likewise.
17573 (__arm_vqsubq_s32): Likewise.
17574 (__arm_vqsubq_n_s32): Likewise.
17575 (__arm_vqshlq_s32): Likewise.
17576 (__arm_vqshlq_r_s32): Likewise.
17577 (__arm_vqrshlq_s32): Likewise.
17578 (__arm_vqrshlq_n_s32): Likewise.
17579 (__arm_vqrdmulhq_s32): Likewise.
17580 (__arm_vqrdmulhq_n_s32): Likewise.
17581 (__arm_vqdmulhq_s32): Likewise.
17582 (__arm_vqdmulhq_n_s32): Likewise.
17583 (__arm_vqaddq_s32): Likewise.
17584 (__arm_vqaddq_n_s32): Likewise.
17585 (__arm_vorrq_s32): Likewise.
17586 (__arm_vornq_s32): Likewise.
17587 (__arm_vmulq_s32): Likewise.
17588 (__arm_vmulq_n_s32): Likewise.
17589 (__arm_vmulltq_int_s32): Likewise.
17590 (__arm_vmullbq_int_s32): Likewise.
17591 (__arm_vmulhq_s32): Likewise.
17592 (__arm_vmlsdavxq_s32): Likewise.
17593 (__arm_vmlsdavq_s32): Likewise.
17594 (__arm_vmladavxq_s32): Likewise.
17595 (__arm_vmladavq_s32): Likewise.
17596 (__arm_vminvq_s32): Likewise.
17597 (__arm_vminq_s32): Likewise.
17598 (__arm_vmaxvq_s32): Likewise.
17599 (__arm_vmaxq_s32): Likewise.
17600 (__arm_vhsubq_s32): Likewise.
17601 (__arm_vhsubq_n_s32): Likewise.
17602 (__arm_vhcaddq_rot90_s32): Likewise.
17603 (__arm_vhcaddq_rot270_s32): Likewise.
17604 (__arm_vhaddq_s32): Likewise.
17605 (__arm_vhaddq_n_s32): Likewise.
17606 (__arm_veorq_s32): Likewise.
17607 (__arm_vcaddq_rot90_s32): Likewise.
17608 (__arm_vcaddq_rot270_s32): Likewise.
17609 (__arm_vbrsrq_n_s32): Likewise.
17610 (__arm_vbicq_s32): Likewise.
17611 (__arm_vandq_s32): Likewise.
17612 (__arm_vaddvaq_s32): Likewise.
17613 (__arm_vaddq_n_s32): Likewise.
17614 (__arm_vabdq_s32): Likewise.
17615 (__arm_vshlq_n_s32): Likewise.
17616 (__arm_vrshrq_n_s32): Likewise.
17617 (__arm_vqshlq_n_s32): Likewise.
17618 (vsubq): Define polymorphic variant.
17619 (vsubq_n): Likewise.
17620 (vshlq_r): Likewise.
17621 (vrshlq_n): Likewise.
17622 (vrshlq): Likewise.
17623 (vrmulhq): Likewise.
17624 (vrhaddq): Likewise.
17625 (vqsubq_n): Likewise.
17626 (vqsubq): Likewise.
17627 (vqshlq): Likewise.
17628 (vqshlq_r): Likewise.
17629 (vqshluq): Likewise.
17630 (vrshrq_n): Likewise.
17631 (vshlq_n): Likewise.
17632 (vqshluq_n): Likewise.
17633 (vqshlq_n): Likewise.
17634 (vqrshlq_n): Likewise.
17635 (vqrshlq): Likewise.
17636 (vqrdmulhq_n): Likewise.
17637 (vqrdmulhq): Likewise.
17638 (vqdmulhq_n): Likewise.
17639 (vqdmulhq): Likewise.
17640 (vqaddq_n): Likewise.
17641 (vqaddq): Likewise.
17642 (vorrq_n): Likewise.
17645 (vmulq_n): Likewise.
17647 (vmulltq_int): Likewise.
17648 (vmullbq_int): Likewise.
17649 (vmulhq): Likewise.
17651 (vminaq): Likewise.
17653 (vmaxaq): Likewise.
17654 (vhsubq_n): Likewise.
17655 (vhsubq): Likewise.
17656 (vhcaddq_rot90): Likewise.
17657 (vhcaddq_rot270): Likewise.
17658 (vhaddq_n): Likewise.
17659 (vhaddq): Likewise.
17661 (vcaddq_rot90): Likewise.
17662 (vcaddq_rot270): Likewise.
17663 (vbrsrq_n): Likewise.
17664 (vbicq_n): Likewise.
17667 (vaddq_n): Likewise.
17670 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
17671 (BINOP_NONE_NONE_NONE): Likewise.
17672 (BINOP_NONE_NONE_UNONE): Likewise.
17673 (BINOP_UNONE_NONE_IMM): Likewise.
17674 (BINOP_UNONE_NONE_NONE): Likewise.
17675 (BINOP_UNONE_UNONE_IMM): Likewise.
17676 (BINOP_UNONE_UNONE_NONE): Likewise.
17677 (BINOP_UNONE_UNONE_UNONE): Likewise.
17678 * config/arm/constraints.md (Ra): Define constraint to check constant is
17679 in the range of 0 to 7.
17680 (Rg): Define constriant to check the constant is one among 1, 2, 4
17682 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
17683 (mve_vaddq_n_<supf>): Likewise.
17684 (mve_vaddvaq_<supf>): Likewise.
17685 (mve_vaddvq_p_<supf>): Likewise.
17686 (mve_vandq_<supf>): Likewise.
17687 (mve_vbicq_<supf>): Likewise.
17688 (mve_vbrsrq_n_<supf>): Likewise.
17689 (mve_vcaddq_rot270_<supf>): Likewise.
17690 (mve_vcaddq_rot90_<supf>): Likewise.
17691 (mve_vcmpcsq_n_u): Likewise.
17692 (mve_vcmpcsq_u): Likewise.
17693 (mve_vcmpeqq_n_<supf>): Likewise.
17694 (mve_vcmpeqq_<supf>): Likewise.
17695 (mve_vcmpgeq_n_s): Likewise.
17696 (mve_vcmpgeq_s): Likewise.
17697 (mve_vcmpgtq_n_s): Likewise.
17698 (mve_vcmpgtq_s): Likewise.
17699 (mve_vcmphiq_n_u): Likewise.
17700 (mve_vcmphiq_u): Likewise.
17701 (mve_vcmpleq_n_s): Likewise.
17702 (mve_vcmpleq_s): Likewise.
17703 (mve_vcmpltq_n_s): Likewise.
17704 (mve_vcmpltq_s): Likewise.
17705 (mve_vcmpneq_n_<supf>): Likewise.
17706 (mve_vddupq_n_u): Likewise.
17707 (mve_veorq_<supf>): Likewise.
17708 (mve_vhaddq_n_<supf>): Likewise.
17709 (mve_vhaddq_<supf>): Likewise.
17710 (mve_vhcaddq_rot270_s): Likewise.
17711 (mve_vhcaddq_rot90_s): Likewise.
17712 (mve_vhsubq_n_<supf>): Likewise.
17713 (mve_vhsubq_<supf>): Likewise.
17714 (mve_vidupq_n_u): Likewise.
17715 (mve_vmaxaq_s): Likewise.
17716 (mve_vmaxavq_s): Likewise.
17717 (mve_vmaxq_<supf>): Likewise.
17718 (mve_vmaxvq_<supf>): Likewise.
17719 (mve_vminaq_s): Likewise.
17720 (mve_vminavq_s): Likewise.
17721 (mve_vminq_<supf>): Likewise.
17722 (mve_vminvq_<supf>): Likewise.
17723 (mve_vmladavq_<supf>): Likewise.
17724 (mve_vmladavxq_s): Likewise.
17725 (mve_vmlsdavq_s): Likewise.
17726 (mve_vmlsdavxq_s): Likewise.
17727 (mve_vmulhq_<supf>): Likewise.
17728 (mve_vmullbq_int_<supf>): Likewise.
17729 (mve_vmulltq_int_<supf>): Likewise.
17730 (mve_vmulq_n_<supf>): Likewise.
17731 (mve_vmulq_<supf>): Likewise.
17732 (mve_vornq_<supf>): Likewise.
17733 (mve_vorrq_<supf>): Likewise.
17734 (mve_vqaddq_n_<supf>): Likewise.
17735 (mve_vqaddq_<supf>): Likewise.
17736 (mve_vqdmulhq_n_s): Likewise.
17737 (mve_vqdmulhq_s): Likewise.
17738 (mve_vqrdmulhq_n_s): Likewise.
17739 (mve_vqrdmulhq_s): Likewise.
17740 (mve_vqrshlq_n_<supf>): Likewise.
17741 (mve_vqrshlq_<supf>): Likewise.
17742 (mve_vqshlq_n_<supf>): Likewise.
17743 (mve_vqshlq_r_<supf>): Likewise.
17744 (mve_vqshlq_<supf>): Likewise.
17745 (mve_vqshluq_n_s): Likewise.
17746 (mve_vqsubq_n_<supf>): Likewise.
17747 (mve_vqsubq_<supf>): Likewise.
17748 (mve_vrhaddq_<supf>): Likewise.
17749 (mve_vrmulhq_<supf>): Likewise.
17750 (mve_vrshlq_n_<supf>): Likewise.
17751 (mve_vrshlq_<supf>): Likewise.
17752 (mve_vrshrq_n_<supf>): Likewise.
17753 (mve_vshlq_n_<supf>): Likewise.
17754 (mve_vshlq_r_<supf>): Likewise.
17755 (mve_vsubq_n_<supf>): Likewise.
17756 (mve_vsubq_<supf>): Likewise.
17757 * config/arm/predicates.md (mve_imm_7): Define predicate to check
17758 the matching constraint Ra.
17759 (mve_imm_selective_upto_8): Define predicate to check the matching
17762 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17763 Mihail Ionescu <mihail.ionescu@arm.com>
17764 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17766 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
17767 qualifier for binary operands.
17768 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17769 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
17770 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
17771 (vaddlvq_p_u32): Likewise.
17772 (vcmpneq_s8): Likewise.
17773 (vcmpneq_s16): Likewise.
17774 (vcmpneq_s32): Likewise.
17775 (vcmpneq_u8): Likewise.
17776 (vcmpneq_u16): Likewise.
17777 (vcmpneq_u32): Likewise.
17778 (vshlq_s8): Likewise.
17779 (vshlq_s16): Likewise.
17780 (vshlq_s32): Likewise.
17781 (vshlq_u8): Likewise.
17782 (vshlq_u16): Likewise.
17783 (vshlq_u32): Likewise.
17784 (__arm_vaddlvq_p_s32): Define intrinsic.
17785 (__arm_vaddlvq_p_u32): Likewise.
17786 (__arm_vcmpneq_s8): Likewise.
17787 (__arm_vcmpneq_s16): Likewise.
17788 (__arm_vcmpneq_s32): Likewise.
17789 (__arm_vcmpneq_u8): Likewise.
17790 (__arm_vcmpneq_u16): Likewise.
17791 (__arm_vcmpneq_u32): Likewise.
17792 (__arm_vshlq_s8): Likewise.
17793 (__arm_vshlq_s16): Likewise.
17794 (__arm_vshlq_s32): Likewise.
17795 (__arm_vshlq_u8): Likewise.
17796 (__arm_vshlq_u16): Likewise.
17797 (__arm_vshlq_u32): Likewise.
17798 (vaddlvq_p): Define polymorphic variant.
17799 (vcmpneq): Likewise.
17801 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
17803 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17804 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
17805 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
17806 (mve_vcmpneq_<supf><mode>): Likewise.
17807 (mve_vshlq_<supf><mode>): Likewise.
17809 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17810 Mihail Ionescu <mihail.ionescu@arm.com>
17811 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17813 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
17814 qualifier for binary operands.
17815 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17816 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17817 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
17818 (vcvtq_n_s32_f32): Likewise.
17819 (vcvtq_n_u16_f16): Likewise.
17820 (vcvtq_n_u32_f32): Likewise.
17821 (vcreateq_u8): Likewise.
17822 (vcreateq_u16): Likewise.
17823 (vcreateq_u32): Likewise.
17824 (vcreateq_u64): Likewise.
17825 (vcreateq_s8): Likewise.
17826 (vcreateq_s16): Likewise.
17827 (vcreateq_s32): Likewise.
17828 (vcreateq_s64): Likewise.
17829 (vshrq_n_s8): Likewise.
17830 (vshrq_n_s16): Likewise.
17831 (vshrq_n_s32): Likewise.
17832 (vshrq_n_u8): Likewise.
17833 (vshrq_n_u16): Likewise.
17834 (vshrq_n_u32): Likewise.
17835 (__arm_vcreateq_u8): Define intrinsic.
17836 (__arm_vcreateq_u16): Likewise.
17837 (__arm_vcreateq_u32): Likewise.
17838 (__arm_vcreateq_u64): Likewise.
17839 (__arm_vcreateq_s8): Likewise.
17840 (__arm_vcreateq_s16): Likewise.
17841 (__arm_vcreateq_s32): Likewise.
17842 (__arm_vcreateq_s64): Likewise.
17843 (__arm_vshrq_n_s8): Likewise.
17844 (__arm_vshrq_n_s16): Likewise.
17845 (__arm_vshrq_n_s32): Likewise.
17846 (__arm_vshrq_n_u8): Likewise.
17847 (__arm_vshrq_n_u16): Likewise.
17848 (__arm_vshrq_n_u32): Likewise.
17849 (__arm_vcvtq_n_s16_f16): Likewise.
17850 (__arm_vcvtq_n_s32_f32): Likewise.
17851 (__arm_vcvtq_n_u16_f16): Likewise.
17852 (__arm_vcvtq_n_u32_f32): Likewise.
17853 (vshrq_n): Define polymorphic variant.
17854 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
17856 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17857 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17858 * config/arm/constraints.md (Rb): Define constraint to check constant is
17859 in the range of 1 to 8.
17860 (Rf): Define constraint to check constant is in the range of 1 to 32.
17861 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
17862 (mve_vshrq_n_<supf><mode>): Likewise.
17863 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
17864 * config/arm/predicates.md (mve_imm_8): Define predicate to check
17865 the matching constraint Rb.
17866 (mve_imm_32): Define predicate to check the matching constraint Rf.
17868 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17869 Mihail Ionescu <mihail.ionescu@arm.com>
17870 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17872 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
17873 qualifier for binary operands.
17874 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
17875 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17876 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17877 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
17878 (vsubq_n_f32): Likewise.
17879 (vbrsrq_n_f16): Likewise.
17880 (vbrsrq_n_f32): Likewise.
17881 (vcvtq_n_f16_s16): Likewise.
17882 (vcvtq_n_f32_s32): Likewise.
17883 (vcvtq_n_f16_u16): Likewise.
17884 (vcvtq_n_f32_u32): Likewise.
17885 (vcreateq_f16): Likewise.
17886 (vcreateq_f32): Likewise.
17887 (__arm_vsubq_n_f16): Define intrinsic.
17888 (__arm_vsubq_n_f32): Likewise.
17889 (__arm_vbrsrq_n_f16): Likewise.
17890 (__arm_vbrsrq_n_f32): Likewise.
17891 (__arm_vcvtq_n_f16_s16): Likewise.
17892 (__arm_vcvtq_n_f32_s32): Likewise.
17893 (__arm_vcvtq_n_f16_u16): Likewise.
17894 (__arm_vcvtq_n_f32_u32): Likewise.
17895 (__arm_vcreateq_f16): Likewise.
17896 (__arm_vcreateq_f32): Likewise.
17897 (vsubq): Define polymorphic variant.
17898 (vbrsrq): Likewise.
17899 (vcvtq_n): Likewise.
17900 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
17902 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
17903 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17904 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17905 * config/arm/constraints.md (Rd): Define constraint to check constant is
17906 in the range of 1 to 16.
17907 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
17908 mve_vbrsrq_n_f<mode>: Likewise.
17909 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
17910 mve_vcreateq_f<mode>: Likewise.
17911 * config/arm/predicates.md (mve_imm_16): Define predicate to check
17912 the matching constraint Rd.
17914 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17915 Mihail Ionescu <mihail.ionescu@arm.com>
17916 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17918 * config/arm/arm-builtins.c (hi_UP): Define mode.
17919 * config/arm/arm.h (IS_VPR_REGNUM): Move.
17920 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
17921 (APSRQ_REGNUM): Modify.
17922 (APSRGE_REGNUM): Modify.
17923 * config/arm/arm_mve.h (vctp16q): Define macro.
17924 (vctp32q): Likewise.
17925 (vctp64q): Likewise.
17926 (vctp8q): Likewise.
17928 (__arm_vctp16q): Define intrinsic.
17929 (__arm_vctp32q): Likewise.
17930 (__arm_vctp64q): Likewise.
17931 (__arm_vctp8q): Likewise.
17932 (__arm_vpnot): Likewise.
17933 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
17935 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
17936 (mve_vpnothi): Likewise.
17938 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17939 Mihail Ionescu <mihail.ionescu@arm.com>
17940 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17942 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
17943 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
17944 (vdupq_n_s16): Likewise.
17945 (vdupq_n_s32): Likewise.
17946 (vabsq_s8): Likewise.
17947 (vabsq_s16): Likewise.
17948 (vabsq_s32): Likewise.
17949 (vclsq_s8): Likewise.
17950 (vclsq_s16): Likewise.
17951 (vclsq_s32): Likewise.
17952 (vclzq_s8): Likewise.
17953 (vclzq_s16): Likewise.
17954 (vclzq_s32): Likewise.
17955 (vnegq_s8): Likewise.
17956 (vnegq_s16): Likewise.
17957 (vnegq_s32): Likewise.
17958 (vaddlvq_s32): Likewise.
17959 (vaddvq_s8): Likewise.
17960 (vaddvq_s16): Likewise.
17961 (vaddvq_s32): Likewise.
17962 (vmovlbq_s8): Likewise.
17963 (vmovlbq_s16): Likewise.
17964 (vmovltq_s8): Likewise.
17965 (vmovltq_s16): Likewise.
17966 (vmvnq_s8): Likewise.
17967 (vmvnq_s16): Likewise.
17968 (vmvnq_s32): Likewise.
17969 (vrev16q_s8): Likewise.
17970 (vrev32q_s8): Likewise.
17971 (vrev32q_s16): Likewise.
17972 (vqabsq_s8): Likewise.
17973 (vqabsq_s16): Likewise.
17974 (vqabsq_s32): Likewise.
17975 (vqnegq_s8): Likewise.
17976 (vqnegq_s16): Likewise.
17977 (vqnegq_s32): Likewise.
17978 (vcvtaq_s16_f16): Likewise.
17979 (vcvtaq_s32_f32): Likewise.
17980 (vcvtnq_s16_f16): Likewise.
17981 (vcvtnq_s32_f32): Likewise.
17982 (vcvtpq_s16_f16): Likewise.
17983 (vcvtpq_s32_f32): Likewise.
17984 (vcvtmq_s16_f16): Likewise.
17985 (vcvtmq_s32_f32): Likewise.
17986 (vmvnq_u8): Likewise.
17987 (vmvnq_u16): Likewise.
17988 (vmvnq_u32): Likewise.
17989 (vdupq_n_u8): Likewise.
17990 (vdupq_n_u16): Likewise.
17991 (vdupq_n_u32): Likewise.
17992 (vclzq_u8): Likewise.
17993 (vclzq_u16): Likewise.
17994 (vclzq_u32): Likewise.
17995 (vaddvq_u8): Likewise.
17996 (vaddvq_u16): Likewise.
17997 (vaddvq_u32): Likewise.
17998 (vrev32q_u8): Likewise.
17999 (vrev32q_u16): Likewise.
18000 (vmovltq_u8): Likewise.
18001 (vmovltq_u16): Likewise.
18002 (vmovlbq_u8): Likewise.
18003 (vmovlbq_u16): Likewise.
18004 (vrev16q_u8): Likewise.
18005 (vaddlvq_u32): Likewise.
18006 (vcvtpq_u16_f16): Likewise.
18007 (vcvtpq_u32_f32): Likewise.
18008 (vcvtnq_u16_f16): Likewise.
18009 (vcvtmq_u16_f16): Likewise.
18010 (vcvtmq_u32_f32): Likewise.
18011 (vcvtaq_u16_f16): Likewise.
18012 (vcvtaq_u32_f32): Likewise.
18013 (__arm_vdupq_n_s8): Define intrinsic.
18014 (__arm_vdupq_n_s16): Likewise.
18015 (__arm_vdupq_n_s32): Likewise.
18016 (__arm_vabsq_s8): Likewise.
18017 (__arm_vabsq_s16): Likewise.
18018 (__arm_vabsq_s32): Likewise.
18019 (__arm_vclsq_s8): Likewise.
18020 (__arm_vclsq_s16): Likewise.
18021 (__arm_vclsq_s32): Likewise.
18022 (__arm_vclzq_s8): Likewise.
18023 (__arm_vclzq_s16): Likewise.
18024 (__arm_vclzq_s32): Likewise.
18025 (__arm_vnegq_s8): Likewise.
18026 (__arm_vnegq_s16): Likewise.
18027 (__arm_vnegq_s32): Likewise.
18028 (__arm_vaddlvq_s32): Likewise.
18029 (__arm_vaddvq_s8): Likewise.
18030 (__arm_vaddvq_s16): Likewise.
18031 (__arm_vaddvq_s32): Likewise.
18032 (__arm_vmovlbq_s8): Likewise.
18033 (__arm_vmovlbq_s16): Likewise.
18034 (__arm_vmovltq_s8): Likewise.
18035 (__arm_vmovltq_s16): Likewise.
18036 (__arm_vmvnq_s8): Likewise.
18037 (__arm_vmvnq_s16): Likewise.
18038 (__arm_vmvnq_s32): Likewise.
18039 (__arm_vrev16q_s8): Likewise.
18040 (__arm_vrev32q_s8): Likewise.
18041 (__arm_vrev32q_s16): Likewise.
18042 (__arm_vqabsq_s8): Likewise.
18043 (__arm_vqabsq_s16): Likewise.
18044 (__arm_vqabsq_s32): Likewise.
18045 (__arm_vqnegq_s8): Likewise.
18046 (__arm_vqnegq_s16): Likewise.
18047 (__arm_vqnegq_s32): Likewise.
18048 (__arm_vmvnq_u8): Likewise.
18049 (__arm_vmvnq_u16): Likewise.
18050 (__arm_vmvnq_u32): Likewise.
18051 (__arm_vdupq_n_u8): Likewise.
18052 (__arm_vdupq_n_u16): Likewise.
18053 (__arm_vdupq_n_u32): Likewise.
18054 (__arm_vclzq_u8): Likewise.
18055 (__arm_vclzq_u16): Likewise.
18056 (__arm_vclzq_u32): Likewise.
18057 (__arm_vaddvq_u8): Likewise.
18058 (__arm_vaddvq_u16): Likewise.
18059 (__arm_vaddvq_u32): Likewise.
18060 (__arm_vrev32q_u8): Likewise.
18061 (__arm_vrev32q_u16): Likewise.
18062 (__arm_vmovltq_u8): Likewise.
18063 (__arm_vmovltq_u16): Likewise.
18064 (__arm_vmovlbq_u8): Likewise.
18065 (__arm_vmovlbq_u16): Likewise.
18066 (__arm_vrev16q_u8): Likewise.
18067 (__arm_vaddlvq_u32): Likewise.
18068 (__arm_vcvtpq_u16_f16): Likewise.
18069 (__arm_vcvtpq_u32_f32): Likewise.
18070 (__arm_vcvtnq_u16_f16): Likewise.
18071 (__arm_vcvtmq_u16_f16): Likewise.
18072 (__arm_vcvtmq_u32_f32): Likewise.
18073 (__arm_vcvtaq_u16_f16): Likewise.
18074 (__arm_vcvtaq_u32_f32): Likewise.
18075 (__arm_vcvtaq_s16_f16): Likewise.
18076 (__arm_vcvtaq_s32_f32): Likewise.
18077 (__arm_vcvtnq_s16_f16): Likewise.
18078 (__arm_vcvtnq_s32_f32): Likewise.
18079 (__arm_vcvtpq_s16_f16): Likewise.
18080 (__arm_vcvtpq_s32_f32): Likewise.
18081 (__arm_vcvtmq_s16_f16): Likewise.
18082 (__arm_vcvtmq_s32_f32): Likewise.
18083 (vdupq_n): Define polymorphic variant.
18088 (vaddlvq): Likewise.
18089 (vaddvq): Likewise.
18090 (vmovlbq): Likewise.
18091 (vmovltq): Likewise.
18093 (vrev16q): Likewise.
18094 (vrev32q): Likewise.
18095 (vqabsq): Likewise.
18096 (vqnegq): Likewise.
18097 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
18098 (UNOP_SNONE_NONE): Likewise.
18099 (UNOP_UNONE_UNONE): Likewise.
18100 (UNOP_UNONE_NONE): Likewise.
18101 * config/arm/constraints.md (e): Define new constriant to allow only
18103 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
18104 (mve_vnegq_s<mode>): Likewise.
18105 (mve_vmvnq_<supf><mode>): Likewise.
18106 (mve_vdupq_n_<supf><mode>): Likewise.
18107 (mve_vclzq_<supf><mode>): Likewise.
18108 (mve_vclsq_s<mode>): Likewise.
18109 (mve_vaddvq_<supf><mode>): Likewise.
18110 (mve_vabsq_s<mode>): Likewise.
18111 (mve_vrev32q_<supf><mode>): Likewise.
18112 (mve_vmovltq_<supf><mode>): Likewise.
18113 (mve_vmovlbq_<supf><mode>): Likewise.
18114 (mve_vcvtpq_<supf><mode>): Likewise.
18115 (mve_vcvtnq_<supf><mode>): Likewise.
18116 (mve_vcvtmq_<supf><mode>): Likewise.
18117 (mve_vcvtaq_<supf><mode>): Likewise.
18118 (mve_vrev16q_<supf>v16qi): Likewise.
18119 (mve_vaddlvq_<supf>v4si): Likewise.
18121 2020-03-17 Jakub Jelinek <jakub@redhat.com>
18123 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
18125 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
18127 * read-rtl-function.c (find_param_by_name,
18128 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
18130 * spellcheck.c (get_edit_distance_cutoff): Likewise.
18131 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
18132 * tree.def (SWITCH_EXPR): Likewise.
18133 * selftest.c (assert_str_contains): Likewise.
18134 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
18136 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
18137 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
18138 * langhooks.h (struct lang_hooks_for_decls): Likewise.
18139 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
18140 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
18142 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
18143 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
18144 * tree.c (component_ref_size): Likewise.
18145 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
18146 * gimple-ssa-sprintf.c (get_string_length, format_string,
18147 format_directive): Likewise.
18148 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
18149 * input.c (string_concat_db::get_string_concatenation,
18150 test_lexer_string_locations_ucn4): Likewise.
18151 * cfgexpand.c (pass_expand::execute): Likewise.
18152 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
18153 maybe_diag_overlap): Likewise.
18154 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
18155 * shrink-wrap.c (spread_components): Likewise.
18156 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
18158 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
18160 * dwarf2out.c (dwarf2out_early_finish): Likewise.
18161 * gimple-ssa-store-merging.c: Likewise.
18162 * ira-costs.c (record_operand_costs): Likewise.
18163 * tree-vect-loop.c (vectorizable_reduction): Likewise.
18164 * target.def (dispatch): Likewise.
18165 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
18166 in documentation text.
18167 * doc/tm.texi: Regenerated.
18168 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
18169 duplicated word issue in a comment.
18170 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
18171 * config/i386/i386-features.c (remove_partial_avx_dependency):
18173 * config/msp430/msp430.c (msp430_select_section): Likewise.
18174 * config/gcn/gcn-run.c (load_image): Likewise.
18175 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
18176 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
18177 * config/aarch64/falkor-tag-collision-avoidance.c
18178 (single_dest_per_chain): Likewise.
18179 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
18180 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
18181 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
18182 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
18184 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
18185 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
18186 * config/rs6000/rs6000-logue.c
18187 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
18188 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
18189 Fix various other issues in the comment.
18191 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
18193 * config/arm/t-rmprofile: create new multilib for
18194 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
18197 2020-03-17 Jakub Jelinek <jakub@redhat.com>
18199 PR tree-optimization/94015
18200 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
18201 function where EXP is address of the bytes being stored rather than
18202 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
18203 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
18204 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
18205 calling native_encode_expr if host or target doesn't have 8-bit
18206 chars. Formatting fixes.
18207 (count_nonzero_bytes_addr): New function.
18209 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18210 Mihail Ionescu <mihail.ionescu@arm.com>
18211 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18213 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
18214 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
18215 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
18216 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
18217 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
18218 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
18219 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
18220 (vmvnq_n_s32): Likewise.
18221 (vrev64q_s8): Likewise.
18222 (vrev64q_s16): Likewise.
18223 (vrev64q_s32): Likewise.
18224 (vcvtq_s16_f16): Likewise.
18225 (vcvtq_s32_f32): Likewise.
18226 (vrev64q_u8): Likewise.
18227 (vrev64q_u16): Likewise.
18228 (vrev64q_u32): Likewise.
18229 (vmvnq_n_u16): Likewise.
18230 (vmvnq_n_u32): Likewise.
18231 (vcvtq_u16_f16): Likewise.
18232 (vcvtq_u32_f32): Likewise.
18233 (__arm_vmvnq_n_s16): Define intrinsic.
18234 (__arm_vmvnq_n_s32): Likewise.
18235 (__arm_vrev64q_s8): Likewise.
18236 (__arm_vrev64q_s16): Likewise.
18237 (__arm_vrev64q_s32): Likewise.
18238 (__arm_vrev64q_u8): Likewise.
18239 (__arm_vrev64q_u16): Likewise.
18240 (__arm_vrev64q_u32): Likewise.
18241 (__arm_vmvnq_n_u16): Likewise.
18242 (__arm_vmvnq_n_u32): Likewise.
18243 (__arm_vcvtq_s16_f16): Likewise.
18244 (__arm_vcvtq_s32_f32): Likewise.
18245 (__arm_vcvtq_u16_f16): Likewise.
18246 (__arm_vcvtq_u32_f32): Likewise.
18247 (vrev64q): Define polymorphic variant.
18248 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
18249 (UNOP_SNONE_NONE): Likewise.
18250 (UNOP_SNONE_IMM): Likewise.
18251 (UNOP_UNONE_UNONE): Likewise.
18252 (UNOP_UNONE_NONE): Likewise.
18253 (UNOP_UNONE_IMM): Likewise.
18254 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
18255 (mve_vcvtq_from_f_<supf><mode>): Likewise.
18256 (mve_vmvnq_n_<supf><mode>): Likewise.
18258 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18259 Mihail Ionescu <mihail.ionescu@arm.com>
18260 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18262 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
18263 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
18264 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
18265 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
18266 (vrndxq_f32): Likewise.
18267 (vrndq_f16) Likewise.
18268 (vrndq_f32): Likewise.
18269 (vrndpq_f16): Likewise.
18270 (vrndpq_f32): Likewise.
18271 (vrndnq_f16): Likewise.
18272 (vrndnq_f32): Likewise.
18273 (vrndmq_f16): Likewise.
18274 (vrndmq_f32): Likewise.
18275 (vrndaq_f16): Likewise.
18276 (vrndaq_f32): Likewise.
18277 (vrev64q_f16): Likewise.
18278 (vrev64q_f32): Likewise.
18279 (vnegq_f16): Likewise.
18280 (vnegq_f32): Likewise.
18281 (vdupq_n_f16): Likewise.
18282 (vdupq_n_f32): Likewise.
18283 (vabsq_f16): Likewise.
18284 (vabsq_f32): Likewise.
18285 (vrev32q_f16): Likewise.
18286 (vcvttq_f32_f16): Likewise.
18287 (vcvtbq_f32_f16): Likewise.
18288 (vcvtq_f16_s16): Likewise.
18289 (vcvtq_f32_s32): Likewise.
18290 (vcvtq_f16_u16): Likewise.
18291 (vcvtq_f32_u32): Likewise.
18292 (__arm_vrndxq_f16): Define intrinsic.
18293 (__arm_vrndxq_f32): Likewise.
18294 (__arm_vrndq_f16): Likewise.
18295 (__arm_vrndq_f32): Likewise.
18296 (__arm_vrndpq_f16): Likewise.
18297 (__arm_vrndpq_f32): Likewise.
18298 (__arm_vrndnq_f16): Likewise.
18299 (__arm_vrndnq_f32): Likewise.
18300 (__arm_vrndmq_f16): Likewise.
18301 (__arm_vrndmq_f32): Likewise.
18302 (__arm_vrndaq_f16): Likewise.
18303 (__arm_vrndaq_f32): Likewise.
18304 (__arm_vrev64q_f16): Likewise.
18305 (__arm_vrev64q_f32): Likewise.
18306 (__arm_vnegq_f16): Likewise.
18307 (__arm_vnegq_f32): Likewise.
18308 (__arm_vdupq_n_f16): Likewise.
18309 (__arm_vdupq_n_f32): Likewise.
18310 (__arm_vabsq_f16): Likewise.
18311 (__arm_vabsq_f32): Likewise.
18312 (__arm_vrev32q_f16): Likewise.
18313 (__arm_vcvttq_f32_f16): Likewise.
18314 (__arm_vcvtbq_f32_f16): Likewise.
18315 (__arm_vcvtq_f16_s16): Likewise.
18316 (__arm_vcvtq_f32_s32): Likewise.
18317 (__arm_vcvtq_f16_u16): Likewise.
18318 (__arm_vcvtq_f32_u32): Likewise.
18319 (vrndxq): Define polymorphic variants.
18321 (vrndpq): Likewise.
18322 (vrndnq): Likewise.
18323 (vrndmq): Likewise.
18324 (vrndaq): Likewise.
18325 (vrev64q): Likewise.
18328 (vrev32q): Likewise.
18329 (vcvtbq_f32): Likewise.
18330 (vcvttq_f32): Likewise.
18332 * config/arm/arm_mve_builtins.def (VAR2): Define.
18334 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
18335 (mve_vrndq_f<mode>): Likewise.
18336 (mve_vrndpq_f<mode>): Likewise.
18337 (mve_vrndnq_f<mode>): Likewise.
18338 (mve_vrndmq_f<mode>): Likewise.
18339 (mve_vrndaq_f<mode>): Likewise.
18340 (mve_vrev64q_f<mode>): Likewise.
18341 (mve_vnegq_f<mode>): Likewise.
18342 (mve_vdupq_n_f<mode>): Likewise.
18343 (mve_vabsq_f<mode>): Likewise.
18344 (mve_vrev32q_fv8hf): Likewise.
18345 (mve_vcvttq_f32_f16v4sf): Likewise.
18346 (mve_vcvtbq_f32_f16v4sf): Likewise.
18347 (mve_vcvtq_to_f_<supf><mode>): Likewise.
18349 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18350 Mihail Ionescu <mihail.ionescu@arm.com>
18351 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18353 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
18355 (ARM_BUILTIN_MVE_PATTERN_START): Define.
18356 (arm_init_mve_builtins): Define function.
18357 (arm_init_builtins): Add TARGET_HAVE_MVE check.
18358 (arm_expand_builtin_1): Check the range of fcode.
18359 (arm_expand_mve_builtin): Define function to expand MVE builtins.
18360 (arm_expand_builtin): Check the range of fcode.
18361 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
18363 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
18364 (vst4q_s8): Define macro.
18365 (vst4q_s16): Likewise.
18366 (vst4q_s32): Likewise.
18367 (vst4q_u8): Likewise.
18368 (vst4q_u16): Likewise.
18369 (vst4q_u32): Likewise.
18370 (vst4q_f16): Likewise.
18371 (vst4q_f32): Likewise.
18372 (__arm_vst4q_s8): Define inline builtin.
18373 (__arm_vst4q_s16): Likewise.
18374 (__arm_vst4q_s32): Likewise.
18375 (__arm_vst4q_u8): Likewise.
18376 (__arm_vst4q_u16): Likewise.
18377 (__arm_vst4q_u32): Likewise.
18378 (__arm_vst4q_f16): Likewise.
18379 (__arm_vst4q_f32): Likewise.
18380 (__ARM_mve_typeid): Define macro with MVE types.
18381 (__ARM_mve_coerce): Define macro with _Generic feature.
18382 (vst4q): Define polymorphic variant for different vst4q builtins.
18383 * config/arm/arm_mve_builtins.def: New file.
18384 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
18386 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
18387 (unspec): Define unspec.
18388 (mve_vst4q<mode>): Define RTL pattern.
18389 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
18391 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
18393 (define_split): Allow OI mode split for MVE after reload.
18394 (define_split): Allow XI mode split for MVE after reload.
18395 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
18396 (arm-builtins.o): Likewise.
18398 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
18400 * c-typeck.c (process_init_element): Handle constructor_type with
18401 type size represented by POLY_INT_CST.
18403 2020-03-17 Jakub Jelinek <jakub@redhat.com>
18405 PR tree-optimization/94187
18406 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
18407 nchars - offset < nbytes.
18409 PR middle-end/94189
18410 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
18411 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
18412 for code-generation.
18414 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
18417 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
18418 after changing memory subreg.
18420 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18421 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18423 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
18424 emulator calls for dobule precision arithmetic operations for MVE.
18426 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18427 Mihail Ionescu <mihail.ionescu@arm.com>
18428 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18430 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
18431 feature bit is on and -mfpu=auto is passed as compiler option, do not
18432 generate error on not finding any matching fpu. Because in this case
18433 fpu is not required.
18434 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
18435 enabled for MVE and also for all VFP extensions.
18436 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
18438 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
18439 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
18440 along with feature bits mve_float.
18441 (mve): Modify add options in armv8.1-m.main arch for MVE.
18442 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
18444 * config/arm/arm.c (use_return_insn): Replace the
18445 check with TARGET_VFP_BASE.
18446 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
18448 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
18449 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
18451 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
18452 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
18454 (arm_compute_frame_layout): Likewise.
18455 (arm_save_coproc_regs): Likewise.
18456 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
18458 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
18459 with equivalent macro TARGET_VFP_BASE.
18460 (arm_expand_epilogue_apcs_frame): Likewise.
18461 (arm_expand_epilogue): Likewise.
18462 (arm_conditional_register_usage): Likewise.
18463 (arm_declare_function_name): Add check to skip printing .fpu directive
18464 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
18466 * config/arm/arm.h (TARGET_VFP_BASE): Define.
18467 * config/arm/arm.md (arch): Add "mve" to arch.
18468 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
18469 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
18470 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
18471 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
18473 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
18474 to not allow for MVE.
18475 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
18477 (VUNSPEC_GET_FPSCR): Define.
18478 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
18479 instructions which move to general-purpose Register from Floating-point
18480 Special register and vice-versa.
18481 (thumb2_movhi_fp16): Likewise.
18482 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
18483 with MCR and MRC instructions which set and get Floating-point Status
18484 and Control Register (FPSCR).
18485 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
18487 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
18488 float move patterns in MVE.
18489 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
18490 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
18491 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
18492 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
18493 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
18494 TARGET_VFP_BASE check.
18495 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
18496 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
18498 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
18499 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
18503 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18504 Mihail Ionescu <mihail.ionescu@arm.com>
18505 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18507 * config.gcc (arm_mve.h): Include mve intrinsics header file.
18508 * config/arm/aout.h (p0): Add new register name for MVE predicated
18510 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
18511 common to Neon and MVE.
18512 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
18513 (arm_init_simd_builtin_types): Disable poly types for MVE.
18514 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
18515 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
18516 ARM_BUILTIN_NEON_LANE_CHECK.
18517 (mve_dereference_pointer): Add function.
18518 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
18520 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
18521 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
18522 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
18523 with floating point enabled.
18524 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
18525 simd_immediate_valid_for_move.
18526 (simd_immediate_valid_for_move): Renamed from
18527 neon_immediate_valid_for_move function.
18528 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
18529 error if vfpv2 feature bit is disabled and mve feature bit is also
18530 disabled for HARD_FLOAT_ABI.
18531 (use_return_insn): Check to not push VFP regs for MVE.
18532 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
18534 (aapcs_vfp_allocate_return_reg): Likewise.
18535 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
18536 address operand for MVE.
18537 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
18538 (neon_valid_immediate): Rename to simd_valid_immediate.
18539 (simd_valid_immediate): Rename from neon_valid_immediate.
18540 (simd_valid_immediate): MVE check on size of vector is 128 bits.
18541 (neon_immediate_valid_for_move): Rename to
18542 simd_immediate_valid_for_move.
18543 (simd_immediate_valid_for_move): Rename from
18544 neon_immediate_valid_for_move.
18545 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
18547 (neon_make_constant): Modify call to neon_valid_immediate function.
18548 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
18550 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
18551 (arm_compute_frame_layout): Calculate space for saved VFP registers for
18553 (arm_save_coproc_regs): Save coproc registers for MVE.
18554 (arm_print_operand): Add case 'E' to print memory operands for MVE.
18555 (arm_print_operand_address): Check to print register number for MVE.
18556 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
18557 (arm_modes_tieable_p): Check to allow structure mode for MVE.
18558 (arm_regno_class): Add VPR_REGNUM check.
18559 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
18561 (arm_expand_epilogue): MVE check for enabling pop instructions in
18563 (arm_print_asm_arch_directives): Modify function to disable print of
18564 .arch_extension "mve" and "fp" for cases where MVE is enabled with
18566 (arm_vector_mode_supported_p): Check for modes available in MVE interger
18567 and MVE floating point.
18568 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
18570 (arm_conditional_register_usage): Enable usage of conditional regsiter
18572 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
18573 (arm_declare_function_name): Modify function to disable print of
18574 .arch_extension "mve" and "fp" for cases where MVE is enabled with
18576 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
18577 when target general registers are required.
18578 (TARGET_HAVE_MVE_FLOAT): Likewise.
18579 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
18581 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
18582 which indicate this is not available for across function calls.
18583 (FIRST_PSEUDO_REGISTER): Modify.
18584 (VALID_MVE_MODE): Define valid MVE mode.
18585 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
18586 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
18587 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
18588 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
18590 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
18591 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
18592 (enum reg_class): Add VPR_REG entry.
18593 (REG_CLASS_NAMES): Add VPR_REG entry.
18594 * config/arm/arm.md (VPR_REGNUM): Define.
18595 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
18596 "unconditional" instructions.
18597 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
18598 (movdf_soft_insn): Modify RTL to not allow for MVE.
18599 (vfp_pop_multiple_with_writeback): Enable for MVE.
18600 (include "mve.md"): Include mve.md file.
18601 * config/arm/arm_mve.h: Add MVE intrinsics head file.
18602 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
18603 for vector predicated operands.
18604 * config/arm/iterators.md (VNIM1): Define.
18605 (VNINOTM1): Define.
18606 (VHFBF_split): Define
18607 * config/arm/mve.md: New file.
18608 (mve_mov<mode>): Define RTL for move, store and load in MVE.
18609 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
18611 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
18612 simd_immediate_valid_for_move.
18613 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
18614 is common to MVE and NEON to vec-common.md file.
18615 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
18616 * config/arm/predicates.md (vpr_register_operand): Define.
18617 * config/arm/t-arm: Add mve.md file.
18618 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
18620 (mve_store): Add MVE instructions mve_store to attribute "type".
18621 (mve_load): Add MVE instructions mve_load to attribute "type".
18622 (is_mve_type): Define attribute.
18623 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
18624 standard move patterns in MVE along with NEON and IWMMXT with mode
18626 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
18627 and IWMMXT with mode iterator V8HF.
18628 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
18630 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
18631 simd_immediate_valid_for_move.
18634 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
18637 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
18638 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
18640 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
18642 2020-03-16 Jakub Jelinek <jakub@redhat.com>
18645 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
18648 PR tree-optimization/94166
18649 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
18650 as secondary comparison key.
18652 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
18654 PR tree-optimization/94125
18655 * tree-loop-distribution.c
18656 (loop_distribution::break_alias_scc_partitions): Update post order
18657 number for merged scc.
18659 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
18662 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
18664 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
18665 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
18666 and ext_sse_reg_operand check.
18668 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
18670 * common.opt: Avoid redundancy in the help text.
18671 * config/arc/arc.opt: Likewise.
18672 * config/cr16/cr16.opt: Likewise.
18674 2020-03-14 Jakub Jelinek <jakub@redhat.com>
18676 PR middle-end/93566
18677 * tree-nested.c (convert_nonlocal_omp_clauses,
18678 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
18679 with C/C++ array sections.
18681 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
18684 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
18685 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
18688 2020-03-14 Jakub Jelinek <jakub@redhat.com>
18690 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
18691 "a an" to "an" in a comment.
18692 * hsa-common.h (is_a_helper): Likewise.
18693 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
18694 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
18695 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
18697 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
18700 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
18701 64-bit value by 64 bits (UB).
18703 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
18705 PR rtl-optimization/92303
18706 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
18708 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
18710 PR rtl-optimization/94148
18711 PR rtl-optimization/94042
18712 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
18713 (df_worklist_propagate_forward): New parameter last_change_age, use
18714 that instead of bb->aux.
18715 (df_worklist_propagate_backward): Ditto.
18716 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
18718 2020-03-13 Richard Biener <rguenther@suse.de>
18720 PR tree-optimization/94163
18721 * tree-ssa-pre.c (create_expression_by_pieces): Check
18722 whether alignment would be zero.
18724 2020-03-13 Martin Liska <mliska@suse.cz>
18727 * lto-wrapper.c (run_gcc): Use concat for appending
18728 to collect_gcc_options.
18730 2020-03-13 Jakub Jelinek <jakub@redhat.com>
18733 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
18734 instead of GEN_INT.
18736 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
18739 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
18740 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
18741 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
18742 TARGET_AVX512VL and ext_sse_reg_operand check.
18744 2020-03-13 Bu Le <bule1@huawei.com>
18747 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
18748 (-param=aarch64-double-recp-precision=): New options.
18749 * doc/invoke.texi: Document them.
18750 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
18751 instead of hard-coding the choice of 1 for float and 2 for double.
18753 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
18755 PR rtl-optimization/94119
18756 * resource.h (clear_hashed_info_until_next_barrier): Declare.
18757 * resource.c (clear_hashed_info_until_next_barrier): New function.
18758 * reorg.c (add_to_delay_list): Fix formatting.
18759 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
18760 the next instruction after removing a BARRIER.
18762 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
18764 PR middle-end/92071
18765 * expmed.c (store_integral_bit_field): For fields larger than a word,
18766 call extract_bit_field on the value if the mode is BLKmode. Remove
18767 specific path for big-endian targets and tidy things up a little bit.
18769 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
18771 PR rtl-optimization/90275
18772 * cse.c (cse_insn): Delete no-op register moves too.
18774 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
18776 * config/rx/rx.md (CTRLREG_CPEN): Remove.
18777 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
18779 2020-03-12 Richard Biener <rguenther@suse.de>
18781 PR tree-optimization/94103
18782 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
18783 punning when the mode precision is not sufficient.
18785 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
18788 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
18789 MODE_V1DF and MODE_V2SF.
18790 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
18791 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
18794 2020-03-12 Jakub Jelinek <jakub@redhat.com>
18796 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
18797 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
18798 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
18799 * doc/tm.texi: Regenerated.
18801 PR tree-optimization/94130
18802 * tree-ssa-dse.c: Include gimplify.h.
18803 (increment_start_addr): If stmt has lhs, drop the lhs from call and
18804 set it after the call to the original value of the first argument.
18806 (decrement_count): Formatting fix.
18808 2020-03-11 Delia Burduv <delia.burduv@arm.com>
18810 * config/arm/arm-builtins.c
18811 (arm_init_simd_builtin_scalar_types): New.
18812 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
18813 (vld2q_bf16): Used new builtin type.
18814 (vld3_bf16): Used new builtin type.
18815 (vld3q_bf16): Used new builtin type.
18816 (vld4_bf16): Used new builtin type.
18817 (vld4q_bf16): Used new builtin type.
18818 (vld2_dup_bf16): Used new builtin type.
18819 (vld2q_dup_bf16): Used new builtin type.
18820 (vld3_dup_bf16): Used new builtin type.
18821 (vld3q_dup_bf16): Used new builtin type.
18822 (vld4_dup_bf16): Used new builtin type.
18823 (vld4q_dup_bf16): Used new builtin type.
18825 2020-03-11 Jakub Jelinek <jakub@redhat.com>
18828 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
18829 at the start to switch to data section. Don't print extra newline if
18830 .globl directive has not been emitted.
18832 2020-03-11 Richard Biener <rguenther@suse.de>
18834 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
18837 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
18839 PR middle-end/93961
18840 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
18841 whose type is a qualified union.
18843 2020-03-11 Jakub Jelinek <jakub@redhat.com>
18846 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
18847 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
18850 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
18852 (get_nth_most_common_value): Use abs_hwi instead of abs.
18854 PR middle-end/94111
18855 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
18856 is rvc_normal, otherwise use real_to_decimal to print the number to
18859 PR tree-optimization/94114
18860 * tree-loop-distribution.c (generate_memset_builtin): Call
18861 rewrite_to_non_trapping_overflow even on mem.
18862 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
18865 2020-03-10 Jeff Law <law@redhat.com>
18867 * config/bfin/bfin.md (movsi_insv): Add length attribute.
18869 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
18872 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
18873 NAN and SIGNED_ZEROR for smax/smin.
18875 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
18878 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
18879 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
18881 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
18883 * loop-iv.c (find_simple_exit): Make it static.
18884 * cfgloop.h: Remove the corresponding prototype.
18886 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
18888 * ddg.c (create_ddg): Fix intendation.
18889 (set_recurrence_length): Likewise.
18890 (create_ddg_all_sccs): Likewise.
18892 2020-03-10 Jakub Jelinek <jakub@redhat.com>
18895 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
18896 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
18899 2020-03-09 Jason Merrill <jason@redhat.com>
18901 * gdbinit.in (pgs): Fix typo in documentation.
18903 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
18907 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
18909 PR rtl-optimization/93564
18910 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
18911 do not honor reg alloc order.
18913 2020-03-09 Andrew Pinski <apinski@marvell.com>
18915 PR inline-asm/94095
18916 * doc/extend.texi (x86 Operand Modifiers): Fix column
18919 2020-03-09 Martin Liska <mliska@suse.cz>
18922 * config/rs6000/rs6000.c (rs6000_option_override_internal):
18923 Remove set of str_align_loops and str_align_jumps as these
18924 should be set in previous 2 conditions in the function.
18926 2020-03-09 Jakub Jelinek <jakub@redhat.com>
18928 PR rtl-optimization/94045
18929 * params.opt (-param=max-find-base-term-values=): New option.
18930 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
18931 in a single toplevel find_base_term call.
18933 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
18936 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
18937 * config/aarch64/aarch64-simd.md
18938 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
18939 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
18940 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
18941 * config/aarch64/arm_neon.h:
18942 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
18943 (vmlal_lane_u16): Likewise.
18944 (vmlal_lane_s32): Likewise.
18945 (vmlal_lane_u32): Likewise.
18946 (vmlal_laneq_s16): Likewise.
18947 (vmlal_laneq_u16): Likewise.
18948 (vmlal_laneq_s32): Likewise.
18949 (vmlal_laneq_u32): Likewise.
18950 (vmull_lane_s16): Likewise.
18951 (vmull_lane_u16): Likewise.
18952 (vmull_lane_s32): Likewise.
18953 (vmull_lane_u32): Likewise.
18954 (vmull_laneq_s16): Likewise.
18955 (vmull_laneq_u16): Likewise.
18956 (vmull_laneq_s32): Likewise.
18957 (vmull_laneq_u32): Likewise.
18958 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
18961 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
18963 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
18964 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
18965 (aarch64_mls_elt<mode>): Likewise.
18966 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
18967 (aarch64_fma4_elt<mode>): Likewise.
18968 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
18969 (aarch64_fma4_elt_to_64v2df): Likewise.
18970 (aarch64_fnma4_elt<mode>): Likewise.
18971 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
18972 (aarch64_fnma4_elt_to_64v2df): Likewise.
18974 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18976 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
18977 Specify movprfx attribute.
18978 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
18980 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
18983 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
18985 (TARGET_NO_FP_IN_TOC): Same.
18986 * config/rs6000/aix71.h: Same.
18987 * config/rs6000/aix72.h: Same.
18989 2020-03-06 Andrew Pinski <apinski@marvell.com>
18990 Jeff Law <law@redhat.com>
18992 PR rtl-optimization/93996
18993 * haifa-sched.c (remove_notes): Be more careful when adding
18996 2020-03-06 Delia Burduv <delia.burduv@arm.com>
18998 * config/arm/arm_neon.h (vld2_bf16): New.
19004 (vld2_dup_bf16): New.
19005 (vld2q_dup_bf16): New.
19006 (vld3_dup_bf16): New.
19007 (vld3q_dup_bf16): New.
19008 (vld4_dup_bf16): New.
19009 (vld4q_dup_bf16): New.
19010 * config/arm/arm_neon_builtins.def
19011 (vld2): Changed to VAR13 and added v4bf, v8bf
19012 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
19013 (vld3): Changed to VAR13 and added v4bf, v8bf
19014 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
19015 (vld4): Changed to VAR13 and added v4bf, v8bf
19016 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
19017 * config/arm/iterators.md (VDXBF2): New iterator.
19018 *config/arm/neon.md (neon_vld2): Use new iterators.
19019 (neon_vld2_dup<mode): Use new iterators.
19020 (neon_vld3<mode>): Likewise.
19021 (neon_vld3qa<mode>): Likewise.
19022 (neon_vld3qb<mode>): Likewise.
19023 (neon_vld3_dup<mode>): Likewise.
19024 (neon_vld4<mode>): Likewise.
19025 (neon_vld4qa<mode>): Likewise.
19026 (neon_vld4qb<mode>): Likewise.
19027 (neon_vld4_dup<mode>): Likewise.
19028 (neon_vld2_dupv8bf): New.
19029 (neon_vld3_dupv8bf): Likewise.
19030 (neon_vld4_dupv8bf): Likewise.
19032 2020-03-06 Delia Burduv <delia.burduv@arm.com>
19034 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
19035 (bfloat16x8x2_t): New typedef.
19036 (bfloat16x4x3_t): New typedef.
19037 (bfloat16x8x3_t): New typedef.
19038 (bfloat16x4x4_t): New typedef.
19039 (bfloat16x8x4_t): New typedef.
19046 * config/arm/arm-builtins.c (v2bf_UP): Define.
19048 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
19049 * config/arm/arm-modes.def (V2BF): New mode.
19050 * config/arm/arm-simd-builtin-types.def
19051 (Bfloat16x2_t): New entry.
19052 * config/arm/arm_neon_builtins.def
19053 (vst2): Changed to VAR13 and added v4bf, v8bf
19054 (vst3): Changed to VAR13 and added v4bf, v8bf
19055 (vst4): Changed to VAR13 and added v4bf, v8bf
19056 * config/arm/iterators.md (VDXBF): New iterator.
19057 (VQ2BF): New iterator.
19058 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
19059 (neon_vst2<mode>): Used new iterators.
19060 (neon_vst3<mode>): Used new iterators.
19061 (neon_vst3<mode>): Used new iterators.
19062 (neon_vst3qa<mode>): Used new iterators.
19063 (neon_vst3qb<mode>): Used new iterators.
19064 (neon_vst4<mode>): Used new iterators.
19065 (neon_vst4<mode>): Used new iterators.
19066 (neon_vst4qa<mode>): Used new iterators.
19067 (neon_vst4qb<mode>): Used new iterators.
19069 2020-03-06 Delia Burduv <delia.burduv@arm.com>
19071 * config/aarch64/aarch64-simd-builtins.def
19072 (bfcvtn): New built-in function.
19073 (bfcvtn_q): New built-in function.
19074 (bfcvtn2): New built-in function.
19075 (bfcvt): New built-in function.
19076 * config/aarch64/aarch64-simd.md
19077 (aarch64_bfcvtn<q><mode>): New pattern.
19078 (aarch64_bfcvtn2v8bf): New pattern.
19079 (aarch64_bfcvtbf): New pattern.
19080 * config/aarch64/arm_bf16.h (float32_t): New typedef.
19081 (vcvth_bf16_f32): New intrinsic.
19082 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
19083 (vcvtq_low_bf16_f32): New intrinsic.
19084 (vcvtq_high_bf16_f32): New intrinsic.
19085 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
19086 (UNSPEC_BFCVTN): New UNSPEC.
19087 (UNSPEC_BFCVTN2): New UNSPEC.
19088 (UNSPEC_BFCVT): New UNSPEC.
19089 * config/arm/types.md (bf_cvt): New type.
19091 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
19093 * config/s390/s390.md ("tabort"): Get rid of two consecutive
19094 blanks in format string.
19096 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
19100 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
19101 * config/i386/i386.c (ix86_get_ssemov): New function.
19102 (ix86_output_ssemov): Likewise.
19103 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
19104 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
19106 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
19107 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
19108 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
19109 (*movti_internal): Likewise.
19110 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
19112 2020-03-05 Jeff Law <law@redhat.com>
19114 PR tree-optimization/91890
19115 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
19116 Use gimple_or_expr_nonartificial_location.
19117 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
19118 Use gimple_or_expr_nonartificial_location.
19119 * gimple.c (gimple_or_expr_nonartificial_location): New function.
19120 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
19121 * tree-ssa-strlen.c (maybe_warn_overflow): Use
19122 gimple_or_expr_nonartificial_location.
19123 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
19124 (maybe_warn_pointless_strcmp): Likewise.
19126 2020-03-05 Jakub Jelinek <jakub@redhat.com>
19129 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
19130 SRC and MASK arguments to __m128 from __m128d.
19131 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
19133 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
19135 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
19136 argument to __m128i from __m128d.
19137 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
19139 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
19140 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
19143 2020-03-05 Delia Burduv <delia.burduv@arm.com>
19145 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
19146 (vbfmlalbq_f32): New.
19147 (vbfmlaltq_f32): New.
19148 (vbfmlalbq_lane_f32): New.
19149 (vbfmlaltq_lane_f32): New.
19150 (vbfmlalbq_laneq_f32): New.
19151 (vbfmlaltq_laneq_f32): New.
19152 * config/arm/arm_neon_builtins.def (vmmla): New.
19157 (vfmab_laneq): New.
19158 (vfmat_laneq): New.
19159 * config/arm/iterators.md (BF_MA): New int iterator.
19160 (bt): New int attribute.
19161 (VQXBF): Copy of VQX with V8BF.
19162 * config/arm/neon.md (neon_vmmlav8bf): New insn.
19163 (neon_vfma<bt>v8bf): New insn.
19164 (neon_vfma<bt>_lanev8bf): New insn.
19165 (neon_vfma<bt>_laneqv8bf): New expand.
19166 (neon_vget_high<mode>): Changed iterator to VQXBF.
19167 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
19168 (UNSPEC_BFMAB): New UNSPEC.
19169 (UNSPEC_BFMAT): New UNSPEC.
19171 2020-03-05 Jakub Jelinek <jakub@redhat.com>
19173 PR middle-end/93399
19174 * tree-pretty-print.h (pretty_print_string): Declare.
19175 * tree-pretty-print.c (pretty_print_string): Remove forward
19176 declaration, no longer static. Change nbytes parameter type
19177 from unsigned to size_t.
19178 * print-rtl.c (print_value) <case CONST_STRING>: Use
19179 pretty_print_string and for shrink way too long strings.
19181 2020-03-05 Richard Biener <rguenther@suse.de>
19182 Jakub Jelinek <jakub@redhat.com>
19184 PR tree-optimization/93582
19185 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
19186 last operand as signed when looking for memset offset. Formatting
19189 2020-03-04 Andrew Pinski <apinski@marvell.com>
19192 * value-prof.c (dump_histogram_value): Use std::abs.
19194 2020-03-04 Martin Sebor <msebor@redhat.com>
19196 PR tree-optimization/93986
19197 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
19198 operands to the same precision widest_int to avoid ICEs.
19200 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
19203 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
19204 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
19205 for OPTION_MASK_ALTIVEC.
19207 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
19209 * config.gcc: Include the glibc-stdint.h header for zTPF.
19211 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
19213 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
19214 direct FPR-GPR copies.
19215 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
19218 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
19220 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
19221 operands to the prologue_tpf expander.
19222 (s390_emit_epilogue): Likewise.
19223 (s390_option_override_internal): Do error checking and setup for
19225 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
19226 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
19227 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
19228 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
19229 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
19230 operands for the check flag and the branch target.
19231 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
19232 ("mtpf-trace-hook-prologue-target")
19233 ("mtpf-trace-hook-epilogue-check")
19234 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
19236 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
19237 options are for debugging purposes and will not be documented
19240 2020-03-04 Jakub Jelinek <jakub@redhat.com>
19243 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
19245 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
19246 argument. Change pd argument so that it can be modified. Turn
19247 constant non-CONSTRUCTOR store into non-constant if it is too large.
19248 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
19250 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
19253 2020-02-04 Richard Biener <rguenther@suse.de>
19255 PR tree-optimization/93964
19256 * graphite-isl-ast-to-gimple.c
19257 (gcc_expression_from_isl_ast_expr_id): Add intermediate
19258 conversion for pointer to integer converts.
19259 * graphite-scop-detection.c (assign_parameter_index_in_region):
19262 2020-03-04 Martin Liska <mliska@suse.cz>
19266 * doc/invoke.texi: Clarify --help=language and --help=common
19269 2020-03-04 Jakub Jelinek <jakub@redhat.com>
19271 PR tree-optimization/94001
19272 * tree-tailcall.c (process_assignment): Before comparing op1 to
19273 *ass_var, verify *ass_var is non-NULL.
19275 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
19278 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
19281 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
19283 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
19284 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
19285 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
19286 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
19287 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
19288 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
19289 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
19290 (V_bf_low, V_bf_cvt_m): New mode attributes.
19291 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
19292 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
19293 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
19294 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
19295 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
19297 2020-03-03 Jakub Jelinek <jakub@redhat.com>
19299 PR tree-optimization/93582
19300 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
19301 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
19302 members, initialize them in the constructor and if mask is non-NULL,
19303 artificially push_partial_def {} for the portions of the mask that
19305 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
19306 val and return (void *)-1. Formatting fix.
19307 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
19309 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
19310 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
19312 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
19314 (visit_stmt): Formatting fix.
19316 2020-03-03 Richard Biener <rguenther@suse.de>
19318 PR tree-optimization/93946
19319 * alias.h (refs_same_for_tbaa_p): Declare.
19320 * alias.c (refs_same_for_tbaa_p): New function.
19321 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
19323 * tree-ssa-scopedtables.h
19324 (avail_exprs_stack::lookup_avail_expr): Add output argument
19325 giving access to the hashtable entry.
19326 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
19328 * tree-ssa-dom.c: Include alias.h.
19329 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
19330 removing redundant store.
19331 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
19332 (ao_ref_init_from_vn_reference): Adjust prototype.
19333 (vn_reference_lookup_pieces): Likewise.
19334 (vn_reference_insert_pieces): Likewise.
19335 * tree-ssa-sccvn.c: Track base alias set in addition to alias
19337 (eliminate_dom_walker::eliminate_stmt): Also check base alias
19338 set when removing redundant stores.
19339 (visit_reference_op_store): Likewise.
19340 * dse.c (record_store): Adjust valdity check for redundant
19343 2020-03-03 Jakub Jelinek <jakub@redhat.com>
19346 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
19348 PR rtl-optimization/94002
19349 * explow.c (plus_constant): Punt if cst has VOIDmode and
19350 get_pool_mode is different from mode.
19352 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19354 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
19355 address has an offset which fits the scalling constraint for a
19356 load/store operation.
19357 (legitimate_scaled_address_p): Update use
19358 leigitimate_small_data_address_p.
19359 (arc_print_operand): Likewise.
19360 (arc_legitimate_address_p): Likewise.
19361 (legitimate_small_data_address_p): Likewise.
19363 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19365 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
19366 (fnmasf4_fpu): Likewise.
19368 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19370 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
19372 (subdi3): Likewise.
19373 (adddi3_i): Remove pattern.
19374 (subdi3_i): Likewise.
19376 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
19378 * config/arc/arc.md (eh_return): Add length info.
19380 2020-03-02 David Malcolm <dmalcolm@redhat.com>
19382 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
19384 2020-03-02 David Malcolm <dmalcolm@redhat.com>
19386 * doc/invoke.texi (Static Analyzer Options): Add
19387 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
19390 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
19393 * config/i386/i386.md (movstrict<mode>): Allow only
19394 registers with VALID_INT_MODE_P modes.
19396 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
19398 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
19399 (reduc_insn): Use 'U' and 'B' operand codes.
19400 (reduc_<reduc_op>_scal_<mode>): Allow all types.
19401 (reduc_<reduc_op>_scal_v64di): Delete.
19402 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
19403 (*plus_carry_dpp_shr_v64si): Change to ...
19404 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
19405 (mov_from_lane63_v64di): Change to ...
19406 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
19407 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
19408 Support UNSPEC_MOV_DPP_SHR output formats.
19409 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
19410 Add "use_extends" reductions.
19411 (print_operand_address): Add 'I' and 'U' codes.
19412 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
19414 2020-03-02 Martin Liska <mliska@suse.cz>
19416 * lto-wrapper.c: Fix typo in comment about
19417 C++ standard version.
19419 2020-03-01 Martin Sebor <msebor@redhat.com>
19422 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
19424 2020-03-01 Martin Sebor <msebor@redhat.com>
19426 PR middle-end/93829
19427 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
19428 of a pointer in the outermost ADDR_EXPRs.
19430 2020-02-28 Jeff Law <law@redhat.com>
19432 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
19433 * config/v850/v850.c (v850_asm_trampoline_template): Update
19436 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
19439 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
19442 2020-02-28 Martin Liska <mliska@suse.cz>
19445 * configure.ac: Improve detection of ld_date by requiring
19446 either two dashes or none.
19447 * configure: Regenerate.
19449 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
19451 PR rtl-optimization/93564
19452 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
19453 do not honor reg alloc order.
19455 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
19458 * config/aarch64/aarch64.c (aarch64_override_options): Fix
19459 misleading warning string.
19461 2020-02-27 Martin Sebor <msebor@redhat.com>
19463 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
19465 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
19468 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
19469 Split the insn into two parts. This insn only does variable
19470 extract from a register.
19471 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
19472 variable extract from memory.
19473 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
19474 only does variable extract from a register.
19475 (vsx_extract_v4sf_var_load): New insn, do variable extract from
19477 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
19478 into two parts. This insn only does variable extract from a
19480 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
19481 do variable extract from memory.
19483 2020-02-27 Martin Jambor <mjambor@suse.cz>
19484 Feng Xue <fxue@os.amperecomputing.com>
19487 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
19488 new function calls_same_node_or_its_all_contexts_clone_p.
19489 (cgraph_edge_brings_value_p): Use it.
19490 (cgraph_edge_brings_value_p): Likewise.
19491 (self_recursive_pass_through_p): Return false if caller is a clone.
19492 (self_recursive_agg_pass_through_p): Likewise.
19494 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
19496 PR middle-end/92152
19497 * alias.c (ends_tbaa_access_path_p): Break out from ...
19498 (component_uses_parent_alias_set_from): ... here.
19499 * alias.h (ends_tbaa_access_path_p): Declare.
19500 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
19501 handle trailing arrays past end of tbaa access path.
19502 (aliasing_component_refs_p): ... here; likewise.
19503 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
19504 path; disambiguate also past end of it.
19505 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
19508 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
19510 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
19511 beginning of the file.
19512 (vcreate_bf16, vcombine_bf16): New.
19513 (vdup_n_bf16, vdupq_n_bf16): New.
19514 (vdup_lane_bf16, vdup_laneq_bf16): New.
19515 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
19516 (vduph_lane_bf16, vduph_laneq_bf16): New.
19517 (vset_lane_bf16, vsetq_lane_bf16): New.
19518 (vget_lane_bf16, vgetq_lane_bf16): New.
19519 (vget_high_bf16, vget_low_bf16): New.
19520 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
19521 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
19522 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
19523 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
19524 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
19525 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
19526 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
19527 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
19528 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
19529 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
19530 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
19531 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
19532 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
19533 (vreinterpretq_bf16_p128): New.
19534 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
19535 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
19536 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
19537 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
19538 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
19539 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
19540 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
19541 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
19542 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
19543 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
19544 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
19545 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
19546 (vreinterpretq_p128_bf16): New.
19547 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
19548 (V_elem): Likewise.
19549 (V_elem_l): Likewise.
19550 (VD_LANE): Likewise.
19552 (V_DOUBLE): Likewise.
19553 (VDQX): Add V4BF and V8BF.
19554 (V_two_elem, V_three_elem, V_four_elem): Likewise.
19556 (V_HALF): Likewise.
19557 (V_double_vector_mode): Likewise.
19558 (V_cmp_result): Likewise.
19559 (V_uf_sclr): Likewise.
19560 (V_sz_elem): Likewise.
19561 (Is_d_reg): Likewise.
19562 (V_mode_nunits): Likewise.
19563 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
19565 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
19567 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
19568 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
19569 (<expander><mode>3<exec>): Likewise.
19570 (<expander><mode>3): New.
19571 (v<expander><mode>3): New.
19572 (<expander><mode>3): New.
19573 (<expander><mode>3<exec>): Rename to ...
19574 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
19575 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
19577 2020-02-27 Alexandre Oliva <oliva@adacore.com>
19579 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
19582 2020-02-27 Richard Biener <rguenther@suse.de>
19584 PR tree-optimization/93508
19585 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
19586 non-_CHK variants. Valueize their length arguments.
19588 2020-02-27 Richard Biener <rguenther@suse.de>
19590 PR tree-optimization/93953
19591 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
19592 to the hash-map entry.
19594 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
19596 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
19598 2020-02-27 Mark Williams <mwilliams@fb.com>
19600 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
19601 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
19602 -ffile-prefix-map and -fmacro-prefix-map.
19603 * lto-streamer-out.c: Include file-prefix-map.h.
19604 (lto_output_location): Remap the file part of locations.
19606 2020-02-27 Jakub Jelinek <jakub@redhat.com>
19609 * gimplify.c (gimplify_init_constructor): Don't promote readonly
19610 DECL_REGISTER variables to TREE_STATIC.
19612 PR tree-optimization/93582
19613 PR tree-optimization/93945
19614 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
19615 non-zero INTEGER_CST second argument and ref->offset or ref->size
19616 not a multiple of BITS_PER_UNIT.
19618 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
19620 * doc/install.texi (Binaries): Update description of BullFreeware.
19622 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
19626 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
19627 C++ Language Options, Warning Options, and Static Analyzer
19628 Options lists. Document negative form of options enabled by
19629 default. Move some things around to more accurately sort
19630 warnings by category.
19631 (C++ Dialect Options, Warning Options, Static Analyzer
19632 Options): Document negative form of options when enabled by
19633 default. Move some things around to more accurately sort
19634 warnings by category. Add some missing index entries.
19635 Light copy-editing.
19637 2020-02-26 Carl Love <cel@us.ibm.com>
19640 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
19641 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
19642 for the vector unsigned short arguments. It is also listed as the
19643 name of the built-in for arguments vector unsigned short,
19644 vector unsigned int and vector unsigned long long built-ins. The
19645 name of the builtins for these arguments should be:
19646 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
19647 __builtin_crypto_vpmsumd respectively.
19649 2020-02-26 Richard Biener <rguenther@suse.de>
19651 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
19652 and load permutation.
19654 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
19656 PR middle-end/93843
19657 * optabs-tree.c (supportable_convert_operation): Reject types with
19660 2020-02-26 David Malcolm <dmalcolm@redhat.com>
19662 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
19664 2020-02-26 Jakub Jelinek <jakub@redhat.com>
19666 PR tree-optimization/93820
19667 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
19668 argument to ALL_INTEGER_CST_P boolean.
19669 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
19670 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
19671 adjacent INTEGER_CST store into merged_store->only_constants like
19674 2020-02-25 Jakub Jelinek <jakub@redhat.com>
19677 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
19679 * cfghooks.c (verify_flow_info): Likewise.
19680 * predict.c (combine_predictions_for_bb): Likewise.
19681 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
19682 sucessor -> successor.
19683 (find_traces_1_round): Fix comment typo, destinarion -> destination.
19684 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
19686 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
19687 message typo, sucessors -> successors.
19689 2020-02-25 Martin Sebor <msebor@redhat.com>
19691 * doc/extend.texi (attribute access): Correct an example.
19693 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
19695 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
19697 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
19698 (VAR15, VAR16): New.
19699 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
19700 (VD): Enable for V4BF.
19702 (VQ): Enable for V8BF.
19704 (VQ_NO2E): Likewise.
19705 (VDBL, Vdbl): Add V4BF.
19706 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
19707 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
19708 (bfloat16x8x2_t): Likewise.
19709 (bfloat16x4x3_t): Likewise.
19710 (bfloat16x8x3_t): Likewise.
19711 (bfloat16x4x4_t): Likewise.
19712 (bfloat16x8x4_t): Likewise.
19713 (vcombine_bf16): New.
19714 (vld1_bf16, vld1_bf16_x2): New.
19715 (vld1_bf16_x3, vld1_bf16_x4): New.
19716 (vld1q_bf16, vld1q_bf16_x2): New.
19717 (vld1q_bf16_x3, vld1q_bf16_x4): New.
19718 (vld1_lane_bf16): New.
19719 (vld1q_lane_bf16): New.
19720 (vld1_dup_bf16): New.
19721 (vld1q_dup_bf16): New.
19724 (vld2_dup_bf16): New.
19725 (vld2q_dup_bf16): New.
19728 (vld3_dup_bf16): New.
19729 (vld3q_dup_bf16): New.
19732 (vld4_dup_bf16): New.
19733 (vld4q_dup_bf16): New.
19734 (vst1_bf16, vst1_bf16_x2): New.
19735 (vst1_bf16_x3, vst1_bf16_x4): New.
19736 (vst1q_bf16, vst1q_bf16_x2): New.
19737 (vst1q_bf16_x3, vst1q_bf16_x4): New.
19738 (vst1_lane_bf16): New.
19739 (vst1q_lane_bf16): New.
19747 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
19749 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
19750 (VALL_F16): Likewise.
19751 (VALLDI_F16): Likewise.
19753 (Vetype): Likewise.
19754 (vswap_width_name): Likewise.
19755 (VSWAP_WIDTH): Likewise.
19759 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
19760 (vget_lane_bf16, vgetq_lane_bf16): New.
19761 (vcreate_bf16): New.
19762 (vdup_n_bf16, vdupq_n_bf16): New.
19763 (vdup_lane_bf16, vdup_laneq_bf16): New.
19764 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
19765 (vduph_lane_bf16, vduph_laneq_bf16): New.
19766 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
19767 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
19768 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
19769 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
19770 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
19771 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
19772 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
19773 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
19774 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
19775 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
19776 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
19777 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
19778 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
19779 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
19780 (vreinterpretq_bf16_p128): New.
19781 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
19782 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
19783 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
19784 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
19785 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
19786 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
19787 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
19788 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
19789 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
19790 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
19791 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
19792 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
19793 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
19794 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
19795 (vreinterpretq_p128_bf16): New.
19797 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
19799 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
19800 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
19801 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
19802 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
19803 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
19804 * config/arm/iterators.md (VSF2BF): New attribute.
19805 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
19806 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
19807 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
19809 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
19811 * config/arm/arm.md (required_for_purecode): New attribute.
19812 (enabled): Handle required_for_purecode.
19813 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
19814 work with -mpure-code.
19816 2020-02-25 Jakub Jelinek <jakub@redhat.com>
19818 PR rtl-optimization/93908
19819 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
19822 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
19824 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
19826 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
19828 * doc/install.texi (--enable-checking): Adjust wording.
19830 2020-02-25 Richard Biener <rguenther@suse.de>
19832 PR tree-optimization/93868
19833 * tree-vect-slp.c (slp_copy_subtree): New function.
19834 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
19835 re-arranging stmts in it.
19837 2020-02-25 Jakub Jelinek <jakub@redhat.com>
19839 PR middle-end/93874
19840 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
19841 dummy function and remove it at the end.
19843 PR translation/93864
19844 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
19845 paramter -> parameter.
19846 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
19847 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
19849 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
19851 * doc/install.texi (--enable-checking): Properly document current
19853 (--enable-stage1-checking): Minor clarification about bootstrap.
19855 2020-02-24 David Malcolm <dmalcolm@redhat.com>
19858 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
19859 -fanalyzer-checker=taint is also required.
19860 (-fanalyzer-checker=): Note that providing this option enables the
19861 given checker, and doing so may be required for checkers that are
19862 disabled by default.
19864 2020-02-24 David Malcolm <dmalcolm@redhat.com>
19866 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
19867 significant control flow events; add a "3" which shows all
19868 control flow events; the old "3" becomes "4".
19870 2020-02-24 Jakub Jelinek <jakub@redhat.com>
19872 PR tree-optimization/93582
19873 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
19874 pd.offset and pd.size to be counted in bits rather than bytes, add
19875 support for maxsizei that is not a multiple of BITS_PER_UNIT and
19876 handle bitfield stores and loads.
19877 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
19878 uncomparable quantities - bytes vs. bits. Allow push_partial_def
19879 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
19880 pd.offset/pd.size to be counted in bits rather than bytes.
19881 Formatting fix. Rename shadowed len variable to buflen.
19883 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
19884 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
19887 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
19888 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
19889 * opts-common.c (parse_options_from_collect_gcc_options): New function.
19890 (prepend_xassembler_to_collect_as_options): Likewise.
19891 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
19892 (prepend_xassembler_to_collect_as_options): Likewise.
19893 * lto-opts.c (lto_write_options): Stream assembler options
19894 in COLLECT_AS_OPTIONS.
19895 * lto-wrapper.c (xassembler_options_error): New static variable.
19896 (get_options_from_collect_gcc_options): Move parsing options code to
19897 parse_options_from_collect_gcc_options and call it.
19898 (merge_and_complain): Validate -Xassembler options.
19899 (append_compiler_options): Handle OPT_Xassembler.
19900 (run_gcc): Append command line -Xassembler options to
19901 collect_gcc_options.
19902 * doc/invoke.texi: Add documentation about using Xassembler
19905 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
19907 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
19909 (riscv_rtx_costs): Update cost model for LTGT.
19911 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
19913 PR rtl-optimization/93564
19914 * ira-color.c (struct update_cost_queue_elem): New member start.
19915 (queue_update_cost, get_next_update_cost): Add new arg start.
19916 (allocnos_conflict_p): New function.
19917 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
19918 Add checking conflicts with allocnos_conflict_p.
19919 (update_costs_from_prefs, restore_costs_from_copies): Adjust
19920 update_costs_from_allocno calls.
19921 (update_conflict_hard_regno_costs): Add checking conflicts with
19922 allocnos_conflict_p. Adjust calls of queue_update_cost and
19923 get_next_update_cost.
19924 (assign_hard_reg): Adjust calls of queue_update_cost. Add
19926 (bucket_allocno_compare_func): Restore previous version.
19928 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
19930 * config/pa/pa.c (pa_function_value): Fix check for word and
19931 double-word size when handling aggregate return values.
19932 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
19933 that homogeneous SFmode and DFmode aggregates are passed and returned
19934 in general registers.
19936 2020-02-21 Jakub Jelinek <jakub@redhat.com>
19938 PR translation/93759
19939 * opts.c (print_filtered_help): Translate help before appending
19940 messages to it rather than after that.
19942 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
19944 PR rtl-optimization/PR92989
19945 * lra-lives.c (process_bb_lives): Restore the original order
19946 of the bb liveness update. Call make_hard_regno_dead for each
19947 register clobbered at the start of an EH receiver.
19949 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
19952 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
19953 self-recursively generated.
19955 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
19958 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
19961 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
19963 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
19964 Document new target supports option.
19966 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
19968 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
19969 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
19970 * config/arm/iterators.md (MATMUL): New iterator.
19971 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
19972 (mmla_sfx): New attribute.
19973 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
19974 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
19975 (UNSPEC_MATMUL_US): New.
19977 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
19979 * config/arm/arm.md: Prevent scalar shifts from being used when big
19982 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
19983 Richard Biener <rguenther@suse.de>
19985 PR tree-optimization/93586
19986 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
19987 after mismatched array refs; do not sure type size information to
19988 recover from unmatched referneces with !flag_strict_aliasing_p.
19990 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
19992 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
19993 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
19994 (scatter_store<mode>): Rename to ...
19995 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
19996 (scatter<mode>_exec): Delete. Move contents ...
19997 (mask_scatter_store<mode>): ... here, and rename that to ...
19998 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
19999 Remove mode conversion.
20000 (mask_gather_load<mode>): Rename to ...
20001 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
20002 Remove mode conversion.
20003 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
20005 2020-02-21 Martin Jambor <mjambor@suse.cz>
20007 PR tree-optimization/93845
20008 * tree-sra.c (verify_sra_access_forest): Only test access size of
20011 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
20013 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
20014 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
20015 (addv64di3_exec): Likewise.
20016 (subv64di3): Likewise.
20017 (subv64di3_exec): Likewise.
20018 (addv64di3_zext): Likewise.
20019 (addv64di3_zext_exec): Likewise.
20020 (addv64di3_zext_dup): Likewise.
20021 (addv64di3_zext_dup_exec): Likewise.
20022 (addv64di3_zext_dup2): Likewise.
20023 (addv64di3_zext_dup2_exec): Likewise.
20024 (addv64di3_sext_dup2): Likewise.
20025 (addv64di3_sext_dup2_exec): Likewise.
20026 (<expander>v64di3): Likewise.
20027 (<expander>v64di3_exec): Likewise.
20028 (*<reduc_op>_dpp_shr_v64di): Likewise.
20029 (*plus_carry_dpp_shr_v64di): Likewise.
20030 * config/gcn/gcn.md (adddi3): Likewise.
20031 (addptrdi3): Likewise.
20032 (<expander>di3): Likewise.
20034 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
20036 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
20038 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20040 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
20041 support. Use aarch64_emit_mult instead of emitting multiplication
20042 instructions directly.
20043 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
20044 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
20046 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20048 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
20049 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
20050 instead of emitting multiplication instructions directly.
20051 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
20052 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
20053 (@aarch64_frecps<mode>): New expanders.
20055 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20057 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
20058 on and produce uint64_ts rather than ints.
20059 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
20060 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
20062 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20064 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
20065 an unused xmsk register when handling approximate rsqrt.
20067 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
20069 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
20070 flag_finite_math_only condition.
20072 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
20075 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
20076 to destination operand for shufps alternative.
20077 (*vec_extractv2si_1): Ditto.
20079 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
20082 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
20085 2020-02-20 Martin Liska <mliska@suse.cz>
20087 PR translation/93831
20088 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
20090 2020-02-20 Martin Liska <mliska@suse.cz>
20092 PR translation/93830
20093 * common/config/avr/avr-common.c: Remote trailing "|".
20095 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
20097 * collect2.c (maybe_run_lto_and_relink): Fix typo in
20100 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
20102 PR tree-optimization/93767
20103 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
20104 access-size bias from the offset calculations for negative strides.
20106 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
20108 * collect2.c (c_file, o_file): Make const again.
20109 (ldout,lderrout, dump_ld_file): Remove.
20110 (tool_cleanup): Avoid calling not signal-safe functions.
20111 (maybe_run_lto_and_relink): Avoid possible signal handler
20112 access to unintialzed memory (lto_o_files).
20113 (main): Avoid leaking temp files in $TMPDIR.
20114 Initialize c_file/o_file with concat, which avoids exposing
20115 uninitialized memory to signal handler, which calls unlink(!).
20116 Avoid calling maybe_unlink when the main function returns,
20117 since the atexit handler is already doing this.
20118 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
20120 2020-02-19 Martin Jambor <mjambor@suse.cz>
20122 PR tree-optimization/93776
20123 * tree-sra.c (create_access): Do not create zero size accesses.
20124 (get_access_for_expr): Do not search for zero sized accesses.
20126 2020-02-19 Martin Jambor <mjambor@suse.cz>
20128 PR tree-optimization/93667
20129 * tree-sra.c (scalarizable_type_p): Return false if record fields
20130 do not follow wach other.
20132 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
20134 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
20135 rather than fmv.x.s/fmv.s.x.
20137 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
20139 * config/aarch64/aarch64-simd-builtins.def
20140 (intrinsic_vec_smult_lo_): New.
20141 (intrinsic_vec_umult_lo_): Likewise.
20142 (vec_widen_smult_hi_): Likewise.
20143 (vec_widen_umult_hi_): Likewise.
20144 * config/aarch64/aarch64-simd.md
20145 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
20146 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
20147 (vmull_high_s16): Likewise.
20148 (vmull_high_s32): Likewise.
20149 (vmull_high_u8): Likewise.
20150 (vmull_high_u16): Likewise.
20151 (vmull_high_u32): Likewise.
20152 (vmull_s8): Likewise.
20153 (vmull_s16): Likewise.
20154 (vmull_s32): Likewise.
20155 (vmull_u8): Likewise.
20156 (vmull_u16): Likewise.
20157 (vmull_u32): Likewise.
20159 2020-02-18 Martin Liska <mliska@suse.cz>
20161 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
20162 bootstrap by missing removal of invalid sanity check.
20164 2020-02-18 Martin Liska <mliska@suse.cz>
20167 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
20168 Always compare LHS of gimple_assign.
20170 2020-02-18 Martin Liska <mliska@suse.cz>
20173 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
20174 and return type of functions.
20175 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
20176 Drop MALLOC attribute for void functions.
20177 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
20178 malloc_state for a new VOID clone.
20180 2020-02-18 Martin Liska <mliska@suse.cz>
20183 * common.opt: Add -fprofile-reproducibility.
20184 * doc/invoke.texi: Document it.
20185 * value-prof.c (dump_histogram_value):
20186 Document and support behavior for counters[0]
20187 being a negative value.
20188 (get_nth_most_common_value): Handle negative
20189 counters[0] in respect to flag_profile_reproducible.
20191 2020-02-18 Jakub Jelinek <jakub@redhat.com>
20194 * cgraph.c (verify_speculative_call): Use speculative_id instead of
20195 speculative_uid in messages. Remove trailing whitespace from error
20196 message. Use num_speculative_call_targets instead of
20197 num_speculative_targets in a message.
20198 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
20199 edge messages and stmt instead of cal_stmt in reference message.
20201 PR tree-optimization/93780
20202 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
20203 before calling build_vector_type.
20204 (execute_update_addresses_taken): Likewise.
20207 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
20208 typo, functoin -> function.
20209 * tree.c (free_lang_data_in_decl): Fix comment typo,
20210 functoin -> function.
20211 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
20213 2020-02-17 David Malcolm <dmalcolm@redhat.com>
20215 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
20217 (print_option_information): Don't call get_option_url if URLs
20220 2020-02-17 Alexandre Oliva <oliva@adacore.com>
20222 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
20223 handling of register_common-less targets.
20225 2020-02-17 Martin Liska <mliska@suse.cz>
20228 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
20230 2020-02-17 Martin Liska <mliska@suse.cz>
20232 PR translation/93755
20233 * config/rs6000/rs6000.c (rs6000_option_override_internal):
20236 2020-02-17 Martin Liska <mliska@suse.cz>
20239 * config/rx/elf.opt: Fix typo.
20241 2020-02-17 Richard Biener <rguenther@suse.de>
20244 * opts-global.c (print_ignored_options): Use inform and
20247 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
20250 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
20252 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
20255 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
20256 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
20258 2020-02-15 Jason Merrill <jason@redhat.com>
20260 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
20262 2020-02-15 Jakub Jelinek <jakub@redhat.com>
20264 PR tree-optimization/93744
20265 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
20266 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
20267 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
20268 sure @2 in the first and @1 in the other patterns has no side-effects.
20270 2020-02-15 David Malcolm <dmalcolm@redhat.com>
20271 Bernd Edlinger <bernd.edlinger@hotmail.de>
20275 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
20276 * configure.ac (--with-diagnostics-urls): New configuration
20277 option, based on --with-diagnostics-color.
20278 (DIAGNOSTICS_URLS_DEFAULT): New define.
20279 * config.h: Regenerate.
20280 * configure: Regenerate.
20281 * diagnostic.c (diagnostic_urls_init): Handle -1 for
20282 DIAGNOSTICS_URLS_DEFAULT from configure-time
20283 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
20284 and TERM_URLS environment variable.
20285 * diagnostic-url.h (diagnostic_url_format): New enum type.
20286 (diagnostic_urls_enabled_p): rename to...
20287 (determine_url_format): ... this, and change return type.
20288 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
20289 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
20290 the linux console, and mingw.
20291 (diagnostic_urls_enabled_p): rename to...
20292 (determine_url_format): ... this, and adjust.
20293 * pretty-print.h (pretty_printer::show_urls): rename to...
20294 (pretty_printer::url_format): ... this, and change to enum.
20295 * pretty-print.c (pretty_printer::pretty_printer,
20296 pp_begin_url, pp_end_url, test_urls): Adjust.
20297 * doc/install.texi (--with-diagnostics-urls): Document the new
20298 configuration option.
20299 (--with-diagnostics-color): Document the existing interaction
20300 with GCC_COLORS better.
20301 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
20302 vindex reference. Update description of defaults based on the above.
20303 (-fdiagnostics-color): Update description of how -fdiagnostics-color
20304 interacts with GCC_COLORS.
20306 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
20309 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
20310 conjunction with TARGET_GNU_TLS in early return.
20312 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
20314 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
20315 the mode is not wider than UNITS_PER_WORD.
20317 2020-02-14 Martin Jambor <mjambor@suse.cz>
20319 PR tree-optimization/93516
20320 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
20321 access of the same type as the parent.
20322 (propagate_subaccesses_from_lhs): Likewise.
20324 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
20327 * config/i386/avx512vbmi2intrin.h
20328 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
20329 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
20330 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
20331 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
20332 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
20333 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
20334 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
20335 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
20336 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
20337 of lacking a closing parenthesis.
20338 * config/i386/avx512vbmi2vlintrin.h
20339 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
20340 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
20341 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
20342 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
20343 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
20344 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
20345 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
20346 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
20347 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
20348 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
20349 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
20350 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
20351 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
20352 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
20353 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
20354 _mm_shldi_epi32, _mm_mask_shldi_epi32,
20355 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
20356 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
20358 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
20361 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
20362 the target function entry.
20364 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20366 * common/config/arc/arc-common.c (arc_option_optimization_table):
20367 Disable if-conversion step when optimized for size.
20369 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20371 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
20372 R12-R15 are always in ARCOMPACT16_REGS register class.
20373 * config/arc/arc.opt (mq-class): Deprecate.
20374 * config/arc/constraint.md ("q"): Remove dependency on mq-class
20376 * doc/invoke.texi (mq-class): Update text.
20377 * common/config/arc/arc-common.c (arc_option_optimization_table):
20380 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20382 * config/arc/arc.c (arc_insn_cost): New function.
20383 (TARGET_INSN_COST): Define.
20384 * config/arc/arc.md (cost): New attribute.
20385 (add_n): Use arc_nonmemory_operand.
20386 (ashlsi3_insn): Likewise, also update constraints.
20387 (ashrsi3_insn): Likewise.
20388 (rotrsi3): Likewise.
20389 (add_shift): Likewise.
20390 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
20392 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
20394 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
20396 (umulsidi_600): Likewise.
20398 2020-02-13 Jakub Jelinek <jakub@redhat.com>
20401 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
20402 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
20403 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
20404 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
20405 pass __A to the builtin followed by __W instead of __A followed by
20407 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
20408 _mm512_mask_popcnt_epi64): Likewise.
20409 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
20410 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
20411 _mm256_mask_popcnt_epi64): Likewise.
20413 PR tree-optimization/93582
20414 * fold-const.h (shift_bytes_in_array_left,
20415 shift_bytes_in_array_right): Declare.
20416 * fold-const.c (shift_bytes_in_array_left,
20417 shift_bytes_in_array_right): New function, moved from
20418 gimple-ssa-store-merging.c, no longer static.
20419 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
20420 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
20421 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
20422 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
20423 shift_bytes_in_array.
20424 (verify_shift_bytes_in_array): Rename to ...
20425 (verify_shift_bytes_in_array_left): ... this. Use
20426 shift_bytes_in_array_left instead of shift_bytes_in_array.
20427 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
20428 instead of verify_shift_bytes_in_array.
20429 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
20430 / native_interpret_expr where the store covers all needed bits,
20431 punt on PDP-endian, otherwise allow all involved offsets and sizes
20432 not to be byte-aligned.
20435 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
20436 use const_0_to_255_operand predicate instead of immediate_operand.
20437 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
20438 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
20439 vgf2p8affineinvqb_<mode><mask_name>,
20440 vgf2p8affineqb_<mode><mask_name>): Drop mode from
20441 const_0_to_255_operand predicated operands.
20443 2020-02-12 Jeff Law <law@redhat.com>
20445 * config/h8300/h8300.md (comparison shortening peepholes): Use
20446 a mode iterator to merge the HImode and SImode peepholes.
20448 2020-02-12 Jakub Jelinek <jakub@redhat.com>
20450 PR middle-end/93663
20451 * real.c (is_even): Make static. Function comment fix.
20452 (is_halfway_below): Make static, don't assert R is not inf/nan,
20453 instead return false for those. Small formatting fixes.
20455 2020-02-12 Martin Sebor <msebor@redhat.com>
20457 PR middle-end/93646
20458 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
20459 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
20460 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
20461 (strlen_check_and_optimize_call): Adjust callee name.
20463 2020-02-12 Jeff Law <law@redhat.com>
20465 * config/h8300/h8300.md (comparison shortening peepholes): Drop
20466 (and (xor)) variant. Combine other two into single peephole.
20468 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
20470 PR rtl-optimization/93565
20471 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
20473 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
20475 * config/aarch64/aarch64-simd.md
20476 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
20477 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
20478 generating separate ADDV and zero_extend patterns.
20479 * config/aarch64/iterators.md (VDQV_E): New iterator.
20481 2020-02-12 Jeff Law <law@redhat.com>
20483 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
20484 expanders, splits, etc.
20485 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
20486 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
20487 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
20488 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
20489 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
20490 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
20491 function prototype.
20492 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
20494 2020-02-12 Jakub Jelinek <jakub@redhat.com>
20497 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
20498 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
20499 TARGET_AVX512DQ from condition.
20500 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
20501 instead of <mask_mode512bit_condition> in condition. If
20502 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
20504 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
20507 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
20510 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
20512 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
20514 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
20515 where strlen is more legible.
20516 (rs6000_builtin_vectorized_libmass): Ditto.
20517 (rs6000_print_options_internal): Ditto.
20519 2020-02-11 Martin Sebor <msebor@redhat.com>
20521 PR tree-optimization/93683
20522 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
20524 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
20526 * config/rs6000/predicates.md (cint34_operand): Rename the
20527 -mprefixed-addr option to be -mprefixed.
20528 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
20529 the -mprefixed-addr option to be -mprefixed.
20530 (OTHER_FUTURE_MASKS): Likewise.
20531 (POWERPC_MASKS): Likewise.
20532 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
20533 the -mprefixed-addr option to be -mprefixed. Change error
20534 messages to refer to -mprefixed.
20535 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
20537 (rs6000_legitimate_offset_address_p): Likewise.
20538 (rs6000_mode_dependent_address): Likewise.
20539 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
20540 "-mprefixed" for target attributes and pragmas.
20541 (address_to_insn_form): Rename the -mprefixed-addr option to be
20543 (rs6000_adjust_insn_length): Likewise.
20544 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
20545 -mprefixed-addr option to be -mprefixed.
20546 (ASM_OUTPUT_OPCODE): Likewise.
20547 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
20548 -mprefixed-addr option to be -mprefixed.
20549 * config/rs6000/rs6000.opt (-mprefixed): Rename the
20550 -mprefixed-addr option to be prefixed. Change the option from
20551 being undocumented to being documented.
20552 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
20553 -mprefixed option. Update the -mpcrel documentation to mention
20556 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
20558 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
20559 including FIRST_PSEUDO_REGISTER - 1.
20560 * ira-color.c (print_hard_reg_set): Ditto.
20562 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20564 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
20565 (USTERNOP_QUALIFIERS): New define.
20566 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
20567 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
20568 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
20569 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
20570 * config/arm/arm_neon.h (vusdot_s32): New.
20571 (vusdot_lane_s32): New.
20572 (vusdotq_lane_s32): New.
20573 (vsudot_lane_s32): New.
20574 (vsudotq_lane_s32): New.
20575 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
20576 * config/arm/iterators.md (DOTPROD_I8MM): New.
20577 (sup, opsuffix): Add <us/su>.
20578 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
20579 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
20581 2020-02-11 Richard Biener <rguenther@suse.de>
20583 PR tree-optimization/93661
20584 PR tree-optimization/93662
20585 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
20586 tree_to_poly_int64.
20587 * tree-sra.c (get_access_for_expr): Likewise.
20589 2020-02-10 Jakub Jelinek <jakub@redhat.com>
20592 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
20593 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
20594 Change condition from TARGET_AVX2 to TARGET_AVX.
20596 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
20599 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
20600 argument of strncmp.
20602 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
20604 Try to generate zero-based comparisons.
20605 * config/cris/cris.c (cris_reduce_compare): New function.
20606 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
20607 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
20608 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
20610 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
20613 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
20614 in Thumb state and also as a destination in Arm state. Add T16
20617 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
20619 * md.texi (Define Subst): Match closing paren in example.
20621 2020-02-10 Jakub Jelinek <jakub@redhat.com>
20625 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
20626 arguments of strncmp.
20628 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
20631 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
20632 but different source value.
20633 (adjust_callers_for_value_intersection): New function.
20634 (gather_edges_for_value): Adjust order of callers to let a
20635 non-self-recursive caller be the first element.
20636 (self_recursive_pass_through_p): Add a new parameter "simple", and
20637 check generalized self-recursive pass-through jump function.
20638 (self_recursive_agg_pass_through_p): Likewise.
20639 (find_more_scalar_values_for_callers_subset): Compute value from
20640 pass-through jump function for self-recursive.
20641 (intersect_with_plats): Cleanup previous implementation code for value
20642 itersection with self-recursive call edge.
20643 (intersect_with_agg_replacements): Likewise.
20644 (intersect_aggregates_with_edge): Deduce value from pass-through jump
20645 function for self-recursive call edge. Cleanup previous implementation
20646 code for value intersection with self-recursive call edge.
20647 (decide_whether_version_node): Remove dead callers and adjust order
20648 to let a non-self-recursive caller be the first element.
20650 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
20652 * recog.c: Move pass_split_before_sched2 code in front of
20653 pass_split_before_regstack.
20654 (pass_data_split_before_sched2): Rename pass to split3 from split4.
20655 (pass_data_split_before_regstack): Rename pass to split4 from split3.
20656 (rest_of_handle_split_before_sched2): Remove.
20657 (pass_split_before_sched2::execute): Unconditionally call
20659 (enable_split_before_sched2): New function.
20660 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
20661 (pass_split_before_regstack::gate): Ditto.
20662 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
20663 Update name check for renamed split4 pass.
20664 * config/sh/sh.c (register_sh_passes): Update pass insertion
20665 point for renamed split4 pass.
20667 2020-02-09 Jakub Jelinek <jakub@redhat.com>
20669 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
20670 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
20671 copying them around between host and target.
20673 2020-02-08 Andrew Pinski <apinski@marvell.com>
20676 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
20677 STRICT_ALIGNMENT also.
20679 2020-02-08 Jim Wilson <jimw@sifive.com>
20682 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
20684 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
20685 Jakub Jelinek <jakub@redhat.com>
20688 * config/i386/i386.h (CALL_USED_REGISTERS): Make
20689 xmm16-xmm31 call-used even in 64-bit ms-abi.
20691 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
20693 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
20694 (simd_ummla, simd_usmmla): Likewise.
20695 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
20696 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
20697 (vusmmlaq_s32): New.
20699 2020-02-07 Richard Biener <rguenther@suse.de>
20701 PR middle-end/93519
20702 * tree-inline.c (fold_marked_statements): Do a PRE walk,
20703 skipping unreachable regions.
20704 (optimize_inline_calls): Skip folding stmts when we didn't
20707 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
20710 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
20711 Don't return aggregates with only SFmode and DFmode in SSE
20713 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
20715 2020-02-07 Jakub Jelinek <jakub@redhat.com>
20718 * config/rs6000/rs6000-logue.c
20719 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
20720 if it fails, move rs into end_addr and retry. Add
20721 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
20722 the insn pattern doesn't describe well what exactly happens to
20726 * config/i386/predicates.md (avx_identity_operand): Remove.
20727 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
20728 (avx_<castmode><avxsizesuffix>_<castmode>,
20729 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
20730 a VEC_CONCAT of the operand and UNSPEC_CAST.
20731 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
20732 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
20736 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
20737 recog_data.insn if distance_non_agu_define changed it.
20739 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
20742 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
20743 we only had X-FORM (reg+reg) addressing for vectors. Also before
20744 ISA 3.0, we only had X-FORM addressing for scalars in the
20745 traditional Altivec registers.
20747 2020-02-06 <zhongyunde@huawei.com>
20748 Vladimir Makarov <vmakarov@redhat.com>
20750 PR rtl-optimization/93561
20751 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
20752 hard register range.
20754 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
20756 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
20759 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
20761 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
20762 where the low and the high 32 bits are equal to each other specially,
20763 with an rldimi instruction.
20765 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
20767 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
20769 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
20771 * config/arm/arm-tables.opt: Regenerate.
20773 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
20776 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
20777 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
20778 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
20780 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
20782 PR rtl-optimization/87763
20783 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
20785 2020-02-06 Delia Burduv <delia.burduv@arm.com>
20787 * config/aarch64/aarch64-simd-builtins.def
20788 (bfmlaq): New built-in function.
20789 (bfmlalb): New built-in function.
20790 (bfmlalt): New built-in function.
20791 (bfmlalb_lane): New built-in function.
20792 (bfmlalt_lane): New built-in function.
20793 * config/aarch64/aarch64-simd.md
20794 (aarch64_bfmmlaqv4sf): New pattern.
20795 (aarch64_bfmlal<bt>v4sf): New pattern.
20796 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
20797 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
20798 (vbfmlalbq_f32): New intrinsic.
20799 (vbfmlaltq_f32): New intrinsic.
20800 (vbfmlalbq_lane_f32): New intrinsic.
20801 (vbfmlaltq_lane_f32): New intrinsic.
20802 (vbfmlalbq_laneq_f32): New intrinsic.
20803 (vbfmlaltq_laneq_f32): New intrinsic.
20804 * config/aarch64/iterators.md (BF_MLA): New int iterator.
20805 (bt): New int attribute.
20807 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
20809 * config/i386/i386.md (*pushtf): Emit "#" instead of
20810 calling gcc_unreachable in insn output.
20813 (*pushsf_rex64): Ditto for alternatives other than 1.
20814 (*pushsf): Ditto for alternatives other than 1.
20816 2020-02-06 Martin Liska <mliska@suse.cz>
20818 PR gcov-profile/91971
20819 PR gcov-profile/93466
20820 * coverage.c (coverage_init): Revert mangling of
20821 path into filename. It can lead to huge filename length.
20822 Creation of subfolders seem more natural.
20824 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20827 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
20828 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
20829 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
20831 2020-02-06 Jakub Jelinek <jakub@redhat.com>
20834 * config/i386/predicates.md (avx_identity_operand): New predicate.
20835 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
20836 define_insn_and_split.
20839 * omp-low.c (use_pointer_for_field): For nested constructs, also
20840 look for map clauses on target construct.
20841 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
20842 taskreg_nesting_level.
20845 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
20846 shared clause, call omp_notice_variable on outer context if any.
20848 2020-02-05 Jason Merrill <jason@redhat.com>
20851 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
20852 non-zero address even if weak and not yet defined.
20854 2020-02-05 Martin Sebor <msebor@redhat.com>
20856 PR tree-optimization/92765
20857 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
20858 * tree-ssa-strlen.c (compute_string_length): Remove.
20859 (determine_min_objsize): Remove.
20860 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
20861 Avoid using type size as the upper bound on string length.
20862 (handle_builtin_string_cmp): Add an argument. Adjust.
20863 (strlen_check_and_optimize_call): Pass additional argument to
20864 handle_builtin_string_cmp.
20866 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
20868 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
20869 (*pushdi2_rex64 peephole2): Unconditionally split after
20870 epilogue_completed.
20871 (*ashl<mode>3_doubleword): Ditto.
20872 (*<shift_insn><mode>3_doubleword): Ditto.
20874 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
20877 * config/rs6000/rs6000.c (get_vector_offset): Fix
20879 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
20881 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
20883 2020-02-05 David Malcolm <dmalcolm@redhat.com>
20885 * doc/analyzer.texi
20886 (Special Functions for Debugging the Analyzer): Update description
20887 of __analyzer_dump_exploded_nodes.
20889 2020-02-05 Jakub Jelinek <jakub@redhat.com>
20892 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
20893 include sets and not clobbers in the vzeroupper pattern.
20894 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
20895 the parallel has 17 (64-bit) or 9 (32-bit) elts.
20896 (*avx_vzeroupper_1): New define_insn_and_split.
20899 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
20900 don't run when !optimize.
20901 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
20904 2020-02-05 Richard Biener <rguenther@suse.de>
20906 PR middle-end/90648
20907 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
20908 checks before matching calls.
20910 2020-02-05 Jakub Jelinek <jakub@redhat.com>
20912 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
20913 function comment typo.
20915 PR middle-end/93555
20916 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
20917 simd_clone_create failed when i == 0, adjust clone->nargs by
20920 2020-02-05 Martin Liska <mliska@suse.cz>
20923 * doc/invoke.texi: Document that one should
20924 not combine ASLR and -fpch.
20926 2020-02-04 Richard Biener <rguenther@suse.de>
20928 PR tree-optimization/93538
20929 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
20931 2020-02-04 Richard Biener <rguenther@suse.de>
20933 PR tree-optimization/91123
20934 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
20935 (vn_walk_cb_data::last_vuse): New member.
20936 (vn_walk_cb_data::saved_operands): Likewsie.
20937 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
20938 (vn_walk_cb_data::push_partial_def): Use finish.
20939 (vn_reference_lookup_2): Update last_vuse and use finish if
20940 we've saved operands.
20941 (vn_reference_lookup_3): Use finish and update calls to
20942 push_partial_defs everywhere. When translating through
20943 memcpy or aggregate copies save off operands and alias-set.
20944 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
20945 operation for redundant store removal.
20947 2020-02-04 Richard Biener <rguenther@suse.de>
20949 PR tree-optimization/92819
20950 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
20951 generating more stmts than before.
20953 2020-02-04 Martin Liska <mliska@suse.cz>
20955 * config/arm/arm.c (arm_gen_far_branch): Move the function
20956 outside of selftests.
20958 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20960 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
20961 function to adjust PC-relative vector addresses.
20962 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
20963 handle vectors with PC-relative addresses.
20965 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20967 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
20969 (hard_reg_and_mode_to_addr_mask): Delete.
20970 (rs6000_adjust_vec_address): If the original vector address
20971 was REG+REG or REG+OFFSET and the element is not zero, do the add
20972 of the elements in the original address before adding the offset
20973 for the vector element. Use address_to_insn_form to validate the
20974 address using the register being loaded, rather than guessing
20975 whether the address is a DS-FORM or DQ-FORM address.
20977 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20979 * config/rs6000/rs6000.c (get_vector_offset): New helper function
20980 to calculate the offset in memory from the start of a vector of a
20981 particular element. Add code to keep the element number in
20982 bounds if the element number is variable.
20983 (rs6000_adjust_vec_address): Move calculation of offset of the
20984 vector element to get_vector_offset.
20985 (rs6000_split_vec_extract_var): Do not do the initial AND of
20986 element here, move the code to get_vector_offset.
20988 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
20990 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
20993 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
20995 * config/rs6000/constraints.md: Improve documentation.
20997 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
21000 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
21001 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
21003 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
21005 * config.gcc: Remove "carrizo" support.
21006 * config/gcn/gcn-opts.h (processor_type): Likewise.
21007 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
21008 * config/gcn/gcn.opt (gpu_type): Likewise.
21009 * config/gcn/t-omp-device: Likewise.
21011 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21014 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
21015 * config/arm/arm.c (arm_gen_far_branch): New function
21016 arm_gen_far_branch.
21017 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
21019 2020-02-03 Julian Brown <julian@codesourcery.com>
21020 Tobias Burnus <tobias@codesourcery.com>
21022 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
21024 2020-02-03 Jakub Jelinek <jakub@redhat.com>
21027 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
21028 valid RTL to sum up the lowest and second lowest bytes of the popcnt
21031 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
21033 PR rtl-optimization/91333
21034 * ira-color.c (struct allocno_color_data): Add member
21036 (init_allocno_threads): Set the member up.
21037 (bucket_allocno_compare_func): Add compare hard reg
21040 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
21042 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
21044 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
21045 * config.in: Regenerated.
21046 * configure: Regenerated.
21047 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
21048 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
21049 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
21051 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
21053 * configure: Regenerate.
21055 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
21057 PR rtl-optimization/91333
21058 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
21059 reg preferences comparison up.
21061 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
21063 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
21064 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
21065 aarch64-sve-builtins-base.h.
21066 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
21067 aarch64-sve-builtins-base.cc.
21068 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
21069 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21070 (svcvtnt): Declare.
21071 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
21072 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21073 (svcvtnt): New functions.
21074 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
21075 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
21076 (svcvtnt): New functions.
21077 (svcvt): Add a form that converts f32 to bf16.
21078 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
21079 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
21081 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
21082 Treat B as bfloat16_t.
21083 (ternary_bfloat_lane_base): New class.
21084 (ternary_bfloat_def): Likewise.
21085 (ternary_bfloat): New shape.
21086 (ternary_bfloat_lane_def): New class.
21087 (ternary_bfloat_lane): New shape.
21088 (ternary_bfloat_lanex2_def): New class.
21089 (ternary_bfloat_lanex2): New shape.
21090 (ternary_bfloat_opt_n_def): New class.
21091 (ternary_bfloat_opt_n): New shape.
21092 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
21093 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
21094 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
21095 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
21096 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
21097 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
21098 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
21099 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
21100 the pattern off the narrow mode instead of the wider one.
21101 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
21102 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
21103 (sve_fp_op): Handle them.
21104 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
21105 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
21107 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
21109 * config/aarch64/arm_sve.h: Include arm_bf16.h.
21110 * config/aarch64/aarch64-modes.def (BF): Move definition before
21111 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
21112 (SVE_MODES): Handle BF modes.
21113 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
21115 (aarch64_full_sve_mode): Likewise.
21116 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
21118 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
21119 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
21120 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
21121 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
21123 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
21125 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
21126 (TYPES_all_data): Add bf16.
21127 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
21128 (register_tuple_type): Increase buffer size.
21129 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
21130 (bf16): New type suffix.
21131 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
21132 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
21133 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
21134 Change type from all_data to all_arith.
21135 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
21136 (svminp): Likewise.
21138 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
21139 Matthew Malcomson <matthew.malcomson@arm.com>
21140 Richard Sandiford <richard.sandiford@arm.com>
21142 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
21143 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
21144 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
21145 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
21146 __ARM_FEATURE_MATMUL_FP64.
21147 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
21148 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
21149 be disabled at the same time.
21150 (f32mm): New extension.
21151 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
21152 (AARCH64_FL_F64MM): Bump to the next bit up.
21153 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
21154 (TARGET_SVE_F64MM): New macros.
21155 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
21156 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
21157 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
21158 (UNSPEC_ZIP2Q): New unspeccs.
21159 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
21160 (optab, sur, perm_insn): Handle the new unspecs.
21161 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
21162 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
21163 TARGET_SVE_F64MM instead of separate tests.
21164 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
21165 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
21166 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
21167 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
21168 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
21169 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
21170 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
21171 (TYPES_s_signed): New macro.
21172 (TYPES_s_integer): Use it.
21173 (TYPES_d_float): New macro.
21174 (TYPES_d_data): Use it.
21175 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
21176 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
21177 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
21178 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
21179 (svmmla): New shape.
21180 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
21181 template parameters.
21182 (ternary_resize2_lane_base): Likewise.
21183 (ternary_resize2_base): New class.
21184 (ternary_qq_lane_base): Likewise.
21185 (ternary_intq_uintq_lane_def): Likewise.
21186 (ternary_intq_uintq_lane): New shape.
21187 (ternary_intq_uintq_opt_n_def): New class
21188 (ternary_intq_uintq_opt_n): New shape.
21189 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
21190 (ternary_uintq_intq_def): New class.
21191 (ternary_uintq_intq): New shape.
21192 (ternary_uintq_intq_lane_def): New class.
21193 (ternary_uintq_intq_lane): New shape.
21194 (ternary_uintq_intq_opt_n_def): New class.
21195 (ternary_uintq_intq_opt_n): New shape.
21196 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
21197 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
21198 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
21199 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
21201 (svdotprod_lane_impl): ...this new class.
21202 (svmmla_impl, svusdot_impl): New classes.
21203 (svdot_lane): Update to use svdotprod_lane_impl.
21204 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
21205 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
21207 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
21208 function, with no types defined.
21209 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
21210 AARCH64_FL_I8MM functions.
21211 (svmmla): New AARCH64_FL_F32MM function.
21212 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
21213 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
21214 AARCH64_FL_F64MM function.
21215 (REQUIRED_EXTENSIONS):
21217 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
21219 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
21222 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
21224 * config/i386/i386.md (*movoi_internal_avx): Do not check for
21225 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
21226 (*movti_internal): Do not check for
21227 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
21228 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
21229 just after check for TARGET_AVX.
21230 (*movdf_internal): Ditto.
21231 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
21232 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
21233 * config/i386/sse.md (mov<mode>_internal): Only check
21234 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
21235 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
21236 (<sse>_andnot<mode>3<mask_name>): Move check for
21237 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
21238 (<code><mode>3<mask_name>): Ditto.
21239 (*andnot<mode>3): Ditto.
21240 (*andnottf3): Ditto.
21241 (*<code><mode>3): Ditto.
21242 (*<code>tf3): Ditto.
21243 (*andnot<VI:mode>3): Remove
21244 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
21245 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
21246 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
21247 (sse4_1_blendv<ssemodesuffix>): Ditto.
21248 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
21249 Explain that tune applies to 128bit instructions only.
21251 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
21253 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
21254 to definition of hsa_kernel_description. Parse assembly to find SGPR
21255 and VGPR count of kernel and store in hsa_kernel_description.
21257 2020-01-31 Tamar Christina <tamar.christina@arm.com>
21259 PR rtl-optimization/91838
21260 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
21261 to truncate if allowed or reject combination.
21263 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
21265 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
21266 (find_inv_vars_cb): Likewise.
21268 2020-01-31 David Malcolm <dmalcolm@redhat.com>
21270 * calls.c (special_function_p): Split out the check for DECL_NAME
21271 being non-NULL and fndecl being extern at file scope into a
21272 new maybe_special_function_p and call it. Drop check for fndecl
21273 being non-NULL that was after a usage of DECL_NAME (fndecl).
21274 * tree.h (maybe_special_function_p): New inline function.
21276 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
21278 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
21279 (mask_gather_load<mode>): ... here, and zero-initialize the
21281 (maskload<mode>di): Zero-initialize the destination.
21282 * config/gcn/gcn.c:
21284 2020-01-30 David Malcolm <dmalcolm@redhat.com>
21287 * doc/analyzer.texi (Limitations): Note that constraints on
21288 floating-point values are currently ignored.
21290 2020-01-30 Jakub Jelinek <jakub@redhat.com>
21293 * symtab.c (symtab_node::noninterposable_alias): If localalias
21294 already exists, but is not usable, append numbers after it until
21295 a unique name is found. Formatting fix.
21297 PR middle-end/93505
21298 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
21301 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
21303 * config/gcn/gcn.c (print_operand): Handle LTGT.
21304 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
21306 2020-01-30 Richard Biener <rguenther@suse.de>
21308 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
21309 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
21311 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
21313 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
21314 without a DECL in .data.rel.ro.local.
21316 2020-01-30 Jakub Jelinek <jakub@redhat.com>
21319 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
21323 * config/i386/sse.md
21324 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
21325 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
21326 any_extend code iterator instead of always zero_extend.
21327 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
21328 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
21329 Use any_extend code iterator instead of always zero_extend.
21330 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
21331 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
21332 Use any_extend code iterator instead of always zero_extend.
21333 (*sse2_pmovmskb_ext): New define_insn.
21334 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
21337 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
21338 (*popcountsi2_zext_falsedep): New define_insn.
21340 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
21342 * config.in: Regenerated.
21343 * configure: Regenerated.
21345 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
21348 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
21349 LLVM's assembler changed the default in version 9.
21351 2020-01-24 Jeff Law <law@redhat.com>
21353 PR tree-optimization/89689
21354 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
21356 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
21360 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21362 PR rtl-optimization/87763
21363 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
21364 simplification to handle subregs as well as bare regs.
21365 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
21367 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
21370 * ira.c (ira): Revert use of simplified LRA algorithm.
21372 2020-01-29 Martin Jambor <mjambor@suse.cz>
21374 PR tree-optimization/92706
21375 * tree-sra.c (struct access): Fields first_link, last_link,
21376 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
21377 next_rhs_queued and grp_rhs_queued respectively, new fields
21378 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
21379 (struct assign_link): Field next renamed to next_rhs, new field
21380 next_lhs. Updated comment.
21381 (work_queue_head): Renamed to rhs_work_queue_head.
21382 (lhs_work_queue_head): New variable.
21383 (add_link_to_lhs): New function.
21384 (relink_to_new_repr): Also relink LHS lists.
21385 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
21386 (add_access_to_lhs_work_queue): New function.
21387 (pop_access_from_work_queue): Renamed to
21388 pop_access_from_rhs_work_queue.
21389 (pop_access_from_lhs_work_queue): New function.
21390 (build_accesses_from_assign): Also add links to LHS lists and to LHS
21392 (child_would_conflict_in_lacc): Renamed to
21393 child_would_conflict_in_acc. Adjusted parameter names.
21394 (create_artificial_child_access): New parameter set_grp_read, use it.
21395 (subtree_mark_written_and_enqueue): Renamed to
21396 subtree_mark_written_and_rhs_enqueue.
21397 (propagate_subaccesses_across_link): Renamed to
21398 propagate_subaccesses_from_rhs.
21399 (propagate_subaccesses_from_lhs): New function.
21400 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
21403 2020-01-29 Martin Jambor <mjambor@suse.cz>
21405 PR tree-optimization/92706
21406 * tree-sra.c (struct access): Adjust comment of
21407 grp_total_scalarization.
21408 (find_access_in_subtree): Look for single children spanning an entire
21410 (scalarizable_type_p): Allow register accesses, adjust callers.
21411 (completely_scalarize): Remove function.
21412 (scalarize_elem): Likewise.
21413 (create_total_scalarization_access): Likewise.
21414 (sort_and_splice_var_accesses): Do not track total scalarization
21416 (analyze_access_subtree): New parameter totally, adjust to new meaning
21417 of grp_total_scalarization.
21418 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
21419 (can_totally_scalarize_forest_p): New function.
21420 (create_total_scalarization_access): Likewise.
21421 (create_total_access_and_reshape): Likewise.
21422 (total_should_skip_creating_access): Likewise.
21423 (totally_scalarize_subtree): Likewise.
21424 (analyze_all_variable_accesses): Perform total scalarization after
21425 subaccess propagation using the new functions above.
21426 (initialize_constant_pool_replacements): Output initializers by
21427 traversing the access tree.
21429 2020-01-29 Martin Jambor <mjambor@suse.cz>
21431 * tree-sra.c (verify_sra_access_forest): New function.
21432 (verify_all_sra_access_forests): Likewise.
21433 (create_artificial_child_access): Set parent.
21434 (analyze_all_variable_accesses): Call the verifier.
21436 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21438 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
21439 if called on indirect edge.
21440 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
21441 speculative call if needed.
21443 2020-01-29 Richard Biener <rguenther@suse.de>
21445 PR tree-optimization/93428
21446 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
21447 permutation when the load node is created.
21448 (vect_analyze_slp_instance): Re-use it here.
21450 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21452 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
21454 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
21456 PR rtl-optimization/93272
21457 * ira-lives.c (process_out_of_region_eh_regs): New function.
21458 (process_bb_node_lives): Call it.
21460 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21462 * coverage.c (read_counts_file): Make error message lowercase.
21464 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21466 * profile-count.c (profile_quality_display_names): Fix ordering.
21468 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
21471 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
21472 hash only when edge is first within the sequence.
21473 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
21474 (symbol_table::create_edge): Do not set target_prob.
21475 (cgraph_edge::remove_caller): Watch for speculative calls when updating
21476 the call site hash.
21477 (cgraph_edge::make_speculative): Drop target_prob parameter.
21478 (cgraph_edge::speculative_call_info): Remove.
21479 (cgraph_edge::first_speculative_call_target): New member function.
21480 (update_call_stmt_hash_for_removing_direct_edge): New function.
21481 (cgraph_edge::resolve_speculation): Rewrite to new API.
21482 (cgraph_edge::speculative_call_for_target): New member function.
21483 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
21484 multiple speculation targets.
21485 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
21487 (verify_speculative_call): Verify that targets form an interval.
21488 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
21489 (cgraph_edge::first_speculative_call_target): New member function.
21490 (cgraph_edge::next_speculative_call_target): New member function.
21491 (cgraph_edge::speculative_call_target_ref): New member function.
21492 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
21493 (cgraph_edge): Remove target_prob.
21494 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
21495 Fix handling of speculative calls.
21496 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
21497 * ipa-fnsummary.c (analyze_function_body): Likewise.
21498 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
21499 * ipa-profile.c (dump_histogram): Fix formating.
21500 (ipa_profile_generate_summary): Watch for overflows.
21501 (ipa_profile): Do not require probablity to be 1/2; update to new API.
21502 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
21503 (update_indirect_edges_after_inlining): Update to new API.
21504 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
21506 * profile-count.h: (profile_probability::adjusted): New.
21507 * tree-inline.c (copy_bb): Update to new speculative call API; fix
21508 updating of profile.
21509 * value-prof.c (gimple_ic_transform): Rename to ...
21510 (dump_ic_profile): ... this one; update dumping.
21511 (stream_in_histogram_value): Fix formating.
21512 (gimple_value_profile_transformations): Update.
21514 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
21517 * config/i386/i386.md (*movoi_internal_avx): Remove
21518 TARGET_SSE_TYPELESS_STORES check.
21519 (*movti_internal): Prefer TARGET_AVX over
21520 TARGET_SSE_TYPELESS_STORES.
21521 (*movtf_internal): Likewise.
21522 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
21523 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
21524 from TARGET_SSE_TYPELESS_STORES.
21526 2020-01-28 David Malcolm <dmalcolm@redhat.com>
21528 * diagnostic-core.h (warning_at): Rename overload to...
21529 (warning_meta): ...this.
21530 (emit_diagnostic_valist): Delete decl of overload taking
21531 diagnostic_metadata.
21532 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
21533 (warning_at): Rename overload taking diagnostic_metadata to...
21534 (warning_meta): ...this.
21536 2020-01-28 Richard Biener <rguenther@suse.de>
21538 PR tree-optimization/93439
21539 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
21540 * tree-cfg.c (move_sese_region_to_fn): ... here.
21541 (verify_types_in_gimple_reference): Verify used cliques are
21544 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
21547 * config/i386/i386-options.c (set_ix86_tune_features): Add an
21548 argument of a pointer to struct gcc_options and pass it to
21549 parse_mtune_ctrl_str.
21550 (ix86_function_specific_restore): Pass opts to
21551 set_ix86_tune_features.
21552 (ix86_option_override_internal): Likewise.
21553 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
21554 gcc_options and use it for x_ix86_tune_ctrl_string.
21556 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21558 PR rtl-optimization/87763
21559 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
21560 simplification to handle subregs as well as bare regs.
21561 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
21563 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21565 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
21566 for reduction chains that (now) include a call.
21568 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21570 PR tree-optimization/92822
21571 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
21572 out the don't-care elements of a vector whose significant elements
21573 are duplicates, make the don't-care elements duplicates too.
21575 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
21577 PR tree-optimization/93434
21578 * tree-predcom.c (split_data_refs_to_components): Record which
21579 components have had aliasing loads removed. Prevent store-store
21580 commoning for all such components.
21582 2020-01-28 Jakub Jelinek <jakub@redhat.com>
21585 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
21586 -1 or is_vshift is true, use new_vector with number of elts npatterns
21587 rather than new_unary_operation.
21589 PR tree-optimization/93454
21590 * gimple-fold.c (fold_array_ctor_reference): Perform
21591 elt_size.to_uhwi () just once, instead of calling it in every
21592 iteration. Punt if that value is above size of the temporary
21593 buffer. Decrease third native_encode_expr argument when
21594 bufoff + elt_sz is above size of buf.
21596 2020-01-27 Joseph Myers <joseph@codesourcery.com>
21598 * config/mips/mips.c (mips_declare_object_name)
21599 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
21601 2020-01-27 Martin Liska <mliska@suse.cz>
21603 PR gcov-profile/93403
21604 * tree-profile.c (gimple_init_gcov_profiler): Generate
21605 both __gcov_indirect_call_profiler_v4 and
21606 __gcov_indirect_call_profiler_v4_atomic.
21608 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21611 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
21613 (@aarch64_split_simd_mov<mode>): Use it.
21614 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
21615 Leave the vec_extract patterns to handle 2-element vectors.
21616 (aarch64_simd_mov_from_<mode>high): Likewise.
21617 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
21618 (vec_extractv2dfv1df): Likewise.
21620 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21622 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
21623 jump conditions for *compare_condjump<GPI:mode>.
21625 2020-01-27 David Malcolm <dmalcolm@redhat.com>
21628 * digraph.cc (test_edge::test_edge): Specify template for base
21631 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
21633 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
21635 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
21637 * config/arc/arc-protos.h (gen_mlo): Remove.
21638 (gen_mhi): Likewise.
21639 * config/arc/arc.c (AUX_MULHI): Define.
21640 (arc_must_save_reister): Special handling for r58/59.
21641 (arc_compute_frame_size): Consider mlo/mhi registers.
21642 (arc_save_callee_saves): Emit fp/sp move only when emit_move
21644 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
21645 mlo/mhi name selection.
21646 (arc_restore_callee_saves): Don't early restore blink when ISR.
21647 (arc_expand_prologue): Add mlo/mhi saving.
21648 (arc_expand_epilogue): Add mlo/mhi restoring.
21651 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
21652 numbering when MUL64 option is used.
21653 (DWARF2_FRAME_REG_OUT): Define.
21654 * config/arc/arc.md (arc600_stall): New pattern.
21655 (VUNSPEC_ARC_ARC600_STALL): Define.
21656 (mulsi64): Use correct mlo/mhi registers.
21657 (mulsi_600): Clean it up.
21658 * config/arc/predicates.md (mlo_operand): Remove any dependency on
21660 (mhi_operand): Likewise.
21662 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
21663 Petro Karashchenko <petro.karashchenko@ring.com>
21665 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
21666 attributes if needed.
21667 (prepare_move_operands): Generate special unspec instruction for
21669 (arc_isuncached_mem_p): Propagate uncached attribute to each
21671 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
21672 (VUNSPEC_ARC_STDI): Likewise.
21673 (ALLI): New mode iterator.
21674 (mALLI): New mode attribute.
21675 (lddi): New instruction pattern.
21677 (stdidi_split): Split instruction for architectures which are not
21678 supporting ll64 option.
21679 (lddidi_split): Likewise.
21681 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21683 PR rtl-optimization/92989
21684 * lra-lives.c (process_bb_lives): Update the live-in set before
21685 processing additional clobbers.
21687 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21689 PR rtl-optimization/93170
21690 * cselib.c (cselib_invalidate_regno_val): New function, split out
21692 (cselib_invalidate_regno): ...here.
21693 (cselib_invalidated_by_call_p): New function.
21694 (cselib_process_insn): Iterate over all the hard-register entries in
21695 REG_VALUES and invalidate any that cross call-clobbered registers.
21697 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
21699 * dojump.c (split_comparison): Use HONOR_NANS rather than
21700 HONOR_SNANS when splitting LTGT.
21702 2020-01-27 Martin Liska <mliska@suse.cz>
21705 * opts.c (print_filtered_help): Exclude language-specific
21706 options from --help=common unless enabled in all FEs.
21708 2020-01-27 Martin Liska <mliska@suse.cz>
21710 * opts.c (print_help): Exclude params from
21711 all except --help=param.
21713 2020-01-27 Martin Liska <mliska@suse.cz>
21716 * config/i386/i386-features.c (make_resolver_func):
21717 Align the code with ppc64 target implementation.
21718 Do not generate a unique name for resolver function.
21720 2020-01-27 Richard Biener <rguenther@suse.de>
21722 PR tree-optimization/93397
21723 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
21724 converted reduction chain SLP graph adjustment.
21726 2020-01-26 Marek Polacek <polacek@redhat.com>
21729 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
21732 2020-01-26 Jason Merrill <jason@redhat.com>
21735 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
21738 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
21740 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
21741 (rx_setmem): Likewise.
21743 2020-01-26 Jakub Jelinek <jakub@redhat.com>
21746 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
21747 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
21748 drop <di> from constraint of last operand.
21751 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
21752 TARGET_AVX2 and V4DFmode not in the split condition, but in the
21753 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
21755 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
21758 * ipa-cp.c (get_info_about_necessary_edges): Remove value
21761 2020-01-24 Jeff Law <law@redhat.com>
21763 PR tree-optimization/92788
21764 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
21767 2020-01-24 Jakub Jelinek <jakub@redhat.com>
21770 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
21771 *avx_vperm_broadcast_<mode>,
21772 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
21773 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
21774 Move before avx2_perm<mode>/avx512f_perm<mode>.
21777 * simplify-rtx.c (simplify_const_unary_operation,
21778 simplify_const_binary_operation): Punt for mode precision above
21779 MAX_BITSIZE_MODE_ANY_INT.
21781 2020-01-24 Andrew Pinski <apinski@marvell.com>
21783 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
21784 alu.shift_reg to 0.
21786 2020-01-24 Jeff Law <law@redhat.com>
21789 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
21790 for REGs. Call output_operand_lossage to get more reasonable
21793 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
21795 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
21796 gcn_fp_compare_operator.
21797 (vec_cmpu<mode>di): Use gcn_compare_operator.
21798 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
21799 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
21800 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
21801 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
21802 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
21803 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
21804 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
21805 gcn_fp_compare_operator.
21806 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
21807 gcn_fp_compare_operator.
21808 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
21809 gcn_fp_compare_operator.
21810 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
21811 gcn_fp_compare_operator.
21813 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
21815 * doc/install.texi (Cross-Compiler-Specific Options): Document
21816 `--with-toolexeclibdir' option.
21818 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
21820 * target.def (flags_regnum): Also mention effect on delay slot filling.
21821 * doc/tm.texi: Regenerate.
21823 2020-01-23 Jeff Law <law@redhat.com>
21825 PR translation/90162
21826 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
21828 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
21831 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
21834 2020-01-23 Jakub Jelinek <jakub@redhat.com>
21836 PR rtl-optimization/93402
21837 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
21840 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
21842 * config.in: Regenerated.
21843 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
21844 for TARGET_LIBC_GNUSTACK.
21845 * configure: Regenerated.
21846 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
21847 found to be 2.31 or greater.
21849 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
21851 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
21853 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
21854 (mips_asm_file_end): New function. Delegate to
21855 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
21856 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
21858 2020-01-23 Jakub Jelinek <jakub@redhat.com>
21861 * config/i386/i386-modes.def (POImode): New mode.
21862 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
21863 * config/i386/i386.md (DPWI): New mode attribute.
21864 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
21865 (QWI): Rename to...
21866 (QPWI): ... this. Use POI instead of OI for TImode.
21867 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
21868 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
21871 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
21874 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
21876 (speculation_tracker_rev): New pattern.
21877 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
21878 Use speculation_tracker_rev to track the inverse condition.
21880 2020-01-23 Richard Biener <rguenther@suse.de>
21882 PR tree-optimization/93381
21883 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
21884 alias-set of the def as argument and record the first one.
21885 (vn_walk_cb_data::first_set): New member.
21886 (vn_reference_lookup_3): Pass the alias-set of the current def
21887 to push_partial_def. Fix alias-set used in the aggregate copy
21889 (vn_reference_lookup): Consistently set *last_vuse_ptr.
21890 * real.c (clear_significand_below): Fix out-of-bound access.
21892 2020-01-23 Jakub Jelinek <jakub@redhat.com>
21895 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
21896 New define_insn patterns.
21898 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
21900 * doc/sourcebuild.texi (check-function-bodies): Add an
21901 optional target/xfail selector.
21903 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
21905 PR rtl-optimization/93124
21906 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
21907 bare USE and CLOBBER insns.
21909 2020-01-22 Andrew Pinski <apinski@marvell.com>
21911 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
21913 2020-01-22 David Malcolm <dmalcolm@redhat.com>
21916 * gdbinit.in (break-on-saved-diagnostic): Update for move of
21917 diagnostic_manager into "ana" namespace.
21918 * selftest-run-tests.c (selftest::run_tests): Update for move of
21919 selftest::run_analyzer_selftests to
21920 ana::selftest::run_analyzer_selftests.
21922 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
21924 * cfgexpand.c (union_stack_vars): Update the size.
21926 2020-01-22 Richard Biener <rguenther@suse.de>
21928 PR tree-optimization/93381
21929 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
21930 throughout, handle all conversions the same.
21932 2020-01-22 Jakub Jelinek <jakub@redhat.com>
21935 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
21936 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
21937 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
21938 Call force_reg on high_in2 unconditionally.
21940 2020-01-22 Martin Liska <mliska@suse.cz>
21942 PR tree-optimization/92924
21943 * profile.c (compute_value_histograms): Divide
21944 all counter values.
21946 2020-01-22 Jakub Jelinek <jakub@redhat.com>
21949 * output.h (assemble_name_resolve): Declare.
21950 * varasm.c (assemble_name_resolve): New function.
21951 (assemble_name): Use it.
21952 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
21954 2020-01-22 Joseph Myers <joseph@codesourcery.com>
21956 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
21957 update_web_docs_git instead of update_web_docs_svn.
21959 2020-01-21 Andrew Pinski <apinski@marvell.com>
21962 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
21963 as PTR mode. Have operand 1 as being modeless, it can be P mode.
21964 (*tlsgd_small_<mode>): Likewise.
21965 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
21966 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
21967 register. Convert that register back to dest using convert_mode.
21969 2020-01-21 Jim Wilson <jimw@sifive.com>
21971 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
21974 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
21975 Uros Bizjak <ubizjak@gmail.com>
21978 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
21980 (legitimize_tls_address): Do GNU2 TLS address computation in
21981 ptr_mode and zero-extend result to Pmode.
21982 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
21983 :P with :PTR and Pmode with ptr_mode.
21984 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
21985 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
21986 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
21988 2020-01-21 Jakub Jelinek <jakub@redhat.com>
21991 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
21992 the last two operands are CONST_INT_P before using them as such.
21994 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
21996 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
21997 to get the integer element types.
21999 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
22001 * config/aarch64/aarch64-sve-builtins.h
22002 (function_expander::convert_to_pmode): Declare.
22003 * config/aarch64/aarch64-sve-builtins.cc
22004 (function_expander::convert_to_pmode): New function.
22005 (function_expander::get_contiguous_base): Use it.
22006 (function_expander::prepare_gather_address_operands): Likewise.
22007 * config/aarch64/aarch64-sve-builtins-sve2.cc
22008 (svwhilerw_svwhilewr_impl::expand): Likewise.
22010 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
22013 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
22014 cfun->machine->label_is_assembled.
22015 (aarch64_print_patchable_function_entry): New.
22016 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
22017 * config/aarch64/aarch64.h (struct machine_function): New field,
22018 label_is_assembled.
22020 2020-01-21 David Malcolm <dmalcolm@redhat.com>
22023 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
22026 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
22029 * cgraph.c (cgraph_edge::resolve_speculation,
22030 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
22031 call_stmt_site_hash.
22033 2020-01-21 Martin Liska <mliska@suse.cz>
22035 * config/rs6000/rs6000.c (common_mode_defined): Remove
22038 2020-01-21 Richard Biener <rguenther@suse.de>
22040 PR tree-optimization/92328
22041 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
22042 type when value-numbering same-sized store by inserting a
22044 (eliminate_dom_walker::eliminate_stmt): When eliminating
22045 a redundant store handle bit-reinterpretation of the same value.
22047 2020-01-21 Andrew Pinski <apinski@marvel.com>
22050 * tree-into-ssa.c (prepare_block_for_update_1): Split out
22052 (prepare_block_for_update): This. Use a worklist instead of
22055 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22057 * config/arm/arm.c (clear_operation_p):
22058 Initialise last_regno, skip first iteration
22059 based on the first_set value and use ints instead
22060 of the unnecessary HOST_WIDE_INTs.
22062 2020-01-21 Jakub Jelinek <jakub@redhat.com>
22065 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
22066 compare_mode other than SFmode or DFmode.
22068 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
22071 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
22072 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
22073 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
22075 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
22077 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
22079 2020-01-20 Andrew Pinski <apinski@marvell.com>
22081 PR middle-end/93242
22082 * targhooks.c (default_print_patchable_function_entry): Use
22083 output_asm_insn to emit the nop instruction.
22085 2020-01-20 Fangrui Song <maskray@google.com>
22087 PR middle-end/93194
22088 * targhooks.c (default_print_patchable_function_entry): Align to
22091 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
22094 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
22095 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
22096 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
22097 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
22098 (*tls_dynamic_gnu2_lea_64): Renamed to ...
22099 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
22100 Remove the {q} suffix from lea.
22101 (*tls_dynamic_gnu2_call_64): Renamed to ...
22102 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
22103 (*tls_dynamic_gnu2_combine_64): Renamed to ...
22104 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
22105 Pass Pmode to gen_tls_dynamic_gnu2_64.
22107 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
22109 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
22111 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
22113 * config/aarch64/aarch64-sve-builtins-base.cc
22114 (svld1ro_impl::memory_vector_mode): Remove parameter name.
22116 2020-01-20 Richard Biener <rguenther@suse.de>
22119 * dwarf2out.c (prune_unused_types): Unconditionally mark
22120 called function DIEs.
22122 2020-01-20 Martin Liska <mliska@suse.cz>
22124 PR tree-optimization/93199
22125 * tree-eh.c (struct leh_state): Add
22126 new field outer_non_cleanup.
22127 (cleanup_is_dead_in): Pass leh_state instead
22128 of eh_region. Add a checking that state->outer_non_cleanup
22129 points to outer non-clean up region.
22130 (lower_try_finally): Record outer_non_cleanup
22132 (lower_catch): Likewise.
22133 (lower_eh_filter): Likewise.
22134 (lower_eh_must_not_throw): Likewise.
22135 (lower_cleanup): Likewise.
22137 2020-01-20 Richard Biener <rguenther@suse.de>
22139 PR tree-optimization/93094
22140 * tree-vectorizer.h (vect_loop_versioning): Adjust.
22141 (vect_transform_loop): Likewise.
22142 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
22143 loop_vectorized_call to vect_transform_loop.
22144 * tree-vect-loop.c (vect_transform_loop): Pass down
22145 loop_vectorized_call to vect_loop_versioning.
22146 * tree-vect-loop-manip.c (vect_loop_versioning): Use
22147 the earlier discovered loop_vectorized_call.
22149 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
22151 * doc/contribute.texi: Update for SVN -> Git transition.
22152 * doc/install.texi: Likewise.
22154 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
22157 * cgraph.c (cgraph_edge::make_speculative): Increase number of
22158 speculative targets.
22159 (verify_speculative_call): New function
22160 (cgraph_node::verify_node): Use it.
22161 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
22164 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
22167 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
22168 (cgraph_edge::make_direct): Remove all indirect targets.
22169 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
22170 (cgraph_node::verify_node): Verify that only one call_stmt or
22171 lto_stmt_uid is set.
22172 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
22174 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
22175 (lto_output_ref): Simplify streaming of stmt.
22176 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
22178 2020-01-18 Tamar Christina <tamar.christina@arm.com>
22180 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
22181 Mark parameter unused.
22183 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
22185 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
22187 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
22189 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
22191 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
22193 * Makefile.in: Add coroutine-passes.o.
22194 * builtin-types.def (BT_CONST_SIZE): New.
22195 (BT_FN_BOOL_PTR): New.
22196 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
22197 * builtins.def (DEF_COROUTINE_BUILTIN): New.
22198 * coroutine-builtins.def: New file.
22199 * coroutine-passes.cc: New file.
22200 * function.h (struct GTY function): Add a bit to indicate that the
22201 function is a coroutine component.
22202 * internal-fn.c (expand_CO_FRAME): New.
22203 (expand_CO_YIELD): New.
22204 (expand_CO_SUSPN): New.
22205 (expand_CO_ACTOR): New.
22206 * internal-fn.def (CO_ACTOR): New.
22210 * passes.def: Add pass_coroutine_lower_builtins,
22211 pass_coroutine_early_expand_ifns.
22212 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
22213 (make_pass_coroutine_early_expand_ifns): New.
22214 * doc/invoke.texi: Document the fcoroutines command line
22217 2020-01-18 Jakub Jelinek <jakub@redhat.com>
22219 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
22222 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
22223 after checking the argument is a REG. Don't use REGNO (reg)
22224 again to set last_regno, reuse regno variable instead.
22226 2020-01-17 David Malcolm <dmalcolm@redhat.com>
22228 * doc/analyzer.texi (Limitations): Add note about NaN.
22230 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22231 Sudakshina Das <sudi.das@arm.com>
22233 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
22234 and valid immediate.
22235 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
22236 (lshrdi3): Generate thumb2_lsrl for valid immediates.
22237 * config/arm/constraints.md (Pg): New.
22238 * config/arm/predicates.md (long_shift_imm): New.
22239 (arm_reg_or_long_shift_imm): Likewise.
22240 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
22241 (thumb2_lsll): Likewise.
22242 (thumb2_lsrl): New.
22244 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22245 Sudakshina Das <sudi.das@arm.com>
22247 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
22248 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
22249 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
22250 register pairs for doubleword quantities for ARMv8.1M-Mainline.
22251 * config/arm/thumb2.md (thumb2_asrl): New.
22252 (thumb2_lsll): Likewise.
22254 2020-01-17 Jakub Jelinek <jakub@redhat.com>
22256 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
22259 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
22261 * gdbinit.in (help-gcc-hooks): New command.
22262 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
22263 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
22266 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
22268 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
22269 correct target macro.
22271 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
22273 * config/aarch64/aarch64-protos.h
22274 (aarch64_sve_ld1ro_operand_p): New.
22275 * config/aarch64/aarch64-sve-builtins-base.cc
22276 (class load_replicate): New.
22277 (class svld1ro_impl): New.
22278 (class svld1rq_impl): Change to inherit from load_replicate.
22279 (svld1ro): New sve intrinsic function base.
22280 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
22281 New DEF_SVE_FUNCTION.
22282 * config/aarch64/aarch64-sve-builtins-base.h
22283 (svld1ro): New decl.
22284 * config/aarch64/aarch64-sve-builtins.cc
22285 (function_expander::add_mem_operand): Modify assert to allow
22287 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
22289 * config/aarch64/aarch64.c
22290 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
22291 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
22292 (aarch64_sve_ld1ro_operand_p): New.
22293 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
22294 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
22295 * config/aarch64/predicates.md
22296 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
22298 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
22300 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
22301 Introduce this ACLE specified predefined macro.
22302 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
22303 (fp): Disabling this disables f64mm.
22304 (simd): Disabling this disables f64mm.
22305 (fp16): Disabling this disables f64mm.
22306 (sve): Disabling this disables f64mm.
22307 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
22308 (AARCH64_ISA_F64MM): New.
22309 (TARGET_F64MM): New.
22310 * doc/invoke.texi (f64mm): Document new option.
22312 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
22314 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
22315 (neoversen1_tunings): Likewise.
22317 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
22320 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
22321 Add assert to ensure prolog has been emitted.
22322 (aarch64_split_atomic_op): Likewise.
22323 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
22324 Use epilogue_completed rather than reload_completed.
22325 (aarch64_atomic_exchange<mode>): Likewise.
22326 (aarch64_atomic_<atomic_optab><mode>): Likewise.
22327 (atomic_nand<mode>): Likewise.
22328 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
22329 (atomic_fetch_nand<mode>): Likewise.
22330 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
22331 (atomic_nand_fetch<mode>): Likewise.
22333 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
22336 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
22338 (REVERSE_CONDITION): Delete.
22339 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
22340 (CCFP_CCFPE): Likewise.
22341 (e): New mode attribute.
22342 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
22343 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
22344 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
22345 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
22346 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
22347 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
22348 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
22349 name of generator from gen_ccmpdi to gen_ccmpccdi.
22350 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
22351 the previous comparison but aren't able to, use the new ccmp_rev
22354 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
22356 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
22357 than testing directly for INTEGER_CST.
22358 (gimplify_target_expr, gimplify_omp_depend): Likewise.
22360 2020-01-17 Jakub Jelinek <jakub@redhat.com>
22362 PR tree-optimization/93292
22363 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
22364 get_vectype_for_scalar_type returns NULL.
22366 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
22368 * params.opt (-param=max-predicted-iterations): Increase range from 0.
22369 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
22371 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
22373 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
22375 * params.opt: (max-predicted-iterations): Set bounds.
22376 * predict.c (real_almost_one, real_br_prob_base,
22377 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
22378 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
22379 probabilities; do not truncate to reg_br_prob_bases.
22380 (estimate_loops_at_level): Pass max_cyclic_prob.
22381 (estimate_loops): Compute max_cyclic_prob.
22382 (estimate_bb_frequencies): Do not initialize real_*; update calculation
22384 * profile-count.c (profile_probability::to_sreal): New.
22385 * profile-count.h (class sreal): Move up in file.
22386 (profile_probability::to_sreal): Declare.
22388 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22391 (arm_invalid_conversion): New function for target hook.
22392 (arm_invalid_unary_op): New function for target hook.
22393 (arm_invalid_binary_op): New function for target hook.
22395 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22397 * config.gcc: Add arm_bf16.h.
22398 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
22399 (arm_simd_builtin_std_type): Add BFmode.
22400 (arm_init_simd_builtin_types): Define element types for vector types.
22401 (arm_init_bf16_types): New function.
22402 (arm_init_builtins): Add arm_init_bf16_types function call.
22403 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
22404 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
22405 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
22406 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
22407 (arm_vector_mode_supported_p): Add V4BF, V8BF.
22408 (arm_mangle_type): Add __bf16.
22409 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
22410 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
22411 arm_bf16_ptr_type_node.
22412 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
22413 define_split between ARM registers.
22414 * config/arm/arm_bf16.h: New file.
22415 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
22416 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
22417 (VQXMOV): Add V8BF.
22418 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
22419 * config/arm/vfp.md: Add BFmode to movhf patterns.
22421 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
22422 Andre Vieira <andre.simoesdiasvieira@arm.com>
22424 * config/arm/arm-cpus.in (mve, mve_float): New features.
22425 (dsp, mve, mve.fp): New options.
22426 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
22427 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
22428 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
22430 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22431 Thomas Preud'homme <thomas.preudhomme@arm.com>
22433 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
22435 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
22436 error for using -mcmse when targeting Armv8.1-M Mainline.
22438 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22439 Thomas Preud'homme <thomas.preudhomme@arm.com>
22441 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
22442 address in r4 when targeting Armv8.1-M Mainline.
22443 (nonsecure_call_value_internal): Likewise.
22444 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
22445 a register match_operand again. Emit BLXNS when targeting
22446 Armv8.1-M Mainline.
22447 (nonsecure_call_value_reg_thumb2): Likewise.
22449 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22450 Thomas Preud'homme <thomas.preudhomme@arm.com>
22452 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
22453 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
22454 variable as true when floating-point ABI is not hard. Replace
22455 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
22456 Generate VLSTM and VLLDM instruction respectively before and
22457 after a function call to cmse_nonsecure_call function.
22458 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
22459 (VUNSPEC_VLLDM): Likewise.
22460 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
22461 (lazy_load_multiple_insn): Likewise.
22463 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22464 Thomas Preud'homme <thomas.preudhomme@arm.com>
22466 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
22467 (arm_emit_vfp_multi_reg_pop): Likewise.
22468 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
22469 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
22470 restore callee-saved VFP registers.
22472 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22473 Thomas Preud'homme <thomas.preudhomme@arm.com>
22475 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
22476 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
22477 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
22478 callee-saved GPRs as well as clear ip register before doing a nonsecure
22479 call then restore callee-saved GPRs after it when targeting
22480 Armv8.1-M Mainline.
22481 (arm_reorg): Adapt to function rename.
22483 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22484 Thomas Preud'homme <thomas.preudhomme@arm.com>
22486 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
22487 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
22488 clear_vfp_multiple pattern based on a new vfp parameter.
22489 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
22490 targeting Armv8.1-M Mainline.
22491 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
22492 unconditionally when targeting Armv8.1-M Mainline architecture. Check
22493 whether VFP registers are available before looking call_used_regs for a
22495 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
22496 of prototype of clear_operation_p.
22497 (clear_vfp_multiple_operation): New predicate.
22498 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
22499 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
22501 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22502 Thomas Preud'homme <thomas.preudhomme@arm.com>
22504 * config/arm/arm-protos.h (clear_operation_p): Declare.
22505 * config/arm/arm.c (clear_operation_p): New function.
22506 (cmse_clear_registers): Generate clear_multiple instruction pattern if
22507 targeting Armv8.1-M Mainline or successor.
22508 (output_return_instruction): Only output APSR register clearing if
22509 Armv8.1-M Mainline instructions not available.
22510 (thumb_exit): Likewise.
22511 * config/arm/predicates.md (clear_multiple_operation): New predicate.
22512 * config/arm/thumb2.md (clear_apsr): New define_insn.
22513 (clear_multiple): Likewise.
22514 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
22516 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22517 Thomas Preud'homme <thomas.preudhomme@arm.com>
22519 * config/arm/arm.c (fp_sysreg_names): Declare and define.
22520 (use_return_insn): Also return false for Armv8.1-M Mainline.
22521 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
22522 Mainline instructions are available.
22523 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
22524 when targeting Armv8.1-M Mainline Security Extensions.
22525 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
22526 Mainline entry function.
22527 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
22528 targeting Armv8.1-M Mainline or successor.
22529 (arm_expand_epilogue): Fix indentation of caller-saved register
22530 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
22532 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
22533 (FP_SYSREGS): Likewise.
22534 (enum vfp_sysregs_encoding): Define enum.
22535 (fp_sysreg_names): Declare.
22536 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
22537 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
22538 (pop_fpsysreg_insn): Likewise.
22540 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
22541 Thomas Preud'homme <thomas.preudhomme@arm.com>
22543 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
22544 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
22545 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
22546 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
22547 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
22548 (ARMv8_1m_main): New feature group.
22549 (armv8.1-m.main): New architecture.
22550 * config/arm/arm-tables.opt: Regenerate.
22551 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
22552 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
22553 (arm_options_perform_arch_sanity_checks): Error out when targeting
22554 Armv8.1-M Mainline Security Extensions.
22555 * config/arm/arm.h (arm_arch8_1m_main): Declare.
22557 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22559 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
22560 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
22561 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
22562 aarch64_bfdot_laneq): New.
22563 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
22564 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
22565 vbfdotq_laneq_f32): New.
22566 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
22567 VBFMLA_W, VBF): New.
22568 (isquadop): Add V4BF, V8BF.
22570 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22572 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
22573 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
22574 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
22575 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
22576 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
22577 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
22578 usdot_laneq, sudot_lane,sudot_laneq): New.
22579 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
22580 (aarch64_<sur>dot_lane): New.
22581 * config/aarch64/arm_neon.h (vusdot_s32): New.
22582 (vusdotq_s32): New.
22583 (vusdot_lane_s32): New.
22584 (vsudot_lane_s32): New.
22585 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
22586 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
22588 2020-01-16 Martin Liska <mliska@suse.cz>
22590 * value-prof.c (dump_histogram_value): Fix
22591 obvious spacing issue.
22593 2020-01-16 Andrew Pinski <apinski@marvell.com>
22595 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
22596 !storage_order_barrier_p.
22598 2020-01-16 Andrew Pinski <apinski@marvell.com>
22600 * sched-int.h (_dep): Add unused bit-field field for the padding.
22601 * sched-deps.c (init_dep_1): Init unused field.
22603 2020-01-16 Andrew Pinski <apinski@marvell.com>
22605 * optabs.h (create_expand_operand): Initialize target field also.
22607 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
22609 PR tree-optimization/92429
22610 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
22611 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
22613 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
22616 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
22618 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
22619 aarch64_sve_int_mode to each mode.
22621 2020-01-15 David Malcolm <dmalcolm@redhat.com>
22623 * doc/analyzer.texi (Overview): Add note about
22624 -fdump-ipa-analyzer.
22626 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
22628 PR tree-optimization/93231
22629 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
22630 input_type is unsigned. Use tree_to_shwi for shift constant.
22631 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
22632 (simplify_count_trailing_zeroes): Add test to handle known non-zero
22633 inputs more efficiently.
22635 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
22637 * config/i386/i386.md (*movsf_internal): Do not require
22638 SSE2 ISA for alternatives 14 and 15.
22640 2020-01-15 Richard Biener <rguenther@suse.de>
22642 PR middle-end/93273
22643 * tree-eh.c (sink_clobbers): If we already visited the destination
22644 block do not defer insertion.
22645 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
22646 the purpose of defered insertion.
22648 2020-01-15 Jakub Jelinek <jakub@redhat.com>
22650 * BASE-VER: Bump to 10.0.1.
22652 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
22654 PR tree-optimization/93247
22655 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
22656 type of the stmt that we're going to vectorize.
22658 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
22660 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
22661 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
22664 2020-01-15 Martin Liska <mliska@suse.cz>
22666 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
22667 2 calls of streamer_read_hwi in a function call.
22669 2020-01-15 Richard Biener <rguenther@suse.de>
22671 * alias.c (record_alias_subset): Avoid redundant work when
22672 subset is already recorded.
22674 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22676 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
22677 the analyzer options provide CWE identifiers.
22679 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22681 * tree-diagnostic-path.cc (path_summary::event_range::print):
22682 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
22683 using get_pure_location.
22685 2020-01-15 Jakub Jelinek <jakub@redhat.com>
22687 PR tree-optimization/93262
22688 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
22689 perform head trimming only if the last argument is constant,
22690 either all ones, or larger or equal to head trim, in the latter
22691 case decrease the last argument by head_trim.
22693 PR tree-optimization/93249
22694 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
22695 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
22696 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
22697 perform head trim unless we can prove there are no '\0' chars
22698 from the source among the first head_trim chars.
22700 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22702 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
22704 2020-01-15 Jakub Jelinek <jakub@redhat.com>
22707 * config/i386/sse.md
22708 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
22709 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
22710 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
22711 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
22712 just a single alternative instead of two, make operands 1 and 2
22715 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
22718 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
22721 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22723 * Makefile.in (lang_opt_files): Add analyzer.opt.
22724 (ANALYZER_OBJS): New.
22725 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
22726 tristate.o and ANALYZER_OBJS.
22727 (TEXI_GCCINT_FILES): Add analyzer.texi.
22728 * common.opt (-fanalyzer): New driver option.
22729 * config.in: Regenerate.
22730 * configure: Regenerate.
22731 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
22732 (gccdepdir): Also create depdir for "analyzer" subdir.
22733 * digraph.cc: New file.
22734 * digraph.h: New file.
22735 * doc/analyzer.texi: New file.
22736 * doc/gccint.texi ("Static Analyzer") New menu item.
22737 (analyzer.texi): Include it.
22738 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
22739 ("Warning Options"): Add static analysis warnings to the list.
22740 (-Wno-analyzer-double-fclose): New option.
22741 (-Wno-analyzer-double-free): New option.
22742 (-Wno-analyzer-exposure-through-output-file): New option.
22743 (-Wno-analyzer-file-leak): New option.
22744 (-Wno-analyzer-free-of-non-heap): New option.
22745 (-Wno-analyzer-malloc-leak): New option.
22746 (-Wno-analyzer-possible-null-argument): New option.
22747 (-Wno-analyzer-possible-null-dereference): New option.
22748 (-Wno-analyzer-null-argument): New option.
22749 (-Wno-analyzer-null-dereference): New option.
22750 (-Wno-analyzer-stale-setjmp-buffer): New option.
22751 (-Wno-analyzer-tainted-array-index): New option.
22752 (-Wno-analyzer-use-after-free): New option.
22753 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
22754 (-Wno-analyzer-use-of-uninitialized-value): New option.
22755 (-Wanalyzer-too-complex): New option.
22756 (-fanalyzer-call-summaries): New warning.
22757 (-fanalyzer-checker=): New warning.
22758 (-fanalyzer-fine-grained): New warning.
22759 (-fno-analyzer-state-merge): New warning.
22760 (-fno-analyzer-state-purge): New warning.
22761 (-fanalyzer-transitivity): New warning.
22762 (-fanalyzer-verbose-edges): New warning.
22763 (-fanalyzer-verbose-state-changes): New warning.
22764 (-fanalyzer-verbosity=): New warning.
22765 (-fdump-analyzer): New warning.
22766 (-fdump-analyzer-callgraph): New warning.
22767 (-fdump-analyzer-exploded-graph): New warning.
22768 (-fdump-analyzer-exploded-nodes): New warning.
22769 (-fdump-analyzer-exploded-nodes-2): New warning.
22770 (-fdump-analyzer-exploded-nodes-3): New warning.
22771 (-fdump-analyzer-supergraph): New warning.
22772 * doc/sourcebuild.texi (dg-require-dot): New.
22773 (dg-check-dot): New.
22774 * gdbinit.in (break-on-saved-diagnostic): New command.
22775 * graphviz.cc: New file.
22776 * graphviz.h: New file.
22777 * ordered-hash-map-tests.cc: New file.
22778 * ordered-hash-map.h: New file.
22779 * passes.def (pass_analyzer): Add before
22780 pass_ipa_whole_program_visibility.
22781 * selftest-run-tests.c (selftest::run_tests): Call
22782 selftest::ordered_hash_map_tests_cc_tests.
22783 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
22785 * shortest-paths.h: New file.
22786 * timevar.def (TV_ANALYZER): New timevar.
22787 (TV_ANALYZER_SUPERGRAPH): Likewise.
22788 (TV_ANALYZER_STATE_PURGE): Likewise.
22789 (TV_ANALYZER_PLAN): Likewise.
22790 (TV_ANALYZER_SCC): Likewise.
22791 (TV_ANALYZER_WORKLIST): Likewise.
22792 (TV_ANALYZER_DUMP): Likewise.
22793 (TV_ANALYZER_DIAGNOSTICS): Likewise.
22794 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
22795 * tree-pass.h (make_pass_analyzer): New decl.
22796 * tristate.cc: New file.
22797 * tristate.h: New file.
22799 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
22802 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
22803 alternatives 9 and 10.
22805 2020-01-14 David Malcolm <dmalcolm@redhat.com>
22807 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
22808 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
22809 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
22810 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
22811 (selftest::hash_map_tests_c_tests): Call it.
22812 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
22813 New static constant, using the value of = H::empty_zero_p.
22814 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
22815 from default_hash_traits <Value>.
22816 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
22818 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
22819 * hash-table.h (hash_table::alloc_entries): Guard the loop of
22820 calls to mark_empty with !Descriptor::empty_zero_p.
22821 (hash_table::empty_slow): Conditionalize the memset call with a
22822 check that Descriptor::empty_zero_p; otherwise, loop through the
22823 entries calling mark_empty on them.
22824 * hash-traits.h (int_hash::empty_zero_p): New static constant.
22825 (pointer_hash::empty_zero_p): Likewise.
22826 (pair_hash::empty_zero_p): Likewise.
22827 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
22829 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
22830 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
22831 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
22832 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
22833 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
22834 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
22835 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
22836 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
22837 * tree-vectorizer.h
22838 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
22841 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
22843 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
22844 fix typo on return value.
22846 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
22849 * cgraph.c (symbol_table::create_edge): Init speculative_id and
22851 (cgraph_edge::make_speculative): Add param for setting speculative_id
22853 (cgraph_edge::speculative_call_info): Update comments and find reference
22854 by speculative_id for multiple indirect targets.
22855 (cgraph_edge::resolve_speculation): Decrease the speculations
22856 for indirect edge, drop it's speculative if not direct target
22857 left. Update comments.
22858 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
22859 (cgraph_node::dump): Print num_speculative_call_targets.
22860 (cgraph_node::verify_node): Don't report error if speculative
22861 edge not include statement.
22862 (cgraph_edge::num_speculative_call_targets_p): New function.
22863 * cgraph.h (int common_target_id): Remove.
22864 (int common_target_probability): Remove.
22865 (num_speculative_call_targets): New variable.
22866 (make_speculative): Add param for setting speculative_id.
22867 (cgraph_edge::num_speculative_call_targets_p): New declare.
22868 (target_prob): New variable.
22869 (speculative_id): New variable.
22870 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
22871 call summaries for multiple speculative call targets.
22872 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
22873 * ipa-profile.c (struct speculative_call_target): New struct.
22874 (class speculative_call_summary): New class.
22875 (class speculative_call_summaries): New class.
22876 (call_sums): New variable.
22877 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
22878 (ipa_profile_write_edge_summary): New function.
22879 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
22880 (ipa_profile_dump_all_summaries): New function.
22881 (ipa_profile_read_edge_summary): New function.
22882 (ipa_profile_read_summary_section): New function.
22883 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
22884 (ipa_profile): Generate num_speculative_call_targets from
22886 * ipa-ref.h (speculative_id): New variable.
22887 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
22888 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
22889 common_target_probability. Stream out speculative_id and
22890 num_speculative_call_targets.
22891 (input_edge): Likewise.
22892 * predict.c (dump_prediction): Remove edges count assert to be
22894 * symtab.c (symtab_node::create_reference): Init speculative_id.
22895 (symtab_node::clone_references): Clone speculative_id.
22896 (symtab_node::clone_referring): Clone speculative_id.
22897 (symtab_node::clone_reference): Clone speculative_id.
22898 (symtab_node::clear_stmts_in_references): Clear speculative_id.
22899 * tree-inline.c (copy_bb): Duplicate all the speculative edges
22900 if indirect call contains multiple speculative targets.
22901 * value-prof.h (check_ic_target): Remove.
22902 * value-prof.c (gimple_value_profile_transformations):
22903 Use void function gimple_ic_transform.
22904 * value-prof.c (gimple_ic_transform): Handle topn case.
22905 Fix comment typos. Change it to a void function.
22907 2020-01-13 Andrew Pinski <apinski@marvell.com>
22909 * config/aarch64/aarch64-cores.def (octeontx2): New define.
22910 (octeontx2t98): New define.
22911 (octeontx2t96): New define.
22912 (octeontx2t93): New define.
22913 (octeontx2f95): New define.
22914 (octeontx2f95n): New define.
22915 (octeontx2f95mm): New define.
22916 * config/aarch64/aarch64-tune.md: Regenerate.
22917 * doc/invoke.texi (-mcpu=): Document the new cpu types.
22919 2020-01-13 Jason Merrill <jason@redhat.com>
22921 PR c++/33799 - destroy return value if local cleanup throws.
22922 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
22924 2020-01-13 Martin Liska <mliska@suse.cz>
22926 * ipa-cp.c (get_max_overall_size): Use newly
22927 renamed param param_ipa_cp_unit_growth.
22928 * params.opt: Remove legacy param name.
22930 2020-01-13 Martin Sebor <msebor@redhat.com>
22932 PR tree-optimization/93213
22933 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
22934 stores to be eliminated.
22936 2020-01-13 Martin Liska <mliska@suse.cz>
22938 * opts.c (print_help): Do not print CL_PARAM
22939 and CL_WARNING for CL_OPTIMIZATION.
22941 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
22944 * doc/invoke.texi (Warning Options): Add caveat about some warnings
22945 depending on optimization settings.
22947 2020-01-13 Jakub Jelinek <jakub@redhat.com>
22949 PR tree-optimization/90838
22950 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
22951 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
22952 argument rather than to initialize temporary for targets that
22953 don't use the mode argument at all. Initialize ctzval to avoid
22956 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
22958 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
22959 * tree-core.h: Document it.
22960 * gimplify.c (gimplify_omp_workshare): Set it.
22961 * omp-low.c (lower_omp_target): Use it.
22962 * tree-pretty-print.c (dump_omp_clause): Print it.
22964 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
22965 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
22967 2020-01-10 David Malcolm <dmalcolm@redhat.com>
22969 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
22970 * common.opt (fdiagnostics-path-format=): New option.
22971 (diagnostic_path_format): New enum.
22972 (fdiagnostics-show-path-depths): New option.
22973 * coretypes.h (diagnostic_event_id_t): New forward decl.
22974 * diagnostic-color.c (color_dict): Add "path".
22975 * diagnostic-event-id.h: New file.
22976 * diagnostic-format-json.cc (json_from_expanded_location): Make
22978 (json_end_diagnostic): Call context->make_json_for_path if it
22979 exists and the diagnostic has a path.
22980 (diagnostic_output_format_init): Clear context->print_path.
22981 * diagnostic-path.h: New file.
22982 * diagnostic-show-locus.c (colorizer::set_range): Special-case
22983 when printing a run of events in a diagnostic_path so that they
22984 all get the same color.
22985 (layout::m_diagnostic_path_p): New field.
22986 (layout::layout): Initialize it.
22987 (layout::print_any_labels): Don't colorize the label text for an
22988 event in a diagnostic_path.
22989 (gcc_rich_location::add_location_if_nearby): Add
22990 "restrict_to_current_line_spans" and "label" params. Pass the
22991 former to layout.maybe_add_location_range; pass the latter
22992 when calling add_range.
22993 * diagnostic.c: Include "diagnostic-path.h".
22994 (diagnostic_initialize): Initialize context->path_format and
22995 context->show_path_depths.
22996 (diagnostic_show_any_path): New function.
22997 (diagnostic_path::interprocedural_p): New function.
22998 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
22999 (simple_diagnostic_path::num_events): New function.
23000 (simple_diagnostic_path::get_event): New function.
23001 (simple_diagnostic_path::add_event): New function.
23002 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
23003 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
23004 (debug): New overload taking a diagnostic_path *.
23005 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
23006 * diagnostic.h (enum diagnostic_path_format): New enum.
23007 (json::value): New forward decl.
23008 (diagnostic_context::path_format): New field.
23009 (diagnostic_context::show_path_depths): New field.
23010 (diagnostic_context::print_path): New callback field.
23011 (diagnostic_context::make_json_for_path): New callback field.
23012 (diagnostic_show_any_path): New decl.
23013 (json_from_expanded_location): New decl.
23014 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
23015 (-fdiagnostics-show-path-depths): New option.
23016 (-fdiagnostics-color): Add "path" to description of default
23017 GCC_COLORS; describe it.
23018 (-fdiagnostics-format=json): Document how diagnostic paths are
23019 represented in the JSON output format.
23020 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
23021 Add optional params "restrict_to_current_line_spans" and "label".
23022 * opts.c (common_handle_option): Handle
23023 OPT_fdiagnostics_path_format_ and
23024 OPT_fdiagnostics_show_path_depths.
23025 * pretty-print.c: Include "diagnostic-event-id.h".
23026 (pp_format): Implement "%@" format code for printing
23027 diagnostic_event_id_t *.
23028 (selftest::test_pp_format): Add tests for "%@".
23029 * selftest-run-tests.c (selftest::run_tests): Call
23030 selftest::tree_diagnostic_path_cc_tests.
23031 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
23032 * toplev.c (general_init): Initialize global_dc->path_format and
23033 global_dc->show_path_depths.
23034 * tree-diagnostic-path.cc: New file.
23035 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
23036 non-static. Drop "diagnostic" param in favor of storing the
23037 original value of "where" and re-using it.
23038 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
23039 maybe_unwind_expanded_macro_loc.
23040 (tree_diagnostics_defaults): Initialize context->print_path and
23041 context->make_json_for_path.
23042 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
23044 (default_tree_make_json_for_path): New decl.
23045 (maybe_unwind_expanded_macro_loc): New decl.
23047 2020-01-10 Jakub Jelinek <jakub@redhat.com>
23049 PR tree-optimization/93210
23050 * fold-const.h (native_encode_initializer,
23051 can_native_interpret_type_p): Declare.
23052 * fold-const.c (native_encode_string): Fix up handling with off != -1,
23054 (native_encode_initializer): New function, moved from dwarf2out.c.
23055 Adjust to native_encode_expr compatible arguments, including dry-run
23056 and partial extraction modes. Don't handle STRING_CST.
23057 (can_native_interpret_type_p): No longer static.
23058 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
23059 offset / BITS_PER_UNIT fits into int and don't call it if
23060 can_native_interpret_type_p fails. If suboff is NULL and for
23061 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
23062 native_encode_initializer.
23063 (fold_const_aggregate_ref_1): Formatting fix.
23064 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
23065 (tree_add_const_value_attribute): Adjust caller.
23067 PR tree-optimization/90838
23068 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
23069 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
23070 CTZ_DEFINED_VALUE_AT_ZERO.
23072 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
23074 PR inline-asm/93027
23075 * lra-constraints.c (match_reload): Permit input operands have the
23076 same mode as output while other input operands have a different
23079 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
23081 PR tree-optimization/90838
23082 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
23083 (check_ctz_string): Likewise.
23084 (optimize_count_trailing_zeroes): Likewise.
23085 (simplify_count_trailing_zeroes): Likewise.
23086 (pass_forwprop::execute): Try ctz simplification.
23087 * match.pd: Add matching for ctz idioms.
23089 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23091 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
23093 (aarch64_invalid_unary_op): New function for target hook.
23094 (aarch64_invalid_binary_op): New function for target hook.
23096 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23098 * config.gcc: Add arm_bf16.h.
23099 * config/aarch64/aarch64-builtins.c
23100 (aarch64_simd_builtin_std_type): Add BFmode.
23101 (aarch64_init_simd_builtin_types): Define element types for vector
23103 (aarch64_init_bf16_types): New function.
23104 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
23105 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
23107 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
23108 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
23110 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
23111 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
23112 * config/aarch64/aarch64.c
23113 (aarch64_classify_vector_mode): Add support for BF types.
23114 (aarch64_gimplify_va_arg_expr): Add support for BF types.
23115 (aarch64_vq_mode): Add support for BF types.
23116 (aarch64_simd_container_mode): Add support for BF types.
23117 (aarch64_mangle_type): Add support for BF scalar type.
23118 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
23119 * config/aarch64/arm_bf16.h: New file.
23120 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
23121 * config/aarch64/iterators.md: Add BF types to mode attributes.
23122 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
23124 2020-01-10 Jason Merrill <jason@redhat.com>
23126 PR c++/93173 - incorrect tree sharing.
23127 * gimplify.c (copy_if_shared): No longer static.
23128 * gimplify.h: Declare it.
23130 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23132 * doc/invoke.texi (-msve-vector-bits=): Document that
23133 -msve-vector-bits=128 now generates VL-specific code for
23134 little-endian targets.
23135 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
23136 build_vector_type_for_mode to construct the data vector types.
23137 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
23138 VL-specific code for -msve-vector-bits=128 on little-endian targets.
23139 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
23140 for 128-bit vectors.
23142 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23144 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
23147 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23149 * config/aarch64/aarch64-builtins.c
23150 (aarch64_builtin_vectorized_function): Check for specific vector modes,
23151 rather than checking the number of elements and the element mode.
23153 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23155 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
23156 get_related_vectype_for_scalar_type rather than build_vector_type
23157 to create the index type for a conditional reduction.
23159 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
23161 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
23162 for any type of gather or scatter, including strided accesses.
23164 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
23166 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
23169 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
23171 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
23172 get_dr_vinfo_offset
23173 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
23174 parameter and its use to reset DR_OFFSET's.
23175 (vect_transform_loop): Remove orig_drs_init argument.
23176 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
23177 member of dr_vec_info rather than the offset of the associated
23178 data_reference's innermost_loop_behavior.
23179 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
23180 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
23181 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
23182 get_dr_vinfo_offset.
23183 (vectorizable_store): Likewise.
23184 (vectorizable_load): Likewise.
23186 2020-01-10 Richard Biener <rguenther@suse.de>
23188 * gimple-ssa-store-merging
23189 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
23191 2020-01-10 Martin Liska <mliska@suse.cz>
23194 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
23195 encapsulation that was there before r280040.
23197 2020-01-10 Richard Biener <rguenther@suse.de>
23199 PR middle-end/93199
23200 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
23201 sequences to avoid walking them again for secondary opportunities.
23202 (pass_lower_eh_dispatch::execute): Instead actually insert
23205 2020-01-10 Richard Biener <rguenther@suse.de>
23207 PR middle-end/93199
23208 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
23209 (cleanup_all_empty_eh): Walk landing pads in reverse order to
23210 avoid quadraticness.
23212 2020-01-10 Martin Jambor <mjambor@suse.cz>
23214 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
23215 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
23216 to get param_ipa_sra_max_replacements.
23217 (param_splitting_across_edge): Pass the caller to
23218 pull_accesses_from_callee.
23220 2020-01-10 Martin Jambor <mjambor@suse.cz>
23222 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
23223 * ipa-cp.c (max_new_size): Removed.
23224 (orig_overall_size): New variable.
23225 (get_max_overall_size): New function.
23226 (estimate_local_effects): Use it. Adjust dump.
23227 (decide_about_value): Likewise.
23228 (ipcp_propagate_stage): Do not calculate max_new_size, just store
23229 orig_overall_size. Adjust dump.
23230 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
23232 2020-01-10 Martin Jambor <mjambor@suse.cz>
23234 * params.opt (param_ipa_max_agg_items): Mark as Optimization
23235 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
23236 instead of param_ipa_max_agg_items.
23237 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
23238 optimization info for the callee.
23240 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
23242 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
23243 markers if debug_inline_points is false.
23245 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23247 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
23249 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
23250 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
23251 aarch64-sve-builtins-sve2.h.
23252 (aarch64-sve-builtins-sve2.o): New rule.
23253 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
23254 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
23255 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
23256 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
23257 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
23258 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
23260 * config/aarch64/aarch64-sve.md: Update comments with SVE2
23261 instructions that are handled here.
23262 (@cond_asrd<mode>): Generalize to...
23263 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
23264 (*cond_asrd<mode>_2): Generalize to...
23265 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
23266 (*cond_asrd<mode>_z): Generalize to...
23267 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
23268 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
23269 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
23270 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
23271 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
23273 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
23274 (@aarch64_scatter_stnt<mode>): Likewise.
23275 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
23276 (@aarch64_mul_lane_<mode>): Likewise.
23277 (@aarch64_sve_suqadd<mode>_const): Likewise.
23278 (*<sur>h<addsub><mode>): Generalize to...
23279 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
23281 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
23282 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
23283 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
23284 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
23285 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
23286 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
23287 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
23288 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
23289 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
23290 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
23291 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
23292 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
23293 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
23294 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
23295 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
23296 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
23297 (@aarch64_sve2_xar<mode>): Likewise.
23298 (@aarch64_sve2_bcax<mode>): Likewise.
23299 (*aarch64_sve2_eor3<mode>): Rename to...
23300 (@aarch64_sve2_eor3<mode>): ...this.
23301 (@aarch64_sve2_bsl<mode>): New expander.
23302 (@aarch64_sve2_nbsl<mode>): Likewise.
23303 (@aarch64_sve2_bsl1n<mode>): Likewise.
23304 (@aarch64_sve2_bsl2n<mode>): Likewise.
23305 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
23306 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
23307 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
23308 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
23309 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
23310 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
23311 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
23312 (<su>mull<bt><Vwide>): Generalize to...
23313 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
23315 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
23316 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
23317 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
23318 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23319 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
23320 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23321 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
23322 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23323 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
23324 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
23325 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
23326 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
23327 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
23328 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
23329 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
23330 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
23331 (<SHRNB:r>shrnb<mode>): Generalize to...
23332 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
23334 (<SHRNT:r>shrnt<mode>): Generalize to...
23335 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
23337 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
23338 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
23339 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
23340 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
23341 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
23342 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
23343 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
23344 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
23345 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
23346 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
23347 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
23348 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
23349 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
23350 (@aarch64_sve2_cvtnt<mode>): Likewise.
23351 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
23352 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
23353 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
23354 (@aarch64_sve2_cvtxnt<mode>): Likewise.
23355 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
23356 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
23357 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
23358 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
23359 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
23360 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
23361 (@aarch64_sve2_pmul<mode>): Likewise.
23362 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
23363 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
23364 (@aarch64_sve2_tbl2<mode>): Likewise.
23365 (@aarch64_sve2_tbx<mode>): Likewise.
23366 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
23367 (@aarch64_sve2_histcnt<mode>): Likewise.
23368 (@aarch64_sve2_histseg<mode>): Likewise.
23369 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
23370 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
23371 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
23372 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
23373 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
23374 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
23375 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
23376 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
23377 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
23378 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
23379 (SVE2_PMULL_PAIR_I): New mode iterators.
23380 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
23381 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
23382 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
23383 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
23384 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
23385 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
23386 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
23387 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
23388 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
23389 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
23390 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
23391 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
23392 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
23393 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
23394 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
23395 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
23396 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
23397 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
23398 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
23399 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
23400 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
23401 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
23402 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
23403 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
23404 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
23405 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
23406 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
23407 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
23408 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
23409 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
23410 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
23412 (VNARROW, Ventype): New mode attributes.
23413 (Vewtype): Handle VNx2DI. Fix typo in comment.
23414 (VDOUBLE): New mode attribute.
23415 (sve_lane_con): Handle VNx8HI.
23416 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
23417 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
23418 (sve_int_op, sve_int_op_rev): Handle the above codes.
23419 (sve_pred_int_rhs2_operand): Likewise.
23420 (MULLBT, SHRNB, SHRNT): Delete.
23421 (SVE_INT_SHIFT_IMM): New int iterator.
23422 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
23423 and UNSPEC_WHILEHS for TARGET_SVE2.
23424 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
23425 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
23426 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
23427 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
23428 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
23429 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
23430 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
23431 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
23432 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
23433 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
23434 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
23435 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
23436 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
23437 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
23438 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
23439 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
23440 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
23441 (optab): Handle the new unspecs.
23442 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
23444 (lr): Handle the new unspecs.
23446 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
23447 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
23448 (sve_int_qsub_op): New int attributes.
23449 (sve_fp_op, rot): Handle the new unspecs.
23450 * config/aarch64/aarch64-sve-builtins.h
23451 (function_resolver::require_matching_pointer_type): Declare.
23452 (function_resolver::resolve_unary): Add an optional boolean argument.
23453 (function_resolver::finish_opt_n_resolution): Add an optional
23454 type_suffix_index argument.
23455 (gimple_folder::redirect_call): Declare.
23456 (gimple_expander::prepare_gather_address_operands): Add an optional
23458 * config/aarch64/aarch64-sve-builtins.cc: Include
23459 aarch64-sve-builtins-sve2.h.
23460 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
23461 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
23462 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
23463 (TYPES_hsd_integer): Use TYPES_hsd_signed.
23464 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
23465 (TYPES_s_unsigned): Likewise.
23466 (TYPES_s_integer): Use TYPES_s_unsigned.
23467 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
23468 (TYPES_sd_integer): Use them.
23469 (TYPES_d_unsigned): New macro.
23470 (TYPES_d_integer): Use it.
23471 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
23472 (TYPES_cvt_narrow): Likewise.
23473 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
23474 (preds_mx): New variable.
23475 (function_builder::add_overloaded_function): Allow the new feature
23476 set to be more restrictive than the original one.
23477 (function_resolver::infer_pointer_type): Remove qualifiers from
23478 the pointer type before printing it.
23479 (function_resolver::require_matching_pointer_type): New function.
23480 (function_resolver::resolve_sv_displacement): Handle functions
23481 that don't support 32-bit vector indices or svint32_t vector offsets.
23482 (function_resolver::finish_opt_n_resolution): Take the inferred type
23483 as a separate argument.
23484 (function_resolver::resolve_unary): Optionally treat all forms in
23485 the same way as normal merging functions.
23486 (gimple_folder::redirect_call): New function.
23487 (function_expander::prepare_gather_address_operands): Add an argument
23488 that says whether scaled forms are available. If they aren't,
23489 handle scaling of vector indices and don't add the extension and
23491 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
23492 fall back to using cond_* instead.
23493 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
23494 Split out the member variables into...
23495 (rtx_code_function_base): ...this new base class.
23496 (rtx_code_function_rotated): Inherit rtx_code_function_base.
23497 (unspec_based_function): Split out the member variables into...
23498 (unspec_based_function_base): ...this new base class.
23499 (unspec_based_function_rotated): Inherit unspec_based_function_base.
23500 (unspec_based_function_exact_insn): New class.
23501 (unspec_based_add_function, unspec_based_add_lane_function)
23502 (unspec_based_lane_function, unspec_based_pred_function)
23503 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
23504 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
23505 (unspec_based_sub_function, unspec_based_sub_lane_function): New
23507 (unspec_based_fused_function): New class.
23508 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
23509 (unspec_based_fused_lane_function): New class.
23510 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
23512 (CODE_FOR_MODE1): New macro.
23513 (fixed_insn_function): New class.
23514 (while_comparison): Likewise.
23515 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
23516 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
23517 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
23518 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
23519 (load_gather_sv_restricted, shift_left_imm_long): Declare.
23520 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
23521 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
23522 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
23523 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
23524 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
23525 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
23526 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
23527 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
23528 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
23529 Also add an initial argument for unary_convert_narrowt, regardless
23530 of the predication type.
23531 (build_32_64): Allow loads and stores to specify MODE_none.
23532 (build_sv_index64, build_sv_uint_offset): New functions.
23533 (long_type_suffix): New function.
23534 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
23535 (binary_imm_long_base, load_gather_sv_base): Likewise.
23536 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
23537 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
23538 (unary_narrowb_base, unary_narrowt_base): Likewise.
23539 (binary_long_lane_def, binary_long_lane): New shape.
23540 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
23541 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
23542 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
23543 (binary_to_uint_def, binary_to_uint): Likewise.
23544 (binary_wide_def, binary_wide): Likewise.
23545 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
23546 (compare_def, compare): Likewise.
23547 (compare_ptr_def, compare_ptr): Likewise.
23548 (load_ext_gather_index_restricted_def,
23549 load_ext_gather_index_restricted): Likewise.
23550 (load_ext_gather_offset_restricted_def,
23551 load_ext_gather_offset_restricted): Likewise.
23552 (load_gather_sv_def): Inherit from load_gather_sv_base.
23553 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
23554 (shift_left_imm_def, shift_left_imm): Likewise.
23555 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
23556 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
23557 (store_scatter_index_restricted_def,
23558 store_scatter_index_restricted): Likewise.
23559 (store_scatter_offset_restricted_def,
23560 store_scatter_offset_restricted): Likewise.
23561 (tbl_tuple_def, tbl_tuple): Likewise.
23562 (ternary_long_lane_def, ternary_long_lane): Likewise.
23563 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
23564 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
23565 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
23566 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
23567 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
23568 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
23569 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
23570 (ternary_uint_def, ternary_uint): Likewise.
23571 (unary_convert): Fix typo in comment.
23572 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
23573 (unary_long_def, unary_long): Likewise.
23574 (unary_narrowb_def, unary_narrowb): Likewise.
23575 (unary_narrowt_def, unary_narrowt): Likewise.
23576 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
23577 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
23578 (unary_to_int_def, unary_to_int): Likewise.
23579 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
23580 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
23581 (svasrd_impl): Delete.
23582 (svcadd_impl::expand): Handle integer operations too.
23583 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
23584 new functions to derive the unspec numbers.
23585 (svmla_svmls_lane_impl): Replace with...
23586 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
23587 integer operations too.
23588 (svwhile_impl): Rename to...
23589 (svwhilelx_impl): ...this and inherit from while_comparison.
23590 (svasrd): Use unspec_based_function.
23591 (svmla_lane): Use svmla_lane_impl.
23592 (svmls_lane): Use svmls_lane_impl.
23593 (svrecpe, svrsqrte): Handle unsigned integer operations too.
23594 (svwhilele, svwhilelt): Use svwhilelx_impl.
23595 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
23596 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
23597 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
23598 * config/aarch64/aarch64-sve-builtins.def: Include
23599 aarch64-sve-builtins-sve2.def.
23601 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23603 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
23604 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
23605 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
23606 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
23607 immediates as well as vector ones.
23608 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
23609 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
23610 (aarch64_sve_qsub_immediate): Update calls accordingly.
23612 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23614 * config/aarch64/aarch64-sve2.md: Add banner comments.
23615 (<su>mulh<r>s<mode>3): Move further up file.
23616 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
23617 (*aarch64_sve2_sra<mode>): Move further down file.
23618 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
23620 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23622 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
23623 and UNSPEC_WHILEWR.
23624 (while_optab_cmp): Handle them.
23625 * config/aarch64/aarch64-sve.md
23626 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
23627 and add a "@" marker.
23628 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
23629 instead of gen_aarch64_sve2_while_ptest.
23630 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
23632 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23634 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
23635 (UNSPEC_WHILELE): ...this.
23636 (UNSPEC_WHILE_LO): Rename to...
23637 (UNSPEC_WHILELO): ...this.
23638 (UNSPEC_WHILE_LS): Rename to...
23639 (UNSPEC_WHILELS): ...this.
23640 (UNSPEC_WHILE_LT): Rename to...
23641 (UNSPEC_WHILELT): ...this.
23642 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
23643 (cmp_op, while_optab_cmp): Likewise.
23644 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
23645 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
23646 (svwhilelt): Likewise.
23648 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23650 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
23651 (unary_to_uint): Define.
23652 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
23653 (unary_count): Rename to...
23654 (unary_to_uint_def, unary_to_uint): ...this.
23655 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
23657 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23659 * config/aarch64/aarch64-sve-builtins-functions.h
23660 (code_for_mode_function): New class.
23661 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
23662 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
23663 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
23664 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
23665 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
23667 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23669 * config/aarch64/iterators.md (addsub): New code attribute.
23670 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
23672 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
23673 in the asm string and attributes. Fix indentation.
23674 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
23676 (@aarch64_sve_<optab><mode>): ...this.
23677 * config/aarch64/aarch64-sve-builtins.h
23678 (function_expander::expand_signed_unpred_op): Delete.
23679 * config/aarch64/aarch64-sve-builtins.cc
23680 (function_expander::expand_signed_unpred_op): Likewise.
23681 (function_expander::map_to_rtx_codes): If the optab isn't defined,
23682 try using code_for_aarch64_sve instead.
23683 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
23684 (svqsub_impl): Likewise.
23685 (svqadd, svqsub): Use rtx_code_function instead.
23687 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23689 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
23690 (HADDSUB, sur, addsub): Remove them.
23692 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23694 * tree-nrv.c (pass_return_slot::execute): Handle all internal
23695 functions the same way, rather than singling out those that
23696 aren't mapped directly to optabs.
23698 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
23700 * target.def (compatible_vector_types_p): New target hook.
23701 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
23702 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
23703 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
23704 * doc/tm.texi: Regenerate.
23705 * gimple-expr.c: Include target.h.
23706 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
23707 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
23709 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
23710 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
23711 Use the original predicate if it already has a suitable type.
23713 2020-01-09 Martin Jambor <mjambor@suse.cz>
23715 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
23716 resolve_speculation and redirect_call_stmt_to_callee static. Change
23717 return type of set_call_stmt to cgraph_edge *.
23718 * auto-profile.c (afdo_indirect_call): Adjust call to
23719 redirect_call_stmt_to_callee.
23720 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
23721 make the this pointer explicit, adjust self-recursive calls and the
23722 call top make_direct. Return the resulting edge.
23723 (cgraph_edge::remove): Make this pointer explicit.
23724 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
23725 (cgraph_edge::make_direct): Likewise, adjust call to
23726 resolve_speculation.
23727 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
23728 call to set_call_stmt.
23729 (cgraph_update_edges_for_call_stmt_node): Update call to
23730 set_call_stmt and remove.
23731 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
23732 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
23733 (cgraph_node::create_edge_including_clones): Moved "first" definition
23734 of edge to the block where it was used. Adjusted calls to
23736 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
23737 cgraph_edge::remove.
23738 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
23739 make_direct and redirect_call_stmt_to_callee.
23740 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
23741 resolve_speculation and make_direct.
23742 * ipa-inline-transform.c (inline_transform): Adjust call to
23743 redirect_call_stmt_to_callee.
23744 (check_speculations_1):: Adjust call to resolve_speculation.
23745 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
23746 resolve-speculation.
23747 (inline_small_functions): Adjust call to resolve_speculation.
23748 (ipa_inline): Likewise.
23749 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
23751 * ipa-visibility.c (function_and_variable_visibility): Make iteration
23752 safe with regards to edge removal, adjust calls to
23753 redirect_call_stmt_to_callee.
23754 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
23755 and redirect_call_stmt_to_callee.
23756 * multiple_target.c (create_dispatcher_calls): Adjust call to
23757 redirect_call_stmt_to_callee
23758 (redirect_to_specific_clone): Likewise.
23759 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
23760 Adjust calls to cgraph_edge::remove.
23761 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
23762 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
23763 (expand_call_inline): Adjust call to cgraph_edge::remove.
23765 2020-01-09 Martin Liska <mliska@suse.cz>
23767 * params.opt: Set Optimization for
23768 param_max_speculative_devirt_maydefs.
23770 2020-01-09 Martin Sebor <msebor@redhat.com>
23772 PR middle-end/93200
23774 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
23776 2020-01-09 Martin Liska <mliska@suse.cz>
23778 * auto-profile.c (auto_profile): Use opt_for_fn
23780 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
23781 (propagate_vals_across_arith_jfunc): Likewise.
23782 (hint_time_bonus): Likewise.
23783 (incorporate_penalties): Likewise.
23784 (good_cloning_opportunity_p): Likewise.
23785 (perform_estimation_of_a_value): Likewise.
23786 (estimate_local_effects): Likewise.
23787 (ipcp_propagate_stage): Likewise.
23788 * ipa-fnsummary.c (decompose_param_expr): Likewise.
23789 (set_switch_stmt_execution_predicate): Likewise.
23790 (analyze_function_body): Likewise.
23791 * ipa-inline-analysis.c (offline_size): Likewise.
23792 * ipa-inline.c (early_inliner): Likewise.
23793 * ipa-prop.c (ipa_analyze_node): Likewise.
23794 (ipcp_transform_function): Likewise.
23795 * ipa-sra.c (process_scan_results): Likewise.
23796 (ipa_sra_summarize_function): Likewise.
23797 * params.opt: Rename ipcp-unit-growth to
23798 ipa-cp-unit-growth. Add Optimization for various
23799 IPA-related parameters.
23801 2020-01-09 Richard Biener <rguenther@suse.de>
23803 PR middle-end/93054
23804 * gimplify.c (gimplify_expr): Deal with NOP definitions.
23806 2020-01-09 Richard Biener <rguenther@suse.de>
23808 PR tree-optimization/93040
23809 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
23811 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
23813 * common/config/avr/avr-common.c (avr_option_optimization_table)
23814 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
23816 2020-01-09 Martin Liska <mliska@suse.cz>
23818 * cgraphclones.c (symbol_table::materialize_all_clones):
23819 Use cgraph_node::dump_name.
23821 2020-01-09 Jakub Jelinek <jakub@redhat.com>
23823 PR inline-asm/93202
23824 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
23825 output_operand_lossage instead of gcc_unreachable.
23826 * doc/md.texi (riscv f constraint): Fix typo.
23829 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
23830 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
23831 CONST_SCALAR_INT_P instead of CONST_INT_P.
23832 (*subv<mode>4_1): Rename to ...
23833 (subv<mode>4_1): ... this.
23834 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
23835 define_insn_and_split patterns.
23836 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
23839 2020-01-08 David Malcolm <dmalcolm@redhat.com>
23841 * vec.c (class selftest::count_dtor): New class.
23842 (selftest::test_auto_delete_vec): New test.
23843 (selftest::vec_c_tests): Call it.
23844 * vec.h (class auto_delete_vec): New class template.
23845 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
23847 2020-01-08 David Malcolm <dmalcolm@redhat.com>
23849 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
23851 2020-01-08 Jim Wilson <jimw@sifive.com>
23853 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
23854 use of TLS_MODEL_LOCAL_EXEC when not pic.
23856 2020-01-08 David Malcolm <dmalcolm@redhat.com>
23858 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
23861 2020-01-08 Jakub Jelinek <jakub@redhat.com>
23864 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
23865 *stack_protect_set_3 peephole2): Also check that the second
23866 insns source is general_operand.
23869 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
23870 predicate for output operand instead of register_operand.
23871 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
23872 memory destination and non-memory operands[2].
23874 2020-01-08 Martin Liska <mliska@suse.cz>
23876 * cgraph.c (cgraph_node::dump): Use ::dump_name or
23877 ::dump_asm_name instead of (::name or ::asm_name).
23878 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
23879 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
23880 (analyze_functions): Likewise.
23881 (expand_all_functions): Likewise.
23882 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
23883 (propagate_bits_across_jump_function): Likewise.
23884 (dump_profile_updates): Likewise.
23885 (ipcp_store_bits_results): Likewise.
23886 (ipcp_store_vr_results): Likewise.
23887 * ipa-devirt.c (dump_targets): Likewise.
23888 * ipa-fnsummary.c (analyze_function_body): Likewise.
23889 * ipa-hsa.c (check_warn_node_versionable): Likewise.
23890 (process_hsa_functions): Likewise.
23891 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
23892 (set_alias_uids): Likewise.
23893 * ipa-inline-transform.c (save_inline_function_body): Likewise.
23894 * ipa-inline.c (recursive_inlining): Likewise.
23895 (inline_to_all_callers_1): Likewise.
23896 (ipa_inline): Likewise.
23897 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
23898 (ipa_propagate_frequency): Likewise.
23899 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
23900 (remove_described_reference): Likewise.
23901 * ipa-pure-const.c (worse_state): Likewise.
23902 (check_retval_uses): Likewise.
23903 (analyze_function): Likewise.
23904 (propagate_pure_const): Likewise.
23905 (propagate_nothrow): Likewise.
23906 (dump_malloc_lattice): Likewise.
23907 (propagate_malloc): Likewise.
23908 (pass_local_pure_const::execute): Likewise.
23909 * ipa-visibility.c (optimize_weakref): Likewise.
23910 (function_and_variable_visibility): Likewise.
23911 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
23912 (ipa_discover_variable_flags): Likewise.
23913 * lto-streamer-out.c (output_function): Likewise.
23914 (output_constructor): Likewise.
23915 * tree-inline.c (copy_bb): Likewise.
23916 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
23917 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
23919 2020-01-08 Richard Biener <rguenther@suse.de>
23921 PR middle-end/93199
23922 * tree-eh.c (sink_clobbers): Update virtual operands for
23923 the first and last stmt only. Add a dry-run capability.
23924 (pass_lower_eh_dispatch::execute): Perform clobber sinking
23925 after CFG manipulations and in RPO order to catch all
23926 secondary opportunities reliably.
23928 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
23931 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
23933 2019-01-08 Richard Biener <rguenther@suse.de>
23935 PR middle-end/93199
23936 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
23937 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
23938 virtual operand, also updating SSA use.
23939 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
23940 Update stmt after resetting virtual operand.
23941 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
23942 * gimple-iterator.c (gsi_remove): When not removing the stmt
23943 permanently do not delink immediate uses or mark the stmt modified.
23945 2020-01-08 Martin Liska <mliska@suse.cz>
23947 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
23948 (ipa_call_context::estimate_size_and_time): Likewise.
23949 (inline_analyze_function): Likewise.
23951 2020-01-08 Martin Liska <mliska@suse.cz>
23953 * cgraph.c (cgraph_node::dump): Use systematically
23956 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
23958 Add -nodevicespecs option for avr.
23961 * config/avr/avr.opt (-nodevicespecs): New driver option.
23962 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
23963 "-specs=device-specs/..." if that option is not set.
23964 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
23966 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
23968 Implement 64-bit double functions for avr.
23971 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
23972 --with-double-comparison.
23973 * doc/install.texi: Document them.
23974 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
23975 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
23976 <WITH_DOUBLE_COMPARISON>: New built-in defines.
23977 * doc/invoke.texi (AVR Built-in Macros): Document them.
23978 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
23979 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
23980 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
23982 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
23985 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
23986 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
23987 when only building rm-profile multilibs.
23989 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
23992 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
23993 lattice for a value to check.
23994 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
23995 finite propagation in self-recursive scc.
23997 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
23999 * ipa-inline.c (caller_growth_limits): Restore the AND.
24001 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
24003 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
24004 (VEC_ALLREG_ALT): New iterator.
24005 (VEC_ALLREG_INT_MODE): New iterator.
24006 (VCMP_MODE): New iterator.
24007 (VCMP_MODE_INT): New iterator.
24008 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
24009 (vec_cmp<u>v64qidi): New define_expand.
24010 (vec_cmp<mode>di_exec): Use VCMP_MODE.
24011 (vec_cmpu<mode>di_exec): New define_expand.
24012 (vec_cmp<u>v64qidi_exec): New define_expand.
24013 (vec_cmp<mode>di_dup): Use VCMP_MODE.
24014 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
24015 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
24016 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
24017 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
24018 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
24019 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
24020 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
24021 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
24022 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
24024 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
24025 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
24027 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
24029 * config/gcn/constraints.md (DA): Update description and match.
24031 (Db): New constraint.
24032 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
24034 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
24035 Implement 'Db' mixed immediate type.
24036 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
24037 (addcv64si3_dup<exec_vcc>): Delete.
24038 (subcv64si3<exec_vcc>): Rework constraints.
24039 (addv64di3): Rework constraints.
24040 (addv64di3_exec): Rework constraints.
24041 (subv64di3): Rework constraints.
24042 (addv64di3_dup): Delete.
24043 (addv64di3_dup_exec): Delete.
24044 (addv64di3_zext): Rework constraints.
24045 (addv64di3_zext_exec): Rework constraints.
24046 (addv64di3_zext_dup): Rework constraints.
24047 (addv64di3_zext_dup_exec): Rework constraints.
24048 (addv64di3_zext_dup2): Rework constraints.
24049 (addv64di3_zext_dup2_exec): Rework constraints.
24050 (addv64di3_sext_dup2): Rework constraints.
24051 (addv64di3_sext_dup2_exec): Rework constraints.
24053 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
24055 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
24056 existing target checks.
24058 2020-01-07 Richard Biener <rguenther@suse.de>
24060 * doc/install.texi: Bump minimal supported MPC version.
24062 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
24064 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
24065 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
24066 * langhooks.c: Include stor-layout.h.
24067 (lhd_simulate_enum_decl): New function.
24068 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
24069 handle_arm_sve_h for the LTO frontend.
24070 (register_vector_type): Cope with null returns from pushdecl.
24072 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
24074 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
24075 (aarch64_sve::nvectors_if_data_type): Replace with...
24076 (aarch64_sve::builtin_type_p): ...this.
24077 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
24078 (find_vector_type): Delete.
24079 (add_sve_type_attribute): New function.
24080 (lookup_sve_type_attribute): Likewise.
24081 (register_builtin_types): Add an "SVE type" attribute to each type.
24082 (register_tuple_type): Likewise.
24083 (svbool_type_p, nvectors_if_data_type): Delete.
24084 (mangle_builtin_type): Use lookup_sve_type_attribute.
24085 (builtin_type_p): Likewise. Add an overload that returns the
24086 number of constituent vector and predicate registers.
24087 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
24088 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
24089 instead of aarch64_sve_argument_p.
24090 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
24091 (aarch64_pass_by_reference): Likewise.
24092 (aarch64_function_value_1): Likewise.
24093 (aarch64_return_in_memory): Likewise.
24094 (aarch64_layout_arg): Likewise.
24096 2020-01-07 Jakub Jelinek <jakub@redhat.com>
24098 PR tree-optimization/93156
24099 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
24100 least significant bit is always clear.
24102 PR tree-optimization/93118
24103 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
24104 simplifier with two intermediate conversions.
24106 2020-01-07 Martin Liska <mliska@suse.cz>
24108 * params.opt: Add Optimization for various parameters.
24110 2020-01-07 Martin Liska <mliska@suse.cz>
24113 * doc/extend.texi: Explain cloning for target_clone
24116 2020-01-07 Martin Liska <mliska@suse.cz>
24118 PR tree-optimization/92860
24119 * common.opt: Make in Optimization option
24120 as it is affected by -O0, which is an Optimization
24122 * tree-inline.c (tree_inlinable_function_p):
24123 Use opt_for_fn for warn_inline.
24124 (expand_call_inline): Likewise.
24126 2020-01-07 Martin Liska <mliska@suse.cz>
24128 PR tree-optimization/92860
24129 * common.opt: Make flag_ree as optimization
24132 2020-01-07 Martin Liska <mliska@suse.cz>
24134 PR optimization/92860
24135 * params.opt: Mark param_min_crossjump_insns with Optimization
24138 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
24140 * ipa-inline-analysis.c (estimate_growth): Fix typo.
24141 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
24143 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
24145 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
24146 helper function to return the valid addressing formats for a given
24147 hard register and mode.
24148 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
24150 * config/rs6000/constraints.md (Q constraint): Update
24152 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
24155 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
24156 Use 'Q' for doing vector extract from memory.
24157 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
24159 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
24160 doing vector extract from memory.
24161 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
24162 extract from memory.
24164 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
24165 for the offset being 34-bits when -mcpu=future is used.
24167 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
24169 * config/pa/pa.md: Revert change to use ordered_comparison_operator
24170 instead of cmpib_comparison_operator in cmpib patterns.
24171 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
24172 of cmpib_comparison_operator. Revise comment.
24174 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24176 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
24177 in an IFN_DIV_POW2 node to be equal.
24179 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24181 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
24182 (vect_check_scalar_mask): ...this.
24183 (vectorizable_store, vectorizable_load): Update call accordingly.
24184 (vectorizable_call): Use vect_check_scalar_mask to check the mask
24185 argument in calls to conditional internal functions.
24187 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
24189 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
24190 '0' matching inputs.
24191 (subv64di3_exec): Likewise.
24193 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
24195 * config/mips/mips.c (vr4130_align_insns): Fix typo.
24196 * doc/md.texi (movstr): Likewise.
24198 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
24200 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
24203 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24205 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
24207 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
24208 to a temporary file and use move-if-change to update the real
24209 file where necessary.
24211 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
24213 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
24214 rather than Upa for CPY /M.
24216 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
24218 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
24221 2020-01-06 Martin Liska <mliska@suse.cz>
24223 PR tree-optimization/92860
24224 * params.opt: Mark param_max_combine_insns with Optimization
24227 2020-01-05 Jakub Jelinek <jakub@redhat.com>
24230 * config/i386/i386.md (SWIDWI): New mode iterator.
24231 (DWI, dwi): Add TImode variants.
24232 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
24233 <general_hilo_operand> instead of <general_operand>. Use
24234 CONST_SCALAR_INT_P instead of CONST_INT_P.
24235 (*addv<mode>4_1): Rename to ...
24236 (addv<mode>4_1): ... this.
24237 (QWI): New mode attribute.
24238 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
24239 define_insn_and_split patterns.
24240 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
24242 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
24243 <general_hilo_operand> instead of <general_operand>.
24244 (*addcarry<mode>_1): New define_insn.
24245 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
24247 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
24249 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
24250 Use "call" instead of "set".
24252 2020-01-03 Martin Jambor <mjambor@suse.cz>
24255 * ipa-cp.c (print_all_lattices): Skip functions without info.
24257 2020-01-03 Jakub Jelinek <jakub@redhat.com>
24260 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
24261 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
24262 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
24263 for 'e' simd clones.
24266 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
24268 (mprefer-vector-width=): Add Save.
24269 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
24270 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
24271 (ix86_debug_options, ix86_function_specific_print): Adjust
24272 ix86_target_string callers.
24273 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
24274 (ix86_valid_target_attribute_tree): Likewise.
24275 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
24276 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
24277 ix86_target_string caller.
24280 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
24281 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
24282 instead of gen_int_shift_amount + convert_modes.
24284 PR rtl-optimization/93088
24285 * loop-iv.c (find_single_def_src): Punt after looking through
24286 128 reg copies for regs with single definitions. Move definitions
24289 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
24291 * config/arm/arm-c.c (arm_cpu_builtins): Define
24292 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
24293 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
24294 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
24295 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
24296 * config/arm/arm-tables.opt: Regenerated.
24297 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
24298 arm_arch_i8mm and arm_arch_bf16 when enabled.
24299 * config/arm/arm.h (TARGET_I8MM): New macro.
24300 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
24301 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
24302 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
24303 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
24304 (v8_6_a_simd_variants): New.
24305 (v8_*_a_simd_variants): Add i8mm and bf16.
24306 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
24308 2020-01-02 Jakub Jelinek <jakub@redhat.com>
24311 * predict.c (compute_function_frequency): Don't call
24312 warn_function_cold on functions that already have cold attribute.
24314 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
24317 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
24318 COMDAT group function labels in .data.rel.ro.local section.
24319 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
24322 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
24323 comparison_operator in B and S integer comparisons. Likewise, use
24324 ordered_comparison_operator instead of cmpib_comparison_operator in
24326 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
24328 2020-01-01 Jakub Jelinek <jakub@redhat.com>
24330 Update copyright years.
24332 * gcc.c (process_command): Update copyright notice dates.
24333 * gcov-dump.c (print_version): Ditto.
24334 * gcov.c (print_version): Ditto.
24335 * gcov-tool.c (print_version): Ditto.
24336 * gengtype.c (create_file): Ditto.
24337 * doc/cpp.texi: Bump @copying's copyright year.
24338 * doc/cppinternals.texi: Ditto.
24339 * doc/gcc.texi: Ditto.
24340 * doc/gccint.texi: Ditto.
24341 * doc/gcov.texi: Ditto.
24342 * doc/install.texi: Ditto.
24343 * doc/invoke.texi: Ditto.
24345 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
24347 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
24350 2020-01-01 Jakub Jelinek <jakub@redhat.com>
24352 PR tree-optimization/93098
24353 * match.pd (popcount): For shift amounts, use integer_onep
24354 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
24355 tests. Make sure that precision is power of two larger than or equal
24356 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
24357 instead of ULL suffixed constants. Formatting fixes.
24359 Copyright (C) 2020 Free Software Foundation, Inc.
24361 Copying and distribution of this file, with or without modification,
24362 are permitted in any medium without royalty provided the copyright
24363 notice and this notice are preserved.