1 /* { dg-do compile } */
2 /* { dg-options "-mdejagnu-cpu=power10" } */
6 extern void abort (void);
8 int main (int argc
, short *argv
[])
10 vector
unsigned short input1
=
11 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
12 vector
unsigned short expected1
=
13 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
14 vector
unsigned short input2
=
15 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
16 vector
unsigned short expected2
=
17 { 0x0, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
18 vector
unsigned short input3
=
19 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
20 vector
unsigned short expected3
=
21 { 0x0, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
22 vector
unsigned short input4
=
23 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
24 vector
unsigned short expected4
=
25 { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
27 if (vec_strir_p (input1
))
29 if (!vec_strir_p (input2
))
31 if (!vec_strir_p (input3
))
33 if (!vec_strir_p (input4
))
38 /* Enforce that exactly four dot-form instructions which are properly biased
39 for the target's endianness implement this built-in. */
41 /* { dg-final { scan-assembler-times {\mvstrihr\.} 4 { target { be } } } } */
42 /* { dg-final { scan-assembler-times {\mvstrihr\M[^.]} 0 { target { be } } } } */
43 /* { dg-final { scan-assembler-times {\mvstrihl} 0 { target { be } } } } */
44 /* { dg-final { scan-assembler-times {\mvstrihl\.} 4 { target { le } } } } */
45 /* { dg-final { scan-assembler-times {\mvstrihl\M[^.]} 0 { target { le } } } } */
46 /* { dg-final { scan-assembler-times {\mvstrihr} 0 { target { le } } } } */