[testsuite] require sqrt_insn effective target where needed
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / vec-stril-7.c
blob6b39dfce562038ad53d6130ac8da3e805048673c
1 /* { dg-do run { target { power10_hw } } } */
2 /* { dg-do link { target { ! power10_hw } } } */
3 /* { dg-require-effective-target power10_ok } */
4 /* { dg-options "-mdejagnu-cpu=power10" } */
6 #include <altivec.h>
8 extern void abort (void);
10 /* Vector string isolate left-justified on array of signed short. */
11 vector signed short
12 silj (vector signed short arg)
14 return vec_stril (arg);
17 int main (int argc, short *argv [])
19 vector signed short input1 =
20 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
21 vector signed short expected1 =
22 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
23 vector signed short input2 =
24 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
25 vector signed short expected2 =
26 { 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
27 vector signed short input3 =
28 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
29 vector signed short expected3 =
30 { 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
31 vector signed short input4 =
32 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
33 vector signed short expected4 =
34 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
36 if (!vec_all_eq (silj (input1), expected1))
37 abort ();
38 if (!vec_all_eq (silj (input2), expected2))
39 abort ();
40 if (!vec_all_eq (silj (input3), expected3))
41 abort ();
42 if (!vec_all_eq (silj (input4), expected4))
43 abort ();