gcc/testsuite/gcc.target/powerpc/vec-init-10.c

   1 /* { dg-do compile } */
   2 /* { dg-require-effective-target lp64 } */
   3 /* { dg-require-effective-target powerpc_vsx_ok } */
   4 /* { dg-options "-O2 -mdejagnu-cpu=power8 -mvsx" } */
   5
   6 /* Check that we can optimize sldi + or to rldimi for vector int init.  */
   7
   8 vector unsigned int
   9 testu (unsigned int i1, unsigned int i2, unsigned int i3, unsigned int i4)
  10 {
  11   vector unsigned int v = {i1, i2, i3, i4};
  12   return v;
  13 }
  14
  15 vector signed int
  16 tests (signed int i1, signed int i2, signed int i3, signed int i4)
  17 {
  18   vector signed int v = {i1, i2, i3, i4};
  19   return v;
  20 }
  21
  22 /* { dg-final { scan-assembler-not {\msldi\M} } } */
  23 /* { dg-final { scan-assembler-not {\mor\M} } } */
  24 /* { dg-final { scan-assembler-times {\mrldimi\M} 4 } } */