1 /* { dg-do assemble { target { lp64 } } } */
2 /* { dg-options "-O2 -fno-align-functions -fno-asynchronous-unwind-tables -mtraceback=no -save-temps -mdejagnu-cpu=power5" } */
4 typedef int TImode
__attribute__ ((mode (TI
)));
6 void w1 (void *x
, TImode y
) { *(TImode
*) (x
+ 32767) = y
; }
7 void w2 (void *x
, TImode y
) { *(TImode
*) (x
+ 32766) = y
; }
8 void w3 (void *x
, TImode y
) { *(TImode
*) (x
+ 32765) = y
; }
9 void w4 (void *x
, TImode y
) { *(TImode
*) (x
+ 32764) = y
; }
10 void w5 (void *x
, TImode y
) { *(TImode
*) (x
+ 32763) = y
; }
11 void w6 (void *x
, TImode y
) { *(TImode
*) (x
+ 32762) = y
; }
12 void w7 (void *x
, TImode y
) { *(TImode
*) (x
+ 32761) = y
; }
13 void w8 (void *x
, TImode y
) { *(TImode
*) (x
+ 32760) = y
; }
14 void w9 (void *x
, TImode y
) { *(TImode
*) (x
+ 32759) = y
; }
15 void w10 (void *x
, TImode y
) { *(TImode
*) (x
+ 32758) = y
; }
16 void w11 (void *x
, TImode y
) { *(TImode
*) (x
+ 32757) = y
; }
17 void w12 (void *x
, TImode y
) { *(TImode
*) (x
+ 32756) = y
; }
18 void w13 (void *x
, TImode y
) { *(TImode
*) (x
+ 32755) = y
; }
19 void w14 (void *x
, TImode y
) { *(TImode
*) (x
+ 32754) = y
; }
20 void w15 (void *x
, TImode y
) { *(TImode
*) (x
+ 32753) = y
; }
21 void w16 (void *x
, TImode y
) { *(TImode
*) (x
+ 32752) = y
; }
22 void w17 (void *x
, TImode y
) { *(TImode
*) (x
+ 32751) = y
; }
23 void w18 (void *x
, TImode y
) { *(TImode
*) (x
+ 32750) = y
; }
24 void w19 (void *x
, TImode y
) { *(TImode
*) (x
+ 32749) = y
; }
25 void w20 (void *x
, TImode y
) { *(TImode
*) (x
+ 32748) = y
; }
27 TImode
r1 (void *x
) { return *(TImode
*) (x
+ 32767); }
28 TImode
r2 (void *x
) { return *(TImode
*) (x
+ 32766); }
29 TImode
r3 (void *x
) { return *(TImode
*) (x
+ 32765); }
30 TImode
r4 (void *x
) { return *(TImode
*) (x
+ 32764); }
31 TImode
r5 (void *x
) { return *(TImode
*) (x
+ 32763); }
32 TImode
r6 (void *x
) { return *(TImode
*) (x
+ 32762); }
33 TImode
r7 (void *x
) { return *(TImode
*) (x
+ 32761); }
34 TImode
r8 (void *x
) { return *(TImode
*) (x
+ 32760); }
35 TImode
r9 (void *x
) { return *(TImode
*) (x
+ 32759); }
36 TImode
r10 (void *x
) { return *(TImode
*) (x
+ 32758); }
37 TImode
r11 (void *x
) { return *(TImode
*) (x
+ 32757); }
38 TImode
r12 (void *x
) { return *(TImode
*) (x
+ 32756); }
39 TImode
r13 (void *x
) { return *(TImode
*) (x
+ 32755); }
40 TImode
r14 (void *x
) { return *(TImode
*) (x
+ 32754); }
41 TImode
r15 (void *x
) { return *(TImode
*) (x
+ 32753); }
42 TImode
r16 (void *x
) { return *(TImode
*) (x
+ 32752); }
43 TImode
r17 (void *x
) { return *(TImode
*) (x
+ 32751); }
44 TImode
r18 (void *x
) { return *(TImode
*) (x
+ 32750); }
45 TImode
r19 (void *x
) { return *(TImode
*) (x
+ 32749); }
46 TImode
r20 (void *x
) { return *(TImode
*) (x
+ 32748); }
48 /* test should really be == 616, see pr54110 */
49 /* When TImode is allowed in VSX registers, the allowable address modes for
50 TImode is just a single indirect address in order for the value to be loaded
51 and store in either GPR or VSX registers. This affects the generated code,
52 and it would cause this test to fail, when such an option is used. Fall
53 back to power5 to test the code. */
55 /* { dg-final { object-size text <= 700 } } */
56 /* { dg-final { scan-assembler-not "(st|l)fd" } } */
