gcc/testsuite/gcc.target/powerpc/pr84220-sld2.c

   1 /* PR target/84220 */
   2 /* Test to ensure we generate invalid parameter errors rather than an ICE
   3     when calling builtin_vec_sld() with invalid parameters.  */
   4 /* { dg-do compile } */
   5 /* { dg-require-effective-target powerpc_vsx_ok } */
   6 /* { dg-options "-maltivec -mvsx" } */
   7 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
   8
   9 #include <altivec.h>
  10
  11 typedef  vector  bool long long vbl_t;
  12 typedef  vector  signed long long vsl_t;
  13 typedef  vector  unsigned long long vul_t;
  14 typedef  vector  double vd_t;
  15
  16 void
  17 test_vbl ( vbl_t v1, vbl_t v2, vbl_t v3 )  \
  18 {
  19   __builtin_vec_sld(v1, v2, v3); /* { dg-error "invalid parameter combination for AltiVec intrinsic" } */
  20   __builtin_vec_sld(v1, v2, 3);
  21 }
  22
  23 void
  24 test_vsl ( vsl_t v1, vsl_t v2, vsl_t v3 )  \
  25 {
  26   __builtin_vec_sld(v1, v2, v3); /* { dg-error "invalid parameter combination for AltiVec intrinsic" } */
  27   __builtin_vec_sld(v1, v2, 3);
  28 }
  29
  30 void
  31 test_vul ( vul_t v1, vul_t v2, vul_t v3 )  \
  32 {
  33   __builtin_vec_sld(v1, v2, v3); /* { dg-error "invalid parameter combination for AltiVec intrinsic" } */
  34   __builtin_vec_sld(v1, v2, 3);
  35 }
  36
  37 void
  38 test_vd ( vd_t v1, vd_t v2, vd_t v3 )  \
  39 {
  40   __builtin_vec_sld(v1, v2, v3); /* { dg-error "invalid parameter combination for AltiVec intrinsic" } */
  41   __builtin_vec_sld(v1, v2, 3);
  42 }