gcc/testsuite/gcc.target/powerpc/pr104698-1.c

   1 /* { dg-require-effective-target int128     } */
   2 /* { dg-require-effective-target power10_ok } */
   3 /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
   4
   5 /* PR target/104698 involved a regression where on power10, conversion from
   6    long long to __int128_t generated mtvsrdd, vextsd2q, mfvsrd, and mfvsrld
   7    instructions instead of just a GPR sign extension.  This test makes sure the
   8    result is kept in the GPR registers.  */
   9
  10 __int128_t convert_1 (long long a)
  11 {
  12   return a;     /* sradi.  */
  13 }
  14
  15 /* Like convert_1, but make sure a normal offsettable load is done.  The
  16    pattern in vsx.md has support for generating lxvdsx if it is coming from
  17    memory.  Make sure when the gpr is used, a normal load with offset is still
  18    done.  */
  19
  20 __int128_t convert_2 (long long *p)
  21 {
  22   return p[2];  /* ld and sradi.  */
  23 }
  24
  25 /* { dg-final { scan-assembler-not   {\mmfvsrd\M}     } } */
  26 /* { dg-final { scan-assembler-not   {\mmfvsrld\M}    } } */
  27 /* { dg-final { scan-assembler-not   {\mmtvsrdd\M}    } } */
  28 /* { dg-final { scan-assembler-not   {\mvextsd2q\M}   } } */
  29 /* { dg-final { scan-assembler-times {\mld\M}       1 } } */
  30 /* { dg-final { scan-assembler-times {\msradi\M}    2 } } */