gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c

   1 /* { dg-do compile { target { powerpc*-*-* } } } */
   2 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
   3 /* { dg-require-effective-target powerpc_vsx_ok } */
   4 /* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */
   5
   6 #ifndef SIZE
   7 #define SIZE 1024
   8 #endif
   9
  10 #ifndef ALIGN
  11 #define ALIGN 32
  12 #endif
  13
  14 #ifndef TYPE
  15 #define TYPE long long
  16 #endif
  17
  18 #ifndef SIGN_TYPE
  19 #define SIGN_TYPE signed TYPE
  20 #endif
  21
  22 #ifndef UNS_TYPE
  23 #define UNS_TYPE unsigned TYPE
  24 #endif
  25
  26 #define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))
  27
  28 SIGN_TYPE       sa[SIZE] ALIGN_ATTR;
  29 SIGN_TYPE       sb[SIZE] ALIGN_ATTR;
  30 SIGN_TYPE       sc[SIZE] ALIGN_ATTR;
  31
  32 UNS_TYPE        ua[SIZE] ALIGN_ATTR;
  33 UNS_TYPE        ub[SIZE] ALIGN_ATTR;
  34 UNS_TYPE        uc[SIZE] ALIGN_ATTR;
  35
  36 void
  37 sign_add (void)
  38 {
  39   unsigned long i;
  40
  41   for (i = 0; i < SIZE; i++)
  42     sa[i] = sb[i] + sc[i];
  43 }
  44
  45 void
  46 sign_sub (void)
  47 {
  48   unsigned long i;
  49
  50   for (i = 0; i < SIZE; i++)
  51     sa[i] = sb[i] - sc[i];
  52 }
  53
  54 void
  55 sign_shift_left (void)
  56 {
  57   unsigned long i;
  58
  59   for (i = 0; i < SIZE; i++)
  60     sa[i] = sb[i] << sc[i];
  61 }
  62
  63 void
  64 sign_shift_right (void)
  65 {
  66   unsigned long i;
  67
  68   for (i = 0; i < SIZE; i++)
  69     sa[i] = sb[i] >> sc[i];
  70 }
  71
  72 void
  73 sign_max (void)
  74 {
  75   unsigned long i;
  76
  77   for (i = 0; i < SIZE; i++)
  78     sa[i] = (sb[i] > sc[i]) ? sb[i] : sc[i];
  79 }
  80
  81 void
  82 sign_min (void)
  83 {
  84   unsigned long i;
  85
  86   for (i = 0; i < SIZE; i++)
  87     sa[i] = (sb[i] < sc[i]) ? sb[i] : sc[i];
  88 }
  89
  90 void
  91 sign_abs (void)
  92 {
  93   unsigned long i;
  94
  95   for (i = 0; i < SIZE; i++)
  96     sa[i] = (sb[i] < 0) ? -sb[i] : sb[i];       /* xor, vsubudm, vmaxsd.  */
  97 }
  98
  99 void
 100 sign_eq (SIGN_TYPE val1, SIGN_TYPE val2)
 101 {
 102   unsigned long i;
 103
 104   for (i = 0; i < SIZE; i++)
 105     sa[i] = (sb[i] == sc[i]) ? val1 : val2;
 106 }
 107
 108 void
 109 sign_lt (SIGN_TYPE val1, SIGN_TYPE val2)
 110 {
 111   unsigned long i;
 112
 113   for (i = 0; i < SIZE; i++)
 114     sa[i] = (sb[i] < sc[i]) ? val1 : val2;
 115 }
 116
 117 void
 118 uns_add (void)
 119 {
 120   unsigned long i;
 121
 122   for (i = 0; i < SIZE; i++)
 123     ua[i] = ub[i] + uc[i];
 124 }
 125
 126 void
 127 uns_sub (void)
 128 {
 129   unsigned long i;
 130
 131   for (i = 0; i < SIZE; i++)
 132     ua[i] = ub[i] - uc[i];
 133 }
 134
 135 void
 136 uns_shift_left (void)
 137 {
 138   unsigned long i;
 139
 140   for (i = 0; i < SIZE; i++)
 141     ua[i] = ub[i] << uc[i];
 142 }
 143
 144 void
 145 uns_shift_right (void)
 146 {
 147   unsigned long i;
 148
 149   for (i = 0; i < SIZE; i++)
 150     ua[i] = ub[i] >> uc[i];
 151 }
 152
 153 void
 154 uns_max (void)
 155 {
 156   unsigned long i;
 157
 158   for (i = 0; i < SIZE; i++)
 159     ua[i] = (ub[i] > uc[i]) ? ub[i] : uc[i];
 160 }
 161
 162 void
 163 uns_min (void)
 164 {
 165   unsigned long i;
 166
 167   for (i = 0; i < SIZE; i++)
 168     ua[i] = (ub[i] < uc[i]) ? ub[i] : uc[i];
 169 }
 170
 171 void
 172 uns_eq (UNS_TYPE val1, UNS_TYPE val2)
 173 {
 174   unsigned long i;
 175
 176   for (i = 0; i < SIZE; i++)
 177     ua[i] = (ub[i] == uc[i]) ? val1 : val2;
 178 }
 179
 180 void
 181 uns_lt (UNS_TYPE val1, UNS_TYPE val2)
 182 {
 183   unsigned long i;
 184
 185   for (i = 0; i < SIZE; i++)
 186     ua[i] = (ub[i] < uc[i]) ? val1 : val2;
 187 }
 188
 189 /* { dg-final { scan-assembler-times "\[\t \]vaddudm\[\t \]"  2 } } */
 190 /* { dg-final { scan-assembler-times "\[\t \]vsubudm\[\t \]"  3 } } */
 191 /* { dg-final { scan-assembler-times "\[\t \]vmaxsd\[\t \]"   2 } } */
 192 /* { dg-final { scan-assembler-times "\[\t \]vmaxud\[\t \]"   1 } } */
 193 /* { dg-final { scan-assembler-times "\[\t \]vminsd\[\t \]"   1 } } */
 194 /* { dg-final { scan-assembler-times "\[\t \]vminud\[\t \]"   1 } } */
 195 /* { dg-final { scan-assembler-times "\[\t \]vsld\[\t \]"     2 } } */
 196 /* { dg-final { scan-assembler-times "\[\t \]vsrad\[\t \]"    1 } } */
 197 /* { dg-final { scan-assembler-times "\[\t \]vsrd\[\t \]"     1 } } */
 198 /* { dg-final { scan-assembler-times "\[\t \]vcmpequd\[\t \]" 2 } } */
 199 /* { dg-final { scan-assembler-times "\[\t \]vcmpgtsd\[\t \]" 1 } } */
 200 /* { dg-final { scan-assembler-times "\[\t \]vcmpgtud\[\t \]" 1 } } */