gcc/testsuite/gcc.target/powerpc/mul-vectorize-4.c

   1 /* { dg-require-effective-target power10_ok } */
   2 /* { dg-require-effective-target int128 } */
   3 /* { dg-options "-mdejagnu-cpu=power10 -O2 -ftree-vectorize -fno-vect-cost-model -fno-unroll-loops -fdump-tree-vect-details" } */
   4
   5 /* Test vectorizer can exploit ISA 3.1 instructions Vector Multiply
   6    High Signed/Unsigned Doubleword for both signed and unsigned long
   7    long high part multiplication.  */
   8
   9 #define N 128
  10
  11 extern signed long long sll_a[N], sll_b[N], sll_c[N];
  12 extern unsigned long long ull_a[N], ull_b[N], ull_c[N];
  13
  14 typedef signed __int128 s128;
  15 typedef unsigned __int128 u128;
  16
  17 __attribute__ ((noipa)) void
  18 test_sll ()
  19 {
  20   for (int i = 0; i < N; i++)
  21     sll_c[i] = ((s128) sll_a[i] * (s128) sll_b[i]) >> 64;
  22 }
  23
  24 __attribute__ ((noipa)) void
  25 test_ull ()
  26 {
  27   for (int i = 0; i < N; i++)
  28     ull_c[i] = ((u128) ull_a[i] * (u128) ull_b[i]) >> 64;
  29 }
  30
  31 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
  32 /* { dg-final { scan-assembler-times {\mvmulhsd\M} 1 } } */
  33 /* { dg-final { scan-assembler-times {\mvmulhud\M} 1 } } */