1 /* Verify that overloaded built-ins for vec_mul with long long
2 inputs produce the right results. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_vsx_ok } */
6 /* { dg-options "-maltivec -mvsx" } */
7 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
8 /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
12 vector
signed long long
13 test3 (vector
signed long long x
, vector
signed long long y
)
15 return vec_mul (x
, y
);
18 vector
unsigned long long
19 test6 (vector
unsigned long long x
, vector
unsigned long long y
)
21 return vec_mul (x
, y
);
24 /* Power10 can generate the vmulld instruction even in 32-bit. Before power10,
25 we limit the code to lp64, since 32-bit cannot generate the mulld
27 /* { dg-final { scan-assembler-times {\mmulld\M} 4 { target { lp64 && { ! has_arch_pwr10 } } } } } */
28 /* { dg-final { scan-assembler-times {\mvmulld\M} 2 { target { has_arch_pwr10 } } } } */