gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c

   1 /* Verify that overloaded built-ins for vec_orc and vec_nand with short
   2  * inputs produce the right results.  These intrinsics (vec_orc,
   3  * vec_nand) were added as part of ISA 2.07 (P8).  */
   4
   5 /* { dg-do compile } */
   6 /* { dg-require-effective-target powerpc_vsx_ok } */
   7 /* { dg-options "-mvsx -O1" } */
   8 /* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
   9
  10 #include <altivec.h>
  11
  12 vector signed short
  13 test1_orc (vector bool short x, vector signed short y)
  14 {
  15   vector signed short *foo;
  16   *foo += vec_orc (x, y);
  17   return *foo;
  18 }
  19
  20 vector signed short
  21 test1_nand (vector bool short x, vector signed short y)
  22 {
  23   vector signed short *foo;
  24   *foo += vec_nand (x, y);
  25   return *foo;
  26 }
  27
  28 vector signed short
  29 test2_orc (vector signed short x, vector bool short y)
  30 {
  31   vector signed short *foo;
  32   *foo += vec_orc (x, y);
  33   return *foo;
  34 }
  35
  36 vector signed short
  37 test2_nand (vector signed short x, vector bool short y)
  38 {
  39   vector signed short *foo;
  40   *foo += vec_nand (x, y);
  41   return *foo;
  42 }
  43
  44 vector signed short
  45 test3_orc (vector signed short x, vector signed short y)
  46 {
  47   vector signed short *foo;
  48   *foo += vec_orc (x, y);
  49   return *foo;
  50 }
  51
  52 vector signed short
  53 test3_nand (vector signed short x, vector signed short y)
  54 {
  55   vector signed short *foo;
  56   *foo += vec_nand (x, y);
  57   return *foo;
  58 }
  59
  60 vector unsigned short
  61 test4_orc (vector bool short x, vector unsigned short y)
  62 {
  63   vector unsigned short *foo;
  64   *foo += vec_orc (x, y);
  65   return *foo;
  66 }
  67
  68 vector unsigned short
  69 test4_nand (vector bool short x, vector unsigned short y)
  70 {
  71   vector unsigned short *foo;
  72   *foo += vec_nand (x, y);
  73   return *foo;
  74 }
  75
  76 vector unsigned short
  77 test5_orc (vector unsigned short x, vector bool short y)
  78 {
  79   vector unsigned short *foo;
  80   *foo += vec_orc (x, y);
  81   return *foo;
  82 }
  83
  84 vector unsigned short
  85 test5_nand (vector unsigned short x, vector bool short y)
  86 {
  87   vector unsigned short *foo;
  88   *foo += vec_nand (x, y);
  89   return *foo;
  90 }
  91
  92 vector unsigned short
  93 test6_orc (vector unsigned short x, vector unsigned short y)
  94 {
  95   vector unsigned short *foo;
  96   *foo += vec_orc (x, y);
  97   return *foo;
  98 }
  99
 100 vector unsigned short
 101 test6_nand (vector unsigned short x, vector unsigned short y)
 102 {
 103   vector unsigned short *foo;
 104   *foo += vec_nand (x, y);
 105   return *foo;
 106 }
 107
 108 /* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
 109 /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */