1 /* Verify that overloaded built-ins for vec_insert () with char
2 inputs produce the right codegen. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_vsx_ok } */
6 /* { dg-options "-O2 -mdejagnu-cpu=power8 -mvsx" } */
8 /* The below contains vec_insert () calls with both variable and constant
9 values. Only the constant value calls are early-gimple folded, but all
10 are tested for coverage. */
14 vector
bool char testub_var (unsigned char x
, vector
bool char v
, signed int i
)
16 return vec_insert (x
, v
, i
);
18 vector
signed char testss_var (signed char x
, vector
signed char v
, signed int i
)
20 return vec_insert (x
, v
, i
);
22 vector
unsigned char testsu_var (signed char x
, vector
unsigned char v
, signed int i
)
24 return vec_insert (x
, v
, i
);
26 vector
unsigned char testuu_var (unsigned char x
, vector
unsigned char v
, signed int i
)
28 return vec_insert (x
, v
, i
);
30 vector
bool char testub_cst (unsigned char x
, vector
bool char v
)
32 return vec_insert (x
, v
, 12);
34 vector
signed char testss_cst (signed char x
, vector
signed char v
)
36 return vec_insert (x
, v
, 12);
38 vector
unsigned char testsu_cst (signed char x
, vector
unsigned char v
)
40 return vec_insert (x
, v
, 12);
42 vector
unsigned char testuu_cst (unsigned char x
, vector
unsigned char v
)
44 return vec_insert (x
, v
, 12);
47 /* no store per _var test */
48 /* { dg-final { scan-assembler-times {\mstvx\M|\mstxvw4x\M} 0 { target lp64 } } } */
49 /* one store-byte per test */
50 /* { dg-final { scan-assembler-times {\mstb\M} 4 { target lp64 } } } */
51 /* one load per test */
52 /* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 8 { target le } } } */
53 /* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 4 { target { be && lp64 } } } } */
55 /* one lvebx per _cst test.*/
56 /* { dg-final { scan-assembler-times {\mlvebx\M} 4 } } */
57 /* one vperm per _cst test.*/
58 /* { dg-final { scan-assembler-times {\mvperm\M} 12 { target lp64 } } } */
61 /* { dg-final { scan-assembler-times {\mstvx\M|\mstxvw4x\M} 0 { target ilp32 } } } */
62 /* { dg-final { scan-assembler-times {\mstb\M} 4 { target ilp32 } } } */
63 /* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 4 { target { be && ilp32 } } } } */
64 /* { dg-final { scan-assembler-times {\mvperm\M} 12 { target ilp32 } } } */