[testsuite] require sqrt_insn effective target where needed
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / float128-hw4.c
blobc07d34dc33bb7f09ed3bb01ec8035f6e59f4c8ed
1 /* { dg-do compile { target lp64 } } */
2 /* { dg-require-effective-target powerpc_vsx_ok } */
3 /* { dg-require-effective-target float128 } */
4 /* { dg-options "-mvsx -O2 -mabi=ieeelongdouble -Wno-psabi" } */
5 /* { dg-additional-options "-mdejagnu-cpu=power9" { target { ! has_arch_pwr9 } } } */
7 /* Insure that the ISA 3.0 IEEE 128-bit floating point built-in functions can
8 be used with long double when the default is IEEE 128-bit. */
10 #ifndef TYPE
11 #define TYPE long double
12 #endif
14 unsigned int
15 get_double_exponent (double a)
17 return __builtin_vec_scalar_extract_exp (a);
20 unsigned int
21 get_float128_exponent (TYPE a)
23 return __builtin_vec_scalar_extract_exp (a);
26 unsigned long
27 get_double_mantissa (double a)
29 return __builtin_vec_scalar_extract_sig (a);
32 __uint128_t
33 get_float128_mantissa (TYPE a)
35 return __builtin_vec_scalar_extract_sig (a);
38 double
39 set_double_exponent_ulong (unsigned long a, unsigned long e)
41 return __builtin_vec_scalar_insert_exp (a, e);
44 TYPE
45 set_float128_exponent_uint128 (__uint128_t a, unsigned long e)
47 return __builtin_vec_scalar_insert_exp (a, e);
50 double
51 set_double_exponent_double (double a, unsigned long e)
53 return __builtin_vec_scalar_insert_exp (a, e);
56 TYPE
57 set_float128_exponent_float128 (TYPE a, __uint128_t e)
59 return __builtin_vec_scalar_insert_exp (a, e);
62 TYPE
63 sqrt_odd (TYPE a)
65 return __builtin_sqrtf128_round_to_odd (a);
68 double
69 trunc_odd (TYPE a)
71 return __builtin_truncf128_round_to_odd (a);
74 TYPE
75 add_odd (TYPE a, TYPE b)
77 return __builtin_addf128_round_to_odd (a, b);
80 TYPE
81 sub_odd (TYPE a, TYPE b)
83 return __builtin_subf128_round_to_odd (a, b);
86 TYPE
87 mul_odd (TYPE a, TYPE b)
89 return __builtin_mulf128_round_to_odd (a, b);
92 TYPE
93 div_odd (TYPE a, TYPE b)
95 return __builtin_divf128_round_to_odd (a, b);
98 TYPE
99 fma_odd (TYPE a, TYPE b, TYPE c)
101 return __builtin_fmaf128_round_to_odd (a, b, c);
104 TYPE
105 fms_odd (TYPE a, TYPE b, TYPE c)
107 return __builtin_fmaf128_round_to_odd (a, b, -c);
110 TYPE
111 nfma_odd (TYPE a, TYPE b, TYPE c)
113 return -__builtin_fmaf128_round_to_odd (a, b, c);
116 TYPE
117 nfms_odd (TYPE a, TYPE b, TYPE c)
119 return -__builtin_fmaf128_round_to_odd (a, b, -c);
122 /* { dg-final { scan-assembler {\mxsiexpdp\M} } } */
123 /* { dg-final { scan-assembler {\mxsiexpqp\M} } } */
124 /* { dg-final { scan-assembler {\mxsxexpdp\M} } } */
125 /* { dg-final { scan-assembler {\mxsxexpqp\M} } } */
126 /* { dg-final { scan-assembler {\mxsxsigdp\M} } } */
127 /* { dg-final { scan-assembler {\mxsxsigqp\M} } } */
128 /* { dg-final { scan-assembler {\mxsaddqpo\M} } } */
129 /* { dg-final { scan-assembler {\mxsdivqpo\M} } } */
130 /* { dg-final { scan-assembler {\mxsmaddqpo\M} } } */
131 /* { dg-final { scan-assembler {\mxsmsubqpo\M} } } */
132 /* { dg-final { scan-assembler {\mxsmulqpo\M} } } */
133 /* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
134 /* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */
135 /* { dg-final { scan-assembler {\mxssqrtqpo\M} } } */
136 /* { dg-final { scan-assembler {\mxssubqpo\M} } } */
137 /* { dg-final { scan-assembler-not {\mbl\M} } } */