gcc/rtl.def

   1 /* This file contains the definitions and documentation for the
   2    Register Transfer Expressions (rtx's) that make up the
   3    Register Transfer Language (rtl) used in the Back End of the GNU compiler.
   4    Copyright (C) 1987, 88, 92, 94, 95, 97, 98, 1999 Free Software Foundation, Inc.
   5
   6 This file is part of GNU CC.
   7
   8 GNU CC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 2, or (at your option)
  11 any later version.
  12
  13 GNU CC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GNU CC; see the file COPYING.  If not, write to
  20 the Free Software Foundation, 59 Temple Place - Suite 330,
  21 Boston, MA 02111-1307, USA.  */
  22
  23
  24 /* Expression definitions and descriptions for all targets are in this file.
  25    Some will not be used for some targets.
  26
  27    The fields in the cpp macro call "DEF_RTL_EXPR()"
  28    are used to create declarations in the C source of the compiler.
  29
  30    The fields are:
  31
  32    1.  The internal name of the rtx used in the C source.
  33    It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
  34    By convention these are in UPPER_CASE.
  35
  36    2.  The name of the rtx in the external ASCII format read by
  37    read_rtx(), and printed by print_rtx().
  38    These names are stored in rtx_name[].
  39    By convention these are the internal (field 1) names in lower_case.
  40
  41    3.  The print format, and type of each rtx->fld[] (field) in this rtx.
  42    These formats are stored in rtx_format[].
  43    The meaning of the formats is documented in front of this array in rtl.c
  44
  45    4.  The class of the rtx.  These are stored in rtx_class and are accessed
  46    via the GET_RTX_CLASS macro.  They are defined as follows:
  47
  48      "o" an rtx code that can be used to represent an object (e.g, REG, MEM)
  49      "<" an rtx code for a comparison (e.g, EQ, NE, LT)
  50      "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
  51      "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
  52      "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
  53      "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
  54      "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
  55      "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
  56      "m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
  57      "g" an rtx code for grouping insns together (e.g, GROUP_PARALLEL)
  58      "x" everything else
  59
  60    */
  61
  62 /* ---------------------------------------------------------------------
  63    Expressions (and "meta" expressions) used for structuring the
  64    rtl representation of a program.
  65    --------------------------------------------------------------------- */
  66
  67 /* an expression code name unknown to the reader */
  68 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
  69
  70 /* (NIL) is used by rtl reader and printer to represent a null pointer.  */
  71
  72 DEF_RTL_EXPR(NIL, "nil", "*", 'x')
  73
  74 /* ---------------------------------------------------------------------
  75    Expressions used in constructing lists.
  76    --------------------------------------------------------------------- */
  77
  78 /* a linked list of expressions */
  79 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
  80
  81 /* a linked list of instructions.
  82    The insns are represented in print by their uids.  */
  83 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
  84
  85 /* ----------------------------------------------------------------------
  86    Expression types for machine descriptions.
  87    These do not appear in actual rtl code in the compiler.
  88    ---------------------------------------------------------------------- */
  89
  90 /* Appears only in machine descriptions.
  91    Means use the function named by the second arg (the string)
  92    as a predicate; if matched, store the structure that was matched
  93    in the operand table at index specified by the first arg (the integer).
  94    If the second arg is the null string, the structure is just stored.
  95
  96    A third string argument indicates to the register allocator restrictions
  97    on where the operand can be allocated.
  98
  99    If the target needs no restriction on any instruction this field should
 100    be the null string.
 101
 102    The string is prepended by:
 103    '=' to indicate the operand is only written to.
 104    '+' to indicate the operand is both read and written to.
 105
 106    Each character in the string represents an allocable class for an operand.
 107    'g' indicates the operand can be any valid class.
 108    'i' indicates the operand can be immediate (in the instruction) data.
 109    'r' indicates the operand can be in a register.
 110    'm' indicates the operand can be in memory.
 111    'o' a subset of the 'm' class.  Those memory addressing modes that
 112        can be offset at compile time (have a constant added to them).
 113
 114    Other characters indicate target dependent operand classes and
 115    are described in each target's machine description.
 116
 117    For instructions with more than one operand, sets of classes can be
 118    separated by a comma to indicate the appropriate multi-operand constraints.
 119    There must be a 1 to 1 correspondence between these sets of classes in
 120    all operands for an instruction.
 121    */
 122 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
 123
 124 /* Appears only in machine descriptions.
 125    Means match a SCRATCH or a register.  When used to generate rtl, a
 126    SCRATCH is generated.  As for MATCH_OPERAND, the mode specifies
 127    the desired mode and the first argument is the operand number.
 128    The second argument is the constraint.  */
 129 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
 130
 131 /* Appears only in machine descriptions.
 132    Means match only something equal to what is stored in the operand table
 133    at the index specified by the argument.  */
 134 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
 135
 136 /* Appears only in machine descriptions.
 137    Means apply a predicate, AND match recursively the operands of the rtx.
 138    Operand 0 is the operand-number, as in match_operand.
 139    Operand 1 is a predicate to apply (as a string, a function name).
 140    Operand 2 is a vector of expressions, each of which must match
 141    one subexpression of the rtx this construct is matching.  */
 142 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
 143
 144 /* Appears only in machine descriptions.
 145    Means to match a PARALLEL of arbitrary length.  The predicate is applied
 146    to the PARALLEL and the initial expressions in the PARALLEL are matched.
 147    Operand 0 is the operand-number, as in match_operand.
 148    Operand 1 is a predicate to apply to the PARALLEL.
 149    Operand 2 is a vector of expressions, each of which must match the
 150    corresponding element in the PARALLEL.  */
 151 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
 152
 153 /* Appears only in machine descriptions.
 154    Means match only something equal to what is stored in the operand table
 155    at the index specified by the argument.  For MATCH_OPERATOR.  */
 156 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
 157
 158 /* Appears only in machine descriptions.
 159    Means match only something equal to what is stored in the operand table
 160    at the index specified by the argument.  For MATCH_PARALLEL.  */
 161 DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
 162
 163 /* Appears only in machine descriptions.
 164    Should be used only in attribute tests.
 165    The predicate in operand 0 is applied to the whole insn being checked.  */
 166 DEF_RTL_EXPR(MATCH_INSN, "match_insn", "s", 'm')
 167
 168 /* Appears only in machine descriptions.
 169    Operand 0 is the operand number, as in match_operand.
 170    Operand 1 is the predicate to apply to the insn.  */
 171 DEF_RTL_EXPR(MATCH_INSN2, "match_insn2", "is", 'm')
 172
 173 /* Appears only in machine descriptions.
 174    Defines the pattern for one kind of instruction.
 175    Operand:
 176    0: names this instruction.
 177       If the name is the null string, the instruction is in the
 178       machine description just to be recognized, and will never be emitted by
 179       the tree to rtl expander.
 180    1: is the pattern.
 181    2: is a string which is a C expression
 182       giving an additional condition for recognizing this pattern.
 183       A null string means no extra condition.
 184    3: is the action to execute if this pattern is matched.
 185       If this assembler code template starts with a * then it is a fragment of
 186       C code to run to decide on a template to use.  Otherwise, it is the
 187       template to use.
 188    4: optionally, a vector of attributes for this insn.
 189      */
 190 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x')
 191
 192 /* Definition of a peephole optimization.
 193    1st operand: vector of insn patterns to match
 194    2nd operand: C expression that must be true
 195    3rd operand: template or C code to produce assembler output.
 196    4: optionally, a vector of attributes for this insn.
 197      */
 198 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x')
 199
 200 /* Definition of a split operation.
 201    1st operand: insn pattern to match
 202    2nd operand: C expression that must be true
 203    3rd operand: vector of insn patterns to place into a SEQUENCE
 204    4th operand: optionally, some C code to execute before generating the
 205         insns.  This might, for example, create some RTX's and store them in
 206         elements of `recog_operand' for use by the vector of insn-patterns.
 207         (`operands' is an alias here for `recog_operand').   */
 208 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
 209
 210 /* Definition of an RTL peephole operation.
 211    Follows the same arguments as define_split.  */
 212 DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", 'x')
 213
 214 /* Definition of a combiner pattern.
 215    Operands not defined yet.  */
 216 DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x')
 217
 218 /* Define how to generate multiple insns for a standard insn name.
 219    1st operand: the insn name.
 220    2nd operand: vector of insn-patterns.
 221         Use match_operand to substitute an element of `recog_operand'.
 222    3rd operand: C expression that must be true for this to be available.
 223         This may not test any operands.
 224    4th operand: Extra C code to execute before generating the insns.
 225         This might, for example, create some RTX's and store them in
 226         elements of `recog_operand' for use by the vector of insn-patterns.
 227         (`operands' is an alias here for `recog_operand').  */
 228 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
 229
 230 /* Define a requirement for delay slots.
 231    1st operand: Condition involving insn attributes that, if true,
 232                 indicates that the insn requires the number of delay slots
 233                 shown.
 234    2nd operand: Vector whose length is the three times the number of delay
 235                 slots required.
 236                 Each entry gives three conditions, each involving attributes.
 237                 The first must be true for an insn to occupy that delay slot
 238                 location.  The second is true for all insns that can be
 239                 annulled if the branch is true and the third is true for all
 240                 insns that can be annulled if the branch is false.
 241
 242    Multiple DEFINE_DELAYs may be present.  They indicate differing
 243    requirements for delay slots.  */
 244 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
 245
 246 /* Define a set of insns that requires a function unit.  This means that
 247    these insns produce their result after a delay and that there may be
 248    restrictions on the number of insns of this type that can be scheduled
 249    simultaneously.
 250
 251    More than one DEFINE_FUNCTION_UNIT can be specified for a function unit.
 252    Each gives a set of operations and associated delays.  The first three
 253    operands must be the same for each operation for the same function unit.
 254
 255    All delays are specified in cycles.
 256
 257    1st operand: Name of function unit (mostly for documentation)
 258    2nd operand: Number of identical function units in CPU
 259    3rd operand: Total number of simultaneous insns that can execute on this
 260                 function unit; 0 if unlimited.
 261    4th operand: Condition involving insn attribute, that, if true, specifies
 262                 those insns that this expression applies to.
 263    5th operand: Constant delay after which insn result will be
 264                 available.
 265    6th operand: Delay until next insn can be scheduled on the function unit
 266                 executing this operation.  The meaning depends on whether or
 267                 not the next operand is supplied.
 268    7th operand: If this operand is not specified, the 6th operand gives the
 269                 number of cycles after the instruction matching the 4th
 270                 operand begins using the function unit until a subsequent
 271                 insn can begin.  A value of zero should be used for a
 272                 unit with no issue constraints.  If only one operation can
 273                 be executed a time and the unit is busy for the entire time,
 274                 the 3rd operand should be specified as 1, the 6th operand
 275                 should be specified as 0, and the 7th operand should not
 276                 be specified.
 277
 278                 If this operand is specified, it is a list of attribute
 279                 expressions.  If an insn for which any of these expressions
 280                 is true is currently executing on the function unit, the
 281                 issue delay will be given by the 6th operand.  Otherwise,
 282                 the insn can be immediately scheduled (subject to the limit
 283                 on the number of simultaneous operations executing on the
 284                 unit.)  */
 285 DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
 286
 287 /* Define attribute computation for `asm' instructions.  */
 288 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
 289
 290 /* SEQUENCE appears in the result of a `gen_...' function
 291    for a DEFINE_EXPAND that wants to make several insns.
 292    Its elements are the bodies of the insns that should be made.
 293    `emit_insn' takes the SEQUENCE apart and makes separate insns.  */
 294 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
 295
 296 /* Refers to the address of its argument.
 297    This appears only in machine descriptions, indicating that
 298    any expression that would be acceptable as the operand of MEM
 299    should be matched.  */
 300 DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
 301
 302 /* ----------------------------------------------------------------------
 303    Expressions used for insn attributes.  These also do not appear in
 304    actual rtl code in the compiler.
 305    ---------------------------------------------------------------------- */
 306
 307 /* Definition of an insn attribute.
 308    1st operand: name of the attribute
 309    2nd operand: comma-separated list of possible attribute values
 310    3rd operand: expression for the default value of the attribute. */
 311 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
 312
 313 /* Marker for the name of an attribute. */
 314 DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
 315
 316 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
 317    in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
 318    pattern.
 319
 320    (set_attr "name" "value") is equivalent to
 321    (set (attr "name") (const_string "value"))  */
 322 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
 323
 324 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
 325    specify that attribute values are to be assigned according to the
 326    alternative matched.
 327
 328    The following three expressions are equivalent:
 329
 330    (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
 331                             (eq_attrq "alternative" "2") (const_string "a2")]
 332                            (const_string "a3")))
 333    (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
 334                                  (const_string "a3")])
 335    (set_attr "att" "a1,a2,a3")
 336  */
 337 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
 338
 339 /* A conditional expression true if the value of the specified attribute of
 340    the current insn equals the specified value.  The first operand is the
 341    attribute name and the second is the comparison value.  */
 342 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
 343
 344 /* A conditional expression which is true if the specified flag is
 345    true for the insn being scheduled in reorg.
 346
 347    genattr.c defines the following flags which can be tested by
 348    (attr_flag "foo") expressions in eligible_for_delay.
 349
 350    forward, backward, very_likely, likely, very_unlikely, and unlikely.  */
 351
 352 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
 353
 354 /* ----------------------------------------------------------------------
 355    Expression types used for things in the instruction chain.
 356
 357    All formats must start with "iuu" to handle the chain.
 358    Each insn expression holds an rtl instruction and its semantics
 359    during back-end processing.
 360    See macros's in "rtl.h" for the meaning of each rtx->fld[].
 361
 362    ---------------------------------------------------------------------- */
 363
 364 /* An instruction that cannot jump.  */
 365 DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i')
 366
 367 /* An instruction that can possibly jump.
 368    Fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 369 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i')
 370
 371 /* An instruction that can possibly call a subroutine
 372    but which will not change which instruction comes next
 373    in the current function.
 374    Field ( rtx->fld[7] ) is CALL_INSN_FUNCTION_USAGE.
 375    All other fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 376 DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueieee", 'i')
 377
 378 /* A marker that indicates that control will not flow through.  */
 379 DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x')
 380
 381 /* Holds a label that is followed by instructions.
 382    Operand:
 383    3: is a number that is unique in the entire compilation.
 384    4: is the user-given name of the label, if any.
 385    5: is used in jump.c for the use-count of the label.
 386    6: is used in flow.c to point to the chain of label_ref's to this label.  */
 387 DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis00", 'x')
 388
 389 /* Say where in the code a source line starts, for symbol table's sake.
 390    Contains a filename and a line number.  Line numbers <= 0 are special:
 391    0 is used in a dummy placed at the front of every function
 392       just so there will never be a need to delete the first insn;
 393    -1 indicates a dummy; insns to be deleted by flow analysis and combining
 394       are really changed to NOTEs with a number of -1.
 395    -2 means beginning of a name binding contour; output N_LBRAC.
 396    -3 means end of a contour; output N_RBRAC.  */
 397 DEF_RTL_EXPR(NOTE, "note", "iuu0n", 'x')
 398
 399 /* ----------------------------------------------------------------------
 400    Top level constituents of INSN, JUMP_INSN and CALL_INSN.
 401    ---------------------------------------------------------------------- */
 402
 403 /* Several operations to be done in parallel.  */
 404 DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
 405
 406 /* A string that is passed through to the assembler as input.
 407      One can obviously pass comments through by using the
 408      assembler comment syntax.
 409      These occur in an insn all by themselves as the PATTERN.
 410      They also appear inside an ASM_OPERANDS
 411      as a convenient way to hold a string.  */
 412 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
 413
 414 /* An assembler instruction with operands.
 415    1st operand is the instruction template.
 416    2nd operand is the constraint for the output.
 417    3rd operand is the number of the output this expression refers to.
 418      When an insn stores more than one value, a separate ASM_OPERANDS
 419      is made for each output; this integer distinguishes them.
 420    4th is a vector of values of input operands.
 421    5th is a vector of modes and constraints for the input operands.
 422      Each element is an ASM_INPUT containing a constraint string
 423      and whose mode indicates the mode of the input operand.
 424    6th is the name of the containing source file.
 425    7th is the source line number.  */
 426 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
 427
 428 /* A machine-specific operation.
 429    1st operand is a vector of operands being used by the operation so that
 430      any needed reloads can be done.
 431    2nd operand is a unique value saying which of a number of machine-specific
 432      operations is to be performed.
 433    (Note that the vector must be the first operand because of the way that
 434    genrecog.c record positions within an insn.)
 435    This can occur all by itself in a PATTERN, as a component of a PARALLEL,
 436    or inside an expression.  */
 437 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
 438
 439 /* Similar, but a volatile operation and one which may trap.  */
 440 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
 441
 442 /* Vector of addresses, stored as full words.  */
 443 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
 444 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
 445
 446 /* Vector of address differences X0 - BASE, X1 - BASE, ...
 447    First operand is BASE; the vector contains the X's.
 448    The machine mode of this rtx says how much space to leave
 449    for each difference and is adjusted by branch shortening if
 450    CASE_VECTOR_SHORTEN_MODE is defined.
 451    The third and fourth operands store the target labels with the
 452    minimum and maximum addresses respectively.
 453    The fifth operand stores flags for use by branch shortening.
 454   Set at the start of shorten_branches:
 455    min_align: the minimum alignment for any of the target labels.
 456    base_after_vec: true iff BASE is after the ADDR_DIFF_VEC.
 457    min_after_vec: true iff minimum addr target label is after the ADDR_DIFF_VEC.
 458    max_after_vec: true iff maximum addr target label is after the ADDR_DIFF_VEC.
 459    min_after_base: true iff minimum address target label is after BASE.
 460    max_after_base: true iff maximum address target label is after BASE.
 461   Set by the actual branch shortening process:
 462    offset_unsigned: true iff offsets have to be treated as unsigned.
 463    scale: scaling that is necessary to make offsets fit into the mode.
 464
 465    The third, fourth and fifth operands are only valid when
 466    CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
 467    compilations.  */
 468
 469 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x')
 470
 471 /* ----------------------------------------------------------------------
 472    At the top level of an instruction (perhaps under PARALLEL).
 473    ---------------------------------------------------------------------- */
 474
 475 /* Assignment.
 476    Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
 477    Operand 2 is the value stored there.
 478    ALL assignment must use SET.
 479    Instructions that do multiple assignments must use multiple SET,
 480    under PARALLEL.  */
 481 DEF_RTL_EXPR(SET, "set", "ee", 'x')
 482
 483 /* Indicate something is used in a way that we don't want to explain.
 484    For example, subroutine calls will use the register
 485    in which the static chain is passed.  */
 486 DEF_RTL_EXPR(USE, "use", "e", 'x')
 487
 488 /* Indicate something is clobbered in a way that we don't want to explain.
 489    For example, subroutine calls will clobber some physical registers
 490    (the ones that are by convention not saved).  */
 491 DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
 492
 493 /* Call a subroutine.
 494    Operand 1 is the address to call.
 495    Operand 2 is the number of arguments.  */
 496
 497 DEF_RTL_EXPR(CALL, "call", "ee", 'x')
 498
 499 /* Return from a subroutine.  */
 500
 501 DEF_RTL_EXPR(RETURN, "return", "", 'x')
 502
 503 /* Conditional trap.
 504    Operand 1 is the condition.
 505    Operand 2 is the trap code.
 506    For an unconditional trap, make the condition (const_int 1).  */
 507 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", 'x')
 508
 509 /* ----------------------------------------------------------------------
 510    Primitive values for use in expressions.
 511    ---------------------------------------------------------------------- */
 512
 513 /* numeric integer constant */
 514 DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o')
 515
 516 /* numeric floating point constant.
 517    Operand 0 ('e') is the MEM that stores this constant in memory, or
 518    various other things (see comments at immed_double_const in
 519    varasm.c).
 520    Operand 1 ('0') is a chain of all CONST_DOUBLEs in use in the
 521    current function.
 522    Remaining operands hold the actual value.  They are all 'w' and
 523    there may be from 1 to 4; see rtl.c.  */
 524 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, 'o')
 525
 526 /* String constant.  Used only for attributes right now.  */
 527 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
 528
 529 /* This is used to encapsulate an expression whose value is constant
 530    (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
 531    recognized as a constant operand rather than by arithmetic instructions.  */
 532
 533 DEF_RTL_EXPR(CONST, "const", "e", 'o')
 534
 535 /* program counter.  Ordinary jumps are represented
 536    by a SET whose first operand is (PC).  */
 537 DEF_RTL_EXPR(PC, "pc", "", 'o')
 538
 539 /* A register.  The "operand" is the register number, accessed with
 540    the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
 541    than a hardware register is being referred to.  The second operand
 542    doesn't really exist.  Unfortunately, however, the compiler
 543    implicitly assumes that a REG can be transformed in place into a
 544    MEM, and therefore that a REG is at least as big as a MEM.  To
 545    avoid this memory overhead, which is likely to be substantial,
 546    search for uses of PUT_CODE that turn REGs into MEMs, and fix them
 547    somehow.  Then, the trailing `0' can be removed here.  */
 548 DEF_RTL_EXPR(REG, "reg", "i0", 'o')
 549
 550 /* A scratch register.  This represents a register used only within a
 551    single insn.  It will be turned into a REG during register allocation
 552    or reload unless the constraint indicates that the register won't be
 553    needed, in which case it can remain a SCRATCH.  This code is
 554    marked as having one operand so it can be turned into a REG.  */
 555 DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
 556
 557 /* One word of a multi-word value.
 558    The first operand is the complete value; the second says which word.
 559    The WORDS_BIG_ENDIAN flag controls whether word number 0
 560    (as numbered in a SUBREG) is the most or least significant word.
 561
 562    This is also used to refer to a value in a different machine mode.
 563    For example, it can be used to refer to a SImode value as if it were
 564    Qimode, or vice versa.  Then the word number is always 0.  */
 565 DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
 566
 567 /* This one-argument rtx is used for move instructions
 568    that are guaranteed to alter only the low part of a destination.
 569    Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
 570    has an unspecified effect on the high part of REG,
 571    but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
 572    is guaranteed to alter only the bits of REG that are in HImode.
 573
 574    The actual instruction used is probably the same in both cases,
 575    but the register constraints may be tighter when STRICT_LOW_PART
 576    is in use.  */
 577
 578 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
 579
 580 /* (CONCAT a b) represents the virtual concatenation of a and b
 581    to make a value that has as many bits as a and b put together.
 582    This is used for complex values.  Normally it appears only
 583    in DECL_RTLs and during RTL generation, but not in the insn chain.  */
 584 DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o')
 585
 586 /* A memory location; operand is the address.  Can be nested inside a
 587    VOLATILE.  The second operand is the alias set to which this MEM
 588    belongs.  We use `0' instead of `i' for this field so that the
 589    field need not be specified in machine descriptions.  */
 590 DEF_RTL_EXPR(MEM, "mem", "e0", 'o')
 591
 592 /* Reference to an assembler label in the code for this function.
 593    The operand is a CODE_LABEL found in the insn chain.
 594    The unprinted fields 1 and 2 are used in flow.c for the
 595    LABEL_NEXTREF and CONTAINING_INSN.  */
 596 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
 597
 598 /* Reference to a named label: the string that is the first operand,
 599    with `_' added implicitly in front.
 600    Exception: if the first character explicitly given is `*',
 601    to give it to the assembler, remove the `*' and do not add `_'.  */
 602 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o')
 603
 604 /* The condition code register is represented, in our imagination,
 605    as a register holding a value that can be compared to zero.
 606    In fact, the machine has already compared them and recorded the
 607    results; but instructions that look at the condition code
 608    pretend to be looking at the entire value and comparing it.  */
 609 DEF_RTL_EXPR(CC0, "cc0", "", 'o')
 610
 611 /* Reference to the address of a register.  Removed by purge_addressof after
 612    CSE has elided as many as possible.
 613    1st operand: the register we may need the address of.
 614    2nd operand: the original pseudo regno we were generated for.
 615    3rd operand: the decl for the object in the register, for
 616      put_reg_in_stack.  */
 617
 618 DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", 'o')
 619
 620 /* =====================================================================
 621    A QUEUED expression really points to a member of the queue of instructions
 622    to be output later for postincrement/postdecrement.
 623    QUEUED expressions never become part of instructions.
 624    When a QUEUED expression would be put into an instruction,
 625    instead either the incremented variable or a copy of its previous
 626    value is used.
 627
 628    Operands are:
 629    0. the variable to be incremented (a REG rtx).
 630    1. the incrementing instruction, or 0 if it hasn't been output yet.
 631    2. A REG rtx for a copy of the old value of the variable, or 0 if none yet.
 632    3. the body to use for the incrementing instruction
 633    4. the next QUEUED expression in the queue.
 634    ====================================================================== */
 635
 636 DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
 637
 638 /* ----------------------------------------------------------------------
 639    Expressions for operators in an rtl pattern
 640    ---------------------------------------------------------------------- */
 641
 642 /* if_then_else.  This is used in representing ordinary
 643    conditional jump instructions.
 644      Operand:
 645      0:  condition
 646      1:  then expr
 647      2:  else expr */
 648 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
 649
 650 /* General conditional. The first operand is a vector composed of pairs of
 651    expressions.  The first element of each pair is evaluated, in turn.
 652    The value of the conditional is the second expression of the first pair
 653    whose first expression evaluates non-zero.  If none of the expressions is
 654    true, the second operand will be used as the value of the conditional.
 655
 656    This should be replaced with use of IF_THEN_ELSE.  */
 657 DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
 658
 659 /* Comparison, produces a condition code result.  */
 660 DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
 661
 662 /* plus */
 663 DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
 664
 665 /* Operand 0 minus operand 1.  */
 666 DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
 667
 668 /* Minus operand 0.  */
 669 DEF_RTL_EXPR(NEG, "neg", "e", '1')
 670
 671 DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
 672
 673 /* Operand 0 divided by operand 1.  */
 674 DEF_RTL_EXPR(DIV, "div", "ee", '2')
 675 /* Remainder of operand 0 divided by operand 1.  */
 676 DEF_RTL_EXPR(MOD, "mod", "ee", '2')
 677
 678 /* Unsigned divide and remainder.  */
 679 DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
 680 DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
 681
 682 /* Bitwise operations.  */
 683 DEF_RTL_EXPR(AND, "and", "ee", 'c')
 684
 685 DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
 686
 687 DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
 688
 689 DEF_RTL_EXPR(NOT, "not", "e", '1')
 690
 691 /* Operand:
 692      0:  value to be shifted.
 693      1:  number of bits.  */
 694 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2')
 695 DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2')
 696
 697 /* Right shift operations, for machines where these are not the same
 698    as left shifting with a negative argument.  */
 699
 700 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2')
 701 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2')
 702 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2')
 703
 704 /* Minimum and maximum values of two operands.  We need both signed and
 705    unsigned forms.  (We cannot use MIN for SMIN because it conflicts
 706    with a macro of the same name.) */
 707
 708 DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
 709 DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
 710 DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
 711 DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
 712
 713 /* These unary operations are used to represent incrementation
 714    and decrementation as they occur in memory addresses.
 715    The amount of increment or decrement are not represented
 716    because they can be understood from the machine-mode of the
 717    containing MEM.  These operations exist in only two cases:
 718    1. pushes onto the stack.
 719    2. created automatically by the life_analysis pass in flow.c.  */
 720 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x')
 721 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x')
 722 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x')
 723 DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x')
 724
 725 /* These binary operations are used to represent generic address
 726    side-effects in memory addresses, except for simple incrementation
 727    or decrementation which use the above operations.  They are
 728    created automatically by the life_analysis pass in flow.c.
 729    (Note that these operators are currently placeholders.)  */
 730 DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", 'x')
 731 DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", 'x')
 732
 733 /* Comparison operations.  The ordered comparisons exist in two
 734    flavors, signed and unsigned.  */
 735 DEF_RTL_EXPR(NE, "ne", "ee", '<')
 736 DEF_RTL_EXPR(EQ, "eq", "ee", '<')
 737 DEF_RTL_EXPR(GE, "ge", "ee", '<')
 738 DEF_RTL_EXPR(GT, "gt", "ee", '<')
 739 DEF_RTL_EXPR(LE, "le", "ee", '<')
 740 DEF_RTL_EXPR(LT, "lt", "ee", '<')
 741 DEF_RTL_EXPR(GEU, "geu", "ee", '<')
 742 DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
 743 DEF_RTL_EXPR(LEU, "leu", "ee", '<')
 744 DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
 745
 746 /* Represents the result of sign-extending the sole operand.
 747    The machine modes of the operand and of the SIGN_EXTEND expression
 748    determine how much sign-extension is going on.  */
 749 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
 750
 751 /* Similar for zero-extension (such as unsigned short to int).  */
 752 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
 753
 754 /* Similar but here the operand has a wider mode.  */
 755 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
 756
 757 /* Similar for extending floating-point values (such as SFmode to DFmode).  */
 758 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
 759 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
 760
 761 /* Conversion of fixed point operand to floating point value.  */
 762 DEF_RTL_EXPR(FLOAT, "float", "e", '1')
 763
 764 /* With fixed-point machine mode:
 765    Conversion of floating point operand to fixed point value.
 766    Value is defined only when the operand's value is an integer.
 767    With floating-point machine mode (and operand with same mode):
 768    Operand is rounded toward zero to produce an integer value
 769    represented in floating point.  */
 770 DEF_RTL_EXPR(FIX, "fix", "e", '1')
 771
 772 /* Conversion of unsigned fixed point operand to floating point value.  */
 773 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
 774
 775 /* With fixed-point machine mode:
 776    Conversion of floating point operand to *unsigned* fixed point value.
 777    Value is defined only when the operand's value is an integer.  */
 778 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
 779
 780 /* Absolute value */
 781 DEF_RTL_EXPR(ABS, "abs", "e", '1')
 782
 783 /* Square root */
 784 DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
 785
 786 /* Find first bit that is set.
 787    Value is 1 + number of trailing zeros in the arg.,
 788    or 0 if arg is 0.  */
 789 DEF_RTL_EXPR(FFS, "ffs", "e", '1')
 790
 791 /* Reference to a signed bit-field of specified size and position.
 792    Operand 0 is the memory unit (usually SImode or QImode) which
 793    contains the field's first bit.  Operand 1 is the width, in bits.
 794    Operand 2 is the number of bits in the memory unit before the
 795    first bit of this field.
 796    If BITS_BIG_ENDIAN is defined, the first bit is the msb and
 797    operand 2 counts from the msb of the memory unit.
 798    Otherwise, the first bit is the lsb and operand 2 counts from
 799    the lsb of the memory unit.  */
 800 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
 801
 802 /* Similar for unsigned bit-field.  */
 803 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
 804
 805 /* For RISC machines.  These save memory when splitting insns.  */
 806
 807 /* HIGH are the high-order bits of a constant expression.  */
 808 DEF_RTL_EXPR(HIGH, "high", "e", 'o')
 809
 810 /* LO_SUM is the sum of a register and the low-order bits
 811    of a constant expression.  */
 812 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
 813
 814 /* Header for range information.  Operand 0 is the NOTE_INSN_RANGE_START insn.
 815    Operand 1 is the NOTE_INSN_RANGE_END insn.  Operand 2 is a vector of all of
 816    the registers that can be substituted within this range.  Operand 3 is the
 817    number of calls in the range.  Operand 4 is the number of insns in the
 818    range.  Operand 5 is the unique range number for this range.  Operand 6 is
 819    the basic block # of the start of the live range.  Operand 7 is the basic
 820    block # of the end of the live range.  Operand 8 is the loop depth.  Operand
 821    9 is a bitmap of the registers live at the start of the range.  Operand 10
 822    is a bitmap of the registers live at the end of the range.  Operand 11 is
 823    marker number for the start of the range.  Operand 12 is the marker number
 824    for the end of the range.  */
 825 DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", 'x')
 826
 827 /* Registers that can be substituted within the range.  Operand 0 is the
 828    original pseudo register number.  Operand 1 will be filled in with the
 829    pseudo register the value is copied for the duration of the range.  Operand
 830    2 is the number of references within the range to the register.  Operand 3
 831    is the number of sets or clobbers of the register in the range.  Operand 4
 832    is the number of deaths the register has.  Operand 5 is the copy flags that
 833    give the status of whether a copy is needed from the original register to
 834    the new register at the beginning of the range, or whether a copy from the
 835    new register back to the original at the end of the range.  Operand 6 is the
 836    live length.  Operand 7 is the number of calls that this register is live
 837    across.  Operand 8 is the symbol node of the variable if the register is a
 838    user variable.  Operand 9 is the block node that the variable is declared
 839    in if the register is a user variable. */
 840 DEF_RTL_EXPR(RANGE_REG, "range_reg", "iiiiiiiitt", 'x')
 841
 842 /* Information about a local variable's ranges.  Operand 0 is an EXPR_LIST of
 843    the different ranges a variable is in where it is copied to a different
 844    pseudo register.  Operand 1 is the block that the variable is declared in.
 845    Operand 2 is the number of distinct ranges.  */
 846 DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", 'x')
 847
 848 /* Information about the registers that are live at the current point.  Operand
 849    0 is the live bitmap.  Operand 1 is the original block number.  */
 850 DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
 851
 852 /* A unary `__builtin_constant_p' expression.  These are only emitted
 853    during RTL generation, and then only if optimize > 0.  They are
 854    eliminated by the first CSE pass. */
 855 DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
 856
 857 /* A placeholder for a CALL_INSN which may be turned into a normal call,
 858    a sibling (tail) call or tail recursion.
 859
 860    Immediately after RTL generation, this placeholder will be replaced
 861    by the insns to perform the call, sibcall or tail recursion.
 862
 863    This RTX has 4 operands.  The first three are lists of instructions to
 864    perform the call as a normal call, sibling call and tail recursion
 865    respectively.  The latter two lists may be NULL, the first may never
 866    be NULL.
 867
 868    The last operand is the tail recursion CODE_LABEL, which may be NULL if no
 869    potential tail recursive calls were found.
 870
 871    The tail recursion label is needed so that we can clear LABEL_PRESERVE_P
 872    after we select a call method.  */
 873 DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", 'x')
 874
 875 /*
 876 Local variables:
 877 mode:c
 878 End:
 879 */