Move *-*-gnu* pattern below *-*-linux*.
[official-gcc.git] / gcc / reload.c
blob46479ac53e1abdf77c7765dfb81a034ac01b4418
1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
57 NOTE SIDE EFFECTS:
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
82 register.
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
88 #define REG_OK_STRICT
90 #include "config.h"
91 #include "system.h"
92 #include "rtl.h"
93 #include "insn-config.h"
94 #include "insn-codes.h"
95 #include "recog.h"
96 #include "reload.h"
97 #include "regs.h"
98 #include "hard-reg-set.h"
99 #include "flags.h"
100 #include "real.h"
101 #include "output.h"
102 #include "function.h"
103 #include "expr.h"
104 #include "toplev.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(x, y) 2
108 #endif
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112 #endif
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116 #endif
118 /* The variables set up by `find_reloads' are:
120 n_reloads number of distinct reloads needed; max reload # + 1
121 tables indexed by reload number
122 reload_in rtx for value to reload from
123 reload_out rtx for where to store reload-reg afterward if nec
124 (often the same as reload_in)
125 reload_reg_class enum reg_class, saying what regs to reload into
126 reload_inmode enum machine_mode; mode this operand should have
127 when reloaded, on input.
128 reload_outmode enum machine_mode; mode this operand should have
129 when reloaded, on output.
130 reload_optional char, nonzero for an optional reload.
131 Optional reloads are ignored unless the
132 value is already sitting in a register.
133 reload_nongroup char, nonzero when a reload must use a register
134 not already allocated to a group.
135 reload_inc int, positive amount to increment or decrement by if
136 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
137 Ignored otherwise (don't assume it is zero).
138 reload_in_reg rtx. A reg for which reload_in is the equivalent.
139 If reload_in is a symbol_ref which came from
140 reg_equiv_constant, then this is the pseudo
141 which has that symbol_ref as equivalent.
142 reload_reg_rtx rtx. This is the register to reload into.
143 If it is zero when `find_reloads' returns,
144 you must find a suitable register in the class
145 specified by reload_reg_class, and store here
146 an rtx for that register with mode from
147 reload_inmode or reload_outmode.
148 reload_nocombine char, nonzero if this reload shouldn't be
149 combined with another reload.
150 reload_opnum int, operand number being reloaded. This is
151 used to group related reloads and need not always
152 be equal to the actual operand number in the insn,
153 though it current will be; for in-out operands, it
154 is one of the two operand numbers.
155 reload_when_needed enum, classifies reload as needed either for
156 addressing an input reload, addressing an output,
157 for addressing a non-reloaded mem ref,
158 or for unspecified purposes (i.e., more than one
159 of the above).
160 reload_secondary_p int, 1 if this is a secondary register for one
161 or more reloads.
162 reload_secondary_in_reload
163 reload_secondary_out_reload
164 int, gives the reload number of a secondary
165 reload, when needed; otherwise -1
166 reload_secondary_in_icode
167 reload_secondary_out_icode
168 enum insn_code, if a secondary reload is required,
169 gives the INSN_CODE that uses the secondary
170 reload as a scratch register, or CODE_FOR_nothing
171 if the secondary reload register is to be an
172 intermediate register. */
173 int n_reloads;
175 rtx reload_in[MAX_RELOADS];
176 rtx reload_out[MAX_RELOADS];
177 enum reg_class reload_reg_class[MAX_RELOADS];
178 enum machine_mode reload_inmode[MAX_RELOADS];
179 enum machine_mode reload_outmode[MAX_RELOADS];
180 rtx reload_reg_rtx[MAX_RELOADS];
181 char reload_optional[MAX_RELOADS];
182 char reload_nongroup[MAX_RELOADS];
183 int reload_inc[MAX_RELOADS];
184 rtx reload_in_reg[MAX_RELOADS];
185 rtx reload_out_reg[MAX_RELOADS];
186 char reload_nocombine[MAX_RELOADS];
187 int reload_opnum[MAX_RELOADS];
188 enum reload_type reload_when_needed[MAX_RELOADS];
189 int reload_secondary_p[MAX_RELOADS];
190 int reload_secondary_in_reload[MAX_RELOADS];
191 int reload_secondary_out_reload[MAX_RELOADS];
192 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
193 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
195 /* All the "earlyclobber" operands of the current insn
196 are recorded here. */
197 int n_earlyclobbers;
198 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
200 int reload_n_operands;
202 /* Replacing reloads.
204 If `replace_reloads' is nonzero, then as each reload is recorded
205 an entry is made for it in the table `replacements'.
206 Then later `subst_reloads' can look through that table and
207 perform all the replacements needed. */
209 /* Nonzero means record the places to replace. */
210 static int replace_reloads;
212 /* Each replacement is recorded with a structure like this. */
213 struct replacement
215 rtx *where; /* Location to store in */
216 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
217 a SUBREG; 0 otherwise. */
218 int what; /* which reload this is for */
219 enum machine_mode mode; /* mode it must have */
222 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
224 /* Number of replacements currently recorded. */
225 static int n_replacements;
227 /* Used to track what is modified by an operand. */
228 struct decomposition
230 int reg_flag; /* Nonzero if referencing a register. */
231 int safe; /* Nonzero if this can't conflict with anything. */
232 rtx base; /* Base address for MEM. */
233 HOST_WIDE_INT start; /* Starting offset or register number. */
234 HOST_WIDE_INT end; /* Ending offset or register number. */
237 #ifdef SECONDARY_MEMORY_NEEDED
239 /* Save MEMs needed to copy from one class of registers to another. One MEM
240 is used per mode, but normally only one or two modes are ever used.
242 We keep two versions, before and after register elimination. The one
243 after register elimination is record separately for each operand. This
244 is done in case the address is not valid to be sure that we separately
245 reload each. */
247 static rtx secondary_memlocs[NUM_MACHINE_MODES];
248 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
249 #endif
251 /* The instruction we are doing reloads for;
252 so we can test whether a register dies in it. */
253 static rtx this_insn;
255 /* Nonzero if this instruction is a user-specified asm with operands. */
256 static int this_insn_is_asm;
258 /* If hard_regs_live_known is nonzero,
259 we can tell which hard regs are currently live,
260 at least enough to succeed in choosing dummy reloads. */
261 static int hard_regs_live_known;
263 /* Indexed by hard reg number,
264 element is nonnegative if hard reg has been spilled.
265 This vector is passed to `find_reloads' as an argument
266 and is not changed here. */
267 static short *static_reload_reg_p;
269 /* Set to 1 in subst_reg_equivs if it changes anything. */
270 static int subst_reg_equivs_changed;
272 /* On return from push_reload, holds the reload-number for the OUT
273 operand, which can be different for that from the input operand. */
274 static int output_reloadnum;
276 /* Compare two RTX's. */
277 #define MATCHES(x, y) \
278 (x == y || (x != 0 && (GET_CODE (x) == REG \
279 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
280 : rtx_equal_p (x, y) && ! side_effects_p (x))))
282 /* Indicates if two reloads purposes are for similar enough things that we
283 can merge their reloads. */
284 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
285 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
286 || ((when1) == (when2) && (op1) == (op2)) \
287 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
288 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
289 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
290 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
291 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
293 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
294 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
295 ((when1) != (when2) \
296 || ! ((op1) == (op2) \
297 || (when1) == RELOAD_FOR_INPUT \
298 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
299 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
301 /* If we are going to reload an address, compute the reload type to
302 use. */
303 #define ADDR_TYPE(type) \
304 ((type) == RELOAD_FOR_INPUT_ADDRESS \
305 ? RELOAD_FOR_INPADDR_ADDRESS \
306 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
307 ? RELOAD_FOR_OUTADDR_ADDRESS \
308 : (type)))
310 #ifdef HAVE_SECONDARY_RELOADS
311 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
312 enum machine_mode, enum reload_type,
313 enum insn_code *));
314 #endif
315 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
316 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
317 enum machine_mode, enum machine_mode,
318 int, int, int, enum reload_type));
319 static void push_replacement PROTO((rtx *, int, enum machine_mode));
320 static void combine_reloads PROTO((void));
321 static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
322 enum reload_type, int, int));
323 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
324 enum machine_mode, enum machine_mode,
325 enum reg_class, int, int));
326 static int earlyclobber_operand_p PROTO((rtx));
327 static int hard_reg_set_here_p PROTO((int, int, rtx));
328 static struct decomposition decompose PROTO((rtx));
329 static int immune_p PROTO((rtx, rtx, struct decomposition));
330 static int alternative_allows_memconst PROTO((const char *, int));
331 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
332 static rtx make_memloc PROTO((rtx, int));
333 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
334 int, enum reload_type, int, rtx));
335 static rtx subst_reg_equivs PROTO((rtx, rtx));
336 static rtx subst_indexed_address PROTO((rtx));
337 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
338 int, enum reload_type,int, rtx));
339 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
340 enum machine_mode, int,
341 enum reload_type, int));
342 static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
343 int, rtx));
344 static int find_inc_amount PROTO((rtx, rtx));
345 static int loc_mentioned_in_p PROTO((rtx *, rtx));
347 #ifdef HAVE_SECONDARY_RELOADS
349 /* Determine if any secondary reloads are needed for loading (if IN_P is
350 non-zero) or storing (if IN_P is zero) X to or from a reload register of
351 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
352 are needed, push them.
354 Return the reload number of the secondary reload we made, or -1 if
355 we didn't need one. *PICODE is set to the insn_code to use if we do
356 need a secondary reload. */
358 static int
359 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
360 type, picode)
361 int in_p;
362 rtx x;
363 int opnum;
364 int optional;
365 enum reg_class reload_class;
366 enum machine_mode reload_mode;
367 enum reload_type type;
368 enum insn_code *picode;
370 enum reg_class class = NO_REGS;
371 enum machine_mode mode = reload_mode;
372 enum insn_code icode = CODE_FOR_nothing;
373 enum reg_class t_class = NO_REGS;
374 enum machine_mode t_mode = VOIDmode;
375 enum insn_code t_icode = CODE_FOR_nothing;
376 enum reload_type secondary_type;
377 int s_reload, t_reload = -1;
379 if (type == RELOAD_FOR_INPUT_ADDRESS
380 || type == RELOAD_FOR_OUTPUT_ADDRESS
381 || type == RELOAD_FOR_INPADDR_ADDRESS
382 || type == RELOAD_FOR_OUTADDR_ADDRESS)
383 secondary_type = type;
384 else
385 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
387 *picode = CODE_FOR_nothing;
389 /* If X is a paradoxical SUBREG, use the inner value to determine both the
390 mode and object being reloaded. */
391 if (GET_CODE (x) == SUBREG
392 && (GET_MODE_SIZE (GET_MODE (x))
393 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
395 x = SUBREG_REG (x);
396 reload_mode = GET_MODE (x);
399 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
400 is still a pseudo-register by now, it *must* have an equivalent MEM
401 but we don't want to assume that), use that equivalent when seeing if
402 a secondary reload is needed since whether or not a reload is needed
403 might be sensitive to the form of the MEM. */
405 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
406 && reg_equiv_mem[REGNO (x)] != 0)
407 x = reg_equiv_mem[REGNO (x)];
409 #ifdef SECONDARY_INPUT_RELOAD_CLASS
410 if (in_p)
411 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
412 #endif
414 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
415 if (! in_p)
416 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
417 #endif
419 /* If we don't need any secondary registers, done. */
420 if (class == NO_REGS)
421 return -1;
423 /* Get a possible insn to use. If the predicate doesn't accept X, don't
424 use the insn. */
426 icode = (in_p ? reload_in_optab[(int) reload_mode]
427 : reload_out_optab[(int) reload_mode]);
429 if (icode != CODE_FOR_nothing
430 && insn_operand_predicate[(int) icode][in_p]
431 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
432 icode = CODE_FOR_nothing;
434 /* If we will be using an insn, see if it can directly handle the reload
435 register we will be using. If it can, the secondary reload is for a
436 scratch register. If it can't, we will use the secondary reload for
437 an intermediate register and require a tertiary reload for the scratch
438 register. */
440 if (icode != CODE_FOR_nothing)
442 /* If IN_P is non-zero, the reload register will be the output in
443 operand 0. If IN_P is zero, the reload register will be the input
444 in operand 1. Outputs should have an initial "=", which we must
445 skip. */
447 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
448 enum reg_class insn_class
449 = (insn_letter == 'r' ? GENERAL_REGS
450 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
452 if (insn_class == NO_REGS
453 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
454 /* The scratch register's constraint must start with "=&". */
455 || insn_operand_constraint[(int) icode][2][0] != '='
456 || insn_operand_constraint[(int) icode][2][1] != '&')
457 abort ();
459 if (reg_class_subset_p (reload_class, insn_class))
460 mode = insn_operand_mode[(int) icode][2];
461 else
463 char t_letter = insn_operand_constraint[(int) icode][2][2];
464 class = insn_class;
465 t_mode = insn_operand_mode[(int) icode][2];
466 t_class = (t_letter == 'r' ? GENERAL_REGS
467 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
468 t_icode = icode;
469 icode = CODE_FOR_nothing;
473 /* This case isn't valid, so fail. Reload is allowed to use the same
474 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
475 in the case of a secondary register, we actually need two different
476 registers for correct code. We fail here to prevent the possibility of
477 silently generating incorrect code later.
479 The convention is that secondary input reloads are valid only if the
480 secondary_class is different from class. If you have such a case, you
481 can not use secondary reloads, you must work around the problem some
482 other way.
484 Allow this when MODE is not reload_mode and assume that the generated
485 code handles this case (it does on the Alpha, which is the only place
486 this currently happens). */
488 if (in_p && class == reload_class && mode == reload_mode)
489 abort ();
491 /* If we need a tertiary reload, see if we have one we can reuse or else
492 make a new one. */
494 if (t_class != NO_REGS)
496 for (t_reload = 0; t_reload < n_reloads; t_reload++)
497 if (reload_secondary_p[t_reload]
498 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
499 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
500 && ((in_p && reload_inmode[t_reload] == t_mode)
501 || (! in_p && reload_outmode[t_reload] == t_mode))
502 && ((in_p && (reload_secondary_in_icode[t_reload]
503 == CODE_FOR_nothing))
504 || (! in_p &&(reload_secondary_out_icode[t_reload]
505 == CODE_FOR_nothing)))
506 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
507 && MERGABLE_RELOADS (secondary_type,
508 reload_when_needed[t_reload],
509 opnum, reload_opnum[t_reload]))
511 if (in_p)
512 reload_inmode[t_reload] = t_mode;
513 if (! in_p)
514 reload_outmode[t_reload] = t_mode;
516 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
517 reload_reg_class[t_reload] = t_class;
519 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
520 reload_optional[t_reload] &= optional;
521 reload_secondary_p[t_reload] = 1;
522 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
523 opnum, reload_opnum[t_reload]))
524 reload_when_needed[t_reload] = RELOAD_OTHER;
527 if (t_reload == n_reloads)
529 /* We need to make a new tertiary reload for this register class. */
530 reload_in[t_reload] = reload_out[t_reload] = 0;
531 reload_reg_class[t_reload] = t_class;
532 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
533 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
534 reload_reg_rtx[t_reload] = 0;
535 reload_optional[t_reload] = optional;
536 reload_nongroup[t_reload] = 0;
537 reload_inc[t_reload] = 0;
538 /* Maybe we could combine these, but it seems too tricky. */
539 reload_nocombine[t_reload] = 1;
540 reload_in_reg[t_reload] = 0;
541 reload_out_reg[t_reload] = 0;
542 reload_opnum[t_reload] = opnum;
543 reload_when_needed[t_reload] = secondary_type;
544 reload_secondary_in_reload[t_reload] = -1;
545 reload_secondary_out_reload[t_reload] = -1;
546 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
547 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
548 reload_secondary_p[t_reload] = 1;
550 n_reloads++;
554 /* See if we can reuse an existing secondary reload. */
555 for (s_reload = 0; s_reload < n_reloads; s_reload++)
556 if (reload_secondary_p[s_reload]
557 && (reg_class_subset_p (class, reload_reg_class[s_reload])
558 || reg_class_subset_p (reload_reg_class[s_reload], class))
559 && ((in_p && reload_inmode[s_reload] == mode)
560 || (! in_p && reload_outmode[s_reload] == mode))
561 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
562 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
563 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
564 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
565 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
566 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
567 opnum, reload_opnum[s_reload]))
569 if (in_p)
570 reload_inmode[s_reload] = mode;
571 if (! in_p)
572 reload_outmode[s_reload] = mode;
574 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
575 reload_reg_class[s_reload] = class;
577 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
578 reload_optional[s_reload] &= optional;
579 reload_secondary_p[s_reload] = 1;
580 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
581 opnum, reload_opnum[s_reload]))
582 reload_when_needed[s_reload] = RELOAD_OTHER;
585 if (s_reload == n_reloads)
587 #ifdef SECONDARY_MEMORY_NEEDED
588 /* If we need a memory location to copy between the two reload regs,
589 set it up now. Note that we do the input case before making
590 the reload and the output case after. This is due to the
591 way reloads are output. */
593 if (in_p && icode == CODE_FOR_nothing
594 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
595 get_secondary_mem (x, reload_mode, opnum, type);
596 #endif
598 /* We need to make a new secondary reload for this register class. */
599 reload_in[s_reload] = reload_out[s_reload] = 0;
600 reload_reg_class[s_reload] = class;
602 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
603 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
604 reload_reg_rtx[s_reload] = 0;
605 reload_optional[s_reload] = optional;
606 reload_nongroup[s_reload] = 0;
607 reload_inc[s_reload] = 0;
608 /* Maybe we could combine these, but it seems too tricky. */
609 reload_nocombine[s_reload] = 1;
610 reload_in_reg[s_reload] = 0;
611 reload_out_reg[s_reload] = 0;
612 reload_opnum[s_reload] = opnum;
613 reload_when_needed[s_reload] = secondary_type;
614 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
615 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
616 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
617 reload_secondary_out_icode[s_reload]
618 = ! in_p ? t_icode : CODE_FOR_nothing;
619 reload_secondary_p[s_reload] = 1;
621 n_reloads++;
623 #ifdef SECONDARY_MEMORY_NEEDED
624 if (! in_p && icode == CODE_FOR_nothing
625 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
626 get_secondary_mem (x, mode, opnum, type);
627 #endif
630 *picode = icode;
631 return s_reload;
633 #endif /* HAVE_SECONDARY_RELOADS */
635 #ifdef SECONDARY_MEMORY_NEEDED
637 /* Return a memory location that will be used to copy X in mode MODE.
638 If we haven't already made a location for this mode in this insn,
639 call find_reloads_address on the location being returned. */
642 get_secondary_mem (x, mode, opnum, type)
643 rtx x;
644 enum machine_mode mode;
645 int opnum;
646 enum reload_type type;
648 rtx loc;
649 int mem_valid;
651 /* By default, if MODE is narrower than a word, widen it to a word.
652 This is required because most machines that require these memory
653 locations do not support short load and stores from all registers
654 (e.g., FP registers). */
656 #ifdef SECONDARY_MEMORY_NEEDED_MODE
657 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
658 #else
659 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
660 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
661 #endif
663 /* If we already have made a MEM for this operand in MODE, return it. */
664 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
665 return secondary_memlocs_elim[(int) mode][opnum];
667 /* If this is the first time we've tried to get a MEM for this mode,
668 allocate a new one. `something_changed' in reload will get set
669 by noticing that the frame size has changed. */
671 if (secondary_memlocs[(int) mode] == 0)
673 #ifdef SECONDARY_MEMORY_NEEDED_RTX
674 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
675 #else
676 secondary_memlocs[(int) mode]
677 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
678 #endif
681 /* Get a version of the address doing any eliminations needed. If that
682 didn't give us a new MEM, make a new one if it isn't valid. */
684 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
685 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
687 if (! mem_valid && loc == secondary_memlocs[(int) mode])
688 loc = copy_rtx (loc);
690 /* The only time the call below will do anything is if the stack
691 offset is too large. In that case IND_LEVELS doesn't matter, so we
692 can just pass a zero. Adjust the type to be the address of the
693 corresponding object. If the address was valid, save the eliminated
694 address. If it wasn't valid, we need to make a reload each time, so
695 don't save it. */
697 if (! mem_valid)
699 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
700 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
701 : RELOAD_OTHER);
703 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
704 opnum, type, 0, 0);
707 secondary_memlocs_elim[(int) mode][opnum] = loc;
708 return loc;
711 /* Clear any secondary memory locations we've made. */
713 void
714 clear_secondary_mem ()
716 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
718 #endif /* SECONDARY_MEMORY_NEEDED */
720 /* Find the largest class for which every register number plus N is valid in
721 M1 (if in range). Abort if no such class exists. */
723 static enum reg_class
724 find_valid_class (m1, n)
725 enum machine_mode m1;
726 int n;
728 int class;
729 int regno;
730 enum reg_class best_class;
731 int best_size = 0;
733 for (class = 1; class < N_REG_CLASSES; class++)
735 int bad = 0;
736 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
737 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
738 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
739 && ! HARD_REGNO_MODE_OK (regno + n, m1))
740 bad = 1;
742 if (! bad && reg_class_size[class] > best_size)
743 best_class = class, best_size = reg_class_size[class];
746 if (best_size == 0)
747 abort ();
749 return best_class;
752 /* Return the number of a previously made reload that can be combined with
753 a new one, or n_reloads if none of the existing reloads can be used.
754 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
755 push_reload, they determine the kind of the new reload that we try to
756 combine. P_IN points to the corresponding value of IN, which can be
757 modified by this function.
758 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
759 static int
760 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
761 rtx *p_in, out;
762 enum reg_class class;
763 enum reload_type type;
764 int opnum, dont_share;
766 rtx in = *p_in;
767 int i;
768 /* We can't merge two reloads if the output of either one is
769 earlyclobbered. */
771 if (earlyclobber_operand_p (out))
772 return n_reloads;
774 /* We can use an existing reload if the class is right
775 and at least one of IN and OUT is a match
776 and the other is at worst neutral.
777 (A zero compared against anything is neutral.)
779 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
780 for the same thing since that can cause us to need more reload registers
781 than we otherwise would. */
783 for (i = 0; i < n_reloads; i++)
784 if ((reg_class_subset_p (class, reload_reg_class[i])
785 || reg_class_subset_p (reload_reg_class[i], class))
786 /* If the existing reload has a register, it must fit our class. */
787 && (reload_reg_rtx[i] == 0
788 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
789 true_regnum (reload_reg_rtx[i])))
790 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
791 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
793 (out != 0 && MATCHES (reload_out[i], out)
794 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
795 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
796 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
797 && MERGABLE_RELOADS (type, reload_when_needed[i],
798 opnum, reload_opnum[i]))
799 return i;
801 /* Reloading a plain reg for input can match a reload to postincrement
802 that reg, since the postincrement's value is the right value.
803 Likewise, it can match a preincrement reload, since we regard
804 the preincrementation as happening before any ref in this insn
805 to that register. */
806 for (i = 0; i < n_reloads; i++)
807 if ((reg_class_subset_p (class, reload_reg_class[i])
808 || reg_class_subset_p (reload_reg_class[i], class))
809 /* If the existing reload has a register, it must fit our
810 class. */
811 && (reload_reg_rtx[i] == 0
812 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
813 true_regnum (reload_reg_rtx[i])))
814 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
815 && ((GET_CODE (in) == REG
816 && (GET_CODE (reload_in[i]) == POST_INC
817 || GET_CODE (reload_in[i]) == POST_DEC
818 || GET_CODE (reload_in[i]) == PRE_INC
819 || GET_CODE (reload_in[i]) == PRE_DEC)
820 && MATCHES (XEXP (reload_in[i], 0), in))
822 (GET_CODE (reload_in[i]) == REG
823 && (GET_CODE (in) == POST_INC
824 || GET_CODE (in) == POST_DEC
825 || GET_CODE (in) == PRE_INC
826 || GET_CODE (in) == PRE_DEC)
827 && MATCHES (XEXP (in, 0), reload_in[i])))
828 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
829 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
830 && MERGABLE_RELOADS (type, reload_when_needed[i],
831 opnum, reload_opnum[i]))
833 /* Make sure reload_in ultimately has the increment,
834 not the plain register. */
835 if (GET_CODE (in) == REG)
836 *p_in = reload_in[i];
837 return i;
839 return n_reloads;
842 /* Record one reload that needs to be performed.
843 IN is an rtx saying where the data are to be found before this instruction.
844 OUT says where they must be stored after the instruction.
845 (IN is zero for data not read, and OUT is zero for data not written.)
846 INLOC and OUTLOC point to the places in the instructions where
847 IN and OUT were found.
848 If IN and OUT are both non-zero, it means the same register must be used
849 to reload both IN and OUT.
851 CLASS is a register class required for the reloaded data.
852 INMODE is the machine mode that the instruction requires
853 for the reg that replaces IN and OUTMODE is likewise for OUT.
855 If IN is zero, then OUT's location and mode should be passed as
856 INLOC and INMODE.
858 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
860 OPTIONAL nonzero means this reload does not need to be performed:
861 it can be discarded if that is more convenient.
863 OPNUM and TYPE say what the purpose of this reload is.
865 The return value is the reload-number for this reload.
867 If both IN and OUT are nonzero, in some rare cases we might
868 want to make two separate reloads. (Actually we never do this now.)
869 Therefore, the reload-number for OUT is stored in
870 output_reloadnum when we return; the return value applies to IN.
871 Usually (presently always), when IN and OUT are nonzero,
872 the two reload-numbers are equal, but the caller should be careful to
873 distinguish them. */
875 static int
876 push_reload (in, out, inloc, outloc, class,
877 inmode, outmode, strict_low, optional, opnum, type)
878 rtx in, out;
879 rtx *inloc, *outloc;
880 enum reg_class class;
881 enum machine_mode inmode, outmode;
882 int strict_low;
883 int optional;
884 int opnum;
885 enum reload_type type;
887 register int i;
888 int dont_share = 0;
889 int dont_remove_subreg = 0;
890 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
891 int secondary_in_reload = -1, secondary_out_reload = -1;
892 enum insn_code secondary_in_icode = CODE_FOR_nothing;
893 enum insn_code secondary_out_icode = CODE_FOR_nothing;
895 /* INMODE and/or OUTMODE could be VOIDmode if no mode
896 has been specified for the operand. In that case,
897 use the operand's mode as the mode to reload. */
898 if (inmode == VOIDmode && in != 0)
899 inmode = GET_MODE (in);
900 if (outmode == VOIDmode && out != 0)
901 outmode = GET_MODE (out);
903 /* If IN is a pseudo register everywhere-equivalent to a constant, and
904 it is not in a hard register, reload straight from the constant,
905 since we want to get rid of such pseudo registers.
906 Often this is done earlier, but not always in find_reloads_address. */
907 if (in != 0 && GET_CODE (in) == REG)
909 register int regno = REGNO (in);
911 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
912 && reg_equiv_constant[regno] != 0)
913 in = reg_equiv_constant[regno];
916 /* Likewise for OUT. Of course, OUT will never be equivalent to
917 an actual constant, but it might be equivalent to a memory location
918 (in the case of a parameter). */
919 if (out != 0 && GET_CODE (out) == REG)
921 register int regno = REGNO (out);
923 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
924 && reg_equiv_constant[regno] != 0)
925 out = reg_equiv_constant[regno];
928 /* If we have a read-write operand with an address side-effect,
929 change either IN or OUT so the side-effect happens only once. */
930 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
932 if (GET_CODE (XEXP (in, 0)) == POST_INC
933 || GET_CODE (XEXP (in, 0)) == POST_DEC)
934 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
935 if (GET_CODE (XEXP (in, 0)) == PRE_INC
936 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
937 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
940 /* If we are reloading a (SUBREG constant ...), really reload just the
941 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
942 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
943 a pseudo and hence will become a MEM) with M1 wider than M2 and the
944 register is a pseudo, also reload the inside expression.
945 For machines that extend byte loads, do this for any SUBREG of a pseudo
946 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
947 M2 is an integral mode that gets extended when loaded.
948 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
949 either M1 is not valid for R or M2 is wider than a word but we only
950 need one word to store an M2-sized quantity in R.
951 (However, if OUT is nonzero, we need to reload the reg *and*
952 the subreg, so do nothing here, and let following statement handle it.)
954 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
955 we can't handle it here because CONST_INT does not indicate a mode.
957 Similarly, we must reload the inside expression if we have a
958 STRICT_LOW_PART (presumably, in == out in the cas).
960 Also reload the inner expression if it does not require a secondary
961 reload but the SUBREG does.
963 Finally, reload the inner expression if it is a register that is in
964 the class whose registers cannot be referenced in a different size
965 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
966 cannot reload just the inside since we might end up with the wrong
967 register class. But if it is inside a STRICT_LOW_PART, we have
968 no choice, so we hope we do get the right register class there. */
970 if (in != 0 && GET_CODE (in) == SUBREG
971 && (SUBREG_WORD (in) == 0 || strict_low)
972 #ifdef CLASS_CANNOT_CHANGE_SIZE
973 && class != CLASS_CANNOT_CHANGE_SIZE
974 #endif
975 && (CONSTANT_P (SUBREG_REG (in))
976 || GET_CODE (SUBREG_REG (in)) == PLUS
977 || strict_low
978 || (((GET_CODE (SUBREG_REG (in)) == REG
979 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
980 || GET_CODE (SUBREG_REG (in)) == MEM)
981 && ((GET_MODE_SIZE (inmode)
982 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
983 #ifdef LOAD_EXTEND_OP
984 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
986 <= UNITS_PER_WORD)
987 && (GET_MODE_SIZE (inmode)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
989 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
990 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
991 #endif
992 #ifdef WORD_REGISTER_OPERATIONS
993 || ((GET_MODE_SIZE (inmode)
994 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
995 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
996 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
997 / UNITS_PER_WORD)))
998 #endif
1000 || (GET_CODE (SUBREG_REG (in)) == REG
1001 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1002 /* The case where out is nonzero
1003 is handled differently in the following statement. */
1004 && (out == 0 || SUBREG_WORD (in) == 0)
1005 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1006 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1007 > UNITS_PER_WORD)
1008 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1009 / UNITS_PER_WORD)
1010 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1011 GET_MODE (SUBREG_REG (in)))))
1012 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
1013 + SUBREG_WORD (in)),
1014 inmode)))
1015 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1016 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1017 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1018 GET_MODE (SUBREG_REG (in)),
1019 SUBREG_REG (in))
1020 == NO_REGS))
1021 #endif
1022 #ifdef CLASS_CANNOT_CHANGE_SIZE
1023 || (GET_CODE (SUBREG_REG (in)) == REG
1024 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1025 && (TEST_HARD_REG_BIT
1026 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1027 REGNO (SUBREG_REG (in))))
1028 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1029 != GET_MODE_SIZE (inmode)))
1030 #endif
1033 in_subreg_loc = inloc;
1034 inloc = &SUBREG_REG (in);
1035 in = *inloc;
1036 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1037 if (GET_CODE (in) == MEM)
1038 /* This is supposed to happen only for paradoxical subregs made by
1039 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1040 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1041 abort ();
1042 #endif
1043 inmode = GET_MODE (in);
1046 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1047 either M1 is not valid for R or M2 is wider than a word but we only
1048 need one word to store an M2-sized quantity in R.
1050 However, we must reload the inner reg *as well as* the subreg in
1051 that case. */
1053 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1054 code above. This can happen if SUBREG_WORD != 0. */
1056 if (in != 0 && GET_CODE (in) == SUBREG
1057 && (CONSTANT_P (SUBREG_REG (in))
1058 || (GET_CODE (SUBREG_REG (in)) == REG
1059 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1060 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1061 + SUBREG_WORD (in),
1062 inmode)
1063 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1064 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1065 > UNITS_PER_WORD)
1066 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1067 / UNITS_PER_WORD)
1068 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1069 GET_MODE (SUBREG_REG (in)))))))))
1071 /* This relies on the fact that emit_reload_insns outputs the
1072 instructions for input reloads of type RELOAD_OTHER in the same
1073 order as the reloads. Thus if the outer reload is also of type
1074 RELOAD_OTHER, we are guaranteed that this inner reload will be
1075 output before the outer reload. */
1076 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1077 find_valid_class (inmode, SUBREG_WORD (in)),
1078 VOIDmode, VOIDmode, 0, 0, opnum, type);
1079 dont_remove_subreg = 1;
1082 /* Similarly for paradoxical and problematical SUBREGs on the output.
1083 Note that there is no reason we need worry about the previous value
1084 of SUBREG_REG (out); even if wider than out,
1085 storing in a subreg is entitled to clobber it all
1086 (except in the case of STRICT_LOW_PART,
1087 and in that case the constraint should label it input-output.) */
1088 if (out != 0 && GET_CODE (out) == SUBREG
1089 && (SUBREG_WORD (out) == 0 || strict_low)
1090 #ifdef CLASS_CANNOT_CHANGE_SIZE
1091 && class != CLASS_CANNOT_CHANGE_SIZE
1092 #endif
1093 && (CONSTANT_P (SUBREG_REG (out))
1094 || strict_low
1095 || (((GET_CODE (SUBREG_REG (out)) == REG
1096 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1097 || GET_CODE (SUBREG_REG (out)) == MEM)
1098 && ((GET_MODE_SIZE (outmode)
1099 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1100 #ifdef WORD_REGISTER_OPERATIONS
1101 || ((GET_MODE_SIZE (outmode)
1102 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1103 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1104 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1105 / UNITS_PER_WORD)))
1106 #endif
1108 || (GET_CODE (SUBREG_REG (out)) == REG
1109 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1110 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1111 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 > UNITS_PER_WORD)
1113 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1114 / UNITS_PER_WORD)
1115 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1116 GET_MODE (SUBREG_REG (out)))))
1117 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1118 + SUBREG_WORD (out)),
1119 outmode)))
1120 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1121 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1122 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1123 GET_MODE (SUBREG_REG (out)),
1124 SUBREG_REG (out))
1125 == NO_REGS))
1126 #endif
1127 #ifdef CLASS_CANNOT_CHANGE_SIZE
1128 || (GET_CODE (SUBREG_REG (out)) == REG
1129 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1130 && (TEST_HARD_REG_BIT
1131 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1132 REGNO (SUBREG_REG (out))))
1133 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1134 != GET_MODE_SIZE (outmode)))
1135 #endif
1138 out_subreg_loc = outloc;
1139 outloc = &SUBREG_REG (out);
1140 out = *outloc;
1141 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1142 if (GET_CODE (out) == MEM
1143 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1144 abort ();
1145 #endif
1146 outmode = GET_MODE (out);
1149 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1150 either M1 is not valid for R or M2 is wider than a word but we only
1151 need one word to store an M2-sized quantity in R.
1153 However, we must reload the inner reg *as well as* the subreg in
1154 that case. In this case, the inner reg is an in-out reload. */
1156 if (out != 0 && GET_CODE (out) == SUBREG
1157 && GET_CODE (SUBREG_REG (out)) == REG
1158 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1159 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1160 outmode)
1161 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1162 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1163 > UNITS_PER_WORD)
1164 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1165 / UNITS_PER_WORD)
1166 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1167 GET_MODE (SUBREG_REG (out)))))))
1169 /* This relies on the fact that emit_reload_insns outputs the
1170 instructions for output reloads of type RELOAD_OTHER in reverse
1171 order of the reloads. Thus if the outer reload is also of type
1172 RELOAD_OTHER, we are guaranteed that this inner reload will be
1173 output after the outer reload. */
1174 dont_remove_subreg = 1;
1175 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1176 &SUBREG_REG (out),
1177 find_valid_class (outmode, SUBREG_WORD (out)),
1178 VOIDmode, VOIDmode, 0, 0,
1179 opnum, RELOAD_OTHER);
1182 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1183 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1184 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1185 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1186 dont_share = 1;
1188 /* If IN is a SUBREG of a hard register, make a new REG. This
1189 simplifies some of the cases below. */
1191 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1192 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1193 && ! dont_remove_subreg)
1194 in = gen_rtx_REG (GET_MODE (in),
1195 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1197 /* Similarly for OUT. */
1198 if (out != 0 && GET_CODE (out) == SUBREG
1199 && GET_CODE (SUBREG_REG (out)) == REG
1200 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1201 && ! dont_remove_subreg)
1202 out = gen_rtx_REG (GET_MODE (out),
1203 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1205 /* Narrow down the class of register wanted if that is
1206 desirable on this machine for efficiency. */
1207 if (in != 0)
1208 class = PREFERRED_RELOAD_CLASS (in, class);
1210 /* Output reloads may need analogous treatment, different in detail. */
1211 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1212 if (out != 0)
1213 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1214 #endif
1216 /* Make sure we use a class that can handle the actual pseudo
1217 inside any subreg. For example, on the 386, QImode regs
1218 can appear within SImode subregs. Although GENERAL_REGS
1219 can handle SImode, QImode needs a smaller class. */
1220 #ifdef LIMIT_RELOAD_CLASS
1221 if (in_subreg_loc)
1222 class = LIMIT_RELOAD_CLASS (inmode, class);
1223 else if (in != 0 && GET_CODE (in) == SUBREG)
1224 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1226 if (out_subreg_loc)
1227 class = LIMIT_RELOAD_CLASS (outmode, class);
1228 if (out != 0 && GET_CODE (out) == SUBREG)
1229 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1230 #endif
1232 /* Verify that this class is at least possible for the mode that
1233 is specified. */
1234 if (this_insn_is_asm)
1236 enum machine_mode mode;
1237 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1238 mode = inmode;
1239 else
1240 mode = outmode;
1241 if (mode == VOIDmode)
1243 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1244 mode = word_mode;
1245 if (in != 0)
1246 inmode = word_mode;
1247 if (out != 0)
1248 outmode = word_mode;
1250 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1251 if (HARD_REGNO_MODE_OK (i, mode)
1252 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1254 int nregs = HARD_REGNO_NREGS (i, mode);
1256 int j;
1257 for (j = 1; j < nregs; j++)
1258 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1259 break;
1260 if (j == nregs)
1261 break;
1263 if (i == FIRST_PSEUDO_REGISTER)
1265 error_for_asm (this_insn, "impossible register constraint in `asm'");
1266 class = ALL_REGS;
1270 /* Optional output reloads are always OK even if we have no register class,
1271 since the function of these reloads is only to have spill_reg_store etc.
1272 set, so that the storing insn can be deleted later. */
1273 if (class == NO_REGS
1274 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1275 abort ();
1277 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1279 if (i == n_reloads)
1281 /* See if we need a secondary reload register to move between CLASS
1282 and IN or CLASS and OUT. Get the icode and push any required reloads
1283 needed for each of them if so. */
1285 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1286 if (in != 0)
1287 secondary_in_reload
1288 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1289 &secondary_in_icode);
1290 #endif
1292 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1293 if (out != 0 && GET_CODE (out) != SCRATCH)
1294 secondary_out_reload
1295 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1296 type, &secondary_out_icode);
1297 #endif
1299 /* We found no existing reload suitable for re-use.
1300 So add an additional reload. */
1302 #ifdef SECONDARY_MEMORY_NEEDED
1303 /* If a memory location is needed for the copy, make one. */
1304 if (in != 0 && GET_CODE (in) == REG
1305 && REGNO (in) < FIRST_PSEUDO_REGISTER
1306 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1307 class, inmode))
1308 get_secondary_mem (in, inmode, opnum, type);
1309 #endif
1311 i = n_reloads;
1312 reload_in[i] = in;
1313 reload_out[i] = out;
1314 reload_reg_class[i] = class;
1315 reload_inmode[i] = inmode;
1316 reload_outmode[i] = outmode;
1317 reload_reg_rtx[i] = 0;
1318 reload_optional[i] = optional;
1319 reload_nongroup[i] = 0;
1320 reload_inc[i] = 0;
1321 reload_nocombine[i] = 0;
1322 reload_in_reg[i] = inloc ? *inloc : 0;
1323 reload_out_reg[i] = outloc ? *outloc : 0;
1324 reload_opnum[i] = opnum;
1325 reload_when_needed[i] = type;
1326 reload_secondary_in_reload[i] = secondary_in_reload;
1327 reload_secondary_out_reload[i] = secondary_out_reload;
1328 reload_secondary_in_icode[i] = secondary_in_icode;
1329 reload_secondary_out_icode[i] = secondary_out_icode;
1330 reload_secondary_p[i] = 0;
1332 n_reloads++;
1334 #ifdef SECONDARY_MEMORY_NEEDED
1335 if (out != 0 && GET_CODE (out) == REG
1336 && REGNO (out) < FIRST_PSEUDO_REGISTER
1337 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1338 outmode))
1339 get_secondary_mem (out, outmode, opnum, type);
1340 #endif
1342 else
1344 /* We are reusing an existing reload,
1345 but we may have additional information for it.
1346 For example, we may now have both IN and OUT
1347 while the old one may have just one of them. */
1349 /* The modes can be different. If they are, we want to reload in
1350 the larger mode, so that the value is valid for both modes. */
1351 if (inmode != VOIDmode
1352 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1353 reload_inmode[i] = inmode;
1354 if (outmode != VOIDmode
1355 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1356 reload_outmode[i] = outmode;
1357 if (in != 0)
1359 rtx in_reg = inloc ? *inloc : 0;
1360 /* If we merge reloads for two distinct rtl expressions that
1361 are identical in content, there might be duplicate address
1362 reloads. Remove the extra set now, so that if we later find
1363 that we can inherit this reload, we can get rid of the
1364 address reloads altogether.
1366 Do not do this if both reloads are optional since the result
1367 would be an optional reload which could potentially leave
1368 unresolved address replacements.
1370 It is not sufficient to call transfer_replacements since
1371 choose_reload_regs will remove the replacements for address
1372 reloads of inherited reloads which results in the same
1373 problem. */
1374 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i])
1375 && ! (reload_optional[i] && optional))
1377 /* We must keep the address reload with the lower operand
1378 number alive. */
1379 if (opnum > reload_opnum[i])
1381 remove_address_replacements (in);
1382 in = reload_in[i];
1383 in_reg = reload_in_reg[i];
1385 else
1386 remove_address_replacements (reload_in[i]);
1388 reload_in[i] = in;
1389 reload_in_reg[i] = in_reg;
1391 if (out != 0)
1393 reload_out[i] = out;
1394 reload_out_reg[i] = outloc ? *outloc : 0;
1396 if (reg_class_subset_p (class, reload_reg_class[i]))
1397 reload_reg_class[i] = class;
1398 reload_optional[i] &= optional;
1399 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1400 opnum, reload_opnum[i]))
1401 reload_when_needed[i] = RELOAD_OTHER;
1402 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1405 /* If the ostensible rtx being reload differs from the rtx found
1406 in the location to substitute, this reload is not safe to combine
1407 because we cannot reliably tell whether it appears in the insn. */
1409 if (in != 0 && in != *inloc)
1410 reload_nocombine[i] = 1;
1412 #if 0
1413 /* This was replaced by changes in find_reloads_address_1 and the new
1414 function inc_for_reload, which go with a new meaning of reload_inc. */
1416 /* If this is an IN/OUT reload in an insn that sets the CC,
1417 it must be for an autoincrement. It doesn't work to store
1418 the incremented value after the insn because that would clobber the CC.
1419 So we must do the increment of the value reloaded from,
1420 increment it, store it back, then decrement again. */
1421 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1423 out = 0;
1424 reload_out[i] = 0;
1425 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1426 /* If we did not find a nonzero amount-to-increment-by,
1427 that contradicts the belief that IN is being incremented
1428 in an address in this insn. */
1429 if (reload_inc[i] == 0)
1430 abort ();
1432 #endif
1434 /* If we will replace IN and OUT with the reload-reg,
1435 record where they are located so that substitution need
1436 not do a tree walk. */
1438 if (replace_reloads)
1440 if (inloc != 0)
1442 register struct replacement *r = &replacements[n_replacements++];
1443 r->what = i;
1444 r->subreg_loc = in_subreg_loc;
1445 r->where = inloc;
1446 r->mode = inmode;
1448 if (outloc != 0 && outloc != inloc)
1450 register struct replacement *r = &replacements[n_replacements++];
1451 r->what = i;
1452 r->where = outloc;
1453 r->subreg_loc = out_subreg_loc;
1454 r->mode = outmode;
1458 /* If this reload is just being introduced and it has both
1459 an incoming quantity and an outgoing quantity that are
1460 supposed to be made to match, see if either one of the two
1461 can serve as the place to reload into.
1463 If one of them is acceptable, set reload_reg_rtx[i]
1464 to that one. */
1466 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1468 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1469 inmode, outmode,
1470 reload_reg_class[i], i,
1471 earlyclobber_operand_p (out));
1473 /* If the outgoing register already contains the same value
1474 as the incoming one, we can dispense with loading it.
1475 The easiest way to tell the caller that is to give a phony
1476 value for the incoming operand (same as outgoing one). */
1477 if (reload_reg_rtx[i] == out
1478 && (GET_CODE (in) == REG || CONSTANT_P (in))
1479 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1480 static_reload_reg_p, i, inmode))
1481 reload_in[i] = out;
1484 /* If this is an input reload and the operand contains a register that
1485 dies in this insn and is used nowhere else, see if it is the right class
1486 to be used for this reload. Use it if so. (This occurs most commonly
1487 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1488 this if it is also an output reload that mentions the register unless
1489 the output is a SUBREG that clobbers an entire register.
1491 Note that the operand might be one of the spill regs, if it is a
1492 pseudo reg and we are in a block where spilling has not taken place.
1493 But if there is no spilling in this block, that is OK.
1494 An explicitly used hard reg cannot be a spill reg. */
1496 if (reload_reg_rtx[i] == 0 && in != 0)
1498 rtx note;
1499 int regno;
1501 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1502 if (REG_NOTE_KIND (note) == REG_DEAD
1503 && GET_CODE (XEXP (note, 0)) == REG
1504 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1505 && reg_mentioned_p (XEXP (note, 0), in)
1506 && ! refers_to_regno_for_reload_p (regno,
1507 (regno
1508 + HARD_REGNO_NREGS (regno,
1509 inmode)),
1510 PATTERN (this_insn), inloc)
1511 /* If this is also an output reload, IN cannot be used as
1512 the reload register if it is set in this insn unless IN
1513 is also OUT. */
1514 && (out == 0 || in == out
1515 || ! hard_reg_set_here_p (regno,
1516 (regno
1517 + HARD_REGNO_NREGS (regno,
1518 inmode)),
1519 PATTERN (this_insn)))
1520 /* ??? Why is this code so different from the previous?
1521 Is there any simple coherent way to describe the two together?
1522 What's going on here. */
1523 && (in != out
1524 || (GET_CODE (in) == SUBREG
1525 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1526 / UNITS_PER_WORD)
1527 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1528 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1529 /* Make sure the operand fits in the reg that dies. */
1530 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1531 && HARD_REGNO_MODE_OK (regno, inmode)
1532 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1533 && HARD_REGNO_MODE_OK (regno, outmode)
1534 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1535 && !fixed_regs[regno])
1537 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1538 break;
1542 if (out)
1543 output_reloadnum = i;
1545 return i;
1548 /* Record an additional place we must replace a value
1549 for which we have already recorded a reload.
1550 RELOADNUM is the value returned by push_reload
1551 when the reload was recorded.
1552 This is used in insn patterns that use match_dup. */
1554 static void
1555 push_replacement (loc, reloadnum, mode)
1556 rtx *loc;
1557 int reloadnum;
1558 enum machine_mode mode;
1560 if (replace_reloads)
1562 register struct replacement *r = &replacements[n_replacements++];
1563 r->what = reloadnum;
1564 r->where = loc;
1565 r->subreg_loc = 0;
1566 r->mode = mode;
1570 /* Transfer all replacements that used to be in reload FROM to be in
1571 reload TO. */
1573 void
1574 transfer_replacements (to, from)
1575 int to, from;
1577 int i;
1579 for (i = 0; i < n_replacements; i++)
1580 if (replacements[i].what == from)
1581 replacements[i].what = to;
1584 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1585 or a subpart of it. If we have any replacements registered for IN_RTX,
1586 cancel the reloads that were supposed to load them.
1587 Return non-zero if we canceled any reloads. */
1589 remove_address_replacements (in_rtx)
1590 rtx in_rtx;
1592 int i, j;
1593 char reload_flags[MAX_RELOADS];
1594 int something_changed = 0;
1596 bzero (reload_flags, sizeof reload_flags);
1597 for (i = 0, j = 0; i < n_replacements; i++)
1599 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1600 reload_flags[replacements[i].what] |= 1;
1601 else
1603 replacements[j++] = replacements[i];
1604 reload_flags[replacements[i].what] |= 2;
1607 /* Note that the following store must be done before the recursive calls. */
1608 n_replacements = j;
1610 for (i = n_reloads - 1; i >= 0; i--)
1612 if (reload_flags[i] == 1)
1614 deallocate_reload_reg (i);
1615 remove_address_replacements (reload_in[i]);
1616 reload_in[i] = 0;
1617 something_changed = 1;
1620 return something_changed;
1623 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1624 static int
1625 loc_mentioned_in_p (loc, in)
1626 rtx *loc, in;
1628 enum rtx_code code = GET_CODE (in);
1629 const char *fmt = GET_RTX_FORMAT (code);
1630 int i, j;
1632 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1634 if (loc == &in->fld[i].rtx)
1635 return 1;
1636 if (fmt[i] == 'e')
1638 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1639 return 1;
1641 else if (fmt[i] == 'E')
1642 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1643 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1644 return 1;
1646 return 0;
1649 /* If there is only one output reload, and it is not for an earlyclobber
1650 operand, try to combine it with a (logically unrelated) input reload
1651 to reduce the number of reload registers needed.
1653 This is safe if the input reload does not appear in
1654 the value being output-reloaded, because this implies
1655 it is not needed any more once the original insn completes.
1657 If that doesn't work, see we can use any of the registers that
1658 die in this insn as a reload register. We can if it is of the right
1659 class and does not appear in the value being output-reloaded. */
1661 static void
1662 combine_reloads ()
1664 int i;
1665 int output_reload = -1;
1666 int secondary_out = -1;
1667 rtx note;
1669 /* Find the output reload; return unless there is exactly one
1670 and that one is mandatory. */
1672 for (i = 0; i < n_reloads; i++)
1673 if (reload_out[i] != 0)
1675 if (output_reload >= 0)
1676 return;
1677 output_reload = i;
1680 if (output_reload < 0 || reload_optional[output_reload])
1681 return;
1683 /* An input-output reload isn't combinable. */
1685 if (reload_in[output_reload] != 0)
1686 return;
1688 /* If this reload is for an earlyclobber operand, we can't do anything. */
1689 if (earlyclobber_operand_p (reload_out[output_reload]))
1690 return;
1692 /* Check each input reload; can we combine it? */
1694 for (i = 0; i < n_reloads; i++)
1695 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1696 /* Life span of this reload must not extend past main insn. */
1697 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1698 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1699 && reload_when_needed[i] != RELOAD_OTHER
1700 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1701 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1702 reload_outmode[output_reload]))
1703 && reload_inc[i] == 0
1704 && reload_reg_rtx[i] == 0
1705 #ifdef SECONDARY_MEMORY_NEEDED
1706 /* Don't combine two reloads with different secondary
1707 memory locations. */
1708 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1709 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1710 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1711 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1712 #endif
1713 && (SMALL_REGISTER_CLASSES
1714 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1715 : (reg_class_subset_p (reload_reg_class[i],
1716 reload_reg_class[output_reload])
1717 || reg_class_subset_p (reload_reg_class[output_reload],
1718 reload_reg_class[i])))
1719 && (MATCHES (reload_in[i], reload_out[output_reload])
1720 /* Args reversed because the first arg seems to be
1721 the one that we imagine being modified
1722 while the second is the one that might be affected. */
1723 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1724 reload_in[i])
1725 /* However, if the input is a register that appears inside
1726 the output, then we also can't share.
1727 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1728 If the same reload reg is used for both reg 69 and the
1729 result to be stored in memory, then that result
1730 will clobber the address of the memory ref. */
1731 && ! (GET_CODE (reload_in[i]) == REG
1732 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1733 reload_out[output_reload]))))
1734 && (reg_class_size[(int) reload_reg_class[i]]
1735 || SMALL_REGISTER_CLASSES)
1736 /* We will allow making things slightly worse by combining an
1737 input and an output, but no worse than that. */
1738 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1739 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1741 int j;
1743 /* We have found a reload to combine with! */
1744 reload_out[i] = reload_out[output_reload];
1745 reload_out_reg[i] = reload_out_reg[output_reload];
1746 reload_outmode[i] = reload_outmode[output_reload];
1747 /* Mark the old output reload as inoperative. */
1748 reload_out[output_reload] = 0;
1749 /* The combined reload is needed for the entire insn. */
1750 reload_when_needed[i] = RELOAD_OTHER;
1751 /* If the output reload had a secondary reload, copy it. */
1752 if (reload_secondary_out_reload[output_reload] != -1)
1754 reload_secondary_out_reload[i]
1755 = reload_secondary_out_reload[output_reload];
1756 reload_secondary_out_icode[i]
1757 = reload_secondary_out_icode[output_reload];
1760 #ifdef SECONDARY_MEMORY_NEEDED
1761 /* Copy any secondary MEM. */
1762 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1763 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1764 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1765 #endif
1766 /* If required, minimize the register class. */
1767 if (reg_class_subset_p (reload_reg_class[output_reload],
1768 reload_reg_class[i]))
1769 reload_reg_class[i] = reload_reg_class[output_reload];
1771 /* Transfer all replacements from the old reload to the combined. */
1772 for (j = 0; j < n_replacements; j++)
1773 if (replacements[j].what == output_reload)
1774 replacements[j].what = i;
1776 return;
1779 /* If this insn has only one operand that is modified or written (assumed
1780 to be the first), it must be the one corresponding to this reload. It
1781 is safe to use anything that dies in this insn for that output provided
1782 that it does not occur in the output (we already know it isn't an
1783 earlyclobber. If this is an asm insn, give up. */
1785 if (INSN_CODE (this_insn) == -1)
1786 return;
1788 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1789 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1790 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1791 return;
1793 /* See if some hard register that dies in this insn and is not used in
1794 the output is the right class. Only works if the register we pick
1795 up can fully hold our output reload. */
1796 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1797 if (REG_NOTE_KIND (note) == REG_DEAD
1798 && GET_CODE (XEXP (note, 0)) == REG
1799 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1800 reload_out[output_reload])
1801 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1802 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1803 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1804 REGNO (XEXP (note, 0)))
1805 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1806 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1807 /* Ensure that a secondary or tertiary reload for this output
1808 won't want this register. */
1809 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1810 || (! (TEST_HARD_REG_BIT
1811 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1812 REGNO (XEXP (note, 0))))
1813 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1814 || ! (TEST_HARD_REG_BIT
1815 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1816 REGNO (XEXP (note, 0)))))))
1817 && ! fixed_regs[REGNO (XEXP (note, 0))])
1819 reload_reg_rtx[output_reload]
1820 = gen_rtx_REG (reload_outmode[output_reload],
1821 REGNO (XEXP (note, 0)));
1822 return;
1826 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1827 See if one of IN and OUT is a register that may be used;
1828 this is desirable since a spill-register won't be needed.
1829 If so, return the register rtx that proves acceptable.
1831 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1832 CLASS is the register class required for the reload.
1834 If FOR_REAL is >= 0, it is the number of the reload,
1835 and in some cases when it can be discovered that OUT doesn't need
1836 to be computed, clear out reload_out[FOR_REAL].
1838 If FOR_REAL is -1, this should not be done, because this call
1839 is just to see if a register can be found, not to find and install it.
1841 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1842 puts an additional constraint on being able to use IN for OUT since
1843 IN must not appear elsewhere in the insn (it is assumed that IN itself
1844 is safe from the earlyclobber). */
1846 static rtx
1847 find_dummy_reload (real_in, real_out, inloc, outloc,
1848 inmode, outmode, class, for_real, earlyclobber)
1849 rtx real_in, real_out;
1850 rtx *inloc, *outloc;
1851 enum machine_mode inmode, outmode;
1852 enum reg_class class;
1853 int for_real;
1854 int earlyclobber;
1856 rtx in = real_in;
1857 rtx out = real_out;
1858 int in_offset = 0;
1859 int out_offset = 0;
1860 rtx value = 0;
1862 /* If operands exceed a word, we can't use either of them
1863 unless they have the same size. */
1864 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1865 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1866 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1867 return 0;
1869 /* Find the inside of any subregs. */
1870 while (GET_CODE (out) == SUBREG)
1872 out_offset = SUBREG_WORD (out);
1873 out = SUBREG_REG (out);
1875 while (GET_CODE (in) == SUBREG)
1877 in_offset = SUBREG_WORD (in);
1878 in = SUBREG_REG (in);
1881 /* Narrow down the reg class, the same way push_reload will;
1882 otherwise we might find a dummy now, but push_reload won't. */
1883 class = PREFERRED_RELOAD_CLASS (in, class);
1885 /* See if OUT will do. */
1886 if (GET_CODE (out) == REG
1887 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1889 register int regno = REGNO (out) + out_offset;
1890 int nwords = HARD_REGNO_NREGS (regno, outmode);
1891 rtx saved_rtx;
1893 /* When we consider whether the insn uses OUT,
1894 ignore references within IN. They don't prevent us
1895 from copying IN into OUT, because those refs would
1896 move into the insn that reloads IN.
1898 However, we only ignore IN in its role as this reload.
1899 If the insn uses IN elsewhere and it contains OUT,
1900 that counts. We can't be sure it's the "same" operand
1901 so it might not go through this reload. */
1902 saved_rtx = *inloc;
1903 *inloc = const0_rtx;
1905 if (regno < FIRST_PSEUDO_REGISTER
1906 /* A fixed reg that can overlap other regs better not be used
1907 for reloading in any way. */
1908 #ifdef OVERLAPPING_REGNO_P
1909 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1910 #endif
1911 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1912 PATTERN (this_insn), outloc))
1914 int i;
1915 for (i = 0; i < nwords; i++)
1916 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1917 regno + i))
1918 break;
1920 if (i == nwords)
1922 if (GET_CODE (real_out) == REG)
1923 value = real_out;
1924 else
1925 value = gen_rtx_REG (outmode, regno);
1929 *inloc = saved_rtx;
1932 /* Consider using IN if OUT was not acceptable
1933 or if OUT dies in this insn (like the quotient in a divmod insn).
1934 We can't use IN unless it is dies in this insn,
1935 which means we must know accurately which hard regs are live.
1936 Also, the result can't go in IN if IN is used within OUT,
1937 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1938 if (hard_regs_live_known
1939 && GET_CODE (in) == REG
1940 && REGNO (in) < FIRST_PSEUDO_REGISTER
1941 && (value == 0
1942 || find_reg_note (this_insn, REG_UNUSED, real_out))
1943 && find_reg_note (this_insn, REG_DEAD, real_in)
1944 && !fixed_regs[REGNO (in)]
1945 && HARD_REGNO_MODE_OK (REGNO (in),
1946 /* The only case where out and real_out might
1947 have different modes is where real_out
1948 is a subreg, and in that case, out
1949 has a real mode. */
1950 (GET_MODE (out) != VOIDmode
1951 ? GET_MODE (out) : outmode)))
1953 register int regno = REGNO (in) + in_offset;
1954 int nwords = HARD_REGNO_NREGS (regno, inmode);
1956 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1957 && ! hard_reg_set_here_p (regno, regno + nwords,
1958 PATTERN (this_insn))
1959 && (! earlyclobber
1960 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1961 PATTERN (this_insn), inloc)))
1963 int i;
1964 for (i = 0; i < nwords; i++)
1965 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1966 regno + i))
1967 break;
1969 if (i == nwords)
1971 /* If we were going to use OUT as the reload reg
1972 and changed our mind, it means OUT is a dummy that
1973 dies here. So don't bother copying value to it. */
1974 if (for_real >= 0 && value == real_out)
1975 reload_out[for_real] = 0;
1976 if (GET_CODE (real_in) == REG)
1977 value = real_in;
1978 else
1979 value = gen_rtx_REG (inmode, regno);
1984 return value;
1987 /* This page contains subroutines used mainly for determining
1988 whether the IN or an OUT of a reload can serve as the
1989 reload register. */
1991 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1993 static int
1994 earlyclobber_operand_p (x)
1995 rtx x;
1997 int i;
1999 for (i = 0; i < n_earlyclobbers; i++)
2000 if (reload_earlyclobbers[i] == x)
2001 return 1;
2003 return 0;
2006 /* Return 1 if expression X alters a hard reg in the range
2007 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2008 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2009 X should be the body of an instruction. */
2011 static int
2012 hard_reg_set_here_p (beg_regno, end_regno, x)
2013 register int beg_regno, end_regno;
2014 rtx x;
2016 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2018 register rtx op0 = SET_DEST (x);
2019 while (GET_CODE (op0) == SUBREG)
2020 op0 = SUBREG_REG (op0);
2021 if (GET_CODE (op0) == REG)
2023 register int r = REGNO (op0);
2024 /* See if this reg overlaps range under consideration. */
2025 if (r < end_regno
2026 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2027 return 1;
2030 else if (GET_CODE (x) == PARALLEL)
2032 register int i = XVECLEN (x, 0) - 1;
2033 for (; i >= 0; i--)
2034 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2035 return 1;
2038 return 0;
2041 /* Return 1 if ADDR is a valid memory address for mode MODE,
2042 and check that each pseudo reg has the proper kind of
2043 hard reg. */
2046 strict_memory_address_p (mode, addr)
2047 enum machine_mode mode;
2048 register rtx addr;
2050 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2051 return 0;
2053 win:
2054 return 1;
2057 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2058 if they are the same hard reg, and has special hacks for
2059 autoincrement and autodecrement.
2060 This is specifically intended for find_reloads to use
2061 in determining whether two operands match.
2062 X is the operand whose number is the lower of the two.
2064 The value is 2 if Y contains a pre-increment that matches
2065 a non-incrementing address in X. */
2067 /* ??? To be completely correct, we should arrange to pass
2068 for X the output operand and for Y the input operand.
2069 For now, we assume that the output operand has the lower number
2070 because that is natural in (SET output (... input ...)). */
2073 operands_match_p (x, y)
2074 register rtx x, y;
2076 register int i;
2077 register RTX_CODE code = GET_CODE (x);
2078 register const char *fmt;
2079 int success_2;
2081 if (x == y)
2082 return 1;
2083 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2084 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2085 && GET_CODE (SUBREG_REG (y)) == REG)))
2087 register int j;
2089 if (code == SUBREG)
2091 i = REGNO (SUBREG_REG (x));
2092 if (i >= FIRST_PSEUDO_REGISTER)
2093 goto slow;
2094 i += SUBREG_WORD (x);
2096 else
2097 i = REGNO (x);
2099 if (GET_CODE (y) == SUBREG)
2101 j = REGNO (SUBREG_REG (y));
2102 if (j >= FIRST_PSEUDO_REGISTER)
2103 goto slow;
2104 j += SUBREG_WORD (y);
2106 else
2107 j = REGNO (y);
2109 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2110 multiple hard register group, so that for example (reg:DI 0) and
2111 (reg:SI 1) will be considered the same register. */
2112 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2113 && i < FIRST_PSEUDO_REGISTER)
2114 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2115 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2116 && j < FIRST_PSEUDO_REGISTER)
2117 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2119 return i == j;
2121 /* If two operands must match, because they are really a single
2122 operand of an assembler insn, then two postincrements are invalid
2123 because the assembler insn would increment only once.
2124 On the other hand, an postincrement matches ordinary indexing
2125 if the postincrement is the output operand. */
2126 if (code == POST_DEC || code == POST_INC)
2127 return operands_match_p (XEXP (x, 0), y);
2128 /* Two preincrements are invalid
2129 because the assembler insn would increment only once.
2130 On the other hand, an preincrement matches ordinary indexing
2131 if the preincrement is the input operand.
2132 In this case, return 2, since some callers need to do special
2133 things when this happens. */
2134 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2135 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2137 slow:
2139 /* Now we have disposed of all the cases
2140 in which different rtx codes can match. */
2141 if (code != GET_CODE (y))
2142 return 0;
2143 if (code == LABEL_REF)
2144 return XEXP (x, 0) == XEXP (y, 0);
2145 if (code == SYMBOL_REF)
2146 return XSTR (x, 0) == XSTR (y, 0);
2148 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2150 if (GET_MODE (x) != GET_MODE (y))
2151 return 0;
2153 /* Compare the elements. If any pair of corresponding elements
2154 fail to match, return 0 for the whole things. */
2156 success_2 = 0;
2157 fmt = GET_RTX_FORMAT (code);
2158 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2160 int val, j;
2161 switch (fmt[i])
2163 case 'w':
2164 if (XWINT (x, i) != XWINT (y, i))
2165 return 0;
2166 break;
2168 case 'i':
2169 if (XINT (x, i) != XINT (y, i))
2170 return 0;
2171 break;
2173 case 'e':
2174 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2175 if (val == 0)
2176 return 0;
2177 /* If any subexpression returns 2,
2178 we should return 2 if we are successful. */
2179 if (val == 2)
2180 success_2 = 1;
2181 break;
2183 case '0':
2184 break;
2186 case 'E':
2187 if (XVECLEN (x, i) != XVECLEN (y, i))
2188 return 0;
2189 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2191 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2192 if (val == 0)
2193 return 0;
2194 if (val == 2)
2195 success_2 = 1;
2197 break;
2199 /* It is believed that rtx's at this level will never
2200 contain anything but integers and other rtx's,
2201 except for within LABEL_REFs and SYMBOL_REFs. */
2202 default:
2203 abort ();
2206 return 1 + success_2;
2209 /* Describe the range of registers or memory referenced by X.
2210 If X is a register, set REG_FLAG and put the first register
2211 number into START and the last plus one into END.
2212 If X is a memory reference, put a base address into BASE
2213 and a range of integer offsets into START and END.
2214 If X is pushing on the stack, we can assume it causes no trouble,
2215 so we set the SAFE field. */
2217 static struct decomposition
2218 decompose (x)
2219 rtx x;
2221 struct decomposition val;
2222 int all_const = 0;
2224 val.reg_flag = 0;
2225 val.safe = 0;
2226 val.base = 0;
2227 if (GET_CODE (x) == MEM)
2229 rtx base = NULL_RTX, offset = 0;
2230 rtx addr = XEXP (x, 0);
2232 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2233 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2235 val.base = XEXP (addr, 0);
2236 val.start = - GET_MODE_SIZE (GET_MODE (x));
2237 val.end = GET_MODE_SIZE (GET_MODE (x));
2238 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2239 return val;
2242 if (GET_CODE (addr) == CONST)
2244 addr = XEXP (addr, 0);
2245 all_const = 1;
2247 if (GET_CODE (addr) == PLUS)
2249 if (CONSTANT_P (XEXP (addr, 0)))
2251 base = XEXP (addr, 1);
2252 offset = XEXP (addr, 0);
2254 else if (CONSTANT_P (XEXP (addr, 1)))
2256 base = XEXP (addr, 0);
2257 offset = XEXP (addr, 1);
2261 if (offset == 0)
2263 base = addr;
2264 offset = const0_rtx;
2266 if (GET_CODE (offset) == CONST)
2267 offset = XEXP (offset, 0);
2268 if (GET_CODE (offset) == PLUS)
2270 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2272 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2273 offset = XEXP (offset, 0);
2275 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2277 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2278 offset = XEXP (offset, 1);
2280 else
2282 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2283 offset = const0_rtx;
2286 else if (GET_CODE (offset) != CONST_INT)
2288 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2289 offset = const0_rtx;
2292 if (all_const && GET_CODE (base) == PLUS)
2293 base = gen_rtx_CONST (GET_MODE (base), base);
2295 if (GET_CODE (offset) != CONST_INT)
2296 abort ();
2298 val.start = INTVAL (offset);
2299 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2300 val.base = base;
2301 return val;
2303 else if (GET_CODE (x) == REG)
2305 val.reg_flag = 1;
2306 val.start = true_regnum (x);
2307 if (val.start < 0)
2309 /* A pseudo with no hard reg. */
2310 val.start = REGNO (x);
2311 val.end = val.start + 1;
2313 else
2314 /* A hard reg. */
2315 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2317 else if (GET_CODE (x) == SUBREG)
2319 if (GET_CODE (SUBREG_REG (x)) != REG)
2320 /* This could be more precise, but it's good enough. */
2321 return decompose (SUBREG_REG (x));
2322 val.reg_flag = 1;
2323 val.start = true_regnum (x);
2324 if (val.start < 0)
2325 return decompose (SUBREG_REG (x));
2326 else
2327 /* A hard reg. */
2328 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2330 else if (CONSTANT_P (x)
2331 /* This hasn't been assigned yet, so it can't conflict yet. */
2332 || GET_CODE (x) == SCRATCH)
2333 val.safe = 1;
2334 else
2335 abort ();
2336 return val;
2339 /* Return 1 if altering Y will not modify the value of X.
2340 Y is also described by YDATA, which should be decompose (Y). */
2342 static int
2343 immune_p (x, y, ydata)
2344 rtx x, y;
2345 struct decomposition ydata;
2347 struct decomposition xdata;
2349 if (ydata.reg_flag)
2350 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2351 if (ydata.safe)
2352 return 1;
2354 if (GET_CODE (y) != MEM)
2355 abort ();
2356 /* If Y is memory and X is not, Y can't affect X. */
2357 if (GET_CODE (x) != MEM)
2358 return 1;
2360 xdata = decompose (x);
2362 if (! rtx_equal_p (xdata.base, ydata.base))
2364 /* If bases are distinct symbolic constants, there is no overlap. */
2365 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2366 return 1;
2367 /* Constants and stack slots never overlap. */
2368 if (CONSTANT_P (xdata.base)
2369 && (ydata.base == frame_pointer_rtx
2370 || ydata.base == hard_frame_pointer_rtx
2371 || ydata.base == stack_pointer_rtx))
2372 return 1;
2373 if (CONSTANT_P (ydata.base)
2374 && (xdata.base == frame_pointer_rtx
2375 || xdata.base == hard_frame_pointer_rtx
2376 || xdata.base == stack_pointer_rtx))
2377 return 1;
2378 /* If either base is variable, we don't know anything. */
2379 return 0;
2383 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2386 /* Similar, but calls decompose. */
2389 safe_from_earlyclobber (op, clobber)
2390 rtx op, clobber;
2392 struct decomposition early_data;
2394 early_data = decompose (clobber);
2395 return immune_p (op, clobber, early_data);
2398 /* Main entry point of this file: search the body of INSN
2399 for values that need reloading and record them with push_reload.
2400 REPLACE nonzero means record also where the values occur
2401 so that subst_reloads can be used.
2403 IND_LEVELS says how many levels of indirection are supported by this
2404 machine; a value of zero means that a memory reference is not a valid
2405 memory address.
2407 LIVE_KNOWN says we have valid information about which hard
2408 regs are live at each point in the program; this is true when
2409 we are called from global_alloc but false when stupid register
2410 allocation has been done.
2412 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2413 which is nonnegative if the reg has been commandeered for reloading into.
2414 It is copied into STATIC_RELOAD_REG_P and referenced from there
2415 by various subroutines.
2417 Return TRUE if some operands need to be changed, because of swapping
2418 commutative operands, reg_equiv_address substitution, or whatever. */
2421 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2422 rtx insn;
2423 int replace, ind_levels;
2424 int live_known;
2425 short *reload_reg_p;
2427 #ifdef REGISTER_CONSTRAINTS
2429 register int insn_code_number;
2430 register int i, j;
2431 int noperands;
2432 /* These start out as the constraints for the insn
2433 and they are chewed up as we consider alternatives. */
2434 char *constraints[MAX_RECOG_OPERANDS];
2435 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2436 a register. */
2437 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2438 char pref_or_nothing[MAX_RECOG_OPERANDS];
2439 /* Nonzero for a MEM operand whose entire address needs a reload. */
2440 int address_reloaded[MAX_RECOG_OPERANDS];
2441 /* Value of enum reload_type to use for operand. */
2442 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2443 /* Value of enum reload_type to use within address of operand. */
2444 enum reload_type address_type[MAX_RECOG_OPERANDS];
2445 /* Save the usage of each operand. */
2446 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2447 int no_input_reloads = 0, no_output_reloads = 0;
2448 int n_alternatives;
2449 int this_alternative[MAX_RECOG_OPERANDS];
2450 char this_alternative_win[MAX_RECOG_OPERANDS];
2451 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2452 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2453 int this_alternative_matches[MAX_RECOG_OPERANDS];
2454 int swapped;
2455 int goal_alternative[MAX_RECOG_OPERANDS];
2456 int this_alternative_number;
2457 int goal_alternative_number;
2458 int operand_reloadnum[MAX_RECOG_OPERANDS];
2459 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2460 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2461 char goal_alternative_win[MAX_RECOG_OPERANDS];
2462 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2463 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2464 int goal_alternative_swapped;
2465 int best;
2466 int commutative;
2467 int changed;
2468 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2469 rtx substed_operand[MAX_RECOG_OPERANDS];
2470 rtx body = PATTERN (insn);
2471 rtx set = single_set (insn);
2472 int goal_earlyclobber, this_earlyclobber;
2473 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2474 int retval = 0;
2475 /* Cache the last regno for the last pseudo we did an output reload
2476 for in case the next insn uses it. */
2477 static int last_output_reload_regno = -1;
2479 this_insn = insn;
2480 n_reloads = 0;
2481 n_replacements = 0;
2482 n_earlyclobbers = 0;
2483 replace_reloads = replace;
2484 hard_regs_live_known = live_known;
2485 static_reload_reg_p = reload_reg_p;
2487 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2488 neither are insns that SET cc0. Insns that use CC0 are not allowed
2489 to have any input reloads. */
2490 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2491 no_output_reloads = 1;
2493 #ifdef HAVE_cc0
2494 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2495 no_input_reloads = 1;
2496 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2497 no_output_reloads = 1;
2498 #endif
2500 #ifdef SECONDARY_MEMORY_NEEDED
2501 /* The eliminated forms of any secondary memory locations are per-insn, so
2502 clear them out here. */
2504 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2505 #endif
2507 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2508 is cheap to move between them. If it is not, there may not be an insn
2509 to do the copy, so we may need a reload. */
2510 if (GET_CODE (body) == SET
2511 && GET_CODE (SET_DEST (body)) == REG
2512 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2513 && GET_CODE (SET_SRC (body)) == REG
2514 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2515 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2516 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2517 return 0;
2519 extract_insn (insn);
2521 noperands = reload_n_operands = recog_n_operands;
2522 n_alternatives = recog_n_alternatives;
2524 /* Just return "no reloads" if insn has no operands with constraints. */
2525 if (noperands == 0 || n_alternatives == 0)
2526 return 0;
2528 insn_code_number = INSN_CODE (insn);
2529 this_insn_is_asm = insn_code_number < 0;
2531 bcopy ((char *) recog_operand_mode, (char *) operand_mode,
2532 noperands * sizeof (enum machine_mode));
2533 bcopy ((char *) recog_constraints, (char *) constraints,
2534 noperands * sizeof (char *));
2536 commutative = -1;
2538 /* If we will need to know, later, whether some pair of operands
2539 are the same, we must compare them now and save the result.
2540 Reloading the base and index registers will clobber them
2541 and afterward they will fail to match. */
2543 for (i = 0; i < noperands; i++)
2545 register char *p;
2546 register int c;
2548 substed_operand[i] = recog_operand[i];
2549 p = constraints[i];
2551 modified[i] = RELOAD_READ;
2553 /* Scan this operand's constraint to see if it is an output operand,
2554 an in-out operand, is commutative, or should match another. */
2556 while ((c = *p++))
2558 if (c == '=')
2559 modified[i] = RELOAD_WRITE;
2560 else if (c == '+')
2561 modified[i] = RELOAD_READ_WRITE;
2562 else if (c == '%')
2564 /* The last operand should not be marked commutative. */
2565 if (i == noperands - 1)
2566 abort ();
2568 commutative = i;
2570 else if (c >= '0' && c <= '9')
2572 c -= '0';
2573 operands_match[c][i]
2574 = operands_match_p (recog_operand[c], recog_operand[i]);
2576 /* An operand may not match itself. */
2577 if (c == i)
2578 abort ();
2580 /* If C can be commuted with C+1, and C might need to match I,
2581 then C+1 might also need to match I. */
2582 if (commutative >= 0)
2584 if (c == commutative || c == commutative + 1)
2586 int other = c + (c == commutative ? 1 : -1);
2587 operands_match[other][i]
2588 = operands_match_p (recog_operand[other], recog_operand[i]);
2590 if (i == commutative || i == commutative + 1)
2592 int other = i + (i == commutative ? 1 : -1);
2593 operands_match[c][other]
2594 = operands_match_p (recog_operand[c], recog_operand[other]);
2596 /* Note that C is supposed to be less than I.
2597 No need to consider altering both C and I because in
2598 that case we would alter one into the other. */
2604 /* Examine each operand that is a memory reference or memory address
2605 and reload parts of the addresses into index registers.
2606 Also here any references to pseudo regs that didn't get hard regs
2607 but are equivalent to constants get replaced in the insn itself
2608 with those constants. Nobody will ever see them again.
2610 Finally, set up the preferred classes of each operand. */
2612 for (i = 0; i < noperands; i++)
2614 register RTX_CODE code = GET_CODE (recog_operand[i]);
2616 address_reloaded[i] = 0;
2617 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2618 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2619 : RELOAD_OTHER);
2620 address_type[i]
2621 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2622 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2623 : RELOAD_OTHER);
2625 if (*constraints[i] == 0)
2626 /* Ignore things like match_operator operands. */
2628 else if (constraints[i][0] == 'p')
2630 find_reloads_address (VOIDmode, NULL_PTR,
2631 recog_operand[i], recog_operand_loc[i],
2632 i, operand_type[i], ind_levels, insn);
2634 /* If we now have a simple operand where we used to have a
2635 PLUS or MULT, re-recognize and try again. */
2636 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2637 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2638 && (GET_CODE (recog_operand[i]) == MULT
2639 || GET_CODE (recog_operand[i]) == PLUS))
2641 INSN_CODE (insn) = -1;
2642 retval = find_reloads (insn, replace, ind_levels, live_known,
2643 reload_reg_p);
2644 return retval;
2647 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2649 else if (code == MEM)
2651 address_reloaded[i]
2652 = find_reloads_address (GET_MODE (recog_operand[i]),
2653 recog_operand_loc[i],
2654 XEXP (recog_operand[i], 0),
2655 &XEXP (recog_operand[i], 0),
2656 i, address_type[i], ind_levels, insn);
2657 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2659 else if (code == SUBREG)
2661 rtx reg = SUBREG_REG (recog_operand[i]);
2662 rtx op
2663 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2664 ind_levels,
2665 set != 0
2666 && &SET_DEST (set) == recog_operand_loc[i],
2667 insn);
2669 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2670 that didn't get a hard register, emit a USE with a REG_EQUAL
2671 note in front so that we might inherit a previous, possibly
2672 wider reload. */
2674 if (replace
2675 && GET_CODE (op) == MEM
2676 && GET_CODE (reg) == REG
2677 && (GET_MODE_SIZE (GET_MODE (reg))
2678 >= GET_MODE_SIZE (GET_MODE (op))))
2679 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2680 = gen_rtx_EXPR_LIST (REG_EQUAL,
2681 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2683 substed_operand[i] = recog_operand[i] = op;
2685 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2686 /* We can get a PLUS as an "operand" as a result of register
2687 elimination. See eliminate_regs and gen_reload. We handle
2688 a unary operator by reloading the operand. */
2689 substed_operand[i] = recog_operand[i]
2690 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2691 ind_levels, 0, insn);
2692 else if (code == REG)
2694 /* This is equivalent to calling find_reloads_toplev.
2695 The code is duplicated for speed.
2696 When we find a pseudo always equivalent to a constant,
2697 we replace it by the constant. We must be sure, however,
2698 that we don't try to replace it in the insn in which it
2699 is being set. */
2700 register int regno = REGNO (recog_operand[i]);
2701 if (reg_equiv_constant[regno] != 0
2702 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2704 /* Record the existing mode so that the check if constants are
2705 allowed will work when operand_mode isn't specified. */
2707 if (operand_mode[i] == VOIDmode)
2708 operand_mode[i] = GET_MODE (recog_operand[i]);
2710 substed_operand[i] = recog_operand[i]
2711 = reg_equiv_constant[regno];
2713 if (reg_equiv_memory_loc[regno] != 0
2714 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2715 /* We need not give a valid is_set_dest argument since the case
2716 of a constant equivalence was checked above. */
2717 substed_operand[i] = recog_operand[i]
2718 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2719 ind_levels, 0, insn);
2721 /* If the operand is still a register (we didn't replace it with an
2722 equivalent), get the preferred class to reload it into. */
2723 code = GET_CODE (recog_operand[i]);
2724 preferred_class[i]
2725 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2726 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2727 pref_or_nothing[i]
2728 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2729 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2732 #ifdef HAVE_cc0
2733 /* If we made any reloads for addresses, see if they violate a
2734 "no input reloads" requirement for this insn. */
2735 if (no_input_reloads)
2736 for (i = 0; i < n_reloads; i++)
2737 if (reload_in[i] != 0)
2738 abort ();
2739 #endif
2741 /* If this is simply a copy from operand 1 to operand 0, merge the
2742 preferred classes for the operands. */
2743 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2744 && recog_operand[1] == SET_SRC (set))
2746 preferred_class[0] = preferred_class[1]
2747 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2748 pref_or_nothing[0] |= pref_or_nothing[1];
2749 pref_or_nothing[1] |= pref_or_nothing[0];
2752 /* Now see what we need for pseudo-regs that didn't get hard regs
2753 or got the wrong kind of hard reg. For this, we must consider
2754 all the operands together against the register constraints. */
2756 best = MAX_RECOG_OPERANDS * 2 + 600;
2758 swapped = 0;
2759 goal_alternative_swapped = 0;
2760 try_swapped:
2762 /* The constraints are made of several alternatives.
2763 Each operand's constraint looks like foo,bar,... with commas
2764 separating the alternatives. The first alternatives for all
2765 operands go together, the second alternatives go together, etc.
2767 First loop over alternatives. */
2769 for (this_alternative_number = 0;
2770 this_alternative_number < n_alternatives;
2771 this_alternative_number++)
2773 /* Loop over operands for one constraint alternative. */
2774 /* LOSERS counts those that don't fit this alternative
2775 and would require loading. */
2776 int losers = 0;
2777 /* BAD is set to 1 if it some operand can't fit this alternative
2778 even after reloading. */
2779 int bad = 0;
2780 /* REJECT is a count of how undesirable this alternative says it is
2781 if any reloading is required. If the alternative matches exactly
2782 then REJECT is ignored, but otherwise it gets this much
2783 counted against it in addition to the reloading needed. Each
2784 ? counts three times here since we want the disparaging caused by
2785 a bad register class to only count 1/3 as much. */
2786 int reject = 0;
2788 this_earlyclobber = 0;
2790 for (i = 0; i < noperands; i++)
2792 register char *p = constraints[i];
2793 register int win = 0;
2794 /* 0 => this operand can be reloaded somehow for this alternative */
2795 int badop = 1;
2796 /* 0 => this operand can be reloaded if the alternative allows regs. */
2797 int winreg = 0;
2798 int c;
2799 register rtx operand = recog_operand[i];
2800 int offset = 0;
2801 /* Nonzero means this is a MEM that must be reloaded into a reg
2802 regardless of what the constraint says. */
2803 int force_reload = 0;
2804 int offmemok = 0;
2805 /* Nonzero if a constant forced into memory would be OK for this
2806 operand. */
2807 int constmemok = 0;
2808 int earlyclobber = 0;
2810 /* If the predicate accepts a unary operator, it means that
2811 we need to reload the operand, but do not do this for
2812 match_operator and friends. */
2813 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2814 operand = XEXP (operand, 0);
2816 /* If the operand is a SUBREG, extract
2817 the REG or MEM (or maybe even a constant) within.
2818 (Constants can occur as a result of reg_equiv_constant.) */
2820 while (GET_CODE (operand) == SUBREG)
2822 offset += SUBREG_WORD (operand);
2823 operand = SUBREG_REG (operand);
2824 /* Force reload if this is a constant or PLUS or if there may
2825 be a problem accessing OPERAND in the outer mode. */
2826 if (CONSTANT_P (operand)
2827 || GET_CODE (operand) == PLUS
2828 /* We must force a reload of paradoxical SUBREGs
2829 of a MEM because the alignment of the inner value
2830 may not be enough to do the outer reference. On
2831 big-endian machines, it may also reference outside
2832 the object.
2834 On machines that extend byte operations and we have a
2835 SUBREG where both the inner and outer modes are no wider
2836 than a word and the inner mode is narrower, is integral,
2837 and gets extended when loaded from memory, combine.c has
2838 made assumptions about the behavior of the machine in such
2839 register access. If the data is, in fact, in memory we
2840 must always load using the size assumed to be in the
2841 register and let the insn do the different-sized
2842 accesses.
2844 This is doubly true if WORD_REGISTER_OPERATIONS. In
2845 this case eliminate_regs has left non-paradoxical
2846 subregs for push_reloads to see. Make sure it does
2847 by forcing the reload.
2849 ??? When is it right at this stage to have a subreg
2850 of a mem that is _not_ to be handled specialy? IMO
2851 those should have been reduced to just a mem. */
2852 || ((GET_CODE (operand) == MEM
2853 || (GET_CODE (operand)== REG
2854 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2855 #ifndef WORD_REGISTER_OPERATIONS
2856 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2857 < BIGGEST_ALIGNMENT)
2858 && (GET_MODE_SIZE (operand_mode[i])
2859 > GET_MODE_SIZE (GET_MODE (operand))))
2860 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2861 #ifdef LOAD_EXTEND_OP
2862 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2863 && (GET_MODE_SIZE (GET_MODE (operand))
2864 <= UNITS_PER_WORD)
2865 && (GET_MODE_SIZE (operand_mode[i])
2866 > GET_MODE_SIZE (GET_MODE (operand)))
2867 && INTEGRAL_MODE_P (GET_MODE (operand))
2868 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2869 #endif
2871 #endif
2873 /* Subreg of a hard reg which can't handle the subreg's mode
2874 or which would handle that mode in the wrong number of
2875 registers for subregging to work. */
2876 || (GET_CODE (operand) == REG
2877 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2878 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2879 && (GET_MODE_SIZE (GET_MODE (operand))
2880 > UNITS_PER_WORD)
2881 && ((GET_MODE_SIZE (GET_MODE (operand))
2882 / UNITS_PER_WORD)
2883 != HARD_REGNO_NREGS (REGNO (operand),
2884 GET_MODE (operand))))
2885 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2886 operand_mode[i]))))
2887 force_reload = 1;
2890 this_alternative[i] = (int) NO_REGS;
2891 this_alternative_win[i] = 0;
2892 this_alternative_offmemok[i] = 0;
2893 this_alternative_earlyclobber[i] = 0;
2894 this_alternative_matches[i] = -1;
2896 /* An empty constraint or empty alternative
2897 allows anything which matched the pattern. */
2898 if (*p == 0 || *p == ',')
2899 win = 1, badop = 0;
2901 /* Scan this alternative's specs for this operand;
2902 set WIN if the operand fits any letter in this alternative.
2903 Otherwise, clear BADOP if this operand could
2904 fit some letter after reloads,
2905 or set WINREG if this operand could fit after reloads
2906 provided the constraint allows some registers. */
2908 while (*p && (c = *p++) != ',')
2909 switch (c)
2911 case '=':
2912 case '+':
2913 case '*':
2914 break;
2916 case '%':
2917 /* The last operand should not be marked commutative. */
2918 if (i != noperands - 1)
2919 commutative = i;
2920 break;
2922 case '?':
2923 reject += 6;
2924 break;
2926 case '!':
2927 reject = 600;
2928 break;
2930 case '#':
2931 /* Ignore rest of this alternative as far as
2932 reloading is concerned. */
2933 while (*p && *p != ',') p++;
2934 break;
2936 case '0':
2937 case '1':
2938 case '2':
2939 case '3':
2940 case '4':
2941 c -= '0';
2942 this_alternative_matches[i] = c;
2943 /* We are supposed to match a previous operand.
2944 If we do, we win if that one did.
2945 If we do not, count both of the operands as losers.
2946 (This is too conservative, since most of the time
2947 only a single reload insn will be needed to make
2948 the two operands win. As a result, this alternative
2949 may be rejected when it is actually desirable.) */
2950 if ((swapped && (c != commutative || i != commutative + 1))
2951 /* If we are matching as if two operands were swapped,
2952 also pretend that operands_match had been computed
2953 with swapped.
2954 But if I is the second of those and C is the first,
2955 don't exchange them, because operands_match is valid
2956 only on one side of its diagonal. */
2957 ? (operands_match
2958 [(c == commutative || c == commutative + 1)
2959 ? 2*commutative + 1 - c : c]
2960 [(i == commutative || i == commutative + 1)
2961 ? 2*commutative + 1 - i : i])
2962 : operands_match[c][i])
2964 /* If we are matching a non-offsettable address where an
2965 offsettable address was expected, then we must reject
2966 this combination, because we can't reload it. */
2967 if (this_alternative_offmemok[c]
2968 && GET_CODE (recog_operand[c]) == MEM
2969 && this_alternative[c] == (int) NO_REGS
2970 && ! this_alternative_win[c])
2971 bad = 1;
2973 win = this_alternative_win[c];
2975 else
2977 /* Operands don't match. */
2978 rtx value;
2979 /* Retroactively mark the operand we had to match
2980 as a loser, if it wasn't already. */
2981 if (this_alternative_win[c])
2982 losers++;
2983 this_alternative_win[c] = 0;
2984 if (this_alternative[c] == (int) NO_REGS)
2985 bad = 1;
2986 /* But count the pair only once in the total badness of
2987 this alternative, if the pair can be a dummy reload. */
2988 value
2989 = find_dummy_reload (recog_operand[i], recog_operand[c],
2990 recog_operand_loc[i], recog_operand_loc[c],
2991 operand_mode[i], operand_mode[c],
2992 this_alternative[c], -1,
2993 this_alternative_earlyclobber[c]);
2995 if (value != 0)
2996 losers--;
2998 /* This can be fixed with reloads if the operand
2999 we are supposed to match can be fixed with reloads. */
3000 badop = 0;
3001 this_alternative[i] = this_alternative[c];
3003 /* If we have to reload this operand and some previous
3004 operand also had to match the same thing as this
3005 operand, we don't know how to do that. So reject this
3006 alternative. */
3007 if (! win || force_reload)
3008 for (j = 0; j < i; j++)
3009 if (this_alternative_matches[j]
3010 == this_alternative_matches[i])
3011 badop = 1;
3013 break;
3015 case 'p':
3016 /* All necessary reloads for an address_operand
3017 were handled in find_reloads_address. */
3018 this_alternative[i] = (int) BASE_REG_CLASS;
3019 win = 1;
3020 break;
3022 case 'm':
3023 if (force_reload)
3024 break;
3025 if (GET_CODE (operand) == MEM
3026 || (GET_CODE (operand) == REG
3027 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3028 && reg_renumber[REGNO (operand)] < 0))
3029 win = 1;
3030 if (CONSTANT_P (operand)
3031 /* force_const_mem does not accept HIGH. */
3032 && GET_CODE (operand) != HIGH)
3033 badop = 0;
3034 constmemok = 1;
3035 break;
3037 case '<':
3038 if (GET_CODE (operand) == MEM
3039 && ! address_reloaded[i]
3040 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3041 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3042 win = 1;
3043 break;
3045 case '>':
3046 if (GET_CODE (operand) == MEM
3047 && ! address_reloaded[i]
3048 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3049 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3050 win = 1;
3051 break;
3053 /* Memory operand whose address is not offsettable. */
3054 case 'V':
3055 if (force_reload)
3056 break;
3057 if (GET_CODE (operand) == MEM
3058 && ! (ind_levels ? offsettable_memref_p (operand)
3059 : offsettable_nonstrict_memref_p (operand))
3060 /* Certain mem addresses will become offsettable
3061 after they themselves are reloaded. This is important;
3062 we don't want our own handling of unoffsettables
3063 to override the handling of reg_equiv_address. */
3064 && !(GET_CODE (XEXP (operand, 0)) == REG
3065 && (ind_levels == 0
3066 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3067 win = 1;
3068 break;
3070 /* Memory operand whose address is offsettable. */
3071 case 'o':
3072 if (force_reload)
3073 break;
3074 if ((GET_CODE (operand) == MEM
3075 /* If IND_LEVELS, find_reloads_address won't reload a
3076 pseudo that didn't get a hard reg, so we have to
3077 reject that case. */
3078 && ((ind_levels ? offsettable_memref_p (operand)
3079 : offsettable_nonstrict_memref_p (operand))
3080 /* A reloaded address is offsettable because it is now
3081 just a simple register indirect. */
3082 || address_reloaded[i]))
3083 || (GET_CODE (operand) == REG
3084 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3085 && reg_renumber[REGNO (operand)] < 0
3086 /* If reg_equiv_address is nonzero, we will be
3087 loading it into a register; hence it will be
3088 offsettable, but we cannot say that reg_equiv_mem
3089 is offsettable without checking. */
3090 && ((reg_equiv_mem[REGNO (operand)] != 0
3091 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3092 || (reg_equiv_address[REGNO (operand)] != 0))))
3093 win = 1;
3094 /* force_const_mem does not accept HIGH. */
3095 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3096 || GET_CODE (operand) == MEM)
3097 badop = 0;
3098 constmemok = 1;
3099 offmemok = 1;
3100 break;
3102 case '&':
3103 /* Output operand that is stored before the need for the
3104 input operands (and their index registers) is over. */
3105 earlyclobber = 1, this_earlyclobber = 1;
3106 break;
3108 case 'E':
3109 #ifndef REAL_ARITHMETIC
3110 /* Match any floating double constant, but only if
3111 we can examine the bits of it reliably. */
3112 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3113 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3114 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3115 break;
3116 #endif
3117 if (GET_CODE (operand) == CONST_DOUBLE)
3118 win = 1;
3119 break;
3121 case 'F':
3122 if (GET_CODE (operand) == CONST_DOUBLE)
3123 win = 1;
3124 break;
3126 case 'G':
3127 case 'H':
3128 if (GET_CODE (operand) == CONST_DOUBLE
3129 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3130 win = 1;
3131 break;
3133 case 's':
3134 if (GET_CODE (operand) == CONST_INT
3135 || (GET_CODE (operand) == CONST_DOUBLE
3136 && GET_MODE (operand) == VOIDmode))
3137 break;
3138 case 'i':
3139 if (CONSTANT_P (operand)
3140 #ifdef LEGITIMATE_PIC_OPERAND_P
3141 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3142 #endif
3144 win = 1;
3145 break;
3147 case 'n':
3148 if (GET_CODE (operand) == CONST_INT
3149 || (GET_CODE (operand) == CONST_DOUBLE
3150 && GET_MODE (operand) == VOIDmode))
3151 win = 1;
3152 break;
3154 case 'I':
3155 case 'J':
3156 case 'K':
3157 case 'L':
3158 case 'M':
3159 case 'N':
3160 case 'O':
3161 case 'P':
3162 if (GET_CODE (operand) == CONST_INT
3163 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3164 win = 1;
3165 break;
3167 case 'X':
3168 win = 1;
3169 break;
3171 case 'g':
3172 if (! force_reload
3173 /* A PLUS is never a valid operand, but reload can make
3174 it from a register when eliminating registers. */
3175 && GET_CODE (operand) != PLUS
3176 /* A SCRATCH is not a valid operand. */
3177 && GET_CODE (operand) != SCRATCH
3178 #ifdef LEGITIMATE_PIC_OPERAND_P
3179 && (! CONSTANT_P (operand)
3180 || ! flag_pic
3181 || LEGITIMATE_PIC_OPERAND_P (operand))
3182 #endif
3183 && (GENERAL_REGS == ALL_REGS
3184 || GET_CODE (operand) != REG
3185 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3186 && reg_renumber[REGNO (operand)] < 0)))
3187 win = 1;
3188 /* Drop through into 'r' case */
3190 case 'r':
3191 this_alternative[i]
3192 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3193 goto reg;
3195 #ifdef EXTRA_CONSTRAINT
3196 case 'Q':
3197 case 'R':
3198 case 'S':
3199 case 'T':
3200 case 'U':
3201 if (EXTRA_CONSTRAINT (operand, c))
3202 win = 1;
3203 break;
3204 #endif
3206 default:
3207 this_alternative[i]
3208 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3210 reg:
3211 if (GET_MODE (operand) == BLKmode)
3212 break;
3213 winreg = 1;
3214 if (GET_CODE (operand) == REG
3215 && reg_fits_class_p (operand, this_alternative[i],
3216 offset, GET_MODE (recog_operand[i])))
3217 win = 1;
3218 break;
3221 constraints[i] = p;
3223 /* If this operand could be handled with a reg,
3224 and some reg is allowed, then this operand can be handled. */
3225 if (winreg && this_alternative[i] != (int) NO_REGS)
3226 badop = 0;
3228 /* Record which operands fit this alternative. */
3229 this_alternative_earlyclobber[i] = earlyclobber;
3230 if (win && ! force_reload)
3231 this_alternative_win[i] = 1;
3232 else
3234 int const_to_mem = 0;
3236 this_alternative_offmemok[i] = offmemok;
3237 losers++;
3238 if (badop)
3239 bad = 1;
3240 /* Alternative loses if it has no regs for a reg operand. */
3241 if (GET_CODE (operand) == REG
3242 && this_alternative[i] == (int) NO_REGS
3243 && this_alternative_matches[i] < 0)
3244 bad = 1;
3246 #if 0
3247 /* If this is a pseudo-register that is set in the previous
3248 insns, there's a good chance that it will already be in a
3249 spill register and we can use that spill register. So
3250 make this case cheaper.
3252 Disabled for egcs. egcs has better inheritance code and
3253 this change causes problems with the improved reload
3254 inheritance code. */
3255 if (GET_CODE (operand) == REG
3256 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3257 && REGNO (operand) == last_output_reload_regno)
3258 reject--;
3259 #endif
3261 /* If this is a constant that is reloaded into the desired
3262 class by copying it to memory first, count that as another
3263 reload. This is consistent with other code and is
3264 required to avoid choosing another alternative when
3265 the constant is moved into memory by this function on
3266 an early reload pass. Note that the test here is
3267 precisely the same as in the code below that calls
3268 force_const_mem. */
3269 if (CONSTANT_P (operand)
3270 /* force_const_mem does not accept HIGH. */
3271 && GET_CODE (operand) != HIGH
3272 && ((PREFERRED_RELOAD_CLASS (operand,
3273 (enum reg_class) this_alternative[i])
3274 == NO_REGS)
3275 || no_input_reloads)
3276 && operand_mode[i] != VOIDmode)
3278 const_to_mem = 1;
3279 if (this_alternative[i] != (int) NO_REGS)
3280 losers++;
3283 /* If we can't reload this value at all, reject this
3284 alternative. Note that we could also lose due to
3285 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3286 here. */
3288 if (! CONSTANT_P (operand)
3289 && (enum reg_class) this_alternative[i] != NO_REGS
3290 && (PREFERRED_RELOAD_CLASS (operand,
3291 (enum reg_class) this_alternative[i])
3292 == NO_REGS))
3293 bad = 1;
3295 /* Alternative loses if it requires a type of reload not
3296 permitted for this insn. We can always reload SCRATCH
3297 and objects with a REG_UNUSED note. */
3298 else if (GET_CODE (operand) != SCRATCH
3299 && modified[i] != RELOAD_READ && no_output_reloads
3300 && ! find_reg_note (insn, REG_UNUSED, operand))
3301 bad = 1;
3302 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3303 && ! const_to_mem)
3304 bad = 1;
3307 /* We prefer to reload pseudos over reloading other things,
3308 since such reloads may be able to be eliminated later.
3309 If we are reloading a SCRATCH, we won't be generating any
3310 insns, just using a register, so it is also preferred.
3311 So bump REJECT in other cases. Don't do this in the
3312 case where we are forcing a constant into memory and
3313 it will then win since we don't want to have a different
3314 alternative match then. */
3315 if (! (GET_CODE (operand) == REG
3316 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3317 && GET_CODE (operand) != SCRATCH
3318 && ! (const_to_mem && constmemok))
3319 reject += 2;
3321 /* Input reloads can be inherited more often than output
3322 reloads can be removed, so penalize output reloads. */
3323 if (operand_type[i] != RELOAD_FOR_INPUT
3324 && GET_CODE (operand) != SCRATCH)
3325 reject++;
3328 /* If this operand is a pseudo register that didn't get a hard
3329 reg and this alternative accepts some register, see if the
3330 class that we want is a subset of the preferred class for this
3331 register. If not, but it intersects that class, use the
3332 preferred class instead. If it does not intersect the preferred
3333 class, show that usage of this alternative should be discouraged;
3334 it will be discouraged more still if the register is `preferred
3335 or nothing'. We do this because it increases the chance of
3336 reusing our spill register in a later insn and avoiding a pair
3337 of memory stores and loads.
3339 Don't bother with this if this alternative will accept this
3340 operand.
3342 Don't do this for a multiword operand, since it is only a
3343 small win and has the risk of requiring more spill registers,
3344 which could cause a large loss.
3346 Don't do this if the preferred class has only one register
3347 because we might otherwise exhaust the class. */
3350 if (! win && this_alternative[i] != (int) NO_REGS
3351 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3352 && reg_class_size[(int) preferred_class[i]] > 1)
3354 if (! reg_class_subset_p (this_alternative[i],
3355 preferred_class[i]))
3357 /* Since we don't have a way of forming the intersection,
3358 we just do something special if the preferred class
3359 is a subset of the class we have; that's the most
3360 common case anyway. */
3361 if (reg_class_subset_p (preferred_class[i],
3362 this_alternative[i]))
3363 this_alternative[i] = (int) preferred_class[i];
3364 else
3365 reject += (2 + 2 * pref_or_nothing[i]);
3370 /* Now see if any output operands that are marked "earlyclobber"
3371 in this alternative conflict with any input operands
3372 or any memory addresses. */
3374 for (i = 0; i < noperands; i++)
3375 if (this_alternative_earlyclobber[i]
3376 && this_alternative_win[i])
3378 struct decomposition early_data;
3380 early_data = decompose (recog_operand[i]);
3382 if (modified[i] == RELOAD_READ)
3383 abort ();
3385 if (this_alternative[i] == NO_REGS)
3387 this_alternative_earlyclobber[i] = 0;
3388 if (this_insn_is_asm)
3389 error_for_asm (this_insn,
3390 "`&' constraint used with no register class");
3391 else
3392 abort ();
3395 for (j = 0; j < noperands; j++)
3396 /* Is this an input operand or a memory ref? */
3397 if ((GET_CODE (recog_operand[j]) == MEM
3398 || modified[j] != RELOAD_WRITE)
3399 && j != i
3400 /* Ignore things like match_operator operands. */
3401 && *recog_constraints[j] != 0
3402 /* Don't count an input operand that is constrained to match
3403 the early clobber operand. */
3404 && ! (this_alternative_matches[j] == i
3405 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3406 /* Is it altered by storing the earlyclobber operand? */
3407 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3409 /* If the output is in a single-reg class,
3410 it's costly to reload it, so reload the input instead. */
3411 if (reg_class_size[this_alternative[i]] == 1
3412 && (GET_CODE (recog_operand[j]) == REG
3413 || GET_CODE (recog_operand[j]) == SUBREG))
3415 losers++;
3416 this_alternative_win[j] = 0;
3418 else
3419 break;
3421 /* If an earlyclobber operand conflicts with something,
3422 it must be reloaded, so request this and count the cost. */
3423 if (j != noperands)
3425 losers++;
3426 this_alternative_win[i] = 0;
3427 for (j = 0; j < noperands; j++)
3428 if (this_alternative_matches[j] == i
3429 && this_alternative_win[j])
3431 this_alternative_win[j] = 0;
3432 losers++;
3437 /* If one alternative accepts all the operands, no reload required,
3438 choose that alternative; don't consider the remaining ones. */
3439 if (losers == 0)
3441 /* Unswap these so that they are never swapped at `finish'. */
3442 if (commutative >= 0)
3444 recog_operand[commutative] = substed_operand[commutative];
3445 recog_operand[commutative + 1]
3446 = substed_operand[commutative + 1];
3448 for (i = 0; i < noperands; i++)
3450 goal_alternative_win[i] = 1;
3451 goal_alternative[i] = this_alternative[i];
3452 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3453 goal_alternative_matches[i] = this_alternative_matches[i];
3454 goal_alternative_earlyclobber[i]
3455 = this_alternative_earlyclobber[i];
3457 goal_alternative_number = this_alternative_number;
3458 goal_alternative_swapped = swapped;
3459 goal_earlyclobber = this_earlyclobber;
3460 goto finish;
3463 /* REJECT, set by the ! and ? constraint characters and when a register
3464 would be reloaded into a non-preferred class, discourages the use of
3465 this alternative for a reload goal. REJECT is incremented by six
3466 for each ? and two for each non-preferred class. */
3467 losers = losers * 6 + reject;
3469 /* If this alternative can be made to work by reloading,
3470 and it needs less reloading than the others checked so far,
3471 record it as the chosen goal for reloading. */
3472 if (! bad && best > losers)
3474 for (i = 0; i < noperands; i++)
3476 goal_alternative[i] = this_alternative[i];
3477 goal_alternative_win[i] = this_alternative_win[i];
3478 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3479 goal_alternative_matches[i] = this_alternative_matches[i];
3480 goal_alternative_earlyclobber[i]
3481 = this_alternative_earlyclobber[i];
3483 goal_alternative_swapped = swapped;
3484 best = losers;
3485 goal_alternative_number = this_alternative_number;
3486 goal_earlyclobber = this_earlyclobber;
3490 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3491 then we need to try each alternative twice,
3492 the second time matching those two operands
3493 as if we had exchanged them.
3494 To do this, really exchange them in operands.
3496 If we have just tried the alternatives the second time,
3497 return operands to normal and drop through. */
3499 if (commutative >= 0)
3501 swapped = !swapped;
3502 if (swapped)
3504 register enum reg_class tclass;
3505 register int t;
3507 recog_operand[commutative] = substed_operand[commutative + 1];
3508 recog_operand[commutative + 1] = substed_operand[commutative];
3510 tclass = preferred_class[commutative];
3511 preferred_class[commutative] = preferred_class[commutative + 1];
3512 preferred_class[commutative + 1] = tclass;
3514 t = pref_or_nothing[commutative];
3515 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3516 pref_or_nothing[commutative + 1] = t;
3518 bcopy ((char *) recog_constraints, (char *) constraints,
3519 noperands * sizeof (char *));
3520 goto try_swapped;
3522 else
3524 recog_operand[commutative] = substed_operand[commutative];
3525 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3529 /* The operands don't meet the constraints.
3530 goal_alternative describes the alternative
3531 that we could reach by reloading the fewest operands.
3532 Reload so as to fit it. */
3534 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3536 /* No alternative works with reloads?? */
3537 if (insn_code_number >= 0)
3538 fatal_insn ("Unable to generate reloads for:", insn);
3539 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3540 /* Avoid further trouble with this insn. */
3541 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3542 n_reloads = 0;
3543 return 0;
3546 /* Jump to `finish' from above if all operands are valid already.
3547 In that case, goal_alternative_win is all 1. */
3548 finish:
3550 /* Right now, for any pair of operands I and J that are required to match,
3551 with I < J,
3552 goal_alternative_matches[J] is I.
3553 Set up goal_alternative_matched as the inverse function:
3554 goal_alternative_matched[I] = J. */
3556 for (i = 0; i < noperands; i++)
3557 goal_alternative_matched[i] = -1;
3559 for (i = 0; i < noperands; i++)
3560 if (! goal_alternative_win[i]
3561 && goal_alternative_matches[i] >= 0)
3562 goal_alternative_matched[goal_alternative_matches[i]] = i;
3564 /* If the best alternative is with operands 1 and 2 swapped,
3565 consider them swapped before reporting the reloads. Update the
3566 operand numbers of any reloads already pushed. */
3568 if (goal_alternative_swapped)
3570 register rtx tem;
3572 tem = substed_operand[commutative];
3573 substed_operand[commutative] = substed_operand[commutative + 1];
3574 substed_operand[commutative + 1] = tem;
3575 tem = recog_operand[commutative];
3576 recog_operand[commutative] = recog_operand[commutative + 1];
3577 recog_operand[commutative + 1] = tem;
3578 tem = *recog_operand_loc[commutative];
3579 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3580 *recog_operand_loc[commutative+1] = tem;
3582 for (i = 0; i < n_reloads; i++)
3584 if (reload_opnum[i] == commutative)
3585 reload_opnum[i] = commutative + 1;
3586 else if (reload_opnum[i] == commutative + 1)
3587 reload_opnum[i] = commutative;
3591 for (i = 0; i < noperands; i++)
3593 operand_reloadnum[i] = -1;
3595 /* If this is an earlyclobber operand, we need to widen the scope.
3596 The reload must remain valid from the start of the insn being
3597 reloaded until after the operand is stored into its destination.
3598 We approximate this with RELOAD_OTHER even though we know that we
3599 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3601 One special case that is worth checking is when we have an
3602 output that is earlyclobber but isn't used past the insn (typically
3603 a SCRATCH). In this case, we only need have the reload live
3604 through the insn itself, but not for any of our input or output
3605 reloads.
3606 But we must not accidentally narrow the scope of an existing
3607 RELOAD_OTHER reload - leave these alone.
3609 In any case, anything needed to address this operand can remain
3610 however they were previously categorized. */
3612 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3613 operand_type[i]
3614 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3615 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3618 /* Any constants that aren't allowed and can't be reloaded
3619 into registers are here changed into memory references. */
3620 for (i = 0; i < noperands; i++)
3621 if (! goal_alternative_win[i]
3622 && CONSTANT_P (recog_operand[i])
3623 /* force_const_mem does not accept HIGH. */
3624 && GET_CODE (recog_operand[i]) != HIGH
3625 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3626 (enum reg_class) goal_alternative[i])
3627 == NO_REGS)
3628 || no_input_reloads)
3629 && operand_mode[i] != VOIDmode)
3631 substed_operand[i] = recog_operand[i]
3632 = find_reloads_toplev (force_const_mem (operand_mode[i],
3633 recog_operand[i]),
3634 i, address_type[i], ind_levels, 0, insn);
3635 if (alternative_allows_memconst (recog_constraints[i],
3636 goal_alternative_number))
3637 goal_alternative_win[i] = 1;
3640 /* Record the values of the earlyclobber operands for the caller. */
3641 if (goal_earlyclobber)
3642 for (i = 0; i < noperands; i++)
3643 if (goal_alternative_earlyclobber[i])
3644 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3646 /* Now record reloads for all the operands that need them. */
3647 last_output_reload_regno = -1;
3648 for (i = 0; i < noperands; i++)
3649 if (! goal_alternative_win[i])
3651 /* Operands that match previous ones have already been handled. */
3652 if (goal_alternative_matches[i] >= 0)
3654 /* Handle an operand with a nonoffsettable address
3655 appearing where an offsettable address will do
3656 by reloading the address into a base register.
3658 ??? We can also do this when the operand is a register and
3659 reg_equiv_mem is not offsettable, but this is a bit tricky,
3660 so we don't bother with it. It may not be worth doing. */
3661 else if (goal_alternative_matched[i] == -1
3662 && goal_alternative_offmemok[i]
3663 && GET_CODE (recog_operand[i]) == MEM)
3665 operand_reloadnum[i]
3666 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3667 &XEXP (recog_operand[i], 0), NULL_PTR,
3668 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3669 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3670 reload_inc[operand_reloadnum[i]]
3671 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3673 /* If this operand is an output, we will have made any
3674 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3675 now we are treating part of the operand as an input, so
3676 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3678 if (modified[i] == RELOAD_WRITE)
3680 for (j = 0; j < n_reloads; j++)
3682 if (reload_opnum[j] == i)
3684 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3685 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3686 else if (reload_when_needed[j]
3687 == RELOAD_FOR_OUTADDR_ADDRESS)
3688 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3693 else if (goal_alternative_matched[i] == -1)
3695 operand_reloadnum[i]
3696 = push_reload ((modified[i] != RELOAD_WRITE
3697 ? recog_operand[i] : 0),
3698 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3699 (modified[i] != RELOAD_WRITE
3700 ? recog_operand_loc[i] : 0),
3701 (modified[i] != RELOAD_READ
3702 ? recog_operand_loc[i] : 0),
3703 (enum reg_class) goal_alternative[i],
3704 (modified[i] == RELOAD_WRITE
3705 ? VOIDmode : operand_mode[i]),
3706 (modified[i] == RELOAD_READ
3707 ? VOIDmode : operand_mode[i]),
3708 (insn_code_number < 0 ? 0
3709 : insn_operand_strict_low[insn_code_number][i]),
3710 0, i, operand_type[i]);
3711 if (modified[i] != RELOAD_READ
3712 && GET_CODE (recog_operand[i]) == REG)
3713 last_output_reload_regno = REGNO (recog_operand[i]);
3715 /* In a matching pair of operands, one must be input only
3716 and the other must be output only.
3717 Pass the input operand as IN and the other as OUT. */
3718 else if (modified[i] == RELOAD_READ
3719 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3721 operand_reloadnum[i]
3722 = push_reload (recog_operand[i],
3723 recog_operand[goal_alternative_matched[i]],
3724 recog_operand_loc[i],
3725 recog_operand_loc[goal_alternative_matched[i]],
3726 (enum reg_class) goal_alternative[i],
3727 operand_mode[i],
3728 operand_mode[goal_alternative_matched[i]],
3729 0, 0, i, RELOAD_OTHER);
3730 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3731 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3732 last_output_reload_regno
3733 = REGNO (recog_operand[goal_alternative_matched[i]]);
3735 else if (modified[i] == RELOAD_WRITE
3736 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3738 operand_reloadnum[goal_alternative_matched[i]]
3739 = push_reload (recog_operand[goal_alternative_matched[i]],
3740 recog_operand[i],
3741 recog_operand_loc[goal_alternative_matched[i]],
3742 recog_operand_loc[i],
3743 (enum reg_class) goal_alternative[i],
3744 operand_mode[goal_alternative_matched[i]],
3745 operand_mode[i],
3746 0, 0, i, RELOAD_OTHER);
3747 operand_reloadnum[i] = output_reloadnum;
3748 if (GET_CODE (recog_operand[i]) == REG)
3749 last_output_reload_regno = REGNO (recog_operand[i]);
3751 else if (insn_code_number >= 0)
3752 abort ();
3753 else
3755 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3756 /* Avoid further trouble with this insn. */
3757 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3758 n_reloads = 0;
3759 return 0;
3762 else if (goal_alternative_matched[i] < 0
3763 && goal_alternative_matches[i] < 0
3764 && optimize)
3766 /* For each non-matching operand that's a MEM or a pseudo-register
3767 that didn't get a hard register, make an optional reload.
3768 This may get done even if the insn needs no reloads otherwise. */
3770 rtx operand = recog_operand[i];
3772 while (GET_CODE (operand) == SUBREG)
3773 operand = XEXP (operand, 0);
3774 if ((GET_CODE (operand) == MEM
3775 || (GET_CODE (operand) == REG
3776 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3777 /* If this is only for an output, the optional reload would not
3778 actually cause us to use a register now, just note that
3779 something is stored here. */
3780 && ((enum reg_class) goal_alternative[i] != NO_REGS
3781 || modified[i] == RELOAD_WRITE)
3782 && ! no_input_reloads
3783 /* An optional output reload might allow to delete INSN later.
3784 We mustn't make in-out reloads on insns that are not permitted
3785 output reloads.
3786 If this is an asm, we can't delete it; we must not even call
3787 push_reload for an optional output reload in this case,
3788 because we can't be sure that the constraint allows a register,
3789 and push_reload verifies the constraints for asms. */
3790 && (modified[i] == RELOAD_READ
3791 || (! no_output_reloads && ! this_insn_is_asm)))
3792 operand_reloadnum[i]
3793 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3794 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3795 (modified[i] != RELOAD_WRITE
3796 ? recog_operand_loc[i] : 0),
3797 (modified[i] != RELOAD_READ
3798 ? recog_operand_loc[i] : 0),
3799 (enum reg_class) goal_alternative[i],
3800 (modified[i] == RELOAD_WRITE
3801 ? VOIDmode : operand_mode[i]),
3802 (modified[i] == RELOAD_READ
3803 ? VOIDmode : operand_mode[i]),
3804 (insn_code_number < 0 ? 0
3805 : insn_operand_strict_low[insn_code_number][i]),
3806 1, i, operand_type[i]);
3807 /* If a memory reference remains (either as a MEM or a pseudo that
3808 did not get a hard register), yet we can't make an optional
3809 reload, check if this is actually a pseudo register reference;
3810 we then need to emit a USE and/or a CLOBBER so that reload
3811 inheritance will do the right thing. */
3812 else if (replace
3813 && (GET_CODE (operand) == MEM
3814 || (GET_CODE (operand) == REG
3815 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3816 && reg_renumber [REGNO (operand)] < 0)))
3818 operand = *recog_operand_loc[i];
3820 while (GET_CODE (operand) == SUBREG)
3821 operand = XEXP (operand, 0);
3822 if (GET_CODE (operand) == REG)
3824 if (modified[i] != RELOAD_WRITE)
3825 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3826 if (modified[i] != RELOAD_READ)
3827 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3831 else if (goal_alternative_matches[i] >= 0
3832 && goal_alternative_win[goal_alternative_matches[i]]
3833 && modified[i] == RELOAD_READ
3834 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3835 && ! no_input_reloads && ! no_output_reloads
3836 && optimize)
3838 /* Similarly, make an optional reload for a pair of matching
3839 objects that are in MEM or a pseudo that didn't get a hard reg. */
3841 rtx operand = recog_operand[i];
3843 while (GET_CODE (operand) == SUBREG)
3844 operand = XEXP (operand, 0);
3845 if ((GET_CODE (operand) == MEM
3846 || (GET_CODE (operand) == REG
3847 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3848 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3849 != NO_REGS))
3850 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3851 = push_reload (recog_operand[goal_alternative_matches[i]],
3852 recog_operand[i],
3853 recog_operand_loc[goal_alternative_matches[i]],
3854 recog_operand_loc[i],
3855 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3856 operand_mode[goal_alternative_matches[i]],
3857 operand_mode[i],
3858 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3861 /* Perform whatever substitutions on the operands we are supposed
3862 to make due to commutativity or replacement of registers
3863 with equivalent constants or memory slots. */
3865 for (i = 0; i < noperands; i++)
3867 /* We only do this on the last pass through reload, because it is
3868 possible for some data (like reg_equiv_address) to be changed during
3869 later passes. Moreover, we loose the opportunity to get a useful
3870 reload_{in,out}_reg when we do these replacements. */
3872 if (replace)
3874 rtx substitution = substed_operand[i];
3876 *recog_operand_loc[i] = substitution;
3878 /* If we're replacing an operand with a LABEL_REF, we need
3879 to make sure that there's a REG_LABEL note attached to
3880 this instruction. */
3881 if (GET_CODE (insn) != JUMP_INSN
3882 && GET_CODE (substitution) == LABEL_REF
3883 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3884 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3885 XEXP (substitution, 0),
3886 REG_NOTES (insn));
3888 else
3889 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3892 /* If this insn pattern contains any MATCH_DUP's, make sure that
3893 they will be substituted if the operands they match are substituted.
3894 Also do now any substitutions we already did on the operands.
3896 Don't do this if we aren't making replacements because we might be
3897 propagating things allocated by frame pointer elimination into places
3898 it doesn't expect. */
3900 if (insn_code_number >= 0 && replace)
3901 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3903 int opno = recog_dup_num[i];
3904 *recog_dup_loc[i] = *recog_operand_loc[opno];
3905 if (operand_reloadnum[opno] >= 0)
3906 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3907 insn_operand_mode[insn_code_number][opno]);
3910 #if 0
3911 /* This loses because reloading of prior insns can invalidate the equivalence
3912 (or at least find_equiv_reg isn't smart enough to find it any more),
3913 causing this insn to need more reload regs than it needed before.
3914 It may be too late to make the reload regs available.
3915 Now this optimization is done safely in choose_reload_regs. */
3917 /* For each reload of a reg into some other class of reg,
3918 search for an existing equivalent reg (same value now) in the right class.
3919 We can use it as long as we don't need to change its contents. */
3920 for (i = 0; i < n_reloads; i++)
3921 if (reload_reg_rtx[i] == 0
3922 && reload_in[i] != 0
3923 && GET_CODE (reload_in[i]) == REG
3924 && reload_out[i] == 0)
3926 reload_reg_rtx[i]
3927 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3928 static_reload_reg_p, 0, reload_inmode[i]);
3929 /* Prevent generation of insn to load the value
3930 because the one we found already has the value. */
3931 if (reload_reg_rtx[i])
3932 reload_in[i] = reload_reg_rtx[i];
3934 #endif
3936 /* Perhaps an output reload can be combined with another
3937 to reduce needs by one. */
3938 if (!goal_earlyclobber)
3939 combine_reloads ();
3941 /* If we have a pair of reloads for parts of an address, they are reloading
3942 the same object, the operands themselves were not reloaded, and they
3943 are for two operands that are supposed to match, merge the reloads and
3944 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3946 for (i = 0; i < n_reloads; i++)
3948 int k;
3950 for (j = i + 1; j < n_reloads; j++)
3951 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3952 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3953 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3954 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3955 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3956 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3957 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3958 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3959 && rtx_equal_p (reload_in[i], reload_in[j])
3960 && (operand_reloadnum[reload_opnum[i]] < 0
3961 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3962 && (operand_reloadnum[reload_opnum[j]] < 0
3963 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3964 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3965 || (goal_alternative_matches[reload_opnum[j]]
3966 == reload_opnum[i])))
3968 for (k = 0; k < n_replacements; k++)
3969 if (replacements[k].what == j)
3970 replacements[k].what = i;
3972 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3973 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3974 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3975 else
3976 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3977 reload_in[j] = 0;
3981 /* Scan all the reloads and update their type.
3982 If a reload is for the address of an operand and we didn't reload
3983 that operand, change the type. Similarly, change the operand number
3984 of a reload when two operands match. If a reload is optional, treat it
3985 as though the operand isn't reloaded.
3987 ??? This latter case is somewhat odd because if we do the optional
3988 reload, it means the object is hanging around. Thus we need only
3989 do the address reload if the optional reload was NOT done.
3991 Change secondary reloads to be the address type of their operand, not
3992 the normal type.
3994 If an operand's reload is now RELOAD_OTHER, change any
3995 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3996 RELOAD_FOR_OTHER_ADDRESS. */
3998 for (i = 0; i < n_reloads; i++)
4000 if (reload_secondary_p[i]
4001 && reload_when_needed[i] == operand_type[reload_opnum[i]])
4002 reload_when_needed[i] = address_type[reload_opnum[i]];
4004 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4005 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4006 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4007 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4008 && (operand_reloadnum[reload_opnum[i]] < 0
4009 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
4011 /* If we have a secondary reload to go along with this reload,
4012 change its type to RELOAD_FOR_OPADDR_ADDR. */
4014 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4015 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4016 && reload_secondary_in_reload[i] != -1)
4018 int secondary_in_reload = reload_secondary_in_reload[i];
4020 reload_when_needed[secondary_in_reload]
4021 = RELOAD_FOR_OPADDR_ADDR;
4023 /* If there's a tertiary reload we have to change it also. */
4024 if (secondary_in_reload > 0
4025 && reload_secondary_in_reload[secondary_in_reload] != -1)
4026 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
4027 = RELOAD_FOR_OPADDR_ADDR;
4030 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4031 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4032 && reload_secondary_out_reload[i] != -1)
4034 int secondary_out_reload = reload_secondary_out_reload[i];
4036 reload_when_needed[secondary_out_reload]
4037 = RELOAD_FOR_OPADDR_ADDR;
4039 /* If there's a tertiary reload we have to change it also. */
4040 if (secondary_out_reload
4041 && reload_secondary_out_reload[secondary_out_reload] != -1)
4042 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4043 = RELOAD_FOR_OPADDR_ADDR;
4046 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4047 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4048 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4049 else
4050 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4053 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4054 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4055 && operand_reloadnum[reload_opnum[i]] >= 0
4056 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4057 == RELOAD_OTHER))
4058 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4060 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4061 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4064 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4065 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4066 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4068 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4069 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4070 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4071 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4072 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4073 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4074 This is complicated by the fact that a single operand can have more
4075 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4076 choose_reload_regs without affecting code quality, and cases that
4077 actually fail are extremely rare, so it turns out to be better to fix
4078 the problem here by not generating cases that choose_reload_regs will
4079 fail for. */
4080 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4081 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4082 a single operand.
4083 We can reduce the register pressure by exploiting that a
4084 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4085 does not conflict with any of them, if it is only used for the first of
4086 the RELOAD_FOR_X_ADDRESS reloads. */
4088 int first_op_addr_num = -2;
4089 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4090 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4091 int need_change= 0;
4092 /* We use last_op_addr_reload and the contents of the above arrays
4093 first as flags - -2 means no instance encountered, -1 means exactly
4094 one instance encountered.
4095 If more than one instance has been encountered, we store the reload
4096 number of the first reload of the kind in question; reload numbers
4097 are known to be non-negative. */
4098 for (i = 0; i < noperands; i++)
4099 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4100 for (i = n_reloads - 1; i >= 0; i--)
4102 switch (reload_when_needed[i])
4104 case RELOAD_FOR_OPERAND_ADDRESS:
4105 if (++first_op_addr_num >= 0)
4107 first_op_addr_num = i;
4108 need_change = 1;
4110 break;
4111 case RELOAD_FOR_INPUT_ADDRESS:
4112 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4114 first_inpaddr_num[reload_opnum[i]] = i;
4115 need_change = 1;
4117 break;
4118 case RELOAD_FOR_OUTPUT_ADDRESS:
4119 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4121 first_outpaddr_num[reload_opnum[i]] = i;
4122 need_change = 1;
4124 break;
4125 default:
4126 break;
4130 if (need_change)
4132 for (i = 0; i < n_reloads; i++)
4134 int first_num, type;
4136 switch (reload_when_needed[i])
4138 case RELOAD_FOR_OPADDR_ADDR:
4139 first_num = first_op_addr_num;
4140 type = RELOAD_FOR_OPERAND_ADDRESS;
4141 break;
4142 case RELOAD_FOR_INPADDR_ADDRESS:
4143 first_num = first_inpaddr_num[reload_opnum[i]];
4144 type = RELOAD_FOR_INPUT_ADDRESS;
4145 break;
4146 case RELOAD_FOR_OUTADDR_ADDRESS:
4147 first_num = first_outpaddr_num[reload_opnum[i]];
4148 type = RELOAD_FOR_OUTPUT_ADDRESS;
4149 break;
4150 default:
4151 continue;
4153 if (first_num < 0)
4154 continue;
4155 else if (i > first_num)
4156 reload_when_needed[i] = type;
4157 else
4159 /* Check if the only TYPE reload that uses reload I is
4160 reload FIRST_NUM. */
4161 for (j = n_reloads - 1; j > first_num; j--)
4163 if (reload_when_needed[j] == type
4164 && (reload_secondary_p[i]
4165 ? reload_secondary_in_reload[j] == i
4166 : reg_mentioned_p (reload_in[i], reload_in[j])))
4168 reload_when_needed[i] = type;
4169 break;
4177 /* See if we have any reloads that are now allowed to be merged
4178 because we've changed when the reload is needed to
4179 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4180 check for the most common cases. */
4182 for (i = 0; i < n_reloads; i++)
4183 if (reload_in[i] != 0 && reload_out[i] == 0
4184 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4185 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4186 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4187 for (j = 0; j < n_reloads; j++)
4188 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4189 && reload_when_needed[j] == reload_when_needed[i]
4190 && MATCHES (reload_in[i], reload_in[j])
4191 && reload_reg_class[i] == reload_reg_class[j]
4192 && !reload_nocombine[i] && !reload_nocombine[j]
4193 && reload_reg_rtx[i] == reload_reg_rtx[j])
4195 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4196 transfer_replacements (i, j);
4197 reload_in[j] = 0;
4200 /* Set which reloads must use registers not used in any group. Start
4201 with those that conflict with a group and then include ones that
4202 conflict with ones that are already known to conflict with a group. */
4204 changed = 0;
4205 for (i = 0; i < n_reloads; i++)
4207 enum machine_mode mode = reload_inmode[i];
4208 enum reg_class class = reload_reg_class[i];
4209 int size;
4211 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4212 mode = reload_outmode[i];
4213 size = CLASS_MAX_NREGS (class, mode);
4215 if (size == 1)
4216 for (j = 0; j < n_reloads; j++)
4217 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4218 (GET_MODE_SIZE (reload_outmode[j])
4219 > GET_MODE_SIZE (reload_inmode[j]))
4220 ? reload_outmode[j] : reload_inmode[j])
4221 > 1)
4222 && !reload_optional[j]
4223 && (reload_in[j] != 0 || reload_out[j] != 0
4224 || reload_secondary_p[j])
4225 && reloads_conflict (i, j)
4226 && reg_classes_intersect_p (class, reload_reg_class[j]))
4228 reload_nongroup[i] = 1;
4229 changed = 1;
4230 break;
4234 while (changed)
4236 changed = 0;
4238 for (i = 0; i < n_reloads; i++)
4240 enum machine_mode mode = reload_inmode[i];
4241 enum reg_class class = reload_reg_class[i];
4242 int size;
4244 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4245 mode = reload_outmode[i];
4246 size = CLASS_MAX_NREGS (class, mode);
4248 if (! reload_nongroup[i] && size == 1)
4249 for (j = 0; j < n_reloads; j++)
4250 if (reload_nongroup[j]
4251 && reloads_conflict (i, j)
4252 && reg_classes_intersect_p (class, reload_reg_class[j]))
4254 reload_nongroup[i] = 1;
4255 changed = 1;
4256 break;
4261 #else /* no REGISTER_CONSTRAINTS */
4262 int noperands;
4263 int insn_code_number;
4264 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4265 register int i;
4266 rtx body = PATTERN (insn);
4267 int retval = 0;
4269 n_reloads = 0;
4270 n_replacements = 0;
4271 n_earlyclobbers = 0;
4272 replace_reloads = replace;
4273 this_insn = insn;
4275 extract_insn (insn);
4277 noperands = reload_n_operands = recog_n_operands;
4279 /* Return if the insn needs no reload processing. */
4280 if (noperands == 0)
4281 return;
4283 for (i = 0; i < noperands; i++)
4285 register RTX_CODE code = GET_CODE (recog_operand[i]);
4286 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4288 if (insn_code_number >= 0)
4289 if (insn_operand_address_p[insn_code_number][i])
4290 find_reloads_address (VOIDmode, NULL_PTR,
4291 recog_operand[i], recog_operand_loc[i],
4292 i, RELOAD_FOR_INPUT, ind_levels, insn);
4294 /* In these cases, we can't tell if the operand is an input
4295 or an output, so be conservative. In practice it won't be
4296 problem. */
4298 if (code == MEM)
4299 find_reloads_address (GET_MODE (recog_operand[i]),
4300 recog_operand_loc[i],
4301 XEXP (recog_operand[i], 0),
4302 &XEXP (recog_operand[i], 0),
4303 i, RELOAD_OTHER, ind_levels, insn);
4304 if (code == SUBREG)
4305 recog_operand[i] = *recog_operand_loc[i]
4306 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4307 ind_levels, is_set_dest);
4308 if (code == REG)
4310 register int regno = REGNO (recog_operand[i]);
4311 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4312 recog_operand[i] = *recog_operand_loc[i]
4313 = reg_equiv_constant[regno];
4314 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4315 that feeds this insn. */
4316 if (reg_equiv_mem[regno] != 0)
4317 recog_operand[i] = *recog_operand_loc[i]
4318 = reg_equiv_mem[regno];
4319 #endif
4323 /* Perhaps an output reload can be combined with another
4324 to reduce needs by one. */
4325 if (!goal_earlyclobber)
4326 combine_reloads ();
4327 #endif /* no REGISTER_CONSTRAINTS */
4328 return retval;
4331 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4332 accepts a memory operand with constant address. */
4334 static int
4335 alternative_allows_memconst (constraint, altnum)
4336 const char *constraint;
4337 int altnum;
4339 register int c;
4340 /* Skip alternatives before the one requested. */
4341 while (altnum > 0)
4343 while (*constraint++ != ',');
4344 altnum--;
4346 /* Scan the requested alternative for 'm' or 'o'.
4347 If one of them is present, this alternative accepts memory constants. */
4348 while ((c = *constraint++) && c != ',' && c != '#')
4349 if (c == 'm' || c == 'o')
4350 return 1;
4351 return 0;
4354 /* Scan X for memory references and scan the addresses for reloading.
4355 Also checks for references to "constant" regs that we want to eliminate
4356 and replaces them with the values they stand for.
4357 We may alter X destructively if it contains a reference to such.
4358 If X is just a constant reg, we return the equivalent value
4359 instead of X.
4361 IND_LEVELS says how many levels of indirect addressing this machine
4362 supports.
4364 OPNUM and TYPE identify the purpose of the reload.
4366 IS_SET_DEST is true if X is the destination of a SET, which is not
4367 appropriate to be replaced by a constant.
4369 INSN, if nonzero, is the insn in which we do the reload. It is used
4370 to determine if we may generate output reloads, and where to put USEs
4371 for pseudos that we have to replace with stack slots. */
4373 static rtx
4374 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4375 rtx x;
4376 int opnum;
4377 enum reload_type type;
4378 int ind_levels;
4379 int is_set_dest;
4380 rtx insn;
4382 register RTX_CODE code = GET_CODE (x);
4384 register const char *fmt = GET_RTX_FORMAT (code);
4385 register int i;
4386 int copied;
4388 if (code == REG)
4390 /* This code is duplicated for speed in find_reloads. */
4391 register int regno = REGNO (x);
4392 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4393 x = reg_equiv_constant[regno];
4394 #if 0
4395 /* This creates (subreg (mem...)) which would cause an unnecessary
4396 reload of the mem. */
4397 else if (reg_equiv_mem[regno] != 0)
4398 x = reg_equiv_mem[regno];
4399 #endif
4400 else if (reg_equiv_memory_loc[regno]
4401 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4403 rtx mem = make_memloc (x, regno);
4404 if (reg_equiv_address[regno]
4405 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4407 /* If this is not a toplevel operand, find_reloads doesn't see
4408 this substitution. We have to emit a USE of the pseudo so
4409 that delete_output_reload can see it. */
4410 if (replace_reloads && recog_operand[opnum] != x)
4411 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4412 x = mem;
4413 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4414 opnum, type, ind_levels, insn);
4417 return x;
4419 if (code == MEM)
4421 rtx tem = x;
4422 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4423 opnum, type, ind_levels, insn);
4424 return tem;
4427 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4429 /* Check for SUBREG containing a REG that's equivalent to a constant.
4430 If the constant has a known value, truncate it right now.
4431 Similarly if we are extracting a single-word of a multi-word
4432 constant. If the constant is symbolic, allow it to be substituted
4433 normally. push_reload will strip the subreg later. If the
4434 constant is VOIDmode, abort because we will lose the mode of
4435 the register (this should never happen because one of the cases
4436 above should handle it). */
4438 register int regno = REGNO (SUBREG_REG (x));
4439 rtx tem;
4441 if (subreg_lowpart_p (x)
4442 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4443 && reg_equiv_constant[regno] != 0
4444 && (tem = gen_lowpart_common (GET_MODE (x),
4445 reg_equiv_constant[regno])) != 0)
4446 return tem;
4448 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4449 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4450 && reg_equiv_constant[regno] != 0
4451 && (tem = operand_subword (reg_equiv_constant[regno],
4452 SUBREG_WORD (x), 0,
4453 GET_MODE (SUBREG_REG (x)))) != 0)
4455 /* TEM is now a word sized constant for the bits from X that
4456 we wanted. However, TEM may be the wrong representation.
4458 Use gen_lowpart_common to convert a CONST_INT into a
4459 CONST_DOUBLE and vice versa as needed according to by the mode
4460 of the SUBREG. */
4461 tem = gen_lowpart_common (GET_MODE (x), tem);
4462 if (!tem)
4463 abort ();
4464 return tem;
4467 /* If the SUBREG is wider than a word, the above test will fail.
4468 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4469 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4470 a 32 bit target. We still can - and have to - handle this
4471 for non-paradoxical subregs of CONST_INTs. */
4472 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4473 && reg_equiv_constant[regno] != 0
4474 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4475 && (GET_MODE_SIZE (GET_MODE (x))
4476 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4478 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4479 if (WORDS_BIG_ENDIAN)
4480 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4481 - GET_MODE_BITSIZE (GET_MODE (x))
4482 - shift);
4483 /* Here we use the knowledge that CONST_INTs have a
4484 HOST_WIDE_INT field. */
4485 if (shift >= HOST_BITS_PER_WIDE_INT)
4486 shift = HOST_BITS_PER_WIDE_INT - 1;
4487 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4490 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4491 && reg_equiv_constant[regno] != 0
4492 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4493 abort ();
4495 /* If the subreg contains a reg that will be converted to a mem,
4496 convert the subreg to a narrower memref now.
4497 Otherwise, we would get (subreg (mem ...) ...),
4498 which would force reload of the mem.
4500 We also need to do this if there is an equivalent MEM that is
4501 not offsettable. In that case, alter_subreg would produce an
4502 invalid address on big-endian machines.
4504 For machines that extend byte loads, we must not reload using
4505 a wider mode if we have a paradoxical SUBREG. find_reloads will
4506 force a reload in that case. So we should not do anything here. */
4508 else if (regno >= FIRST_PSEUDO_REGISTER
4509 #ifdef LOAD_EXTEND_OP
4510 && (GET_MODE_SIZE (GET_MODE (x))
4511 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4512 #endif
4513 && (reg_equiv_address[regno] != 0
4514 || (reg_equiv_mem[regno] != 0
4515 && (! strict_memory_address_p (GET_MODE (x),
4516 XEXP (reg_equiv_mem[regno], 0))
4517 || ! offsettable_memref_p (reg_equiv_mem[regno])
4518 || num_not_at_initial_offset))))
4519 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4520 insn);
4523 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4525 if (fmt[i] == 'e')
4527 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4528 ind_levels, is_set_dest, insn);
4529 /* If we have replaced a reg with it's equivalent memory loc -
4530 that can still be handled here e.g. if it's in a paradoxical
4531 subreg - we must make the change in a copy, rather than using
4532 a destructive change. This way, find_reloads can still elect
4533 not to do the change. */
4534 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4536 x = shallow_copy_rtx (x);
4537 copied = 1;
4539 XEXP (x, i) = new_part;
4542 return x;
4545 /* Return a mem ref for the memory equivalent of reg REGNO.
4546 This mem ref is not shared with anything. */
4548 static rtx
4549 make_memloc (ad, regno)
4550 rtx ad;
4551 int regno;
4553 /* We must rerun eliminate_regs, in case the elimination
4554 offsets have changed. */
4555 rtx tem
4556 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4558 /* If TEM might contain a pseudo, we must copy it to avoid
4559 modifying it when we do the substitution for the reload. */
4560 if (rtx_varies_p (tem))
4561 tem = copy_rtx (tem);
4563 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4564 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4565 return tem;
4568 /* Record all reloads needed for handling memory address AD
4569 which appears in *LOC in a memory reference to mode MODE
4570 which itself is found in location *MEMREFLOC.
4571 Note that we take shortcuts assuming that no multi-reg machine mode
4572 occurs as part of an address.
4574 OPNUM and TYPE specify the purpose of this reload.
4576 IND_LEVELS says how many levels of indirect addressing this machine
4577 supports.
4579 INSN, if nonzero, is the insn in which we do the reload. It is used
4580 to determine if we may generate output reloads, and where to put USEs
4581 for pseudos that we have to replace with stack slots.
4583 Value is nonzero if this address is reloaded or replaced as a whole.
4584 This is interesting to the caller if the address is an autoincrement.
4586 Note that there is no verification that the address will be valid after
4587 this routine does its work. Instead, we rely on the fact that the address
4588 was valid when reload started. So we need only undo things that reload
4589 could have broken. These are wrong register types, pseudos not allocated
4590 to a hard register, and frame pointer elimination. */
4592 static int
4593 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4594 enum machine_mode mode;
4595 rtx *memrefloc;
4596 rtx ad;
4597 rtx *loc;
4598 int opnum;
4599 enum reload_type type;
4600 int ind_levels;
4601 rtx insn;
4603 register int regno;
4604 int removed_and = 0;
4605 rtx tem;
4607 /* If the address is a register, see if it is a legitimate address and
4608 reload if not. We first handle the cases where we need not reload
4609 or where we must reload in a non-standard way. */
4611 if (GET_CODE (ad) == REG)
4613 regno = REGNO (ad);
4615 if (reg_equiv_constant[regno] != 0
4616 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4618 *loc = ad = reg_equiv_constant[regno];
4619 return 0;
4622 tem = reg_equiv_memory_loc[regno];
4623 if (tem != 0)
4625 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4627 tem = make_memloc (ad, regno);
4628 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4630 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4631 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4632 ind_levels, insn);
4634 /* We can avoid a reload if the register's equivalent memory
4635 expression is valid as an indirect memory address.
4636 But not all addresses are valid in a mem used as an indirect
4637 address: only reg or reg+constant. */
4639 if (ind_levels > 0
4640 && strict_memory_address_p (mode, tem)
4641 && (GET_CODE (XEXP (tem, 0)) == REG
4642 || (GET_CODE (XEXP (tem, 0)) == PLUS
4643 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4644 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4646 /* TEM is not the same as what we'll be replacing the
4647 pseudo with after reload, put a USE in front of INSN
4648 in the final reload pass. */
4649 if (replace_reloads
4650 && num_not_at_initial_offset
4651 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4653 *loc = tem;
4654 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4655 /* This doesn't really count as replacing the address
4656 as a whole, since it is still a memory access. */
4658 return 0;
4660 ad = tem;
4664 /* The only remaining case where we can avoid a reload is if this is a
4665 hard register that is valid as a base register and which is not the
4666 subject of a CLOBBER in this insn. */
4668 else if (regno < FIRST_PSEUDO_REGISTER
4669 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4670 && ! regno_clobbered_p (regno, this_insn))
4671 return 0;
4673 /* If we do not have one of the cases above, we must do the reload. */
4674 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4675 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4676 return 1;
4679 if (strict_memory_address_p (mode, ad))
4681 /* The address appears valid, so reloads are not needed.
4682 But the address may contain an eliminable register.
4683 This can happen because a machine with indirect addressing
4684 may consider a pseudo register by itself a valid address even when
4685 it has failed to get a hard reg.
4686 So do a tree-walk to find and eliminate all such regs. */
4688 /* But first quickly dispose of a common case. */
4689 if (GET_CODE (ad) == PLUS
4690 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4691 && GET_CODE (XEXP (ad, 0)) == REG
4692 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4693 return 0;
4695 subst_reg_equivs_changed = 0;
4696 *loc = subst_reg_equivs (ad, insn);
4698 if (! subst_reg_equivs_changed)
4699 return 0;
4701 /* Check result for validity after substitution. */
4702 if (strict_memory_address_p (mode, ad))
4703 return 0;
4706 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4709 if (memrefloc)
4711 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4712 ind_levels, win);
4714 break;
4715 win:
4716 *memrefloc = copy_rtx (*memrefloc);
4717 XEXP (*memrefloc, 0) = ad;
4718 move_replacements (&ad, &XEXP (*memrefloc, 0));
4719 return 1;
4721 while (0);
4722 #endif
4724 /* The address is not valid. We have to figure out why. First see if
4725 we have an outer AND and remove it if so. Then analyze what's inside. */
4727 if (GET_CODE (ad) == AND)
4729 removed_and = 1;
4730 loc = &XEXP (ad, 0);
4731 ad = *loc;
4734 /* One possibility for why the address is invalid is that it is itself
4735 a MEM. This can happen when the frame pointer is being eliminated, a
4736 pseudo is not allocated to a hard register, and the offset between the
4737 frame and stack pointers is not its initial value. In that case the
4738 pseudo will have been replaced by a MEM referring to the
4739 stack pointer. */
4740 if (GET_CODE (ad) == MEM)
4742 /* First ensure that the address in this MEM is valid. Then, unless
4743 indirect addresses are valid, reload the MEM into a register. */
4744 tem = ad;
4745 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4746 opnum, ADDR_TYPE (type),
4747 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4749 /* If tem was changed, then we must create a new memory reference to
4750 hold it and store it back into memrefloc. */
4751 if (tem != ad && memrefloc)
4753 *memrefloc = copy_rtx (*memrefloc);
4754 copy_replacements (tem, XEXP (*memrefloc, 0));
4755 loc = &XEXP (*memrefloc, 0);
4756 if (removed_and)
4757 loc = &XEXP (*loc, 0);
4760 /* Check similar cases as for indirect addresses as above except
4761 that we can allow pseudos and a MEM since they should have been
4762 taken care of above. */
4764 if (ind_levels == 0
4765 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4766 || GET_CODE (XEXP (tem, 0)) == MEM
4767 || ! (GET_CODE (XEXP (tem, 0)) == REG
4768 || (GET_CODE (XEXP (tem, 0)) == PLUS
4769 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4770 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4772 /* Must use TEM here, not AD, since it is the one that will
4773 have any subexpressions reloaded, if needed. */
4774 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4775 BASE_REG_CLASS, GET_MODE (tem),
4776 VOIDmode, 0,
4777 0, opnum, type);
4778 return ! removed_and;
4780 else
4781 return 0;
4784 /* If we have address of a stack slot but it's not valid because the
4785 displacement is too large, compute the sum in a register.
4786 Handle all base registers here, not just fp/ap/sp, because on some
4787 targets (namely SH) we can also get too large displacements from
4788 big-endian corrections. */
4789 else if (GET_CODE (ad) == PLUS
4790 && GET_CODE (XEXP (ad, 0)) == REG
4791 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4792 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4793 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4795 /* Unshare the MEM rtx so we can safely alter it. */
4796 if (memrefloc)
4798 *memrefloc = copy_rtx (*memrefloc);
4799 loc = &XEXP (*memrefloc, 0);
4800 if (removed_and)
4801 loc = &XEXP (*loc, 0);
4804 if (double_reg_address_ok)
4806 /* Unshare the sum as well. */
4807 *loc = ad = copy_rtx (ad);
4809 /* Reload the displacement into an index reg.
4810 We assume the frame pointer or arg pointer is a base reg. */
4811 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4812 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4813 type, ind_levels);
4814 return 0;
4816 else
4818 /* If the sum of two regs is not necessarily valid,
4819 reload the sum into a base reg.
4820 That will at least work. */
4821 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4822 Pmode, opnum, type, ind_levels);
4824 return ! removed_and;
4827 /* If we have an indexed stack slot, there are three possible reasons why
4828 it might be invalid: The index might need to be reloaded, the address
4829 might have been made by frame pointer elimination and hence have a
4830 constant out of range, or both reasons might apply.
4832 We can easily check for an index needing reload, but even if that is the
4833 case, we might also have an invalid constant. To avoid making the
4834 conservative assumption and requiring two reloads, we see if this address
4835 is valid when not interpreted strictly. If it is, the only problem is
4836 that the index needs a reload and find_reloads_address_1 will take care
4837 of it.
4839 There is still a case when we might generate an extra reload,
4840 however. In certain cases eliminate_regs will return a MEM for a REG
4841 (see the code there for details). In those cases, memory_address_p
4842 applied to our address will return 0 so we will think that our offset
4843 must be too large. But it might indeed be valid and the only problem
4844 is that a MEM is present where a REG should be. This case should be
4845 very rare and there doesn't seem to be any way to avoid it.
4847 If we decide to do something here, it must be that
4848 `double_reg_address_ok' is true and that this address rtl was made by
4849 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4850 rework the sum so that the reload register will be added to the index.
4851 This is safe because we know the address isn't shared.
4853 We check for fp/ap/sp as both the first and second operand of the
4854 innermost PLUS. */
4856 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4857 && GET_CODE (XEXP (ad, 0)) == PLUS
4858 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4859 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4860 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4861 #endif
4862 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4863 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4864 #endif
4865 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4866 && ! memory_address_p (mode, ad))
4868 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4869 plus_constant (XEXP (XEXP (ad, 0), 0),
4870 INTVAL (XEXP (ad, 1))),
4871 XEXP (XEXP (ad, 0), 1));
4872 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4873 GET_MODE (ad), opnum, type, ind_levels);
4874 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4875 type, 0, insn);
4877 return 0;
4880 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4881 && GET_CODE (XEXP (ad, 0)) == PLUS
4882 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4883 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4884 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4885 #endif
4886 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4887 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4888 #endif
4889 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4890 && ! memory_address_p (mode, ad))
4892 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4893 XEXP (XEXP (ad, 0), 0),
4894 plus_constant (XEXP (XEXP (ad, 0), 1),
4895 INTVAL (XEXP (ad, 1))));
4896 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4897 GET_MODE (ad), opnum, type, ind_levels);
4898 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4899 type, 0, insn);
4901 return 0;
4904 /* See if address becomes valid when an eliminable register
4905 in a sum is replaced. */
4907 tem = ad;
4908 if (GET_CODE (ad) == PLUS)
4909 tem = subst_indexed_address (ad);
4910 if (tem != ad && strict_memory_address_p (mode, tem))
4912 /* Ok, we win that way. Replace any additional eliminable
4913 registers. */
4915 subst_reg_equivs_changed = 0;
4916 tem = subst_reg_equivs (tem, insn);
4918 /* Make sure that didn't make the address invalid again. */
4920 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4922 *loc = tem;
4923 return 0;
4927 /* If constants aren't valid addresses, reload the constant address
4928 into a register. */
4929 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4931 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4932 Unshare it so we can safely alter it. */
4933 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4934 && CONSTANT_POOL_ADDRESS_P (ad))
4936 *memrefloc = copy_rtx (*memrefloc);
4937 loc = &XEXP (*memrefloc, 0);
4938 if (removed_and)
4939 loc = &XEXP (*loc, 0);
4942 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4943 ind_levels);
4944 return ! removed_and;
4947 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4948 insn);
4951 /* Find all pseudo regs appearing in AD
4952 that are eliminable in favor of equivalent values
4953 and do not have hard regs; replace them by their equivalents.
4954 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4955 front of it for pseudos that we have to replace with stack slots. */
4957 static rtx
4958 subst_reg_equivs (ad, insn)
4959 rtx ad;
4960 rtx insn;
4962 register RTX_CODE code = GET_CODE (ad);
4963 register int i;
4964 register const char *fmt;
4966 switch (code)
4968 case HIGH:
4969 case CONST_INT:
4970 case CONST:
4971 case CONST_DOUBLE:
4972 case SYMBOL_REF:
4973 case LABEL_REF:
4974 case PC:
4975 case CC0:
4976 return ad;
4978 case REG:
4980 register int regno = REGNO (ad);
4982 if (reg_equiv_constant[regno] != 0)
4984 subst_reg_equivs_changed = 1;
4985 return reg_equiv_constant[regno];
4987 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4989 rtx mem = make_memloc (ad, regno);
4990 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4992 subst_reg_equivs_changed = 1;
4993 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4994 return mem;
4998 return ad;
5000 case PLUS:
5001 /* Quickly dispose of a common case. */
5002 if (XEXP (ad, 0) == frame_pointer_rtx
5003 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5004 return ad;
5005 break;
5007 default:
5008 break;
5011 fmt = GET_RTX_FORMAT (code);
5012 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5013 if (fmt[i] == 'e')
5014 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5015 return ad;
5018 /* Compute the sum of X and Y, making canonicalizations assumed in an
5019 address, namely: sum constant integers, surround the sum of two
5020 constants with a CONST, put the constant as the second operand, and
5021 group the constant on the outermost sum.
5023 This routine assumes both inputs are already in canonical form. */
5026 form_sum (x, y)
5027 rtx x, y;
5029 rtx tem;
5030 enum machine_mode mode = GET_MODE (x);
5032 if (mode == VOIDmode)
5033 mode = GET_MODE (y);
5035 if (mode == VOIDmode)
5036 mode = Pmode;
5038 if (GET_CODE (x) == CONST_INT)
5039 return plus_constant (y, INTVAL (x));
5040 else if (GET_CODE (y) == CONST_INT)
5041 return plus_constant (x, INTVAL (y));
5042 else if (CONSTANT_P (x))
5043 tem = x, x = y, y = tem;
5045 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5046 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5048 /* Note that if the operands of Y are specified in the opposite
5049 order in the recursive calls below, infinite recursion will occur. */
5050 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5051 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5053 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5054 constant will have been placed second. */
5055 if (CONSTANT_P (x) && CONSTANT_P (y))
5057 if (GET_CODE (x) == CONST)
5058 x = XEXP (x, 0);
5059 if (GET_CODE (y) == CONST)
5060 y = XEXP (y, 0);
5062 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5065 return gen_rtx_PLUS (mode, x, y);
5068 /* If ADDR is a sum containing a pseudo register that should be
5069 replaced with a constant (from reg_equiv_constant),
5070 return the result of doing so, and also apply the associative
5071 law so that the result is more likely to be a valid address.
5072 (But it is not guaranteed to be one.)
5074 Note that at most one register is replaced, even if more are
5075 replaceable. Also, we try to put the result into a canonical form
5076 so it is more likely to be a valid address.
5078 In all other cases, return ADDR. */
5080 static rtx
5081 subst_indexed_address (addr)
5082 rtx addr;
5084 rtx op0 = 0, op1 = 0, op2 = 0;
5085 rtx tem;
5086 int regno;
5088 if (GET_CODE (addr) == PLUS)
5090 /* Try to find a register to replace. */
5091 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5092 if (GET_CODE (op0) == REG
5093 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5094 && reg_renumber[regno] < 0
5095 && reg_equiv_constant[regno] != 0)
5096 op0 = reg_equiv_constant[regno];
5097 else if (GET_CODE (op1) == REG
5098 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5099 && reg_renumber[regno] < 0
5100 && reg_equiv_constant[regno] != 0)
5101 op1 = reg_equiv_constant[regno];
5102 else if (GET_CODE (op0) == PLUS
5103 && (tem = subst_indexed_address (op0)) != op0)
5104 op0 = tem;
5105 else if (GET_CODE (op1) == PLUS
5106 && (tem = subst_indexed_address (op1)) != op1)
5107 op1 = tem;
5108 else
5109 return addr;
5111 /* Pick out up to three things to add. */
5112 if (GET_CODE (op1) == PLUS)
5113 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5114 else if (GET_CODE (op0) == PLUS)
5115 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5117 /* Compute the sum. */
5118 if (op2 != 0)
5119 op1 = form_sum (op1, op2);
5120 if (op1 != 0)
5121 op0 = form_sum (op0, op1);
5123 return op0;
5125 return addr;
5128 /* Record the pseudo registers we must reload into hard registers in a
5129 subexpression of a would-be memory address, X referring to a value
5130 in mode MODE. (This function is not called if the address we find
5131 is strictly valid.)
5133 CONTEXT = 1 means we are considering regs as index regs,
5134 = 0 means we are considering them as base regs.
5136 OPNUM and TYPE specify the purpose of any reloads made.
5138 IND_LEVELS says how many levels of indirect addressing are
5139 supported at this point in the address.
5141 INSN, if nonzero, is the insn in which we do the reload. It is used
5142 to determine if we may generate output reloads.
5144 We return nonzero if X, as a whole, is reloaded or replaced. */
5146 /* Note that we take shortcuts assuming that no multi-reg machine mode
5147 occurs as part of an address.
5148 Also, this is not fully machine-customizable; it works for machines
5149 such as vaxes and 68000's and 32000's, but other possible machines
5150 could have addressing modes that this does not handle right. */
5152 static int
5153 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5154 enum machine_mode mode;
5155 rtx x;
5156 int context;
5157 rtx *loc;
5158 int opnum;
5159 enum reload_type type;
5160 int ind_levels;
5161 rtx insn;
5163 register RTX_CODE code = GET_CODE (x);
5165 switch (code)
5167 case PLUS:
5169 register rtx orig_op0 = XEXP (x, 0);
5170 register rtx orig_op1 = XEXP (x, 1);
5171 register RTX_CODE code0 = GET_CODE (orig_op0);
5172 register RTX_CODE code1 = GET_CODE (orig_op1);
5173 register rtx op0 = orig_op0;
5174 register rtx op1 = orig_op1;
5176 if (GET_CODE (op0) == SUBREG)
5178 op0 = SUBREG_REG (op0);
5179 code0 = GET_CODE (op0);
5180 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5181 op0 = gen_rtx_REG (word_mode,
5182 REGNO (op0) + SUBREG_WORD (orig_op0));
5185 if (GET_CODE (op1) == SUBREG)
5187 op1 = SUBREG_REG (op1);
5188 code1 = GET_CODE (op1);
5189 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5190 op1 = gen_rtx_REG (GET_MODE (op1),
5191 REGNO (op1) + SUBREG_WORD (orig_op1));
5194 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5195 || code0 == ZERO_EXTEND || code1 == MEM)
5197 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5198 type, ind_levels, insn);
5199 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5200 type, ind_levels, insn);
5203 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5204 || code1 == ZERO_EXTEND || code0 == MEM)
5206 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5207 type, ind_levels, insn);
5208 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5209 type, ind_levels, insn);
5212 else if (code0 == CONST_INT || code0 == CONST
5213 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5214 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5215 type, ind_levels, insn);
5217 else if (code1 == CONST_INT || code1 == CONST
5218 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5219 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5220 type, ind_levels, insn);
5222 else if (code0 == REG && code1 == REG)
5224 if (REG_OK_FOR_INDEX_P (op0)
5225 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5226 return 0;
5227 else if (REG_OK_FOR_INDEX_P (op1)
5228 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5229 return 0;
5230 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5231 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5232 type, ind_levels, insn);
5233 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5234 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5235 type, ind_levels, insn);
5236 else if (REG_OK_FOR_INDEX_P (op1))
5237 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5238 type, ind_levels, insn);
5239 else if (REG_OK_FOR_INDEX_P (op0))
5240 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5241 type, ind_levels, insn);
5242 else
5244 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5245 type, ind_levels, insn);
5246 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5247 type, ind_levels, insn);
5251 else if (code0 == REG)
5253 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5254 type, ind_levels, insn);
5255 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5256 type, ind_levels, insn);
5259 else if (code1 == REG)
5261 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5262 type, ind_levels, insn);
5263 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5264 type, ind_levels, insn);
5268 return 0;
5270 case POST_INC:
5271 case POST_DEC:
5272 case PRE_INC:
5273 case PRE_DEC:
5274 if (GET_CODE (XEXP (x, 0)) == REG)
5276 register int regno = REGNO (XEXP (x, 0));
5277 int value = 0;
5278 rtx x_orig = x;
5280 /* A register that is incremented cannot be constant! */
5281 if (regno >= FIRST_PSEUDO_REGISTER
5282 && reg_equiv_constant[regno] != 0)
5283 abort ();
5285 /* Handle a register that is equivalent to a memory location
5286 which cannot be addressed directly. */
5287 if (reg_equiv_memory_loc[regno] != 0
5288 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5290 rtx tem = make_memloc (XEXP (x, 0), regno);
5291 if (reg_equiv_address[regno]
5292 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5294 /* First reload the memory location's address.
5295 We can't use ADDR_TYPE (type) here, because we need to
5296 write back the value after reading it, hence we actually
5297 need two registers. */
5298 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5299 &XEXP (tem, 0), opnum, type,
5300 ind_levels, insn);
5301 /* Put this inside a new increment-expression. */
5302 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5303 /* Proceed to reload that, as if it contained a register. */
5307 /* If we have a hard register that is ok as an index,
5308 don't make a reload. If an autoincrement of a nice register
5309 isn't "valid", it must be that no autoincrement is "valid".
5310 If that is true and something made an autoincrement anyway,
5311 this must be a special context where one is allowed.
5312 (For example, a "push" instruction.)
5313 We can't improve this address, so leave it alone. */
5315 /* Otherwise, reload the autoincrement into a suitable hard reg
5316 and record how much to increment by. */
5318 if (reg_renumber[regno] >= 0)
5319 regno = reg_renumber[regno];
5320 if ((regno >= FIRST_PSEUDO_REGISTER
5321 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5322 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5324 #ifdef AUTO_INC_DEC
5325 register rtx link;
5326 #endif
5327 int reloadnum;
5329 /* If we can output the register afterwards, do so, this
5330 saves the extra update.
5331 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5332 CALL_INSN - and it does not set CC0.
5333 But don't do this if we cannot directly address the
5334 memory location, since this will make it harder to
5335 reuse address reloads, and increases register pressure.
5336 Also don't do this if we can probably update x directly. */
5337 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5338 ? XEXP (x, 0)
5339 : reg_equiv_mem[regno]);
5340 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5341 if (insn && GET_CODE (insn) == INSN && equiv
5342 && memory_operand (equiv, GET_MODE (equiv))
5343 #ifdef HAVE_cc0
5344 && ! sets_cc0_p (PATTERN (insn))
5345 #endif
5346 && ! (icode != CODE_FOR_nothing
5347 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5348 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5350 loc = &XEXP (x, 0);
5351 x = XEXP (x, 0);
5352 reloadnum
5353 = push_reload (x, x, loc, loc,
5354 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5355 GET_MODE (x), GET_MODE (x), 0, 0,
5356 opnum, RELOAD_OTHER);
5358 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5359 LOC above is part of the new MEM, not the MEM in INSN.
5361 We must also replace the address of the MEM in INSN. */
5362 if (&XEXP (x_orig, 0) != loc)
5363 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5366 else
5368 reloadnum
5369 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5370 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5371 GET_MODE (x), GET_MODE (x), 0, 0,
5372 opnum, type);
5373 reload_inc[reloadnum]
5374 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5376 value = 1;
5379 #ifdef AUTO_INC_DEC
5380 /* Update the REG_INC notes. */
5382 for (link = REG_NOTES (this_insn);
5383 link; link = XEXP (link, 1))
5384 if (REG_NOTE_KIND (link) == REG_INC
5385 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5386 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5387 #endif
5389 return value;
5392 else if (GET_CODE (XEXP (x, 0)) == MEM)
5394 /* This is probably the result of a substitution, by eliminate_regs,
5395 of an equivalent address for a pseudo that was not allocated to a
5396 hard register. Verify that the specified address is valid and
5397 reload it into a register. */
5398 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5399 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5400 register rtx link;
5401 int reloadnum;
5403 /* Since we know we are going to reload this item, don't decrement
5404 for the indirection level.
5406 Note that this is actually conservative: it would be slightly
5407 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5408 reload1.c here. */
5409 /* We can't use ADDR_TYPE (type) here, because we need to
5410 write back the value after reading it, hence we actually
5411 need two registers. */
5412 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5413 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5414 opnum, type, ind_levels, insn);
5416 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5417 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5418 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5419 reload_inc[reloadnum]
5420 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5422 link = FIND_REG_INC_NOTE (this_insn, tem);
5423 if (link != 0)
5424 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5426 return 1;
5428 return 0;
5430 case MEM:
5431 /* This is probably the result of a substitution, by eliminate_regs, of
5432 an equivalent address for a pseudo that was not allocated to a hard
5433 register. Verify that the specified address is valid and reload it
5434 into a register.
5436 Since we know we are going to reload this item, don't decrement for
5437 the indirection level.
5439 Note that this is actually conservative: it would be slightly more
5440 efficient to use the value of SPILL_INDIRECT_LEVELS from
5441 reload1.c here. */
5443 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5444 opnum, ADDR_TYPE (type), ind_levels, insn);
5445 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5446 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5447 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5448 return 1;
5450 case REG:
5452 register int regno = REGNO (x);
5454 if (reg_equiv_constant[regno] != 0)
5456 find_reloads_address_part (reg_equiv_constant[regno], loc,
5457 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5458 GET_MODE (x), opnum, type, ind_levels);
5459 return 1;
5462 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5463 that feeds this insn. */
5464 if (reg_equiv_mem[regno] != 0)
5466 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5467 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5468 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5469 return 1;
5471 #endif
5473 if (reg_equiv_memory_loc[regno]
5474 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5476 rtx tem = make_memloc (x, regno);
5477 if (reg_equiv_address[regno] != 0
5478 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5480 x = tem;
5481 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5482 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5483 ind_levels, insn);
5487 if (reg_renumber[regno] >= 0)
5488 regno = reg_renumber[regno];
5490 if ((regno >= FIRST_PSEUDO_REGISTER
5491 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5492 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5494 push_reload (x, NULL_RTX, loc, NULL_PTR,
5495 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5496 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5497 return 1;
5500 /* If a register appearing in an address is the subject of a CLOBBER
5501 in this insn, reload it into some other register to be safe.
5502 The CLOBBER is supposed to make the register unavailable
5503 from before this insn to after it. */
5504 if (regno_clobbered_p (regno, this_insn))
5506 push_reload (x, NULL_RTX, loc, NULL_PTR,
5507 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5508 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5509 return 1;
5512 return 0;
5514 case SUBREG:
5515 if (GET_CODE (SUBREG_REG (x)) == REG)
5517 /* If this is a SUBREG of a hard register and the resulting register
5518 is of the wrong class, reload the whole SUBREG. This avoids
5519 needless copies if SUBREG_REG is multi-word. */
5520 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5522 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5524 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5525 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5527 push_reload (x, NULL_RTX, loc, NULL_PTR,
5528 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5529 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5530 return 1;
5533 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5534 is larger than the class size, then reload the whole SUBREG. */
5535 else
5537 enum reg_class class = (context ? INDEX_REG_CLASS
5538 : BASE_REG_CLASS);
5539 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5540 > reg_class_size[class])
5542 x = find_reloads_subreg_address (x, 0, opnum, type,
5543 ind_levels, insn);
5544 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5545 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5546 return 1;
5550 break;
5552 default:
5553 break;
5557 register const char *fmt = GET_RTX_FORMAT (code);
5558 register int i;
5560 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5562 if (fmt[i] == 'e')
5563 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5564 opnum, type, ind_levels, insn);
5568 return 0;
5571 /* X, which is found at *LOC, is a part of an address that needs to be
5572 reloaded into a register of class CLASS. If X is a constant, or if
5573 X is a PLUS that contains a constant, check that the constant is a
5574 legitimate operand and that we are supposed to be able to load
5575 it into the register.
5577 If not, force the constant into memory and reload the MEM instead.
5579 MODE is the mode to use, in case X is an integer constant.
5581 OPNUM and TYPE describe the purpose of any reloads made.
5583 IND_LEVELS says how many levels of indirect addressing this machine
5584 supports. */
5586 static void
5587 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5588 rtx x;
5589 rtx *loc;
5590 enum reg_class class;
5591 enum machine_mode mode;
5592 int opnum;
5593 enum reload_type type;
5594 int ind_levels;
5596 if (CONSTANT_P (x)
5597 && (! LEGITIMATE_CONSTANT_P (x)
5598 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5600 rtx tem;
5602 /* If this is a CONST_INT, it could have been created by a
5603 plus_constant call in eliminate_regs, which means it may be
5604 on the reload_obstack. reload_obstack will be freed later, so
5605 we can't allow such RTL to be put in the constant pool. There
5606 is code in force_const_mem to check for this case, but it doesn't
5607 work because we have already popped off the reload_obstack, so
5608 rtl_obstack == saveable_obstack is true at this point. */
5609 if (GET_CODE (x) == CONST_INT)
5610 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5611 else
5612 tem = x = force_const_mem (mode, x);
5614 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5615 opnum, type, ind_levels, 0);
5618 else if (GET_CODE (x) == PLUS
5619 && CONSTANT_P (XEXP (x, 1))
5620 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5621 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5623 rtx tem;
5625 /* See comment above. */
5626 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5627 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5628 else
5629 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5631 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5632 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5633 opnum, type, ind_levels, 0);
5636 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5637 mode, VOIDmode, 0, 0, opnum, type);
5640 /* X, a subreg of a pseudo, is a part of an address that needs to be
5641 reloaded.
5643 If the pseudo is equivalent to a memory location that cannot be directly
5644 addressed, make the necessary address reloads.
5646 If address reloads have been necessary, or if the address is changed
5647 by register elimination, return the rtx of the memory location;
5648 otherwise, return X.
5650 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5651 memory location.
5653 OPNUM and TYPE identify the purpose of the reload.
5655 IND_LEVELS says how many levels of indirect addressing are
5656 supported at this point in the address.
5658 INSN, if nonzero, is the insn in which we do the reload. It is used
5659 to determine where to put USEs for pseudos that we have to replace with
5660 stack slots. */
5662 static rtx
5663 find_reloads_subreg_address (x, force_replace, opnum, type,
5664 ind_levels, insn)
5665 rtx x;
5666 int force_replace;
5667 int opnum;
5668 enum reload_type type;
5669 int ind_levels;
5670 rtx insn;
5672 int regno = REGNO (SUBREG_REG (x));
5674 if (reg_equiv_memory_loc[regno])
5676 /* If the address is not directly addressable, or if the address is not
5677 offsettable, then it must be replaced. */
5678 if (! force_replace
5679 && (reg_equiv_address[regno]
5680 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5681 force_replace = 1;
5683 if (force_replace || num_not_at_initial_offset)
5685 rtx tem = make_memloc (SUBREG_REG (x), regno);
5687 /* If the address changes because of register elimination, then
5688 it must be replaced. */
5689 if (force_replace
5690 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5692 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5694 if (BYTES_BIG_ENDIAN)
5696 int size;
5698 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5699 offset += MIN (size, UNITS_PER_WORD);
5700 size = GET_MODE_SIZE (GET_MODE (x));
5701 offset -= MIN (size, UNITS_PER_WORD);
5703 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5704 PUT_MODE (tem, GET_MODE (x));
5705 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5706 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5707 ind_levels, insn);
5708 /* If this is not a toplevel operand, find_reloads doesn't see
5709 this substitution. We have to emit a USE of the pseudo so
5710 that delete_output_reload can see it. */
5711 if (replace_reloads && recog_operand[opnum] != x)
5712 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5713 x = tem;
5717 return x;
5720 /* Substitute into the current INSN the registers into which we have reloaded
5721 the things that need reloading. The array `replacements'
5722 says contains the locations of all pointers that must be changed
5723 and says what to replace them with.
5725 Return the rtx that X translates into; usually X, but modified. */
5727 void
5728 subst_reloads ()
5730 register int i;
5732 for (i = 0; i < n_replacements; i++)
5734 register struct replacement *r = &replacements[i];
5735 register rtx reloadreg = reload_reg_rtx[r->what];
5736 if (reloadreg)
5738 /* Encapsulate RELOADREG so its machine mode matches what
5739 used to be there. Note that gen_lowpart_common will
5740 do the wrong thing if RELOADREG is multi-word. RELOADREG
5741 will always be a REG here. */
5742 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5743 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5745 /* If we are putting this into a SUBREG and RELOADREG is a
5746 SUBREG, we would be making nested SUBREGs, so we have to fix
5747 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5749 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5751 if (GET_MODE (*r->subreg_loc)
5752 == GET_MODE (SUBREG_REG (reloadreg)))
5753 *r->subreg_loc = SUBREG_REG (reloadreg);
5754 else
5756 *r->where = SUBREG_REG (reloadreg);
5757 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5760 else
5761 *r->where = reloadreg;
5763 /* If reload got no reg and isn't optional, something's wrong. */
5764 else if (! reload_optional[r->what])
5765 abort ();
5769 /* Make a copy of any replacements being done into X and move those copies
5770 to locations in Y, a copy of X. We only look at the highest level of
5771 the RTL. */
5773 void
5774 copy_replacements (x, y)
5775 rtx x;
5776 rtx y;
5778 int i, j;
5779 enum rtx_code code = GET_CODE (x);
5780 const char *fmt = GET_RTX_FORMAT (code);
5781 struct replacement *r;
5783 /* We can't support X being a SUBREG because we might then need to know its
5784 location if something inside it was replaced. */
5785 if (code == SUBREG)
5786 abort ();
5788 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5789 if (fmt[i] == 'e')
5790 for (j = 0; j < n_replacements; j++)
5792 if (replacements[j].subreg_loc == &XEXP (x, i))
5794 r = &replacements[n_replacements++];
5795 r->where = replacements[j].where;
5796 r->subreg_loc = &XEXP (y, i);
5797 r->what = replacements[j].what;
5798 r->mode = replacements[j].mode;
5800 else if (replacements[j].where == &XEXP (x, i))
5802 r = &replacements[n_replacements++];
5803 r->where = &XEXP (y, i);
5804 r->subreg_loc = 0;
5805 r->what = replacements[j].what;
5806 r->mode = replacements[j].mode;
5811 /* Change any replacements being done to *X to be done to *Y */
5813 void
5814 move_replacements (x, y)
5815 rtx *x;
5816 rtx *y;
5818 int i;
5820 for (i = 0; i < n_replacements; i++)
5821 if (replacements[i].subreg_loc == x)
5822 replacements[i].subreg_loc = y;
5823 else if (replacements[i].where == x)
5825 replacements[i].where = y;
5826 replacements[i].subreg_loc = 0;
5830 /* If LOC was scheduled to be replaced by something, return the replacement.
5831 Otherwise, return *LOC. */
5834 find_replacement (loc)
5835 rtx *loc;
5837 struct replacement *r;
5839 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5841 rtx reloadreg = reload_reg_rtx[r->what];
5843 if (reloadreg && r->where == loc)
5845 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5846 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5848 return reloadreg;
5850 else if (reloadreg && r->subreg_loc == loc)
5852 /* RELOADREG must be either a REG or a SUBREG.
5854 ??? Is it actually still ever a SUBREG? If so, why? */
5856 if (GET_CODE (reloadreg) == REG)
5857 return gen_rtx_REG (GET_MODE (*loc),
5858 REGNO (reloadreg) + SUBREG_WORD (*loc));
5859 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5860 return reloadreg;
5861 else
5862 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5863 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5867 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5868 what's inside and make a new rtl if so. */
5869 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5870 || GET_CODE (*loc) == MULT)
5872 rtx x = find_replacement (&XEXP (*loc, 0));
5873 rtx y = find_replacement (&XEXP (*loc, 1));
5875 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5876 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5879 return *loc;
5882 /* Return nonzero if register in range [REGNO, ENDREGNO)
5883 appears either explicitly or implicitly in X
5884 other than being stored into (except for earlyclobber operands).
5886 References contained within the substructure at LOC do not count.
5887 LOC may be zero, meaning don't ignore anything.
5889 This is similar to refers_to_regno_p in rtlanal.c except that we
5890 look at equivalences for pseudos that didn't get hard registers. */
5893 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5894 int regno, endregno;
5895 rtx x;
5896 rtx *loc;
5898 register int i;
5899 register RTX_CODE code;
5900 register const char *fmt;
5902 if (x == 0)
5903 return 0;
5905 repeat:
5906 code = GET_CODE (x);
5908 switch (code)
5910 case REG:
5911 i = REGNO (x);
5913 /* If this is a pseudo, a hard register must not have been allocated.
5914 X must therefore either be a constant or be in memory. */
5915 if (i >= FIRST_PSEUDO_REGISTER)
5917 if (reg_equiv_memory_loc[i])
5918 return refers_to_regno_for_reload_p (regno, endregno,
5919 reg_equiv_memory_loc[i],
5920 NULL_PTR);
5922 if (reg_equiv_constant[i])
5923 return 0;
5925 abort ();
5928 return (endregno > i
5929 && regno < i + (i < FIRST_PSEUDO_REGISTER
5930 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5931 : 1));
5933 case SUBREG:
5934 /* If this is a SUBREG of a hard reg, we can see exactly which
5935 registers are being modified. Otherwise, handle normally. */
5936 if (GET_CODE (SUBREG_REG (x)) == REG
5937 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5939 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5940 int inner_endregno
5941 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5942 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5944 return endregno > inner_regno && regno < inner_endregno;
5946 break;
5948 case CLOBBER:
5949 case SET:
5950 if (&SET_DEST (x) != loc
5951 /* Note setting a SUBREG counts as referring to the REG it is in for
5952 a pseudo but not for hard registers since we can
5953 treat each word individually. */
5954 && ((GET_CODE (SET_DEST (x)) == SUBREG
5955 && loc != &SUBREG_REG (SET_DEST (x))
5956 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5957 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5958 && refers_to_regno_for_reload_p (regno, endregno,
5959 SUBREG_REG (SET_DEST (x)),
5960 loc))
5961 /* If the output is an earlyclobber operand, this is
5962 a conflict. */
5963 || ((GET_CODE (SET_DEST (x)) != REG
5964 || earlyclobber_operand_p (SET_DEST (x)))
5965 && refers_to_regno_for_reload_p (regno, endregno,
5966 SET_DEST (x), loc))))
5967 return 1;
5969 if (code == CLOBBER || loc == &SET_SRC (x))
5970 return 0;
5971 x = SET_SRC (x);
5972 goto repeat;
5974 default:
5975 break;
5978 /* X does not match, so try its subexpressions. */
5980 fmt = GET_RTX_FORMAT (code);
5981 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5983 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5985 if (i == 0)
5987 x = XEXP (x, 0);
5988 goto repeat;
5990 else
5991 if (refers_to_regno_for_reload_p (regno, endregno,
5992 XEXP (x, i), loc))
5993 return 1;
5995 else if (fmt[i] == 'E')
5997 register int j;
5998 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5999 if (loc != &XVECEXP (x, i, j)
6000 && refers_to_regno_for_reload_p (regno, endregno,
6001 XVECEXP (x, i, j), loc))
6002 return 1;
6005 return 0;
6008 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6009 we check if any register number in X conflicts with the relevant register
6010 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6011 contains a MEM (we don't bother checking for memory addresses that can't
6012 conflict because we expect this to be a rare case.
6014 This function is similar to reg_overlap_mention_p in rtlanal.c except
6015 that we look at equivalences for pseudos that didn't get hard registers. */
6018 reg_overlap_mentioned_for_reload_p (x, in)
6019 rtx x, in;
6021 int regno, endregno;
6023 /* Overly conservative. */
6024 if (GET_CODE (x) == STRICT_LOW_PART)
6025 x = XEXP (x, 0);
6027 /* If either argument is a constant, then modifying X can not affect IN. */
6028 if (CONSTANT_P (x) || CONSTANT_P (in))
6029 return 0;
6030 else if (GET_CODE (x) == SUBREG)
6032 regno = REGNO (SUBREG_REG (x));
6033 if (regno < FIRST_PSEUDO_REGISTER)
6034 regno += SUBREG_WORD (x);
6036 else if (GET_CODE (x) == REG)
6038 regno = REGNO (x);
6040 /* If this is a pseudo, it must not have been assigned a hard register.
6041 Therefore, it must either be in memory or be a constant. */
6043 if (regno >= FIRST_PSEUDO_REGISTER)
6045 if (reg_equiv_memory_loc[regno])
6046 return refers_to_mem_for_reload_p (in);
6047 else if (reg_equiv_constant[regno])
6048 return 0;
6049 abort ();
6052 else if (GET_CODE (x) == MEM)
6053 return refers_to_mem_for_reload_p (in);
6054 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6055 || GET_CODE (x) == CC0)
6056 return reg_mentioned_p (x, in);
6057 else
6058 abort ();
6060 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6061 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6063 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
6066 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6067 registers. */
6070 refers_to_mem_for_reload_p (x)
6071 rtx x;
6073 const char *fmt;
6074 int i;
6076 if (GET_CODE (x) == MEM)
6077 return 1;
6079 if (GET_CODE (x) == REG)
6080 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6081 && reg_equiv_memory_loc[REGNO (x)]);
6083 fmt = GET_RTX_FORMAT (GET_CODE (x));
6084 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6085 if (fmt[i] == 'e'
6086 && (GET_CODE (XEXP (x, i)) == MEM
6087 || refers_to_mem_for_reload_p (XEXP (x, i))))
6088 return 1;
6090 return 0;
6093 /* Check the insns before INSN to see if there is a suitable register
6094 containing the same value as GOAL.
6095 If OTHER is -1, look for a register in class CLASS.
6096 Otherwise, just see if register number OTHER shares GOAL's value.
6098 Return an rtx for the register found, or zero if none is found.
6100 If RELOAD_REG_P is (short *)1,
6101 we reject any hard reg that appears in reload_reg_rtx
6102 because such a hard reg is also needed coming into this insn.
6104 If RELOAD_REG_P is any other nonzero value,
6105 it is a vector indexed by hard reg number
6106 and we reject any hard reg whose element in the vector is nonnegative
6107 as well as any that appears in reload_reg_rtx.
6109 If GOAL is zero, then GOALREG is a register number; we look
6110 for an equivalent for that register.
6112 MODE is the machine mode of the value we want an equivalence for.
6113 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6115 This function is used by jump.c as well as in the reload pass.
6117 If GOAL is the sum of the stack pointer and a constant, we treat it
6118 as if it were a constant except that sp is required to be unchanging. */
6121 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6122 register rtx goal;
6123 rtx insn;
6124 enum reg_class class;
6125 register int other;
6126 short *reload_reg_p;
6127 int goalreg;
6128 enum machine_mode mode;
6130 register rtx p = insn;
6131 rtx goaltry, valtry, value, where;
6132 register rtx pat;
6133 register int regno = -1;
6134 int valueno;
6135 int goal_mem = 0;
6136 int goal_const = 0;
6137 int goal_mem_addr_varies = 0;
6138 int need_stable_sp = 0;
6139 int nregs;
6140 int valuenregs;
6142 if (goal == 0)
6143 regno = goalreg;
6144 else if (GET_CODE (goal) == REG)
6145 regno = REGNO (goal);
6146 else if (GET_CODE (goal) == MEM)
6148 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6149 if (MEM_VOLATILE_P (goal))
6150 return 0;
6151 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6152 return 0;
6153 /* An address with side effects must be reexecuted. */
6154 switch (code)
6156 case POST_INC:
6157 case PRE_INC:
6158 case POST_DEC:
6159 case PRE_DEC:
6160 return 0;
6161 default:
6162 break;
6164 goal_mem = 1;
6166 else if (CONSTANT_P (goal))
6167 goal_const = 1;
6168 else if (GET_CODE (goal) == PLUS
6169 && XEXP (goal, 0) == stack_pointer_rtx
6170 && CONSTANT_P (XEXP (goal, 1)))
6171 goal_const = need_stable_sp = 1;
6172 else if (GET_CODE (goal) == PLUS
6173 && XEXP (goal, 0) == frame_pointer_rtx
6174 && CONSTANT_P (XEXP (goal, 1)))
6175 goal_const = 1;
6176 else
6177 return 0;
6179 /* On some machines, certain regs must always be rejected
6180 because they don't behave the way ordinary registers do. */
6182 #ifdef OVERLAPPING_REGNO_P
6183 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6184 && OVERLAPPING_REGNO_P (regno))
6185 return 0;
6186 #endif
6188 /* Scan insns back from INSN, looking for one that copies
6189 a value into or out of GOAL.
6190 Stop and give up if we reach a label. */
6192 while (1)
6194 p = PREV_INSN (p);
6195 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6196 return 0;
6197 if (GET_CODE (p) == INSN
6198 /* If we don't want spill regs ... */
6199 && (! (reload_reg_p != 0
6200 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6201 /* ... then ignore insns introduced by reload; they aren't useful
6202 and can cause results in reload_as_needed to be different
6203 from what they were when calculating the need for spills.
6204 If we notice an input-reload insn here, we will reject it below,
6205 but it might hide a usable equivalent. That makes bad code.
6206 It may even abort: perhaps no reg was spilled for this insn
6207 because it was assumed we would find that equivalent. */
6208 || INSN_UID (p) < reload_first_uid))
6210 rtx tem;
6211 pat = single_set (p);
6212 /* First check for something that sets some reg equal to GOAL. */
6213 if (pat != 0
6214 && ((regno >= 0
6215 && true_regnum (SET_SRC (pat)) == regno
6216 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6218 (regno >= 0
6219 && true_regnum (SET_DEST (pat)) == regno
6220 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6222 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6223 /* When looking for stack pointer + const,
6224 make sure we don't use a stack adjust. */
6225 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6226 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6227 || (goal_mem
6228 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6229 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6230 || (goal_mem
6231 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6232 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6233 /* If we are looking for a constant,
6234 and something equivalent to that constant was copied
6235 into a reg, we can use that reg. */
6236 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6237 NULL_RTX))
6238 && rtx_equal_p (XEXP (tem, 0), goal)
6239 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6240 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6241 NULL_RTX))
6242 && GET_CODE (SET_DEST (pat)) == REG
6243 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6244 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6245 && GET_CODE (goal) == CONST_INT
6246 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6247 VOIDmode))
6248 && rtx_equal_p (goal, goaltry)
6249 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6250 VOIDmode))
6251 && (valueno = true_regnum (valtry)) >= 0)
6252 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6253 NULL_RTX))
6254 && GET_CODE (SET_DEST (pat)) == REG
6255 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6256 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6257 && GET_CODE (goal) == CONST_INT
6258 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6259 VOIDmode))
6260 && rtx_equal_p (goal, goaltry)
6261 && (valtry
6262 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6263 && (valueno = true_regnum (valtry)) >= 0)))
6264 if (other >= 0
6265 ? valueno == other
6266 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6267 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6268 valueno)))
6270 value = valtry;
6271 where = p;
6272 break;
6277 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6278 (or copying VALUE into GOAL, if GOAL is also a register).
6279 Now verify that VALUE is really valid. */
6281 /* VALUENO is the register number of VALUE; a hard register. */
6283 /* Don't try to re-use something that is killed in this insn. We want
6284 to be able to trust REG_UNUSED notes. */
6285 if (find_reg_note (where, REG_UNUSED, value))
6286 return 0;
6288 /* If we propose to get the value from the stack pointer or if GOAL is
6289 a MEM based on the stack pointer, we need a stable SP. */
6290 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6291 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6292 goal)))
6293 need_stable_sp = 1;
6295 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6296 if (GET_MODE (value) != mode)
6297 return 0;
6299 /* Reject VALUE if it was loaded from GOAL
6300 and is also a register that appears in the address of GOAL. */
6302 if (goal_mem && value == SET_DEST (single_set (where))
6303 && refers_to_regno_for_reload_p (valueno,
6304 (valueno
6305 + HARD_REGNO_NREGS (valueno, mode)),
6306 goal, NULL_PTR))
6307 return 0;
6309 /* Reject registers that overlap GOAL. */
6311 if (!goal_mem && !goal_const
6312 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6313 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6314 return 0;
6316 /* Reject VALUE if it is one of the regs reserved for reloads.
6317 Reload1 knows how to reuse them anyway, and it would get
6318 confused if we allocated one without its knowledge.
6319 (Now that insns introduced by reload are ignored above,
6320 this case shouldn't happen, but I'm not positive.) */
6322 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6323 && reload_reg_p[valueno] >= 0)
6324 return 0;
6326 /* On some machines, certain regs must always be rejected
6327 because they don't behave the way ordinary registers do. */
6329 #ifdef OVERLAPPING_REGNO_P
6330 if (OVERLAPPING_REGNO_P (valueno))
6331 return 0;
6332 #endif
6334 nregs = HARD_REGNO_NREGS (regno, mode);
6335 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6337 /* Reject VALUE if it is a register being used for an input reload
6338 even if it is not one of those reserved. */
6340 if (reload_reg_p != 0)
6342 int i;
6343 for (i = 0; i < n_reloads; i++)
6344 if (reload_reg_rtx[i] != 0 && reload_in[i])
6346 int regno1 = REGNO (reload_reg_rtx[i]);
6347 int nregs1 = HARD_REGNO_NREGS (regno1,
6348 GET_MODE (reload_reg_rtx[i]));
6349 if (regno1 < valueno + valuenregs
6350 && regno1 + nregs1 > valueno)
6351 return 0;
6355 if (goal_mem)
6356 /* We must treat frame pointer as varying here,
6357 since it can vary--in a nonlocal goto as generated by expand_goto. */
6358 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6360 /* Now verify that the values of GOAL and VALUE remain unaltered
6361 until INSN is reached. */
6363 p = insn;
6364 while (1)
6366 p = PREV_INSN (p);
6367 if (p == where)
6368 return value;
6370 /* Don't trust the conversion past a function call
6371 if either of the two is in a call-clobbered register, or memory. */
6372 if (GET_CODE (p) == CALL_INSN
6373 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6374 && call_used_regs[regno])
6376 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6377 && call_used_regs[valueno])
6379 goal_mem
6380 || need_stable_sp))
6381 return 0;
6383 #ifdef NON_SAVING_SETJMP
6384 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6385 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6386 return 0;
6387 #endif
6389 #ifdef INSN_CLOBBERS_REGNO_P
6390 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6391 && INSN_CLOBBERS_REGNO_P (p, valueno))
6392 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6393 && INSN_CLOBBERS_REGNO_P (p, regno)))
6394 return 0;
6395 #endif
6397 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6399 pat = PATTERN (p);
6401 /* Watch out for unspec_volatile, and volatile asms. */
6402 if (volatile_insn_p (pat))
6403 return 0;
6405 /* If this insn P stores in either GOAL or VALUE, return 0.
6406 If GOAL is a memory ref and this insn writes memory, return 0.
6407 If GOAL is a memory ref and its address is not constant,
6408 and this insn P changes a register used in GOAL, return 0. */
6410 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6412 register rtx dest = SET_DEST (pat);
6413 while (GET_CODE (dest) == SUBREG
6414 || GET_CODE (dest) == ZERO_EXTRACT
6415 || GET_CODE (dest) == SIGN_EXTRACT
6416 || GET_CODE (dest) == STRICT_LOW_PART)
6417 dest = XEXP (dest, 0);
6418 if (GET_CODE (dest) == REG)
6420 register int xregno = REGNO (dest);
6421 int xnregs;
6422 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6423 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6424 else
6425 xnregs = 1;
6426 if (xregno < regno + nregs && xregno + xnregs > regno)
6427 return 0;
6428 if (xregno < valueno + valuenregs
6429 && xregno + xnregs > valueno)
6430 return 0;
6431 if (goal_mem_addr_varies
6432 && reg_overlap_mentioned_for_reload_p (dest, goal))
6433 return 0;
6434 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6435 return 0;
6437 else if (goal_mem && GET_CODE (dest) == MEM
6438 && ! push_operand (dest, GET_MODE (dest)))
6439 return 0;
6440 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6441 && reg_equiv_memory_loc[regno] != 0)
6442 return 0;
6443 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6444 return 0;
6446 else if (GET_CODE (pat) == PARALLEL)
6448 register int i;
6449 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6451 register rtx v1 = XVECEXP (pat, 0, i);
6452 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6454 register rtx dest = SET_DEST (v1);
6455 while (GET_CODE (dest) == SUBREG
6456 || GET_CODE (dest) == ZERO_EXTRACT
6457 || GET_CODE (dest) == SIGN_EXTRACT
6458 || GET_CODE (dest) == STRICT_LOW_PART)
6459 dest = XEXP (dest, 0);
6460 if (GET_CODE (dest) == REG)
6462 register int xregno = REGNO (dest);
6463 int xnregs;
6464 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6465 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6466 else
6467 xnregs = 1;
6468 if (xregno < regno + nregs
6469 && xregno + xnregs > regno)
6470 return 0;
6471 if (xregno < valueno + valuenregs
6472 && xregno + xnregs > valueno)
6473 return 0;
6474 if (goal_mem_addr_varies
6475 && reg_overlap_mentioned_for_reload_p (dest,
6476 goal))
6477 return 0;
6478 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6479 return 0;
6481 else if (goal_mem && GET_CODE (dest) == MEM
6482 && ! push_operand (dest, GET_MODE (dest)))
6483 return 0;
6484 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6485 && reg_equiv_memory_loc[regno] != 0)
6486 return 0;
6487 else if (need_stable_sp
6488 && push_operand (dest, GET_MODE (dest)))
6489 return 0;
6494 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6496 rtx link;
6498 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6499 link = XEXP (link, 1))
6501 pat = XEXP (link, 0);
6502 if (GET_CODE (pat) == CLOBBER)
6504 register rtx dest = SET_DEST (pat);
6505 while (GET_CODE (dest) == SUBREG
6506 || GET_CODE (dest) == ZERO_EXTRACT
6507 || GET_CODE (dest) == SIGN_EXTRACT
6508 || GET_CODE (dest) == STRICT_LOW_PART)
6509 dest = XEXP (dest, 0);
6510 if (GET_CODE (dest) == REG)
6512 register int xregno = REGNO (dest);
6513 int xnregs;
6514 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6515 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6516 else
6517 xnregs = 1;
6518 if (xregno < regno + nregs
6519 && xregno + xnregs > regno)
6520 return 0;
6521 if (xregno < valueno + valuenregs
6522 && xregno + xnregs > valueno)
6523 return 0;
6524 if (goal_mem_addr_varies
6525 && reg_overlap_mentioned_for_reload_p (dest,
6526 goal))
6527 return 0;
6529 else if (goal_mem && GET_CODE (dest) == MEM
6530 && ! push_operand (dest, GET_MODE (dest)))
6531 return 0;
6532 else if (need_stable_sp
6533 && push_operand (dest, GET_MODE (dest)))
6534 return 0;
6539 #ifdef AUTO_INC_DEC
6540 /* If this insn auto-increments or auto-decrements
6541 either regno or valueno, return 0 now.
6542 If GOAL is a memory ref and its address is not constant,
6543 and this insn P increments a register used in GOAL, return 0. */
6545 register rtx link;
6547 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6548 if (REG_NOTE_KIND (link) == REG_INC
6549 && GET_CODE (XEXP (link, 0)) == REG)
6551 register int incno = REGNO (XEXP (link, 0));
6552 if (incno < regno + nregs && incno >= regno)
6553 return 0;
6554 if (incno < valueno + valuenregs && incno >= valueno)
6555 return 0;
6556 if (goal_mem_addr_varies
6557 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6558 goal))
6559 return 0;
6562 #endif
6567 /* Find a place where INCED appears in an increment or decrement operator
6568 within X, and return the amount INCED is incremented or decremented by.
6569 The value is always positive. */
6571 static int
6572 find_inc_amount (x, inced)
6573 rtx x, inced;
6575 register enum rtx_code code = GET_CODE (x);
6576 register const char *fmt;
6577 register int i;
6579 if (code == MEM)
6581 register rtx addr = XEXP (x, 0);
6582 if ((GET_CODE (addr) == PRE_DEC
6583 || GET_CODE (addr) == POST_DEC
6584 || GET_CODE (addr) == PRE_INC
6585 || GET_CODE (addr) == POST_INC)
6586 && XEXP (addr, 0) == inced)
6587 return GET_MODE_SIZE (GET_MODE (x));
6590 fmt = GET_RTX_FORMAT (code);
6591 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6593 if (fmt[i] == 'e')
6595 register int tem = find_inc_amount (XEXP (x, i), inced);
6596 if (tem != 0)
6597 return tem;
6599 if (fmt[i] == 'E')
6601 register int j;
6602 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6604 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6605 if (tem != 0)
6606 return tem;
6611 return 0;
6614 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6617 regno_clobbered_p (regno, insn)
6618 int regno;
6619 rtx insn;
6621 if (GET_CODE (PATTERN (insn)) == CLOBBER
6622 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6623 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6625 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6627 int i = XVECLEN (PATTERN (insn), 0) - 1;
6629 for (; i >= 0; i--)
6631 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6632 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6633 && REGNO (XEXP (elt, 0)) == regno)
6634 return 1;
6638 return 0;
6641 static const char *reload_when_needed_name[] =
6643 "RELOAD_FOR_INPUT",
6644 "RELOAD_FOR_OUTPUT",
6645 "RELOAD_FOR_INSN",
6646 "RELOAD_FOR_INPUT_ADDRESS",
6647 "RELOAD_FOR_INPADDR_ADDRESS",
6648 "RELOAD_FOR_OUTPUT_ADDRESS",
6649 "RELOAD_FOR_OUTADDR_ADDRESS",
6650 "RELOAD_FOR_OPERAND_ADDRESS",
6651 "RELOAD_FOR_OPADDR_ADDR",
6652 "RELOAD_OTHER",
6653 "RELOAD_FOR_OTHER_ADDRESS"
6656 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6658 /* These functions are used to print the variables set by 'find_reloads' */
6660 void
6661 debug_reload_to_stream (f)
6662 FILE *f;
6664 int r;
6665 const char *prefix;
6667 if (! f)
6668 f = stderr;
6669 for (r = 0; r < n_reloads; r++)
6671 fprintf (f, "Reload %d: ", r);
6673 if (reload_in[r] != 0)
6675 fprintf (f, "reload_in (%s) = ",
6676 GET_MODE_NAME (reload_inmode[r]));
6677 print_inline_rtx (f, reload_in[r], 24);
6678 fprintf (f, "\n\t");
6681 if (reload_out[r] != 0)
6683 fprintf (f, "reload_out (%s) = ",
6684 GET_MODE_NAME (reload_outmode[r]));
6685 print_inline_rtx (f, reload_out[r], 24);
6686 fprintf (f, "\n\t");
6689 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6691 fprintf (f, "%s (opnum = %d)",
6692 reload_when_needed_name[(int) reload_when_needed[r]],
6693 reload_opnum[r]);
6695 if (reload_optional[r])
6696 fprintf (f, ", optional");
6698 if (reload_nongroup[r])
6699 fprintf (stderr, ", nongroup");
6701 if (reload_inc[r] != 0)
6702 fprintf (f, ", inc by %d", reload_inc[r]);
6704 if (reload_nocombine[r])
6705 fprintf (f, ", can't combine");
6707 if (reload_secondary_p[r])
6708 fprintf (f, ", secondary_reload_p");
6710 if (reload_in_reg[r] != 0)
6712 fprintf (f, "\n\treload_in_reg: ");
6713 print_inline_rtx (f, reload_in_reg[r], 24);
6716 if (reload_out_reg[r] != 0)
6718 fprintf (f, "\n\treload_out_reg: ");
6719 print_inline_rtx (f, reload_out_reg[r], 24);
6722 if (reload_reg_rtx[r] != 0)
6724 fprintf (f, "\n\treload_reg_rtx: ");
6725 print_inline_rtx (f, reload_reg_rtx[r], 24);
6728 prefix = "\n\t";
6729 if (reload_secondary_in_reload[r] != -1)
6731 fprintf (f, "%ssecondary_in_reload = %d",
6732 prefix, reload_secondary_in_reload[r]);
6733 prefix = ", ";
6736 if (reload_secondary_out_reload[r] != -1)
6737 fprintf (f, "%ssecondary_out_reload = %d\n",
6738 prefix, reload_secondary_out_reload[r]);
6740 prefix = "\n\t";
6741 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6743 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6744 insn_name[reload_secondary_in_icode[r]]);
6745 prefix = ", ";
6748 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6749 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6750 insn_name[reload_secondary_out_icode[r]]);
6752 fprintf (f, "\n");
6756 void
6757 debug_reload ()
6759 debug_reload_to_stream (stderr);