gcc/testsuite/gcc.target/powerpc/vec-shift.c

   1 /* { dg-do compile { target { powerpc*-*-* } } } */
   2 /* { dg-require-effective-target powerpc_altivec_ok } */
   3 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
   4 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
   5 /* { dg-options "-mcpu=power7 -O2" } */
   6
   7 /* This used to ICE.  During gimplification, "i" is widened to an unsigned
   8    int.  We used to fail at expand time as we tried to cram an SImode item
   9    into a QImode memory slot.  This has been fixed to properly truncate the
  10    shift amount when splatting it into a vector.  */
  11
  12 typedef unsigned char v16ui __attribute__((vector_size(16)));
  13
  14 v16ui vslb(v16ui v, unsigned char i)
  15 {
  16         return v << i;
  17 }
  18
  19 /* { dg-final { scan-assembler "vspltb" } } */
  20 /* { dg-final { scan-assembler "vslb" } } */