1 /* { dg-do compile { target { powerpc*-*-* } } } */
2 /* { dg-require-effective-target powerpc_vsx_ok } */
3 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
4 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
5 /* { dg-options "-mcpu=power7 -O2" } */
7 /* Test to make sure double values are allocated to the Altivec registers as
8 well as the traditional FPR registers. */
15 #define MASK_TYPE unsigned long long
18 #define MASK_ONE ((MASK_TYPE)1)
19 #define ZERO ((TYPE) 0.0)
22 test_add (const MASK_TYPE
*add_mask
, const TYPE
*add_values
,
23 const MASK_TYPE
*sub_mask
, const TYPE
*sub_values
,
24 const MASK_TYPE
*mul_mask
, const TYPE
*mul_values
,
25 const MASK_TYPE
*div_mask
, const TYPE
*div_values
,
26 const MASK_TYPE
*eq0_mask
, int *eq0_ptr
)
72 while ((mask
= *add_mask
++) != 0)
74 value
= *add_values
++;
76 __asm__ (" #reg %0" : "+d" (value
));
78 if ((mask
& (MASK_ONE
<< 0)) != 0)
81 if ((mask
& (MASK_ONE
<< 1)) != 0)
84 if ((mask
& (MASK_ONE
<< 2)) != 0)
87 if ((mask
& (MASK_ONE
<< 3)) != 0)
90 if ((mask
& (MASK_ONE
<< 4)) != 0)
93 if ((mask
& (MASK_ONE
<< 5)) != 0)
96 if ((mask
& (MASK_ONE
<< 6)) != 0)
99 if ((mask
& (MASK_ONE
<< 7)) != 0)
102 if ((mask
& (MASK_ONE
<< 8)) != 0)
105 if ((mask
& (MASK_ONE
<< 9)) != 0)
108 if ((mask
& (MASK_ONE
<< 10)) != 0)
111 if ((mask
& (MASK_ONE
<< 11)) != 0)
114 if ((mask
& (MASK_ONE
<< 12)) != 0)
117 if ((mask
& (MASK_ONE
<< 13)) != 0)
120 if ((mask
& (MASK_ONE
<< 14)) != 0)
123 if ((mask
& (MASK_ONE
<< 15)) != 0)
126 if ((mask
& (MASK_ONE
<< 16)) != 0)
129 if ((mask
& (MASK_ONE
<< 17)) != 0)
132 if ((mask
& (MASK_ONE
<< 18)) != 0)
135 if ((mask
& (MASK_ONE
<< 19)) != 0)
138 if ((mask
& (MASK_ONE
<< 20)) != 0)
141 if ((mask
& (MASK_ONE
<< 21)) != 0)
144 if ((mask
& (MASK_ONE
<< 22)) != 0)
147 if ((mask
& (MASK_ONE
<< 23)) != 0)
150 if ((mask
& (MASK_ONE
<< 24)) != 0)
153 if ((mask
& (MASK_ONE
<< 25)) != 0)
156 if ((mask
& (MASK_ONE
<< 26)) != 0)
159 if ((mask
& (MASK_ONE
<< 27)) != 0)
162 if ((mask
& (MASK_ONE
<< 28)) != 0)
165 if ((mask
& (MASK_ONE
<< 29)) != 0)
168 if ((mask
& (MASK_ONE
<< 30)) != 0)
171 if ((mask
& (MASK_ONE
<< 31)) != 0)
174 if ((mask
& (MASK_ONE
<< 32)) != 0)
177 if ((mask
& (MASK_ONE
<< 33)) != 0)
180 if ((mask
& (MASK_ONE
<< 34)) != 0)
183 if ((mask
& (MASK_ONE
<< 35)) != 0)
186 if ((mask
& (MASK_ONE
<< 36)) != 0)
189 if ((mask
& (MASK_ONE
<< 37)) != 0)
192 if ((mask
& (MASK_ONE
<< 38)) != 0)
195 if ((mask
& (MASK_ONE
<< 39)) != 0)
199 while ((mask
= *sub_mask
++) != 0)
201 value
= *sub_values
++;
203 __asm__ (" #reg %0" : "+d" (value
));
205 if ((mask
& (MASK_ONE
<< 0)) != 0)
208 if ((mask
& (MASK_ONE
<< 1)) != 0)
211 if ((mask
& (MASK_ONE
<< 2)) != 0)
214 if ((mask
& (MASK_ONE
<< 3)) != 0)
217 if ((mask
& (MASK_ONE
<< 4)) != 0)
220 if ((mask
& (MASK_ONE
<< 5)) != 0)
223 if ((mask
& (MASK_ONE
<< 6)) != 0)
226 if ((mask
& (MASK_ONE
<< 7)) != 0)
229 if ((mask
& (MASK_ONE
<< 8)) != 0)
232 if ((mask
& (MASK_ONE
<< 9)) != 0)
235 if ((mask
& (MASK_ONE
<< 10)) != 0)
238 if ((mask
& (MASK_ONE
<< 11)) != 0)
241 if ((mask
& (MASK_ONE
<< 12)) != 0)
244 if ((mask
& (MASK_ONE
<< 13)) != 0)
247 if ((mask
& (MASK_ONE
<< 14)) != 0)
250 if ((mask
& (MASK_ONE
<< 15)) != 0)
253 if ((mask
& (MASK_ONE
<< 16)) != 0)
256 if ((mask
& (MASK_ONE
<< 17)) != 0)
259 if ((mask
& (MASK_ONE
<< 18)) != 0)
262 if ((mask
& (MASK_ONE
<< 19)) != 0)
265 if ((mask
& (MASK_ONE
<< 20)) != 0)
268 if ((mask
& (MASK_ONE
<< 21)) != 0)
271 if ((mask
& (MASK_ONE
<< 22)) != 0)
274 if ((mask
& (MASK_ONE
<< 23)) != 0)
277 if ((mask
& (MASK_ONE
<< 24)) != 0)
280 if ((mask
& (MASK_ONE
<< 25)) != 0)
283 if ((mask
& (MASK_ONE
<< 26)) != 0)
286 if ((mask
& (MASK_ONE
<< 27)) != 0)
289 if ((mask
& (MASK_ONE
<< 28)) != 0)
292 if ((mask
& (MASK_ONE
<< 29)) != 0)
295 if ((mask
& (MASK_ONE
<< 30)) != 0)
298 if ((mask
& (MASK_ONE
<< 31)) != 0)
301 if ((mask
& (MASK_ONE
<< 32)) != 0)
304 if ((mask
& (MASK_ONE
<< 33)) != 0)
307 if ((mask
& (MASK_ONE
<< 34)) != 0)
310 if ((mask
& (MASK_ONE
<< 35)) != 0)
313 if ((mask
& (MASK_ONE
<< 36)) != 0)
316 if ((mask
& (MASK_ONE
<< 37)) != 0)
319 if ((mask
& (MASK_ONE
<< 38)) != 0)
322 if ((mask
& (MASK_ONE
<< 39)) != 0)
326 while ((mask
= *mul_mask
++) != 0)
328 value
= *mul_values
++;
330 __asm__ (" #reg %0" : "+d" (value
));
332 if ((mask
& (MASK_ONE
<< 0)) != 0)
335 if ((mask
& (MASK_ONE
<< 1)) != 0)
338 if ((mask
& (MASK_ONE
<< 2)) != 0)
341 if ((mask
& (MASK_ONE
<< 3)) != 0)
344 if ((mask
& (MASK_ONE
<< 4)) != 0)
347 if ((mask
& (MASK_ONE
<< 5)) != 0)
350 if ((mask
& (MASK_ONE
<< 6)) != 0)
353 if ((mask
& (MASK_ONE
<< 7)) != 0)
356 if ((mask
& (MASK_ONE
<< 8)) != 0)
359 if ((mask
& (MASK_ONE
<< 9)) != 0)
362 if ((mask
& (MASK_ONE
<< 10)) != 0)
365 if ((mask
& (MASK_ONE
<< 11)) != 0)
368 if ((mask
& (MASK_ONE
<< 12)) != 0)
371 if ((mask
& (MASK_ONE
<< 13)) != 0)
374 if ((mask
& (MASK_ONE
<< 14)) != 0)
377 if ((mask
& (MASK_ONE
<< 15)) != 0)
380 if ((mask
& (MASK_ONE
<< 16)) != 0)
383 if ((mask
& (MASK_ONE
<< 17)) != 0)
386 if ((mask
& (MASK_ONE
<< 18)) != 0)
389 if ((mask
& (MASK_ONE
<< 19)) != 0)
392 if ((mask
& (MASK_ONE
<< 20)) != 0)
395 if ((mask
& (MASK_ONE
<< 21)) != 0)
398 if ((mask
& (MASK_ONE
<< 22)) != 0)
401 if ((mask
& (MASK_ONE
<< 23)) != 0)
404 if ((mask
& (MASK_ONE
<< 24)) != 0)
407 if ((mask
& (MASK_ONE
<< 25)) != 0)
410 if ((mask
& (MASK_ONE
<< 26)) != 0)
413 if ((mask
& (MASK_ONE
<< 27)) != 0)
416 if ((mask
& (MASK_ONE
<< 28)) != 0)
419 if ((mask
& (MASK_ONE
<< 29)) != 0)
422 if ((mask
& (MASK_ONE
<< 30)) != 0)
425 if ((mask
& (MASK_ONE
<< 31)) != 0)
428 if ((mask
& (MASK_ONE
<< 32)) != 0)
431 if ((mask
& (MASK_ONE
<< 33)) != 0)
434 if ((mask
& (MASK_ONE
<< 34)) != 0)
437 if ((mask
& (MASK_ONE
<< 35)) != 0)
440 if ((mask
& (MASK_ONE
<< 36)) != 0)
443 if ((mask
& (MASK_ONE
<< 37)) != 0)
446 if ((mask
& (MASK_ONE
<< 38)) != 0)
449 if ((mask
& (MASK_ONE
<< 39)) != 0)
453 while ((mask
= *div_mask
++) != 0)
455 value
= *div_values
++;
457 __asm__ (" #reg %0" : "+d" (value
));
459 if ((mask
& (MASK_ONE
<< 0)) != 0)
462 if ((mask
& (MASK_ONE
<< 1)) != 0)
465 if ((mask
& (MASK_ONE
<< 2)) != 0)
468 if ((mask
& (MASK_ONE
<< 3)) != 0)
471 if ((mask
& (MASK_ONE
<< 4)) != 0)
474 if ((mask
& (MASK_ONE
<< 5)) != 0)
477 if ((mask
& (MASK_ONE
<< 6)) != 0)
480 if ((mask
& (MASK_ONE
<< 7)) != 0)
483 if ((mask
& (MASK_ONE
<< 8)) != 0)
486 if ((mask
& (MASK_ONE
<< 9)) != 0)
489 if ((mask
& (MASK_ONE
<< 10)) != 0)
492 if ((mask
& (MASK_ONE
<< 11)) != 0)
495 if ((mask
& (MASK_ONE
<< 12)) != 0)
498 if ((mask
& (MASK_ONE
<< 13)) != 0)
501 if ((mask
& (MASK_ONE
<< 14)) != 0)
504 if ((mask
& (MASK_ONE
<< 15)) != 0)
507 if ((mask
& (MASK_ONE
<< 16)) != 0)
510 if ((mask
& (MASK_ONE
<< 17)) != 0)
513 if ((mask
& (MASK_ONE
<< 18)) != 0)
516 if ((mask
& (MASK_ONE
<< 19)) != 0)
519 if ((mask
& (MASK_ONE
<< 20)) != 0)
522 if ((mask
& (MASK_ONE
<< 21)) != 0)
525 if ((mask
& (MASK_ONE
<< 22)) != 0)
528 if ((mask
& (MASK_ONE
<< 23)) != 0)
531 if ((mask
& (MASK_ONE
<< 24)) != 0)
534 if ((mask
& (MASK_ONE
<< 25)) != 0)
537 if ((mask
& (MASK_ONE
<< 26)) != 0)
540 if ((mask
& (MASK_ONE
<< 27)) != 0)
543 if ((mask
& (MASK_ONE
<< 28)) != 0)
546 if ((mask
& (MASK_ONE
<< 29)) != 0)
549 if ((mask
& (MASK_ONE
<< 30)) != 0)
552 if ((mask
& (MASK_ONE
<< 31)) != 0)
555 if ((mask
& (MASK_ONE
<< 32)) != 0)
558 if ((mask
& (MASK_ONE
<< 33)) != 0)
561 if ((mask
& (MASK_ONE
<< 34)) != 0)
564 if ((mask
& (MASK_ONE
<< 35)) != 0)
567 if ((mask
& (MASK_ONE
<< 36)) != 0)
570 if ((mask
& (MASK_ONE
<< 37)) != 0)
573 if ((mask
& (MASK_ONE
<< 38)) != 0)
576 if ((mask
& (MASK_ONE
<< 39)) != 0)
580 while ((mask
= *eq0_mask
++) != 0)
584 if ((mask
& (MASK_ONE
<< 0)) != 0)
585 eq0
|= (value00
== ZERO
);
587 if ((mask
& (MASK_ONE
<< 1)) != 0)
588 eq0
|= (value01
== ZERO
);
590 if ((mask
& (MASK_ONE
<< 2)) != 0)
591 eq0
|= (value02
== ZERO
);
593 if ((mask
& (MASK_ONE
<< 3)) != 0)
594 eq0
|= (value03
== ZERO
);
596 if ((mask
& (MASK_ONE
<< 4)) != 0)
597 eq0
|= (value04
== ZERO
);
599 if ((mask
& (MASK_ONE
<< 5)) != 0)
600 eq0
|= (value05
== ZERO
);
602 if ((mask
& (MASK_ONE
<< 6)) != 0)
603 eq0
|= (value06
== ZERO
);
605 if ((mask
& (MASK_ONE
<< 7)) != 0)
606 eq0
|= (value07
== ZERO
);
608 if ((mask
& (MASK_ONE
<< 8)) != 0)
609 eq0
|= (value08
== ZERO
);
611 if ((mask
& (MASK_ONE
<< 9)) != 0)
612 eq0
|= (value09
== ZERO
);
614 if ((mask
& (MASK_ONE
<< 10)) != 0)
615 eq0
|= (value10
== ZERO
);
617 if ((mask
& (MASK_ONE
<< 11)) != 0)
618 eq0
|= (value11
== ZERO
);
620 if ((mask
& (MASK_ONE
<< 12)) != 0)
621 eq0
|= (value12
== ZERO
);
623 if ((mask
& (MASK_ONE
<< 13)) != 0)
624 eq0
|= (value13
== ZERO
);
626 if ((mask
& (MASK_ONE
<< 14)) != 0)
627 eq0
|= (value14
== ZERO
);
629 if ((mask
& (MASK_ONE
<< 15)) != 0)
630 eq0
|= (value15
== ZERO
);
632 if ((mask
& (MASK_ONE
<< 16)) != 0)
633 eq0
|= (value16
== ZERO
);
635 if ((mask
& (MASK_ONE
<< 17)) != 0)
636 eq0
|= (value17
== ZERO
);
638 if ((mask
& (MASK_ONE
<< 18)) != 0)
639 eq0
|= (value18
== ZERO
);
641 if ((mask
& (MASK_ONE
<< 19)) != 0)
642 eq0
|= (value19
== ZERO
);
644 if ((mask
& (MASK_ONE
<< 20)) != 0)
645 eq0
|= (value20
== ZERO
);
647 if ((mask
& (MASK_ONE
<< 21)) != 0)
648 eq0
|= (value21
== ZERO
);
650 if ((mask
& (MASK_ONE
<< 22)) != 0)
651 eq0
|= (value22
== ZERO
);
653 if ((mask
& (MASK_ONE
<< 23)) != 0)
654 eq0
|= (value23
== ZERO
);
656 if ((mask
& (MASK_ONE
<< 24)) != 0)
657 eq0
|= (value24
== ZERO
);
659 if ((mask
& (MASK_ONE
<< 25)) != 0)
660 eq0
|= (value25
== ZERO
);
662 if ((mask
& (MASK_ONE
<< 26)) != 0)
663 eq0
|= (value26
== ZERO
);
665 if ((mask
& (MASK_ONE
<< 27)) != 0)
666 eq0
|= (value27
== ZERO
);
668 if ((mask
& (MASK_ONE
<< 28)) != 0)
669 eq0
|= (value28
== ZERO
);
671 if ((mask
& (MASK_ONE
<< 29)) != 0)
672 eq0
|= (value29
== ZERO
);
674 if ((mask
& (MASK_ONE
<< 30)) != 0)
675 eq0
|= (value30
== ZERO
);
677 if ((mask
& (MASK_ONE
<< 31)) != 0)
678 eq0
|= (value31
== ZERO
);
680 if ((mask
& (MASK_ONE
<< 32)) != 0)
681 eq0
|= (value32
== ZERO
);
683 if ((mask
& (MASK_ONE
<< 33)) != 0)
684 eq0
|= (value33
== ZERO
);
686 if ((mask
& (MASK_ONE
<< 34)) != 0)
687 eq0
|= (value34
== ZERO
);
689 if ((mask
& (MASK_ONE
<< 35)) != 0)
690 eq0
|= (value35
== ZERO
);
692 if ((mask
& (MASK_ONE
<< 36)) != 0)
693 eq0
|= (value36
== ZERO
);
695 if ((mask
& (MASK_ONE
<< 37)) != 0)
696 eq0
|= (value37
== ZERO
);
698 if ((mask
& (MASK_ONE
<< 38)) != 0)
699 eq0
|= (value38
== ZERO
);
701 if ((mask
& (MASK_ONE
<< 39)) != 0)
702 eq0
|= (value39
== ZERO
);
707 return ( value00
+ value01
+ value02
+ value03
+ value04
708 + value05
+ value06
+ value07
+ value08
+ value09
709 + value10
+ value11
+ value12
+ value13
+ value14
710 + value15
+ value16
+ value17
+ value18
+ value19
711 + value20
+ value21
+ value22
+ value23
+ value24
712 + value25
+ value26
+ value27
+ value28
+ value29
713 + value30
+ value31
+ value32
+ value33
+ value34
714 + value35
+ value36
+ value37
+ value38
+ value39
);
717 /* { dg-final { scan-assembler "fadd" } } */
718 /* { dg-final { scan-assembler "fsub" } } */
719 /* { dg-final { scan-assembler "fmul" } } */
720 /* { dg-final { scan-assembler "fdiv" } } */
721 /* { dg-final { scan-assembler "fcmpu" } } */
722 /* { dg-final { scan-assembler "xsadddp" } } */
723 /* { dg-final { scan-assembler "xssubdp" } } */
724 /* { dg-final { scan-assembler "xsmuldp" } } */
725 /* { dg-final { scan-assembler "xsdivdp" } } */
726 /* { dg-final { scan-assembler "xscmpudp" } } */