1 /* Verify that overloaded built-ins for vec_st* with int
2 inputs produce the right code. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2" } */
9 // void vec_st (vector signed int, int, vector signed int *);
12 testst_1 (vector
signed int vsi1
, int i1
, vector
signed int * vsip
)
14 return vec_st(vsi1
, i1
, vsip
);
17 testst_2 (vector
signed int vsi1
, int i1
, signed int * sip
)
19 return vec_st(vsi1
, i1
, sip
);
22 testst_3 (vector
unsigned int vui1
, int i1
, vector
unsigned int * vsip
)
24 return vec_st(vui1
, i1
, vsip
);
27 testst_4 (vector
unsigned int vui1
, int i1
, unsigned int * sip
)
29 return vec_st(vui1
, i1
, sip
);
32 testst_5 (vector
bool int vbi1
, int i1
, vector
bool int * vbip
)
34 return vec_st(vbi1
, i1
, vbip
);
37 testst_6 (vector
bool int vbi1
, int i1
, unsigned int * vuip
)
39 return vec_st(vbi1
, i1
, vuip
);
42 testst_7 (vector
bool int vbi1
, int i1
, signed int * vsip
)
44 return vec_st(vbi1
, i1
, vsip
);
48 testst_cst1 (vector
signed int vsi1
, int i1
, vector
signed int * vsip
)
50 return vec_st(vsi1
, 12, vsip
);
53 testst_cst2 (vector
signed int vsi1
, int i1
, signed int * sip
)
55 return vec_st(vsi1
, 16, sip
);
58 testst_cst3 (vector
unsigned int vui1
, int i1
, vector
unsigned int * vsip
)
60 return vec_st(vui1
, 20, vsip
);
63 testst_cst4 (vector
unsigned int vui1
, int i1
, unsigned int * sip
)
65 return vec_st(vui1
, 24, sip
);
68 testst_cst5 (vector
bool int vbi1
, int i1
, vector
bool int * vbip
)
70 return vec_st(vbi1
, 28, vbip
);
73 testst_cst6 (vector
bool int vbi1
, int i1
, unsigned int * vuip
)
75 return vec_st(vbi1
, 32, vuip
);
78 testst_cst7 (vector
bool int vbi1
, int i1
, signed int * vsip
)
80 return vec_st(vbi1
, 36, vsip
);
83 /* { dg-final { scan-assembler-times {\mstvx\M} 14 } } */