1 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
2 /* { dg-require-effective-target powerpc_p9vector_ok } */
3 /* { dg-options "-mpower9-vector -O2 -mabi=ieeelongdouble -Wno-psabi" } */
5 /* Insure that the ISA 3.0 IEEE 128-bit floating point built-in functions can
6 be used with long double when the default is IEEE 128-bit. */
9 #define TYPE long double
13 get_double_exponent (double a
)
15 return __builtin_vec_scalar_extract_exp (a
);
19 get_float128_exponent (TYPE a
)
21 return __builtin_vec_scalar_extract_exp (a
);
25 get_double_mantissa (double a
)
27 return __builtin_vec_scalar_extract_sig (a
);
31 get_float128_mantissa (TYPE a
)
33 return __builtin_vec_scalar_extract_sig (a
);
37 set_double_exponent_ulong (unsigned long a
, unsigned long e
)
39 return __builtin_vec_scalar_insert_exp (a
, e
);
43 set_float128_exponent_uint128 (__uint128_t a
, unsigned long e
)
45 return __builtin_vec_scalar_insert_exp (a
, e
);
49 set_double_exponent_double (double a
, unsigned long e
)
51 return __builtin_vec_scalar_insert_exp (a
, e
);
55 set_float128_exponent_float128 (TYPE a
, __uint128_t e
)
57 return __builtin_vec_scalar_insert_exp (a
, e
);
63 return __builtin_sqrtf128_round_to_odd (a
);
69 return __builtin_truncf128_round_to_odd (a
);
73 add_odd (TYPE a
, TYPE b
)
75 return __builtin_addf128_round_to_odd (a
, b
);
79 sub_odd (TYPE a
, TYPE b
)
81 return __builtin_subf128_round_to_odd (a
, b
);
85 mul_odd (TYPE a
, TYPE b
)
87 return __builtin_mulf128_round_to_odd (a
, b
);
91 div_odd (TYPE a
, TYPE b
)
93 return __builtin_divf128_round_to_odd (a
, b
);
97 fma_odd (TYPE a
, TYPE b
, TYPE c
)
99 return __builtin_fmaf128_round_to_odd (a
, b
, c
);
103 fms_odd (TYPE a
, TYPE b
, TYPE c
)
105 return __builtin_fmaf128_round_to_odd (a
, b
, -c
);
109 nfma_odd (TYPE a
, TYPE b
, TYPE c
)
111 return -__builtin_fmaf128_round_to_odd (a
, b
, c
);
115 nfms_odd (TYPE a
, TYPE b
, TYPE c
)
117 return -__builtin_fmaf128_round_to_odd (a
, b
, -c
);
120 /* { dg-final { scan-assembler {\mxsiexpdp\M} } } */
121 /* { dg-final { scan-assembler {\mxsiexpqp\M} } } */
122 /* { dg-final { scan-assembler {\mxsxexpdp\M} } } */
123 /* { dg-final { scan-assembler {\mxsxexpqp\M} } } */
124 /* { dg-final { scan-assembler {\mxsxsigdp\M} } } */
125 /* { dg-final { scan-assembler {\mxsxsigqp\M} } } */
126 /* { dg-final { scan-assembler {\mxsaddqpo\M} } } */
127 /* { dg-final { scan-assembler {\mxsdivqpo\M} } } */
128 /* { dg-final { scan-assembler {\mxsmaddqpo\M} } } */
129 /* { dg-final { scan-assembler {\mxsmsubqpo\M} } } */
130 /* { dg-final { scan-assembler {\mxsmulqpo\M} } } */
131 /* { dg-final { scan-assembler {\mxsnmaddqpo\M} } } */
132 /* { dg-final { scan-assembler {\mxsnmsubqpo\M} } } */
133 /* { dg-final { scan-assembler {\mxssqrtqpo\M} } } */
134 /* { dg-final { scan-assembler {\mxssubqpo\M} } } */
135 /* { dg-final { scan-assembler-not {\mbl\M} } } */