1 /* { dg-do compile { target powerpc*-*-* } } */
2 /* { dg-require-effective-target powerpc_vsx_ok } */
3 /* { dg-options "-mvsx" } */
8 test_shift_left_double (vector
double x
, vector
double y
)
10 return vec_sld (x
, y
, /* shift_by */ 10);
14 test_nabs_float (vector
float x
)
20 test_nabs_double (vector
double x
)
26 test_sll_vbll_vbll_vuc (vector
bool long long x
,
27 vector
unsigned char y
)
29 return vec_sll (x
, y
);
33 test_sll_vbll_vbll_vull (vector
bool long long x
,
34 vector
unsigned long long y
)
36 return vec_sll (x
, y
);
40 test_sll_vbll_vbll_vus (vector
bool long long x
,
41 vector
unsigned short y
)
43 return vec_sll (x
, y
);
46 vector
signed long long
47 test_slo_vsll_slo_vsll_vsc (vector
signed long long x
, vector
signed char y
)
49 return vec_slo (x
, y
);
52 vector
signed long long
53 test_slo_vsll_slo_vsll_vuc (vector
signed long long x
, vector
unsigned char y
)
55 return vec_slo (x
, y
);
58 vector
unsigned long long
59 test_slo_vull_slo_vull_vsc (vector
unsigned long long x
, vector
signed char y
)
61 return vec_slo (x
, y
);
64 vector
unsigned long long
65 test_slo_vull_slo_vull_vuc (vector
unsigned long long x
,
66 vector
unsigned char y
)
68 return vec_slo (x
, y
);
72 test_vsc_sldw_vsc_vsc (vector
signed char x
, vector
signed char y
)
74 return vec_sldw (x
, y
, 1);
78 test_vuc_sldw_vuc_vuc (vector
unsigned char x
, vector
unsigned char y
)
80 return vec_sldw (x
, y
, 3);
83 vector
signed short int
84 test_vssi_sldw_vssi_vssi (vector
signed short int x
,
85 vector
signed short int y
)
87 return vec_sldw (x
, y
, 1);
90 vector
unsigned short int
91 test_vusi_sldw_vusi_vusi (vector
unsigned short int x
,
92 vector
unsigned short int y
)
94 return vec_sldw (x
, y
, 3);
98 test_vsi_sldw_vsi_vsi (vector
signed int x
, vector
signed int y
)
100 return vec_sldw (x
, y
, 1);
104 test_vui_sldw_vui_vui (vector
unsigned int x
, vector
unsigned int y
)
106 return vec_sldw (x
, y
, 3);
109 vector
signed long long
110 test_vsl_sldw_vsl_vsl (vector
signed long long x
, vector
signed long long y
)
112 return vec_sldw (x
, y
, 1);
115 vector
unsigned long long
116 test_vul_sldw_vul_vul (vector
unsigned long long x
,
117 vector
unsigned long long y
)
119 return vec_sldw (x
, y
, 3);
122 vector
signed int long long
123 test_sll_vsill_vsill_vuc (vector
signed long long int x
,
124 vector
unsigned char y
)
126 return vec_sll (x
, y
);
129 vector
unsigned int long long
130 test_sll_vuill_vuill_vuc (vector
unsigned long long int x
,
131 vector
unsigned char y
)
133 return vec_sll (x
, y
);
137 /* Expected test results:
139 test_shift_left_double 1 vsldoi
140 test_nabs_float 1 xvnabssp
141 test_nabs_double 1 xvnabsdp
142 test_sll_vbll_vbll_vuc 1 vsl
143 test_sll_vbll_vbll_vull 1 vsl
144 test_sll_vbll_vbll_vus 1 vsl
145 test_slo_vsll_slo_vsll_vsc 1 vslo
146 test_slo_vsll_slo_vsll_vuc 1 vslo
147 test_slo_vull_slo_vull_vsc 1 vslo
148 test_slo_vull_slo_vull_vuc 1 vslo
149 test_vsc_sldw_vsc_vsc 1 xxlor
150 test_vuc_sldw_vuc_vuc 1 xxlor
151 test_vssi_sldw_vssi_vssi 1 xxlor
152 test_vusi_sldw_vusi_vusi 1 xxlor
153 test_vsi_sldw_vsi_vsi 1 xxlor
154 test_vui_sldw_vui_vui 1 xxlor
155 test_vsl_sldw_vsl_vsl 1 xxlor
156 test_vul_sldw_vul_vul 1 xxlor
157 test_sll_vsill_vsill_vuc 1 vsl
158 test_sll_vuill_vuill_vuc 1 vsl */
160 /* { dg-final { scan-assembler-times "vsldoi" 1 } } */
161 /* { dg-final { scan-assembler-times "xvnabssp" 1 } } */
162 /* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */
163 /* { dg-final { scan-assembler-times "vslo" 4 } } */
164 /* { dg-final { scan-assembler-times "xxlor" 30 } } */
165 /* { dg-final { scan-assembler-times {\mvsl\M} 5 } } */