1 /* PR middle-end/38533 */
2 /* { dg-do compile } */
3 /* { dg-options "-O2 --param tree-reassoc-width=1 -fdump-tree-reassoc1" } */
5 #define A asm volatile ("" : "=r" (f) : "0" (0)); e |= f;
6 #define B A A A A A A A A A A A
7 #define C B B B B B B B B B B B
13 C C B B B B B A A A A A A
25 /* Verify that reassoc hasn't increased register pressure too much
26 by moving all bitwise ors after the last __asm__. There should
27 be exactly 2 (first) __asm__ stmts with no intervening stmts,
28 all others should have some bitwise or in between. */
29 /* { dg-final { scan-tree-dump-times "__asm__\[^;\n]*;\n *__asm__" 1 "reassoc1"} } */