Add execution + assembler tests of AArch64 TRN Intrinsics.
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / vect-ld1r-compile.c
blob761777f794c5ecb93b0f4f22eba8465396e2d44c
1 /* { dg-do compile } */
2 /* { dg-options "-O3 -fno-vect-cost-model" } */
4 #include "stdint.h"
5 #include "vect-ld1r.x"
7 DEF (int8_t)
8 DEF (int16_t)
9 DEF (int32_t)
10 DEF (int64_t)
12 /* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8b"} } */
13 /* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.16b"} } */
14 /* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4h"} } */
15 /* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8h"} } */
16 /* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */
17 /* { dg-final { scan-assembler "ldr\\t\x\[0-9\]+"} } */
18 /* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */