gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -dp" } */
   3
   4 #include <arm_neon.h>
   5
   6 /* Used to force a variable to a SIMD register.  */
   7 #define force_simd(V1)   asm volatile ("mov %d0, %1.d[0]"       \
   8            : "=w"(V1)                                           \
   9            : "w"(V1)                                            \
  10            : /* No clobbers */);
  11
  12 /* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */
  13
  14 uint64x1_t
  15 test_vaddd_u64 (uint64x1_t a, uint64x1_t b)
  16 {
  17   return vaddd_u64 (a, b);
  18 }
  19
  20 int64x1_t
  21 test_vaddd_s64 (int64x1_t a, int64x1_t b)
  22 {
  23   return vaddd_s64 (a, b);
  24 }
  25
  26 /* { dg-final { scan-assembler-times "\\tadd\\td\[0-9\]+" 1 } } */
  27
  28 int64x1_t
  29 test_vaddd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d)
  30 {
  31   return vqaddd_s64 (vaddd_s64 (vqaddd_s64 (a, b), vqaddd_s64 (c, d)),
  32                      vqaddd_s64 (a, d));
  33 }
  34
  35 /* { dg-final { scan-assembler-times "\\tabs\\td\[0-9\]+, d\[0-9\]+" 1 } } */
  36
  37 int64x1_t
  38 test_vabs_s64 (int64x1_t a)
  39 {
  40   uint64x1_t res;
  41   force_simd (a);
  42   res = vabs_s64 (a);
  43   force_simd (res);
  44   return res;
  45 }
  46
  47 /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
  48
  49 uint64x1_t
  50 test_vceqd_s64 (int64x1_t a, int64x1_t b)
  51 {
  52   uint64x1_t res;
  53   force_simd (a);
  54   force_simd (b);
  55   res = vceqd_s64 (a, b);
  56   force_simd (res);
  57   return res;
  58 }
  59
  60 /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
  61
  62 uint64x1_t
  63 test_vceqzd_s64 (int64x1_t a)
  64 {
  65   uint64x1_t res;
  66   force_simd (a);
  67   res = vceqzd_s64 (a);
  68   force_simd (res);
  69   return res;
  70 }
  71
  72 /* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
  73
  74 uint64x1_t
  75 test_vcged_s64 (int64x1_t a, int64x1_t b)
  76 {
  77   uint64x1_t res;
  78   force_simd (a);
  79   force_simd (b);
  80   res = vcged_s64 (a, b);
  81   force_simd (res);
  82   return res;
  83 }
  84
  85 uint64x1_t
  86 test_vcled_s64 (int64x1_t a, int64x1_t b)
  87 {
  88   uint64x1_t res;
  89   force_simd (a);
  90   force_simd (b);
  91   res = vcled_s64 (a, b);
  92   force_simd (res);
  93   return res;
  94 }
  95
  96 /* Idiom recognition will cause this testcase not to generate
  97    the expected cmge instruction, so do not check for it.  */
  98
  99 uint64x1_t
 100 test_vcgezd_s64 (int64x1_t a)
 101 {
 102   uint64x1_t res;
 103   force_simd (a);
 104   res = vcgezd_s64 (a);
 105   force_simd (res);
 106   return res;
 107 }
 108
 109 /* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
 110
 111 uint64x1_t
 112 test_vcged_u64 (uint64x1_t a, uint64x1_t b)
 113 {
 114   uint64x1_t res;
 115   force_simd (a);
 116   force_simd (b);
 117   res = vcged_u64 (a, b);
 118   force_simd (res);
 119   return res;
 120 }
 121
 122 /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
 123
 124 uint64x1_t
 125 test_vcgtd_s64 (int64x1_t a, int64x1_t b)
 126 {
 127   uint64x1_t res;
 128   force_simd (a);
 129   force_simd (b);
 130   res = vcgtd_s64 (a, b);
 131   force_simd (res);
 132   return res;
 133 }
 134
 135 uint64x1_t
 136 test_vcltd_s64 (int64x1_t a, int64x1_t b)
 137 {
 138   uint64x1_t res;
 139   force_simd (a);
 140   force_simd (b);
 141   res = vcltd_s64 (a, b);
 142   force_simd (res);
 143   return res;
 144 }
 145
 146 /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
 147
 148 uint64x1_t
 149 test_vcgtzd_s64 (int64x1_t a)
 150 {
 151   uint64x1_t res;
 152   force_simd (a);
 153   res = vcgtzd_s64 (a);
 154   force_simd (res);
 155   return res;
 156 }
 157
 158 /* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
 159
 160 uint64x1_t
 161 test_vcgtd_u64 (uint64x1_t a, uint64x1_t b)
 162 {
 163   uint64x1_t res;
 164   force_simd (a);
 165   force_simd (b);
 166   res = vcgtd_u64 (a, b);
 167   force_simd (res);
 168   return res;
 169 }
 170
 171 /* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
 172
 173 uint64x1_t
 174 test_vclezd_s64 (int64x1_t a)
 175 {
 176   uint64x1_t res;
 177   force_simd (a);
 178   res = vclezd_s64 (a);
 179   force_simd (res);
 180   return res;
 181 }
 182
 183 /* Idiom recognition will cause this testcase not to generate
 184    the expected cmlt instruction, so do not check for it.  */
 185
 186 uint64x1_t
 187 test_vcltzd_s64 (int64x1_t a)
 188 {
 189   uint64x1_t res;
 190   force_simd (a);
 191   res = vcltzd_s64 (a);
 192   force_simd (res);
 193   return res;
 194 }
 195
 196 /* { dg-final { scan-assembler-times "aarch64_get_lanev16qi" 2 } } */
 197
 198 int8x1_t
 199 test_vdupb_lane_s8 (int8x16_t a)
 200 {
 201   int8x1_t res;
 202   force_simd (a);
 203   res = vdupb_laneq_s8 (a, 2);
 204   force_simd (res);
 205   return res;
 206 }
 207
 208 uint8x1_t
 209 test_vdupb_lane_u8 (uint8x16_t a)
 210 {
 211   uint8x1_t res;
 212   force_simd (a);
 213   res = vdupb_laneq_u8 (a, 2);
 214   force_simd (res);
 215   return res;
 216 }
 217
 218 /* { dg-final { scan-assembler-times "aarch64_get_lanev8hi" 2 } } */
 219
 220 int16x1_t
 221 test_vduph_lane_s16 (int16x8_t a)
 222 {
 223   int16x1_t res;
 224   force_simd (a);
 225   res = vduph_laneq_s16 (a, 2);
 226   force_simd (res);
 227   return res;
 228 }
 229
 230 uint16x1_t
 231 test_vduph_lane_u16 (uint16x8_t a)
 232 {
 233   uint16x1_t res;
 234   force_simd (a);
 235   res = vduph_laneq_u16 (a, 2);
 236   force_simd (res);
 237   return res;
 238 }
 239
 240 /* { dg-final { scan-assembler-times "aarch64_get_lanev4si" 2 } } */
 241
 242 int32x1_t
 243 test_vdups_lane_s32 (int32x4_t a)
 244 {
 245   int32x1_t res;
 246   force_simd (a);
 247   res = vdups_laneq_s32 (a, 2);
 248   force_simd (res);
 249   return res;
 250 }
 251
 252 uint32x1_t
 253 test_vdups_lane_u32 (uint32x4_t a)
 254 {
 255   uint32x1_t res;
 256   force_simd (a);
 257   res = vdups_laneq_u32 (a, 2);
 258   force_simd (res);
 259   return res;
 260 }
 261
 262 /* { dg-final { scan-assembler-times "aarch64_get_lanev2di" 2 } } */
 263
 264 int64x1_t
 265 test_vdupd_lane_s64 (int64x2_t a)
 266 {
 267   int64x1_t res;
 268   force_simd (a);
 269   res = vdupd_laneq_s64 (a, 1);
 270   force_simd (res);
 271   return res;
 272 }
 273
 274 uint64x1_t
 275 test_vdupd_lane_u64 (uint64x2_t a)
 276 {
 277   uint64x1_t res;
 278   force_simd (a);
 279   res = vdupd_laneq_u64 (a, 1);
 280   force_simd (res);
 281   return res;
 282 }
 283
 284 /* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
 285
 286 int64x1_t
 287 test_vtst_s64 (int64x1_t a, int64x1_t b)
 288 {
 289   uint64x1_t res;
 290   force_simd (a);
 291   force_simd (b);
 292   res = vtstd_s64 (a, b);
 293   force_simd (res);
 294   return res;
 295 }
 296
 297 uint64x1_t
 298 test_vtst_u64 (uint64x1_t a, uint64x1_t b)
 299 {
 300   uint64x1_t res;
 301   force_simd (a);
 302   force_simd (b);
 303   res = vtstd_s64 (a, b);
 304   force_simd (res);
 305   return res;
 306 }
 307
 308 /* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */
 309
 310 test_vpaddd_s64 (int64x2_t a)
 311 {
 312   return vpaddd_s64 (a);
 313 }
 314
 315 /* { dg-final { scan-assembler-times "\\tuqadd\\td\[0-9\]+" 1 } } */
 316
 317 uint64x1_t
 318 test_vqaddd_u64 (uint64x1_t a, uint64x1_t b)
 319 {
 320   return vqaddd_u64 (a, b);
 321 }
 322
 323 /* { dg-final { scan-assembler-times "\\tuqadd\\ts\[0-9\]+" 1 } } */
 324
 325 uint32x1_t
 326 test_vqadds_u32 (uint32x1_t a, uint32x1_t b)
 327 {
 328   return vqadds_u32 (a, b);
 329 }
 330
 331 /* { dg-final { scan-assembler-times "\\tuqadd\\th\[0-9\]+" 1 } } */
 332
 333 uint16x1_t
 334 test_vqaddh_u16 (uint16x1_t a, uint16x1_t b)
 335 {
 336   return vqaddh_u16 (a, b);
 337 }
 338
 339 /* { dg-final { scan-assembler-times "\\tuqadd\\tb\[0-9\]+" 1 } } */
 340
 341 uint8x1_t
 342 test_vqaddb_u8 (uint8x1_t a, uint8x1_t b)
 343 {
 344   return vqaddb_u8 (a, b);
 345 }
 346
 347 /* { dg-final { scan-assembler-times "\\tsqadd\\td\[0-9\]+" 5 } } */
 348
 349 int64x1_t
 350 test_vqaddd_s64 (int64x1_t a, int64x1_t b)
 351 {
 352   return vqaddd_s64 (a, b);
 353 }
 354
 355 /* { dg-final { scan-assembler-times "\\tsqadd\\ts\[0-9\]+, s\[0-9\]+" 1 } } */
 356
 357 int32x1_t
 358 test_vqadds_s32 (int32x1_t a, int32x1_t b)
 359 {
 360   return vqadds_s32 (a, b);
 361 }
 362
 363 /* { dg-final { scan-assembler-times "\\tsqadd\\th\[0-9\]+, h\[0-9\]+" 1 } } */
 364
 365 int16x1_t
 366 test_vqaddh_s16 (int16x1_t a, int16x1_t b)
 367 {
 368   return vqaddh_s16 (a, b);
 369 }
 370
 371 /* { dg-final { scan-assembler-times "\\tsqadd\\tb\[0-9\]+, b\[0-9\]+" 1 } } */
 372
 373 int8x1_t
 374 test_vqaddb_s8 (int8x1_t a, int8x1_t b)
 375 {
 376   return vqaddb_s8 (a, b);
 377 }
 378
 379 /* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 380
 381 int32x1_t
 382 test_vqdmlalh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
 383 {
 384   return vqdmlalh_s16 (a, b, c);
 385 }
 386
 387 /* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 388
 389 int32x1_t
 390 test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c)
 391 {
 392   return vqdmlalh_lane_s16 (a, b, c, 3);
 393 }
 394
 395 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 396
 397 int64x1_t
 398 test_vqdmlals_s32 (int64x1_t a, int32x1_t b, int32x1_t c)
 399 {
 400   return vqdmlals_s32 (a, b, c);
 401 }
 402
 403 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 404
 405 int64x1_t
 406 test_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c)
 407 {
 408   return vqdmlals_lane_s32 (a, b, c, 1);
 409 }
 410
 411 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 412
 413 int32x1_t
 414 test_vqdmlslh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
 415 {
 416   return vqdmlslh_s16 (a, b, c);
 417 }
 418
 419 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 420
 421 int32x1_t
 422 test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c)
 423 {
 424   return vqdmlslh_lane_s16 (a, b, c, 3);
 425 }
 426
 427 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 428
 429 int64x1_t
 430 test_vqdmlsls_s32 (int64x1_t a, int32x1_t b, int32x1_t c)
 431 {
 432   return vqdmlsls_s32 (a, b, c);
 433 }
 434
 435 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 436
 437 int64x1_t
 438 test_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c)
 439 {
 440   return vqdmlsls_lane_s32 (a, b, c, 1);
 441 }
 442
 443 /* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 444
 445 int16x1_t
 446 test_vqdmulhh_s16 (int16x1_t a, int16x1_t b)
 447 {
 448   return vqdmulhh_s16 (a, b);
 449 }
 450
 451 /* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
 452
 453 int16x1_t
 454 test_vqdmulhh_lane_s16 (int16x1_t a, int16x8_t b)
 455 {
 456   return vqdmulhh_lane_s16 (a, b, 3);
 457 }
 458
 459 /* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 460
 461 int32x1_t
 462 test_vqdmulhs_s32 (int32x1_t a, int32x1_t b)
 463 {
 464   return vqdmulhs_s32 (a, b);
 465 }
 466
 467 /* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
 468
 469 int32x1_t
 470 test_vqdmulhs_lane_s32 (int32x1_t a, int32x4_t b)
 471 {
 472   return vqdmulhs_lane_s32 (a, b, 3);
 473 }
 474
 475 /* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 476
 477 int32x1_t
 478 test_vqdmullh_s16 (int16x1_t a, int16x1_t b)
 479 {
 480   return vqdmullh_s16 (a, b);
 481 }
 482
 483 /* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 484
 485 int32x1_t
 486 test_vqdmullh_lane_s16 (int16x1_t a, int16x8_t b)
 487 {
 488   return vqdmullh_lane_s16 (a, b, 3);
 489 }
 490
 491 /* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 492
 493 int64x1_t
 494 test_vqdmulls_s32 (int32x1_t a, int32x1_t b)
 495 {
 496   return vqdmulls_s32 (a, b);
 497 }
 498
 499 /* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 500
 501 int64x1_t
 502 test_vqdmulls_lane_s32 (int32x1_t a, int32x4_t b)
 503 {
 504   return vqdmulls_lane_s32 (a, b, 1);
 505 }
 506
 507 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 508
 509 int16x1_t
 510 test_vqrdmulhh_s16 (int16x1_t a, int16x1_t b)
 511 {
 512   return vqrdmulhh_s16 (a, b);
 513 }
 514
 515 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
 516
 517 int16x1_t
 518 test_vqrdmulhh_lane_s16 (int16x1_t a, int16x8_t b)
 519 {
 520   return vqrdmulhh_lane_s16 (a, b, 6);
 521 }
 522
 523 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 524
 525 int32x1_t
 526 test_vqrdmulhs_s32 (int32x1_t a, int32x1_t b)
 527 {
 528   return vqrdmulhs_s32 (a, b);
 529 }
 530
 531 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
 532
 533 int32x1_t
 534 test_vqrdmulhs_lane_s32 (int32x1_t a, int32x4_t b)
 535 {
 536   return vqrdmulhs_lane_s32 (a, b, 2);
 537 }
 538
 539 /* { dg-final { scan-assembler-times "\\tsuqadd\\tb\[0-9\]+" 1 } } */
 540
 541 int8x1_t
 542 test_vuqaddb_s8 (int8x1_t a, int8x1_t b)
 543 {
 544   return vuqaddb_s8 (a, b);
 545 }
 546
 547 /* { dg-final { scan-assembler-times "\\tsuqadd\\th\[0-9\]+" 1 } } */
 548
 549 int16x1_t
 550 test_vuqaddh_s16 (int16x1_t a, int8x1_t b)
 551 {
 552   return vuqaddh_s16 (a, b);
 553 }
 554
 555 /* { dg-final { scan-assembler-times "\\tsuqadd\\ts\[0-9\]+" 1 } } */
 556
 557 int32x1_t
 558 test_vuqadds_s32 (int32x1_t a, int8x1_t b)
 559 {
 560   return vuqadds_s32 (a, b);
 561 }
 562
 563 /* { dg-final { scan-assembler-times "\\tsuqadd\\td\[0-9\]+" 1 } } */
 564
 565 int64x1_t
 566 test_vuqaddd_s64 (int64x1_t a, int8x1_t b)
 567 {
 568   return vuqaddd_s64 (a, b);
 569 }
 570
 571 /* { dg-final { scan-assembler-times "\\tusqadd\\tb\[0-9\]+" 1 } } */
 572
 573 uint8x1_t
 574 test_vsqaddb_u8 (uint8x1_t a, int8x1_t b)
 575 {
 576   return vsqaddb_u8 (a, b);
 577 }
 578
 579 /* { dg-final { scan-assembler-times "\\tusqadd\\th\[0-9\]+" 1 } } */
 580
 581 uint16x1_t
 582 test_vsqaddh_u16 (uint16x1_t a, int8x1_t b)
 583 {
 584   return vsqaddh_u16 (a, b);
 585 }
 586
 587 /* { dg-final { scan-assembler-times "\\tusqadd\\ts\[0-9\]+" 1 } } */
 588
 589 uint32x1_t
 590 test_vsqadds_u32 (uint32x1_t a, int8x1_t b)
 591 {
 592   return vsqadds_u32 (a, b);
 593 }
 594
 595 /* { dg-final { scan-assembler-times "\\tusqadd\\td\[0-9\]+" 1 } } */
 596
 597 uint64x1_t
 598 test_vsqaddd_u64 (uint64x1_t a, int8x1_t b)
 599 {
 600   return vsqaddd_u64 (a, b);
 601 }
 602
 603 /* { dg-final { scan-assembler-times "\\tsqabs\\tb\[0-9\]+" 1 } } */
 604
 605 int8x1_t
 606 test_vqabsb_s8 (int8x1_t a)
 607 {
 608   return vqabsb_s8 (a);
 609 }
 610
 611 /* { dg-final { scan-assembler-times "\\tsqabs\\th\[0-9\]+" 1 } } */
 612
 613 int16x1_t
 614 test_vqabsh_s16 (int16x1_t a)
 615 {
 616   return vqabsh_s16 (a);
 617 }
 618
 619 /* { dg-final { scan-assembler-times "\\tsqabs\\ts\[0-9\]+" 1 } } */
 620
 621 int32x1_t
 622 test_vqabss_s32 (int32x1_t a)
 623 {
 624   return vqabss_s32 (a);
 625 }
 626
 627 /* { dg-final { scan-assembler-times "\\tsqneg\\tb\[0-9\]+" 1 } } */
 628
 629 int8x1_t
 630 test_vqnegb_s8 (int8x1_t a)
 631 {
 632   return vqnegb_s8 (a);
 633 }
 634
 635 /* { dg-final { scan-assembler-times "\\tsqneg\\th\[0-9\]+" 1 } } */
 636
 637 int16x1_t
 638 test_vqnegh_s16 (int16x1_t a)
 639 {
 640   return vqnegh_s16 (a);
 641 }
 642
 643 /* { dg-final { scan-assembler-times "\\tsqneg\\ts\[0-9\]+" 1 } } */
 644
 645 int32x1_t
 646 test_vqnegs_s32 (int32x1_t a)
 647 {
 648   return vqnegs_s32 (a);
 649 }
 650
 651 /* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */
 652
 653 int8x1_t
 654 test_vqmovunh_s16 (int16x1_t a)
 655 {
 656   return vqmovunh_s16 (a);
 657 }
 658
 659 /* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */
 660
 661 int16x1_t
 662 test_vqmovuns_s32 (int32x1_t a)
 663 {
 664   return vqmovuns_s32 (a);
 665 }
 666
 667 /* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */
 668
 669 int32x1_t
 670 test_vqmovund_s64 (int64x1_t a)
 671 {
 672   return vqmovund_s64 (a);
 673 }
 674
 675 /* { dg-final { scan-assembler-times "\\tsqxtn\\tb\[0-9\]+" 1 } } */
 676
 677 int8x1_t
 678 test_vqmovnh_s16 (int16x1_t a)
 679 {
 680   return vqmovnh_s16 (a);
 681 }
 682
 683 /* { dg-final { scan-assembler-times "\\tsqxtn\\th\[0-9\]+" 1 } } */
 684
 685 int16x1_t
 686 test_vqmovns_s32 (int32x1_t a)
 687 {
 688   return vqmovns_s32 (a);
 689 }
 690
 691 /* { dg-final { scan-assembler-times "\\tsqxtn\\ts\[0-9\]+" 1 } } */
 692
 693 int32x1_t
 694 test_vqmovnd_s64 (int64x1_t a)
 695 {
 696   return vqmovnd_s64 (a);
 697 }
 698
 699 /* { dg-final { scan-assembler-times "\\tuqxtn\\tb\[0-9\]+" 1 } } */
 700
 701 uint8x1_t
 702 test_vqmovnh_u16 (uint16x1_t a)
 703 {
 704   return vqmovnh_u16 (a);
 705 }
 706
 707 /* { dg-final { scan-assembler-times "\\tuqxtn\\th\[0-9\]+" 1 } } */
 708
 709 uint16x1_t
 710 test_vqmovns_u32 (uint32x1_t a)
 711 {
 712   return vqmovns_u32 (a);
 713 }
 714
 715 /* { dg-final { scan-assembler-times "\\tuqxtn\\ts\[0-9\]+" 1 } } */
 716
 717 uint32x1_t
 718 test_vqmovnd_u64 (uint64x1_t a)
 719 {
 720   return vqmovnd_u64 (a);
 721 }
 722
 723 /* { dg-final { scan-assembler-times "\\tsub\\tx\[0-9\]+" 2 } } */
 724
 725 uint64x1_t
 726 test_vsubd_u64 (uint64x1_t a, uint64x1_t b)
 727 {
 728   return vsubd_u64 (a, b);
 729 }
 730
 731 int64x1_t
 732 test_vsubd_s64 (int64x1_t a, int64x1_t b)
 733 {
 734   return vsubd_s64 (a, b);
 735 }
 736
 737 /* { dg-final { scan-assembler-times "\\tsub\\td\[0-9\]+" 1 } } */
 738
 739 int64x1_t
 740 test_vsubd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d)
 741 {
 742   return vqsubd_s64 (vsubd_s64 (vqsubd_s64 (a, b), vqsubd_s64 (c, d)),
 743                      vqsubd_s64 (a, d));
 744 }
 745
 746 /* { dg-final { scan-assembler-times "\\tuqsub\\td\[0-9\]+" 1 } } */
 747
 748 uint64x1_t
 749 test_vqsubd_u64 (uint64x1_t a, uint64x1_t b)
 750 {
 751   return vqsubd_u64 (a, b);
 752 }
 753
 754 /* { dg-final { scan-assembler-times "\\tuqsub\\ts\[0-9\]+" 1 } } */
 755
 756 uint32x1_t
 757 test_vqsubs_u32 (uint32x1_t a, uint32x1_t b)
 758 {
 759   return vqsubs_u32 (a, b);
 760 }
 761
 762 /* { dg-final { scan-assembler-times "\\tuqsub\\th\[0-9\]+" 1 } } */
 763
 764 uint16x1_t
 765 test_vqsubh_u16 (uint16x1_t a, uint16x1_t b)
 766 {
 767   return vqsubh_u16 (a, b);
 768 }
 769
 770 /* { dg-final { scan-assembler-times "\\tuqsub\\tb\[0-9\]+" 1 } } */
 771
 772 uint8x1_t
 773 test_vqsubb_u8 (uint8x1_t a, uint8x1_t b)
 774 {
 775   return vqsubb_u8 (a, b);
 776 }
 777
 778 /* { dg-final { scan-assembler-times "\\tsqsub\\td\[0-9\]+" 5 } } */
 779
 780 int64x1_t
 781 test_vqsubd_s64 (int64x1_t a, int64x1_t b)
 782 {
 783   return vqsubd_s64 (a, b);
 784 }
 785
 786 /* { dg-final { scan-assembler-times "\\tsqsub\\ts\[0-9\]+" 1 } } */
 787
 788 int32x1_t
 789 test_vqsubs_s32 (int32x1_t a, int32x1_t b)
 790 {
 791   return vqsubs_s32 (a, b);
 792 }
 793
 794 /* { dg-final { scan-assembler-times "\\tsqsub\\th\[0-9\]+" 1 } } */
 795
 796 int16x1_t
 797 test_vqsubh_s16 (int16x1_t a, int16x1_t b)
 798 {
 799   return vqsubh_s16 (a, b);
 800 }
 801
 802 /* { dg-final { scan-assembler-times "\\tsqsub\\tb\[0-9\]+" 1 } } */
 803
 804 int8x1_t
 805 test_vqsubb_s8 (int8x1_t a, int8x1_t b)
 806 {
 807   return vqsubb_s8 (a, b);
 808 }
 809
 810 /* { dg-final { scan-assembler-times "\\tsshl\\td\[0-9\]+" 1 } } */
 811
 812 int64x1_t
 813 test_vshld_s64 (int64x1_t a, int64x1_t b)
 814 {
 815   return vshld_s64 (a, b);
 816 }
 817
 818 /* { dg-final { scan-assembler-times "\\tushl\\td\[0-9\]+" 1 } } */
 819
 820 uint64x1_t
 821 test_vshld_u64 (uint64x1_t a, uint64x1_t b)
 822 {
 823   return vshld_u64 (a, b);
 824 }
 825
 826 /* { dg-final { scan-assembler-times "\\tsrshl\\td\[0-9\]+" 1 } } */
 827
 828 int64x1_t
 829 test_vrshld_s64 (int64x1_t a, int64x1_t b)
 830 {
 831   return vrshld_s64 (a, b);
 832 }
 833
 834 /* { dg-final { scan-assembler-times "\\turshl\\td\[0-9\]+" 1 } } */
 835
 836 uint64x1_t
 837 test_vrshld_u64 (uint64x1_t a, uint64x1_t b)
 838 {
 839   return vrshld_u64 (a, b);
 840 }
 841
 842 /* Other intrinsics can generate an asr instruction (vcltzd, vcgezd),
 843    so we cannot check scan-assembler-times.  */
 844
 845 /* { dg-final { scan-assembler "\\tasr\\tx\[0-9\]+" } } */
 846
 847 int64x1_t
 848 test_vshrd_n_s64 (int64x1_t a)
 849 {
 850   return vshrd_n_s64 (a, 5);
 851 }
 852
 853 /* { dg-final { scan-assembler-times "\\tlsr\\tx\[0-9\]+" 1 } } */
 854
 855 uint64x1_t
 856 test_vshrd_n_u64 (uint64x1_t a)
 857 {
 858   return vshrd_n_u64 (a, 3);
 859 }
 860
 861 /* { dg-final { scan-assembler-times "\\tssra\\td\[0-9\]+" 1 } } */
 862
 863 int64x1_t
 864 test_vsrad_n_s64 (int64x1_t a, int64x1_t b)
 865 {
 866   return vsrad_n_s64 (a, b, 2);
 867 }
 868
 869 /* { dg-final { scan-assembler-times "\\tusra\\td\[0-9\]+" 1 } } */
 870
 871 uint64x1_t
 872 test_vsrad_n_u64 (uint64x1_t a, uint64x1_t b)
 873 {
 874   return vsrad_n_u64 (a, b, 5);
 875 }
 876
 877 /* { dg-final { scan-assembler-times "\\tsrshr\\td\[0-9\]+" 1 } } */
 878
 879 int64x1_t
 880 test_vrshrd_n_s64 (int64x1_t a)
 881 {
 882   return vrshrd_n_s64 (a, 5);
 883 }
 884
 885 /* { dg-final { scan-assembler-times "\\turshr\\td\[0-9\]+" 1 } } */
 886
 887 uint64x1_t
 888 test_vrshrd_n_u64 (uint64x1_t a)
 889 {
 890   return vrshrd_n_u64 (a, 3);
 891 }
 892
 893 /* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
 894
 895 int64x1_t
 896 test_vrsrad_n_s64 (int64x1_t a, int64x1_t b)
 897 {
 898   return vrsrad_n_s64 (a, b, 3);
 899 }
 900
 901 /* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
 902
 903 uint64x1_t
 904 test_vrsrad_n_u64 (uint64x1_t a, uint64x1_t b)
 905 {
 906   return vrsrad_n_u64 (a, b, 4);
 907 }
 908
 909 /* { dg-final { scan-assembler-times "\\tsqrshl\\tb\[0-9\]+" 1 } } */
 910
 911 int8x1_t
 912 test_vqrshlb_s8 (int8x1_t a, int8x1_t b)
 913 {
 914   return vqrshlb_s8 (a, b);
 915 }
 916
 917 /* { dg-final { scan-assembler-times "\\tsqrshl\\th\[0-9\]+" 1 } } */
 918
 919 int16x1_t
 920 test_vqrshlh_s16 (int16x1_t a, int16x1_t b)
 921 {
 922   return vqrshlh_s16 (a, b);
 923 }
 924
 925 /* { dg-final { scan-assembler-times "\\tsqrshl\\ts\[0-9\]+" 1 } } */
 926
 927 int32x1_t
 928 test_vqrshls_s32 (int32x1_t a, int32x1_t b)
 929 {
 930   return vqrshls_s32 (a, b);
 931 }
 932
 933 /* { dg-final { scan-assembler-times "\\tsqrshl\\td\[0-9\]+" 1 } } */
 934
 935 int64x1_t
 936 test_vqrshld_s64 (int64x1_t a, int64x1_t b)
 937 {
 938   return vqrshld_s64 (a, b);
 939 }
 940
 941 /* { dg-final { scan-assembler-times "\\tuqrshl\\tb\[0-9\]+" 1 } } */
 942
 943 uint8x1_t
 944 test_vqrshlb_u8 (uint8x1_t a, uint8x1_t b)
 945 {
 946   return vqrshlb_u8 (a, b);
 947 }
 948
 949 /* { dg-final { scan-assembler-times "\\tuqrshl\\th\[0-9\]+" 1 } } */
 950
 951 uint16x1_t
 952 test_vqrshlh_u16 (uint16x1_t a, uint16x1_t b)
 953 {
 954   return vqrshlh_u16 (a, b);
 955 }
 956
 957 /* { dg-final { scan-assembler-times "\\tuqrshl\\ts\[0-9\]+" 1 } } */
 958
 959 uint32x1_t
 960 test_vqrshls_u32 (uint32x1_t a, uint32x1_t b)
 961 {
 962   return vqrshls_u32 (a, b);
 963 }
 964
 965 /* { dg-final { scan-assembler-times "\\tuqrshl\\td\[0-9\]+" 1 } } */
 966
 967 uint64x1_t
 968 test_vqrshld_u64 (uint64x1_t a, uint64x1_t b)
 969 {
 970   return vqrshld_u64 (a, b);
 971 }
 972
 973 /* { dg-final { scan-assembler-times "\\tsqshlu\\tb\[0-9\]+" 1 } } */
 974
 975 int8x1_t
 976 test_vqshlub_n_s8 (int8x1_t a)
 977 {
 978   return vqshlub_n_s8 (a, 3);
 979 }
 980
 981 /* { dg-final { scan-assembler-times "\\tsqshlu\\th\[0-9\]+" 1 } } */
 982
 983 int16x1_t
 984 test_vqshluh_n_s16 (int16x1_t a)
 985 {
 986   return vqshluh_n_s16 (a, 4);
 987 }
 988
 989 /* { dg-final { scan-assembler-times "\\tsqshlu\\ts\[0-9\]+" 1 } } */
 990
 991 int32x1_t
 992 test_vqshlus_n_s32 (int32x1_t a)
 993 {
 994   return vqshlus_n_s32 (a, 5);
 995 }
 996
 997 /* { dg-final { scan-assembler-times "\\tsqshlu\\td\[0-9\]+" 1 } } */
 998
 999 int64x1_t
1000 test_vqshlud_n_s64 (int64x1_t a)
1001 {
1002   return vqshlud_n_s64 (a, 6);
1003 }
1004
1005 /* { dg-final { scan-assembler-times "\\tsqshl\\tb\[0-9\]+" 2 } } */
1006
1007 int8x1_t
1008 test_vqshlb_s8 (int8x1_t a, int8x1_t b)
1009 {
1010   return vqshlb_s8 (a, b);
1011 }
1012
1013 int8x1_t
1014 test_vqshlb_n_s8 (int8x1_t a)
1015 {
1016   return vqshlb_n_s8 (a, 2);
1017 }
1018
1019 /* { dg-final { scan-assembler-times "\\tsqshl\\th\[0-9\]+" 2 } } */
1020
1021 int16x1_t
1022 test_vqshlh_s16 (int16x1_t a, int16x1_t b)
1023 {
1024   return vqshlh_s16 (a, b);
1025 }
1026
1027 int16x1_t
1028 test_vqshlh_n_s16 (int16x1_t a)
1029 {
1030   return vqshlh_n_s16 (a, 3);
1031 }
1032
1033 /* { dg-final { scan-assembler-times "\\tsqshl\\ts\[0-9\]+" 2 } } */
1034
1035 int32x1_t
1036 test_vqshls_s32 (int32x1_t a, int32x1_t b)
1037 {
1038   return vqshls_s32 (a, b);
1039 }
1040
1041 int32x1_t
1042 test_vqshls_n_s32 (int32x1_t a)
1043 {
1044   return vqshls_n_s32 (a, 4);
1045 }
1046
1047 /* { dg-final { scan-assembler-times "\\tsqshl\\td\[0-9\]+" 2 } } */
1048
1049 int64x1_t
1050 test_vqshld_s64 (int64x1_t a, int64x1_t b)
1051 {
1052   return vqshld_s64 (a, b);
1053 }
1054
1055 int64x1_t
1056 test_vqshld_n_s64 (int64x1_t a)
1057 {
1058   return vqshld_n_s64 (a, 5);
1059 }
1060
1061 /* { dg-final { scan-assembler-times "\\tuqshl\\tb\[0-9\]+" 2 } } */
1062
1063 uint8x1_t
1064 test_vqshlb_u8 (uint8x1_t a, uint8x1_t b)
1065 {
1066   return vqshlb_u8 (a, b);
1067 }
1068
1069 uint8x1_t
1070 test_vqshlb_n_u8 (uint8x1_t a)
1071 {
1072   return vqshlb_n_u8 (a, 2);
1073 }
1074
1075 /* { dg-final { scan-assembler-times "\\tuqshl\\th\[0-9\]+" 2 } } */
1076
1077 uint16x1_t
1078 test_vqshlh_u16 (uint16x1_t a, uint16x1_t b)
1079 {
1080   return vqshlh_u16 (a, b);
1081 }
1082
1083 uint16x1_t
1084 test_vqshlh_n_u16 (uint16x1_t a)
1085 {
1086   return vqshlh_n_u16 (a, 3);
1087 }
1088
1089 /* { dg-final { scan-assembler-times "\\tuqshl\\ts\[0-9\]+" 2 } } */
1090
1091 uint32x1_t
1092 test_vqshls_u32 (uint32x1_t a, uint32x1_t b)
1093 {
1094   return vqshls_u32 (a, b);
1095 }
1096
1097 uint32x1_t
1098 test_vqshls_n_u32 (uint32x1_t a)
1099 {
1100   return vqshls_n_u32 (a, 4);
1101 }
1102
1103 /* { dg-final { scan-assembler-times "\\tuqshl\\td\[0-9\]+" 2 } } */
1104
1105 uint64x1_t
1106 test_vqshld_u64 (uint64x1_t a, uint64x1_t b)
1107 {
1108   return vqshld_u64 (a, b);
1109 }
1110
1111 uint64x1_t
1112 test_vqshld_n_u64 (uint64x1_t a)
1113 {
1114   return vqshld_n_u64 (a, 5);
1115 }
1116
1117 /* { dg-final { scan-assembler-times "\\tsqshrun\\tb\[0-9\]+" 1 } } */
1118
1119 int8x1_t
1120 test_vqshrunh_n_s16 (int16x1_t a)
1121 {
1122   return vqshrunh_n_s16 (a, 2);
1123 }
1124
1125 /* { dg-final { scan-assembler-times "\\tsqshrun\\th\[0-9\]+" 1 } } */
1126
1127 int16x1_t
1128 test_vqshruns_n_s32 (int32x1_t a)
1129 {
1130   return vqshruns_n_s32 (a, 3);
1131 }
1132
1133 /* { dg-final { scan-assembler-times "\\tsqshrun\\ts\[0-9\]+" 1 } } */
1134
1135 int32x1_t
1136 test_vqshrund_n_s64 (int64x1_t a)
1137 {
1138   return vqshrund_n_s64 (a, 4);
1139 }
1140
1141 /* { dg-final { scan-assembler-times "\\tsqrshrun\\tb\[0-9\]+" 1 } } */
1142
1143 int8x1_t
1144 test_vqrshrunh_n_s16 (int16x1_t a)
1145 {
1146   return vqrshrunh_n_s16 (a, 2);
1147 }
1148
1149 /* { dg-final { scan-assembler-times "\\tsqrshrun\\th\[0-9\]+" 1 } } */
1150
1151 int16x1_t
1152 test_vqrshruns_n_s32 (int32x1_t a)
1153 {
1154   return vqrshruns_n_s32 (a, 3);
1155 }
1156
1157 /* { dg-final { scan-assembler-times "\\tsqrshrun\\ts\[0-9\]+" 1 } } */
1158
1159 int32x1_t
1160 test_vqrshrund_n_s64 (int64x1_t a)
1161 {
1162   return vqrshrund_n_s64 (a, 4);
1163 }
1164
1165 /* { dg-final { scan-assembler-times "\\tsqshrn\\tb\[0-9\]+" 1 } } */
1166
1167 int8x1_t
1168 test_vqshrnh_n_s16 (int16x1_t a)
1169 {
1170   return vqshrnh_n_s16 (a, 2);
1171 }
1172
1173 /* { dg-final { scan-assembler-times "\\tsqshrn\\th\[0-9\]+" 1 } } */
1174
1175 int16x1_t
1176 test_vqshrns_n_s32 (int32x1_t a)
1177 {
1178   return vqshrns_n_s32 (a, 3);
1179 }
1180
1181 /* { dg-final { scan-assembler-times "\\tsqshrn\\ts\[0-9\]+" 1 } } */
1182
1183 int32x1_t
1184 test_vqshrnd_n_s64 (int64x1_t a)
1185 {
1186   return vqshrnd_n_s64 (a, 4);
1187 }
1188
1189 /* { dg-final { scan-assembler-times "\\tuqshrn\\tb\[0-9\]+" 1 } } */
1190
1191 uint8x1_t
1192 test_vqshrnh_n_u16 (uint16x1_t a)
1193 {
1194   return vqshrnh_n_u16 (a, 2);
1195 }
1196
1197 /* { dg-final { scan-assembler-times "\\tuqshrn\\th\[0-9\]+" 1 } } */
1198
1199 uint16x1_t
1200 test_vqshrns_n_u32 (uint32x1_t a)
1201 {
1202   return vqshrns_n_u32 (a, 3);
1203 }
1204
1205 /* { dg-final { scan-assembler-times "\\tuqshrn\\ts\[0-9\]+" 1 } } */
1206
1207 uint32x1_t
1208 test_vqshrnd_n_u64 (uint64x1_t a)
1209 {
1210   return vqshrnd_n_u64 (a, 4);
1211 }
1212
1213 /* { dg-final { scan-assembler-times "\\tsqrshrn\\tb\[0-9\]+" 1 } } */
1214
1215 int8x1_t
1216 test_vqrshrnh_n_s16 (int16x1_t a)
1217 {
1218   return vqrshrnh_n_s16 (a, 2);
1219 }
1220
1221 /* { dg-final { scan-assembler-times "\\tsqrshrn\\th\[0-9\]+" 1 } } */
1222
1223 int16x1_t
1224 test_vqrshrns_n_s32 (int32x1_t a)
1225 {
1226   return vqrshrns_n_s32 (a, 3);
1227 }
1228
1229 /* { dg-final { scan-assembler-times "\\tsqrshrn\\ts\[0-9\]+" 1 } } */
1230
1231 int32x1_t
1232 test_vqrshrnd_n_s64 (int64x1_t a)
1233 {
1234   return vqrshrnd_n_s64 (a, 4);
1235 }
1236
1237 /* { dg-final { scan-assembler-times "\\tuqrshrn\\tb\[0-9\]+" 1 } } */
1238
1239 uint8x1_t
1240 test_vqrshrnh_n_u16 (uint16x1_t a)
1241 {
1242   return vqrshrnh_n_u16 (a, 2);
1243 }
1244
1245 /* { dg-final { scan-assembler-times "\\tuqrshrn\\th\[0-9\]+" 1 } } */
1246
1247 uint16x1_t
1248 test_vqrshrns_n_u32 (uint32x1_t a)
1249 {
1250   return vqrshrns_n_u32 (a, 3);
1251 }
1252
1253 /* { dg-final { scan-assembler-times "\\tuqrshrn\\ts\[0-9\]+" 1 } } */
1254
1255 uint32x1_t
1256 test_vqrshrnd_n_u64 (uint64x1_t a)
1257 {
1258   return vqrshrnd_n_u64 (a, 4);
1259 }
1260
1261 /* { dg-final { scan-assembler-times "\\tlsl\\tx\[0-9\]+" 2 } } */
1262
1263 int64x1_t
1264 test_vshl_n_s64 (int64x1_t a)
1265 {
1266   return vshld_n_s64 (a, 9);
1267 }
1268
1269 uint64x1_t
1270 test_vshl_n_u64 (uint64x1_t a)
1271 {
1272   return vshld_n_u64 (a, 9);
1273 }
1274
1275 /* { dg-final { scan-assembler-times "\\tsli\\td\[0-9\]+" 2 } } */
1276
1277 int64x1_t
1278 test_vsli_n_s64 (int64x1_t a, int64x1_t b)
1279 {
1280   return vslid_n_s64 (a, b, 9);
1281 }
1282
1283 uint64x1_t
1284 test_vsli_n_u64 (uint64x1_t a, uint64x1_t b)
1285 {
1286   return vslid_n_u64 (a, b, 9);
1287 }
1288
1289 /* { dg-final { scan-assembler-times "\\tsri\\td\[0-9\]+" 2 } } */
1290
1291 int64x1_t
1292 test_vsri_n_s64 (int64x1_t a, int64x1_t b)
1293 {
1294   return vsrid_n_s64 (a, b, 9);
1295 }
1296
1297 uint64x1_t
1298 test_vsri_n_u64 (uint64x1_t a, uint64x1_t b)
1299 {
1300   return vsrid_n_u64 (a, b, 9);
1301 }