* final.c (output_asm_insn): Correct problem with -fverbose-asm.
[official-gcc.git] / gcc / caller-save.c
blob53446f38ec3101f47b02c20d2a9141dfb91fa36d
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "insn-config.h"
28 #include "flags.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
39 #ifndef MAX_MOVE_MAX
40 #define MAX_MOVE_MAX MOVE_MAX
41 #endif
43 #ifndef MIN_UNITS_PER_WORD
44 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
45 #endif
47 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
49 /* Modes for each hard register that we can save. The smallest mode is wide
50 enough to save the entire contents of the register. When saving the
51 register because it is live we first try to save in multi-register modes.
52 If that is not possible the save is done one register at a time. */
54 static enum machine_mode
55 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
57 /* For each hard register, a place on the stack where it can be saved,
58 if needed. */
60 static rtx
61 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
63 /* We will only make a register eligible for caller-save if it can be
64 saved in its widest mode with a simple SET insn as long as the memory
65 address is valid. We record the INSN_CODE is those insns here since
66 when we emit them, the addresses might not be valid, so they might not
67 be recognized. */
69 static int
70 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
71 static int
72 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
74 /* Set of hard regs currently residing in save area (during insn scan). */
76 static HARD_REG_SET hard_regs_saved;
78 /* Number of registers currently in hard_regs_saved. */
80 static int n_regs_saved;
82 /* Computed by mark_referenced_regs, all regs referenced in a given
83 insn. */
84 static HARD_REG_SET referenced_regs;
86 /* Computed in mark_set_regs, holds all registers set by the current
87 instruction. */
88 static HARD_REG_SET this_insn_sets;
91 static void mark_set_regs (rtx, rtx, void *);
92 static void mark_referenced_regs (rtx);
93 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
94 enum machine_mode *);
95 static int insert_restore (struct insn_chain *, int, int, int,
96 enum machine_mode *);
97 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
98 rtx);
99 static void add_stored_regs (rtx, rtx, void *);
101 /* Initialize for caller-save.
103 Look at all the hard registers that are used by a call and for which
104 regclass.c has not already excluded from being used across a call.
106 Ensure that we can find a mode to save the register and that there is a
107 simple insn to save and restore the register. This latter check avoids
108 problems that would occur if we tried to save the MQ register of some
109 machines directly into memory. */
111 void
112 init_caller_save (void)
114 rtx addr_reg;
115 int offset;
116 rtx address;
117 int i, j;
118 enum machine_mode mode;
119 rtx savepat, restpat;
120 rtx test_reg, test_mem;
121 rtx saveinsn, restinsn;
123 /* First find all the registers that we need to deal with and all
124 the modes that they can have. If we can't find a mode to use,
125 we can't have the register live over calls. */
127 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
129 if (call_used_regs[i] && ! call_fixed_regs[i])
131 for (j = 1; j <= MOVE_MAX_WORDS; j++)
133 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
134 VOIDmode);
135 if (regno_save_mode[i][j] == VOIDmode && j == 1)
137 call_fixed_regs[i] = 1;
138 SET_HARD_REG_BIT (call_fixed_reg_set, i);
142 else
143 regno_save_mode[i][1] = VOIDmode;
146 /* The following code tries to approximate the conditions under which
147 we can easily save and restore a register without scratch registers or
148 other complexities. It will usually work, except under conditions where
149 the validity of an insn operand is dependent on the address offset.
150 No such cases are currently known.
152 We first find a typical offset from some BASE_REG_CLASS register.
153 This address is chosen by finding the first register in the class
154 and by finding the smallest power of two that is a valid offset from
155 that register in every mode we will use to save registers. */
157 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
158 if (TEST_HARD_REG_BIT
159 (reg_class_contents
160 [(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
161 break;
163 gcc_assert (i < FIRST_PSEUDO_REGISTER);
165 addr_reg = gen_rtx_REG (Pmode, i);
167 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
169 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
171 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
172 if (regno_save_mode[i][1] != VOIDmode
173 && ! strict_memory_address_p (regno_save_mode[i][1], address))
174 break;
176 if (i == FIRST_PSEUDO_REGISTER)
177 break;
180 /* If we didn't find a valid address, we must use register indirect. */
181 if (offset == 0)
182 address = addr_reg;
184 /* Next we try to form an insn to save and restore the register. We
185 see if such an insn is recognized and meets its constraints.
187 To avoid lots of unnecessary RTL allocation, we construct all the RTL
188 once, then modify the memory and register operands in-place. */
190 test_reg = gen_rtx_REG (VOIDmode, 0);
191 test_mem = gen_rtx_MEM (VOIDmode, address);
192 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
193 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
195 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
196 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
198 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
199 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
200 if (HARD_REGNO_MODE_OK (i, mode))
202 int ok;
204 /* Update the register number and modes of the register
205 and memory operand. */
206 REGNO (test_reg) = i;
207 PUT_MODE (test_reg, mode);
208 PUT_MODE (test_mem, mode);
210 /* Force re-recognition of the modified insns. */
211 INSN_CODE (saveinsn) = -1;
212 INSN_CODE (restinsn) = -1;
214 reg_save_code[i][mode] = recog_memoized (saveinsn);
215 reg_restore_code[i][mode] = recog_memoized (restinsn);
217 /* Now extract both insns and see if we can meet their
218 constraints. */
219 ok = (reg_save_code[i][mode] != -1
220 && reg_restore_code[i][mode] != -1);
221 if (ok)
223 extract_insn (saveinsn);
224 ok = constrain_operands (1);
225 extract_insn (restinsn);
226 ok &= constrain_operands (1);
229 if (! ok)
231 reg_save_code[i][mode] = -1;
232 reg_restore_code[i][mode] = -1;
235 else
237 reg_save_code[i][mode] = -1;
238 reg_restore_code[i][mode] = -1;
241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
242 for (j = 1; j <= MOVE_MAX_WORDS; j++)
243 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
245 regno_save_mode[i][j] = VOIDmode;
246 if (j == 1)
248 call_fixed_regs[i] = 1;
249 SET_HARD_REG_BIT (call_fixed_reg_set, i);
254 /* Initialize save areas by showing that we haven't allocated any yet. */
256 void
257 init_save_areas (void)
259 int i, j;
261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
262 for (j = 1; j <= MOVE_MAX_WORDS; j++)
263 regno_save_mem[i][j] = 0;
266 /* Allocate save areas for any hard registers that might need saving.
267 We take a conservative approach here and look for call-clobbered hard
268 registers that are assigned to pseudos that cross calls. This may
269 overestimate slightly (especially if some of these registers are later
270 used as spill registers), but it should not be significant.
272 Future work:
274 In the fallback case we should iterate backwards across all possible
275 modes for the save, choosing the largest available one instead of
276 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
278 We do not try to use "move multiple" instructions that exist
279 on some machines (such as the 68k moveml). It could be a win to try
280 and use them when possible. The hard part is doing it in a way that is
281 machine independent since they might be saving non-consecutive
282 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
284 void
285 setup_save_areas (void)
287 int i, j, k;
288 unsigned int r;
289 HARD_REG_SET hard_regs_used;
291 /* Allocate space in the save area for the largest multi-register
292 pseudos first, then work backwards to single register
293 pseudos. */
295 /* Find and record all call-used hard-registers in this function. */
296 CLEAR_HARD_REG_SET (hard_regs_used);
297 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
298 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
300 unsigned int regno = reg_renumber[i];
301 unsigned int endregno
302 = regno + hard_regno_nregs[regno][GET_MODE (regno_reg_rtx[i])];
304 for (r = regno; r < endregno; r++)
305 if (call_used_regs[r])
306 SET_HARD_REG_BIT (hard_regs_used, r);
309 /* Now run through all the call-used hard-registers and allocate
310 space for them in the caller-save area. Try to allocate space
311 in a manner which allows multi-register saves/restores to be done. */
313 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
314 for (j = MOVE_MAX_WORDS; j > 0; j--)
316 int do_save = 1;
318 /* If no mode exists for this size, try another. Also break out
319 if we have already saved this hard register. */
320 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
321 continue;
323 /* See if any register in this group has been saved. */
324 for (k = 0; k < j; k++)
325 if (regno_save_mem[i + k][1])
327 do_save = 0;
328 break;
330 if (! do_save)
331 continue;
333 for (k = 0; k < j; k++)
334 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
336 do_save = 0;
337 break;
339 if (! do_save)
340 continue;
342 /* We have found an acceptable mode to store in. */
343 regno_save_mem[i][j]
344 = assign_stack_local (regno_save_mode[i][j],
345 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
347 /* Setup single word save area just in case... */
348 for (k = 0; k < j; k++)
349 /* This should not depend on WORDS_BIG_ENDIAN.
350 The order of words in regs is the same as in memory. */
351 regno_save_mem[i + k][1]
352 = adjust_address_nv (regno_save_mem[i][j],
353 regno_save_mode[i + k][1],
354 k * UNITS_PER_WORD);
357 /* Now loop again and set the alias set of any save areas we made to
358 the alias set used to represent frame objects. */
359 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
360 for (j = MOVE_MAX_WORDS; j > 0; j--)
361 if (regno_save_mem[i][j] != 0)
362 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
365 /* Find the places where hard regs are live across calls and save them. */
367 void
368 save_call_clobbered_regs (void)
370 struct insn_chain *chain, *next;
371 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
373 CLEAR_HARD_REG_SET (hard_regs_saved);
374 n_regs_saved = 0;
376 for (chain = reload_insn_chain; chain != 0; chain = next)
378 rtx insn = chain->insn;
379 enum rtx_code code = GET_CODE (insn);
381 next = chain->next;
383 gcc_assert (!chain->is_caller_save_insn);
385 if (INSN_P (insn))
387 /* If some registers have been saved, see if INSN references
388 any of them. We must restore them before the insn if so. */
390 if (n_regs_saved)
392 int regno;
394 if (code == JUMP_INSN)
395 /* Restore all registers if this is a JUMP_INSN. */
396 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
397 else
399 CLEAR_HARD_REG_SET (referenced_regs);
400 mark_referenced_regs (PATTERN (insn));
401 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
404 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
405 if (TEST_HARD_REG_BIT (referenced_regs, regno))
406 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
409 if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
411 int regno;
412 HARD_REG_SET hard_regs_to_save;
414 /* Use the register life information in CHAIN to compute which
415 regs are live during the call. */
416 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
417 &chain->live_throughout);
418 /* Save hard registers always in the widest mode available. */
419 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
420 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
421 save_mode [regno] = regno_save_mode [regno][1];
422 else
423 save_mode [regno] = VOIDmode;
425 /* Look through all live pseudos, mark their hard registers
426 and choose proper mode for saving. */
427 EXECUTE_IF_SET_IN_REG_SET
428 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
430 int r = reg_renumber[regno];
431 int nregs;
432 enum machine_mode mode;
434 gcc_assert (r >= 0);
435 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
436 mode = HARD_REGNO_CALLER_SAVE_MODE
437 (r, nregs, PSEUDO_REGNO_MODE (regno));
438 if (GET_MODE_BITSIZE (mode)
439 > GET_MODE_BITSIZE (save_mode[r]))
440 save_mode[r] = mode;
441 while (nregs-- > 0)
442 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
445 /* Record all registers set in this call insn. These don't need
446 to be saved. N.B. the call insn might set a subreg of a
447 multi-hard-reg pseudo; then the pseudo is considered live
448 during the call, but the subreg that is set isn't. */
449 CLEAR_HARD_REG_SET (this_insn_sets);
450 note_stores (PATTERN (insn), mark_set_regs, NULL);
452 /* Compute which hard regs must be saved before this call. */
453 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
454 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
455 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
456 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
458 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
459 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
460 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
462 /* Must recompute n_regs_saved. */
463 n_regs_saved = 0;
464 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
465 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
466 n_regs_saved++;
470 if (chain->next == 0 || chain->next->block > chain->block)
472 int regno;
473 /* At the end of the basic block, we must restore any registers that
474 remain saved. If the last insn in the block is a JUMP_INSN, put
475 the restore before the insn, otherwise, put it after the insn. */
477 if (n_regs_saved)
478 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
479 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
480 regno += insert_restore (chain, JUMP_P (insn),
481 regno, MOVE_MAX_WORDS, save_mode);
486 /* Here from note_stores when an insn stores a value in a register.
487 Set the proper bit or bits in this_insn_sets. All pseudos that have
488 been assigned hard regs have had their register number changed already,
489 so we can ignore pseudos. */
490 static void
491 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED,
492 void *data ATTRIBUTE_UNUSED)
494 int regno, endregno, i;
495 enum machine_mode mode = GET_MODE (reg);
497 if (GET_CODE (reg) == SUBREG)
499 rtx inner = SUBREG_REG (reg);
500 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
501 return;
503 regno = subreg_hard_regno (reg, 1);
505 else if (REG_P (reg)
506 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
507 regno = REGNO (reg);
508 else
509 return;
511 endregno = regno + hard_regno_nregs[regno][mode];
513 for (i = regno; i < endregno; i++)
514 SET_HARD_REG_BIT (this_insn_sets, i);
517 /* Here from note_stores when an insn stores a value in a register.
518 Set the proper bit or bits in the passed regset. All pseudos that have
519 been assigned hard regs have had their register number changed already,
520 so we can ignore pseudos. */
521 static void
522 add_stored_regs (rtx reg, rtx setter, void *data)
524 int regno, endregno, i;
525 enum machine_mode mode = GET_MODE (reg);
526 int offset = 0;
528 if (GET_CODE (setter) == CLOBBER)
529 return;
531 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
533 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
534 GET_MODE (SUBREG_REG (reg)),
535 SUBREG_BYTE (reg),
536 GET_MODE (reg));
537 reg = SUBREG_REG (reg);
540 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
541 return;
543 regno = REGNO (reg) + offset;
544 endregno = regno + hard_regno_nregs[regno][mode];
546 for (i = regno; i < endregno; i++)
547 SET_REGNO_REG_SET ((regset) data, i);
550 /* Walk X and record all referenced registers in REFERENCED_REGS. */
551 static void
552 mark_referenced_regs (rtx x)
554 enum rtx_code code = GET_CODE (x);
555 const char *fmt;
556 int i, j;
558 if (code == SET)
559 mark_referenced_regs (SET_SRC (x));
560 if (code == SET || code == CLOBBER)
562 x = SET_DEST (x);
563 code = GET_CODE (x);
564 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
565 || code == PC || code == CC0
566 || (code == SUBREG && REG_P (SUBREG_REG (x))
567 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
568 /* If we're setting only part of a multi-word register,
569 we shall mark it as referenced, because the words
570 that are not being set should be restored. */
571 && ((GET_MODE_SIZE (GET_MODE (x))
572 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
573 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
574 <= UNITS_PER_WORD))))
575 return;
577 if (code == MEM || code == SUBREG)
579 x = XEXP (x, 0);
580 code = GET_CODE (x);
583 if (code == REG)
585 int regno = REGNO (x);
586 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
587 : reg_renumber[regno]);
589 if (hardregno >= 0)
591 int nregs = hard_regno_nregs[hardregno][GET_MODE (x)];
592 while (nregs-- > 0)
593 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
595 /* If this is a pseudo that did not get a hard register, scan its
596 memory location, since it might involve the use of another
597 register, which might be saved. */
598 else if (reg_equiv_mem[regno] != 0)
599 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
600 else if (reg_equiv_address[regno] != 0)
601 mark_referenced_regs (reg_equiv_address[regno]);
602 return;
605 fmt = GET_RTX_FORMAT (code);
606 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
608 if (fmt[i] == 'e')
609 mark_referenced_regs (XEXP (x, i));
610 else if (fmt[i] == 'E')
611 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
612 mark_referenced_regs (XVECEXP (x, i, j));
616 /* Insert a sequence of insns to restore. Place these insns in front of
617 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
618 the maximum number of registers which should be restored during this call.
619 It should never be less than 1 since we only work with entire registers.
621 Note that we have verified in init_caller_save that we can do this
622 with a simple SET, so use it. Set INSN_CODE to what we save there
623 since the address might not be valid so the insn might not be recognized.
624 These insns will be reloaded and have register elimination done by
625 find_reload, so we need not worry about that here.
627 Return the extra number of registers saved. */
629 static int
630 insert_restore (struct insn_chain *chain, int before_p, int regno,
631 int maxrestore, enum machine_mode *save_mode)
633 int i, k;
634 rtx pat = NULL_RTX;
635 int code;
636 unsigned int numregs = 0;
637 struct insn_chain *new;
638 rtx mem;
640 /* A common failure mode if register status is not correct in the RTL
641 is for this routine to be called with a REGNO we didn't expect to
642 save. That will cause us to write an insn with a (nil) SET_DEST
643 or SET_SRC. Instead of doing so and causing a crash later, check
644 for this common case and abort here instead. This will remove one
645 step in debugging such problems. */
646 gcc_assert (regno_save_mem[regno][1]);
648 /* Get the pattern to emit and update our status.
650 See if we can restore `maxrestore' registers at once. Work
651 backwards to the single register case. */
652 for (i = maxrestore; i > 0; i--)
654 int j;
655 int ok = 1;
657 if (regno_save_mem[regno][i] == 0)
658 continue;
660 for (j = 0; j < i; j++)
661 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
663 ok = 0;
664 break;
666 /* Must do this one restore at a time. */
667 if (! ok)
668 continue;
670 numregs = i;
671 break;
674 mem = regno_save_mem [regno][numregs];
675 if (save_mode [regno] != VOIDmode
676 && save_mode [regno] != GET_MODE (mem)
677 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
678 mem = adjust_address (mem, save_mode[regno], 0);
679 else
680 mem = copy_rtx (mem);
681 pat = gen_rtx_SET (VOIDmode,
682 gen_rtx_REG (GET_MODE (mem),
683 regno), mem);
684 code = reg_restore_code[regno][GET_MODE (mem)];
685 new = insert_one_insn (chain, before_p, code, pat);
687 /* Clear status for all registers we restored. */
688 for (k = 0; k < i; k++)
690 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
691 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
692 n_regs_saved--;
695 /* Tell our callers how many extra registers we saved/restored. */
696 return numregs - 1;
699 /* Like insert_restore above, but save registers instead. */
701 static int
702 insert_save (struct insn_chain *chain, int before_p, int regno,
703 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
705 int i;
706 unsigned int k;
707 rtx pat = NULL_RTX;
708 int code;
709 unsigned int numregs = 0;
710 struct insn_chain *new;
711 rtx mem;
713 /* A common failure mode if register status is not correct in the RTL
714 is for this routine to be called with a REGNO we didn't expect to
715 save. That will cause us to write an insn with a (nil) SET_DEST
716 or SET_SRC. Instead of doing so and causing a crash later, check
717 for this common case and abort here instead. This will remove one
718 step in debugging such problems. */
719 gcc_assert (regno_save_mem[regno][1]);
721 /* Get the pattern to emit and update our status.
723 See if we can save several registers with a single instruction.
724 Work backwards to the single register case. */
725 for (i = MOVE_MAX_WORDS; i > 0; i--)
727 int j;
728 int ok = 1;
729 if (regno_save_mem[regno][i] == 0)
730 continue;
732 for (j = 0; j < i; j++)
733 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
735 ok = 0;
736 break;
738 /* Must do this one save at a time. */
739 if (! ok)
740 continue;
742 numregs = i;
743 break;
746 mem = regno_save_mem [regno][numregs];
747 if (save_mode [regno] != VOIDmode
748 && save_mode [regno] != GET_MODE (mem)
749 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
750 mem = adjust_address (mem, save_mode[regno], 0);
751 else
752 mem = copy_rtx (mem);
753 pat = gen_rtx_SET (VOIDmode, mem,
754 gen_rtx_REG (GET_MODE (mem),
755 regno));
756 code = reg_save_code[regno][GET_MODE (mem)];
757 new = insert_one_insn (chain, before_p, code, pat);
759 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
760 for (k = 0; k < numregs; k++)
762 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
763 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
764 n_regs_saved++;
767 /* Tell our callers how many extra registers we saved/restored. */
768 return numregs - 1;
771 /* Emit a new caller-save insn and set the code. */
772 static struct insn_chain *
773 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
775 rtx insn = chain->insn;
776 struct insn_chain *new;
778 #ifdef HAVE_cc0
779 /* If INSN references CC0, put our insns in front of the insn that sets
780 CC0. This is always safe, since the only way we could be passed an
781 insn that references CC0 is for a restore, and doing a restore earlier
782 isn't a problem. We do, however, assume here that CALL_INSNs don't
783 reference CC0. Guard against non-INSN's like CODE_LABEL. */
785 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
786 && before_p
787 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
788 chain = chain->prev, insn = chain->insn;
789 #endif
791 new = new_insn_chain ();
792 if (before_p)
794 rtx link;
796 new->prev = chain->prev;
797 if (new->prev != 0)
798 new->prev->next = new;
799 else
800 reload_insn_chain = new;
802 chain->prev = new;
803 new->next = chain;
804 new->insn = emit_insn_before (pat, insn);
805 /* ??? It would be nice if we could exclude the already / still saved
806 registers from the live sets. */
807 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
808 /* Registers that die in CHAIN->INSN still live in the new insn. */
809 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
811 if (REG_NOTE_KIND (link) == REG_DEAD)
813 rtx reg = XEXP (link, 0);
814 int regno, i;
816 gcc_assert (REG_P (reg));
817 regno = REGNO (reg);
818 if (regno >= FIRST_PSEUDO_REGISTER)
819 regno = reg_renumber[regno];
820 if (regno < 0)
821 continue;
822 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
823 i >= 0; i--)
824 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
827 CLEAR_REG_SET (&new->dead_or_set);
828 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
829 BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
831 else
833 new->next = chain->next;
834 if (new->next != 0)
835 new->next->prev = new;
836 chain->next = new;
837 new->prev = chain;
838 new->insn = emit_insn_after (pat, insn);
839 /* ??? It would be nice if we could exclude the already / still saved
840 registers from the live sets, and observe REG_UNUSED notes. */
841 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
842 /* Registers that are set in CHAIN->INSN live in the new insn.
843 (Unless there is a REG_UNUSED note for them, but we don't
844 look for them here.) */
845 note_stores (PATTERN (chain->insn), add_stored_regs,
846 &new->live_throughout);
847 CLEAR_REG_SET (&new->dead_or_set);
848 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
849 BB_END (BASIC_BLOCK (chain->block)) = new->insn;
851 new->block = chain->block;
852 new->is_caller_save_insn = 1;
854 INSN_CODE (new->insn) = code;
855 return new;