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re PR middle-end/55027 (simplify vector multiplication by 1)
[official-gcc.git] / gcc / config / rx / rx.h
blob065079fbbbdc7ead3381cba6ff4d1b4c9b5b3f50
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 { \
29 builtin_define ("__RX610__"); \
30 builtin_assert ("machine=RX610"); \
31 } \
32 else \
33 builtin_assert ("machine=RX600"); \
34 \
35 if (TARGET_BIG_ENDIAN_DATA) \
36 builtin_define ("__RX_BIG_ENDIAN__"); \
37 else \
38 builtin_define ("__RX_LITTLE_ENDIAN__");\
39 \
40 if (TARGET_64BIT_DOUBLES) \
41 builtin_define ("__RX_64BIT_DOUBLES__");\
42 else \
43 builtin_define ("__RX_32BIT_DOUBLES__");\
44 \
45 if (ALLOW_RX_FPU_INSNS) \
46 builtin_define ("__RX_FPU_INSNS__"); \
47 \
48 if (TARGET_AS100_SYNTAX) \
49 builtin_define ("__RX_AS100_SYNTAX__"); \
50 else \
51 builtin_define ("__RX_GAS_SYNTAX__"); \
52 } \
53 while (0)
54
55 #undef CC1_SPEC
56 #define CC1_SPEC "\
57 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
58 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
59
60 #undef STARTFILE_SPEC
61 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
62
63 #undef ENDFILE_SPEC
64 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
65
66 #undef CPP_SPEC
67 #define CPP_SPEC "\
68 %{mpid:-D_RX_PID=1} \
69 %{mint-register=*:-D_RX_INT_REGISTERS=%*} \
70 %{msmall-data-limit*:-D_RX_SMALL_DATA} \
71 "
72
73 #undef ASM_SPEC
74 #define ASM_SPEC "\
75 %{mbig-endian-data:-mbig-endian-data} \
76 %{m64bit-doubles:-m64bit-doubles} \
77 %{!m64bit-doubles:-m32bit-doubles} \
78 %{msmall-data-limit*:-msmall-data-limit} \
79 %{mrelax:-relax} \
80 %{mpid} \
81 %{mint-register=*} \
82 "
83
84 #undef LIB_SPEC
85 #define LIB_SPEC " \
86 --start-group \
87 -lc \
88 %{msim:-lsim}%{!msim:-lnosys} \
89 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
90 --end-group \
91 %{!T*: %{msim:%Trx-sim.ld}%{!msim:%Trx.ld}} \
92 "
93
94 #undef LINK_SPEC
95 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
96 \f
97
98 #define BITS_BIG_ENDIAN 0
99 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
100 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
101
102 #define UNITS_PER_WORD 4
103
104 #define INT_TYPE_SIZE 32
105 #define LONG_TYPE_SIZE 32
106 #define LONG_LONG_TYPE_SIZE 64
107
108 #define FLOAT_TYPE_SIZE 32
109 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
110 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
111
112 #ifdef __RX_32BIT_DOUBLES__
113 #define LIBGCC2_HAS_DF_MODE 0
114 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
115 #else
116 #define LIBGCC2_HAS_DF_MODE 1
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
118 #endif
119
120 #define DEFAULT_SIGNED_CHAR 0
121
122 #define STRICT_ALIGNMENT 1
123 #define FUNCTION_BOUNDARY 8
124 #define BIGGEST_ALIGNMENT 32
125 #define STACK_BOUNDARY 32
126 #define PARM_BOUNDARY 8
127
128 #define STACK_GROWS_DOWNWARD 1
129 #define FRAME_GROWS_DOWNWARD 0
130 #define FIRST_PARM_OFFSET(FNDECL) 0
131
132 #define MAX_REGS_PER_ADDRESS 2
133
134 #define Pmode SImode
135 #define POINTER_SIZE 32
136 #undef SIZE_TYPE
137 #define SIZE_TYPE "long unsigned int"
138 #undef PTRDIFF_TYPE
139 #define PTRDIFF_TYPE "long int"
140 #undef WCHAR_TYPE
141 #define WCHAR_TYPE "long int"
142 #undef WCHAR_TYPE_SIZE
143 #define WCHAR_TYPE_SIZE BITS_PER_WORD
144 #define POINTERS_EXTEND_UNSIGNED 1
145 #define FUNCTION_MODE QImode
146 #define CASE_VECTOR_MODE Pmode
147 #define WORD_REGISTER_OPERATIONS 1
148 #define HAS_LONG_COND_BRANCH 0
149 #define HAS_LONG_UNCOND_BRANCH 0
150
151 #define MOVE_MAX 4
152 #define STARTING_FRAME_OFFSET 0
153
154 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
155
156 #define HAVE_PRE_DECREMENT 1
157 #define HAVE_POST_INCREMENT 1
158
159 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
160 #define SLOW_BYTE_ACCESS 1
161
162 #define STORE_FLAG_VALUE 1
163 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
164 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
165 \f
166 enum reg_class
167 {
168 NO_REGS, /* No registers in set. */
169 GR_REGS, /* Integer registers. */
170 ALL_REGS, /* All registers. */
171 LIM_REG_CLASSES /* Max value + 1. */
172 };
173
174 #define REG_CLASS_NAMES \
175 { \
176 "NO_REGS", \
177 "GR_REGS", \
178 "ALL_REGS" \
179 }
180
181 #define REG_CLASS_CONTENTS \
182 { \
183 { 0x00000000 }, /* No registers, */ \
184 { 0x0000ffff }, /* Integer registers. */ \
185 { 0x0000ffff } /* All registers. */ \
186 }
187
188 #define N_REG_CLASSES (int) LIM_REG_CLASSES
189 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
190 + UNITS_PER_WORD - 1) \
191 / UNITS_PER_WORD)
192
193 #define GENERAL_REGS GR_REGS
194 #define BASE_REG_CLASS GR_REGS
195 #define INDEX_REG_CLASS GR_REGS
196
197 #define FIRST_PSEUDO_REGISTER 17
198
199 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
200 ? GR_REGS : NO_REGS)
201
202 #define STACK_POINTER_REGNUM 0
203 #define FUNC_RETURN_REGNUM 1
204 #define FRAME_POINTER_REGNUM 6
205 #define ARG_POINTER_REGNUM 7
206 #define STATIC_CHAIN_REGNUM 8
207 #define TRAMPOLINE_TEMP_REGNUM 9
208 #define STRUCT_VAL_REGNUM 15
209 #define CC_REGNUM 16
210
211 /* This is the register which will probably be used to hold the address of
212 the start of the small data area, if -msmall-data-limit is being used,
213 or the address of the constant data area if -mpid is being used. If both
214 features are in use then two consecutive registers will be used.
215
216 Note - these registers must not be call_used because otherwise library
217 functions that are compiled without -msmall-data-limit/-mpid support
218 might clobber them.
219
220 Note that the actual values used depends on other options; use
221 rx_gp_base_regnum() and rx_pid_base_regnum() instead. */
222 #define GP_BASE_REGNUM 13
223
224 #define ELIMINABLE_REGS \
225 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
226 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
227 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
228
229 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
230 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
231
232
233 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
234 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
235 #define DEFAULT_PCC_STRUCT_RETURN 0
236
237 #define FIXED_REGISTERS \
238 { \
239 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
240 }
241
242 #define CALL_USED_REGISTERS \
243 { \
244 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
245 }
246
247 #define LIBCALL_VALUE(MODE) \
248 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
249 || COMPLEX_MODE_P (MODE) \
250 || GET_MODE_SIZE (MODE) >= 4) \
251 ? (MODE) \
252 : SImode), \
253 FUNC_RETURN_REGNUM)
254
255 /* Order of allocation of registers. */
256
257 #define REG_ALLOC_ORDER \
258 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
259 }
260
261 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
262 (IN_RANGE ((REGNO), (MIN), (MAX)) \
263 || (reg_renumber != NULL \
264 && reg_renumber[(REGNO)] >= (MIN) \
265 && reg_renumber[(REGNO)] <= (MAX)))
266
267 #ifdef REG_OK_STRICT
268 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
269 #else
270 #define REGNO_OK_FOR_BASE_P(regno) 1
271 #endif
272
273 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
274
275 #define RTX_OK_FOR_BASE(X, STRICT) \
276 ((STRICT) ? \
277 ( (REG_P (X) \
278 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
279 || (GET_CODE (X) == SUBREG \
280 && REG_P (SUBREG_REG (X)) \
281 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
282 : \
283 ( (REG_P (X) \
284 || (GET_CODE (X) == SUBREG \
285 && REG_P (SUBREG_REG (X))))))
286 \f
287
288 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
289 ((COUNT) == 0 \
290 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
291 : NULL_RTX)
292
293 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
294
295 #define ACCUMULATE_OUTGOING_ARGS 1
296
297 typedef unsigned int CUMULATIVE_ARGS;
298
299 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
300 (CUM) = 0
301
302 \f
303 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
304 #define TRAMPOLINE_ALIGNMENT 32
305 \f
306 #define NO_PROFILE_COUNTERS 1
307 #define PROFILE_BEFORE_PROLOGUE 1
308
309 #define FUNCTION_PROFILER(FILE, LABELNO) \
310 fprintf (FILE, "\tbsr\t__mcount\n");
311 \f
312
313 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
314
315 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
316 REGNO_REG_CLASS (REGNO) == GR_REGS
317
318 #define MODES_TIEABLE_P(MODE1, MODE2) \
319 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
320 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
321 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
322 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
323 \f
324
325 #define REGISTER_NAMES \
326 { \
327 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
328 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
329 }
330
331 #define ADDITIONAL_REGISTER_NAMES \
332 { \
333 { "sp", STACK_POINTER_REGNUM } \
334 , { "fp", FRAME_POINTER_REGNUM } \
335 , { "arg", ARG_POINTER_REGNUM } \
336 , { "chain", STATIC_CHAIN_REGNUM } \
337 }
338
339 #define DATA_SECTION_ASM_OP \
340 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
341 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
342
343 #define SDATA_SECTION_ASM_OP \
344 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
345 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
346
347 #undef READONLY_DATA_SECTION_ASM_OP
348 #define READONLY_DATA_SECTION_ASM_OP \
349 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
350 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
351
352 #define BSS_SECTION_ASM_OP \
353 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
354 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
355
356 #define SBSS_SECTION_ASM_OP \
357 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
358 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
359
360 /* The following definitions are conditional depending upon whether the
361 compiler is being built or crtstuff.c is being compiled by the built
362 compiler. */
363 #if defined CRT_BEGIN || defined CRT_END
364 # ifdef __RX_AS100_SYNTAX
365 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
366 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
367 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
368 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
369 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
370 # else
371 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
372 # define CTORS_SECTION_ASM_OP \
373 "\t.section\t.init_array,\"aw\",@init_array"
374 # define DTORS_SECTION_ASM_OP \
375 "\t.section\t.fini_array,\"aw\",@fini_array"
376 # define INIT_ARRAY_SECTION_ASM_OP \
377 "\t.section\t.init_array,\"aw\",@init_array"
378 # define FINI_ARRAY_SECTION_ASM_OP \
379 "\t.section\t.fini_array,\"aw\",@fini_array"
380 # endif
381 #else
382 # define TEXT_SECTION_ASM_OP \
383 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
384
385 # define CTORS_SECTION_ASM_OP \
386 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
387 : "\t.section\t.init_array,\"aw\",@init_array")
388
389 # define DTORS_SECTION_ASM_OP \
390 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
391 : "\t.section\t.fini_array,\"aw\",@fini_array")
392
393 # define INIT_ARRAY_SECTION_ASM_OP \
394 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
395 : "\t.section\t.init_array,\"aw\",@init_array")
396
397 # define FINI_ARRAY_SECTION_ASM_OP \
398 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
399 : "\t.section\t.fini_array,\"aw\",@fini_array")
400 #endif
401
402 #define GLOBAL_ASM_OP \
403 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
404 #define ASM_COMMENT_START " ;"
405 #define ASM_APP_ON ""
406 #define ASM_APP_OFF ""
407 #define LOCAL_LABEL_PREFIX "L"
408 #undef USER_LABEL_PREFIX
409 #define USER_LABEL_PREFIX "_"
410
411 /* Compute the alignment needed for label X in various situations.
412 If the user has specified an alignment then honour that, otherwise
413 use rx_align_for_label. */
414 #define JUMP_ALIGN(x) (align_jumps ? align_jumps : rx_align_for_label (x, 0))
415 #define LABEL_ALIGN(x) (align_labels ? align_labels : rx_align_for_label (x, 3))
416 #define LOOP_ALIGN(x) (align_loops ? align_loops : rx_align_for_label (x, 2))
417 #define LABEL_ALIGN_AFTER_BARRIER(x) rx_align_for_label (x, 0)
418
419 #define ASM_OUTPUT_MAX_SKIP_ALIGN(STREAM, LOG, MAX_SKIP) \
420 do \
421 { \
422 if ((LOG) == 0 || (MAX_SKIP) == 0) \
423 break; \
424 if (TARGET_AS100_SYNTAX) \
425 { \
426 if ((LOG) >= 2) \
427 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
428 else \
429 fprintf (STREAM, "\t.ALIGN 2\n"); \
430 } \
431 else \
432 fprintf (STREAM, "\t.balign %d,3,%d\n", 1 << (LOG), (MAX_SKIP)); \
433 } \
434 while (0)
435
436 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
437 do \
438 { \
439 if ((LOG) == 0) \
440 break; \
441 if (TARGET_AS100_SYNTAX) \
442 { \
443 if ((LOG) >= 2) \
444 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
445 else \
446 fprintf (STREAM, "\t.ALIGN 2\n"); \
447 } \
448 else \
449 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
450 } \
451 while (0)
452
453 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
454 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
455 VALUE)
456
457 /* This is how to output an element of a case-vector that is relative.
458 Note: The local label referenced by the "1b" below is emitted by
459 the tablejump insn. */
460
461 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
462 fprintf (FILE, TARGET_AS100_SYNTAX \
463 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
464
465 #define CASE_VECTOR_PC_RELATIVE (TARGET_PID)
466
467 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
468 do \
469 { \
470 HOST_WIDE_INT size_ = (SIZE); \
471 \
472 /* The as100 assembler does not have an equivalent of the SVR4 \
473 .size pseudo-op. */ \
474 if (TARGET_AS100_SYNTAX) \
475 break; \
476 \
477 fputs (SIZE_ASM_OP, STREAM); \
478 assemble_name (STREAM, NAME); \
479 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
480 } \
481 while (0)
482
483 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
484 do \
485 { \
486 /* The as100 assembler does not have an equivalent of the SVR4 \
487 .size pseudo-op. */ \
488 if (TARGET_AS100_SYNTAX) \
489 break; \
490 fputs (SIZE_ASM_OP, STREAM); \
491 assemble_name (STREAM, NAME); \
492 fputs (", .-", STREAM); \
493 assemble_name (STREAM, NAME); \
494 putc ('\n', STREAM); \
495 } \
496 while (0)
497
498 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
499 do \
500 { \
501 /* The as100 assembler does not have an equivalent of the SVR4 \
502 .size pseudo-op. */ \
503 if (TARGET_AS100_SYNTAX) \
504 break; \
505 fputs (TYPE_ASM_OP, STREAM); \
506 assemble_name (STREAM, NAME); \
507 fputs (", ", STREAM); \
508 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
509 putc ('\n', STREAM); \
510 } \
511 while (0)
512
513 #undef ASM_GENERATE_INTERNAL_LABEL
514 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
515 do \
516 { \
517 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
518 PREFIX, (unsigned) (NUM)); \
519 } \
520 while (0)
521
522 #undef ASM_OUTPUT_EXTERNAL
523 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
524 do \
525 { \
526 if (TARGET_AS100_SYNTAX) \
527 targetm.asm_out.globalize_label (FILE, NAME); \
528 default_elf_asm_output_external (FILE, DECL, NAME); \
529 } \
530 while (0)
531
532 #undef ASM_OUTPUT_ALIGNED_COMMON
533 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
534 do \
535 { \
536 if (TARGET_AS100_SYNTAX) \
537 { \
538 fprintf ((FILE), "\t.GLB\t"); \
539 assemble_name ((FILE), (NAME)); \
540 fprintf ((FILE), "\n"); \
541 assemble_name ((FILE), (NAME)); \
542 switch ((ALIGN) / BITS_PER_UNIT) \
543 { \
544 case 4: \
545 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
546 (SIZE) / 4); \
547 break; \
548 case 2: \
549 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
550 (SIZE) / 2); \
551 break; \
552 default: \
553 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
554 (SIZE)); \
555 break; \
556 } \
557 } \
558 else \
559 { \
560 fprintf ((FILE), "%s", COMMON_ASM_OP); \
561 assemble_name ((FILE), (NAME)); \
562 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
563 (SIZE), (ALIGN) / BITS_PER_UNIT); \
564 } \
565 } \
566 while (0)
567
568 #undef SKIP_ASM_OP
569 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
570
571 #undef ASM_OUTPUT_LIMITED_STRING
572 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
573 do \
574 { \
575 const unsigned char *_limited_str = \
576 (const unsigned char *) (STR); \
577 unsigned ch; \
578 \
579 fprintf ((FILE), TARGET_AS100_SYNTAX \
580 ? "\t.BYTE\t\"" : "\t.string\t\""); \
581 \
582 for (; (ch = *_limited_str); _limited_str++) \
583 { \
584 int escape; \
585 \
586 switch (escape = ESCAPES[ch]) \
587 { \
588 case 0: \
589 putc (ch, (FILE)); \
590 break; \
591 case 1: \
592 fprintf ((FILE), "\\%03o", ch); \
593 break; \
594 default: \
595 putc ('\\', (FILE)); \
596 putc (escape, (FILE)); \
597 break; \
598 } \
599 } \
600 \
601 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
602 } \
603 while (0)
604
605 /* For PIC put jump tables into the text section so that the offsets that
606 they contain are always computed between two same-section symbols. */
607 #define JUMP_TABLES_IN_TEXT_SECTION (TARGET_PID || flag_pic)
608 \f
609 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
610 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
611
612 /* Like REG_P except that this macro is true for SET expressions. */
613 #define SET_P(rtl) (GET_CODE (rtl) == SET)
614 \f
615 /* The AS100 assembler does not support .leb128 and .uleb128, but
616 the compiler-build-time configure tests will have enabled their
617 use because GAS supports them. So default to generating STABS
618 debug information instead of DWARF2 when generating AS100
619 compatible output. */
620 #undef PREFERRED_DEBUGGING_TYPE
621 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
622 ? DBX_DEBUG : DWARF2_DEBUG)
623
624 #define INCOMING_FRAME_SP_OFFSET 4
625 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
626 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
627 \f
628 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
629
630 /* This macro is used to decide when RX FPU instructions can be used. */
631 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
632
633 #define BRANCH_COST(SPEED,PREDICT) 1
634 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
635
636 #define SELECT_CC_MODE(OP,X,Y) rx_select_cc_mode(OP, X, Y)
637
638 #define ADJUST_INSN_LENGTH(INSN,LENGTH) \
639 do \
640 { \
641 (LENGTH) = rx_adjust_insn_length ((INSN), (LENGTH)); \
642 } \
643 while (0)
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