* config/i386/cpuid.h (__cpuid): Remove definitions that handle %ebx
[official-gcc.git] / gcc / lra-spills.c
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1 /* Change pseudos by memory.
2 Copyright (C) 2010-2014 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
22 /* This file contains code for a pass to change spilled pseudos into
23 memory.
25 The pass creates necessary stack slots and assigns spilled pseudos
26 to the stack slots in following way:
28 for all spilled pseudos P most frequently used first do
29 for all stack slots S do
30 if P doesn't conflict with pseudos assigned to S then
31 assign S to P and goto to the next pseudo process
32 end
33 end
34 create new stack slot S and assign P to S
35 end
37 The actual algorithm is bit more complicated because of different
38 pseudo sizes.
40 After that the code changes spilled pseudos (except ones created
41 from scratches) by corresponding stack slot memory in RTL.
43 If at least one stack slot was created, we need to run more passes
44 because we have new addresses which should be checked and because
45 the old address displacements might change and address constraints
46 (or insn memory constraints) might not be satisfied any more.
48 For some targets, the pass can spill some pseudos into hard
49 registers of different class (usually into vector registers)
50 instead of spilling them into memory if it is possible and
51 profitable. Spilling GENERAL_REGS pseudo into SSE registers for
52 Intel Corei7 is an example of such optimization. And this is
53 actually recommended by Intel optimization guide.
55 The file also contains code for final change of pseudos on hard
56 regs correspondingly assigned to them. */
58 #include "config.h"
59 #include "system.h"
60 #include "coretypes.h"
61 #include "tm.h"
62 #include "rtl.h"
63 #include "tm_p.h"
64 #include "insn-config.h"
65 #include "recog.h"
66 #include "output.h"
67 #include "regs.h"
68 #include "hard-reg-set.h"
69 #include "flags.h"
70 #include "hashtab.h"
71 #include "hash-set.h"
72 #include "vec.h"
73 #include "machmode.h"
74 #include "input.h"
75 #include "function.h"
76 #include "expr.h"
77 #include "basic-block.h"
78 #include "except.h"
79 #include "timevar.h"
80 #include "target.h"
81 #include "lra-int.h"
82 #include "ira.h"
83 #include "df.h"
86 /* Max regno at the start of the pass. */
87 static int regs_num;
89 /* Map spilled regno -> hard regno used instead of memory for
90 spilling. */
91 static rtx *spill_hard_reg;
93 /* The structure describes stack slot of a spilled pseudo. */
94 struct pseudo_slot
96 /* Number (0, 1, ...) of the stack slot to which given pseudo
97 belongs. */
98 int slot_num;
99 /* First or next slot with the same slot number. */
100 struct pseudo_slot *next, *first;
101 /* Memory representing the spilled pseudo. */
102 rtx mem;
105 /* The stack slots for each spilled pseudo. Indexed by regnos. */
106 static struct pseudo_slot *pseudo_slots;
108 /* The structure describes a register or a stack slot which can be
109 used for several spilled pseudos. */
110 struct slot
112 /* First pseudo with given stack slot. */
113 int regno;
114 /* Hard reg into which the slot pseudos are spilled. The value is
115 negative for pseudos spilled into memory. */
116 int hard_regno;
117 /* Memory representing the all stack slot. It can be different from
118 memory representing a pseudo belonging to give stack slot because
119 pseudo can be placed in a part of the corresponding stack slot.
120 The value is NULL for pseudos spilled into a hard reg. */
121 rtx mem;
122 /* Combined live ranges of all pseudos belonging to given slot. It
123 is used to figure out that a new spilled pseudo can use given
124 stack slot. */
125 lra_live_range_t live_ranges;
128 /* Array containing info about the stack slots. The array element is
129 indexed by the stack slot number in the range [0..slots_num). */
130 static struct slot *slots;
131 /* The number of the stack slots currently existing. */
132 static int slots_num;
134 /* Set up memory of the spilled pseudo I. The function can allocate
135 the corresponding stack slot if it is not done yet. */
136 static void
137 assign_mem_slot (int i)
139 rtx x = NULL_RTX;
140 enum machine_mode mode = GET_MODE (regno_reg_rtx[i]);
141 unsigned int inherent_size = PSEUDO_REGNO_BYTES (i);
142 unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
143 unsigned int max_ref_width = GET_MODE_SIZE (lra_reg_info[i].biggest_mode);
144 unsigned int total_size = MAX (inherent_size, max_ref_width);
145 unsigned int min_align = max_ref_width * BITS_PER_UNIT;
146 int adjust = 0;
148 lra_assert (regno_reg_rtx[i] != NULL_RTX && REG_P (regno_reg_rtx[i])
149 && lra_reg_info[i].nrefs != 0 && reg_renumber[i] < 0);
151 x = slots[pseudo_slots[i].slot_num].mem;
153 /* We can use a slot already allocated because it is guaranteed the
154 slot provides both enough inherent space and enough total
155 space. */
156 if (x)
158 /* Each pseudo has an inherent size which comes from its own mode,
159 and a total size which provides room for paradoxical subregs
160 which refer to the pseudo reg in wider modes. We allocate a new
161 slot, making sure that it has enough inherent space and total
162 space. */
163 else
165 rtx stack_slot;
167 /* No known place to spill from => no slot to reuse. */
168 x = assign_stack_local (mode, total_size,
169 min_align > inherent_align
170 || total_size > inherent_size ? -1 : 0);
171 stack_slot = x;
172 /* Cancel the big-endian correction done in assign_stack_local.
173 Get the address of the beginning of the slot. This is so we
174 can do a big-endian correction unconditionally below. */
175 if (BYTES_BIG_ENDIAN)
177 adjust = inherent_size - total_size;
178 if (adjust)
179 stack_slot
180 = adjust_address_nv (x,
181 mode_for_size (total_size * BITS_PER_UNIT,
182 MODE_INT, 1),
183 adjust);
185 slots[pseudo_slots[i].slot_num].mem = stack_slot;
188 /* On a big endian machine, the "address" of the slot is the address
189 of the low part that fits its inherent mode. */
190 if (BYTES_BIG_ENDIAN && inherent_size < total_size)
191 adjust += (total_size - inherent_size);
193 x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
195 /* Set all of the memory attributes as appropriate for a spill. */
196 set_mem_attrs_for_spill (x);
197 pseudo_slots[i].mem = x;
200 /* Sort pseudos according their usage frequencies. */
201 static int
202 regno_freq_compare (const void *v1p, const void *v2p)
204 const int regno1 = *(const int *) v1p;
205 const int regno2 = *(const int *) v2p;
206 int diff;
208 if ((diff = lra_reg_info[regno2].freq - lra_reg_info[regno1].freq) != 0)
209 return diff;
210 return regno1 - regno2;
213 /* Redefine STACK_GROWS_DOWNWARD in terms of 0 or 1. */
214 #ifdef STACK_GROWS_DOWNWARD
215 # undef STACK_GROWS_DOWNWARD
216 # define STACK_GROWS_DOWNWARD 1
217 #else
218 # define STACK_GROWS_DOWNWARD 0
219 #endif
221 /* Sort pseudos according to their slots, putting the slots in the order
222 that they should be allocated. Slots with lower numbers have the highest
223 priority and should get the smallest displacement from the stack or
224 frame pointer (whichever is being used).
226 The first allocated slot is always closest to the frame pointer,
227 so prefer lower slot numbers when frame_pointer_needed. If the stack
228 and frame grow in the same direction, then the first allocated slot is
229 always closest to the initial stack pointer and furthest away from the
230 final stack pointer, so allocate higher numbers first when using the
231 stack pointer in that case. The reverse is true if the stack and
232 frame grow in opposite directions. */
233 static int
234 pseudo_reg_slot_compare (const void *v1p, const void *v2p)
236 const int regno1 = *(const int *) v1p;
237 const int regno2 = *(const int *) v2p;
238 int diff, slot_num1, slot_num2;
239 int total_size1, total_size2;
241 slot_num1 = pseudo_slots[regno1].slot_num;
242 slot_num2 = pseudo_slots[regno2].slot_num;
243 if ((diff = slot_num1 - slot_num2) != 0)
244 return (frame_pointer_needed
245 || (!FRAME_GROWS_DOWNWARD) == STACK_GROWS_DOWNWARD ? diff : -diff);
246 total_size1 = GET_MODE_SIZE (lra_reg_info[regno1].biggest_mode);
247 total_size2 = GET_MODE_SIZE (lra_reg_info[regno2].biggest_mode);
248 if ((diff = total_size2 - total_size1) != 0)
249 return diff;
250 return regno1 - regno2;
253 /* Assign spill hard registers to N pseudos in PSEUDO_REGNOS which is
254 sorted in order of highest frequency first. Put the pseudos which
255 did not get a spill hard register at the beginning of array
256 PSEUDO_REGNOS. Return the number of such pseudos. */
257 static int
258 assign_spill_hard_regs (int *pseudo_regnos, int n)
260 int i, k, p, regno, res, spill_class_size, hard_regno, nr;
261 enum reg_class rclass, spill_class;
262 enum machine_mode mode;
263 lra_live_range_t r;
264 rtx_insn *insn;
265 rtx set;
266 basic_block bb;
267 HARD_REG_SET conflict_hard_regs;
268 bitmap_head ok_insn_bitmap;
269 bitmap setjump_crosses = regstat_get_setjmp_crosses ();
270 /* Hard registers which can not be used for any purpose at given
271 program point because they are unallocatable or already allocated
272 for other pseudos. */
273 HARD_REG_SET *reserved_hard_regs;
275 if (! lra_reg_spill_p)
276 return n;
277 /* Set up reserved hard regs for every program point. */
278 reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point);
279 for (p = 0; p < lra_live_max_point; p++)
280 COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs);
281 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
282 if (lra_reg_info[i].nrefs != 0
283 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
284 for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
285 for (p = r->start; p <= r->finish; p++)
286 add_to_hard_reg_set (&reserved_hard_regs[p],
287 lra_reg_info[i].biggest_mode, hard_regno);
288 bitmap_initialize (&ok_insn_bitmap, &reg_obstack);
289 FOR_EACH_BB_FN (bb, cfun)
290 FOR_BB_INSNS (bb, insn)
291 if (DEBUG_INSN_P (insn)
292 || ((set = single_set (insn)) != NULL_RTX
293 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))))
294 bitmap_set_bit (&ok_insn_bitmap, INSN_UID (insn));
295 for (res = i = 0; i < n; i++)
297 regno = pseudo_regnos[i];
298 rclass = lra_get_allocno_class (regno);
299 if (bitmap_bit_p (setjump_crosses, regno)
300 || (spill_class
301 = ((enum reg_class)
302 targetm.spill_class ((reg_class_t) rclass,
303 PSEUDO_REGNO_MODE (regno)))) == NO_REGS
304 || bitmap_intersect_compl_p (&lra_reg_info[regno].insn_bitmap,
305 &ok_insn_bitmap))
307 pseudo_regnos[res++] = regno;
308 continue;
310 lra_assert (spill_class != NO_REGS);
311 COPY_HARD_REG_SET (conflict_hard_regs,
312 lra_reg_info[regno].conflict_hard_regs);
313 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
314 for (p = r->start; p <= r->finish; p++)
315 IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
316 spill_class_size = ira_class_hard_regs_num[spill_class];
317 mode = lra_reg_info[regno].biggest_mode;
318 for (k = 0; k < spill_class_size; k++)
320 hard_regno = ira_class_hard_regs[spill_class][k];
321 if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno))
322 break;
324 if (k >= spill_class_size)
326 /* There is no available regs -- assign memory later. */
327 pseudo_regnos[res++] = regno;
328 continue;
330 if (lra_dump_file != NULL)
331 fprintf (lra_dump_file, " Spill r%d into hr%d\n", regno, hard_regno);
332 /* Update reserved_hard_regs. */
333 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
334 for (p = r->start; p <= r->finish; p++)
335 add_to_hard_reg_set (&reserved_hard_regs[p],
336 lra_reg_info[regno].biggest_mode, hard_regno);
337 spill_hard_reg[regno]
338 = gen_raw_REG (PSEUDO_REGNO_MODE (regno), hard_regno);
339 for (nr = 0;
340 nr < hard_regno_nregs[hard_regno][lra_reg_info[regno].biggest_mode];
341 nr++)
342 /* Just loop. */
343 df_set_regs_ever_live (hard_regno + nr, true);
345 bitmap_clear (&ok_insn_bitmap);
346 free (reserved_hard_regs);
347 return res;
350 /* Add pseudo REGNO to slot SLOT_NUM. */
351 static void
352 add_pseudo_to_slot (int regno, int slot_num)
354 struct pseudo_slot *first;
356 if (slots[slot_num].regno < 0)
358 /* It is the first pseudo in the slot. */
359 slots[slot_num].regno = regno;
360 pseudo_slots[regno].first = &pseudo_slots[regno];
361 pseudo_slots[regno].next = NULL;
363 else
365 first = pseudo_slots[regno].first = &pseudo_slots[slots[slot_num].regno];
366 pseudo_slots[regno].next = first->next;
367 first->next = &pseudo_slots[regno];
369 pseudo_slots[regno].mem = NULL_RTX;
370 pseudo_slots[regno].slot_num = slot_num;
371 slots[slot_num].live_ranges
372 = lra_merge_live_ranges (slots[slot_num].live_ranges,
373 lra_copy_live_range_list
374 (lra_reg_info[regno].live_ranges));
377 /* Assign stack slot numbers to pseudos in array PSEUDO_REGNOS of
378 length N. Sort pseudos in PSEUDO_REGNOS for subsequent assigning
379 memory stack slots. */
380 static void
381 assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
383 int i, j, regno;
385 slots_num = 0;
386 /* Assign stack slot numbers to spilled pseudos, use smaller numbers
387 for most frequently used pseudos. */
388 for (i = 0; i < n; i++)
390 regno = pseudo_regnos[i];
391 if (! flag_ira_share_spill_slots)
392 j = slots_num;
393 else
395 for (j = 0; j < slots_num; j++)
396 if (slots[j].hard_regno < 0
397 && ! (lra_intersected_live_ranges_p
398 (slots[j].live_ranges,
399 lra_reg_info[regno].live_ranges)))
400 break;
402 if (j >= slots_num)
404 /* New slot. */
405 slots[j].live_ranges = NULL;
406 slots[j].regno = slots[j].hard_regno = -1;
407 slots[j].mem = NULL_RTX;
408 slots_num++;
410 add_pseudo_to_slot (regno, j);
412 /* Sort regnos according to their slot numbers. */
413 qsort (pseudo_regnos, n, sizeof (int), pseudo_reg_slot_compare);
416 /* Recursively process LOC in INSN and change spilled pseudos to the
417 corresponding memory or spilled hard reg. Ignore spilled pseudos
418 created from the scratches. */
419 static void
420 remove_pseudos (rtx *loc, rtx_insn *insn)
422 int i;
423 rtx hard_reg;
424 const char *fmt;
425 enum rtx_code code;
427 if (*loc == NULL_RTX)
428 return;
429 code = GET_CODE (*loc);
430 if (code == REG && (i = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
431 && lra_get_regno_hard_regno (i) < 0
432 /* We do not want to assign memory for former scratches because
433 it might result in an address reload for some targets. In
434 any case we transform such pseudos not getting hard registers
435 into scratches back. */
436 && ! lra_former_scratch_p (i))
438 if ((hard_reg = spill_hard_reg[i]) != NULL_RTX)
439 *loc = copy_rtx (hard_reg);
440 else
442 rtx x = lra_eliminate_regs_1 (insn, pseudo_slots[i].mem,
443 GET_MODE (pseudo_slots[i].mem),
444 false, false, true);
445 *loc = x != pseudo_slots[i].mem ? x : copy_rtx (x);
447 return;
450 fmt = GET_RTX_FORMAT (code);
451 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
453 if (fmt[i] == 'e')
454 remove_pseudos (&XEXP (*loc, i), insn);
455 else if (fmt[i] == 'E')
457 int j;
459 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
460 remove_pseudos (&XVECEXP (*loc, i, j), insn);
465 /* Convert spilled pseudos into their stack slots or spill hard regs,
466 put insns to process on the constraint stack (that is all insns in
467 which pseudos were changed to memory or spill hard regs). */
468 static void
469 spill_pseudos (void)
471 basic_block bb;
472 rtx_insn *insn;
473 int i;
474 bitmap_head spilled_pseudos, changed_insns;
476 bitmap_initialize (&spilled_pseudos, &reg_obstack);
477 bitmap_initialize (&changed_insns, &reg_obstack);
478 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
480 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
481 && ! lra_former_scratch_p (i))
483 bitmap_set_bit (&spilled_pseudos, i);
484 bitmap_ior_into (&changed_insns, &lra_reg_info[i].insn_bitmap);
487 FOR_EACH_BB_FN (bb, cfun)
489 FOR_BB_INSNS (bb, insn)
490 if (bitmap_bit_p (&changed_insns, INSN_UID (insn)))
492 rtx *link_loc, link;
493 remove_pseudos (&PATTERN (insn), insn);
494 if (CALL_P (insn))
495 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
496 for (link_loc = &REG_NOTES (insn);
497 (link = *link_loc) != NULL_RTX;
498 link_loc = &XEXP (link, 1))
500 switch (REG_NOTE_KIND (link))
502 case REG_FRAME_RELATED_EXPR:
503 case REG_CFA_DEF_CFA:
504 case REG_CFA_ADJUST_CFA:
505 case REG_CFA_OFFSET:
506 case REG_CFA_REGISTER:
507 case REG_CFA_EXPRESSION:
508 case REG_CFA_RESTORE:
509 case REG_CFA_SET_VDRAP:
510 remove_pseudos (&XEXP (link, 0), insn);
511 break;
512 default:
513 break;
516 if (lra_dump_file != NULL)
517 fprintf (lra_dump_file,
518 "Changing spilled pseudos to memory in insn #%u\n",
519 INSN_UID (insn));
520 lra_push_insn (insn);
521 if (lra_reg_spill_p || targetm.different_addr_displacement_p ())
522 lra_set_used_insn_alternative (insn, -1);
524 else if (CALL_P (insn))
525 /* Presence of any pseudo in CALL_INSN_FUNCTION_USAGE does
526 not affect value of insn_bitmap of the corresponding
527 lra_reg_info. That is because we don't need to reload
528 pseudos in CALL_INSN_FUNCTION_USAGEs. So if we process
529 only insns in the insn_bitmap of given pseudo here, we
530 can miss the pseudo in some
531 CALL_INSN_FUNCTION_USAGEs. */
532 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
533 bitmap_and_compl_into (df_get_live_in (bb), &spilled_pseudos);
534 bitmap_and_compl_into (df_get_live_out (bb), &spilled_pseudos);
536 bitmap_clear (&spilled_pseudos);
537 bitmap_clear (&changed_insns);
540 /* Return true if we need to change some pseudos into memory. */
541 bool
542 lra_need_for_spills_p (void)
544 int i; max_regno = max_reg_num ();
546 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
547 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
548 && ! lra_former_scratch_p (i))
549 return true;
550 return false;
553 /* Change spilled pseudos into memory or spill hard regs. Put changed
554 insns on the constraint stack (these insns will be considered on
555 the next constraint pass). The changed insns are all insns in
556 which pseudos were changed. */
557 void
558 lra_spill (void)
560 int i, n, curr_regno;
561 int *pseudo_regnos;
563 regs_num = max_reg_num ();
564 spill_hard_reg = XNEWVEC (rtx, regs_num);
565 pseudo_regnos = XNEWVEC (int, regs_num);
566 for (n = 0, i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
567 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
568 /* We do not want to assign memory for former scratches. */
569 && ! lra_former_scratch_p (i))
571 spill_hard_reg[i] = NULL_RTX;
572 pseudo_regnos[n++] = i;
574 lra_assert (n > 0);
575 pseudo_slots = XNEWVEC (struct pseudo_slot, regs_num);
576 slots = XNEWVEC (struct slot, regs_num);
577 /* Sort regnos according their usage frequencies. */
578 qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare);
579 n = assign_spill_hard_regs (pseudo_regnos, n);
580 assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n);
581 for (i = 0; i < n; i++)
582 if (pseudo_slots[pseudo_regnos[i]].mem == NULL_RTX)
583 assign_mem_slot (pseudo_regnos[i]);
584 if (n > 0 && crtl->stack_alignment_needed)
585 /* If we have a stack frame, we must align it now. The stack size
586 may be a part of the offset computation for register
587 elimination. */
588 assign_stack_local (BLKmode, 0, crtl->stack_alignment_needed);
589 if (lra_dump_file != NULL)
591 for (i = 0; i < slots_num; i++)
593 fprintf (lra_dump_file, " Slot %d regnos (width = %d):", i,
594 GET_MODE_SIZE (GET_MODE (slots[i].mem)));
595 for (curr_regno = slots[i].regno;;
596 curr_regno = pseudo_slots[curr_regno].next - pseudo_slots)
598 fprintf (lra_dump_file, " %d", curr_regno);
599 if (pseudo_slots[curr_regno].next == NULL)
600 break;
602 fprintf (lra_dump_file, "\n");
605 spill_pseudos ();
606 free (slots);
607 free (pseudo_slots);
608 free (pseudo_regnos);
609 free (spill_hard_reg);
612 /* Apply alter_subreg for subregs of regs in *LOC. Use FINAL_P for
613 alter_subreg calls. Return true if any subreg of reg is
614 processed. */
615 static bool
616 alter_subregs (rtx *loc, bool final_p)
618 int i;
619 rtx x = *loc;
620 bool res;
621 const char *fmt;
622 enum rtx_code code;
624 if (x == NULL_RTX)
625 return false;
626 code = GET_CODE (x);
627 if (code == SUBREG && REG_P (SUBREG_REG (x)))
629 lra_assert (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER);
630 alter_subreg (loc, final_p);
631 return true;
633 fmt = GET_RTX_FORMAT (code);
634 res = false;
635 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
637 if (fmt[i] == 'e')
639 if (alter_subregs (&XEXP (x, i), final_p))
640 res = true;
642 else if (fmt[i] == 'E')
644 int j;
646 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
647 if (alter_subregs (&XVECEXP (x, i, j), final_p))
648 res = true;
651 return res;
654 /* Return true if REGNO is used for return in the current
655 function. */
656 static bool
657 return_regno_p (unsigned int regno)
659 rtx outgoing = crtl->return_rtx;
661 if (! outgoing)
662 return false;
664 if (REG_P (outgoing))
665 return REGNO (outgoing) == regno;
666 else if (GET_CODE (outgoing) == PARALLEL)
668 int i;
670 for (i = 0; i < XVECLEN (outgoing, 0); i++)
672 rtx x = XEXP (XVECEXP (outgoing, 0, i), 0);
674 if (REG_P (x) && REGNO (x) == regno)
675 return true;
678 return false;
681 /* Final change of pseudos got hard registers into the corresponding
682 hard registers and removing temporary clobbers. */
683 void
684 lra_final_code_change (void)
686 int i, hard_regno;
687 basic_block bb;
688 rtx_insn *insn, *curr;
689 int max_regno = max_reg_num ();
691 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
692 if (lra_reg_info[i].nrefs != 0
693 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
694 SET_REGNO (regno_reg_rtx[i], hard_regno);
695 FOR_EACH_BB_FN (bb, cfun)
696 FOR_BB_INSNS_SAFE (bb, insn, curr)
697 if (INSN_P (insn))
699 rtx pat = PATTERN (insn);
701 if (GET_CODE (pat) == CLOBBER && LRA_TEMP_CLOBBER_P (pat))
703 /* Remove clobbers temporarily created in LRA. We don't
704 need them anymore and don't want to waste compiler
705 time processing them in a few subsequent passes. */
706 lra_invalidate_insn_data (insn);
707 delete_insn (insn);
708 continue;
711 /* IRA can generate move insns involving pseudos. It is
712 better remove them earlier to speed up compiler a bit.
713 It is also better to do it here as they might not pass
714 final RTL check in LRA, (e.g. insn moving a control
715 register into itself). So remove an useless move insn
716 unless next insn is USE marking the return reg (we should
717 save this as some subsequent optimizations assume that
718 such original insns are saved). */
719 if (NONJUMP_INSN_P (insn) && GET_CODE (pat) == SET
720 && REG_P (SET_SRC (pat)) && REG_P (SET_DEST (pat))
721 && REGNO (SET_SRC (pat)) == REGNO (SET_DEST (pat))
722 && ! return_regno_p (REGNO (SET_SRC (pat))))
724 lra_invalidate_insn_data (insn);
725 delete_insn (insn);
726 continue;
729 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
730 struct lra_static_insn_data *static_id = id->insn_static_data;
731 bool insn_change_p = false;
733 for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
734 if ((DEBUG_INSN_P (insn) || ! static_id->operand[i].is_operator)
735 && alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
737 lra_update_dup (id, i);
738 insn_change_p = true;
740 if (insn_change_p)
741 lra_update_operator_dups (id);