gcc/lra-int.h

   1 /* Local Register Allocator (LRA) intercommunication header file.
   2    Copyright (C) 2010-2014 Free Software Foundation, Inc.
   3    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify it under
   8 the terms of the GNU General Public License as published by the Free
   9 Software Foundation; either version 3, or (at your option) any later
  10 version.
  11
  12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15 for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING3.  If not see
  19 <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_LRA_INT_H
  22 #define GCC_LRA_INT_H
  23
  24 #include "lra.h"
  25 #include "bitmap.h"
  26 #include "recog.h"
  27 #include "insn-attr.h"
  28 #include "insn-codes.h"
  29 #include "insn-config.h"
  30 #include "regs.h"
  31
  32 #define lra_assert(c) gcc_checking_assert (c)
  33
  34 /* The parameter used to prevent infinite reloading for an insn.  Each
  35    insn operands might require a reload and, if it is a memory, its
  36    base and index registers might require a reload too.  */
  37 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
  38
  39 typedef struct lra_live_range *lra_live_range_t;
  40
  41 /* The structure describes program points where a given pseudo lives.
  42    The live ranges can be used to find conflicts with other pseudos.
  43    If the live ranges of two pseudos are intersected, the pseudos are
  44    in conflict.  */
  45 struct lra_live_range
  46 {
  47   /* Pseudo regno whose live range is described by given
  48      structure.  */
  49   int regno;
  50   /* Program point range.  */
  51   int start, finish;
  52   /* Next structure describing program points where the pseudo
  53      lives.  */
  54   lra_live_range_t next;
  55   /* Pointer to structures with the same start.  */
  56   lra_live_range_t start_next;
  57 };
  58
  59 typedef struct lra_copy *lra_copy_t;
  60
  61 /* Copy between pseudos which affects assigning hard registers.  */
  62 struct lra_copy
  63 {
  64   /* True if regno1 is the destination of the copy.  */
  65   bool regno1_dest_p;
  66   /* Execution frequency of the copy.  */
  67   int freq;
  68   /* Pseudos connected by the copy.  REGNO1 < REGNO2.  */
  69   int regno1, regno2;
  70   /* Next copy with correspondingly REGNO1 and REGNO2.  */
  71   lra_copy_t regno1_next, regno2_next;
  72 };
  73
  74 /* Common info about a register (pseudo or hard register).  */
  75 struct lra_reg
  76 {
  77   /* Bitmap of UIDs of insns (including debug insns) referring the
  78      reg.  */
  79   bitmap_head insn_bitmap;
  80   /* The following fields are defined only for pseudos.  */
  81   /* Hard registers with which the pseudo conflicts.  */
  82   HARD_REG_SET conflict_hard_regs;
  83   /* Call used registers with which the pseudo conflicts, taking into account
  84      the registers used by functions called from calls which cross the
  85      pseudo.  */
  86   HARD_REG_SET actual_call_used_reg_set;
  87   /* We assign hard registers to reload pseudos which can occur in few
  88      places.  So two hard register preferences are enough for them.
  89      The following fields define the preferred hard registers.  If
  90      there are no such hard registers the first field value is
  91      negative.  If there is only one preferred hard register, the 2nd
  92      field is negative.  */
  93   int preferred_hard_regno1, preferred_hard_regno2;
  94   /* Profits to use the corresponding preferred hard registers.  If
  95      the both hard registers defined, the first hard register has not
  96      less profit than the second one.  */
  97   int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
  98 #ifdef STACK_REGS
  99   /* True if the pseudo should not be assigned to a stack register.  */
 100   bool no_stack_p;
 101 #endif
 102 #ifdef ENABLE_CHECKING
 103   /* True if the pseudo crosses a call.  It is setup in lra-lives.c
 104      and used to check that the pseudo crossing a call did not get a
 105      call used hard register.  */
 106   bool call_p;
 107 #endif
 108   /* Number of references and execution frequencies of the register in
 109      *non-debug* insns.  */
 110   int nrefs, freq;
 111   int last_reload;
 112   /* Regno used to undo the inheritance.  It can be non-zero only
 113      between couple of inheritance and undo inheritance passes.  */
 114   int restore_regno;
 115   /* Value holding by register.  If the pseudos have the same value
 116      they do not conflict.  */
 117   int val;
 118   /* Offset from relative eliminate register to pesudo reg.  */
 119   int offset;
 120   /* These members are set up in lra-lives.c and updated in
 121      lra-coalesce.c.  */
 122   /* The biggest size mode in which each pseudo reg is referred in
 123      whole function (possibly via subreg).  */
 124   enum machine_mode biggest_mode;
 125   /* Live ranges of the pseudo.  */
 126   lra_live_range_t live_ranges;
 127   /* This member is set up in lra-lives.c for subsequent
 128      assignments.  */
 129   lra_copy_t copies;
 130 };
 131
 132 /* References to the common info about each register.  */
 133 extern struct lra_reg *lra_reg_info;
 134
 135 /* Static info about each insn operand (common for all insns with the
 136    same ICODE).  Warning: if the structure definition is changed, the
 137    initializer for debug_operand_data in lra.c should be changed
 138    too.  */
 139 struct lra_operand_data
 140 {
 141   /* The machine description constraint string of the operand.  */
 142   const char *constraint;
 143   /* It is taken only from machine description (which is different
 144      from recog_data.operand_mode) and can be of VOIDmode.  */
 145   ENUM_BITFIELD(machine_mode) mode : 16;
 146   /* The type of the operand (in/out/inout).  */
 147   ENUM_BITFIELD (op_type) type : 8;
 148   /* Through if accessed through STRICT_LOW.  */
 149   unsigned int strict_low : 1;
 150   /* True if the operand is an operator.  */
 151   unsigned int is_operator : 1;
 152   /* True if there is an early clobber alternative for this operand.
 153      This field is set up every time when corresponding
 154      operand_alternative in lra_static_insn_data is set up.  */
 155   unsigned int early_clobber : 1;
 156   /* True if the operand is an address.  */
 157   unsigned int is_address : 1;
 158 };
 159
 160 /* Info about register occurrence in an insn.  */
 161 struct lra_insn_reg
 162 {
 163   /* The biggest mode through which the insn refers to the register
 164      occurrence (remember the register can be accessed through a
 165      subreg in the insn).  */
 166   ENUM_BITFIELD(machine_mode) biggest_mode : 16;
 167   /* The type of the corresponding operand which is the register.  */
 168   ENUM_BITFIELD (op_type) type : 8;
 169   /* True if the reg is accessed through a subreg and the subreg is
 170      just a part of the register.  */
 171   unsigned int subreg_p : 1;
 172   /* True if there is an early clobber alternative for this
 173      operand.  */
 174   unsigned int early_clobber : 1;
 175   /* The corresponding regno of the register.  */
 176   int regno;
 177   /* Next reg info of the same insn.  */
 178   struct lra_insn_reg *next;
 179 };
 180
 181 /* Static part (common info for insns with the same ICODE) of LRA
 182    internal insn info. It exists in at most one exemplar for each
 183    non-negative ICODE. There is only one exception. Each asm insn has
 184    own structure.  Warning: if the structure definition is changed,
 185    the initializer for debug_insn_static_data in lra.c should be
 186    changed too.  */
 187 struct lra_static_insn_data
 188 {
 189   /* Static info about each insn operand.  */
 190   struct lra_operand_data *operand;
 191   /* Each duplication refers to the number of the corresponding
 192      operand which is duplicated.  */
 193   int *dup_num;
 194   /* The number of an operand marked as commutative, -1 otherwise.  */
 195   int commutative;
 196   /* Number of operands, duplications, and alternatives of the
 197      insn.  */
 198   char n_operands;
 199   char n_dups;
 200   char n_alternatives;
 201   /* Insns in machine description (or clobbers in asm) may contain
 202      explicit hard regs which are not operands.  The following list
 203      describes such hard registers.  */
 204   struct lra_insn_reg *hard_regs;
 205   /* Array [n_alternatives][n_operand] of static constraint info for
 206      given operand in given alternative.  This info can be changed if
 207      the target reg info is changed.  */
 208   const struct operand_alternative *operand_alternative;
 209 };
 210
 211 /* LRA internal info about an insn (LRA internal insn
 212    representation).  */
 213 struct lra_insn_recog_data
 214 {
 215   /* The insn code.  */
 216   int icode;
 217   /* The alternative should be used for the insn, -1 if invalid, or we
 218      should try to use any alternative, or the insn is a debug
 219      insn.  */
 220   int used_insn_alternative;
 221   /* SP offset before the insn relative to one at the func start.  */
 222   HOST_WIDE_INT sp_offset;
 223   /* The insn itself.  */
 224   rtx_insn *insn;
 225   /* Common data for insns with the same ICODE.  Asm insns (their
 226      ICODE is negative) do not share such structures.  */
 227   struct lra_static_insn_data *insn_static_data;
 228   /* Two arrays of size correspondingly equal to the operand and the
 229      duplication numbers: */
 230   rtx **operand_loc; /* The operand locations, NULL if no operands.  */
 231   rtx **dup_loc; /* The dup locations, NULL if no dups.  */
 232   /* Number of hard registers implicitly used in given call insn.  The
 233      value can be NULL or points to array of the hard register numbers
 234      ending with a negative value.  */
 235   int *arg_hard_regs;
 236   /* Alternative enabled for the insn.  NULL for debug insns.  */
 237   alternative_mask enabled_alternatives;
 238   /* The following member value is always NULL for a debug insn.  */
 239   struct lra_insn_reg *regs;
 240 };
 241
 242 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
 243
 244 /* Whether the clobber is used temporary in LRA.  */
 245 #define LRA_TEMP_CLOBBER_P(x) \
 246   (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
 247
 248 /* Cost factor for each additional reload and maximal cost reject for
 249    insn reloads.  One might ask about such strange numbers.  Their
 250    values occurred historically from former reload pass.  */
 251 #define LRA_LOSER_COST_FACTOR 6
 252 #define LRA_MAX_REJECT 600
 253
 254 /* Maximum allowed number of assignment pass iterations after the
 255    latest spill pass when any former reload pseudo was spilled.  It is
 256    for preventing LRA cycling in a bug case.  */
 257 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
 258
 259 /* The maximal number of inheritance/split passes in LRA.  It should
 260    be more 1 in order to perform caller saves transformations and much
 261    less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
 262    as permitted constraint passes in some complicated cases.  The
 263    first inheritance/split pass has a biggest impact on generated code
 264    quality.  Each subsequent affects generated code in less degree.
 265    For example, the 3rd pass does not change generated SPEC2000 code
 266    at all on x86-64.  */
 267 #define LRA_MAX_INHERITANCE_PASSES 2
 268
 269 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
 270     || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
 271 #error wrong LRA_MAX_INHERITANCE_PASSES value
 272 #endif
 273
 274 /* lra.c: */
 275
 276 extern FILE *lra_dump_file;
 277
 278 extern bool lra_reg_spill_p;
 279
 280 extern HARD_REG_SET lra_no_alloc_regs;
 281
 282 extern int lra_insn_recog_data_len;
 283 extern lra_insn_recog_data_t *lra_insn_recog_data;
 284
 285 extern int lra_curr_reload_num;
 286
 287 extern void lra_push_insn (rtx_insn *);
 288 extern void lra_push_insn_by_uid (unsigned int);
 289 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
 290 extern rtx_insn *lra_pop_insn (void);
 291 extern unsigned int lra_insn_stack_length (void);
 292
 293 extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
 294                                                  enum reg_class, const char *);
 295 extern void lra_set_regno_unique_value (int);
 296 extern void lra_invalidate_insn_data (rtx_insn *);
 297 extern void lra_set_insn_deleted (rtx_insn *);
 298 extern void lra_delete_dead_insn (rtx_insn *);
 299 extern void lra_emit_add (rtx, rtx, rtx);
 300 extern void lra_emit_move (rtx, rtx);
 301 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 302
 303 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
 304                                    const char *);
 305
 306 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
 307 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
 308 extern void lra_set_used_insn_alternative (rtx_insn *, int);
 309 extern void lra_set_used_insn_alternative_by_uid (int, int);
 310
 311 extern void lra_invalidate_insn_regno_info (rtx_insn *);
 312 extern void lra_update_insn_regno_info (rtx_insn *);
 313 extern struct lra_insn_reg *lra_get_insn_regs (int);
 314
 315 extern void lra_free_copies (void);
 316 extern void lra_create_copy (int, int, int);
 317 extern lra_copy_t lra_get_copy (int);
 318 extern bool lra_former_scratch_p (int);
 319 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
 320
 321 extern int lra_new_regno_start;
 322 extern int lra_constraint_new_regno_start;
 323 extern bitmap_head lra_inheritance_pseudos;
 324 extern bitmap_head lra_split_regs;
 325 extern bitmap_head lra_subreg_reload_pseudos;
 326 extern bitmap_head lra_optional_reload_pseudos;
 327 extern int lra_constraint_new_insn_uid_start;
 328
 329 /* lra-constraints.c: */
 330
 331 extern void lra_init_equiv (void);
 332 extern int lra_constraint_offset (int, enum machine_mode);
 333
 334 extern int lra_constraint_iter;
 335 extern bool lra_risky_transformations_p;
 336 extern int lra_inheritance_iter;
 337 extern int lra_undo_inheritance_iter;
 338 extern bool lra_constraints (bool);
 339 extern void lra_constraints_init (void);
 340 extern void lra_constraints_finish (void);
 341 extern void lra_inheritance (void);
 342 extern bool lra_undo_inheritance (void);
 343
 344 /* lra-lives.c: */
 345
 346 extern int lra_live_max_point;
 347 extern int *lra_point_freq;
 348
 349 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
 350
 351 extern int lra_live_range_iter;
 352 extern void lra_create_live_ranges (bool);
 353 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
 354 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
 355                                                lra_live_range_t);
 356 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
 357                                            lra_live_range_t);
 358 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
 359 extern void debug (lra_live_range &ref);
 360 extern void debug (lra_live_range *ptr);
 361 extern void lra_debug_live_range_list (lra_live_range_t);
 362 extern void lra_debug_pseudo_live_ranges (int);
 363 extern void lra_debug_live_ranges (void);
 364 extern void lra_clear_live_ranges (void);
 365 extern void lra_live_ranges_init (void);
 366 extern void lra_live_ranges_finish (void);
 367 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
 368
 369 /* lra-assigns.c: */
 370
 371 extern int lra_assignment_iter;
 372 extern int lra_assignment_iter_after_spill;
 373 extern void lra_setup_reg_renumber (int, int, bool);
 374 extern bool lra_assign (void);
 375
 376
 377 /* lra-coalesce.c: */
 378
 379 extern int lra_coalesce_iter;
 380 extern bool lra_coalesce (void);
 381
 382 /* lra-spills.c:  */
 383
 384 extern bool lra_need_for_spills_p (void);
 385 extern void lra_spill (void);
 386 extern void lra_final_code_change (void);
 387
 388
 389 /* lra-elimination.c: */
 390
 391 extern void lra_debug_elim_table (void);
 392 extern int lra_get_elimination_hard_regno (int);
 393 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, enum machine_mode, bool,
 394                                  bool, bool);
 395 extern void lra_eliminate (bool, bool);
 396
 397 extern void lra_eliminate_reg_if_possible (rtx *);
 398
 399 \f
 400
 401 /* Return the hard register which given pseudo REGNO assigned to.
 402    Negative value means that the register got memory or we don't know
 403    allocation yet.  */
 404 static inline int
 405 lra_get_regno_hard_regno (int regno)
 406 {
 407   resize_reg_info ();
 408   return reg_renumber[regno];
 409 }
 410
 411 /* Change class of pseudo REGNO to NEW_CLASS.  Print info about it
 412    using TITLE.  Output a new line if NL_P.  */
 413 static void inline
 414 lra_change_class (int regno, enum reg_class new_class,
 415                   const char *title, bool nl_p)
 416 {
 417   lra_assert (regno >= FIRST_PSEUDO_REGISTER);
 418   if (lra_dump_file != NULL)
 419     fprintf (lra_dump_file, "%s class %s for r%d",
 420              title, reg_class_names[new_class], regno);
 421   setup_reg_classes (regno, new_class, NO_REGS, new_class);
 422   if (lra_dump_file != NULL && nl_p)
 423     fprintf (lra_dump_file, "\n");
 424 }
 425
 426 /* Update insn operands which are duplication of NOP operand.  The
 427    insn is represented by its LRA internal representation ID.  */
 428 static inline void
 429 lra_update_dup (lra_insn_recog_data_t id, int nop)
 430 {
 431   int i;
 432   struct lra_static_insn_data *static_id = id->insn_static_data;
 433
 434   for (i = 0; i < static_id->n_dups; i++)
 435     if (static_id->dup_num[i] == nop)
 436       *id->dup_loc[i] = *id->operand_loc[nop];
 437 }
 438
 439 /* Process operator duplications in insn with ID.  We do it after the
 440    operands processing.  Generally speaking, we could do this probably
 441    simultaneously with operands processing because a common practice
 442    is to enumerate the operators after their operands.  */
 443 static inline void
 444 lra_update_operator_dups (lra_insn_recog_data_t id)
 445 {
 446   int i;
 447   struct lra_static_insn_data *static_id = id->insn_static_data;
 448
 449   for (i = 0; i < static_id->n_dups; i++)
 450     {
 451       int ndup = static_id->dup_num[i];
 452
 453       if (static_id->operand[ndup].is_operator)
 454         *id->dup_loc[i] = *id->operand_loc[ndup];
 455     }
 456 }
 457
 458 /* Return info about INSN.  Set up the info if it is not done yet.  */
 459 static inline lra_insn_recog_data_t
 460 lra_get_insn_recog_data (rtx_insn *insn)
 461 {
 462   lra_insn_recog_data_t data;
 463   unsigned int uid = INSN_UID (insn);
 464
 465   if (lra_insn_recog_data_len > (int) uid
 466       && (data = lra_insn_recog_data[uid]) != NULL)
 467     {
 468       /* Check that we did not change insn without updating the insn
 469          info.  */
 470       lra_assert (data->insn == insn
 471                   && (INSN_CODE (insn) < 0
 472                       || data->icode == INSN_CODE (insn)));
 473       return data;
 474     }
 475   return lra_set_insn_recog_data (insn);
 476 }
 477
 478 /* Update offset from pseudos with VAL by INCR.  */
 479 static inline void
 480 lra_update_reg_val_offset (int val, int incr)
 481 {
 482   int i;
 483
 484   for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
 485     {
 486       if (lra_reg_info[i].val == val)
 487         lra_reg_info[i].offset += incr;
 488     }
 489 }
 490
 491 /* Return true if register content is equal to VAL with OFFSET.  */
 492 static inline bool
 493 lra_reg_val_equal_p (int regno, int val, int offset)
 494 {
 495   if (lra_reg_info[regno].val == val
 496       && lra_reg_info[regno].offset == offset)
 497     return true;
 498
 499   return false;
 500 }
 501
 502 /* Assign value of register FROM to TO.  */
 503 static inline void
 504 lra_assign_reg_val (int from, int to)
 505 {
 506   lra_reg_info[to].val = lra_reg_info[from].val;
 507   lra_reg_info[to].offset = lra_reg_info[from].offset;
 508 }
 509
 510 #endif /* GCC_LRA_INT_H */