2011-11-04 Tom de Vries <tom@codesourcery.com>
[official-gcc.git] / gcc / ira-int.h
blob1db9b411e0b160007e719385025d90fd3addda75
1 /* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "cfgloop.h"
23 #include "ira.h"
24 #include "alloc-pool.h"
26 /* To provide consistency in naming, all IRA external variables,
27 functions, common typedefs start with prefix ira_. */
29 #ifdef ENABLE_CHECKING
30 #define ENABLE_IRA_CHECKING
31 #endif
33 #ifdef ENABLE_IRA_CHECKING
34 #define ira_assert(c) gcc_assert (c)
35 #else
36 /* Always define and include C, so that warnings for empty body in an
37 ‘if’ statement and unused variable do not occur. */
38 #define ira_assert(c) ((void)(0 && (c)))
39 #endif
41 /* Compute register frequency from edge frequency FREQ. It is
42 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
43 profile driven feedback is available and the function is never
44 executed, frequency is always equivalent. Otherwise rescale the
45 edge frequency. */
46 #define REG_FREQ_FROM_EDGE_FREQ(freq) \
47 (optimize_size || (flag_branch_probabilities && !ENTRY_BLOCK_PTR->count) \
48 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
49 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51 /* All natural loops. */
52 extern struct loops ira_loops;
54 /* A modified value of flag `-fira-verbose' used internally. */
55 extern int internal_flag_ira_verbose;
57 /* Dump file of the allocator if it is not NULL. */
58 extern FILE *ira_dump_file;
60 /* Typedefs for pointers to allocno live range, allocno, and copy of
61 allocnos. */
62 typedef struct live_range *live_range_t;
63 typedef struct ira_allocno *ira_allocno_t;
64 typedef struct ira_allocno_copy *ira_copy_t;
65 typedef struct ira_object *ira_object_t;
67 /* Definition of vector of allocnos and copies. */
68 DEF_VEC_P(ira_allocno_t);
69 DEF_VEC_ALLOC_P(ira_allocno_t, heap);
70 DEF_VEC_P(ira_object_t);
71 DEF_VEC_ALLOC_P(ira_object_t, heap);
72 DEF_VEC_P(ira_copy_t);
73 DEF_VEC_ALLOC_P(ira_copy_t, heap);
75 /* Typedef for pointer to the subsequent structure. */
76 typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
78 /* In general case, IRA is a regional allocator. The regions are
79 nested and form a tree. Currently regions are natural loops. The
80 following structure describes loop tree node (representing basic
81 block or loop). We need such tree because the loop tree from
82 cfgloop.h is not convenient for the optimization: basic blocks are
83 not a part of the tree from cfgloop.h. We also use the nodes for
84 storing additional information about basic blocks/loops for the
85 register allocation purposes. */
86 struct ira_loop_tree_node
88 /* The node represents basic block if children == NULL. */
89 basic_block bb; /* NULL for loop. */
90 struct loop *loop; /* NULL for BB. */
91 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
92 SUBLOOP_NEXT is always NULL for BBs. */
93 ira_loop_tree_node_t subloop_next, next;
94 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
95 the node. They are NULL for BBs. */
96 ira_loop_tree_node_t subloops, children;
97 /* The node immediately containing given node. */
98 ira_loop_tree_node_t parent;
100 /* Loop level in range [0, ira_loop_tree_height). */
101 int level;
103 /* All the following members are defined only for nodes representing
104 loops. */
106 /* True if the loop was marked for removal from the register
107 allocation. */
108 bool to_remove_p;
110 /* Allocnos in the loop corresponding to their regnos. If it is
111 NULL the loop does not form a separate register allocation region
112 (e.g. because it has abnormal enter/exit edges and we can not put
113 code for register shuffling on the edges if a different
114 allocation is used for a pseudo-register on different sides of
115 the edges). Caps are not in the map (remember we can have more
116 one cap with the same regno in a region). */
117 ira_allocno_t *regno_allocno_map;
119 /* True if there is an entry to given loop not from its parent (or
120 grandparent) basic block. For example, it is possible for two
121 adjacent loops inside another loop. */
122 bool entered_from_non_parent_p;
124 /* Maximal register pressure inside loop for given register class
125 (defined only for the pressure classes). */
126 int reg_pressure[N_REG_CLASSES];
128 /* Numbers of allocnos referred or living in the loop node (except
129 for its subloops). */
130 bitmap all_allocnos;
132 /* Numbers of allocnos living at the loop borders. */
133 bitmap border_allocnos;
135 /* Regnos of pseudos modified in the loop node (including its
136 subloops). */
137 bitmap modified_regnos;
139 /* Numbers of copies referred in the corresponding loop. */
140 bitmap local_copies;
143 /* The root of the loop tree corresponding to the all function. */
144 extern ira_loop_tree_node_t ira_loop_tree_root;
146 /* Height of the loop tree. */
147 extern int ira_loop_tree_height;
149 /* All nodes representing basic blocks are referred through the
150 following array. We can not use basic block member `aux' for this
151 because it is used for insertion of insns on edges. */
152 extern ira_loop_tree_node_t ira_bb_nodes;
154 /* Two access macros to the nodes representing basic blocks. */
155 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
156 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
157 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
158 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
160 fprintf (stderr, \
161 "\n%s: %d: error in %s: it is not a block node\n", \
162 __FILE__, __LINE__, __FUNCTION__); \
163 gcc_unreachable (); \
165 _node; }))
166 #else
167 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
168 #endif
170 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
172 /* All nodes representing loops are referred through the following
173 array. */
174 extern ira_loop_tree_node_t ira_loop_nodes;
176 /* Two access macros to the nodes representing loops. */
177 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
178 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
179 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]);\
180 if (_node->children == NULL || _node->bb != NULL || _node->loop == NULL)\
182 fprintf (stderr, \
183 "\n%s: %d: error in %s: it is not a loop node\n", \
184 __FILE__, __LINE__, __FUNCTION__); \
185 gcc_unreachable (); \
187 _node; }))
188 #else
189 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
190 #endif
192 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
195 /* The structure describes program points where a given allocno lives.
196 If the live ranges of two allocnos are intersected, the allocnos
197 are in conflict. */
198 struct live_range
200 /* Object whose live range is described by given structure. */
201 ira_object_t object;
202 /* Program point range. */
203 int start, finish;
204 /* Next structure describing program points where the allocno
205 lives. */
206 live_range_t next;
207 /* Pointer to structures with the same start/finish. */
208 live_range_t start_next, finish_next;
211 /* Program points are enumerated by numbers from range
212 0..IRA_MAX_POINT-1. There are approximately two times more program
213 points than insns. Program points are places in the program where
214 liveness info can be changed. In most general case (there are more
215 complicated cases too) some program points correspond to places
216 where input operand dies and other ones correspond to places where
217 output operands are born. */
218 extern int ira_max_point;
220 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
221 live ranges with given start/finish point. */
222 extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
224 /* A structure representing conflict information for an allocno
225 (or one of its subwords). */
226 struct ira_object
228 /* The allocno associated with this record. */
229 ira_allocno_t allocno;
230 /* Vector of accumulated conflicting conflict_redords with NULL end
231 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
232 otherwise. */
233 void *conflicts_array;
234 /* Pointer to structures describing at what program point the
235 object lives. We always maintain the list in such way that *the
236 ranges in the list are not intersected and ordered by decreasing
237 their program points*. */
238 live_range_t live_ranges;
239 /* The subword within ALLOCNO which is represented by this object.
240 Zero means the lowest-order subword (or the entire allocno in case
241 it is not being tracked in subwords). */
242 int subword;
243 /* Allocated size of the conflicts array. */
244 unsigned int conflicts_array_size;
245 /* A unique number for every instance of this structure, which is used
246 to represent it in conflict bit vectors. */
247 int id;
248 /* Before building conflicts, MIN and MAX are initialized to
249 correspondingly minimal and maximal points of the accumulated
250 live ranges. Afterwards, they hold the minimal and maximal ids
251 of other ira_objects that this one can conflict with. */
252 int min, max;
253 /* Initial and accumulated hard registers conflicting with this
254 object and as a consequences can not be assigned to the allocno.
255 All non-allocatable hard regs and hard regs of register classes
256 different from given allocno one are included in the sets. */
257 HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
258 /* Number of accumulated conflicts in the vector of conflicting
259 objects. */
260 int num_accumulated_conflicts;
261 /* TRUE if conflicts are represented by a vector of pointers to
262 ira_object structures. Otherwise, we use a bit vector indexed
263 by conflict ID numbers. */
264 unsigned int conflict_vec_p : 1;
265 /* Different additional data. It is used to decrease size of
266 allocno data footprint. */
267 void *add_data;
270 /* A structure representing an allocno (allocation entity). Allocno
271 represents a pseudo-register in an allocation region. If
272 pseudo-register does not live in a region but it lives in the
273 nested regions, it is represented in the region by special allocno
274 called *cap*. There may be more one cap representing the same
275 pseudo-register in region. It means that the corresponding
276 pseudo-register lives in more one non-intersected subregion. */
277 struct ira_allocno
279 /* The allocno order number starting with 0. Each allocno has an
280 unique number and the number is never changed for the
281 allocno. */
282 int num;
283 /* Regno for allocno or cap. */
284 int regno;
285 /* Mode of the allocno which is the mode of the corresponding
286 pseudo-register. */
287 ENUM_BITFIELD (machine_mode) mode : 8;
288 /* Register class which should be used for allocation for given
289 allocno. NO_REGS means that we should use memory. */
290 ENUM_BITFIELD (reg_class) aclass : 16;
291 /* During the reload, value TRUE means that we should not reassign a
292 hard register to the allocno got memory earlier. It is set up
293 when we removed memory-memory move insn before each iteration of
294 the reload. */
295 unsigned int dont_reassign_p : 1;
296 #ifdef STACK_REGS
297 /* Set to TRUE if allocno can't be assigned to the stack hard
298 register correspondingly in this region and area including the
299 region and all its subregions recursively. */
300 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
301 #endif
302 /* TRUE value means that there is no sense to spill the allocno
303 during coloring because the spill will result in additional
304 reloads in reload pass. */
305 unsigned int bad_spill_p : 1;
306 /* TRUE if a hard register or memory has been assigned to the
307 allocno. */
308 unsigned int assigned_p : 1;
309 /* TRUE if conflicts for given allocno are represented by vector of
310 pointers to the conflicting allocnos. Otherwise, we use a bit
311 vector where a bit with given index represents allocno with the
312 same number. */
313 unsigned int conflict_vec_p : 1;
314 /* Hard register assigned to given allocno. Negative value means
315 that memory was allocated to the allocno. During the reload,
316 spilled allocno has value equal to the corresponding stack slot
317 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
318 reload (at this point pseudo-register has only one allocno) which
319 did not get stack slot yet. */
320 short int hard_regno;
321 /* Allocnos with the same regno are linked by the following member.
322 Allocnos corresponding to inner loops are first in the list (it
323 corresponds to depth-first traverse of the loops). */
324 ira_allocno_t next_regno_allocno;
325 /* There may be different allocnos with the same regno in different
326 regions. Allocnos are bound to the corresponding loop tree node.
327 Pseudo-register may have only one regular allocno with given loop
328 tree node but more than one cap (see comments above). */
329 ira_loop_tree_node_t loop_tree_node;
330 /* Accumulated usage references of the allocno. Here and below,
331 word 'accumulated' means info for given region and all nested
332 subregions. In this case, 'accumulated' means sum of references
333 of the corresponding pseudo-register in this region and in all
334 nested subregions recursively. */
335 int nrefs;
336 /* Accumulated frequency of usage of the allocno. */
337 int freq;
338 /* Minimal accumulated and updated costs of usage register of the
339 allocno class. */
340 int class_cost, updated_class_cost;
341 /* Minimal accumulated, and updated costs of memory for the allocno.
342 At the allocation start, the original and updated costs are
343 equal. The updated cost may be changed after finishing
344 allocation in a region and starting allocation in a subregion.
345 The change reflects the cost of spill/restore code on the
346 subregion border if we assign memory to the pseudo in the
347 subregion. */
348 int memory_cost, updated_memory_cost;
349 /* Accumulated number of points where the allocno lives and there is
350 excess pressure for its class. Excess pressure for a register
351 class at some point means that there are more allocnos of given
352 register class living at the point than number of hard-registers
353 of the class available for the allocation. */
354 int excess_pressure_points_num;
355 /* Copies to other non-conflicting allocnos. The copies can
356 represent move insn or potential move insn usually because of two
357 operand insn constraints. */
358 ira_copy_t allocno_copies;
359 /* It is a allocno (cap) representing given allocno on upper loop tree
360 level. */
361 ira_allocno_t cap;
362 /* It is a link to allocno (cap) on lower loop level represented by
363 given cap. Null if given allocno is not a cap. */
364 ira_allocno_t cap_member;
365 /* The number of objects tracked in the following array. */
366 int num_objects;
367 /* An array of structures describing conflict information and live
368 ranges for each object associated with the allocno. There may be
369 more than one such object in cases where the allocno represents a
370 multi-word register. */
371 ira_object_t objects[2];
372 /* Accumulated frequency of calls which given allocno
373 intersects. */
374 int call_freq;
375 /* Accumulated number of the intersected calls. */
376 int calls_crossed_num;
377 /* Array of usage costs (accumulated and the one updated during
378 coloring) for each hard register of the allocno class. The
379 member value can be NULL if all costs are the same and equal to
380 CLASS_COST. For example, the costs of two different hard
381 registers can be different if one hard register is callee-saved
382 and another one is callee-used and the allocno lives through
383 calls. Another example can be case when for some insn the
384 corresponding pseudo-register value should be put in specific
385 register class (e.g. AREG for x86) which is a strict subset of
386 the allocno class (GENERAL_REGS for x86). We have updated costs
387 to reflect the situation when the usage cost of a hard register
388 is decreased because the allocno is connected to another allocno
389 by a copy and the another allocno has been assigned to the hard
390 register. */
391 int *hard_reg_costs, *updated_hard_reg_costs;
392 /* Array of decreasing costs (accumulated and the one updated during
393 coloring) for allocnos conflicting with given allocno for hard
394 regno of the allocno class. The member value can be NULL if all
395 costs are the same. These costs are used to reflect preferences
396 of other allocnos not assigned yet during assigning to given
397 allocno. */
398 int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
399 /* Different additional data. It is used to decrease size of
400 allocno data footprint. */
401 void *add_data;
405 /* All members of the allocno structures should be accessed only
406 through the following macros. */
407 #define ALLOCNO_NUM(A) ((A)->num)
408 #define ALLOCNO_REGNO(A) ((A)->regno)
409 #define ALLOCNO_REG(A) ((A)->reg)
410 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
411 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
412 #define ALLOCNO_CAP(A) ((A)->cap)
413 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
414 #define ALLOCNO_NREFS(A) ((A)->nrefs)
415 #define ALLOCNO_FREQ(A) ((A)->freq)
416 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
417 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
418 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
419 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
420 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
421 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
422 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
423 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
424 #ifdef STACK_REGS
425 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
426 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
427 #endif
428 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
429 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
430 #define ALLOCNO_MODE(A) ((A)->mode)
431 #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
432 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
433 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
434 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
435 ((A)->conflict_hard_reg_costs)
436 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
437 ((A)->updated_conflict_hard_reg_costs)
438 #define ALLOCNO_CLASS(A) ((A)->aclass)
439 #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
440 #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
441 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
442 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
443 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
444 ((A)->excess_pressure_points_num)
445 #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
446 #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
447 #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
449 /* Typedef for pointer to the subsequent structure. */
450 typedef struct ira_emit_data *ira_emit_data_t;
452 /* Allocno bound data used for emit pseudo live range split insns and
453 to flattening IR. */
454 struct ira_emit_data
456 /* TRUE if the allocno assigned to memory was a destination of
457 removed move (see ira-emit.c) at loop exit because the value of
458 the corresponding pseudo-register is not changed inside the
459 loop. */
460 unsigned int mem_optimized_dest_p : 1;
461 /* TRUE if the corresponding pseudo-register has disjoint live
462 ranges and the other allocnos of the pseudo-register except this
463 one changed REG. */
464 unsigned int somewhere_renamed_p : 1;
465 /* TRUE if allocno with the same REGNO in a subregion has been
466 renamed, in other words, got a new pseudo-register. */
467 unsigned int child_renamed_p : 1;
468 /* Final rtx representation of the allocno. */
469 rtx reg;
470 /* Non NULL if we remove restoring value from given allocno to
471 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the
472 allocno value is not changed inside the loop. */
473 ira_allocno_t mem_optimized_dest;
476 #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
478 /* Data used to emit live range split insns and to flattening IR. */
479 extern ira_emit_data_t ira_allocno_emit_data;
481 /* Abbreviation for frequent emit data access. */
482 static inline rtx
483 allocno_emit_reg (ira_allocno_t a)
485 return ALLOCNO_EMIT_DATA (a)->reg;
488 #define OBJECT_ALLOCNO(O) ((O)->allocno)
489 #define OBJECT_SUBWORD(O) ((O)->subword)
490 #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
491 #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
492 #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
493 #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
494 #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
495 #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
496 #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
497 #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
498 #define OBJECT_MIN(O) ((O)->min)
499 #define OBJECT_MAX(O) ((O)->max)
500 #define OBJECT_CONFLICT_ID(O) ((O)->id)
501 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
502 #define OBJECT_ADD_DATA(O) ((O)->add_data)
504 /* Map regno -> allocnos with given regno (see comments for
505 allocno member `next_regno_allocno'). */
506 extern ira_allocno_t *ira_regno_allocno_map;
508 /* Array of references to all allocnos. The order number of the
509 allocno corresponds to the index in the array. Removed allocnos
510 have NULL element value. */
511 extern ira_allocno_t *ira_allocnos;
513 /* The size of the previous array. */
514 extern int ira_allocnos_num;
516 /* Map a conflict id to its corresponding ira_object structure. */
517 extern ira_object_t *ira_object_id_map;
519 /* The size of the previous array. */
520 extern int ira_objects_num;
522 /* The following structure represents a copy of two allocnos. The
523 copies represent move insns or potential move insns usually because
524 of two operand insn constraints. To remove register shuffle, we
525 also create copies between allocno which is output of an insn and
526 allocno becoming dead in the insn. */
527 struct ira_allocno_copy
529 /* The unique order number of the copy node starting with 0. */
530 int num;
531 /* Allocnos connected by the copy. The first allocno should have
532 smaller order number than the second one. */
533 ira_allocno_t first, second;
534 /* Execution frequency of the copy. */
535 int freq;
536 bool constraint_p;
537 /* It is a move insn which is an origin of the copy. The member
538 value for the copy representing two operand insn constraints or
539 for the copy created to remove register shuffle is NULL. In last
540 case the copy frequency is smaller than the corresponding insn
541 execution frequency. */
542 rtx insn;
543 /* All copies with the same allocno as FIRST are linked by the two
544 following members. */
545 ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
546 /* All copies with the same allocno as SECOND are linked by the two
547 following members. */
548 ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
549 /* Region from which given copy is originated. */
550 ira_loop_tree_node_t loop_tree_node;
553 /* Array of references to all copies. The order number of the copy
554 corresponds to the index in the array. Removed copies have NULL
555 element value. */
556 extern ira_copy_t *ira_copies;
558 /* Size of the previous array. */
559 extern int ira_copies_num;
561 /* The following structure describes a stack slot used for spilled
562 pseudo-registers. */
563 struct ira_spilled_reg_stack_slot
565 /* pseudo-registers assigned to the stack slot. */
566 bitmap_head spilled_regs;
567 /* RTL representation of the stack slot. */
568 rtx mem;
569 /* Size of the stack slot. */
570 unsigned int width;
573 /* The number of elements in the following array. */
574 extern int ira_spilled_reg_stack_slots_num;
576 /* The following array contains info about spilled pseudo-registers
577 stack slots used in current function so far. */
578 extern struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
580 /* Correspondingly overall cost of the allocation, cost of the
581 allocnos assigned to hard-registers, cost of the allocnos assigned
582 to memory, cost of loads, stores and register move insns generated
583 for pseudo-register live range splitting (see ira-emit.c). */
584 extern int ira_overall_cost;
585 extern int ira_reg_cost, ira_mem_cost;
586 extern int ira_load_cost, ira_store_cost, ira_shuffle_cost;
587 extern int ira_move_loops_num, ira_additional_jumps_num;
590 /* This page contains a bitset implementation called 'min/max sets' used to
591 record conflicts in IRA.
592 They are named min/maxs set since we keep track of a minimum and a maximum
593 bit number for each set representing the bounds of valid elements. Otherwise,
594 the implementation resembles sbitmaps in that we store an array of integers
595 whose bits directly represent the members of the set. */
597 /* The type used as elements in the array, and the number of bits in
598 this type. */
600 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
601 #define IRA_INT_TYPE HOST_WIDE_INT
603 /* Set, clear or test bit number I in R, a bit vector of elements with
604 minimal index and maximal index equal correspondingly to MIN and
605 MAX. */
606 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
608 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
609 (({ int _min = (MIN), _max = (MAX), _i = (I); \
610 if (_i < _min || _i > _max) \
612 fprintf (stderr, \
613 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
614 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
615 gcc_unreachable (); \
617 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
618 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
621 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
622 (({ int _min = (MIN), _max = (MAX), _i = (I); \
623 if (_i < _min || _i > _max) \
625 fprintf (stderr, \
626 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
627 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
628 gcc_unreachable (); \
630 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
631 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
633 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
634 (({ int _min = (MIN), _max = (MAX), _i = (I); \
635 if (_i < _min || _i > _max) \
637 fprintf (stderr, \
638 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
639 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
640 gcc_unreachable (); \
642 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
643 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
645 #else
647 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
648 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
649 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
651 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
652 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
653 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
655 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
656 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
657 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
659 #endif
661 /* The iterator for min/max sets. */
662 typedef struct {
664 /* Array containing the bit vector. */
665 IRA_INT_TYPE *vec;
667 /* The number of the current element in the vector. */
668 unsigned int word_num;
670 /* The number of bits in the bit vector. */
671 unsigned int nel;
673 /* The current bit index of the bit vector. */
674 unsigned int bit_num;
676 /* Index corresponding to the 1st bit of the bit vector. */
677 int start_val;
679 /* The word of the bit vector currently visited. */
680 unsigned IRA_INT_TYPE word;
681 } minmax_set_iterator;
683 /* Initialize the iterator I for bit vector VEC containing minimal and
684 maximal values MIN and MAX. */
685 static inline void
686 minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min,
687 int max)
689 i->vec = vec;
690 i->word_num = 0;
691 i->nel = max < min ? 0 : max - min + 1;
692 i->start_val = min;
693 i->bit_num = 0;
694 i->word = i->nel == 0 ? 0 : vec[0];
697 /* Return TRUE if we have more allocnos to visit, in which case *N is
698 set to the number of the element to be visited. Otherwise, return
699 FALSE. */
700 static inline bool
701 minmax_set_iter_cond (minmax_set_iterator *i, int *n)
703 /* Skip words that are zeros. */
704 for (; i->word == 0; i->word = i->vec[i->word_num])
706 i->word_num++;
707 i->bit_num = i->word_num * IRA_INT_BITS;
709 /* If we have reached the end, break. */
710 if (i->bit_num >= i->nel)
711 return false;
714 /* Skip bits that are zero. */
715 for (; (i->word & 1) == 0; i->word >>= 1)
716 i->bit_num++;
718 *n = (int) i->bit_num + i->start_val;
720 return true;
723 /* Advance to the next element in the set. */
724 static inline void
725 minmax_set_iter_next (minmax_set_iterator *i)
727 i->word >>= 1;
728 i->bit_num++;
731 /* Loop over all elements of a min/max set given by bit vector VEC and
732 their minimal and maximal values MIN and MAX. In each iteration, N
733 is set to the number of next allocno. ITER is an instance of
734 minmax_set_iterator used to iterate over the set. */
735 #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
736 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
737 minmax_set_iter_cond (&(ITER), &(N)); \
738 minmax_set_iter_next (&(ITER)))
740 struct target_ira_int {
741 /* Initialized once. It is a maximal possible size of the allocated
742 struct costs. */
743 int x_max_struct_costs_size;
745 /* Allocated and initialized once, and used to initialize cost values
746 for each insn. */
747 struct costs *x_init_cost;
749 /* Allocated once, and used for temporary purposes. */
750 struct costs *x_temp_costs;
752 /* Allocated once, and used for the cost calculation. */
753 struct costs *x_op_costs[MAX_RECOG_OPERANDS];
754 struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
756 /* Hard registers that can not be used for the register allocator for
757 all functions of the current compilation unit. */
758 HARD_REG_SET x_no_unit_alloc_regs;
760 /* Map: hard regs X modes -> set of hard registers for storing value
761 of given mode starting with given hard register. */
762 HARD_REG_SET (x_ira_reg_mode_hard_regset
763 [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
765 /* Array based on TARGET_REGISTER_MOVE_COST. Don't use
766 ira_register_move_cost directly. Use function of
767 ira_get_may_move_cost instead. */
768 move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
770 /* Array analogs of the macros MEMORY_MOVE_COST and
771 REGISTER_MOVE_COST but they contain maximal cost not minimal as
772 the previous two ones do. */
773 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
774 move_table *x_ira_max_register_move_cost[MAX_MACHINE_MODE];
776 /* Similar to may_move_in_cost but it is calculated in IRA instead of
777 regclass. Another difference we take only available hard registers
778 into account to figure out that one register class is a subset of
779 the another one. Don't use it directly. Use function of
780 ira_get_may_move_cost instead. */
781 move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
783 /* Similar to may_move_out_cost but it is calculated in IRA instead of
784 regclass. Another difference we take only available hard registers
785 into account to figure out that one register class is a subset of
786 the another one. Don't use it directly. Use function of
787 ira_get_may_move_cost instead. */
788 move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
790 /* Similar to ira_may_move_in_cost and ira_may_move_out_cost but they
791 return maximal cost. */
792 move_table *x_ira_max_may_move_in_cost[MAX_MACHINE_MODE];
793 move_table *x_ira_max_may_move_out_cost[MAX_MACHINE_MODE];
795 /* Map class->true if class is a possible allocno class, false
796 otherwise. */
797 bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
799 /* Map class->true if class is a pressure class, false otherwise. */
800 bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
802 /* Register class subset relation: TRUE if the first class is a subset
803 of the second one considering only hard registers available for the
804 allocation. */
805 int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
807 /* Array of the number of hard registers of given class which are
808 available for allocation. The order is defined by the hard
809 register numbers. */
810 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
812 /* Index (in ira_class_hard_regs; for given register class and hard
813 register (in general case a hard register can belong to several
814 register classes;. The index is negative for hard registers
815 unavailable for the allocation. */
816 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
818 /* Array whose values are hard regset of hard registers available for
819 the allocation of given register class whose HARD_REGNO_MODE_OK
820 values for given mode are zero. */
821 HARD_REG_SET x_ira_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
823 /* The value is number of elements in the subsequent array. */
824 int x_ira_important_classes_num;
826 /* The array containing all non-empty classes. Such classes is
827 important for calculation of the hard register usage costs. */
828 enum reg_class x_ira_important_classes[N_REG_CLASSES];
830 /* The array containing indexes of important classes in the previous
831 array. The array elements are defined only for important
832 classes. */
833 int x_ira_important_class_nums[N_REG_CLASSES];
835 /* The biggest important class inside of intersection of the two
836 classes (that is calculated taking only hard registers available
837 for allocation into account;. If the both classes contain no hard
838 registers available for allocation, the value is calculated with
839 taking all hard-registers including fixed ones into account. */
840 enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
842 /* True if the two classes (that is calculated taking only hard
843 registers available for allocation into account; are
844 intersected. */
845 bool x_ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES];
847 /* Classes with end marker LIM_REG_CLASSES which are intersected with
848 given class (the first index;. That includes given class itself.
849 This is calculated taking only hard registers available for
850 allocation into account. */
851 enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
853 /* The biggest (smallest) important class inside of (covering) union
854 of the two classes (that is calculated taking only hard registers
855 available for allocation into account). If the both classes
856 contain no hard registers available for allocation, the value is
857 calculated with taking all hard-registers including fixed ones
858 into account. In other words, the value is the corresponding
859 reg_class_subunion (reg_class_superunion) value. */
860 enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
861 enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
863 /* For each reg class, table listing all the classes contained in it
864 (excluding the class itself. Non-allocatable registers are
865 excluded from the consideration;. */
866 enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
868 /* Array whose values are hard regset of hard registers for which
869 move of the hard register in given mode into itself is
870 prohibited. */
871 HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
873 /* Flag of that the above array has been initialized. */
874 bool x_ira_prohibited_mode_move_regs_initialized_p;
877 extern struct target_ira_int default_target_ira_int;
878 #if SWITCHABLE_TARGET
879 extern struct target_ira_int *this_target_ira_int;
880 #else
881 #define this_target_ira_int (&default_target_ira_int)
882 #endif
884 #define ira_reg_mode_hard_regset \
885 (this_target_ira_int->x_ira_reg_mode_hard_regset)
886 #define ira_register_move_cost \
887 (this_target_ira_int->x_ira_register_move_cost)
888 #define ira_max_memory_move_cost \
889 (this_target_ira_int->x_ira_max_memory_move_cost)
890 #define ira_max_register_move_cost \
891 (this_target_ira_int->x_ira_max_register_move_cost)
892 #define ira_may_move_in_cost \
893 (this_target_ira_int->x_ira_may_move_in_cost)
894 #define ira_may_move_out_cost \
895 (this_target_ira_int->x_ira_may_move_out_cost)
896 #define ira_max_may_move_in_cost \
897 (this_target_ira_int->x_ira_max_may_move_in_cost)
898 #define ira_max_may_move_out_cost \
899 (this_target_ira_int->x_ira_max_may_move_out_cost)
900 #define ira_reg_allocno_class_p \
901 (this_target_ira_int->x_ira_reg_allocno_class_p)
902 #define ira_reg_pressure_class_p \
903 (this_target_ira_int->x_ira_reg_pressure_class_p)
904 #define ira_class_subset_p \
905 (this_target_ira_int->x_ira_class_subset_p)
906 #define ira_non_ordered_class_hard_regs \
907 (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
908 #define ira_class_hard_reg_index \
909 (this_target_ira_int->x_ira_class_hard_reg_index)
910 #define ira_prohibited_class_mode_regs \
911 (this_target_ira_int->x_ira_prohibited_class_mode_regs)
912 #define ira_important_classes_num \
913 (this_target_ira_int->x_ira_important_classes_num)
914 #define ira_important_classes \
915 (this_target_ira_int->x_ira_important_classes)
916 #define ira_important_class_nums \
917 (this_target_ira_int->x_ira_important_class_nums)
918 #define ira_reg_class_intersect \
919 (this_target_ira_int->x_ira_reg_class_intersect)
920 #define ira_reg_classes_intersect_p \
921 (this_target_ira_int->x_ira_reg_classes_intersect_p)
922 #define ira_reg_class_super_classes \
923 (this_target_ira_int->x_ira_reg_class_super_classes)
924 #define ira_reg_class_subunion \
925 (this_target_ira_int->x_ira_reg_class_subunion)
926 #define ira_reg_class_superunion \
927 (this_target_ira_int->x_ira_reg_class_superunion)
928 #define ira_prohibited_mode_move_regs \
929 (this_target_ira_int->x_ira_prohibited_mode_move_regs)
931 /* ira.c: */
933 extern void *ira_allocate (size_t);
934 extern void ira_free (void *addr);
935 extern bitmap ira_allocate_bitmap (void);
936 extern void ira_free_bitmap (bitmap);
937 extern void ira_print_disposition (FILE *);
938 extern void ira_debug_disposition (void);
939 extern void ira_debug_allocno_classes (void);
940 extern void ira_init_register_move_cost (enum machine_mode);
942 /* The length of the two following arrays. */
943 extern int ira_reg_equiv_len;
945 /* The element value is TRUE if the corresponding regno value is
946 invariant. */
947 extern bool *ira_reg_equiv_invariant_p;
949 /* The element value is equiv constant of given pseudo-register or
950 NULL_RTX. */
951 extern rtx *ira_reg_equiv_const;
953 /* ira-build.c */
955 /* The current loop tree node and its regno allocno map. */
956 extern ira_loop_tree_node_t ira_curr_loop_tree_node;
957 extern ira_allocno_t *ira_curr_regno_allocno_map;
959 extern void ira_debug_copy (ira_copy_t);
960 extern void ira_debug_copies (void);
961 extern void ira_debug_allocno_copies (ira_allocno_t);
963 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
964 void (*) (ira_loop_tree_node_t),
965 void (*) (ira_loop_tree_node_t));
966 extern ira_allocno_t ira_parent_allocno (ira_allocno_t);
967 extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t);
968 extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
969 extern void ira_create_allocno_objects (ira_allocno_t);
970 extern void ira_set_allocno_class (ira_allocno_t, enum reg_class);
971 extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
972 extern void ira_allocate_conflict_vec (ira_object_t, int);
973 extern void ira_allocate_object_conflicts (ira_object_t, int);
974 extern void ior_hard_reg_conflicts (ira_allocno_t, HARD_REG_SET *);
975 extern void ira_print_expanded_allocno (ira_allocno_t);
976 extern void ira_add_live_range_to_object (ira_object_t, int, int);
977 extern live_range_t ira_create_live_range (ira_object_t, int, int,
978 live_range_t);
979 extern live_range_t ira_copy_live_range_list (live_range_t);
980 extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t);
981 extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t);
982 extern void ira_finish_live_range (live_range_t);
983 extern void ira_finish_live_range_list (live_range_t);
984 extern void ira_free_allocno_updated_costs (ira_allocno_t);
985 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
986 int, bool, rtx, ira_loop_tree_node_t);
987 extern void ira_add_allocno_copy_to_list (ira_copy_t);
988 extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t);
989 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
990 bool, rtx, ira_loop_tree_node_t);
992 extern int *ira_allocate_cost_vector (reg_class_t);
993 extern void ira_free_cost_vector (int *, reg_class_t);
995 extern void ira_flattening (int, int);
996 extern bool ira_build (bool);
997 extern void ira_destroy (void);
999 /* ira-costs.c */
1000 extern void ira_init_costs_once (void);
1001 extern void ira_init_costs (void);
1002 extern void ira_finish_costs_once (void);
1003 extern void ira_costs (void);
1004 extern void ira_tune_allocno_costs (void);
1006 /* ira-lives.c */
1008 extern void ira_rebuild_start_finish_chains (void);
1009 extern void ira_print_live_range_list (FILE *, live_range_t);
1010 extern void ira_debug_live_range_list (live_range_t);
1011 extern void ira_debug_allocno_live_ranges (ira_allocno_t);
1012 extern void ira_debug_live_ranges (void);
1013 extern void ira_create_allocno_live_ranges (void);
1014 extern void ira_compress_allocno_live_ranges (void);
1015 extern void ira_finish_allocno_live_ranges (void);
1017 /* ira-conflicts.c */
1018 extern void ira_debug_conflicts (bool);
1019 extern void ira_build_conflicts (void);
1021 /* ira-color.c */
1022 extern void ira_debug_hard_regs_forest (void);
1023 extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1024 extern void ira_reassign_conflict_allocnos (int);
1025 extern void ira_initiate_assign (void);
1026 extern void ira_finish_assign (void);
1027 extern void ira_color (void);
1029 /* ira-emit.c */
1030 extern void ira_initiate_emit_data (void);
1031 extern void ira_finish_emit_data (void);
1032 extern void ira_emit (bool);
1036 /* Initialize register costs for MODE if necessary. */
1037 static inline void
1038 ira_init_register_move_cost_if_necessary (enum machine_mode mode)
1040 if (ira_register_move_cost[mode] == NULL)
1041 ira_init_register_move_cost (mode);
1046 /* The iterator for all allocnos. */
1047 typedef struct {
1048 /* The number of the current element in IRA_ALLOCNOS. */
1049 int n;
1050 } ira_allocno_iterator;
1052 /* Initialize the iterator I. */
1053 static inline void
1054 ira_allocno_iter_init (ira_allocno_iterator *i)
1056 i->n = 0;
1059 /* Return TRUE if we have more allocnos to visit, in which case *A is
1060 set to the allocno to be visited. Otherwise, return FALSE. */
1061 static inline bool
1062 ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
1064 int n;
1066 for (n = i->n; n < ira_allocnos_num; n++)
1067 if (ira_allocnos[n] != NULL)
1069 *a = ira_allocnos[n];
1070 i->n = n + 1;
1071 return true;
1073 return false;
1076 /* Loop over all allocnos. In each iteration, A is set to the next
1077 allocno. ITER is an instance of ira_allocno_iterator used to iterate
1078 the allocnos. */
1079 #define FOR_EACH_ALLOCNO(A, ITER) \
1080 for (ira_allocno_iter_init (&(ITER)); \
1081 ira_allocno_iter_cond (&(ITER), &(A));)
1083 /* The iterator for all objects. */
1084 typedef struct {
1085 /* The number of the current element in ira_object_id_map. */
1086 int n;
1087 } ira_object_iterator;
1089 /* Initialize the iterator I. */
1090 static inline void
1091 ira_object_iter_init (ira_object_iterator *i)
1093 i->n = 0;
1096 /* Return TRUE if we have more objects to visit, in which case *OBJ is
1097 set to the object to be visited. Otherwise, return FALSE. */
1098 static inline bool
1099 ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
1101 int n;
1103 for (n = i->n; n < ira_objects_num; n++)
1104 if (ira_object_id_map[n] != NULL)
1106 *obj = ira_object_id_map[n];
1107 i->n = n + 1;
1108 return true;
1110 return false;
1113 /* Loop over all objects. In each iteration, OBJ is set to the next
1114 object. ITER is an instance of ira_object_iterator used to iterate
1115 the objects. */
1116 #define FOR_EACH_OBJECT(OBJ, ITER) \
1117 for (ira_object_iter_init (&(ITER)); \
1118 ira_object_iter_cond (&(ITER), &(OBJ));)
1120 /* The iterator for objects associated with an allocno. */
1121 typedef struct {
1122 /* The number of the element the allocno's object array. */
1123 int n;
1124 } ira_allocno_object_iterator;
1126 /* Initialize the iterator I. */
1127 static inline void
1128 ira_allocno_object_iter_init (ira_allocno_object_iterator *i)
1130 i->n = 0;
1133 /* Return TRUE if we have more objects to visit in allocno A, in which
1134 case *O is set to the object to be visited. Otherwise, return
1135 FALSE. */
1136 static inline bool
1137 ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
1138 ira_object_t *o)
1140 *o = ALLOCNO_OBJECT (a, i->n);
1141 return i->n++ < ALLOCNO_NUM_OBJECTS (a);
1144 /* Loop over all objects associated with allocno A. In each
1145 iteration, O is set to the next object. ITER is an instance of
1146 ira_allocno_object_iterator used to iterate the conflicts. */
1147 #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1148 for (ira_allocno_object_iter_init (&(ITER)); \
1149 ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1152 /* The iterator for copies. */
1153 typedef struct {
1154 /* The number of the current element in IRA_COPIES. */
1155 int n;
1156 } ira_copy_iterator;
1158 /* Initialize the iterator I. */
1159 static inline void
1160 ira_copy_iter_init (ira_copy_iterator *i)
1162 i->n = 0;
1165 /* Return TRUE if we have more copies to visit, in which case *CP is
1166 set to the copy to be visited. Otherwise, return FALSE. */
1167 static inline bool
1168 ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
1170 int n;
1172 for (n = i->n; n < ira_copies_num; n++)
1173 if (ira_copies[n] != NULL)
1175 *cp = ira_copies[n];
1176 i->n = n + 1;
1177 return true;
1179 return false;
1182 /* Loop over all copies. In each iteration, C is set to the next
1183 copy. ITER is an instance of ira_copy_iterator used to iterate
1184 the copies. */
1185 #define FOR_EACH_COPY(C, ITER) \
1186 for (ira_copy_iter_init (&(ITER)); \
1187 ira_copy_iter_cond (&(ITER), &(C));)
1189 /* The iterator for object conflicts. */
1190 typedef struct {
1192 /* TRUE if the conflicts are represented by vector of allocnos. */
1193 bool conflict_vec_p;
1195 /* The conflict vector or conflict bit vector. */
1196 void *vec;
1198 /* The number of the current element in the vector (of type
1199 ira_object_t or IRA_INT_TYPE). */
1200 unsigned int word_num;
1202 /* The bit vector size. It is defined only if
1203 OBJECT_CONFLICT_VEC_P is FALSE. */
1204 unsigned int size;
1206 /* The current bit index of bit vector. It is defined only if
1207 OBJECT_CONFLICT_VEC_P is FALSE. */
1208 unsigned int bit_num;
1210 /* The object id corresponding to the 1st bit of the bit vector. It
1211 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1212 int base_conflict_id;
1214 /* The word of bit vector currently visited. It is defined only if
1215 OBJECT_CONFLICT_VEC_P is FALSE. */
1216 unsigned IRA_INT_TYPE word;
1217 } ira_object_conflict_iterator;
1219 /* Initialize the iterator I with ALLOCNO conflicts. */
1220 static inline void
1221 ira_object_conflict_iter_init (ira_object_conflict_iterator *i,
1222 ira_object_t obj)
1224 i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1225 i->vec = OBJECT_CONFLICT_ARRAY (obj);
1226 i->word_num = 0;
1227 if (i->conflict_vec_p)
1228 i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1229 else
1231 if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1232 i->size = 0;
1233 else
1234 i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1235 + IRA_INT_BITS)
1236 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1237 i->bit_num = 0;
1238 i->base_conflict_id = OBJECT_MIN (obj);
1239 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1243 /* Return TRUE if we have more conflicting allocnos to visit, in which
1244 case *A is set to the allocno to be visited. Otherwise, return
1245 FALSE. */
1246 static inline bool
1247 ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
1248 ira_object_t *pobj)
1250 ira_object_t obj;
1252 if (i->conflict_vec_p)
1254 obj = ((ira_object_t *) i->vec)[i->word_num++];
1255 if (obj == NULL)
1256 return false;
1258 else
1260 unsigned IRA_INT_TYPE word = i->word;
1261 unsigned int bit_num = i->bit_num;
1263 /* Skip words that are zeros. */
1264 for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1266 i->word_num++;
1268 /* If we have reached the end, break. */
1269 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1270 return false;
1272 bit_num = i->word_num * IRA_INT_BITS;
1275 /* Skip bits that are zero. */
1276 for (; (word & 1) == 0; word >>= 1)
1277 bit_num++;
1279 obj = ira_object_id_map[bit_num + i->base_conflict_id];
1280 i->bit_num = bit_num + 1;
1281 i->word = word >> 1;
1284 *pobj = obj;
1285 return true;
1288 /* Loop over all objects conflicting with OBJ. In each iteration,
1289 CONF is set to the next conflicting object. ITER is an instance
1290 of ira_object_conflict_iterator used to iterate the conflicts. */
1291 #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1292 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1293 ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1297 /* The function returns TRUE if at least one hard register from ones
1298 starting with HARD_REGNO and containing value of MODE are in set
1299 HARD_REGSET. */
1300 static inline bool
1301 ira_hard_reg_set_intersection_p (int hard_regno, enum machine_mode mode,
1302 HARD_REG_SET hard_regset)
1304 int i;
1306 gcc_assert (hard_regno >= 0);
1307 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1308 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1309 return true;
1310 return false;
1313 /* Return number of hard registers in hard register SET. */
1314 static inline int
1315 hard_reg_set_size (HARD_REG_SET set)
1317 int i, size;
1319 for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1320 if (TEST_HARD_REG_BIT (set, i))
1321 size++;
1322 return size;
1325 /* The function returns TRUE if hard registers starting with
1326 HARD_REGNO and containing value of MODE are fully in set
1327 HARD_REGSET. */
1328 static inline bool
1329 ira_hard_reg_in_set_p (int hard_regno, enum machine_mode mode,
1330 HARD_REG_SET hard_regset)
1332 int i;
1334 ira_assert (hard_regno >= 0);
1335 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1336 if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1337 return false;
1338 return true;
1343 /* To save memory we use a lazy approach for allocation and
1344 initialization of the cost vectors. We do this only when it is
1345 really necessary. */
1347 /* Allocate cost vector *VEC for hard registers of ACLASS and
1348 initialize the elements by VAL if it is necessary */
1349 static inline void
1350 ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
1352 int i, *reg_costs;
1353 int len;
1355 if (*vec != NULL)
1356 return;
1357 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1358 len = ira_class_hard_regs_num[(int) aclass];
1359 for (i = 0; i < len; i++)
1360 reg_costs[i] = val;
1363 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1364 values of vector SRC into the vector if it is necessary */
1365 static inline void
1366 ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1368 int len;
1370 if (*vec != NULL || src == NULL)
1371 return;
1372 *vec = ira_allocate_cost_vector (aclass);
1373 len = ira_class_hard_regs_num[aclass];
1374 memcpy (*vec, src, sizeof (int) * len);
1377 /* Allocate cost vector *VEC for hard registers of ACLASS and add
1378 values of vector SRC into the vector if it is necessary */
1379 static inline void
1380 ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src)
1382 int i, len;
1384 if (src == NULL)
1385 return;
1386 len = ira_class_hard_regs_num[aclass];
1387 if (*vec == NULL)
1389 *vec = ira_allocate_cost_vector (aclass);
1390 memset (*vec, 0, sizeof (int) * len);
1392 for (i = 0; i < len; i++)
1393 (*vec)[i] += src[i];
1396 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1397 values of vector SRC into the vector or initialize it by VAL (if
1398 SRC is null). */
1399 static inline void
1400 ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass,
1401 int val, int *src)
1403 int i, *reg_costs;
1404 int len;
1406 if (*vec != NULL)
1407 return;
1408 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1409 len = ira_class_hard_regs_num[aclass];
1410 if (src != NULL)
1411 memcpy (reg_costs, src, sizeof (int) * len);
1412 else
1414 for (i = 0; i < len; i++)
1415 reg_costs[i] = val;