1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-5, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
103 #ifndef REGISTER_MOVE_COST
104 #define REGISTER_MOVE_COST(x, y) 2
107 /* The variables set up by `find_reloads' are:
109 n_reloads number of distinct reloads needed; max reload # + 1
110 tables indexed by reload number
111 reload_in rtx for value to reload from
112 reload_out rtx for where to store reload-reg afterward if nec
113 (often the same as reload_in)
114 reload_reg_class enum reg_class, saying what regs to reload into
115 reload_inmode enum machine_mode; mode this operand should have
116 when reloaded, on input.
117 reload_outmode enum machine_mode; mode this operand should have
118 when reloaded, on output.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_opnum int, operand number being reloaded. This is
138 used to group related reloads and need not always
139 be equal to the actual operand number in the insn,
140 though it current will be; for in-out operands, it
141 is one of the two operand numbers.
142 reload_when_needed enum, classifies reload as needed either for
143 addressing an input reload, addressing an output,
144 for addressing a non-reloaded mem ref,
145 or for unspecified purposes (i.e., more than one
147 reload_secondary_p int, 1 if this is a secondary register for one
149 reload_secondary_in_reload
150 reload_secondary_out_reload
151 int, gives the reload number of a secondary
152 reload, when needed; otherwise -1
153 reload_secondary_in_icode
154 reload_secondary_out_icode
155 enum insn_code, if a secondary reload is required,
156 gives the INSN_CODE that uses the secondary
157 reload as a scratch register, or CODE_FOR_nothing
158 if the secondary reload register is to be an
159 intermediate register. */
162 rtx reload_in
[MAX_RELOADS
];
163 rtx reload_out
[MAX_RELOADS
];
164 enum reg_class reload_reg_class
[MAX_RELOADS
];
165 enum machine_mode reload_inmode
[MAX_RELOADS
];
166 enum machine_mode reload_outmode
[MAX_RELOADS
];
167 rtx reload_reg_rtx
[MAX_RELOADS
];
168 char reload_optional
[MAX_RELOADS
];
169 int reload_inc
[MAX_RELOADS
];
170 rtx reload_in_reg
[MAX_RELOADS
];
171 char reload_nocombine
[MAX_RELOADS
];
172 int reload_opnum
[MAX_RELOADS
];
173 enum reload_type reload_when_needed
[MAX_RELOADS
];
174 int reload_secondary_p
[MAX_RELOADS
];
175 int reload_secondary_in_reload
[MAX_RELOADS
];
176 int reload_secondary_out_reload
[MAX_RELOADS
];
177 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
178 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
180 /* All the "earlyclobber" operands of the current insn
181 are recorded here. */
183 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
185 int reload_n_operands
;
187 /* Replacing reloads.
189 If `replace_reloads' is nonzero, then as each reload is recorded
190 an entry is made for it in the table `replacements'.
191 Then later `subst_reloads' can look through that table and
192 perform all the replacements needed. */
194 /* Nonzero means record the places to replace. */
195 static int replace_reloads
;
197 /* Each replacement is recorded with a structure like this. */
200 rtx
*where
; /* Location to store in */
201 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
202 a SUBREG; 0 otherwise. */
203 int what
; /* which reload this is for */
204 enum machine_mode mode
; /* mode it must have */
207 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
209 /* Number of replacements currently recorded. */
210 static int n_replacements
;
212 /* Used to track what is modified by an operand. */
215 int reg_flag
; /* Nonzero if referencing a register. */
216 int safe
; /* Nonzero if this can't conflict with anything. */
217 rtx base
; /* Base address for MEM. */
218 HOST_WIDE_INT start
; /* Starting offset or register number. */
219 HOST_WIDE_INT end
; /* Ending offset or register number. */
222 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
223 (see reg_equiv_address). */
224 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
225 static int n_memlocs
;
227 #ifdef SECONDARY_MEMORY_NEEDED
229 /* Save MEMs needed to copy from one class of registers to another. One MEM
230 is used per mode, but normally only one or two modes are ever used.
232 We keep two versions, before and after register elimination. The one
233 after register elimination is record separately for each operand. This
234 is done in case the address is not valid to be sure that we separately
237 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
238 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
241 /* The instruction we are doing reloads for;
242 so we can test whether a register dies in it. */
243 static rtx this_insn
;
245 /* Nonzero if this instruction is a user-specified asm with operands. */
246 static int this_insn_is_asm
;
248 /* If hard_regs_live_known is nonzero,
249 we can tell which hard regs are currently live,
250 at least enough to succeed in choosing dummy reloads. */
251 static int hard_regs_live_known
;
253 /* Indexed by hard reg number,
254 element is nonegative if hard reg has been spilled.
255 This vector is passed to `find_reloads' as an argument
256 and is not changed here. */
257 static short *static_reload_reg_p
;
259 /* Set to 1 in subst_reg_equivs if it changes anything. */
260 static int subst_reg_equivs_changed
;
262 /* On return from push_reload, holds the reload-number for the OUT
263 operand, which can be different for that from the input operand. */
264 static int output_reloadnum
;
266 /* Compare two RTX's. */
267 #define MATCHES(x, y) \
268 (x == y || (x != 0 && (GET_CODE (x) == REG \
269 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
270 : rtx_equal_p (x, y) && ! side_effects_p (x))))
272 /* Indicates if two reloads purposes are for similar enough things that we
273 can merge their reloads. */
274 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
275 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
276 || ((when1) == (when2) && (op1) == (op2)) \
277 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
278 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
279 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
280 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
281 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
283 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
284 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
285 ((when1) != (when2) \
286 || ! ((op1) == (op2) \
287 || (when1) == RELOAD_FOR_INPUT \
288 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
289 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
291 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
292 enum machine_mode
, enum reload_type
,
294 static enum reg_class find_valid_class
PROTO((enum machine_mode
, int));
295 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
296 enum machine_mode
, enum machine_mode
,
297 int, int, int, enum reload_type
));
298 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
299 static void combine_reloads
PROTO((void));
300 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
301 enum machine_mode
, enum machine_mode
,
302 enum reg_class
, int));
303 static int earlyclobber_operand_p
PROTO((rtx
));
304 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
305 static struct decomposition decompose
PROTO((rtx
));
306 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
307 static int alternative_allows_memconst
PROTO((char *, int));
308 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
309 static rtx make_memloc
PROTO((rtx
, int));
310 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
311 int, enum reload_type
, int));
312 static rtx subst_reg_equivs
PROTO((rtx
));
313 static rtx subst_indexed_address
PROTO((rtx
));
314 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
315 enum reload_type
,int));
316 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
317 enum machine_mode
, int,
318 enum reload_type
, int));
319 static int find_inc_amount
PROTO((rtx
, rtx
));
321 #ifdef HAVE_SECONDARY_RELOADS
323 /* Determine if any secondary reloads are needed for loading (if IN_P is
324 non-zero) or storing (if IN_P is zero) X to or from a reload register of
325 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
326 are needed, push them.
328 Return the reload number of the secondary reload we made, or -1 if
329 we didn't need one. *PICODE is set to the insn_code to use if we do
330 need a secondary reload. */
333 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
339 enum reg_class reload_class
;
340 enum machine_mode reload_mode
;
341 enum reload_type type
;
342 enum insn_code
*picode
;
344 enum reg_class
class = NO_REGS
;
345 enum machine_mode mode
= reload_mode
;
346 enum insn_code icode
= CODE_FOR_nothing
;
347 enum reg_class t_class
= NO_REGS
;
348 enum machine_mode t_mode
= VOIDmode
;
349 enum insn_code t_icode
= CODE_FOR_nothing
;
350 enum reload_type secondary_type
;
352 int s_reload
, t_reload
= -1;
354 if (type
== RELOAD_FOR_INPUT_ADDRESS
|| type
== RELOAD_FOR_OUTPUT_ADDRESS
)
355 secondary_type
= type
;
357 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
359 *picode
= CODE_FOR_nothing
;
361 /* If X is a paradoxical SUBREG, use the inner value to determine both the
362 mode and object being reloaded. */
363 if (GET_CODE (x
) == SUBREG
364 #ifdef CLASS_CANNOT_CHANGE_SIZE
365 && reload_class
!= CLASS_CANNOT_CHANGE_SIZE
367 && (GET_MODE_SIZE (GET_MODE (x
))
368 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
371 reload_mode
= GET_MODE (x
);
374 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
375 is still a pseudo-register by now, it *must* have an equivalent MEM
376 but we don't want to assume that), use that equivalent when seeing if
377 a secondary reload is needed since whether or not a reload is needed
378 might be sensitive to the form of the MEM. */
380 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
381 && reg_equiv_mem
[REGNO (x
)] != 0)
382 x
= reg_equiv_mem
[REGNO (x
)];
384 #ifdef SECONDARY_INPUT_RELOAD_CLASS
386 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
389 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
391 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
394 /* If we don't need any secondary registers, done. */
395 if (class == NO_REGS
)
398 /* Get a possible insn to use. If the predicate doesn't accept X, don't
401 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
402 : reload_out_optab
[(int) reload_mode
]);
404 if (icode
!= CODE_FOR_nothing
405 && insn_operand_predicate
[(int) icode
][in_p
]
406 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
407 icode
= CODE_FOR_nothing
;
409 /* If we will be using an insn, see if it can directly handle the reload
410 register we will be using. If it can, the secondary reload is for a
411 scratch register. If it can't, we will use the secondary reload for
412 an intermediate register and require a tertiary reload for the scratch
415 if (icode
!= CODE_FOR_nothing
)
417 /* If IN_P is non-zero, the reload register will be the output in
418 operand 0. If IN_P is zero, the reload register will be the input
419 in operand 1. Outputs should have an initial "=", which we must
422 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
423 enum reg_class insn_class
424 = (insn_letter
== 'r' ? GENERAL_REGS
425 : REG_CLASS_FROM_LETTER (insn_letter
));
427 if (insn_class
== NO_REGS
428 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
429 /* The scratch register's constraint must start with "=&". */
430 || insn_operand_constraint
[(int) icode
][2][0] != '='
431 || insn_operand_constraint
[(int) icode
][2][1] != '&')
434 if (reg_class_subset_p (reload_class
, insn_class
))
435 mode
= insn_operand_mode
[(int) icode
][2];
438 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
440 t_mode
= insn_operand_mode
[(int) icode
][2];
441 t_class
= (t_letter
== 'r' ? GENERAL_REGS
442 : REG_CLASS_FROM_LETTER (t_letter
));
444 icode
= CODE_FOR_nothing
;
448 /* This case isn't valid, so fail. Reload is allowed to use the same
449 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
450 in the case of a secondary register, we actually need two different
451 registers for correct code. We fail here to prevent the possibility of
452 silently generating incorrect code later.
454 The convention is that secondary input reloads are valid only if the
455 secondary_class is different from class. If you have such a case, you
456 can not use secondary reloads, you must work around the problem some
459 Allow this when MODE is not reload_mode and assume that the generated
460 code handles this case (it does on the Alpha, which is the only place
461 this currently happens). */
463 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
466 /* If we need a tertiary reload, see if we have one we can reuse or else
469 if (t_class
!= NO_REGS
)
471 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
472 if (reload_secondary_p
[t_reload
]
473 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
474 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
475 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
476 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
477 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
478 == CODE_FOR_nothing
))
479 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
480 == CODE_FOR_nothing
)))
481 && (reg_class_size
[(int) t_class
] == 1
482 #ifdef SMALL_REGISTER_CLASSES
486 && MERGABLE_RELOADS (secondary_type
,
487 reload_when_needed
[t_reload
],
488 opnum
, reload_opnum
[t_reload
]))
491 reload_inmode
[t_reload
] = t_mode
;
493 reload_outmode
[t_reload
] = t_mode
;
495 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
496 reload_reg_class
[t_reload
] = t_class
;
498 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
499 reload_optional
[t_reload
] &= optional
;
500 reload_secondary_p
[t_reload
] = 1;
501 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
502 opnum
, reload_opnum
[t_reload
]))
503 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
506 if (t_reload
== n_reloads
)
508 /* We need to make a new tertiary reload for this register class. */
509 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
510 reload_reg_class
[t_reload
] = t_class
;
511 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
512 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
513 reload_reg_rtx
[t_reload
] = 0;
514 reload_optional
[t_reload
] = optional
;
515 reload_inc
[t_reload
] = 0;
516 /* Maybe we could combine these, but it seems too tricky. */
517 reload_nocombine
[t_reload
] = 1;
518 reload_in_reg
[t_reload
] = 0;
519 reload_opnum
[t_reload
] = opnum
;
520 reload_when_needed
[t_reload
] = secondary_type
;
521 reload_secondary_in_reload
[t_reload
] = -1;
522 reload_secondary_out_reload
[t_reload
] = -1;
523 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
524 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
525 reload_secondary_p
[t_reload
] = 1;
531 /* See if we can reuse an existing secondary reload. */
532 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
533 if (reload_secondary_p
[s_reload
]
534 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
535 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
536 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
537 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
538 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
539 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
540 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
541 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
542 && (reg_class_size
[(int) class] == 1
543 #ifdef SMALL_REGISTER_CLASSES
547 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
548 opnum
, reload_opnum
[s_reload
]))
551 reload_inmode
[s_reload
] = mode
;
553 reload_outmode
[s_reload
] = mode
;
555 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
556 reload_reg_class
[s_reload
] = class;
558 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
559 reload_optional
[s_reload
] &= optional
;
560 reload_secondary_p
[s_reload
] = 1;
561 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
562 opnum
, reload_opnum
[s_reload
]))
563 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
566 if (s_reload
== n_reloads
)
568 /* We need to make a new secondary reload for this register class. */
569 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
570 reload_reg_class
[s_reload
] = class;
572 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
573 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
574 reload_reg_rtx
[s_reload
] = 0;
575 reload_optional
[s_reload
] = optional
;
576 reload_inc
[s_reload
] = 0;
577 /* Maybe we could combine these, but it seems too tricky. */
578 reload_nocombine
[s_reload
] = 1;
579 reload_in_reg
[s_reload
] = 0;
580 reload_opnum
[s_reload
] = opnum
;
581 reload_when_needed
[s_reload
] = secondary_type
;
582 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
583 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
584 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
585 reload_secondary_out_icode
[s_reload
]
586 = ! in_p
? t_icode
: CODE_FOR_nothing
;
587 reload_secondary_p
[s_reload
] = 1;
591 #ifdef SECONDARY_MEMORY_NEEDED
592 /* If we need a memory location to copy between the two reload regs,
595 if (in_p
&& icode
== CODE_FOR_nothing
596 && SECONDARY_MEMORY_NEEDED (class, reload_class
, reload_mode
))
597 get_secondary_mem (x
, reload_mode
, opnum
, type
);
599 if (! in_p
&& icode
== CODE_FOR_nothing
600 && SECONDARY_MEMORY_NEEDED (reload_class
, class, reload_mode
))
601 get_secondary_mem (x
, reload_mode
, opnum
, type
);
608 #endif /* HAVE_SECONDARY_RELOADS */
610 #ifdef SECONDARY_MEMORY_NEEDED
612 /* Return a memory location that will be used to copy X in mode MODE.
613 If we haven't already made a location for this mode in this insn,
614 call find_reloads_address on the location being returned. */
617 get_secondary_mem (x
, mode
, opnum
, type
)
619 enum machine_mode mode
;
621 enum reload_type type
;
626 /* By default, if MODE is narrower than a word, widen it to a word.
627 This is required because most machines that require these memory
628 locations do not support short load and stores from all registers
629 (e.g., FP registers). */
631 #ifdef SECONDARY_MEMORY_NEEDED_MODE
632 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
634 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
635 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
638 /* If we already have made a MEM for this operand in MODE, return it. */
639 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
640 return secondary_memlocs_elim
[(int) mode
][opnum
];
642 /* If this is the first time we've tried to get a MEM for this mode,
643 allocate a new one. `something_changed' in reload will get set
644 by noticing that the frame size has changed. */
646 if (secondary_memlocs
[(int) mode
] == 0)
648 #ifdef SECONDARY_MEMORY_NEEDED_RTX
649 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
651 secondary_memlocs
[(int) mode
]
652 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
656 /* Get a version of the address doing any eliminations needed. If that
657 didn't give us a new MEM, make a new one if it isn't valid. */
659 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
660 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
662 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
663 loc
= copy_rtx (loc
);
665 /* The only time the call below will do anything is if the stack
666 offset is too large. In that case IND_LEVELS doesn't matter, so we
667 can just pass a zero. Adjust the type to be the address of the
668 corresponding object. If the address was valid, save the eliminated
669 address. If it wasn't valid, we need to make a reload each time, so
674 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
675 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
678 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
682 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
686 /* Clear any secondary memory locations we've made. */
689 clear_secondary_mem ()
691 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
693 #endif /* SECONDARY_MEMORY_NEEDED */
695 /* Find the largest class for which every register number plus N is valid in
696 M1 (if in range). Abort if no such class exists. */
698 static enum reg_class
699 find_valid_class (m1
, n
)
700 enum machine_mode m1
;
705 enum reg_class best_class
;
708 for (class = 1; class < N_REG_CLASSES
; class++)
711 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
712 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
713 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
714 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
717 if (! bad
&& reg_class_size
[class] > best_size
)
718 best_class
= class, best_size
= reg_class_size
[class];
727 /* Record one reload that needs to be performed.
728 IN is an rtx saying where the data are to be found before this instruction.
729 OUT says where they must be stored after the instruction.
730 (IN is zero for data not read, and OUT is zero for data not written.)
731 INLOC and OUTLOC point to the places in the instructions where
732 IN and OUT were found.
733 If IN and OUT are both non-zero, it means the same register must be used
734 to reload both IN and OUT.
736 CLASS is a register class required for the reloaded data.
737 INMODE is the machine mode that the instruction requires
738 for the reg that replaces IN and OUTMODE is likewise for OUT.
740 If IN is zero, then OUT's location and mode should be passed as
743 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
745 OPTIONAL nonzero means this reload does not need to be performed:
746 it can be discarded if that is more convenient.
748 OPNUM and TYPE say what the purpose of this reload is.
750 The return value is the reload-number for this reload.
752 If both IN and OUT are nonzero, in some rare cases we might
753 want to make two separate reloads. (Actually we never do this now.)
754 Therefore, the reload-number for OUT is stored in
755 output_reloadnum when we return; the return value applies to IN.
756 Usually (presently always), when IN and OUT are nonzero,
757 the two reload-numbers are equal, but the caller should be careful to
761 push_reload (in
, out
, inloc
, outloc
, class,
762 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
763 register rtx in
, out
;
765 enum reg_class
class;
766 enum machine_mode inmode
, outmode
;
770 enum reload_type type
;
774 int dont_remove_subreg
= 0;
775 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
776 int secondary_in_reload
= -1, secondary_out_reload
= -1;
777 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
778 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
780 /* INMODE and/or OUTMODE could be VOIDmode if no mode
781 has been specified for the operand. In that case,
782 use the operand's mode as the mode to reload. */
783 if (inmode
== VOIDmode
&& in
!= 0)
784 inmode
= GET_MODE (in
);
785 if (outmode
== VOIDmode
&& out
!= 0)
786 outmode
= GET_MODE (out
);
788 /* If IN is a pseudo register everywhere-equivalent to a constant, and
789 it is not in a hard register, reload straight from the constant,
790 since we want to get rid of such pseudo registers.
791 Often this is done earlier, but not always in find_reloads_address. */
792 if (in
!= 0 && GET_CODE (in
) == REG
)
794 register int regno
= REGNO (in
);
796 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
797 && reg_equiv_constant
[regno
] != 0)
798 in
= reg_equiv_constant
[regno
];
801 /* Likewise for OUT. Of course, OUT will never be equivalent to
802 an actual constant, but it might be equivalent to a memory location
803 (in the case of a parameter). */
804 if (out
!= 0 && GET_CODE (out
) == REG
)
806 register int regno
= REGNO (out
);
808 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
809 && reg_equiv_constant
[regno
] != 0)
810 out
= reg_equiv_constant
[regno
];
813 /* If we have a read-write operand with an address side-effect,
814 change either IN or OUT so the side-effect happens only once. */
815 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
817 if (GET_CODE (XEXP (in
, 0)) == POST_INC
818 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
819 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
820 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
821 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
822 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
825 /* If we are reloading a (SUBREG constant ...), really reload just the
826 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
827 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
828 a pseudo and hence will become a MEM) with M1 wider than M2 and the
829 register is a pseudo, also reload the inside expression.
830 For machines that extend byte loads, do this for any SUBREG of a pseudo
831 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
832 M2 is an integral mode that gets extended when loaded.
833 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
834 either M1 is not valid for R or M2 is wider than a word but we only
835 need one word to store an M2-sized quantity in R.
836 (However, if OUT is nonzero, we need to reload the reg *and*
837 the subreg, so do nothing here, and let following statement handle it.)
839 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
840 we can't handle it here because CONST_INT does not indicate a mode.
842 Similarly, we must reload the inside expression if we have a
843 STRICT_LOW_PART (presumably, in == out in the cas).
845 Also reload the inner expression if it does not require a secondary
846 reload but the SUBREG does.
848 Finally, reload the inner expression if it is a register that is in
849 the class whose registers cannot be referenced in a different size
850 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
851 cannot reload just the inside since we might end up with the wrong
854 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& SUBREG_WORD (in
) == 0
855 #ifdef CLASS_CANNOT_CHANGE_SIZE
856 && class != CLASS_CANNOT_CHANGE_SIZE
858 && (CONSTANT_P (SUBREG_REG (in
))
859 || GET_CODE (SUBREG_REG (in
)) == PLUS
861 || (((GET_CODE (SUBREG_REG (in
)) == REG
862 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
863 || GET_CODE (SUBREG_REG (in
)) == MEM
)
864 && ((GET_MODE_SIZE (inmode
)
865 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
866 #ifdef LOAD_EXTEND_OP
867 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
868 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
870 && (GET_MODE_SIZE (inmode
)
871 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
872 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
873 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
876 || (GET_CODE (SUBREG_REG (in
)) == REG
877 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
878 /* The case where out is nonzero
879 is handled differently in the following statement. */
880 && (out
== 0 || SUBREG_WORD (in
) == 0)
881 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
882 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
884 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
886 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
887 GET_MODE (SUBREG_REG (in
)))))
888 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
891 #ifdef SECONDARY_INPUT_RELOAD_CLASS
892 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
893 && (SECONDARY_INPUT_RELOAD_CLASS (class,
894 GET_MODE (SUBREG_REG (in
)),
898 #ifdef CLASS_CANNOT_CHANGE_SIZE
899 || (GET_CODE (SUBREG_REG (in
)) == REG
900 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
901 && (TEST_HARD_REG_BIT
902 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
903 REGNO (SUBREG_REG (in
))))
904 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
905 != GET_MODE_SIZE (inmode
)))
909 in_subreg_loc
= inloc
;
910 inloc
= &SUBREG_REG (in
);
912 #ifndef LOAD_EXTEND_OP
913 if (GET_CODE (in
) == MEM
)
914 /* This is supposed to happen only for paradoxical subregs made by
915 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
916 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
919 inmode
= GET_MODE (in
);
922 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
923 either M1 is not valid for R or M2 is wider than a word but we only
924 need one word to store an M2-sized quantity in R.
926 However, we must reload the inner reg *as well as* the subreg in
929 if (in
!= 0 && GET_CODE (in
) == SUBREG
930 && GET_CODE (SUBREG_REG (in
)) == REG
931 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
932 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
),
934 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
935 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
937 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
939 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
940 GET_MODE (SUBREG_REG (in
)))))))
942 /* This relies on the fact that emit_reload_insns outputs the
943 instructions for input reloads of type RELOAD_OTHER in the same
944 order as the reloads. Thus if the outer reload is also of type
945 RELOAD_OTHER, we are guaranteed that this inner reload will be
946 output before the outer reload. */
947 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
948 find_valid_class (inmode
, SUBREG_WORD (in
)),
949 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
950 dont_remove_subreg
= 1;
954 /* Similarly for paradoxical and problematical SUBREGs on the output.
955 Note that there is no reason we need worry about the previous value
956 of SUBREG_REG (out); even if wider than out,
957 storing in a subreg is entitled to clobber it all
958 (except in the case of STRICT_LOW_PART,
959 and in that case the constraint should label it input-output.) */
960 if (out
!= 0 && GET_CODE (out
) == SUBREG
&& SUBREG_WORD (out
) == 0
961 #ifdef CLASS_CANNOT_CHANGE_SIZE
962 && class != CLASS_CANNOT_CHANGE_SIZE
964 && (CONSTANT_P (SUBREG_REG (out
))
966 || (((GET_CODE (SUBREG_REG (out
)) == REG
967 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
968 || GET_CODE (SUBREG_REG (out
)) == MEM
)
969 && ((GET_MODE_SIZE (outmode
)
970 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
971 || (GET_CODE (SUBREG_REG (out
)) == REG
972 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
973 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
974 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
976 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
978 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
979 GET_MODE (SUBREG_REG (out
)))))
980 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
981 + SUBREG_WORD (out
)),
983 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
984 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
985 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
986 GET_MODE (SUBREG_REG (out
)),
990 #ifdef CLASS_CANNOT_CHANGE_SIZE
991 || (GET_CODE (SUBREG_REG (out
)) == REG
992 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
993 && (TEST_HARD_REG_BIT
994 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
995 REGNO (SUBREG_REG (out
))))
996 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
997 != GET_MODE_SIZE (outmode
)))
1001 out_subreg_loc
= outloc
;
1002 outloc
= &SUBREG_REG (out
);
1004 #ifndef LOAD_EXTEND_OP
1005 if (GET_CODE (out
) == MEM
1006 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1009 outmode
= GET_MODE (out
);
1012 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1013 either M1 is not valid for R or M2 is wider than a word but we only
1014 need one word to store an M2-sized quantity in R.
1016 However, we must reload the inner reg *as well as* the subreg in
1017 that case. In this case, the inner reg is an in-out reload. */
1019 if (out
!= 0 && GET_CODE (out
) == SUBREG
1020 && GET_CODE (SUBREG_REG (out
)) == REG
1021 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1022 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1024 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1025 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1027 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1029 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1030 GET_MODE (SUBREG_REG (out
)))))))
1032 /* This relies on the fact that emit_reload_insns outputs the
1033 instructions for output reloads of type RELOAD_OTHER in reverse
1034 order of the reloads. Thus if the outer reload is also of type
1035 RELOAD_OTHER, we are guaranteed that this inner reload will be
1036 output after the outer reload. */
1037 dont_remove_subreg
= 1;
1038 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1040 find_valid_class (outmode
, SUBREG_WORD (out
)),
1041 VOIDmode
, VOIDmode
, 0, 0,
1042 opnum
, RELOAD_OTHER
);
1045 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1046 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1047 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1048 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1051 /* If IN is a SUBREG of a hard register, make a new REG. This
1052 simplifies some of the cases below. */
1054 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1055 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1056 && ! dont_remove_subreg
)
1057 in
= gen_rtx (REG
, GET_MODE (in
),
1058 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1060 /* Similarly for OUT. */
1061 if (out
!= 0 && GET_CODE (out
) == SUBREG
1062 && GET_CODE (SUBREG_REG (out
)) == REG
1063 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1064 && ! dont_remove_subreg
)
1065 out
= gen_rtx (REG
, GET_MODE (out
),
1066 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1068 /* Narrow down the class of register wanted if that is
1069 desirable on this machine for efficiency. */
1071 class = PREFERRED_RELOAD_CLASS (in
, class);
1073 /* Output reloads may need analogous treatment, different in detail. */
1074 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1076 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1079 /* Make sure we use a class that can handle the actual pseudo
1080 inside any subreg. For example, on the 386, QImode regs
1081 can appear within SImode subregs. Although GENERAL_REGS
1082 can handle SImode, QImode needs a smaller class. */
1083 #ifdef LIMIT_RELOAD_CLASS
1085 class = LIMIT_RELOAD_CLASS (inmode
, class);
1086 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1087 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1090 class = LIMIT_RELOAD_CLASS (outmode
, class);
1091 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1092 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1095 /* Verify that this class is at least possible for the mode that
1097 if (this_insn_is_asm
)
1099 enum machine_mode mode
;
1100 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1104 if (mode
== VOIDmode
)
1106 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1111 outmode
= word_mode
;
1113 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1114 if (HARD_REGNO_MODE_OK (i
, mode
)
1115 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1117 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1120 for (j
= 1; j
< nregs
; j
++)
1121 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1126 if (i
== FIRST_PSEUDO_REGISTER
)
1128 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1133 if (class == NO_REGS
)
1136 /* We can use an existing reload if the class is right
1137 and at least one of IN and OUT is a match
1138 and the other is at worst neutral.
1139 (A zero compared against anything is neutral.)
1141 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1142 for the same thing since that can cause us to need more reload registers
1143 than we otherwise would. */
1145 for (i
= 0; i
< n_reloads
; i
++)
1146 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1147 || reg_class_subset_p (reload_reg_class
[i
], class))
1148 /* If the existing reload has a register, it must fit our class. */
1149 && (reload_reg_rtx
[i
] == 0
1150 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1151 true_regnum (reload_reg_rtx
[i
])))
1152 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1153 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1155 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1156 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1157 && (reg_class_size
[(int) class] == 1
1158 #ifdef SMALL_REGISTER_CLASSES
1162 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1163 opnum
, reload_opnum
[i
]))
1166 /* Reloading a plain reg for input can match a reload to postincrement
1167 that reg, since the postincrement's value is the right value.
1168 Likewise, it can match a preincrement reload, since we regard
1169 the preincrementation as happening before any ref in this insn
1170 to that register. */
1172 for (i
= 0; i
< n_reloads
; i
++)
1173 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1174 || reg_class_subset_p (reload_reg_class
[i
], class))
1175 /* If the existing reload has a register, it must fit our class. */
1176 && (reload_reg_rtx
[i
] == 0
1177 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1178 true_regnum (reload_reg_rtx
[i
])))
1179 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1180 && ((GET_CODE (in
) == REG
1181 && (GET_CODE (reload_in
[i
]) == POST_INC
1182 || GET_CODE (reload_in
[i
]) == POST_DEC
1183 || GET_CODE (reload_in
[i
]) == PRE_INC
1184 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1185 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1187 (GET_CODE (reload_in
[i
]) == REG
1188 && (GET_CODE (in
) == POST_INC
1189 || GET_CODE (in
) == POST_DEC
1190 || GET_CODE (in
) == PRE_INC
1191 || GET_CODE (in
) == PRE_DEC
)
1192 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1193 && (reg_class_size
[(int) class] == 1
1194 #ifdef SMALL_REGISTER_CLASSES
1198 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1199 opnum
, reload_opnum
[i
]))
1201 /* Make sure reload_in ultimately has the increment,
1202 not the plain register. */
1203 if (GET_CODE (in
) == REG
)
1210 /* See if we need a secondary reload register to move between CLASS
1211 and IN or CLASS and OUT. Get the icode and push any required reloads
1212 needed for each of them if so. */
1214 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1217 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1218 &secondary_in_icode
);
1221 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1222 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1223 secondary_out_reload
1224 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1225 type
, &secondary_out_icode
);
1228 /* We found no existing reload suitable for re-use.
1229 So add an additional reload. */
1233 reload_out
[i
] = out
;
1234 reload_reg_class
[i
] = class;
1235 reload_inmode
[i
] = inmode
;
1236 reload_outmode
[i
] = outmode
;
1237 reload_reg_rtx
[i
] = 0;
1238 reload_optional
[i
] = optional
;
1240 reload_nocombine
[i
] = 0;
1241 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1242 reload_opnum
[i
] = opnum
;
1243 reload_when_needed
[i
] = type
;
1244 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1245 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1246 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1247 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1248 reload_secondary_p
[i
] = 0;
1252 #ifdef SECONDARY_MEMORY_NEEDED
1253 /* If a memory location is needed for the copy, make one. */
1254 if (in
!= 0 && GET_CODE (in
) == REG
1255 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1256 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1258 get_secondary_mem (in
, inmode
, opnum
, type
);
1260 if (out
!= 0 && GET_CODE (out
) == REG
1261 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1262 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1264 get_secondary_mem (out
, outmode
, opnum
, type
);
1269 /* We are reusing an existing reload,
1270 but we may have additional information for it.
1271 For example, we may now have both IN and OUT
1272 while the old one may have just one of them. */
1274 if (inmode
!= VOIDmode
)
1275 reload_inmode
[i
] = inmode
;
1276 if (outmode
!= VOIDmode
)
1277 reload_outmode
[i
] = outmode
;
1281 reload_out
[i
] = out
;
1282 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1283 reload_reg_class
[i
] = class;
1284 reload_optional
[i
] &= optional
;
1285 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1286 opnum
, reload_opnum
[i
]))
1287 reload_when_needed
[i
] = RELOAD_OTHER
;
1288 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1291 /* If the ostensible rtx being reload differs from the rtx found
1292 in the location to substitute, this reload is not safe to combine
1293 because we cannot reliably tell whether it appears in the insn. */
1295 if (in
!= 0 && in
!= *inloc
)
1296 reload_nocombine
[i
] = 1;
1299 /* This was replaced by changes in find_reloads_address_1 and the new
1300 function inc_for_reload, which go with a new meaning of reload_inc. */
1302 /* If this is an IN/OUT reload in an insn that sets the CC,
1303 it must be for an autoincrement. It doesn't work to store
1304 the incremented value after the insn because that would clobber the CC.
1305 So we must do the increment of the value reloaded from,
1306 increment it, store it back, then decrement again. */
1307 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1311 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1312 /* If we did not find a nonzero amount-to-increment-by,
1313 that contradicts the belief that IN is being incremented
1314 in an address in this insn. */
1315 if (reload_inc
[i
] == 0)
1320 /* If we will replace IN and OUT with the reload-reg,
1321 record where they are located so that substitution need
1322 not do a tree walk. */
1324 if (replace_reloads
)
1328 register struct replacement
*r
= &replacements
[n_replacements
++];
1330 r
->subreg_loc
= in_subreg_loc
;
1334 if (outloc
!= 0 && outloc
!= inloc
)
1336 register struct replacement
*r
= &replacements
[n_replacements
++];
1339 r
->subreg_loc
= out_subreg_loc
;
1344 /* If this reload is just being introduced and it has both
1345 an incoming quantity and an outgoing quantity that are
1346 supposed to be made to match, see if either one of the two
1347 can serve as the place to reload into.
1349 If one of them is acceptable, set reload_reg_rtx[i]
1352 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1354 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1356 reload_reg_class
[i
], i
);
1358 /* If the outgoing register already contains the same value
1359 as the incoming one, we can dispense with loading it.
1360 The easiest way to tell the caller that is to give a phony
1361 value for the incoming operand (same as outgoing one). */
1362 if (reload_reg_rtx
[i
] == out
1363 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1364 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1365 static_reload_reg_p
, i
, inmode
))
1369 /* If this is an input reload and the operand contains a register that
1370 dies in this insn and is used nowhere else, see if it is the right class
1371 to be used for this reload. Use it if so. (This occurs most commonly
1372 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1373 this if it is also an output reload that mentions the register unless
1374 the output is a SUBREG that clobbers an entire register.
1376 Note that the operand might be one of the spill regs, if it is a
1377 pseudo reg and we are in a block where spilling has not taken place.
1378 But if there is no spilling in this block, that is OK.
1379 An explicitly used hard reg cannot be a spill reg. */
1381 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1386 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1387 if (REG_NOTE_KIND (note
) == REG_DEAD
1388 && GET_CODE (XEXP (note
, 0)) == REG
1389 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1390 && reg_mentioned_p (XEXP (note
, 0), in
)
1391 && ! refers_to_regno_for_reload_p (regno
,
1393 + HARD_REGNO_NREGS (regno
,
1395 PATTERN (this_insn
), inloc
)
1396 /* If this is also an output reload, IN cannot be used as
1397 the reload register if it is set in this insn unless IN
1399 && (out
== 0 || in
== out
1400 || ! hard_reg_set_here_p (regno
,
1402 + HARD_REGNO_NREGS (regno
,
1404 PATTERN (this_insn
)))
1405 /* ??? Why is this code so different from the previous?
1406 Is there any simple coherent way to describe the two together?
1407 What's going on here. */
1409 || (GET_CODE (in
) == SUBREG
1410 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1412 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1413 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1414 /* Make sure the operand fits in the reg that dies. */
1415 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1416 && HARD_REGNO_MODE_OK (regno
, inmode
)
1417 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1418 && HARD_REGNO_MODE_OK (regno
, outmode
)
1419 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1420 && !fixed_regs
[regno
])
1422 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1428 output_reloadnum
= i
;
1433 /* Record an additional place we must replace a value
1434 for which we have already recorded a reload.
1435 RELOADNUM is the value returned by push_reload
1436 when the reload was recorded.
1437 This is used in insn patterns that use match_dup. */
1440 push_replacement (loc
, reloadnum
, mode
)
1443 enum machine_mode mode
;
1445 if (replace_reloads
)
1447 register struct replacement
*r
= &replacements
[n_replacements
++];
1448 r
->what
= reloadnum
;
1455 /* Transfer all replacements that used to be in reload FROM to be in
1459 transfer_replacements (to
, from
)
1464 for (i
= 0; i
< n_replacements
; i
++)
1465 if (replacements
[i
].what
== from
)
1466 replacements
[i
].what
= to
;
1469 /* If there is only one output reload, and it is not for an earlyclobber
1470 operand, try to combine it with a (logically unrelated) input reload
1471 to reduce the number of reload registers needed.
1473 This is safe if the input reload does not appear in
1474 the value being output-reloaded, because this implies
1475 it is not needed any more once the original insn completes.
1477 If that doesn't work, see we can use any of the registers that
1478 die in this insn as a reload register. We can if it is of the right
1479 class and does not appear in the value being output-reloaded. */
1485 int output_reload
= -1;
1486 int secondary_out
= -1;
1489 /* Find the output reload; return unless there is exactly one
1490 and that one is mandatory. */
1492 for (i
= 0; i
< n_reloads
; i
++)
1493 if (reload_out
[i
] != 0)
1495 if (output_reload
>= 0)
1500 if (output_reload
< 0 || reload_optional
[output_reload
])
1503 /* An input-output reload isn't combinable. */
1505 if (reload_in
[output_reload
] != 0)
1508 /* If this reload is for an earlyclobber operand, we can't do anything. */
1509 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1512 /* Check each input reload; can we combine it? */
1514 for (i
= 0; i
< n_reloads
; i
++)
1515 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1516 /* Life span of this reload must not extend past main insn. */
1517 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1518 && reload_when_needed
[i
] != RELOAD_OTHER
1519 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1520 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1521 reload_outmode
[output_reload
]))
1522 && reload_inc
[i
] == 0
1523 && reload_reg_rtx
[i
] == 0
1524 #ifdef SECONDARY_MEMORY_NEEDED
1525 /* Don't combine two reloads with different secondary
1526 memory locations. */
1527 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1528 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1529 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1530 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1532 #ifdef SMALL_REGISTER_CLASSES
1533 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1535 && (reg_class_subset_p (reload_reg_class
[i
],
1536 reload_reg_class
[output_reload
])
1537 || reg_class_subset_p (reload_reg_class
[output_reload
],
1538 reload_reg_class
[i
]))
1540 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1541 /* Args reversed because the first arg seems to be
1542 the one that we imagine being modified
1543 while the second is the one that might be affected. */
1544 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1546 /* However, if the input is a register that appears inside
1547 the output, then we also can't share.
1548 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1549 If the same reload reg is used for both reg 69 and the
1550 result to be stored in memory, then that result
1551 will clobber the address of the memory ref. */
1552 && ! (GET_CODE (reload_in
[i
]) == REG
1553 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1554 reload_out
[output_reload
]))))
1555 && (reg_class_size
[(int) reload_reg_class
[i
]]
1556 #ifdef SMALL_REGISTER_CLASSES
1560 /* We will allow making things slightly worse by combining an
1561 input and an output, but no worse than that. */
1562 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1563 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1567 /* We have found a reload to combine with! */
1568 reload_out
[i
] = reload_out
[output_reload
];
1569 reload_outmode
[i
] = reload_outmode
[output_reload
];
1570 /* Mark the old output reload as inoperative. */
1571 reload_out
[output_reload
] = 0;
1572 /* The combined reload is needed for the entire insn. */
1573 reload_when_needed
[i
] = RELOAD_OTHER
;
1574 /* If the output reload had a secondary reload, copy it. */
1575 if (reload_secondary_out_reload
[output_reload
] != -1)
1577 reload_secondary_out_reload
[i
]
1578 = reload_secondary_out_reload
[output_reload
];
1579 reload_secondary_out_icode
[i
]
1580 = reload_secondary_out_icode
[output_reload
];
1583 #ifdef SECONDARY_MEMORY_NEEDED
1584 /* Copy any secondary MEM. */
1585 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1586 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1587 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1589 /* If required, minimize the register class. */
1590 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1591 reload_reg_class
[i
]))
1592 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1594 /* Transfer all replacements from the old reload to the combined. */
1595 for (j
= 0; j
< n_replacements
; j
++)
1596 if (replacements
[j
].what
== output_reload
)
1597 replacements
[j
].what
= i
;
1602 /* If this insn has only one operand that is modified or written (assumed
1603 to be the first), it must be the one corresponding to this reload. It
1604 is safe to use anything that dies in this insn for that output provided
1605 that it does not occur in the output (we already know it isn't an
1606 earlyclobber. If this is an asm insn, give up. */
1608 if (INSN_CODE (this_insn
) == -1)
1611 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1612 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1613 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1616 /* See if some hard register that dies in this insn and is not used in
1617 the output is the right class. Only works if the register we pick
1618 up can fully hold our output reload. */
1619 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1620 if (REG_NOTE_KIND (note
) == REG_DEAD
1621 && GET_CODE (XEXP (note
, 0)) == REG
1622 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1623 reload_out
[output_reload
])
1624 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1625 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1626 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1627 REGNO (XEXP (note
, 0)))
1628 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1629 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1630 /* Ensure that a secondary or tertiary reload for this output
1631 won't want this register. */
1632 && ((secondary_out
= reload_secondary_out_reload
[output_reload
]) == -1
1633 || (! (TEST_HARD_REG_BIT
1634 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1635 REGNO (XEXP (note
, 0))))
1636 && ((secondary_out
= reload_secondary_out_reload
[secondary_out
]) == -1
1637 || ! (TEST_HARD_REG_BIT
1638 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1639 REGNO (XEXP (note
, 0)))))))
1640 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1642 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1643 reload_outmode
[output_reload
],
1644 REGNO (XEXP (note
, 0)));
1649 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1650 See if one of IN and OUT is a register that may be used;
1651 this is desirable since a spill-register won't be needed.
1652 If so, return the register rtx that proves acceptable.
1654 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1655 CLASS is the register class required for the reload.
1657 If FOR_REAL is >= 0, it is the number of the reload,
1658 and in some cases when it can be discovered that OUT doesn't need
1659 to be computed, clear out reload_out[FOR_REAL].
1661 If FOR_REAL is -1, this should not be done, because this call
1662 is just to see if a register can be found, not to find and install it. */
1665 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1666 inmode
, outmode
, class, for_real
)
1667 rtx real_in
, real_out
;
1668 rtx
*inloc
, *outloc
;
1669 enum machine_mode inmode
, outmode
;
1670 enum reg_class
class;
1679 /* If operands exceed a word, we can't use either of them
1680 unless they have the same size. */
1681 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1682 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1683 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1686 /* Find the inside of any subregs. */
1687 while (GET_CODE (out
) == SUBREG
)
1689 out_offset
= SUBREG_WORD (out
);
1690 out
= SUBREG_REG (out
);
1692 while (GET_CODE (in
) == SUBREG
)
1694 in_offset
= SUBREG_WORD (in
);
1695 in
= SUBREG_REG (in
);
1698 /* Narrow down the reg class, the same way push_reload will;
1699 otherwise we might find a dummy now, but push_reload won't. */
1700 class = PREFERRED_RELOAD_CLASS (in
, class);
1702 /* See if OUT will do. */
1703 if (GET_CODE (out
) == REG
1704 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1706 register int regno
= REGNO (out
) + out_offset
;
1707 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1710 /* When we consider whether the insn uses OUT,
1711 ignore references within IN. They don't prevent us
1712 from copying IN into OUT, because those refs would
1713 move into the insn that reloads IN.
1715 However, we only ignore IN in its role as this reload.
1716 If the insn uses IN elsewhere and it contains OUT,
1717 that counts. We can't be sure it's the "same" operand
1718 so it might not go through this reload. */
1720 *inloc
= const0_rtx
;
1722 if (regno
< FIRST_PSEUDO_REGISTER
1723 /* A fixed reg that can overlap other regs better not be used
1724 for reloading in any way. */
1725 #ifdef OVERLAPPING_REGNO_P
1726 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1728 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1729 PATTERN (this_insn
), outloc
))
1732 for (i
= 0; i
< nwords
; i
++)
1733 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1739 if (GET_CODE (real_out
) == REG
)
1742 value
= gen_rtx (REG
, outmode
, regno
);
1749 /* Consider using IN if OUT was not acceptable
1750 or if OUT dies in this insn (like the quotient in a divmod insn).
1751 We can't use IN unless it is dies in this insn,
1752 which means we must know accurately which hard regs are live.
1753 Also, the result can't go in IN if IN is used within OUT. */
1754 if (hard_regs_live_known
1755 && GET_CODE (in
) == REG
1756 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1758 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1759 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1760 && !fixed_regs
[REGNO (in
)]
1761 && HARD_REGNO_MODE_OK (REGNO (in
),
1762 /* The only case where out and real_out might
1763 have different modes is where real_out
1764 is a subreg, and in that case, out
1766 (GET_MODE (out
) != VOIDmode
1767 ? GET_MODE (out
) : outmode
)))
1769 register int regno
= REGNO (in
) + in_offset
;
1770 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1772 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1773 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1774 PATTERN (this_insn
)))
1777 for (i
= 0; i
< nwords
; i
++)
1778 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1784 /* If we were going to use OUT as the reload reg
1785 and changed our mind, it means OUT is a dummy that
1786 dies here. So don't bother copying value to it. */
1787 if (for_real
>= 0 && value
== real_out
)
1788 reload_out
[for_real
] = 0;
1789 if (GET_CODE (real_in
) == REG
)
1792 value
= gen_rtx (REG
, inmode
, regno
);
1800 /* This page contains subroutines used mainly for determining
1801 whether the IN or an OUT of a reload can serve as the
1804 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1807 earlyclobber_operand_p (x
)
1812 for (i
= 0; i
< n_earlyclobbers
; i
++)
1813 if (reload_earlyclobbers
[i
] == x
)
1819 /* Return 1 if expression X alters a hard reg in the range
1820 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1821 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1822 X should be the body of an instruction. */
1825 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1826 register int beg_regno
, end_regno
;
1829 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1831 register rtx op0
= SET_DEST (x
);
1832 while (GET_CODE (op0
) == SUBREG
)
1833 op0
= SUBREG_REG (op0
);
1834 if (GET_CODE (op0
) == REG
)
1836 register int r
= REGNO (op0
);
1837 /* See if this reg overlaps range under consideration. */
1839 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1843 else if (GET_CODE (x
) == PARALLEL
)
1845 register int i
= XVECLEN (x
, 0) - 1;
1847 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1854 /* Return 1 if ADDR is a valid memory address for mode MODE,
1855 and check that each pseudo reg has the proper kind of
1859 strict_memory_address_p (mode
, addr
)
1860 enum machine_mode mode
;
1863 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1870 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1871 if they are the same hard reg, and has special hacks for
1872 autoincrement and autodecrement.
1873 This is specifically intended for find_reloads to use
1874 in determining whether two operands match.
1875 X is the operand whose number is the lower of the two.
1877 The value is 2 if Y contains a pre-increment that matches
1878 a non-incrementing address in X. */
1880 /* ??? To be completely correct, we should arrange to pass
1881 for X the output operand and for Y the input operand.
1882 For now, we assume that the output operand has the lower number
1883 because that is natural in (SET output (... input ...)). */
1886 operands_match_p (x
, y
)
1890 register RTX_CODE code
= GET_CODE (x
);
1896 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1897 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1898 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1904 i
= REGNO (SUBREG_REG (x
));
1905 if (i
>= FIRST_PSEUDO_REGISTER
)
1907 i
+= SUBREG_WORD (x
);
1912 if (GET_CODE (y
) == SUBREG
)
1914 j
= REGNO (SUBREG_REG (y
));
1915 if (j
>= FIRST_PSEUDO_REGISTER
)
1917 j
+= SUBREG_WORD (y
);
1922 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1923 multiple hard register group, so that for example (reg:DI 0) and
1924 (reg:SI 1) will be considered the same register. */
1925 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1926 && i
< FIRST_PSEUDO_REGISTER
)
1927 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1928 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1929 && j
< FIRST_PSEUDO_REGISTER
)
1930 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1934 /* If two operands must match, because they are really a single
1935 operand of an assembler insn, then two postincrements are invalid
1936 because the assembler insn would increment only once.
1937 On the other hand, an postincrement matches ordinary indexing
1938 if the postincrement is the output operand. */
1939 if (code
== POST_DEC
|| code
== POST_INC
)
1940 return operands_match_p (XEXP (x
, 0), y
);
1941 /* Two preincrements are invalid
1942 because the assembler insn would increment only once.
1943 On the other hand, an preincrement matches ordinary indexing
1944 if the preincrement is the input operand.
1945 In this case, return 2, since some callers need to do special
1946 things when this happens. */
1947 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1948 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1952 /* Now we have disposed of all the cases
1953 in which different rtx codes can match. */
1954 if (code
!= GET_CODE (y
))
1956 if (code
== LABEL_REF
)
1957 return XEXP (x
, 0) == XEXP (y
, 0);
1958 if (code
== SYMBOL_REF
)
1959 return XSTR (x
, 0) == XSTR (y
, 0);
1961 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1963 if (GET_MODE (x
) != GET_MODE (y
))
1966 /* Compare the elements. If any pair of corresponding elements
1967 fail to match, return 0 for the whole things. */
1970 fmt
= GET_RTX_FORMAT (code
);
1971 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1977 if (XWINT (x
, i
) != XWINT (y
, i
))
1982 if (XINT (x
, i
) != XINT (y
, i
))
1987 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1990 /* If any subexpression returns 2,
1991 we should return 2 if we are successful. */
1999 /* It is believed that rtx's at this level will never
2000 contain anything but integers and other rtx's,
2001 except for within LABEL_REFs and SYMBOL_REFs. */
2006 return 1 + success_2
;
2009 /* Return the number of times character C occurs in string S. */
2012 n_occurrences (c
, s
)
2022 /* Describe the range of registers or memory referenced by X.
2023 If X is a register, set REG_FLAG and put the first register
2024 number into START and the last plus one into END.
2025 If X is a memory reference, put a base address into BASE
2026 and a range of integer offsets into START and END.
2027 If X is pushing on the stack, we can assume it causes no trouble,
2028 so we set the SAFE field. */
2030 static struct decomposition
2034 struct decomposition val
;
2039 if (GET_CODE (x
) == MEM
)
2041 rtx base
, offset
= 0;
2042 rtx addr
= XEXP (x
, 0);
2044 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2045 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2047 val
.base
= XEXP (addr
, 0);
2048 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2049 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2050 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2054 if (GET_CODE (addr
) == CONST
)
2056 addr
= XEXP (addr
, 0);
2059 if (GET_CODE (addr
) == PLUS
)
2061 if (CONSTANT_P (XEXP (addr
, 0)))
2063 base
= XEXP (addr
, 1);
2064 offset
= XEXP (addr
, 0);
2066 else if (CONSTANT_P (XEXP (addr
, 1)))
2068 base
= XEXP (addr
, 0);
2069 offset
= XEXP (addr
, 1);
2076 offset
= const0_rtx
;
2078 if (GET_CODE (offset
) == CONST
)
2079 offset
= XEXP (offset
, 0);
2080 if (GET_CODE (offset
) == PLUS
)
2082 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2084 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
2085 offset
= XEXP (offset
, 0);
2087 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2089 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
2090 offset
= XEXP (offset
, 1);
2094 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2095 offset
= const0_rtx
;
2098 else if (GET_CODE (offset
) != CONST_INT
)
2100 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2101 offset
= const0_rtx
;
2104 if (all_const
&& GET_CODE (base
) == PLUS
)
2105 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2107 if (GET_CODE (offset
) != CONST_INT
)
2110 val
.start
= INTVAL (offset
);
2111 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2115 else if (GET_CODE (x
) == REG
)
2118 val
.start
= true_regnum (x
);
2121 /* A pseudo with no hard reg. */
2122 val
.start
= REGNO (x
);
2123 val
.end
= val
.start
+ 1;
2127 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2129 else if (GET_CODE (x
) == SUBREG
)
2131 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2132 /* This could be more precise, but it's good enough. */
2133 return decompose (SUBREG_REG (x
));
2135 val
.start
= true_regnum (x
);
2137 return decompose (SUBREG_REG (x
));
2140 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2142 else if (CONSTANT_P (x
)
2143 /* This hasn't been assigned yet, so it can't conflict yet. */
2144 || GET_CODE (x
) == SCRATCH
)
2151 /* Return 1 if altering Y will not modify the value of X.
2152 Y is also described by YDATA, which should be decompose (Y). */
2155 immune_p (x
, y
, ydata
)
2157 struct decomposition ydata
;
2159 struct decomposition xdata
;
2162 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2166 if (GET_CODE (y
) != MEM
)
2168 /* If Y is memory and X is not, Y can't affect X. */
2169 if (GET_CODE (x
) != MEM
)
2172 xdata
= decompose (x
);
2174 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2176 /* If bases are distinct symbolic constants, there is no overlap. */
2177 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2179 /* Constants and stack slots never overlap. */
2180 if (CONSTANT_P (xdata
.base
)
2181 && (ydata
.base
== frame_pointer_rtx
2182 || ydata
.base
== hard_frame_pointer_rtx
2183 || ydata
.base
== stack_pointer_rtx
))
2185 if (CONSTANT_P (ydata
.base
)
2186 && (xdata
.base
== frame_pointer_rtx
2187 || xdata
.base
== hard_frame_pointer_rtx
2188 || xdata
.base
== stack_pointer_rtx
))
2190 /* If either base is variable, we don't know anything. */
2195 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2198 /* Similar, but calls decompose. */
2201 safe_from_earlyclobber (op
, clobber
)
2204 struct decomposition early_data
;
2206 early_data
= decompose (clobber
);
2207 return immune_p (op
, clobber
, early_data
);
2210 /* Main entry point of this file: search the body of INSN
2211 for values that need reloading and record them with push_reload.
2212 REPLACE nonzero means record also where the values occur
2213 so that subst_reloads can be used.
2215 IND_LEVELS says how many levels of indirection are supported by this
2216 machine; a value of zero means that a memory reference is not a valid
2219 LIVE_KNOWN says we have valid information about which hard
2220 regs are live at each point in the program; this is true when
2221 we are called from global_alloc but false when stupid register
2222 allocation has been done.
2224 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2225 which is nonnegative if the reg has been commandeered for reloading into.
2226 It is copied into STATIC_RELOAD_REG_P and referenced from there
2227 by various subroutines. */
2230 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2232 int replace
, ind_levels
;
2234 short *reload_reg_p
;
2236 #ifdef REGISTER_CONSTRAINTS
2238 register int insn_code_number
;
2241 /* These are the constraints for the insn. We don't change them. */
2242 char *constraints1
[MAX_RECOG_OPERANDS
];
2243 /* These start out as the constraints for the insn
2244 and they are chewed up as we consider alternatives. */
2245 char *constraints
[MAX_RECOG_OPERANDS
];
2246 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2248 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2249 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2250 /* Nonzero for a MEM operand whose entire address needs a reload. */
2251 int address_reloaded
[MAX_RECOG_OPERANDS
];
2252 /* Value of enum reload_type to use for operand. */
2253 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2254 /* Value of enum reload_type to use within address of operand. */
2255 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2256 /* Save the usage of each operand. */
2257 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2258 int no_input_reloads
= 0, no_output_reloads
= 0;
2260 int this_alternative
[MAX_RECOG_OPERANDS
];
2261 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2262 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2263 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2264 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2266 int goal_alternative
[MAX_RECOG_OPERANDS
];
2267 int this_alternative_number
;
2268 int goal_alternative_number
;
2269 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2270 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2271 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2272 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2273 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2274 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2275 int goal_alternative_swapped
;
2278 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2279 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2280 rtx body
= PATTERN (insn
);
2281 rtx set
= single_set (insn
);
2282 int goal_earlyclobber
, this_earlyclobber
;
2283 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2286 this_insn_is_asm
= 0; /* Tentative. */
2290 n_earlyclobbers
= 0;
2291 replace_reloads
= replace
;
2292 hard_regs_live_known
= live_known
;
2293 static_reload_reg_p
= reload_reg_p
;
2295 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2296 neither are insns that SET cc0. Insns that use CC0 are not allowed
2297 to have any input reloads. */
2298 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2299 no_output_reloads
= 1;
2302 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2303 no_input_reloads
= 1;
2304 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2305 no_output_reloads
= 1;
2308 #ifdef SECONDARY_MEMORY_NEEDED
2309 /* The eliminated forms of any secondary memory locations are per-insn, so
2310 clear them out here. */
2312 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2315 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2316 Make OPERANDS point to a vector of operand values.
2317 Make OPERAND_LOCS point to a vector of pointers to
2318 where the operands were found.
2319 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2320 constraint-strings for this insn.
2321 Return if the insn needs no reload processing. */
2323 switch (GET_CODE (body
))
2333 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2334 is cheap to move between them. If it is not, there may not be an insn
2335 to do the copy, so we may need a reload. */
2336 if (GET_CODE (SET_DEST (body
)) == REG
2337 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2338 && GET_CODE (SET_SRC (body
)) == REG
2339 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2340 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2341 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2345 reload_n_operands
= noperands
= asm_noperands (body
);
2348 /* This insn is an `asm' with operands. */
2350 insn_code_number
= -1;
2351 this_insn_is_asm
= 1;
2353 /* expand_asm_operands makes sure there aren't too many operands. */
2354 if (noperands
> MAX_RECOG_OPERANDS
)
2357 /* Now get the operand values and constraints out of the insn. */
2359 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2360 constraints
, operand_mode
);
2363 bcopy ((char *) constraints
, (char *) constraints1
,
2364 noperands
* sizeof (char *));
2365 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2366 for (i
= 1; i
< noperands
; i
++)
2367 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2369 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2370 /* Avoid further trouble with this insn. */
2371 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2380 /* Ordinary insn: recognize it, get the operands via insn_extract
2381 and get the constraints. */
2383 insn_code_number
= recog_memoized (insn
);
2384 if (insn_code_number
< 0)
2385 fatal_insn_not_found (insn
);
2387 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2388 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2389 /* Just return "no reloads" if insn has no operands with constraints. */
2390 if (n_alternatives
== 0)
2392 insn_extract (insn
);
2393 for (i
= 0; i
< noperands
; i
++)
2395 constraints
[i
] = constraints1
[i
]
2396 = insn_operand_constraint
[insn_code_number
][i
];
2397 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2406 /* If we will need to know, later, whether some pair of operands
2407 are the same, we must compare them now and save the result.
2408 Reloading the base and index registers will clobber them
2409 and afterward they will fail to match. */
2411 for (i
= 0; i
< noperands
; i
++)
2416 substed_operand
[i
] = recog_operand
[i
];
2419 modified
[i
] = RELOAD_READ
;
2421 /* Scan this operand's constraint to see if it is an output operand,
2422 an in-out operand, is commutative, or should match another. */
2427 modified
[i
] = RELOAD_WRITE
;
2429 modified
[i
] = RELOAD_READ_WRITE
;
2432 /* The last operand should not be marked commutative. */
2433 if (i
== noperands
- 1)
2435 if (this_insn_is_asm
)
2436 warning_for_asm (this_insn
,
2437 "`%%' constraint used with last operand");
2444 else if (c
>= '0' && c
<= '9')
2447 operands_match
[c
][i
]
2448 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2450 /* An operand may not match itself. */
2453 if (this_insn_is_asm
)
2454 warning_for_asm (this_insn
,
2455 "operand %d has constraint %d", i
, c
);
2460 /* If C can be commuted with C+1, and C might need to match I,
2461 then C+1 might also need to match I. */
2462 if (commutative
>= 0)
2464 if (c
== commutative
|| c
== commutative
+ 1)
2466 int other
= c
+ (c
== commutative
? 1 : -1);
2467 operands_match
[other
][i
]
2468 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2470 if (i
== commutative
|| i
== commutative
+ 1)
2472 int other
= i
+ (i
== commutative
? 1 : -1);
2473 operands_match
[c
][other
]
2474 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2476 /* Note that C is supposed to be less than I.
2477 No need to consider altering both C and I because in
2478 that case we would alter one into the other. */
2484 /* Examine each operand that is a memory reference or memory address
2485 and reload parts of the addresses into index registers.
2486 Also here any references to pseudo regs that didn't get hard regs
2487 but are equivalent to constants get replaced in the insn itself
2488 with those constants. Nobody will ever see them again.
2490 Finally, set up the preferred classes of each operand. */
2492 for (i
= 0; i
< noperands
; i
++)
2494 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2496 address_reloaded
[i
] = 0;
2497 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2498 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2501 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2502 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2505 if (*constraints
[i
] == 0)
2506 /* Ignore things like match_operator operands. */
2508 else if (constraints
[i
][0] == 'p')
2510 find_reloads_address (VOIDmode
, NULL_PTR
,
2511 recog_operand
[i
], recog_operand_loc
[i
],
2512 i
, operand_type
[i
], ind_levels
);
2513 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2515 else if (code
== MEM
)
2517 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2518 recog_operand_loc
[i
],
2519 XEXP (recog_operand
[i
], 0),
2520 &XEXP (recog_operand
[i
], 0),
2521 i
, address_type
[i
], ind_levels
))
2522 address_reloaded
[i
] = 1;
2523 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2525 else if (code
== SUBREG
)
2526 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2527 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2530 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2531 else if (code
== PLUS
)
2532 /* We can get a PLUS as an "operand" as a result of
2533 register elimination. See eliminate_regs and gen_reload. */
2534 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2535 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2537 else if (code
== REG
)
2539 /* This is equivalent to calling find_reloads_toplev.
2540 The code is duplicated for speed.
2541 When we find a pseudo always equivalent to a constant,
2542 we replace it by the constant. We must be sure, however,
2543 that we don't try to replace it in the insn in which it
2545 register int regno
= REGNO (recog_operand
[i
]);
2546 if (reg_equiv_constant
[regno
] != 0
2547 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2548 substed_operand
[i
] = recog_operand
[i
]
2549 = reg_equiv_constant
[regno
];
2550 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2551 that feeds this insn. */
2552 if (reg_equiv_mem
[regno
] != 0)
2553 substed_operand
[i
] = recog_operand
[i
]
2554 = reg_equiv_mem
[regno
];
2556 if (reg_equiv_address
[regno
] != 0)
2558 /* If reg_equiv_address is not a constant address, copy it,
2559 since it may be shared. */
2560 /* We must rerun eliminate_regs, in case the elimination
2561 offsets have changed. */
2562 rtx address
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
],
2566 if (rtx_varies_p (address
))
2567 address
= copy_rtx (address
);
2569 /* If this is an output operand, we must output a CLOBBER
2570 after INSN so find_equiv_reg knows REGNO is being written.
2571 Mark this insn specially, do we can put our output reloads
2574 if (modified
[i
] != RELOAD_READ
)
2575 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2580 *recog_operand_loc
[i
] = recog_operand
[i
]
2581 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2582 RTX_UNCHANGING_P (recog_operand
[i
])
2583 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2584 find_reloads_address (GET_MODE (recog_operand
[i
]),
2585 recog_operand_loc
[i
],
2586 XEXP (recog_operand
[i
], 0),
2587 &XEXP (recog_operand
[i
], 0),
2588 i
, address_type
[i
], ind_levels
);
2589 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2592 /* If the operand is still a register (we didn't replace it with an
2593 equivalent), get the preferred class to reload it into. */
2594 code
= GET_CODE (recog_operand
[i
]);
2596 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2597 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2599 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2600 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2603 /* If this is simply a copy from operand 1 to operand 0, merge the
2604 preferred classes for the operands. */
2605 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2606 && recog_operand
[1] == SET_SRC (set
))
2608 preferred_class
[0] = preferred_class
[1]
2609 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2610 pref_or_nothing
[0] |= pref_or_nothing
[1];
2611 pref_or_nothing
[1] |= pref_or_nothing
[0];
2614 /* Now see what we need for pseudo-regs that didn't get hard regs
2615 or got the wrong kind of hard reg. For this, we must consider
2616 all the operands together against the register constraints. */
2618 best
= MAX_RECOG_OPERANDS
+ 300;
2621 goal_alternative_swapped
= 0;
2624 /* The constraints are made of several alternatives.
2625 Each operand's constraint looks like foo,bar,... with commas
2626 separating the alternatives. The first alternatives for all
2627 operands go together, the second alternatives go together, etc.
2629 First loop over alternatives. */
2631 for (this_alternative_number
= 0;
2632 this_alternative_number
< n_alternatives
;
2633 this_alternative_number
++)
2635 /* Loop over operands for one constraint alternative. */
2636 /* LOSERS counts those that don't fit this alternative
2637 and would require loading. */
2639 /* BAD is set to 1 if it some operand can't fit this alternative
2640 even after reloading. */
2642 /* REJECT is a count of how undesirable this alternative says it is
2643 if any reloading is required. If the alternative matches exactly
2644 then REJECT is ignored, but otherwise it gets this much
2645 counted against it in addition to the reloading needed. Each
2646 ? counts three times here since we want the disparaging caused by
2647 a bad register class to only count 1/3 as much. */
2650 this_earlyclobber
= 0;
2652 for (i
= 0; i
< noperands
; i
++)
2654 register char *p
= constraints
[i
];
2655 register int win
= 0;
2656 /* 0 => this operand can be reloaded somehow for this alternative */
2658 /* 0 => this operand can be reloaded if the alternative allows regs. */
2661 register rtx operand
= recog_operand
[i
];
2663 /* Nonzero means this is a MEM that must be reloaded into a reg
2664 regardless of what the constraint says. */
2665 int force_reload
= 0;
2667 /* Nonzero if a constant forced into memory would be OK for this
2670 int earlyclobber
= 0;
2672 /* If the operand is a SUBREG, extract
2673 the REG or MEM (or maybe even a constant) within.
2674 (Constants can occur as a result of reg_equiv_constant.) */
2676 while (GET_CODE (operand
) == SUBREG
)
2678 offset
+= SUBREG_WORD (operand
);
2679 operand
= SUBREG_REG (operand
);
2680 /* Force reload if this is a constant or PLUS or if there may may
2681 be a problem accessing OPERAND in the outer mode. */
2682 if (CONSTANT_P (operand
)
2683 || GET_CODE (operand
) == PLUS
2684 /* We must force a reload of paradoxical SUBREGs
2685 of a MEM because the alignment of the inner value
2686 may not be enough to do the outer reference. On
2687 big-endian machines, it may also reference outside
2690 On machines that extend byte operations and we have a
2691 SUBREG where both the inner and outer modes are no wider
2692 than a word and the inner mode is narrower, is integral,
2693 and gets extended when loaded from memory, combine.c has
2694 made assumptions about the behavior of the machine in such
2695 register access. If the data is, in fact, in memory we
2696 must always load using the size assumed to be in the
2697 register and let the insn do the different-sized
2699 || ((GET_CODE (operand
) == MEM
2700 || (GET_CODE (operand
)== REG
2701 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2702 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2703 < BIGGEST_ALIGNMENT
)
2704 && (GET_MODE_SIZE (operand_mode
[i
])
2705 > GET_MODE_SIZE (GET_MODE (operand
))))
2706 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2707 #ifdef LOAD_EXTEND_OP
2708 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2709 && (GET_MODE_SIZE (GET_MODE (operand
))
2711 && (GET_MODE_SIZE (operand_mode
[i
])
2712 > GET_MODE_SIZE (GET_MODE (operand
)))
2713 && INTEGRAL_MODE_P (GET_MODE (operand
))
2714 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2717 /* Subreg of a hard reg which can't handle the subreg's mode
2718 or which would handle that mode in the wrong number of
2719 registers for subregging to work. */
2720 || (GET_CODE (operand
) == REG
2721 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2722 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2723 && (GET_MODE_SIZE (GET_MODE (operand
))
2725 && ((GET_MODE_SIZE (GET_MODE (operand
))
2727 != HARD_REGNO_NREGS (REGNO (operand
),
2728 GET_MODE (operand
))))
2729 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2734 this_alternative
[i
] = (int) NO_REGS
;
2735 this_alternative_win
[i
] = 0;
2736 this_alternative_offmemok
[i
] = 0;
2737 this_alternative_earlyclobber
[i
] = 0;
2738 this_alternative_matches
[i
] = -1;
2740 /* An empty constraint or empty alternative
2741 allows anything which matched the pattern. */
2742 if (*p
== 0 || *p
== ',')
2745 /* Scan this alternative's specs for this operand;
2746 set WIN if the operand fits any letter in this alternative.
2747 Otherwise, clear BADOP if this operand could
2748 fit some letter after reloads,
2749 or set WINREG if this operand could fit after reloads
2750 provided the constraint allows some registers. */
2752 while (*p
&& (c
= *p
++) != ',')
2761 /* The last operand should not be marked commutative. */
2762 if (i
!= noperands
- 1)
2775 /* Ignore rest of this alternative as far as
2776 reloading is concerned. */
2777 while (*p
&& *p
!= ',') p
++;
2786 this_alternative_matches
[i
] = c
;
2787 /* We are supposed to match a previous operand.
2788 If we do, we win if that one did.
2789 If we do not, count both of the operands as losers.
2790 (This is too conservative, since most of the time
2791 only a single reload insn will be needed to make
2792 the two operands win. As a result, this alternative
2793 may be rejected when it is actually desirable.) */
2794 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2795 /* If we are matching as if two operands were swapped,
2796 also pretend that operands_match had been computed
2798 But if I is the second of those and C is the first,
2799 don't exchange them, because operands_match is valid
2800 only on one side of its diagonal. */
2802 [(c
== commutative
|| c
== commutative
+ 1)
2803 ? 2*commutative
+ 1 - c
: c
]
2804 [(i
== commutative
|| i
== commutative
+ 1)
2805 ? 2*commutative
+ 1 - i
: i
])
2806 : operands_match
[c
][i
])
2807 win
= this_alternative_win
[c
];
2810 /* Operands don't match. */
2812 /* Retroactively mark the operand we had to match
2813 as a loser, if it wasn't already. */
2814 if (this_alternative_win
[c
])
2816 this_alternative_win
[c
] = 0;
2817 if (this_alternative
[c
] == (int) NO_REGS
)
2819 /* But count the pair only once in the total badness of
2820 this alternative, if the pair can be a dummy reload. */
2822 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2823 recog_operand_loc
[i
], recog_operand_loc
[c
],
2824 operand_mode
[i
], operand_mode
[c
],
2825 this_alternative
[c
], -1);
2830 /* This can be fixed with reloads if the operand
2831 we are supposed to match can be fixed with reloads. */
2833 this_alternative
[i
] = this_alternative
[c
];
2835 /* If we have to reload this operand and some previous
2836 operand also had to match the same thing as this
2837 operand, we don't know how to do that. So reject this
2839 if (! win
|| force_reload
)
2840 for (j
= 0; j
< i
; j
++)
2841 if (this_alternative_matches
[j
]
2842 == this_alternative_matches
[i
])
2848 /* All necessary reloads for an address_operand
2849 were handled in find_reloads_address. */
2850 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2857 if (GET_CODE (operand
) == MEM
2858 || (GET_CODE (operand
) == REG
2859 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2860 && reg_renumber
[REGNO (operand
)] < 0))
2862 if (CONSTANT_P (operand
))
2868 if (GET_CODE (operand
) == MEM
2869 && ! address_reloaded
[i
]
2870 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2871 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2876 if (GET_CODE (operand
) == MEM
2877 && ! address_reloaded
[i
]
2878 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2879 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2883 /* Memory operand whose address is not offsettable. */
2887 if (GET_CODE (operand
) == MEM
2888 && ! (ind_levels
? offsettable_memref_p (operand
)
2889 : offsettable_nonstrict_memref_p (operand
))
2890 /* Certain mem addresses will become offsettable
2891 after they themselves are reloaded. This is important;
2892 we don't want our own handling of unoffsettables
2893 to override the handling of reg_equiv_address. */
2894 && !(GET_CODE (XEXP (operand
, 0)) == REG
2896 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2900 /* Memory operand whose address is offsettable. */
2904 if ((GET_CODE (operand
) == MEM
2905 /* If IND_LEVELS, find_reloads_address won't reload a
2906 pseudo that didn't get a hard reg, so we have to
2907 reject that case. */
2908 && (ind_levels
? offsettable_memref_p (operand
)
2909 : offsettable_nonstrict_memref_p (operand
)))
2910 /* A reloaded auto-increment address is offsettable,
2911 because it is now just a simple register indirect. */
2912 || (GET_CODE (operand
) == MEM
2913 && address_reloaded
[i
]
2914 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2915 || GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2916 || GET_CODE (XEXP (operand
, 0)) == POST_INC
2917 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2918 /* Certain mem addresses will become offsettable
2919 after they themselves are reloaded. This is important;
2920 we don't want our own handling of unoffsettables
2921 to override the handling of reg_equiv_address. */
2922 || (GET_CODE (operand
) == MEM
2923 && GET_CODE (XEXP (operand
, 0)) == REG
2925 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2926 || (GET_CODE (operand
) == REG
2927 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2928 && reg_renumber
[REGNO (operand
)] < 0
2929 /* If reg_equiv_address is nonzero, we will be
2930 loading it into a register; hence it will be
2931 offsettable, but we cannot say that reg_equiv_mem
2932 is offsettable without checking. */
2933 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2934 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2935 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2937 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2944 /* Output operand that is stored before the need for the
2945 input operands (and their index registers) is over. */
2946 earlyclobber
= 1, this_earlyclobber
= 1;
2950 #ifndef REAL_ARITHMETIC
2951 /* Match any floating double constant, but only if
2952 we can examine the bits of it reliably. */
2953 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2954 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2955 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2958 if (GET_CODE (operand
) == CONST_DOUBLE
)
2963 if (GET_CODE (operand
) == CONST_DOUBLE
)
2969 if (GET_CODE (operand
) == CONST_DOUBLE
2970 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2975 if (GET_CODE (operand
) == CONST_INT
2976 || (GET_CODE (operand
) == CONST_DOUBLE
2977 && GET_MODE (operand
) == VOIDmode
))
2980 if (CONSTANT_P (operand
)
2981 #ifdef LEGITIMATE_PIC_OPERAND_P
2982 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2989 if (GET_CODE (operand
) == CONST_INT
2990 || (GET_CODE (operand
) == CONST_DOUBLE
2991 && GET_MODE (operand
) == VOIDmode
))
3003 if (GET_CODE (operand
) == CONST_INT
3004 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3014 /* A PLUS is never a valid operand, but reload can make
3015 it from a register when eliminating registers. */
3016 && GET_CODE (operand
) != PLUS
3017 /* A SCRATCH is not a valid operand. */
3018 && GET_CODE (operand
) != SCRATCH
3019 #ifdef LEGITIMATE_PIC_OPERAND_P
3020 && (! CONSTANT_P (operand
)
3022 || LEGITIMATE_PIC_OPERAND_P (operand
))
3024 && (GENERAL_REGS
== ALL_REGS
3025 || GET_CODE (operand
) != REG
3026 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3027 && reg_renumber
[REGNO (operand
)] < 0)))
3029 /* Drop through into 'r' case */
3033 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3036 #ifdef EXTRA_CONSTRAINT
3042 if (EXTRA_CONSTRAINT (operand
, c
))
3049 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3052 if (GET_MODE (operand
) == BLKmode
)
3055 if (GET_CODE (operand
) == REG
3056 && reg_fits_class_p (operand
, this_alternative
[i
],
3057 offset
, GET_MODE (recog_operand
[i
])))
3064 /* If this operand could be handled with a reg,
3065 and some reg is allowed, then this operand can be handled. */
3066 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3069 /* Record which operands fit this alternative. */
3070 this_alternative_earlyclobber
[i
] = earlyclobber
;
3071 if (win
&& ! force_reload
)
3072 this_alternative_win
[i
] = 1;
3075 int const_to_mem
= 0;
3077 this_alternative_offmemok
[i
] = offmemok
;
3081 /* Alternative loses if it has no regs for a reg operand. */
3082 if (GET_CODE (operand
) == REG
3083 && this_alternative
[i
] == (int) NO_REGS
3084 && this_alternative_matches
[i
] < 0)
3087 /* Alternative loses if it requires a type of reload not
3088 permitted for this insn. We can always reload SCRATCH
3089 and objects with a REG_UNUSED note. */
3090 if (GET_CODE (operand
) != SCRATCH
3091 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3092 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3094 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
3097 /* If this is a constant that is reloaded into the desired
3098 class by copying it to memory first, count that as another
3099 reload. This is consistent with other code and is
3100 required to avoid choosing another alternative when
3101 the constant is moved into memory by this function on
3102 an early reload pass. Note that the test here is
3103 precisely the same as in the code below that calls
3105 if (CONSTANT_P (operand
)
3106 /* force_const_mem does not accept HIGH. */
3107 && GET_CODE (operand
) != HIGH
3108 && (PREFERRED_RELOAD_CLASS (operand
,
3109 (enum reg_class
) this_alternative
[i
])
3111 && operand_mode
[i
] != VOIDmode
)
3114 if (this_alternative
[i
] != (int) NO_REGS
)
3118 /* If we can't reload this value at all, reject this
3119 alternative. Note that we could also lose due to
3120 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3123 if (! CONSTANT_P (operand
)
3124 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3125 && (PREFERRED_RELOAD_CLASS (operand
,
3126 (enum reg_class
) this_alternative
[i
])
3130 /* We prefer to reload pseudos over reloading other things,
3131 since such reloads may be able to be eliminated later.
3132 If we are reloading a SCRATCH, we won't be generating any
3133 insns, just using a register, so it is also preferred.
3134 So bump REJECT in other cases. Don't do this in the
3135 case where we are forcing a constant into memory and
3136 it will then win since we don't want to have a different
3137 alternative match then. */
3138 if (! (GET_CODE (operand
) == REG
3139 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3140 && GET_CODE (operand
) != SCRATCH
3141 && ! (const_to_mem
&& constmemok
))
3145 /* If this operand is a pseudo register that didn't get a hard
3146 reg and this alternative accepts some register, see if the
3147 class that we want is a subset of the preferred class for this
3148 register. If not, but it intersects that class, use the
3149 preferred class instead. If it does not intersect the preferred
3150 class, show that usage of this alternative should be discouraged;
3151 it will be discouraged more still if the register is `preferred
3152 or nothing'. We do this because it increases the chance of
3153 reusing our spill register in a later insn and avoiding a pair
3154 of memory stores and loads.
3156 Don't bother with this if this alternative will accept this
3159 Don't do this for a multiword operand, since it is only a
3160 small win and has the risk of requiring more spill registers,
3161 which could cause a large loss.
3163 Don't do this if the preferred class has only one register
3164 because we might otherwise exhaust the class. */
3167 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3168 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3169 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3171 if (! reg_class_subset_p (this_alternative
[i
],
3172 preferred_class
[i
]))
3174 /* Since we don't have a way of forming the intersection,
3175 we just do something special if the preferred class
3176 is a subset of the class we have; that's the most
3177 common case anyway. */
3178 if (reg_class_subset_p (preferred_class
[i
],
3179 this_alternative
[i
]))
3180 this_alternative
[i
] = (int) preferred_class
[i
];
3182 reject
+= (1 + pref_or_nothing
[i
]);
3187 /* Now see if any output operands that are marked "earlyclobber"
3188 in this alternative conflict with any input operands
3189 or any memory addresses. */
3191 for (i
= 0; i
< noperands
; i
++)
3192 if (this_alternative_earlyclobber
[i
]
3193 && this_alternative_win
[i
])
3195 struct decomposition early_data
;
3197 early_data
= decompose (recog_operand
[i
]);
3199 if (modified
[i
] == RELOAD_READ
)
3201 if (this_insn_is_asm
)
3202 warning_for_asm (this_insn
,
3203 "`&' constraint used with input operand");
3209 if (this_alternative
[i
] == NO_REGS
)
3211 this_alternative_earlyclobber
[i
] = 0;
3212 if (this_insn_is_asm
)
3213 error_for_asm (this_insn
,
3214 "`&' constraint used with no register class");
3219 for (j
= 0; j
< noperands
; j
++)
3220 /* Is this an input operand or a memory ref? */
3221 if ((GET_CODE (recog_operand
[j
]) == MEM
3222 || modified
[j
] != RELOAD_WRITE
)
3224 /* Ignore things like match_operator operands. */
3225 && *constraints1
[j
] != 0
3226 /* Don't count an input operand that is constrained to match
3227 the early clobber operand. */
3228 && ! (this_alternative_matches
[j
] == i
3229 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3230 /* Is it altered by storing the earlyclobber operand? */
3231 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3233 /* If the output is in a single-reg class,
3234 it's costly to reload it, so reload the input instead. */
3235 if (reg_class_size
[this_alternative
[i
]] == 1
3236 && (GET_CODE (recog_operand
[j
]) == REG
3237 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3240 this_alternative_win
[j
] = 0;
3245 /* If an earlyclobber operand conflicts with something,
3246 it must be reloaded, so request this and count the cost. */
3250 this_alternative_win
[i
] = 0;
3251 for (j
= 0; j
< noperands
; j
++)
3252 if (this_alternative_matches
[j
] == i
3253 && this_alternative_win
[j
])
3255 this_alternative_win
[j
] = 0;
3261 /* If one alternative accepts all the operands, no reload required,
3262 choose that alternative; don't consider the remaining ones. */
3265 /* Unswap these so that they are never swapped at `finish'. */
3266 if (commutative
>= 0)
3268 recog_operand
[commutative
] = substed_operand
[commutative
];
3269 recog_operand
[commutative
+ 1]
3270 = substed_operand
[commutative
+ 1];
3272 for (i
= 0; i
< noperands
; i
++)
3274 goal_alternative_win
[i
] = 1;
3275 goal_alternative
[i
] = this_alternative
[i
];
3276 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3277 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3278 goal_alternative_earlyclobber
[i
]
3279 = this_alternative_earlyclobber
[i
];
3281 goal_alternative_number
= this_alternative_number
;
3282 goal_alternative_swapped
= swapped
;
3283 goal_earlyclobber
= this_earlyclobber
;
3287 /* REJECT, set by the ! and ? constraint characters and when a register
3288 would be reloaded into a non-preferred class, discourages the use of
3289 this alternative for a reload goal. REJECT is incremented by three
3290 for each ? and one for each non-preferred class. */
3291 losers
= losers
* 3 + reject
;
3293 /* If this alternative can be made to work by reloading,
3294 and it needs less reloading than the others checked so far,
3295 record it as the chosen goal for reloading. */
3296 if (! bad
&& best
> losers
)
3298 for (i
= 0; i
< noperands
; i
++)
3300 goal_alternative
[i
] = this_alternative
[i
];
3301 goal_alternative_win
[i
] = this_alternative_win
[i
];
3302 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3303 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3304 goal_alternative_earlyclobber
[i
]
3305 = this_alternative_earlyclobber
[i
];
3307 goal_alternative_swapped
= swapped
;
3309 goal_alternative_number
= this_alternative_number
;
3310 goal_earlyclobber
= this_earlyclobber
;
3314 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3315 then we need to try each alternative twice,
3316 the second time matching those two operands
3317 as if we had exchanged them.
3318 To do this, really exchange them in operands.
3320 If we have just tried the alternatives the second time,
3321 return operands to normal and drop through. */
3323 if (commutative
>= 0)
3328 register enum reg_class tclass
;
3331 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3332 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3334 tclass
= preferred_class
[commutative
];
3335 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3336 preferred_class
[commutative
+ 1] = tclass
;
3338 t
= pref_or_nothing
[commutative
];
3339 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3340 pref_or_nothing
[commutative
+ 1] = t
;
3342 bcopy ((char *) constraints1
, (char *) constraints
,
3343 noperands
* sizeof (char *));
3348 recog_operand
[commutative
] = substed_operand
[commutative
];
3349 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3353 /* The operands don't meet the constraints.
3354 goal_alternative describes the alternative
3355 that we could reach by reloading the fewest operands.
3356 Reload so as to fit it. */
3358 if (best
== MAX_RECOG_OPERANDS
+ 300)
3360 /* No alternative works with reloads?? */
3361 if (insn_code_number
>= 0)
3363 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3364 /* Avoid further trouble with this insn. */
3365 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3370 /* Jump to `finish' from above if all operands are valid already.
3371 In that case, goal_alternative_win is all 1. */
3374 /* Right now, for any pair of operands I and J that are required to match,
3376 goal_alternative_matches[J] is I.
3377 Set up goal_alternative_matched as the inverse function:
3378 goal_alternative_matched[I] = J. */
3380 for (i
= 0; i
< noperands
; i
++)
3381 goal_alternative_matched
[i
] = -1;
3383 for (i
= 0; i
< noperands
; i
++)
3384 if (! goal_alternative_win
[i
]
3385 && goal_alternative_matches
[i
] >= 0)
3386 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3388 /* If the best alternative is with operands 1 and 2 swapped,
3389 consider them swapped before reporting the reloads. Update the
3390 operand numbers of any reloads already pushed. */
3392 if (goal_alternative_swapped
)
3396 tem
= substed_operand
[commutative
];
3397 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3398 substed_operand
[commutative
+ 1] = tem
;
3399 tem
= recog_operand
[commutative
];
3400 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3401 recog_operand
[commutative
+ 1] = tem
;
3403 for (i
= 0; i
< n_reloads
; i
++)
3405 if (reload_opnum
[i
] == commutative
)
3406 reload_opnum
[i
] = commutative
+ 1;
3407 else if (reload_opnum
[i
] == commutative
+ 1)
3408 reload_opnum
[i
] = commutative
;
3412 /* Perform whatever substitutions on the operands we are supposed
3413 to make due to commutativity or replacement of registers
3414 with equivalent constants or memory slots. */
3416 for (i
= 0; i
< noperands
; i
++)
3418 *recog_operand_loc
[i
] = substed_operand
[i
];
3419 /* While we are looping on operands, initialize this. */
3420 operand_reloadnum
[i
] = -1;
3422 /* If this is an earlyclobber operand, we need to widen the scope.
3423 The reload must remain valid from the start of the insn being
3424 reloaded until after the operand is stored into its destination.
3425 We approximate this with RELOAD_OTHER even though we know that we
3426 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3428 One special case that is worth checking is when we have an
3429 output that is earlyclobber but isn't used past the insn (typically
3430 a SCRATCH). In this case, we only need have the reload live
3431 through the insn itself, but not for any of our input or output
3434 In any case, anything needed to address this operand can remain
3435 however they were previously categorized. */
3437 if (goal_alternative_earlyclobber
[i
])
3439 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3440 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3443 /* Any constants that aren't allowed and can't be reloaded
3444 into registers are here changed into memory references. */
3445 for (i
= 0; i
< noperands
; i
++)
3446 if (! goal_alternative_win
[i
]
3447 && CONSTANT_P (recog_operand
[i
])
3448 /* force_const_mem does not accept HIGH. */
3449 && GET_CODE (recog_operand
[i
]) != HIGH
3450 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3451 (enum reg_class
) goal_alternative
[i
])
3453 && operand_mode
[i
] != VOIDmode
)
3455 *recog_operand_loc
[i
] = recog_operand
[i
]
3456 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3458 i
, address_type
[i
], ind_levels
, 0);
3459 if (alternative_allows_memconst (constraints1
[i
],
3460 goal_alternative_number
))
3461 goal_alternative_win
[i
] = 1;
3464 /* Record the values of the earlyclobber operands for the caller. */
3465 if (goal_earlyclobber
)
3466 for (i
= 0; i
< noperands
; i
++)
3467 if (goal_alternative_earlyclobber
[i
])
3468 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3470 /* Now record reloads for all the operands that need them. */
3471 for (i
= 0; i
< noperands
; i
++)
3472 if (! goal_alternative_win
[i
])
3474 /* Operands that match previous ones have already been handled. */
3475 if (goal_alternative_matches
[i
] >= 0)
3477 /* Handle an operand with a nonoffsettable address
3478 appearing where an offsettable address will do
3479 by reloading the address into a base register.
3481 ??? We can also do this when the operand is a register and
3482 reg_equiv_mem is not offsettable, but this is a bit tricky,
3483 so we don't bother with it. It may not be worth doing. */
3484 else if (goal_alternative_matched
[i
] == -1
3485 && goal_alternative_offmemok
[i
]
3486 && GET_CODE (recog_operand
[i
]) == MEM
)
3488 operand_reloadnum
[i
]
3489 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3490 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3491 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3492 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3493 reload_inc
[operand_reloadnum
[i
]]
3494 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3496 /* If this operand is an output, we will have made any
3497 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3498 now we are treating part of the operand as an input, so
3499 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3501 if (modified
[i
] == RELOAD_WRITE
)
3502 for (j
= 0; j
< n_reloads
; j
++)
3503 if (reload_opnum
[j
] == i
3504 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3505 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3507 else if (goal_alternative_matched
[i
] == -1)
3508 operand_reloadnum
[i
] =
3509 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3510 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3511 (modified
[i
] != RELOAD_WRITE
?
3512 recog_operand_loc
[i
] : 0),
3513 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3514 (enum reg_class
) goal_alternative
[i
],
3515 (modified
[i
] == RELOAD_WRITE
3516 ? VOIDmode
: operand_mode
[i
]),
3517 (modified
[i
] == RELOAD_READ
3518 ? VOIDmode
: operand_mode
[i
]),
3519 (insn_code_number
< 0 ? 0
3520 : insn_operand_strict_low
[insn_code_number
][i
]),
3521 0, i
, operand_type
[i
]);
3522 /* In a matching pair of operands, one must be input only
3523 and the other must be output only.
3524 Pass the input operand as IN and the other as OUT. */
3525 else if (modified
[i
] == RELOAD_READ
3526 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3528 operand_reloadnum
[i
]
3529 = push_reload (recog_operand
[i
],
3530 recog_operand
[goal_alternative_matched
[i
]],
3531 recog_operand_loc
[i
],
3532 recog_operand_loc
[goal_alternative_matched
[i
]],
3533 (enum reg_class
) goal_alternative
[i
],
3535 operand_mode
[goal_alternative_matched
[i
]],
3536 0, 0, i
, RELOAD_OTHER
);
3537 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3539 else if (modified
[i
] == RELOAD_WRITE
3540 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3542 operand_reloadnum
[goal_alternative_matched
[i
]]
3543 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3545 recog_operand_loc
[goal_alternative_matched
[i
]],
3546 recog_operand_loc
[i
],
3547 (enum reg_class
) goal_alternative
[i
],
3548 operand_mode
[goal_alternative_matched
[i
]],
3550 0, 0, i
, RELOAD_OTHER
);
3551 operand_reloadnum
[i
] = output_reloadnum
;
3553 else if (insn_code_number
>= 0)
3557 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3558 /* Avoid further trouble with this insn. */
3559 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3564 else if (goal_alternative_matched
[i
] < 0
3565 && goal_alternative_matches
[i
] < 0
3568 /* For each non-matching operand that's a MEM or a pseudo-register
3569 that didn't get a hard register, make an optional reload.
3570 This may get done even if the insn needs no reloads otherwise. */
3572 rtx operand
= recog_operand
[i
];
3574 while (GET_CODE (operand
) == SUBREG
)
3575 operand
= XEXP (operand
, 0);
3576 if ((GET_CODE (operand
) == MEM
3577 || (GET_CODE (operand
) == REG
3578 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3579 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3580 && ! no_input_reloads
3581 /* Optional output reloads don't do anything and we mustn't
3582 make in-out reloads on insns that are not permitted output
3584 && (modified
[i
] == RELOAD_READ
3585 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3586 operand_reloadnum
[i
]
3587 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3588 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3589 (modified
[i
] != RELOAD_WRITE
3590 ? recog_operand_loc
[i
] : 0),
3591 (modified
[i
] != RELOAD_READ
3592 ? recog_operand_loc
[i
] : 0),
3593 (enum reg_class
) goal_alternative
[i
],
3594 (modified
[i
] == RELOAD_WRITE
3595 ? VOIDmode
: operand_mode
[i
]),
3596 (modified
[i
] == RELOAD_READ
3597 ? VOIDmode
: operand_mode
[i
]),
3598 (insn_code_number
< 0 ? 0
3599 : insn_operand_strict_low
[insn_code_number
][i
]),
3600 1, i
, operand_type
[i
]);
3602 else if (goal_alternative_matches
[i
] >= 0
3603 && goal_alternative_win
[goal_alternative_matches
[i
]]
3604 && modified
[i
] == RELOAD_READ
3605 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3606 && ! no_input_reloads
&& ! no_output_reloads
3609 /* Similarly, make an optional reload for a pair of matching
3610 objects that are in MEM or a pseudo that didn't get a hard reg. */
3612 rtx operand
= recog_operand
[i
];
3614 while (GET_CODE (operand
) == SUBREG
)
3615 operand
= XEXP (operand
, 0);
3616 if ((GET_CODE (operand
) == MEM
3617 || (GET_CODE (operand
) == REG
3618 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3619 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3621 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3622 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3624 recog_operand_loc
[goal_alternative_matches
[i
]],
3625 recog_operand_loc
[i
],
3626 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3627 operand_mode
[goal_alternative_matches
[i
]],
3629 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3632 /* If this insn pattern contains any MATCH_DUP's, make sure that
3633 they will be substituted if the operands they match are substituted.
3634 Also do now any substitutions we already did on the operands.
3636 Don't do this if we aren't making replacements because we might be
3637 propagating things allocated by frame pointer elimination into places
3638 it doesn't expect. */
3640 if (insn_code_number
>= 0 && replace
)
3641 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3643 int opno
= recog_dup_num
[i
];
3644 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3645 if (operand_reloadnum
[opno
] >= 0)
3646 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3647 insn_operand_mode
[insn_code_number
][opno
]);
3651 /* This loses because reloading of prior insns can invalidate the equivalence
3652 (or at least find_equiv_reg isn't smart enough to find it any more),
3653 causing this insn to need more reload regs than it needed before.
3654 It may be too late to make the reload regs available.
3655 Now this optimization is done safely in choose_reload_regs. */
3657 /* For each reload of a reg into some other class of reg,
3658 search for an existing equivalent reg (same value now) in the right class.
3659 We can use it as long as we don't need to change its contents. */
3660 for (i
= 0; i
< n_reloads
; i
++)
3661 if (reload_reg_rtx
[i
] == 0
3662 && reload_in
[i
] != 0
3663 && GET_CODE (reload_in
[i
]) == REG
3664 && reload_out
[i
] == 0)
3667 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3668 static_reload_reg_p
, 0, reload_inmode
[i
]);
3669 /* Prevent generation of insn to load the value
3670 because the one we found already has the value. */
3671 if (reload_reg_rtx
[i
])
3672 reload_in
[i
] = reload_reg_rtx
[i
];
3676 /* Perhaps an output reload can be combined with another
3677 to reduce needs by one. */
3678 if (!goal_earlyclobber
)
3681 /* If we have a pair of reloads for parts of an address, they are reloading
3682 the same object, the operands themselves were not reloaded, and they
3683 are for two operands that are supposed to match, merge the reloads and
3684 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3686 for (i
= 0; i
< n_reloads
; i
++)
3690 for (j
= i
+ 1; j
< n_reloads
; j
++)
3691 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3692 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3693 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3694 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3695 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3696 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3697 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3698 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3699 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3700 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3701 || (goal_alternative_matches
[reload_opnum
[j
]]
3702 == reload_opnum
[i
])))
3704 for (k
= 0; k
< n_replacements
; k
++)
3705 if (replacements
[k
].what
== j
)
3706 replacements
[k
].what
= i
;
3708 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3713 /* Scan all the reloads and update their type.
3714 If a reload is for the address of an operand and we didn't reload
3715 that operand, change the type. Similarly, change the operand number
3716 of a reload when two operands match. If a reload is optional, treat it
3717 as though the operand isn't reloaded.
3719 ??? This latter case is somewhat odd because if we do the optional
3720 reload, it means the object is hanging around. Thus we need only
3721 do the address reload if the optional reload was NOT done.
3723 Change secondary reloads to be the address type of their operand, not
3726 If an operand's reload is now RELOAD_OTHER, change any
3727 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3728 RELOAD_FOR_OTHER_ADDRESS. */
3730 for (i
= 0; i
< n_reloads
; i
++)
3732 if (reload_secondary_p
[i
]
3733 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3734 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3736 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3737 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3738 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3739 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3741 /* If we have a secondary reload to go along with this reload,
3742 change its type to RELOAD_FOR_OPADDR_ADDR. */
3744 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3745 && reload_secondary_in_reload
[i
] != -1)
3747 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3749 reload_when_needed
[secondary_in_reload
] =
3750 RELOAD_FOR_OPADDR_ADDR
;
3752 /* If there's a tertiary reload we have to change it also. */
3753 if (secondary_in_reload
> 0
3754 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3755 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3756 = RELOAD_FOR_OPADDR_ADDR
;
3759 if (reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3760 && reload_secondary_out_reload
[i
] != -1)
3762 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3764 reload_when_needed
[secondary_out_reload
] =
3765 RELOAD_FOR_OPADDR_ADDR
;
3767 /* If there's a tertiary reload we have to change it also. */
3768 if (secondary_out_reload
3769 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3770 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3771 = RELOAD_FOR_OPADDR_ADDR
;
3773 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3776 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3777 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3778 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3780 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3782 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3783 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3786 /* See if we have any reloads that are now allowed to be merged
3787 because we've changed when the reload is needed to
3788 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3789 check for the most common cases. */
3791 for (i
= 0; i
< n_reloads
; i
++)
3792 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3793 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3794 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3795 for (j
= 0; j
< n_reloads
; j
++)
3796 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3797 && reload_when_needed
[j
] == reload_when_needed
[i
]
3798 && MATCHES (reload_in
[i
], reload_in
[j
])
3799 && reload_reg_class
[i
] == reload_reg_class
[j
]
3800 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3801 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3803 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3804 transfer_replacements (i
, j
);
3808 #else /* no REGISTER_CONSTRAINTS */
3810 int insn_code_number
;
3811 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3813 rtx body
= PATTERN (insn
);
3817 n_earlyclobbers
= 0;
3818 replace_reloads
= replace
;
3821 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3822 Store the operand values in RECOG_OPERAND and the locations
3823 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3824 Return if the insn needs no reload processing. */
3826 switch (GET_CODE (body
))
3837 noperands
= asm_noperands (body
);
3840 /* This insn is an `asm' with operands.
3841 First, find out how many operands, and allocate space. */
3843 insn_code_number
= -1;
3844 /* ??? This is a bug! ???
3845 Give up and delete this insn if it has too many operands. */
3846 if (noperands
> MAX_RECOG_OPERANDS
)
3849 /* Now get the operand values out of the insn. */
3851 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3852 NULL_PTR
, NULL_PTR
);
3857 /* Ordinary insn: recognize it, allocate space for operands and
3858 constraints, and get them out via insn_extract. */
3860 insn_code_number
= recog_memoized (insn
);
3861 noperands
= insn_n_operands
[insn_code_number
];
3862 insn_extract (insn
);
3868 for (i
= 0; i
< noperands
; i
++)
3870 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3871 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3873 if (insn_code_number
>= 0)
3874 if (insn_operand_address_p
[insn_code_number
][i
])
3875 find_reloads_address (VOIDmode
, NULL_PTR
,
3876 recog_operand
[i
], recog_operand_loc
[i
],
3877 i
, RELOAD_FOR_INPUT
, ind_levels
);
3879 /* In these cases, we can't tell if the operand is an input
3880 or an output, so be conservative. In practice it won't be
3884 find_reloads_address (GET_MODE (recog_operand
[i
]),
3885 recog_operand_loc
[i
],
3886 XEXP (recog_operand
[i
], 0),
3887 &XEXP (recog_operand
[i
], 0),
3888 i
, RELOAD_OTHER
, ind_levels
);
3890 recog_operand
[i
] = *recog_operand_loc
[i
]
3891 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3892 ind_levels
, is_set_dest
);
3895 register int regno
= REGNO (recog_operand
[i
]);
3896 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3897 recog_operand
[i
] = *recog_operand_loc
[i
]
3898 = reg_equiv_constant
[regno
];
3899 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3900 that feeds this insn. */
3901 if (reg_equiv_mem
[regno
] != 0)
3902 recog_operand
[i
] = *recog_operand_loc
[i
]
3903 = reg_equiv_mem
[regno
];
3908 /* Perhaps an output reload can be combined with another
3909 to reduce needs by one. */
3910 if (!goal_earlyclobber
)
3912 #endif /* no REGISTER_CONSTRAINTS */
3915 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3916 accepts a memory operand with constant address. */
3919 alternative_allows_memconst (constraint
, altnum
)
3924 /* Skip alternatives before the one requested. */
3927 while (*constraint
++ != ',');
3930 /* Scan the requested alternative for 'm' or 'o'.
3931 If one of them is present, this alternative accepts memory constants. */
3932 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3933 if (c
== 'm' || c
== 'o')
3938 /* Scan X for memory references and scan the addresses for reloading.
3939 Also checks for references to "constant" regs that we want to eliminate
3940 and replaces them with the values they stand for.
3941 We may alter X destructively if it contains a reference to such.
3942 If X is just a constant reg, we return the equivalent value
3945 IND_LEVELS says how many levels of indirect addressing this machine
3948 OPNUM and TYPE identify the purpose of the reload.
3950 IS_SET_DEST is true if X is the destination of a SET, which is not
3951 appropriate to be replaced by a constant. */
3954 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3957 enum reload_type type
;
3961 register RTX_CODE code
= GET_CODE (x
);
3963 register char *fmt
= GET_RTX_FORMAT (code
);
3968 /* This code is duplicated for speed in find_reloads. */
3969 register int regno
= REGNO (x
);
3970 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3971 x
= reg_equiv_constant
[regno
];
3973 /* This creates (subreg (mem...)) which would cause an unnecessary
3974 reload of the mem. */
3975 else if (reg_equiv_mem
[regno
] != 0)
3976 x
= reg_equiv_mem
[regno
];
3978 else if (reg_equiv_address
[regno
] != 0)
3980 /* If reg_equiv_address varies, it may be shared, so copy it. */
3981 /* We must rerun eliminate_regs, in case the elimination
3982 offsets have changed. */
3983 rtx addr
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0,
3987 if (rtx_varies_p (addr
))
3988 addr
= copy_rtx (addr
);
3990 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3991 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3992 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3994 &XEXP (x
, 0), opnum
, type
, ind_levels
);
4001 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4002 opnum
, type
, ind_levels
);
4006 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4008 /* Check for SUBREG containing a REG that's equivalent to a constant.
4009 If the constant has a known value, truncate it right now.
4010 Similarly if we are extracting a single-word of a multi-word
4011 constant. If the constant is symbolic, allow it to be substituted
4012 normally. push_reload will strip the subreg later. If the
4013 constant is VOIDmode, abort because we will lose the mode of
4014 the register (this should never happen because one of the cases
4015 above should handle it). */
4017 register int regno
= REGNO (SUBREG_REG (x
));
4020 if (subreg_lowpart_p (x
)
4021 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4022 && reg_equiv_constant
[regno
] != 0
4023 && (tem
= gen_lowpart_common (GET_MODE (x
),
4024 reg_equiv_constant
[regno
])) != 0)
4027 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4028 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4029 && reg_equiv_constant
[regno
] != 0
4030 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4032 GET_MODE (SUBREG_REG (x
)))) != 0)
4035 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4036 && reg_equiv_constant
[regno
] != 0
4037 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4040 /* If the subreg contains a reg that will be converted to a mem,
4041 convert the subreg to a narrower memref now.
4042 Otherwise, we would get (subreg (mem ...) ...),
4043 which would force reload of the mem.
4045 We also need to do this if there is an equivalent MEM that is
4046 not offsettable. In that case, alter_subreg would produce an
4047 invalid address on big-endian machines.
4049 For machines that extend byte loads, we must not reload using
4050 a wider mode if we have a paradoxical SUBREG. find_reloads will
4051 force a reload in that case. So we should not do anything here. */
4053 else if (regno
>= FIRST_PSEUDO_REGISTER
4054 #ifdef LOAD_EXTEND_OP
4055 && (GET_MODE_SIZE (GET_MODE (x
))
4056 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4058 && (reg_equiv_address
[regno
] != 0
4059 || (reg_equiv_mem
[regno
] != 0
4060 && (! strict_memory_address_p (GET_MODE (x
),
4061 XEXP (reg_equiv_mem
[regno
], 0))
4062 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
4064 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
4065 /* We must rerun eliminate_regs, in case the elimination
4066 offsets have changed. */
4067 rtx addr
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0,
4070 if (BYTES_BIG_ENDIAN
)
4073 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
4074 offset
+= MIN (size
, UNITS_PER_WORD
);
4075 size
= GET_MODE_SIZE (GET_MODE (x
));
4076 offset
-= MIN (size
, UNITS_PER_WORD
);
4078 addr
= plus_constant (addr
, offset
);
4079 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
4080 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4081 find_reloads_address (GET_MODE (x
), NULL_PTR
,
4083 &XEXP (x
, 0), opnum
, type
, ind_levels
);
4088 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4091 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4092 ind_levels
, is_set_dest
);
4097 /* Return a mem ref for the memory equivalent of reg REGNO.
4098 This mem ref is not shared with anything. */
4101 make_memloc (ad
, regno
)
4106 /* We must rerun eliminate_regs, in case the elimination
4107 offsets have changed. */
4108 rtx tem
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
),
4111 #if 0 /* We cannot safely reuse a memloc made here;
4112 if the pseudo appears twice, and its mem needs a reload,
4113 it gets two separate reloads assigned, but it only
4114 gets substituted with the second of them;
4115 then it can get used before that reload reg gets loaded up. */
4116 for (i
= 0; i
< n_memlocs
; i
++)
4117 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
4121 /* If TEM might contain a pseudo, we must copy it to avoid
4122 modifying it when we do the substitution for the reload. */
4123 if (rtx_varies_p (tem
))
4124 tem
= copy_rtx (tem
);
4126 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
4127 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4128 memlocs
[n_memlocs
++] = tem
;
4132 /* Record all reloads needed for handling memory address AD
4133 which appears in *LOC in a memory reference to mode MODE
4134 which itself is found in location *MEMREFLOC.
4135 Note that we take shortcuts assuming that no multi-reg machine mode
4136 occurs as part of an address.
4138 OPNUM and TYPE specify the purpose of this reload.
4140 IND_LEVELS says how many levels of indirect addressing this machine
4143 Value is nonzero if this address is reloaded or replaced as a whole.
4144 This is interesting to the caller if the address is an autoincrement.
4146 Note that there is no verification that the address will be valid after
4147 this routine does its work. Instead, we rely on the fact that the address
4148 was valid when reload started. So we need only undo things that reload
4149 could have broken. These are wrong register types, pseudos not allocated
4150 to a hard register, and frame pointer elimination. */
4153 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
4154 enum machine_mode mode
;
4159 enum reload_type type
;
4165 /* If the address is a register, see if it is a legitimate address and
4166 reload if not. We first handle the cases where we need not reload
4167 or where we must reload in a non-standard way. */
4169 if (GET_CODE (ad
) == REG
)
4173 if (reg_equiv_constant
[regno
] != 0
4174 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4176 *loc
= ad
= reg_equiv_constant
[regno
];
4180 else if (reg_equiv_address
[regno
] != 0)
4182 tem
= make_memloc (ad
, regno
);
4183 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4184 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4185 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4186 GET_MODE (ad
), VOIDmode
, 0, 0,
4191 /* We can avoid a reload if the register's equivalent memory expression
4192 is valid as an indirect memory address.
4193 But not all addresses are valid in a mem used as an indirect address:
4194 only reg or reg+constant. */
4196 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4197 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4198 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4199 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4200 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4201 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 1)))))
4204 /* The only remaining case where we can avoid a reload is if this is a
4205 hard register that is valid as a base register and which is not the
4206 subject of a CLOBBER in this insn. */
4208 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4209 && ! regno_clobbered_p (regno
, this_insn
))
4212 /* If we do not have one of the cases above, we must do the reload. */
4213 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4214 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4218 if (strict_memory_address_p (mode
, ad
))
4220 /* The address appears valid, so reloads are not needed.
4221 But the address may contain an eliminable register.
4222 This can happen because a machine with indirect addressing
4223 may consider a pseudo register by itself a valid address even when
4224 it has failed to get a hard reg.
4225 So do a tree-walk to find and eliminate all such regs. */
4227 /* But first quickly dispose of a common case. */
4228 if (GET_CODE (ad
) == PLUS
4229 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4230 && GET_CODE (XEXP (ad
, 0)) == REG
4231 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4234 subst_reg_equivs_changed
= 0;
4235 *loc
= subst_reg_equivs (ad
);
4237 if (! subst_reg_equivs_changed
)
4240 /* Check result for validity after substitution. */
4241 if (strict_memory_address_p (mode
, ad
))
4245 /* The address is not valid. We have to figure out why. One possibility
4246 is that it is itself a MEM. This can happen when the frame pointer is
4247 being eliminated, a pseudo is not allocated to a hard register, and the
4248 offset between the frame and stack pointers is not its initial value.
4249 In that case the pseudo will have been replaced by a MEM referring to
4250 the stack pointer. */
4251 if (GET_CODE (ad
) == MEM
)
4253 /* First ensure that the address in this MEM is valid. Then, unless
4254 indirect addresses are valid, reload the MEM into a register. */
4256 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4257 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4259 /* If tem was changed, then we must create a new memory reference to
4260 hold it and store it back into memrefloc. */
4261 if (tem
!= ad
&& memrefloc
)
4263 *memrefloc
= copy_rtx (*memrefloc
);
4264 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4265 loc
= &XEXP (*memrefloc
, 0);
4268 /* Check similar cases as for indirect addresses as above except
4269 that we can allow pseudos and a MEM since they should have been
4270 taken care of above. */
4273 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4274 || GET_CODE (XEXP (tem
, 0)) == MEM
4275 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4276 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4277 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4278 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4280 /* Must use TEM here, not AD, since it is the one that will
4281 have any subexpressions reloaded, if needed. */
4282 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4283 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4291 /* If we have address of a stack slot but it's not valid because the
4292 displacement is too large, compute the sum in a register.
4293 Handle all base registers here, not just fp/ap/sp, because on some
4294 targets (namely SH) we can also get too large displacements from
4295 big-endian corrections. */
4296 else if (GET_CODE (ad
) == PLUS
4297 && GET_CODE (XEXP (ad
, 0)) == REG
4298 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4299 && REG_OK_FOR_BASE_P (XEXP (ad
, 0))
4300 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4302 /* Unshare the MEM rtx so we can safely alter it. */
4305 *memrefloc
= copy_rtx (*memrefloc
);
4306 loc
= &XEXP (*memrefloc
, 0);
4308 if (double_reg_address_ok
)
4310 /* Unshare the sum as well. */
4311 *loc
= ad
= copy_rtx (ad
);
4312 /* Reload the displacement into an index reg.
4313 We assume the frame pointer or arg pointer is a base reg. */
4314 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4315 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4320 /* If the sum of two regs is not necessarily valid,
4321 reload the sum into a base reg.
4322 That will at least work. */
4323 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4324 opnum
, type
, ind_levels
);
4329 /* If we have an indexed stack slot, there are three possible reasons why
4330 it might be invalid: The index might need to be reloaded, the address
4331 might have been made by frame pointer elimination and hence have a
4332 constant out of range, or both reasons might apply.
4334 We can easily check for an index needing reload, but even if that is the
4335 case, we might also have an invalid constant. To avoid making the
4336 conservative assumption and requiring two reloads, we see if this address
4337 is valid when not interpreted strictly. If it is, the only problem is
4338 that the index needs a reload and find_reloads_address_1 will take care
4341 There is still a case when we might generate an extra reload,
4342 however. In certain cases eliminate_regs will return a MEM for a REG
4343 (see the code there for details). In those cases, memory_address_p
4344 applied to our address will return 0 so we will think that our offset
4345 must be too large. But it might indeed be valid and the only problem
4346 is that a MEM is present where a REG should be. This case should be
4347 very rare and there doesn't seem to be any way to avoid it.
4349 If we decide to do something here, it must be that
4350 `double_reg_address_ok' is true and that this address rtl was made by
4351 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4352 rework the sum so that the reload register will be added to the index.
4353 This is safe because we know the address isn't shared.
4355 We check for fp/ap/sp as both the first and second operand of the
4358 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4359 && GET_CODE (XEXP (ad
, 0)) == PLUS
4360 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4361 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4362 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4364 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4365 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4367 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4368 && ! memory_address_p (mode
, ad
))
4370 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4371 plus_constant (XEXP (XEXP (ad
, 0), 0),
4372 INTVAL (XEXP (ad
, 1))),
4373 XEXP (XEXP (ad
, 0), 1));
4374 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4375 GET_MODE (ad
), opnum
, type
, ind_levels
);
4376 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4381 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4382 && GET_CODE (XEXP (ad
, 0)) == PLUS
4383 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4384 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4385 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4387 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4388 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4390 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4391 && ! memory_address_p (mode
, ad
))
4393 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4394 XEXP (XEXP (ad
, 0), 0),
4395 plus_constant (XEXP (XEXP (ad
, 0), 1),
4396 INTVAL (XEXP (ad
, 1))));
4397 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4398 GET_MODE (ad
), opnum
, type
, ind_levels
);
4399 find_reloads_address_1 (XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
, type
, 0);
4404 /* See if address becomes valid when an eliminable register
4405 in a sum is replaced. */
4408 if (GET_CODE (ad
) == PLUS
)
4409 tem
= subst_indexed_address (ad
);
4410 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4412 /* Ok, we win that way. Replace any additional eliminable
4415 subst_reg_equivs_changed
= 0;
4416 tem
= subst_reg_equivs (tem
);
4418 /* Make sure that didn't make the address invalid again. */
4420 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4427 /* If constants aren't valid addresses, reload the constant address
4429 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4431 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4432 Unshare it so we can safely alter it. */
4433 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4434 && CONSTANT_POOL_ADDRESS_P (ad
))
4436 *memrefloc
= copy_rtx (*memrefloc
);
4437 loc
= &XEXP (*memrefloc
, 0);
4440 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4445 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4448 /* Find all pseudo regs appearing in AD
4449 that are eliminable in favor of equivalent values
4450 and do not have hard regs; replace them by their equivalents. */
4453 subst_reg_equivs (ad
)
4456 register RTX_CODE code
= GET_CODE (ad
);
4474 register int regno
= REGNO (ad
);
4476 if (reg_equiv_constant
[regno
] != 0)
4478 subst_reg_equivs_changed
= 1;
4479 return reg_equiv_constant
[regno
];
4485 /* Quickly dispose of a common case. */
4486 if (XEXP (ad
, 0) == frame_pointer_rtx
4487 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4491 fmt
= GET_RTX_FORMAT (code
);
4492 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4494 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4498 /* Compute the sum of X and Y, making canonicalizations assumed in an
4499 address, namely: sum constant integers, surround the sum of two
4500 constants with a CONST, put the constant as the second operand, and
4501 group the constant on the outermost sum.
4503 This routine assumes both inputs are already in canonical form. */
4510 enum machine_mode mode
= GET_MODE (x
);
4512 if (mode
== VOIDmode
)
4513 mode
= GET_MODE (y
);
4515 if (mode
== VOIDmode
)
4518 if (GET_CODE (x
) == CONST_INT
)
4519 return plus_constant (y
, INTVAL (x
));
4520 else if (GET_CODE (y
) == CONST_INT
)
4521 return plus_constant (x
, INTVAL (y
));
4522 else if (CONSTANT_P (x
))
4523 tem
= x
, x
= y
, y
= tem
;
4525 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4526 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4528 /* Note that if the operands of Y are specified in the opposite
4529 order in the recursive calls below, infinite recursion will occur. */
4530 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4531 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4533 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4534 constant will have been placed second. */
4535 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4537 if (GET_CODE (x
) == CONST
)
4539 if (GET_CODE (y
) == CONST
)
4542 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4545 return gen_rtx (PLUS
, mode
, x
, y
);
4548 /* If ADDR is a sum containing a pseudo register that should be
4549 replaced with a constant (from reg_equiv_constant),
4550 return the result of doing so, and also apply the associative
4551 law so that the result is more likely to be a valid address.
4552 (But it is not guaranteed to be one.)
4554 Note that at most one register is replaced, even if more are
4555 replaceable. Also, we try to put the result into a canonical form
4556 so it is more likely to be a valid address.
4558 In all other cases, return ADDR. */
4561 subst_indexed_address (addr
)
4564 rtx op0
= 0, op1
= 0, op2
= 0;
4568 if (GET_CODE (addr
) == PLUS
)
4570 /* Try to find a register to replace. */
4571 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4572 if (GET_CODE (op0
) == REG
4573 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4574 && reg_renumber
[regno
] < 0
4575 && reg_equiv_constant
[regno
] != 0)
4576 op0
= reg_equiv_constant
[regno
];
4577 else if (GET_CODE (op1
) == REG
4578 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4579 && reg_renumber
[regno
] < 0
4580 && reg_equiv_constant
[regno
] != 0)
4581 op1
= reg_equiv_constant
[regno
];
4582 else if (GET_CODE (op0
) == PLUS
4583 && (tem
= subst_indexed_address (op0
)) != op0
)
4585 else if (GET_CODE (op1
) == PLUS
4586 && (tem
= subst_indexed_address (op1
)) != op1
)
4591 /* Pick out up to three things to add. */
4592 if (GET_CODE (op1
) == PLUS
)
4593 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4594 else if (GET_CODE (op0
) == PLUS
)
4595 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4597 /* Compute the sum. */
4599 op1
= form_sum (op1
, op2
);
4601 op0
= form_sum (op0
, op1
);
4608 /* Record the pseudo registers we must reload into hard registers
4609 in a subexpression of a would-be memory address, X.
4610 (This function is not called if the address we find is strictly valid.)
4611 CONTEXT = 1 means we are considering regs as index regs,
4612 = 0 means we are considering them as base regs.
4614 OPNUM and TYPE specify the purpose of any reloads made.
4616 IND_LEVELS says how many levels of indirect addressing are
4617 supported at this point in the address.
4619 We return nonzero if X, as a whole, is reloaded or replaced. */
4621 /* Note that we take shortcuts assuming that no multi-reg machine mode
4622 occurs as part of an address.
4623 Also, this is not fully machine-customizable; it works for machines
4624 such as vaxes and 68000's and 32000's, but other possible machines
4625 could have addressing modes that this does not handle right. */
4628 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4633 enum reload_type type
;
4636 register RTX_CODE code
= GET_CODE (x
);
4642 register rtx orig_op0
= XEXP (x
, 0);
4643 register rtx orig_op1
= XEXP (x
, 1);
4644 register RTX_CODE code0
= GET_CODE (orig_op0
);
4645 register RTX_CODE code1
= GET_CODE (orig_op1
);
4646 register rtx op0
= orig_op0
;
4647 register rtx op1
= orig_op1
;
4649 if (GET_CODE (op0
) == SUBREG
)
4651 op0
= SUBREG_REG (op0
);
4652 code0
= GET_CODE (op0
);
4653 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
4654 op0
= gen_rtx (REG
, word_mode
,
4655 REGNO (op0
) + SUBREG_WORD (orig_op0
));
4658 if (GET_CODE (op1
) == SUBREG
)
4660 op1
= SUBREG_REG (op1
);
4661 code1
= GET_CODE (op1
);
4662 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
4663 op1
= gen_rtx (REG
, GET_MODE (op1
),
4664 REGNO (op1
) + SUBREG_WORD (orig_op1
));
4667 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4668 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4670 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4672 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4676 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4677 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4679 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4681 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4685 else if (code0
== CONST_INT
|| code0
== CONST
4686 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4687 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4690 else if (code1
== CONST_INT
|| code1
== CONST
4691 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4692 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4695 else if (code0
== REG
&& code1
== REG
)
4697 if (REG_OK_FOR_INDEX_P (op0
)
4698 && REG_OK_FOR_BASE_P (op1
))
4700 else if (REG_OK_FOR_INDEX_P (op1
)
4701 && REG_OK_FOR_BASE_P (op0
))
4703 else if (REG_OK_FOR_BASE_P (op1
))
4704 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4706 else if (REG_OK_FOR_BASE_P (op0
))
4707 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4709 else if (REG_OK_FOR_INDEX_P (op1
))
4710 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4712 else if (REG_OK_FOR_INDEX_P (op0
))
4713 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4717 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4719 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4724 else if (code0
== REG
)
4726 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4728 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4732 else if (code1
== REG
)
4734 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4736 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4747 if (GET_CODE (XEXP (x
, 0)) == REG
)
4749 register int regno
= REGNO (XEXP (x
, 0));
4753 /* A register that is incremented cannot be constant! */
4754 if (regno
>= FIRST_PSEUDO_REGISTER
4755 && reg_equiv_constant
[regno
] != 0)
4758 /* Handle a register that is equivalent to a memory location
4759 which cannot be addressed directly. */
4760 if (reg_equiv_address
[regno
] != 0)
4762 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4763 /* First reload the memory location's address. */
4764 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4765 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4766 /* Put this inside a new increment-expression. */
4767 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4768 /* Proceed to reload that, as if it contained a register. */
4771 /* If we have a hard register that is ok as an index,
4772 don't make a reload. If an autoincrement of a nice register
4773 isn't "valid", it must be that no autoincrement is "valid".
4774 If that is true and something made an autoincrement anyway,
4775 this must be a special context where one is allowed.
4776 (For example, a "push" instruction.)
4777 We can't improve this address, so leave it alone. */
4779 /* Otherwise, reload the autoincrement into a suitable hard reg
4780 and record how much to increment by. */
4782 if (reg_renumber
[regno
] >= 0)
4783 regno
= reg_renumber
[regno
];
4784 if ((regno
>= FIRST_PSEUDO_REGISTER
4785 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4786 : REGNO_OK_FOR_BASE_P (regno
))))
4791 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4792 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4793 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4795 reload_inc
[reloadnum
]
4796 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4801 /* Update the REG_INC notes. */
4803 for (link
= REG_NOTES (this_insn
);
4804 link
; link
= XEXP (link
, 1))
4805 if (REG_NOTE_KIND (link
) == REG_INC
4806 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4807 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4813 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4815 /* This is probably the result of a substitution, by eliminate_regs,
4816 of an equivalent address for a pseudo that was not allocated to a
4817 hard register. Verify that the specified address is valid and
4818 reload it into a register. */
4819 rtx tem
= XEXP (x
, 0);
4823 /* Since we know we are going to reload this item, don't decrement
4824 for the indirection level.
4826 Note that this is actually conservative: it would be slightly
4827 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4829 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4830 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4831 opnum
, type
, ind_levels
);
4833 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4834 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4835 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4836 reload_inc
[reloadnum
]
4837 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4839 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4841 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4848 /* This is probably the result of a substitution, by eliminate_regs, of
4849 an equivalent address for a pseudo that was not allocated to a hard
4850 register. Verify that the specified address is valid and reload it
4853 Since we know we are going to reload this item, don't decrement for
4854 the indirection level.
4856 Note that this is actually conservative: it would be slightly more
4857 efficient to use the value of SPILL_INDIRECT_LEVELS from
4860 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4861 opnum
, type
, ind_levels
);
4862 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4863 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4864 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4869 register int regno
= REGNO (x
);
4871 if (reg_equiv_constant
[regno
] != 0)
4873 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4874 (context
? INDEX_REG_CLASS
4876 GET_MODE (x
), opnum
, type
, ind_levels
);
4880 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4881 that feeds this insn. */
4882 if (reg_equiv_mem
[regno
] != 0)
4884 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4885 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4886 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4891 if (reg_equiv_address
[regno
] != 0)
4893 x
= make_memloc (x
, regno
);
4894 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4895 opnum
, type
, ind_levels
);
4898 if (reg_renumber
[regno
] >= 0)
4899 regno
= reg_renumber
[regno
];
4901 if ((regno
>= FIRST_PSEUDO_REGISTER
4902 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4903 : REGNO_OK_FOR_BASE_P (regno
))))
4905 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4906 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4907 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4911 /* If a register appearing in an address is the subject of a CLOBBER
4912 in this insn, reload it into some other register to be safe.
4913 The CLOBBER is supposed to make the register unavailable
4914 from before this insn to after it. */
4915 if (regno_clobbered_p (regno
, this_insn
))
4917 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4918 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4919 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4926 if (GET_CODE (SUBREG_REG (x
)) == REG
)
4928 /* If this is a SUBREG of a hard register and the resulting register
4929 is of the wrong class, reload the whole SUBREG. This avoids
4930 needless copies if SUBREG_REG is multi-word. */
4931 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4933 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4935 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
4936 : REGNO_OK_FOR_BASE_P (regno
)))
4938 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4939 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4940 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4944 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
4945 is larger than the class size, then reload the whole SUBREG. */
4948 enum reg_class
class = (context
4949 ? INDEX_REG_CLASS
: BASE_REG_CLASS
);
4950 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
4951 > reg_class_size
[class])
4953 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4954 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4963 register char *fmt
= GET_RTX_FORMAT (code
);
4966 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4969 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4970 opnum
, type
, ind_levels
);
4977 /* X, which is found at *LOC, is a part of an address that needs to be
4978 reloaded into a register of class CLASS. If X is a constant, or if
4979 X is a PLUS that contains a constant, check that the constant is a
4980 legitimate operand and that we are supposed to be able to load
4981 it into the register.
4983 If not, force the constant into memory and reload the MEM instead.
4985 MODE is the mode to use, in case X is an integer constant.
4987 OPNUM and TYPE describe the purpose of any reloads made.
4989 IND_LEVELS says how many levels of indirect addressing this machine
4993 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4996 enum reg_class
class;
4997 enum machine_mode mode
;
4999 enum reload_type type
;
5003 && (! LEGITIMATE_CONSTANT_P (x
)
5004 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5006 rtx tem
= x
= force_const_mem (mode
, x
);
5007 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5008 opnum
, type
, ind_levels
);
5011 else if (GET_CODE (x
) == PLUS
5012 && CONSTANT_P (XEXP (x
, 1))
5013 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5014 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5016 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5018 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
5019 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5020 opnum
, type
, ind_levels
);
5023 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5024 mode
, VOIDmode
, 0, 0, opnum
, type
);
5027 /* Substitute into the current INSN the registers into which we have reloaded
5028 the things that need reloading. The array `replacements'
5029 says contains the locations of all pointers that must be changed
5030 and says what to replace them with.
5032 Return the rtx that X translates into; usually X, but modified. */
5039 for (i
= 0; i
< n_replacements
; i
++)
5041 register struct replacement
*r
= &replacements
[i
];
5042 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
5045 /* Encapsulate RELOADREG so its machine mode matches what
5046 used to be there. Note that gen_lowpart_common will
5047 do the wrong thing if RELOADREG is multi-word. RELOADREG
5048 will always be a REG here. */
5049 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5050 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
5052 /* If we are putting this into a SUBREG and RELOADREG is a
5053 SUBREG, we would be making nested SUBREGs, so we have to fix
5054 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5056 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5058 if (GET_MODE (*r
->subreg_loc
)
5059 == GET_MODE (SUBREG_REG (reloadreg
)))
5060 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5063 *r
->where
= SUBREG_REG (reloadreg
);
5064 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5068 *r
->where
= reloadreg
;
5070 /* If reload got no reg and isn't optional, something's wrong. */
5071 else if (! reload_optional
[r
->what
])
5076 /* Make a copy of any replacements being done into X and move those copies
5077 to locations in Y, a copy of X. We only look at the highest level of
5081 copy_replacements (x
, y
)
5086 enum rtx_code code
= GET_CODE (x
);
5087 char *fmt
= GET_RTX_FORMAT (code
);
5088 struct replacement
*r
;
5090 /* We can't support X being a SUBREG because we might then need to know its
5091 location if something inside it was replaced. */
5095 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5097 for (j
= 0; j
< n_replacements
; j
++)
5099 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5101 r
= &replacements
[n_replacements
++];
5102 r
->where
= replacements
[j
].where
;
5103 r
->subreg_loc
= &XEXP (y
, i
);
5104 r
->what
= replacements
[j
].what
;
5105 r
->mode
= replacements
[j
].mode
;
5107 else if (replacements
[j
].where
== &XEXP (x
, i
))
5109 r
= &replacements
[n_replacements
++];
5110 r
->where
= &XEXP (y
, i
);
5112 r
->what
= replacements
[j
].what
;
5113 r
->mode
= replacements
[j
].mode
;
5118 /* If LOC was scheduled to be replaced by something, return the replacement.
5119 Otherwise, return *LOC. */
5122 find_replacement (loc
)
5125 struct replacement
*r
;
5127 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5129 rtx reloadreg
= reload_reg_rtx
[r
->what
];
5131 if (reloadreg
&& r
->where
== loc
)
5133 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5134 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
5138 else if (reloadreg
&& r
->subreg_loc
== loc
)
5140 /* RELOADREG must be either a REG or a SUBREG.
5142 ??? Is it actually still ever a SUBREG? If so, why? */
5144 if (GET_CODE (reloadreg
) == REG
)
5145 return gen_rtx (REG
, GET_MODE (*loc
),
5146 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5147 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5150 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5151 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5158 /* Return nonzero if register in range [REGNO, ENDREGNO)
5159 appears either explicitly or implicitly in X
5160 other than being stored into (except for earlyclobber operands).
5162 References contained within the substructure at LOC do not count.
5163 LOC may be zero, meaning don't ignore anything.
5165 This is similar to refers_to_regno_p in rtlanal.c except that we
5166 look at equivalences for pseudos that didn't get hard registers. */
5169 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5170 int regno
, endregno
;
5175 register RTX_CODE code
;
5182 code
= GET_CODE (x
);
5189 /* If this is a pseudo, a hard register must not have been allocated.
5190 X must therefore either be a constant or be in memory. */
5191 if (i
>= FIRST_PSEUDO_REGISTER
)
5193 if (reg_equiv_memory_loc
[i
])
5194 return refers_to_regno_for_reload_p (regno
, endregno
,
5195 reg_equiv_memory_loc
[i
],
5198 if (reg_equiv_constant
[i
])
5204 return (endregno
> i
5205 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5206 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5210 /* If this is a SUBREG of a hard reg, we can see exactly which
5211 registers are being modified. Otherwise, handle normally. */
5212 if (GET_CODE (SUBREG_REG (x
)) == REG
5213 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5215 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5217 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5218 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5220 return endregno
> inner_regno
&& regno
< inner_endregno
;
5226 if (&SET_DEST (x
) != loc
5227 /* Note setting a SUBREG counts as referring to the REG it is in for
5228 a pseudo but not for hard registers since we can
5229 treat each word individually. */
5230 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5231 && loc
!= &SUBREG_REG (SET_DEST (x
))
5232 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5233 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5234 && refers_to_regno_for_reload_p (regno
, endregno
,
5235 SUBREG_REG (SET_DEST (x
)),
5237 /* If the output is an earlyclobber operand, this is
5239 || ((GET_CODE (SET_DEST (x
)) != REG
5240 || earlyclobber_operand_p (SET_DEST (x
)))
5241 && refers_to_regno_for_reload_p (regno
, endregno
,
5242 SET_DEST (x
), loc
))))
5245 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5251 /* X does not match, so try its subexpressions. */
5253 fmt
= GET_RTX_FORMAT (code
);
5254 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5256 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5264 if (refers_to_regno_for_reload_p (regno
, endregno
,
5268 else if (fmt
[i
] == 'E')
5271 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5272 if (loc
!= &XVECEXP (x
, i
, j
)
5273 && refers_to_regno_for_reload_p (regno
, endregno
,
5274 XVECEXP (x
, i
, j
), loc
))
5281 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5282 we check if any register number in X conflicts with the relevant register
5283 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5284 contains a MEM (we don't bother checking for memory addresses that can't
5285 conflict because we expect this to be a rare case.
5287 This function is similar to reg_overlap_mention_p in rtlanal.c except
5288 that we look at equivalences for pseudos that didn't get hard registers. */
5291 reg_overlap_mentioned_for_reload_p (x
, in
)
5294 int regno
, endregno
;
5296 if (GET_CODE (x
) == SUBREG
)
5298 regno
= REGNO (SUBREG_REG (x
));
5299 if (regno
< FIRST_PSEUDO_REGISTER
)
5300 regno
+= SUBREG_WORD (x
);
5302 else if (GET_CODE (x
) == REG
)
5306 /* If this is a pseudo, it must not have been assigned a hard register.
5307 Therefore, it must either be in memory or be a constant. */
5309 if (regno
>= FIRST_PSEUDO_REGISTER
)
5311 if (reg_equiv_memory_loc
[regno
])
5312 return refers_to_mem_for_reload_p (in
);
5313 else if (reg_equiv_constant
[regno
])
5318 else if (CONSTANT_P (x
))
5320 else if (GET_CODE (x
) == MEM
)
5321 return refers_to_mem_for_reload_p (in
);
5322 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5323 || GET_CODE (x
) == CC0
)
5324 return reg_mentioned_p (x
, in
);
5328 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5329 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5331 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5334 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5338 refers_to_mem_for_reload_p (x
)
5344 if (GET_CODE (x
) == MEM
)
5347 if (GET_CODE (x
) == REG
)
5348 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5349 && reg_equiv_memory_loc
[REGNO (x
)]);
5351 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5352 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5354 && (GET_CODE (XEXP (x
, i
)) == MEM
5355 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5361 /* Check the insns before INSN to see if there is a suitable register
5362 containing the same value as GOAL.
5363 If OTHER is -1, look for a register in class CLASS.
5364 Otherwise, just see if register number OTHER shares GOAL's value.
5366 Return an rtx for the register found, or zero if none is found.
5368 If RELOAD_REG_P is (short *)1,
5369 we reject any hard reg that appears in reload_reg_rtx
5370 because such a hard reg is also needed coming into this insn.
5372 If RELOAD_REG_P is any other nonzero value,
5373 it is a vector indexed by hard reg number
5374 and we reject any hard reg whose element in the vector is nonnegative
5375 as well as any that appears in reload_reg_rtx.
5377 If GOAL is zero, then GOALREG is a register number; we look
5378 for an equivalent for that register.
5380 MODE is the machine mode of the value we want an equivalence for.
5381 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5383 This function is used by jump.c as well as in the reload pass.
5385 If GOAL is the sum of the stack pointer and a constant, we treat it
5386 as if it were a constant except that sp is required to be unchanging. */
5389 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5392 enum reg_class
class;
5394 short *reload_reg_p
;
5396 enum machine_mode mode
;
5398 register rtx p
= insn
;
5399 rtx goaltry
, valtry
, value
, where
;
5401 register int regno
= -1;
5405 int goal_mem_addr_varies
= 0;
5406 int need_stable_sp
= 0;
5412 else if (GET_CODE (goal
) == REG
)
5413 regno
= REGNO (goal
);
5414 else if (GET_CODE (goal
) == MEM
)
5416 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5417 if (MEM_VOLATILE_P (goal
))
5419 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5421 /* An address with side effects must be reexecuted. */
5432 else if (CONSTANT_P (goal
))
5434 else if (GET_CODE (goal
) == PLUS
5435 && XEXP (goal
, 0) == stack_pointer_rtx
5436 && CONSTANT_P (XEXP (goal
, 1)))
5437 goal_const
= need_stable_sp
= 1;
5441 /* On some machines, certain regs must always be rejected
5442 because they don't behave the way ordinary registers do. */
5444 #ifdef OVERLAPPING_REGNO_P
5445 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5446 && OVERLAPPING_REGNO_P (regno
))
5450 /* Scan insns back from INSN, looking for one that copies
5451 a value into or out of GOAL.
5452 Stop and give up if we reach a label. */
5457 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5459 if (GET_CODE (p
) == INSN
5460 /* If we don't want spill regs ... */
5461 && (! (reload_reg_p
!= 0
5462 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5463 /* ... then ignore insns introduced by reload; they aren't useful
5464 and can cause results in reload_as_needed to be different
5465 from what they were when calculating the need for spills.
5466 If we notice an input-reload insn here, we will reject it below,
5467 but it might hide a usable equivalent. That makes bad code.
5468 It may even abort: perhaps no reg was spilled for this insn
5469 because it was assumed we would find that equivalent. */
5470 || INSN_UID (p
) < reload_first_uid
))
5473 pat
= single_set (p
);
5474 /* First check for something that sets some reg equal to GOAL. */
5477 && true_regnum (SET_SRC (pat
)) == regno
5478 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5481 && true_regnum (SET_DEST (pat
)) == regno
5482 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5484 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5485 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5487 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5488 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5490 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5491 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5492 /* If we are looking for a constant,
5493 and something equivalent to that constant was copied
5494 into a reg, we can use that reg. */
5495 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5497 && rtx_equal_p (XEXP (tem
, 0), goal
)
5498 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5499 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5501 && GET_CODE (SET_DEST (pat
)) == REG
5502 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5503 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5504 && GET_CODE (goal
) == CONST_INT
5505 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5507 && rtx_equal_p (goal
, goaltry
)
5508 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5510 && (valueno
= true_regnum (valtry
)) >= 0)
5511 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5513 && GET_CODE (SET_DEST (pat
)) == REG
5514 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5515 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5516 && GET_CODE (goal
) == CONST_INT
5517 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5519 && rtx_equal_p (goal
, goaltry
)
5521 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5522 && (valueno
= true_regnum (valtry
)) >= 0)))
5525 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5526 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5536 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5537 (or copying VALUE into GOAL, if GOAL is also a register).
5538 Now verify that VALUE is really valid. */
5540 /* VALUENO is the register number of VALUE; a hard register. */
5542 /* Don't try to re-use something that is killed in this insn. We want
5543 to be able to trust REG_UNUSED notes. */
5544 if (find_reg_note (where
, REG_UNUSED
, value
))
5547 /* If we propose to get the value from the stack pointer or if GOAL is
5548 a MEM based on the stack pointer, we need a stable SP. */
5549 if (valueno
== STACK_POINTER_REGNUM
5550 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5554 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5555 if (GET_MODE (value
) != mode
)
5558 /* Reject VALUE if it was loaded from GOAL
5559 and is also a register that appears in the address of GOAL. */
5561 if (goal_mem
&& value
== SET_DEST (single_set (where
))
5562 && refers_to_regno_for_reload_p (valueno
,
5564 + HARD_REGNO_NREGS (valueno
, mode
)),
5568 /* Reject registers that overlap GOAL. */
5570 if (!goal_mem
&& !goal_const
5571 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5572 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5575 /* Reject VALUE if it is one of the regs reserved for reloads.
5576 Reload1 knows how to reuse them anyway, and it would get
5577 confused if we allocated one without its knowledge.
5578 (Now that insns introduced by reload are ignored above,
5579 this case shouldn't happen, but I'm not positive.) */
5581 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5582 && reload_reg_p
[valueno
] >= 0)
5585 /* On some machines, certain regs must always be rejected
5586 because they don't behave the way ordinary registers do. */
5588 #ifdef OVERLAPPING_REGNO_P
5589 if (OVERLAPPING_REGNO_P (valueno
))
5593 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5594 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5596 /* Reject VALUE if it is a register being used for an input reload
5597 even if it is not one of those reserved. */
5599 if (reload_reg_p
!= 0)
5602 for (i
= 0; i
< n_reloads
; i
++)
5603 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5605 int regno1
= REGNO (reload_reg_rtx
[i
]);
5606 int nregs1
= HARD_REGNO_NREGS (regno1
,
5607 GET_MODE (reload_reg_rtx
[i
]));
5608 if (regno1
< valueno
+ valuenregs
5609 && regno1
+ nregs1
> valueno
)
5615 /* We must treat frame pointer as varying here,
5616 since it can vary--in a nonlocal goto as generated by expand_goto. */
5617 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5619 /* Now verify that the values of GOAL and VALUE remain unaltered
5620 until INSN is reached. */
5629 /* Don't trust the conversion past a function call
5630 if either of the two is in a call-clobbered register, or memory. */
5631 if (GET_CODE (p
) == CALL_INSN
5632 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5633 && call_used_regs
[regno
])
5635 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5636 && call_used_regs
[valueno
])
5642 #ifdef NON_SAVING_SETJMP
5643 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
5644 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
5648 #ifdef INSN_CLOBBERS_REGNO_P
5649 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5650 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5651 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5652 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5656 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5658 /* If this insn P stores in either GOAL or VALUE, return 0.
5659 If GOAL is a memory ref and this insn writes memory, return 0.
5660 If GOAL is a memory ref and its address is not constant,
5661 and this insn P changes a register used in GOAL, return 0. */
5664 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5666 register rtx dest
= SET_DEST (pat
);
5667 while (GET_CODE (dest
) == SUBREG
5668 || GET_CODE (dest
) == ZERO_EXTRACT
5669 || GET_CODE (dest
) == SIGN_EXTRACT
5670 || GET_CODE (dest
) == STRICT_LOW_PART
)
5671 dest
= XEXP (dest
, 0);
5672 if (GET_CODE (dest
) == REG
)
5674 register int xregno
= REGNO (dest
);
5676 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5677 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5680 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5682 if (xregno
< valueno
+ valuenregs
5683 && xregno
+ xnregs
> valueno
)
5685 if (goal_mem_addr_varies
5686 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5689 else if (goal_mem
&& GET_CODE (dest
) == MEM
5690 && ! push_operand (dest
, GET_MODE (dest
)))
5692 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
5693 && reg_equiv_memory_loc
[regno
] != 0)
5695 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5698 else if (GET_CODE (pat
) == PARALLEL
)
5701 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5703 register rtx v1
= XVECEXP (pat
, 0, i
);
5704 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5706 register rtx dest
= SET_DEST (v1
);
5707 while (GET_CODE (dest
) == SUBREG
5708 || GET_CODE (dest
) == ZERO_EXTRACT
5709 || GET_CODE (dest
) == SIGN_EXTRACT
5710 || GET_CODE (dest
) == STRICT_LOW_PART
)
5711 dest
= XEXP (dest
, 0);
5712 if (GET_CODE (dest
) == REG
)
5714 register int xregno
= REGNO (dest
);
5716 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5717 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5720 if (xregno
< regno
+ nregs
5721 && xregno
+ xnregs
> regno
)
5723 if (xregno
< valueno
+ valuenregs
5724 && xregno
+ xnregs
> valueno
)
5726 if (goal_mem_addr_varies
5727 && reg_overlap_mentioned_for_reload_p (dest
,
5731 else if (goal_mem
&& GET_CODE (dest
) == MEM
5732 && ! push_operand (dest
, GET_MODE (dest
)))
5734 else if (need_stable_sp
5735 && push_operand (dest
, GET_MODE (dest
)))
5741 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
5745 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
5746 link
= XEXP (link
, 1))
5748 pat
= XEXP (link
, 0);
5749 if (GET_CODE (pat
) == CLOBBER
)
5751 register rtx dest
= SET_DEST (pat
);
5752 while (GET_CODE (dest
) == SUBREG
5753 || GET_CODE (dest
) == ZERO_EXTRACT
5754 || GET_CODE (dest
) == SIGN_EXTRACT
5755 || GET_CODE (dest
) == STRICT_LOW_PART
)
5756 dest
= XEXP (dest
, 0);
5757 if (GET_CODE (dest
) == REG
)
5759 register int xregno
= REGNO (dest
);
5761 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5762 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5765 if (xregno
< regno
+ nregs
5766 && xregno
+ xnregs
> regno
)
5768 if (xregno
< valueno
+ valuenregs
5769 && xregno
+ xnregs
> valueno
)
5771 if (goal_mem_addr_varies
5772 && reg_overlap_mentioned_for_reload_p (dest
,
5776 else if (goal_mem
&& GET_CODE (dest
) == MEM
5777 && ! push_operand (dest
, GET_MODE (dest
)))
5779 else if (need_stable_sp
5780 && push_operand (dest
, GET_MODE (dest
)))
5787 /* If this insn auto-increments or auto-decrements
5788 either regno or valueno, return 0 now.
5789 If GOAL is a memory ref and its address is not constant,
5790 and this insn P increments a register used in GOAL, return 0. */
5794 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5795 if (REG_NOTE_KIND (link
) == REG_INC
5796 && GET_CODE (XEXP (link
, 0)) == REG
)
5798 register int incno
= REGNO (XEXP (link
, 0));
5799 if (incno
< regno
+ nregs
&& incno
>= regno
)
5801 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5803 if (goal_mem_addr_varies
5804 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5814 /* Find a place where INCED appears in an increment or decrement operator
5815 within X, and return the amount INCED is incremented or decremented by.
5816 The value is always positive. */
5819 find_inc_amount (x
, inced
)
5822 register enum rtx_code code
= GET_CODE (x
);
5828 register rtx addr
= XEXP (x
, 0);
5829 if ((GET_CODE (addr
) == PRE_DEC
5830 || GET_CODE (addr
) == POST_DEC
5831 || GET_CODE (addr
) == PRE_INC
5832 || GET_CODE (addr
) == POST_INC
)
5833 && XEXP (addr
, 0) == inced
)
5834 return GET_MODE_SIZE (GET_MODE (x
));
5837 fmt
= GET_RTX_FORMAT (code
);
5838 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5842 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5849 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5851 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5861 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5864 regno_clobbered_p (regno
, insn
)
5868 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5869 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5870 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5872 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5874 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5878 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5879 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5880 && REGNO (XEXP (elt
, 0)) == regno
)
5888 static char *reload_when_needed_name
[] =
5891 "RELOAD_FOR_OUTPUT",
5893 "RELOAD_FOR_INPUT_ADDRESS",
5894 "RELOAD_FOR_OUTPUT_ADDRESS",
5895 "RELOAD_FOR_OPERAND_ADDRESS",
5896 "RELOAD_FOR_OPADDR_ADDR",
5898 "RELOAD_FOR_OTHER_ADDRESS"
5901 static char *reg_class_names
[] = REG_CLASS_NAMES
;
5903 /* This function is used to print the variables set by 'find_reloads' */
5910 fprintf (stderr
, "\nn_reloads = %d\n", n_reloads
);
5912 for (r
= 0; r
< n_reloads
; r
++)
5914 fprintf (stderr
, "\nRELOAD %d\n", r
);
5918 fprintf (stderr
, "\nreload_in (%s) = ",
5919 GET_MODE_NAME (reload_inmode
[r
]));
5920 debug_rtx (reload_in
[r
]);
5925 fprintf (stderr
, "\nreload_out (%s) = ",
5926 GET_MODE_NAME (reload_outmode
[r
]));
5927 debug_rtx (reload_out
[r
]);
5930 fprintf (stderr
, "%s, ", reg_class_names
[(int) reload_reg_class
[r
]]);
5932 fprintf (stderr
, "%s (opnum = %d)",
5933 reload_when_needed_name
[(int)reload_when_needed
[r
]],
5936 if (reload_optional
[r
])
5937 fprintf (stderr
, ", optional");
5940 fprintf (stderr
, ", inc by %d\n", reload_inc
[r
]);
5942 if (reload_nocombine
[r
])
5943 fprintf (stderr
, ", can't combine", reload_nocombine
[r
]);
5945 if (reload_secondary_p
[r
])
5946 fprintf (stderr
, ", secondary_reload_p");
5948 if (reload_in_reg
[r
])
5950 fprintf (stderr
, "\nreload_in_reg:\t\t\t");
5951 debug_rtx (reload_in_reg
[r
]);
5954 if (reload_reg_rtx
[r
])
5956 fprintf (stderr
, "\nreload_reg_rtx:\t\t\t");
5957 debug_rtx (reload_reg_rtx
[r
]);
5960 if (reload_secondary_in_reload
[r
] != -1)
5962 fprintf (stderr
, "\nsecondary_in_reload = ");
5963 fprintf (stderr
, "%d ", reload_secondary_in_reload
[r
]);
5966 if (reload_secondary_out_reload
[r
] != -1)
5968 if (reload_secondary_in_reload
[r
] != -1)
5969 fprintf (stderr
, ", secondary_out_reload = ");
5971 fprintf (stderr
, "\nsecondary_out_reload = ");
5973 fprintf (stderr
, "%d", reload_secondary_out_reload
[r
]);
5977 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
5979 fprintf (stderr
, "\nsecondary_in_icode = ");
5980 fprintf (stderr
, "%s", insn_name
[r
]);
5983 if (reload_secondary_out_icode
[r
] != CODE_FOR_nothing
)
5985 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
5986 fprintf (stderr
, ", secondary_out_icode = ");
5988 fprintf (stderr
, "\nsecondary_out_icode = ");
5990 fprintf (stderr
, "%s ", insn_name
[r
]);
5992 fprintf (stderr
, "\n");
5995 fprintf (stderr
, "\n");