* tree-ssa-phiopt.c (conditional_replacement): Construct proper SSA
[official-gcc.git] / gcc / mode-switching.c
bloba781cb2d743a8840485e66e79cc7caca6c902548
1 /* CPU mode switching
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "hard-reg-set.h"
29 #include "flags.h"
30 #include "real.h"
31 #include "insn-config.h"
32 #include "recog.h"
33 #include "basic-block.h"
34 #include "output.h"
35 #include "tm_p.h"
36 #include "function.h"
37 #include "tree-pass.h"
38 #include "timevar.h"
40 /* We want target macros for the mode switching code to be able to refer
41 to instruction attribute values. */
42 #include "insn-attr.h"
44 #ifdef OPTIMIZE_MODE_SWITCHING
46 /* The algorithm for setting the modes consists of scanning the insn list
47 and finding all the insns which require a specific mode. Each insn gets
48 a unique struct seginfo element. These structures are inserted into a list
49 for each basic block. For each entity, there is an array of bb_info over
50 the flow graph basic blocks (local var 'bb_info'), and contains a list
51 of all insns within that basic block, in the order they are encountered.
53 For each entity, any basic block WITHOUT any insns requiring a specific
54 mode are given a single entry, without a mode. (Each basic block
55 in the flow graph must have at least one entry in the segment table.)
57 The LCM algorithm is then run over the flow graph to determine where to
58 place the sets to the highest-priority value in respect of first the first
59 insn in any one block. Any adjustments required to the transparency
60 vectors are made, then the next iteration starts for the next-lower
61 priority mode, till for each entity all modes are exhausted.
63 More details are located in the code for optimize_mode_switching(). */
65 /* This structure contains the information for each insn which requires
66 either single or double mode to be set.
67 MODE is the mode this insn must be executed in.
68 INSN_PTR is the insn to be executed (may be the note that marks the
69 beginning of a basic block).
70 BBNUM is the flow graph basic block this insn occurs in.
71 NEXT is the next insn in the same basic block. */
72 struct seginfo
74 int mode;
75 rtx insn_ptr;
76 int bbnum;
77 struct seginfo *next;
78 HARD_REG_SET regs_live;
81 struct bb_info
83 struct seginfo *seginfo;
84 int computing;
87 /* These bitmaps are used for the LCM algorithm. */
89 static sbitmap *antic;
90 static sbitmap *transp;
91 static sbitmap *comp;
93 static struct seginfo * new_seginfo (int, rtx, int, HARD_REG_SET);
94 static void add_seginfo (struct bb_info *, struct seginfo *);
95 static void reg_dies (rtx, HARD_REG_SET);
96 static void reg_becomes_live (rtx, rtx, void *);
97 static void make_preds_opaque (basic_block, int);
100 /* This function will allocate a new BBINFO structure, initialized
101 with the MODE, INSN, and basic block BB parameters. */
103 static struct seginfo *
104 new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live)
106 struct seginfo *ptr;
107 ptr = xmalloc (sizeof (struct seginfo));
108 ptr->mode = mode;
109 ptr->insn_ptr = insn;
110 ptr->bbnum = bb;
111 ptr->next = NULL;
112 COPY_HARD_REG_SET (ptr->regs_live, regs_live);
113 return ptr;
116 /* Add a seginfo element to the end of a list.
117 HEAD is a pointer to the list beginning.
118 INFO is the structure to be linked in. */
120 static void
121 add_seginfo (struct bb_info *head, struct seginfo *info)
123 struct seginfo *ptr;
125 if (head->seginfo == NULL)
126 head->seginfo = info;
127 else
129 ptr = head->seginfo;
130 while (ptr->next != NULL)
131 ptr = ptr->next;
132 ptr->next = info;
136 /* Make all predecessors of basic block B opaque, recursively, till we hit
137 some that are already non-transparent, or an edge where aux is set; that
138 denotes that a mode set is to be done on that edge.
139 J is the bit number in the bitmaps that corresponds to the entity that
140 we are currently handling mode-switching for. */
142 static void
143 make_preds_opaque (basic_block b, int j)
145 edge e;
146 edge_iterator ei;
148 FOR_EACH_EDGE (e, ei, b->preds)
150 basic_block pb = e->src;
152 if (e->aux || ! TEST_BIT (transp[pb->index], j))
153 continue;
155 RESET_BIT (transp[pb->index], j);
156 make_preds_opaque (pb, j);
160 /* Record in LIVE that register REG died. */
162 static void
163 reg_dies (rtx reg, HARD_REG_SET live)
165 int regno, nregs;
167 if (!REG_P (reg))
168 return;
170 regno = REGNO (reg);
171 if (regno < FIRST_PSEUDO_REGISTER)
172 for (nregs = hard_regno_nregs[regno][GET_MODE (reg)] - 1; nregs >= 0;
173 nregs--)
174 CLEAR_HARD_REG_BIT (live, regno + nregs);
177 /* Record in LIVE that register REG became live.
178 This is called via note_stores. */
180 static void
181 reg_becomes_live (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *live)
183 int regno, nregs;
185 if (GET_CODE (reg) == SUBREG)
186 reg = SUBREG_REG (reg);
188 if (!REG_P (reg))
189 return;
191 regno = REGNO (reg);
192 if (regno < FIRST_PSEUDO_REGISTER)
193 for (nregs = hard_regno_nregs[regno][GET_MODE (reg)] - 1; nregs >= 0;
194 nregs--)
195 SET_HARD_REG_BIT (* (HARD_REG_SET *) live, regno + nregs);
198 /* Make sure if MODE_ENTRY is defined the MODE_EXIT is defined
199 and vice versa. */
200 #if defined (MODE_ENTRY) != defined (MODE_EXIT)
201 #error "Both MODE_ENTRY and MODE_EXIT must be defined"
202 #endif
204 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
205 /* Split the fallthrough edge to the exit block, so that we can note
206 that there NORMAL_MODE is required. Return the new block if it's
207 inserted before the exit block. Otherwise return null. */
209 static basic_block
210 create_pre_exit (int n_entities, int *entity_map, const int *num_modes)
212 edge eg;
213 edge_iterator ei;
214 basic_block pre_exit;
216 /* The only non-call predecessor at this stage is a block with a
217 fallthrough edge; there can be at most one, but there could be
218 none at all, e.g. when exit is called. */
219 pre_exit = 0;
220 FOR_EACH_EDGE (eg, ei, EXIT_BLOCK_PTR->preds)
221 if (eg->flags & EDGE_FALLTHRU)
223 basic_block src_bb = eg->src;
224 regset live_at_end = src_bb->il.rtl->global_live_at_end;
225 rtx last_insn, ret_reg;
227 gcc_assert (!pre_exit);
228 /* If this function returns a value at the end, we have to
229 insert the final mode switch before the return value copy
230 to its hard register. */
231 if (EDGE_COUNT (EXIT_BLOCK_PTR->preds) == 1
232 && NONJUMP_INSN_P ((last_insn = BB_END (src_bb)))
233 && GET_CODE (PATTERN (last_insn)) == USE
234 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
236 int ret_start = REGNO (ret_reg);
237 int nregs = hard_regno_nregs[ret_start][GET_MODE (ret_reg)];
238 int ret_end = ret_start + nregs;
239 int short_block = 0;
240 int maybe_builtin_apply = 0;
241 int forced_late_switch = 0;
242 rtx before_return_copy;
246 rtx return_copy = PREV_INSN (last_insn);
247 rtx return_copy_pat, copy_reg;
248 int copy_start, copy_num;
249 int j;
251 if (INSN_P (return_copy))
253 if (GET_CODE (PATTERN (return_copy)) == USE
254 && GET_CODE (XEXP (PATTERN (return_copy), 0)) == REG
255 && (FUNCTION_VALUE_REGNO_P
256 (REGNO (XEXP (PATTERN (return_copy), 0)))))
258 maybe_builtin_apply = 1;
259 last_insn = return_copy;
260 continue;
262 /* If the return register is not (in its entirety)
263 likely spilled, the return copy might be
264 partially or completely optimized away. */
265 return_copy_pat = single_set (return_copy);
266 if (!return_copy_pat)
268 return_copy_pat = PATTERN (return_copy);
269 if (GET_CODE (return_copy_pat) != CLOBBER)
270 break;
272 copy_reg = SET_DEST (return_copy_pat);
273 if (GET_CODE (copy_reg) == REG)
274 copy_start = REGNO (copy_reg);
275 else if (GET_CODE (copy_reg) == SUBREG
276 && GET_CODE (SUBREG_REG (copy_reg)) == REG)
277 copy_start = REGNO (SUBREG_REG (copy_reg));
278 else
279 break;
280 if (copy_start >= FIRST_PSEUDO_REGISTER)
281 break;
282 copy_num
283 = hard_regno_nregs[copy_start][GET_MODE (copy_reg)];
285 /* If the return register is not likely spilled, - as is
286 the case for floating point on SH4 - then it might
287 be set by an arithmetic operation that needs a
288 different mode than the exit block. */
289 for (j = n_entities - 1; j >= 0; j--)
291 int e = entity_map[j];
292 int mode = MODE_NEEDED (e, return_copy);
294 if (mode != num_modes[e] && mode != MODE_EXIT (e))
295 break;
297 if (j >= 0)
299 /* For the SH4, floating point loads depend on fpscr,
300 thus we might need to put the final mode switch
301 after the return value copy. That is still OK,
302 because a floating point return value does not
303 conflict with address reloads. */
304 if (copy_start >= ret_start
305 && copy_start + copy_num <= ret_end
306 && OBJECT_P (SET_SRC (return_copy_pat)))
307 forced_late_switch = 1;
308 break;
311 if (copy_start >= ret_start
312 && copy_start + copy_num <= ret_end)
313 nregs -= copy_num;
314 else if (!maybe_builtin_apply
315 || !FUNCTION_VALUE_REGNO_P (copy_start))
316 break;
317 last_insn = return_copy;
319 /* ??? Exception handling can lead to the return value
320 copy being already separated from the return value use,
321 as in unwind-dw2.c .
322 Similarly, conditionally returning without a value,
323 and conditionally using builtin_return can lead to an
324 isolated use. */
325 if (return_copy == BB_HEAD (src_bb))
327 short_block = 1;
328 break;
330 last_insn = return_copy;
332 while (nregs);
334 /* If we didn't see a full return value copy, verify that there
335 is a plausible reason for this. If some, but not all of the
336 return register is likely spilled, we can expect that there
337 is a copy for the likely spilled part. */
338 gcc_assert (!nregs
339 || forced_late_switch
340 || short_block
341 || !(CLASS_LIKELY_SPILLED_P
342 (REGNO_REG_CLASS (ret_start)))
343 || (nregs
344 != hard_regno_nregs[ret_start][GET_MODE (ret_reg)])
345 /* For multi-hard-register floating point
346 values, sometimes the likely-spilled part
347 is ordinarily copied first, then the other
348 part is set with an arithmetic operation.
349 This doesn't actually cause reload
350 failures, so let it pass. */
351 || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
352 && nregs != 1));
354 if (INSN_P (last_insn))
356 before_return_copy
357 = emit_note_before (NOTE_INSN_DELETED, last_insn);
358 /* Instructions preceding LAST_INSN in the same block might
359 require a different mode than MODE_EXIT, so if we might
360 have such instructions, keep them in a separate block
361 from pre_exit. */
362 if (last_insn != BB_HEAD (src_bb))
363 src_bb = split_block (src_bb,
364 PREV_INSN (before_return_copy))->dest;
366 else
367 before_return_copy = last_insn;
368 pre_exit = split_block (src_bb, before_return_copy)->src;
370 else
372 pre_exit = split_edge (eg);
373 COPY_REG_SET (pre_exit->il.rtl->global_live_at_start, live_at_end);
374 COPY_REG_SET (pre_exit->il.rtl->global_live_at_end, live_at_end);
378 return pre_exit;
380 #endif
382 /* Find all insns that need a particular mode setting, and insert the
383 necessary mode switches. Return true if we did work. */
386 optimize_mode_switching (FILE *file)
388 rtx insn;
389 int e;
390 basic_block bb;
391 int need_commit = 0;
392 sbitmap *kill;
393 struct edge_list *edge_list;
394 static const int num_modes[] = NUM_MODES_FOR_MODE_SWITCHING;
395 #define N_ENTITIES ARRAY_SIZE (num_modes)
396 int entity_map[N_ENTITIES];
397 struct bb_info *bb_info[N_ENTITIES];
398 int i, j;
399 int n_entities;
400 int max_num_modes = 0;
401 bool emited = false;
402 basic_block post_entry ATTRIBUTE_UNUSED, pre_exit ATTRIBUTE_UNUSED;
404 clear_bb_flags ();
406 for (e = N_ENTITIES - 1, n_entities = 0; e >= 0; e--)
407 if (OPTIMIZE_MODE_SWITCHING (e))
409 int entry_exit_extra = 0;
411 /* Create the list of segments within each basic block.
412 If NORMAL_MODE is defined, allow for two extra
413 blocks split from the entry and exit block. */
414 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
415 entry_exit_extra = 3;
416 #endif
417 bb_info[n_entities]
418 = xcalloc (last_basic_block + entry_exit_extra, sizeof **bb_info);
419 entity_map[n_entities++] = e;
420 if (num_modes[e] > max_num_modes)
421 max_num_modes = num_modes[e];
424 if (! n_entities)
425 return 0;
427 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
428 /* Split the edge from the entry block, so that we can note that
429 there NORMAL_MODE is supplied. */
430 post_entry = split_edge (single_succ_edge (ENTRY_BLOCK_PTR));
431 pre_exit = create_pre_exit (n_entities, entity_map, num_modes);
432 #endif
434 /* Create the bitmap vectors. */
436 antic = sbitmap_vector_alloc (last_basic_block, n_entities);
437 transp = sbitmap_vector_alloc (last_basic_block, n_entities);
438 comp = sbitmap_vector_alloc (last_basic_block, n_entities);
440 sbitmap_vector_ones (transp, last_basic_block);
442 for (j = n_entities - 1; j >= 0; j--)
444 int e = entity_map[j];
445 int no_mode = num_modes[e];
446 struct bb_info *info = bb_info[j];
448 /* Determine what the first use (if any) need for a mode of entity E is.
449 This will be the mode that is anticipatable for this block.
450 Also compute the initial transparency settings. */
451 FOR_EACH_BB (bb)
453 struct seginfo *ptr;
454 int last_mode = no_mode;
455 HARD_REG_SET live_now;
457 REG_SET_TO_HARD_REG_SET (live_now,
458 bb->il.rtl->global_live_at_start);
459 for (insn = BB_HEAD (bb);
460 insn != NULL && insn != NEXT_INSN (BB_END (bb));
461 insn = NEXT_INSN (insn))
463 if (INSN_P (insn))
465 int mode = MODE_NEEDED (e, insn);
466 rtx link;
468 if (mode != no_mode && mode != last_mode)
470 last_mode = mode;
471 ptr = new_seginfo (mode, insn, bb->index, live_now);
472 add_seginfo (info + bb->index, ptr);
473 RESET_BIT (transp[bb->index], j);
475 #ifdef MODE_AFTER
476 last_mode = MODE_AFTER (last_mode, insn);
477 #endif
478 /* Update LIVE_NOW. */
479 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
480 if (REG_NOTE_KIND (link) == REG_DEAD)
481 reg_dies (XEXP (link, 0), live_now);
483 note_stores (PATTERN (insn), reg_becomes_live, &live_now);
484 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
485 if (REG_NOTE_KIND (link) == REG_UNUSED)
486 reg_dies (XEXP (link, 0), live_now);
490 info[bb->index].computing = last_mode;
491 /* Check for blocks without ANY mode requirements. */
492 if (last_mode == no_mode)
494 ptr = new_seginfo (no_mode, BB_END (bb), bb->index, live_now);
495 add_seginfo (info + bb->index, ptr);
498 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
500 int mode = MODE_ENTRY (e);
502 if (mode != no_mode)
504 bb = post_entry;
506 /* By always making this nontransparent, we save
507 an extra check in make_preds_opaque. We also
508 need this to avoid confusing pre_edge_lcm when
509 antic is cleared but transp and comp are set. */
510 RESET_BIT (transp[bb->index], j);
512 /* Insert a fake computing definition of MODE into entry
513 blocks which compute no mode. This represents the mode on
514 entry. */
515 info[bb->index].computing = mode;
517 if (pre_exit)
518 info[pre_exit->index].seginfo->mode = MODE_EXIT (e);
521 #endif /* NORMAL_MODE */
524 kill = sbitmap_vector_alloc (last_basic_block, n_entities);
525 for (i = 0; i < max_num_modes; i++)
527 int current_mode[N_ENTITIES];
528 sbitmap *delete;
529 sbitmap *insert;
531 /* Set the anticipatable and computing arrays. */
532 sbitmap_vector_zero (antic, last_basic_block);
533 sbitmap_vector_zero (comp, last_basic_block);
534 for (j = n_entities - 1; j >= 0; j--)
536 int m = current_mode[j] = MODE_PRIORITY_TO_MODE (entity_map[j], i);
537 struct bb_info *info = bb_info[j];
539 FOR_EACH_BB (bb)
541 if (info[bb->index].seginfo->mode == m)
542 SET_BIT (antic[bb->index], j);
544 if (info[bb->index].computing == m)
545 SET_BIT (comp[bb->index], j);
549 /* Calculate the optimal locations for the
550 placement mode switches to modes with priority I. */
552 FOR_EACH_BB (bb)
553 sbitmap_not (kill[bb->index], transp[bb->index]);
554 edge_list = pre_edge_lcm (file, n_entities, transp, comp, antic,
555 kill, &insert, &delete);
557 for (j = n_entities - 1; j >= 0; j--)
559 /* Insert all mode sets that have been inserted by lcm. */
560 int no_mode = num_modes[entity_map[j]];
562 /* Wherever we have moved a mode setting upwards in the flow graph,
563 the blocks between the new setting site and the now redundant
564 computation ceases to be transparent for any lower-priority
565 mode of the same entity. First set the aux field of each
566 insertion site edge non-transparent, then propagate the new
567 non-transparency from the redundant computation upwards till
568 we hit an insertion site or an already non-transparent block. */
569 for (e = NUM_EDGES (edge_list) - 1; e >= 0; e--)
571 edge eg = INDEX_EDGE (edge_list, e);
572 int mode;
573 basic_block src_bb;
574 HARD_REG_SET live_at_edge;
575 rtx mode_set;
577 eg->aux = 0;
579 if (! TEST_BIT (insert[e], j))
580 continue;
582 eg->aux = (void *)1;
584 mode = current_mode[j];
585 src_bb = eg->src;
587 REG_SET_TO_HARD_REG_SET (live_at_edge,
588 src_bb->il.rtl->global_live_at_end);
590 start_sequence ();
591 EMIT_MODE_SET (entity_map[j], mode, live_at_edge);
592 mode_set = get_insns ();
593 end_sequence ();
595 /* Do not bother to insert empty sequence. */
596 if (mode_set == NULL_RTX)
597 continue;
599 /* If this is an abnormal edge, we'll insert at the end
600 of the previous block. */
601 if (eg->flags & EDGE_ABNORMAL)
603 emited = true;
604 if (JUMP_P (BB_END (src_bb)))
605 emit_insn_before (mode_set, BB_END (src_bb));
606 else
608 /* It doesn't make sense to switch to normal
609 mode after a CALL_INSN. The cases in which a
610 CALL_INSN may have an abnormal edge are
611 sibcalls and EH edges. In the case of
612 sibcalls, the dest basic-block is the
613 EXIT_BLOCK, that runs in normal mode; it is
614 assumed that a sibcall insn requires normal
615 mode itself, so no mode switch would be
616 required after the call (it wouldn't make
617 sense, anyway). In the case of EH edges, EH
618 entry points also start in normal mode, so a
619 similar reasoning applies. */
620 gcc_assert (NONJUMP_INSN_P (BB_END (src_bb)));
621 emit_insn_after (mode_set, BB_END (src_bb));
623 bb_info[j][src_bb->index].computing = mode;
624 RESET_BIT (transp[src_bb->index], j);
626 else
628 need_commit = 1;
629 insert_insn_on_edge (mode_set, eg);
633 FOR_EACH_BB_REVERSE (bb)
634 if (TEST_BIT (delete[bb->index], j))
636 make_preds_opaque (bb, j);
637 /* Cancel the 'deleted' mode set. */
638 bb_info[j][bb->index].seginfo->mode = no_mode;
642 sbitmap_vector_free (delete);
643 sbitmap_vector_free (insert);
644 clear_aux_for_edges ();
645 free_edge_list (edge_list);
648 /* Now output the remaining mode sets in all the segments. */
649 for (j = n_entities - 1; j >= 0; j--)
651 int no_mode = num_modes[entity_map[j]];
653 FOR_EACH_BB_REVERSE (bb)
655 struct seginfo *ptr, *next;
656 for (ptr = bb_info[j][bb->index].seginfo; ptr; ptr = next)
658 next = ptr->next;
659 if (ptr->mode != no_mode)
661 rtx mode_set;
663 start_sequence ();
664 EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live);
665 mode_set = get_insns ();
666 end_sequence ();
668 /* Insert MODE_SET only if it is nonempty. */
669 if (mode_set != NULL_RTX)
671 emited = true;
672 if (NOTE_P (ptr->insn_ptr)
673 && (NOTE_LINE_NUMBER (ptr->insn_ptr)
674 == NOTE_INSN_BASIC_BLOCK))
675 emit_insn_after (mode_set, ptr->insn_ptr);
676 else
677 emit_insn_before (mode_set, ptr->insn_ptr);
681 free (ptr);
685 free (bb_info[j]);
688 /* Finished. Free up all the things we've allocated. */
690 sbitmap_vector_free (kill);
691 sbitmap_vector_free (antic);
692 sbitmap_vector_free (transp);
693 sbitmap_vector_free (comp);
695 if (need_commit)
696 commit_edge_insertions ();
698 #if defined (MODE_ENTRY) && defined (MODE_EXIT)
699 cleanup_cfg (CLEANUP_NO_INSN_DEL);
700 #else
701 if (!need_commit && !emited)
702 return 0;
703 #endif
705 max_regno = max_reg_num ();
706 allocate_reg_info (max_regno, FALSE, FALSE);
707 update_life_info_in_dirty_blocks (UPDATE_LIFE_GLOBAL_RM_NOTES,
708 (PROP_DEATH_NOTES | PROP_KILL_DEAD_CODE
709 | PROP_SCAN_DEAD_CODE));
711 return 1;
714 #endif /* OPTIMIZE_MODE_SWITCHING */
716 static bool
717 gate_mode_switching (void)
719 #ifdef OPTIMIZE_MODE_SWITCHING
720 return true;
721 #else
722 return false;
723 #endif
726 static void
727 rest_of_handle_mode_switching (void)
729 #ifdef OPTIMIZE_MODE_SWITCHING
730 no_new_pseudos = 0;
731 optimize_mode_switching (NULL);
732 no_new_pseudos = 1;
733 #endif /* OPTIMIZE_MODE_SWITCHING */
737 struct tree_opt_pass pass_mode_switching =
739 "mode-sw", /* name */
740 gate_mode_switching, /* gate */
741 rest_of_handle_mode_switching, /* execute */
742 NULL, /* sub */
743 NULL, /* next */
744 0, /* static_pass_number */
745 TV_MODE_SWITCH, /* tv_id */
746 0, /* properties_required */
747 0, /* properties_provided */
748 0, /* properties_destroyed */
749 0, /* todo_flags_start */
750 TODO_dump_func, /* todo_flags_finish */
751 0 /* letter */