1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #define IN_TARGET_CODE 1
24 #include "coretypes.h"
26 #include "c-family/c-common.h"
29 #include "c-family/c-pragma.h"
31 static bool ix86_pragma_target_parse (tree
, tree
);
32 static void ix86_target_macros_internal
33 (HOST_WIDE_INT
, HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
34 void (*def_or_undef
) (cpp_reader
*, const char *));
36 /* Internal function to either define or undef the appropriate system
39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
40 HOST_WIDE_INT isa_flag2
,
41 enum processor_type arch
,
42 enum processor_type tune
,
43 enum fpmath_unit fpmath
,
44 void (*def_or_undef
) (cpp_reader
*,
47 /* For some of the k6/pentium varients there weren't separate ISA bits to
48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len
= strlen (ix86_arch_string
);
50 size_t tune_len
= strlen (ix86_tune_string
);
51 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
52 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
54 /* Built-ins based on -march=. */
60 def_or_undef (parse_in
, "__i486");
61 def_or_undef (parse_in
, "__i486__");
63 case PROCESSOR_LAKEMONT
:
64 /* Intel MCU is based on Intel Pentium CPU. */
65 case PROCESSOR_PENTIUM
:
66 def_or_undef (parse_in
, "__i586");
67 def_or_undef (parse_in
, "__i586__");
68 def_or_undef (parse_in
, "__pentium");
69 def_or_undef (parse_in
, "__pentium__");
70 if (isa_flag
& OPTION_MASK_ISA_MMX
)
71 def_or_undef (parse_in
, "__pentium_mmx__");
73 case PROCESSOR_PENTIUMPRO
:
74 def_or_undef (parse_in
, "__i686");
75 def_or_undef (parse_in
, "__i686__");
76 def_or_undef (parse_in
, "__pentiumpro");
77 def_or_undef (parse_in
, "__pentiumpro__");
80 def_or_undef (parse_in
, "__geode");
81 def_or_undef (parse_in
, "__geode__");
84 def_or_undef (parse_in
, "__k6");
85 def_or_undef (parse_in
, "__k6__");
86 if (last_arch_char
== '2')
87 def_or_undef (parse_in
, "__k6_2__");
88 else if (last_arch_char
== '3')
89 def_or_undef (parse_in
, "__k6_3__");
90 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
91 def_or_undef (parse_in
, "__k6_3__");
93 case PROCESSOR_ATHLON
:
94 def_or_undef (parse_in
, "__athlon");
95 def_or_undef (parse_in
, "__athlon__");
96 if (isa_flag
& OPTION_MASK_ISA_SSE
)
97 def_or_undef (parse_in
, "__athlon_sse__");
100 def_or_undef (parse_in
, "__k8");
101 def_or_undef (parse_in
, "__k8__");
103 case PROCESSOR_AMDFAM10
:
104 def_or_undef (parse_in
, "__amdfam10");
105 def_or_undef (parse_in
, "__amdfam10__");
107 case PROCESSOR_BDVER1
:
108 def_or_undef (parse_in
, "__bdver1");
109 def_or_undef (parse_in
, "__bdver1__");
111 case PROCESSOR_BDVER2
:
112 def_or_undef (parse_in
, "__bdver2");
113 def_or_undef (parse_in
, "__bdver2__");
115 case PROCESSOR_BDVER3
:
116 def_or_undef (parse_in
, "__bdver3");
117 def_or_undef (parse_in
, "__bdver3__");
119 case PROCESSOR_BDVER4
:
120 def_or_undef (parse_in
, "__bdver4");
121 def_or_undef (parse_in
, "__bdver4__");
123 case PROCESSOR_ZNVER1
:
124 def_or_undef (parse_in
, "__znver1");
125 def_or_undef (parse_in
, "__znver1__");
127 case PROCESSOR_BTVER1
:
128 def_or_undef (parse_in
, "__btver1");
129 def_or_undef (parse_in
, "__btver1__");
131 case PROCESSOR_BTVER2
:
132 def_or_undef (parse_in
, "__btver2");
133 def_or_undef (parse_in
, "__btver2__");
135 case PROCESSOR_PENTIUM4
:
136 def_or_undef (parse_in
, "__pentium4");
137 def_or_undef (parse_in
, "__pentium4__");
139 case PROCESSOR_NOCONA
:
140 def_or_undef (parse_in
, "__nocona");
141 def_or_undef (parse_in
, "__nocona__");
143 case PROCESSOR_CORE2
:
144 def_or_undef (parse_in
, "__core2");
145 def_or_undef (parse_in
, "__core2__");
147 case PROCESSOR_NEHALEM
:
148 def_or_undef (parse_in
, "__corei7");
149 def_or_undef (parse_in
, "__corei7__");
150 def_or_undef (parse_in
, "__nehalem");
151 def_or_undef (parse_in
, "__nehalem__");
153 case PROCESSOR_SANDYBRIDGE
:
154 def_or_undef (parse_in
, "__corei7_avx");
155 def_or_undef (parse_in
, "__corei7_avx__");
156 def_or_undef (parse_in
, "__sandybridge");
157 def_or_undef (parse_in
, "__sandybridge__");
159 case PROCESSOR_HASWELL
:
160 def_or_undef (parse_in
, "__core_avx2");
161 def_or_undef (parse_in
, "__core_avx2__");
162 def_or_undef (parse_in
, "__haswell");
163 def_or_undef (parse_in
, "__haswell__");
165 case PROCESSOR_BONNELL
:
166 def_or_undef (parse_in
, "__atom");
167 def_or_undef (parse_in
, "__atom__");
168 def_or_undef (parse_in
, "__bonnell");
169 def_or_undef (parse_in
, "__bonnell__");
171 case PROCESSOR_SILVERMONT
:
172 def_or_undef (parse_in
, "__slm");
173 def_or_undef (parse_in
, "__slm__");
174 def_or_undef (parse_in
, "__silvermont");
175 def_or_undef (parse_in
, "__silvermont__");
178 def_or_undef (parse_in
, "__knl");
179 def_or_undef (parse_in
, "__knl__");
182 def_or_undef (parse_in
, "__knm");
183 def_or_undef (parse_in
, "__knm__");
185 case PROCESSOR_SKYLAKE
:
186 def_or_undef (parse_in
, "__skylake");
187 def_or_undef (parse_in
, "__skylake__");
189 case PROCESSOR_SKYLAKE_AVX512
:
190 def_or_undef (parse_in
, "__skylake_avx512");
191 def_or_undef (parse_in
, "__skylake_avx512__");
193 case PROCESSOR_CANNONLAKE
:
194 def_or_undef (parse_in
, "__cannonlake");
195 def_or_undef (parse_in
, "__cannonlake__");
197 case PROCESSOR_ICELAKE_CLIENT
:
198 def_or_undef (parse_in
, "__icelake_client");
199 def_or_undef (parse_in
, "__icelake_client__");
201 case PROCESSOR_ICELAKE_SERVER
:
202 def_or_undef (parse_in
, "__icelake_server");
203 def_or_undef (parse_in
, "__icelake_server__");
205 /* use PROCESSOR_max to not set/unset the arch macro. */
208 case PROCESSOR_INTEL
:
209 case PROCESSOR_GENERIC
:
213 /* Built-ins based on -mtune=. */
217 def_or_undef (parse_in
, "__tune_i386__");
220 def_or_undef (parse_in
, "__tune_i486__");
222 case PROCESSOR_PENTIUM
:
223 def_or_undef (parse_in
, "__tune_i586__");
224 def_or_undef (parse_in
, "__tune_pentium__");
225 if (last_tune_char
== 'x')
226 def_or_undef (parse_in
, "__tune_pentium_mmx__");
228 case PROCESSOR_PENTIUMPRO
:
229 def_or_undef (parse_in
, "__tune_i686__");
230 def_or_undef (parse_in
, "__tune_pentiumpro__");
231 switch (last_tune_char
)
234 def_or_undef (parse_in
, "__tune_pentium3__");
237 def_or_undef (parse_in
, "__tune_pentium2__");
241 case PROCESSOR_GEODE
:
242 def_or_undef (parse_in
, "__tune_geode__");
245 def_or_undef (parse_in
, "__tune_k6__");
246 if (last_tune_char
== '2')
247 def_or_undef (parse_in
, "__tune_k6_2__");
248 else if (last_tune_char
== '3')
249 def_or_undef (parse_in
, "__tune_k6_3__");
250 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
251 def_or_undef (parse_in
, "__tune_k6_3__");
253 case PROCESSOR_ATHLON
:
254 def_or_undef (parse_in
, "__tune_athlon__");
255 if (isa_flag
& OPTION_MASK_ISA_SSE
)
256 def_or_undef (parse_in
, "__tune_athlon_sse__");
259 def_or_undef (parse_in
, "__tune_k8__");
261 case PROCESSOR_AMDFAM10
:
262 def_or_undef (parse_in
, "__tune_amdfam10__");
264 case PROCESSOR_BDVER1
:
265 def_or_undef (parse_in
, "__tune_bdver1__");
267 case PROCESSOR_BDVER2
:
268 def_or_undef (parse_in
, "__tune_bdver2__");
270 case PROCESSOR_BDVER3
:
271 def_or_undef (parse_in
, "__tune_bdver3__");
273 case PROCESSOR_BDVER4
:
274 def_or_undef (parse_in
, "__tune_bdver4__");
276 case PROCESSOR_ZNVER1
:
277 def_or_undef (parse_in
, "__tune_znver1__");
279 case PROCESSOR_BTVER1
:
280 def_or_undef (parse_in
, "__tune_btver1__");
282 case PROCESSOR_BTVER2
:
283 def_or_undef (parse_in
, "__tune_btver2__");
285 case PROCESSOR_PENTIUM4
:
286 def_or_undef (parse_in
, "__tune_pentium4__");
288 case PROCESSOR_NOCONA
:
289 def_or_undef (parse_in
, "__tune_nocona__");
291 case PROCESSOR_CORE2
:
292 def_or_undef (parse_in
, "__tune_core2__");
294 case PROCESSOR_NEHALEM
:
295 def_or_undef (parse_in
, "__tune_corei7__");
296 def_or_undef (parse_in
, "__tune_nehalem__");
298 case PROCESSOR_SANDYBRIDGE
:
299 def_or_undef (parse_in
, "__tune_corei7_avx__");
300 def_or_undef (parse_in
, "__tune_sandybridge__");
302 case PROCESSOR_HASWELL
:
303 def_or_undef (parse_in
, "__tune_core_avx2__");
304 def_or_undef (parse_in
, "__tune_haswell__");
306 case PROCESSOR_BONNELL
:
307 def_or_undef (parse_in
, "__tune_atom__");
308 def_or_undef (parse_in
, "__tune_bonnell__");
310 case PROCESSOR_SILVERMONT
:
311 def_or_undef (parse_in
, "__tune_slm__");
312 def_or_undef (parse_in
, "__tune_silvermont__");
315 def_or_undef (parse_in
, "__tune_knl__");
318 def_or_undef (parse_in
, "__tune_knm__");
320 case PROCESSOR_SKYLAKE
:
321 def_or_undef (parse_in
, "__tune_skylake__");
323 case PROCESSOR_SKYLAKE_AVX512
:
324 def_or_undef (parse_in
, "__tune_skylake_avx512__");
326 case PROCESSOR_CANNONLAKE
:
327 def_or_undef (parse_in
, "__tune_cannonlake__");
329 case PROCESSOR_ICELAKE_CLIENT
:
330 def_or_undef (parse_in
, "__tune_icelake_client__");
332 case PROCESSOR_ICELAKE_SERVER
:
333 def_or_undef (parse_in
, "__tune_icelake_server__");
335 case PROCESSOR_LAKEMONT
:
336 def_or_undef (parse_in
, "__tune_lakemont__");
338 case PROCESSOR_INTEL
:
339 case PROCESSOR_GENERIC
:
341 /* use PROCESSOR_max to not set/unset the tune macro. */
350 def_or_undef (parse_in
, "__code_model_small__");
354 def_or_undef (parse_in
, "__code_model_medium__");
358 def_or_undef (parse_in
, "__code_model_large__");
361 def_or_undef (parse_in
, "__code_model_32__");
364 def_or_undef (parse_in
, "__code_model_kernel__");
370 if (isa_flag2
& OPTION_MASK_ISA_WBNOINVD
)
371 def_or_undef (parse_in
, "__WBNOINVD__");
372 if (isa_flag
& OPTION_MASK_ISA_MMX
)
373 def_or_undef (parse_in
, "__MMX__");
374 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
375 def_or_undef (parse_in
, "__3dNOW__");
376 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
377 def_or_undef (parse_in
, "__3dNOW_A__");
378 if (isa_flag
& OPTION_MASK_ISA_SSE
)
379 def_or_undef (parse_in
, "__SSE__");
380 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
381 def_or_undef (parse_in
, "__SSE2__");
382 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
383 def_or_undef (parse_in
, "__SSE3__");
384 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
385 def_or_undef (parse_in
, "__SSSE3__");
386 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
387 def_or_undef (parse_in
, "__SSE4_1__");
388 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
389 def_or_undef (parse_in
, "__SSE4_2__");
390 if (isa_flag
& OPTION_MASK_ISA_AES
)
391 def_or_undef (parse_in
, "__AES__");
392 if (isa_flag
& OPTION_MASK_ISA_SHA
)
393 def_or_undef (parse_in
, "__SHA__");
394 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
395 def_or_undef (parse_in
, "__PCLMUL__");
396 if (isa_flag
& OPTION_MASK_ISA_AVX
)
397 def_or_undef (parse_in
, "__AVX__");
398 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
399 def_or_undef (parse_in
, "__AVX2__");
400 if (isa_flag
& OPTION_MASK_ISA_AVX512F
)
401 def_or_undef (parse_in
, "__AVX512F__");
402 if (isa_flag
& OPTION_MASK_ISA_AVX512ER
)
403 def_or_undef (parse_in
, "__AVX512ER__");
404 if (isa_flag
& OPTION_MASK_ISA_AVX512CD
)
405 def_or_undef (parse_in
, "__AVX512CD__");
406 if (isa_flag
& OPTION_MASK_ISA_AVX512PF
)
407 def_or_undef (parse_in
, "__AVX512PF__");
408 if (isa_flag
& OPTION_MASK_ISA_AVX512DQ
)
409 def_or_undef (parse_in
, "__AVX512DQ__");
410 if (isa_flag
& OPTION_MASK_ISA_AVX512BW
)
411 def_or_undef (parse_in
, "__AVX512BW__");
412 if (isa_flag
& OPTION_MASK_ISA_AVX512VL
)
413 def_or_undef (parse_in
, "__AVX512VL__");
414 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI
)
415 def_or_undef (parse_in
, "__AVX512VBMI__");
416 if (isa_flag
& OPTION_MASK_ISA_AVX512IFMA
)
417 def_or_undef (parse_in
, "__AVX512IFMA__");
418 if (isa_flag2
& OPTION_MASK_ISA_AVX5124VNNIW
)
419 def_or_undef (parse_in
, "__AVX5124VNNIW__");
420 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI2
)
421 def_or_undef (parse_in
, "__AVX512VBMI2__");
422 if (isa_flag
& OPTION_MASK_ISA_AVX512VNNI
)
423 def_or_undef (parse_in
, "__AVX512VNNI__");
424 if (isa_flag2
& OPTION_MASK_ISA_PCONFIG
)
425 def_or_undef (parse_in
, "__PCONFIG__");
426 if (isa_flag2
& OPTION_MASK_ISA_SGX
)
427 def_or_undef (parse_in
, "__SGX__");
428 if (isa_flag2
& OPTION_MASK_ISA_AVX5124FMAPS
)
429 def_or_undef (parse_in
, "__AVX5124FMAPS__");
430 if (isa_flag
& OPTION_MASK_ISA_AVX512BITALG
)
431 def_or_undef (parse_in
, "__AVX512BITALG__");
432 if (isa_flag
& OPTION_MASK_ISA_AVX512VPOPCNTDQ
)
433 def_or_undef (parse_in
, "__AVX512VPOPCNTDQ__");
434 if (isa_flag
& OPTION_MASK_ISA_FMA
)
435 def_or_undef (parse_in
, "__FMA__");
436 if (isa_flag
& OPTION_MASK_ISA_RTM
)
437 def_or_undef (parse_in
, "__RTM__");
438 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
439 def_or_undef (parse_in
, "__SSE4A__");
440 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
441 def_or_undef (parse_in
, "__FMA4__");
442 if (isa_flag
& OPTION_MASK_ISA_XOP
)
443 def_or_undef (parse_in
, "__XOP__");
444 if (isa_flag
& OPTION_MASK_ISA_LWP
)
445 def_or_undef (parse_in
, "__LWP__");
446 if (isa_flag
& OPTION_MASK_ISA_ABM
)
447 def_or_undef (parse_in
, "__ABM__");
448 if (isa_flag
& OPTION_MASK_ISA_BMI
)
449 def_or_undef (parse_in
, "__BMI__");
450 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
451 def_or_undef (parse_in
, "__BMI2__");
452 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
453 def_or_undef (parse_in
, "__LZCNT__");
454 if (isa_flag
& OPTION_MASK_ISA_TBM
)
455 def_or_undef (parse_in
, "__TBM__");
456 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
457 def_or_undef (parse_in
, "__POPCNT__");
458 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
459 def_or_undef (parse_in
, "__FSGSBASE__");
460 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
461 def_or_undef (parse_in
, "__RDRND__");
462 if (isa_flag
& OPTION_MASK_ISA_F16C
)
463 def_or_undef (parse_in
, "__F16C__");
464 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
465 def_or_undef (parse_in
, "__RDSEED__");
466 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
467 def_or_undef (parse_in
, "__PRFCHW__");
468 if (isa_flag
& OPTION_MASK_ISA_ADX
)
469 def_or_undef (parse_in
, "__ADX__");
470 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
471 def_or_undef (parse_in
, "__FXSR__");
472 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
473 def_or_undef (parse_in
, "__XSAVE__");
474 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
475 def_or_undef (parse_in
, "__XSAVEOPT__");
476 if (isa_flag
& OPTION_MASK_ISA_PREFETCHWT1
)
477 def_or_undef (parse_in
, "__PREFETCHWT1__");
478 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
479 def_or_undef (parse_in
, "__SSE_MATH__");
480 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
481 def_or_undef (parse_in
, "__SSE2_MATH__");
482 if (isa_flag
& OPTION_MASK_ISA_CLFLUSHOPT
)
483 def_or_undef (parse_in
, "__CLFLUSHOPT__");
484 if (isa_flag2
& OPTION_MASK_ISA_CLZERO
)
485 def_or_undef (parse_in
, "__CLZERO__");
486 if (isa_flag
& OPTION_MASK_ISA_XSAVEC
)
487 def_or_undef (parse_in
, "__XSAVEC__");
488 if (isa_flag
& OPTION_MASK_ISA_XSAVES
)
489 def_or_undef (parse_in
, "__XSAVES__");
490 if (isa_flag2
& OPTION_MASK_ISA_MPX
)
491 def_or_undef (parse_in
, "__MPX__");
492 if (isa_flag
& OPTION_MASK_ISA_CLWB
)
493 def_or_undef (parse_in
, "__CLWB__");
494 if (isa_flag2
& OPTION_MASK_ISA_MWAITX
)
495 def_or_undef (parse_in
, "__MWAITX__");
496 if (isa_flag
& OPTION_MASK_ISA_PKU
)
497 def_or_undef (parse_in
, "__PKU__");
498 if (isa_flag2
& OPTION_MASK_ISA_RDPID
)
499 def_or_undef (parse_in
, "__RDPID__");
500 if (isa_flag
& OPTION_MASK_ISA_GFNI
)
501 def_or_undef (parse_in
, "__GFNI__");
502 if ((isa_flag2
& OPTION_MASK_ISA_IBT
)
503 || (flag_cf_protection
& CF_BRANCH
))
505 def_or_undef (parse_in
, "__IBT__");
506 if (flag_cf_protection
!= CF_NONE
)
507 def_or_undef (parse_in
, "__CET__");
509 if ((isa_flag
& OPTION_MASK_ISA_SHSTK
)
510 || (flag_cf_protection
& CF_RETURN
))
512 def_or_undef (parse_in
, "__SHSTK__");
513 if (flag_cf_protection
!= CF_NONE
)
514 def_or_undef (parse_in
, "__CET__");
516 if (isa_flag2
& OPTION_MASK_ISA_VAES
)
517 def_or_undef (parse_in
, "__VAES__");
518 if (isa_flag
& OPTION_MASK_ISA_VPCLMULQDQ
)
519 def_or_undef (parse_in
, "__VPCLMULQDQ__");
520 if (isa_flag
& OPTION_MASK_ISA_MOVDIRI
)
521 def_or_undef (parse_in
, "__MOVDIRI__");
522 if (isa_flag2
& OPTION_MASK_ISA_MOVDIR64B
)
523 def_or_undef (parse_in
, "__MOVDIR64B__");
526 def_or_undef (parse_in
, "__iamcu");
527 def_or_undef (parse_in
, "__iamcu__");
532 /* Hook to validate the current #pragma GCC target and set the state, and
533 update the macros based on what was changed. If ARGS is NULL, then
534 POP_TARGET is used to reset the options. */
537 ix86_pragma_target_parse (tree args
, tree pop_target
)
539 tree prev_tree
= build_target_option_node (&global_options
);
541 struct cl_target_option
*prev_opt
;
542 struct cl_target_option
*cur_opt
;
543 HOST_WIDE_INT prev_isa
;
544 HOST_WIDE_INT cur_isa
;
545 HOST_WIDE_INT diff_isa
;
546 HOST_WIDE_INT prev_isa2
;
547 HOST_WIDE_INT cur_isa2
;
548 HOST_WIDE_INT diff_isa2
;
549 enum processor_type prev_arch
;
550 enum processor_type prev_tune
;
551 enum processor_type cur_arch
;
552 enum processor_type cur_tune
;
556 cur_tree
= (pop_target
? pop_target
: target_option_default_node
);
557 cl_target_option_restore (&global_options
,
558 TREE_TARGET_OPTION (cur_tree
));
562 cur_tree
= ix86_valid_target_attribute_tree (args
, &global_options
,
563 &global_options_set
);
564 if (!cur_tree
|| cur_tree
== error_mark_node
)
566 cl_target_option_restore (&global_options
,
567 TREE_TARGET_OPTION (prev_tree
));
572 target_option_current_node
= cur_tree
;
573 ix86_reset_previous_fndecl ();
575 /* Figure out the previous/current isa, arch, tune and the differences. */
576 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
577 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
578 prev_isa
= prev_opt
->x_ix86_isa_flags
;
579 cur_isa
= cur_opt
->x_ix86_isa_flags
;
580 diff_isa
= (prev_isa
^ cur_isa
);
581 prev_isa2
= prev_opt
->x_ix86_isa_flags2
;
582 cur_isa2
= cur_opt
->x_ix86_isa_flags2
;
583 diff_isa2
= (prev_isa2
^ cur_isa2
);
584 prev_arch
= (enum processor_type
) prev_opt
->arch
;
585 prev_tune
= (enum processor_type
) prev_opt
->tune
;
586 cur_arch
= (enum processor_type
) cur_opt
->arch
;
587 cur_tune
= (enum processor_type
) cur_opt
->tune
;
589 /* If the same processor is used for both previous and current options, don't
590 change the macros. */
591 if (cur_arch
== prev_arch
)
592 cur_arch
= prev_arch
= PROCESSOR_max
;
594 if (cur_tune
== prev_tune
)
595 cur_tune
= prev_tune
= PROCESSOR_max
;
597 /* Undef all of the macros for that are no longer current. */
598 ix86_target_macros_internal (prev_isa
& diff_isa
,
599 prev_isa2
& diff_isa2
,
602 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
605 /* For the definitions, ensure all newly defined macros are considered
606 as used for -Wunused-macros. There is no point warning about the
607 compiler predefined macros. */
608 cpp_options
*cpp_opts
= cpp_get_options (parse_in
);
609 unsigned char saved_warn_unused_macros
= cpp_opts
->warn_unused_macros
;
610 cpp_opts
->warn_unused_macros
= 0;
612 /* Define all of the macros for new options that were just turned on. */
613 ix86_target_macros_internal (cur_isa
& diff_isa
,
614 cur_isa2
& diff_isa2
,
617 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
620 cpp_opts
->warn_unused_macros
= saved_warn_unused_macros
;
625 /* Function to tell the preprocessor about the defines for the current target. */
628 ix86_target_macros (void)
630 /* 32/64-bit won't change with target specific options, so do the assert and
631 builtin_define_std calls here. */
634 cpp_assert (parse_in
, "cpu=x86_64");
635 cpp_assert (parse_in
, "machine=x86_64");
636 cpp_define (parse_in
, "__amd64");
637 cpp_define (parse_in
, "__amd64__");
638 cpp_define (parse_in
, "__x86_64");
639 cpp_define (parse_in
, "__x86_64__");
642 cpp_define (parse_in
, "_ILP32");
643 cpp_define (parse_in
, "__ILP32__");
648 cpp_assert (parse_in
, "cpu=i386");
649 cpp_assert (parse_in
, "machine=i386");
650 builtin_define_std ("i386");
654 cpp_define (parse_in
, "_SOFT_FLOAT");
656 if (TARGET_LONG_DOUBLE_64
)
657 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
659 if (TARGET_LONG_DOUBLE_128
)
660 cpp_define (parse_in
, "__LONG_DOUBLE_128__");
662 if (TARGET_128BIT_LONG_DOUBLE
)
663 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=16");
665 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=12");
667 cpp_define (parse_in
, "__SIZEOF_FLOAT128__=16");
669 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
670 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
672 cpp_define (parse_in
, "__GCC_ASM_FLAG_OUTPUTS__");
674 ix86_target_macros_internal (ix86_isa_flags
,
681 cpp_define (parse_in
, "__SEG_FS");
682 cpp_define (parse_in
, "__SEG_GS");
686 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
687 option here rather than in i386.c since it will pull in various preprocessor
688 functions, and those are not present in languages like fortran without a
692 ix86_register_pragmas (void)
694 /* Update pragma hook to allow parsing #pragma GCC target. */
695 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
697 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS
);
698 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS
);
700 #ifdef REGISTER_SUBTARGET_PRAGMAS
701 REGISTER_SUBTARGET_PRAGMAS ();