2001-02-18 Kazu Hirata <kazu@hxi.com>
[official-gcc.git] / gcc / cse.c
blob17a597e104a09515f2196982b061777ebfd056fe
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
116 `const_rtx'.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
257 #ifdef HAVE_cc0
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
269 #endif
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
281 value.
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
288 struct reg_eqv_elem
290 int next, prev;
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
296 struct cse_reg_info
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
304 /* Search key */
305 unsigned int regno;
307 /* The quantity number of the register's current contents. */
308 int reg_qty;
310 /* The number of times the register has been altered in the current
311 basic block. */
312 int reg_tick;
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
317 invalid. */
318 int reg_in_table;
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
350 by a CALL_INSN. */
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
369 static int max_uid;
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
386 REG_LABEL, we have to rerun jump after CSE to put in the note. */
387 static int recorded_label_ref;
389 /* Says which LABEL_REF was put in the hash table. Used to see if we need
390 to set the above flag. */
391 static rtx new_label_ref;
393 /* canon_hash stores 1 in do_not_record
394 if it notices a reference to CC0, PC, or some other volatile
395 subexpression. */
397 static int do_not_record;
399 #ifdef LOAD_EXTEND_OP
401 /* Scratch rtl used when looking for load-extended copy of a MEM. */
402 static rtx memory_extend_rtx;
403 #endif
405 /* canon_hash stores 1 in hash_arg_in_memory
406 if it notices a reference to memory within the expression being hashed. */
408 static int hash_arg_in_memory;
410 /* The hash table contains buckets which are chains of `struct table_elt's,
411 each recording one expression's information.
412 That expression is in the `exp' field.
414 The canon_exp field contains a canonical (from the point of view of
415 alias analysis) version of the `exp' field.
417 Those elements with the same hash code are chained in both directions
418 through the `next_same_hash' and `prev_same_hash' fields.
420 Each set of expressions with equivalent values
421 are on a two-way chain through the `next_same_value'
422 and `prev_same_value' fields, and all point with
423 the `first_same_value' field at the first element in
424 that chain. The chain is in order of increasing cost.
425 Each element's cost value is in its `cost' field.
427 The `in_memory' field is nonzero for elements that
428 involve any reference to memory. These elements are removed
429 whenever a write is done to an unidentified location in memory.
430 To be safe, we assume that a memory address is unidentified unless
431 the address is either a symbol constant or a constant plus
432 the frame pointer or argument pointer.
434 The `related_value' field is used to connect related expressions
435 (that differ by adding an integer).
436 The related expressions are chained in a circular fashion.
437 `related_value' is zero for expressions for which this
438 chain is not useful.
440 The `cost' field stores the cost of this element's expression.
441 The `regcost' field stores the value returned by approx_reg_cost for
442 this element's expression.
444 The `is_const' flag is set if the element is a constant (including
445 a fixed address).
447 The `flag' field is used as a temporary during some search routines.
449 The `mode' field is usually the same as GET_MODE (`exp'), but
450 if `exp' is a CONST_INT and has no machine mode then the `mode'
451 field is the mode it was being used as. Each constant is
452 recorded separately for each mode it is used with. */
454 struct table_elt
456 rtx exp;
457 rtx canon_exp;
458 struct table_elt *next_same_hash;
459 struct table_elt *prev_same_hash;
460 struct table_elt *next_same_value;
461 struct table_elt *prev_same_value;
462 struct table_elt *first_same_value;
463 struct table_elt *related_value;
464 int cost;
465 int regcost;
466 enum machine_mode mode;
467 char in_memory;
468 char is_const;
469 char flag;
472 /* We don't want a lot of buckets, because we rarely have very many
473 things stored in the hash table, and a lot of buckets slows
474 down a lot of loops that happen frequently. */
475 #define HASH_SHIFT 5
476 #define HASH_SIZE (1 << HASH_SHIFT)
477 #define HASH_MASK (HASH_SIZE - 1)
479 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
480 register (hard registers may require `do_not_record' to be set). */
482 #define HASH(X, M) \
483 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
484 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
485 : canon_hash (X, M)) & HASH_MASK)
487 /* Determine whether register number N is considered a fixed register for the
488 purpose of approximating register costs.
489 It is desirable to replace other regs with fixed regs, to reduce need for
490 non-fixed hard regs.
491 A reg wins if it is either the frame pointer or designated as fixed. */
492 #define FIXED_REGNO_P(N) \
493 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
494 || fixed_regs[N] || global_regs[N])
496 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
497 hard registers and pointers into the frame are the cheapest with a cost
498 of 0. Next come pseudos with a cost of one and other hard registers with
499 a cost of 2. Aside from these special cases, call `rtx_cost'. */
501 #define CHEAP_REGNO(N) \
502 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
503 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
504 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
505 || ((N) < FIRST_PSEUDO_REGISTER \
506 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
508 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
509 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
511 /* Get the info associated with register N. */
513 #define GET_CSE_REG_INFO(N) \
514 (((N) == cached_regno && cached_cse_reg_info) \
515 ? cached_cse_reg_info : get_cse_reg_info ((N)))
517 /* Get the number of times this register has been updated in this
518 basic block. */
520 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
522 /* Get the point at which REG was recorded in the table. */
524 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
526 /* Get the quantity number for REG. */
528 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
530 /* Determine if the quantity number for register X represents a valid index
531 into the qty_table. */
533 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
535 static struct table_elt *table[HASH_SIZE];
537 /* Chain of `struct table_elt's made so far for this function
538 but currently removed from the table. */
540 static struct table_elt *free_element_chain;
542 /* Number of `struct table_elt' structures made so far for this function. */
544 static int n_elements_made;
546 /* Maximum value `n_elements_made' has had so far in this compilation
547 for functions previously processed. */
549 static int max_elements_made;
551 /* Surviving equivalence class when two equivalence classes are merged
552 by recording the effects of a jump in the last insn. Zero if the
553 last insn was not a conditional jump. */
555 static struct table_elt *last_jump_equiv_class;
557 /* Set to the cost of a constant pool reference if one was found for a
558 symbolic constant. If this was found, it means we should try to
559 convert constants into constant pool entries if they don't fit in
560 the insn. */
562 static int constant_pool_entries_cost;
564 /* Define maximum length of a branch path. */
566 #define PATHLENGTH 10
568 /* This data describes a block that will be processed by cse_basic_block. */
570 struct cse_basic_block_data
572 /* Lowest CUID value of insns in block. */
573 int low_cuid;
574 /* Highest CUID value of insns in block. */
575 int high_cuid;
576 /* Total number of SETs in block. */
577 int nsets;
578 /* Last insn in the block. */
579 rtx last;
580 /* Size of current branch path, if any. */
581 int path_size;
582 /* Current branch path, indicating which branches will be taken. */
583 struct branch_path
585 /* The branch insn. */
586 rtx branch;
587 /* Whether it should be taken or not. AROUND is the same as taken
588 except that it is used when the destination label is not preceded
589 by a BARRIER. */
590 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
591 } path[PATHLENGTH];
594 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
595 virtual regs here because the simplify_*_operation routines are called
596 by integrate.c, which is called before virtual register instantiation.
598 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
599 a header file so that their definitions can be shared with the
600 simplification routines in simplify-rtx.c. Until then, do not
601 change these macros without also changing the copy in simplify-rtx.c. */
603 #define FIXED_BASE_PLUS_P(X) \
604 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
605 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
606 || (X) == virtual_stack_vars_rtx \
607 || (X) == virtual_incoming_args_rtx \
608 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
609 && (XEXP (X, 0) == frame_pointer_rtx \
610 || XEXP (X, 0) == hard_frame_pointer_rtx \
611 || ((X) == arg_pointer_rtx \
612 && fixed_regs[ARG_POINTER_REGNUM]) \
613 || XEXP (X, 0) == virtual_stack_vars_rtx \
614 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
615 || GET_CODE (X) == ADDRESSOF)
617 /* Similar, but also allows reference to the stack pointer.
619 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
620 arg_pointer_rtx by itself is nonzero, because on at least one machine,
621 the i960, the arg pointer is zero when it is unused. */
623 #define NONZERO_BASE_PLUS_P(X) \
624 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
625 || (X) == virtual_stack_vars_rtx \
626 || (X) == virtual_incoming_args_rtx \
627 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
628 && (XEXP (X, 0) == frame_pointer_rtx \
629 || XEXP (X, 0) == hard_frame_pointer_rtx \
630 || ((X) == arg_pointer_rtx \
631 && fixed_regs[ARG_POINTER_REGNUM]) \
632 || XEXP (X, 0) == virtual_stack_vars_rtx \
633 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
634 || (X) == stack_pointer_rtx \
635 || (X) == virtual_stack_dynamic_rtx \
636 || (X) == virtual_outgoing_args_rtx \
637 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
638 && (XEXP (X, 0) == stack_pointer_rtx \
639 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
640 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
641 || GET_CODE (X) == ADDRESSOF)
643 static int notreg_cost PARAMS ((rtx, enum rtx_code));
644 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
645 static int approx_reg_cost PARAMS ((rtx));
646 static int preferrable PARAMS ((int, int, int, int));
647 static void new_basic_block PARAMS ((void));
648 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
649 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
650 static void delete_reg_equiv PARAMS ((unsigned int));
651 static int mention_regs PARAMS ((rtx));
652 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
653 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
654 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
655 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
656 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
657 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
658 enum machine_mode));
659 static void merge_equiv_classes PARAMS ((struct table_elt *,
660 struct table_elt *));
661 static void invalidate PARAMS ((rtx, enum machine_mode));
662 static int cse_rtx_varies_p PARAMS ((rtx, int));
663 static void remove_invalid_refs PARAMS ((unsigned int));
664 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
665 enum machine_mode));
666 static void rehash_using_reg PARAMS ((rtx));
667 static void invalidate_memory PARAMS ((void));
668 static void invalidate_for_call PARAMS ((void));
669 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
670 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
671 static unsigned canon_hash_string PARAMS ((const char *));
672 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
673 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
674 static rtx canon_reg PARAMS ((rtx, rtx));
675 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
676 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
677 enum machine_mode *,
678 enum machine_mode *));
679 static rtx fold_rtx PARAMS ((rtx, rtx));
680 static rtx equiv_constant PARAMS ((rtx));
681 static void record_jump_equiv PARAMS ((rtx, int));
682 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
683 rtx, rtx, int));
684 static void cse_insn PARAMS ((rtx, rtx));
685 static int addr_affects_sp_p PARAMS ((rtx));
686 static void invalidate_from_clobbers PARAMS ((rtx));
687 static rtx cse_process_notes PARAMS ((rtx, rtx));
688 static void cse_around_loop PARAMS ((rtx));
689 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
690 static void invalidate_skipped_block PARAMS ((rtx));
691 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
692 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
693 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
694 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
695 extern void dump_class PARAMS ((struct table_elt*));
696 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
697 static int check_dependence PARAMS ((rtx *, void *));
699 static void flush_hash_table PARAMS ((void));
701 /* Dump the expressions in the equivalence class indicated by CLASSP.
702 This function is used only for debugging. */
703 void
704 dump_class (classp)
705 struct table_elt *classp;
707 struct table_elt *elt;
709 fprintf (stderr, "Equivalence chain for ");
710 print_rtl (stderr, classp->exp);
711 fprintf (stderr, ": \n");
713 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
715 print_rtl (stderr, elt->exp);
716 fprintf (stderr, "\n");
720 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
721 static int
722 approx_reg_cost_1 (xp, data)
723 rtx *xp;
724 void *data;
726 rtx x = *xp;
727 regset set = (regset) data;
729 if (x && GET_CODE (x) == REG)
730 SET_REGNO_REG_SET (set, REGNO (x));
731 return 0;
734 /* Return an estimate of the cost of the registers used in an rtx.
735 This is mostly the number of different REG expressions in the rtx;
736 however for some excecptions like fixed registers we use a cost of
737 0. If any other hard register reference occurs, return MAX_COST. */
739 static int
740 approx_reg_cost (x)
741 rtx x;
743 regset_head set;
744 int i;
745 int cost = 0;
746 int hardregs = 0;
748 INIT_REG_SET (&set);
749 for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
751 EXECUTE_IF_SET_IN_REG_SET
752 (&set, 0, i,
754 if (! CHEAP_REGNO (i))
756 if (i < FIRST_PSEUDO_REGISTER)
757 hardregs++;
759 cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
763 CLEAR_REG_SET (&set);
764 return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
767 /* Return a negative value if an rtx A, whose costs are given by COST_A
768 and REGCOST_A, is more desirable than an rtx B.
769 Return a positive value if A is less desirable, or 0 if the two are
770 equally good. */
771 static int
772 preferrable (cost_a, regcost_a, cost_b, regcost_b)
773 int cost_a, regcost_a, cost_b, regcost_b;
775 /* First, get rid of a cases involving expressions that are entirely
776 unwanted. */
777 if (cost_a != cost_b)
779 if (cost_a == MAX_COST)
780 return 1;
781 if (cost_b == MAX_COST)
782 return -1;
785 /* Avoid extending lifetimes of hardregs. */
786 if (regcost_a != regcost_b)
788 if (regcost_a == MAX_COST)
789 return 1;
790 if (regcost_b == MAX_COST)
791 return -1;
794 /* Normal operation costs take precedence. */
795 if (cost_a != cost_b)
796 return cost_a - cost_b;
797 /* Only if these are identical consider effects on register pressure. */
798 if (regcost_a != regcost_b)
799 return regcost_a - regcost_b;
800 return 0;
803 /* Internal function, to compute cost when X is not a register; called
804 from COST macro to keep it simple. */
806 static int
807 notreg_cost (x, outer)
808 rtx x;
809 enum rtx_code outer;
811 return ((GET_CODE (x) == SUBREG
812 && GET_CODE (SUBREG_REG (x)) == REG
813 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
814 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
815 && (GET_MODE_SIZE (GET_MODE (x))
816 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
817 && subreg_lowpart_p (x)
818 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
819 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
821 : rtx_cost (x, outer) * 2);
824 /* Return an estimate of the cost of computing rtx X.
825 One use is in cse, to decide which expression to keep in the hash table.
826 Another is in rtl generation, to pick the cheapest way to multiply.
827 Other uses like the latter are expected in the future. */
830 rtx_cost (x, outer_code)
831 rtx x;
832 enum rtx_code outer_code ATTRIBUTE_UNUSED;
834 register int i, j;
835 register enum rtx_code code;
836 register const char *fmt;
837 register int total;
839 if (x == 0)
840 return 0;
842 /* Compute the default costs of certain things.
843 Note that RTX_COSTS can override the defaults. */
845 code = GET_CODE (x);
846 switch (code)
848 case MULT:
849 /* Count multiplication by 2**n as a shift,
850 because if we are considering it, we would output it as a shift. */
851 if (GET_CODE (XEXP (x, 1)) == CONST_INT
852 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
853 total = 2;
854 else
855 total = COSTS_N_INSNS (5);
856 break;
857 case DIV:
858 case UDIV:
859 case MOD:
860 case UMOD:
861 total = COSTS_N_INSNS (7);
862 break;
863 case USE:
864 /* Used in loop.c and combine.c as a marker. */
865 total = 0;
866 break;
867 default:
868 total = COSTS_N_INSNS (1);
871 switch (code)
873 case REG:
874 return 0;
876 case SUBREG:
877 /* If we can't tie these modes, make this expensive. The larger
878 the mode, the more expensive it is. */
879 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
880 return COSTS_N_INSNS (2
881 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
882 break;
884 #ifdef RTX_COSTS
885 RTX_COSTS (x, code, outer_code);
886 #endif
887 #ifdef CONST_COSTS
888 CONST_COSTS (x, code, outer_code);
889 #endif
891 default:
892 #ifdef DEFAULT_RTX_COSTS
893 DEFAULT_RTX_COSTS (x, code, outer_code);
894 #endif
895 break;
898 /* Sum the costs of the sub-rtx's, plus cost of this operation,
899 which is already in total. */
901 fmt = GET_RTX_FORMAT (code);
902 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
903 if (fmt[i] == 'e')
904 total += rtx_cost (XEXP (x, i), code);
905 else if (fmt[i] == 'E')
906 for (j = 0; j < XVECLEN (x, i); j++)
907 total += rtx_cost (XVECEXP (x, i, j), code);
909 return total;
912 /* Return cost of address expression X.
913 Expect that X is propertly formed address reference. */
916 address_cost (x, mode)
917 rtx x;
918 enum machine_mode mode;
920 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
921 during CSE, such nodes are present. Using an ADDRESSOF node which
922 refers to the address of a REG is a good thing because we can then
923 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
925 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
926 return -1;
928 /* We may be asked for cost of various unusual addresses, such as operands
929 of push instruction. It is not worthwhile to complicate writing
930 of ADDRESS_COST macro by such cases. */
932 if (!memory_address_p (mode, x))
933 return 1000;
934 #ifdef ADDRESS_COST
935 return ADDRESS_COST (x);
936 #else
937 return rtx_cost (x, MEM);
938 #endif
942 static struct cse_reg_info *
943 get_cse_reg_info (regno)
944 unsigned int regno;
946 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
947 struct cse_reg_info *p;
949 for (p = *hash_head; p != NULL; p = p->hash_next)
950 if (p->regno == regno)
951 break;
953 if (p == NULL)
955 /* Get a new cse_reg_info structure. */
956 if (cse_reg_info_free_list)
958 p = cse_reg_info_free_list;
959 cse_reg_info_free_list = p->next;
961 else
962 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
964 /* Insert into hash table. */
965 p->hash_next = *hash_head;
966 *hash_head = p;
968 /* Initialize it. */
969 p->reg_tick = 1;
970 p->reg_in_table = -1;
971 p->reg_qty = regno;
972 p->regno = regno;
973 p->next = cse_reg_info_used_list;
974 cse_reg_info_used_list = p;
975 if (!cse_reg_info_used_list_end)
976 cse_reg_info_used_list_end = p;
979 /* Cache this lookup; we tend to be looking up information about the
980 same register several times in a row. */
981 cached_regno = regno;
982 cached_cse_reg_info = p;
984 return p;
987 /* Clear the hash table and initialize each register with its own quantity,
988 for a new basic block. */
990 static void
991 new_basic_block ()
993 register int i;
995 next_qty = max_reg;
997 /* Clear out hash table state for this pass. */
999 memset ((char *) reg_hash, 0, sizeof reg_hash);
1001 if (cse_reg_info_used_list)
1003 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
1004 cse_reg_info_free_list = cse_reg_info_used_list;
1005 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
1007 cached_cse_reg_info = 0;
1009 CLEAR_HARD_REG_SET (hard_regs_in_table);
1011 /* The per-quantity values used to be initialized here, but it is
1012 much faster to initialize each as it is made in `make_new_qty'. */
1014 for (i = 0; i < HASH_SIZE; i++)
1016 struct table_elt *first;
1018 first = table[i];
1019 if (first != NULL)
1021 struct table_elt *last = first;
1023 table[i] = NULL;
1025 while (last->next_same_hash != NULL)
1026 last = last->next_same_hash;
1028 /* Now relink this hash entire chain into
1029 the free element list. */
1031 last->next_same_hash = free_element_chain;
1032 free_element_chain = first;
1036 prev_insn = 0;
1038 #ifdef HAVE_cc0
1039 prev_insn_cc0 = 0;
1040 #endif
1043 /* Say that register REG contains a quantity in mode MODE not in any
1044 register before and initialize that quantity. */
1046 static void
1047 make_new_qty (reg, mode)
1048 unsigned int reg;
1049 enum machine_mode mode;
1051 register int q;
1052 register struct qty_table_elem *ent;
1053 register struct reg_eqv_elem *eqv;
1055 if (next_qty >= max_qty)
1056 abort ();
1058 q = REG_QTY (reg) = next_qty++;
1059 ent = &qty_table[q];
1060 ent->first_reg = reg;
1061 ent->last_reg = reg;
1062 ent->mode = mode;
1063 ent->const_rtx = ent->const_insn = NULL_RTX;
1064 ent->comparison_code = UNKNOWN;
1066 eqv = &reg_eqv_table[reg];
1067 eqv->next = eqv->prev = -1;
1070 /* Make reg NEW equivalent to reg OLD.
1071 OLD is not changing; NEW is. */
1073 static void
1074 make_regs_eqv (new, old)
1075 unsigned int new, old;
1077 unsigned int lastr, firstr;
1078 int q = REG_QTY (old);
1079 struct qty_table_elem *ent;
1081 ent = &qty_table[q];
1083 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1084 if (! REGNO_QTY_VALID_P (old))
1085 abort ();
1087 REG_QTY (new) = q;
1088 firstr = ent->first_reg;
1089 lastr = ent->last_reg;
1091 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1092 hard regs. Among pseudos, if NEW will live longer than any other reg
1093 of the same qty, and that is beyond the current basic block,
1094 make it the new canonical replacement for this qty. */
1095 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1096 /* Certain fixed registers might be of the class NO_REGS. This means
1097 that not only can they not be allocated by the compiler, but
1098 they cannot be used in substitutions or canonicalizations
1099 either. */
1100 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1101 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1102 || (new >= FIRST_PSEUDO_REGISTER
1103 && (firstr < FIRST_PSEUDO_REGISTER
1104 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1105 || (uid_cuid[REGNO_FIRST_UID (new)]
1106 < cse_basic_block_start))
1107 && (uid_cuid[REGNO_LAST_UID (new)]
1108 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1110 reg_eqv_table[firstr].prev = new;
1111 reg_eqv_table[new].next = firstr;
1112 reg_eqv_table[new].prev = -1;
1113 ent->first_reg = new;
1115 else
1117 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1118 Otherwise, insert before any non-fixed hard regs that are at the
1119 end. Registers of class NO_REGS cannot be used as an
1120 equivalent for anything. */
1121 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1122 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1123 && new >= FIRST_PSEUDO_REGISTER)
1124 lastr = reg_eqv_table[lastr].prev;
1125 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1126 if (reg_eqv_table[lastr].next >= 0)
1127 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1128 else
1129 qty_table[q].last_reg = new;
1130 reg_eqv_table[lastr].next = new;
1131 reg_eqv_table[new].prev = lastr;
1135 /* Remove REG from its equivalence class. */
1137 static void
1138 delete_reg_equiv (reg)
1139 unsigned int reg;
1141 register struct qty_table_elem *ent;
1142 register int q = REG_QTY (reg);
1143 register int p, n;
1145 /* If invalid, do nothing. */
1146 if (q == (int) reg)
1147 return;
1149 ent = &qty_table[q];
1151 p = reg_eqv_table[reg].prev;
1152 n = reg_eqv_table[reg].next;
1154 if (n != -1)
1155 reg_eqv_table[n].prev = p;
1156 else
1157 ent->last_reg = p;
1158 if (p != -1)
1159 reg_eqv_table[p].next = n;
1160 else
1161 ent->first_reg = n;
1163 REG_QTY (reg) = reg;
1166 /* Remove any invalid expressions from the hash table
1167 that refer to any of the registers contained in expression X.
1169 Make sure that newly inserted references to those registers
1170 as subexpressions will be considered valid.
1172 mention_regs is not called when a register itself
1173 is being stored in the table.
1175 Return 1 if we have done something that may have changed the hash code
1176 of X. */
1178 static int
1179 mention_regs (x)
1180 rtx x;
1182 register enum rtx_code code;
1183 register int i, j;
1184 register const char *fmt;
1185 register int changed = 0;
1187 if (x == 0)
1188 return 0;
1190 code = GET_CODE (x);
1191 if (code == REG)
1193 unsigned int regno = REGNO (x);
1194 unsigned int endregno
1195 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1196 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1197 unsigned int i;
1199 for (i = regno; i < endregno; i++)
1201 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1202 remove_invalid_refs (i);
1204 REG_IN_TABLE (i) = REG_TICK (i);
1207 return 0;
1210 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1211 pseudo if they don't use overlapping words. We handle only pseudos
1212 here for simplicity. */
1213 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1214 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1216 unsigned int i = REGNO (SUBREG_REG (x));
1218 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1220 /* If reg_tick has been incremented more than once since
1221 reg_in_table was last set, that means that the entire
1222 register has been set before, so discard anything memorized
1223 for the entrire register, including all SUBREG expressions. */
1224 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1225 remove_invalid_refs (i);
1226 else
1227 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1230 REG_IN_TABLE (i) = REG_TICK (i);
1231 return 0;
1234 /* If X is a comparison or a COMPARE and either operand is a register
1235 that does not have a quantity, give it one. This is so that a later
1236 call to record_jump_equiv won't cause X to be assigned a different
1237 hash code and not found in the table after that call.
1239 It is not necessary to do this here, since rehash_using_reg can
1240 fix up the table later, but doing this here eliminates the need to
1241 call that expensive function in the most common case where the only
1242 use of the register is in the comparison. */
1244 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1246 if (GET_CODE (XEXP (x, 0)) == REG
1247 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1248 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1250 rehash_using_reg (XEXP (x, 0));
1251 changed = 1;
1254 if (GET_CODE (XEXP (x, 1)) == REG
1255 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1256 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1258 rehash_using_reg (XEXP (x, 1));
1259 changed = 1;
1263 fmt = GET_RTX_FORMAT (code);
1264 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1265 if (fmt[i] == 'e')
1266 changed |= mention_regs (XEXP (x, i));
1267 else if (fmt[i] == 'E')
1268 for (j = 0; j < XVECLEN (x, i); j++)
1269 changed |= mention_regs (XVECEXP (x, i, j));
1271 return changed;
1274 /* Update the register quantities for inserting X into the hash table
1275 with a value equivalent to CLASSP.
1276 (If the class does not contain a REG, it is irrelevant.)
1277 If MODIFIED is nonzero, X is a destination; it is being modified.
1278 Note that delete_reg_equiv should be called on a register
1279 before insert_regs is done on that register with MODIFIED != 0.
1281 Nonzero value means that elements of reg_qty have changed
1282 so X's hash code may be different. */
1284 static int
1285 insert_regs (x, classp, modified)
1286 rtx x;
1287 struct table_elt *classp;
1288 int modified;
1290 if (GET_CODE (x) == REG)
1292 unsigned int regno = REGNO (x);
1293 int qty_valid;
1295 /* If REGNO is in the equivalence table already but is of the
1296 wrong mode for that equivalence, don't do anything here. */
1298 qty_valid = REGNO_QTY_VALID_P (regno);
1299 if (qty_valid)
1301 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1303 if (ent->mode != GET_MODE (x))
1304 return 0;
1307 if (modified || ! qty_valid)
1309 if (classp)
1310 for (classp = classp->first_same_value;
1311 classp != 0;
1312 classp = classp->next_same_value)
1313 if (GET_CODE (classp->exp) == REG
1314 && GET_MODE (classp->exp) == GET_MODE (x))
1316 make_regs_eqv (regno, REGNO (classp->exp));
1317 return 1;
1320 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1321 than REG_IN_TABLE to find out if there was only a single preceding
1322 invalidation - for the SUBREG - or another one, which would be
1323 for the full register. However, if we find here that REG_TICK
1324 indicates that the register is invalid, it means that it has
1325 been invalidated in a separate operation. The SUBREG might be used
1326 now (then this is a recursive call), or we might use the full REG
1327 now and a SUBREG of it later. So bump up REG_TICK so that
1328 mention_regs will do the right thing. */
1329 if (! modified
1330 && REG_IN_TABLE (regno) >= 0
1331 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1332 REG_TICK (regno)++;
1333 make_new_qty (regno, GET_MODE (x));
1334 return 1;
1337 return 0;
1340 /* If X is a SUBREG, we will likely be inserting the inner register in the
1341 table. If that register doesn't have an assigned quantity number at
1342 this point but does later, the insertion that we will be doing now will
1343 not be accessible because its hash code will have changed. So assign
1344 a quantity number now. */
1346 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1347 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1349 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1350 mention_regs (x);
1351 return 1;
1353 else
1354 return mention_regs (x);
1357 /* Look in or update the hash table. */
1359 /* Remove table element ELT from use in the table.
1360 HASH is its hash code, made using the HASH macro.
1361 It's an argument because often that is known in advance
1362 and we save much time not recomputing it. */
1364 static void
1365 remove_from_table (elt, hash)
1366 register struct table_elt *elt;
1367 unsigned hash;
1369 if (elt == 0)
1370 return;
1372 /* Mark this element as removed. See cse_insn. */
1373 elt->first_same_value = 0;
1375 /* Remove the table element from its equivalence class. */
1378 register struct table_elt *prev = elt->prev_same_value;
1379 register struct table_elt *next = elt->next_same_value;
1381 if (next)
1382 next->prev_same_value = prev;
1384 if (prev)
1385 prev->next_same_value = next;
1386 else
1388 register struct table_elt *newfirst = next;
1389 while (next)
1391 next->first_same_value = newfirst;
1392 next = next->next_same_value;
1397 /* Remove the table element from its hash bucket. */
1400 register struct table_elt *prev = elt->prev_same_hash;
1401 register struct table_elt *next = elt->next_same_hash;
1403 if (next)
1404 next->prev_same_hash = prev;
1406 if (prev)
1407 prev->next_same_hash = next;
1408 else if (table[hash] == elt)
1409 table[hash] = next;
1410 else
1412 /* This entry is not in the proper hash bucket. This can happen
1413 when two classes were merged by `merge_equiv_classes'. Search
1414 for the hash bucket that it heads. This happens only very
1415 rarely, so the cost is acceptable. */
1416 for (hash = 0; hash < HASH_SIZE; hash++)
1417 if (table[hash] == elt)
1418 table[hash] = next;
1422 /* Remove the table element from its related-value circular chain. */
1424 if (elt->related_value != 0 && elt->related_value != elt)
1426 register struct table_elt *p = elt->related_value;
1428 while (p->related_value != elt)
1429 p = p->related_value;
1430 p->related_value = elt->related_value;
1431 if (p->related_value == p)
1432 p->related_value = 0;
1435 /* Now add it to the free element chain. */
1436 elt->next_same_hash = free_element_chain;
1437 free_element_chain = elt;
1440 /* Look up X in the hash table and return its table element,
1441 or 0 if X is not in the table.
1443 MODE is the machine-mode of X, or if X is an integer constant
1444 with VOIDmode then MODE is the mode with which X will be used.
1446 Here we are satisfied to find an expression whose tree structure
1447 looks like X. */
1449 static struct table_elt *
1450 lookup (x, hash, mode)
1451 rtx x;
1452 unsigned hash;
1453 enum machine_mode mode;
1455 register struct table_elt *p;
1457 for (p = table[hash]; p; p = p->next_same_hash)
1458 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1459 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1460 return p;
1462 return 0;
1465 /* Like `lookup' but don't care whether the table element uses invalid regs.
1466 Also ignore discrepancies in the machine mode of a register. */
1468 static struct table_elt *
1469 lookup_for_remove (x, hash, mode)
1470 rtx x;
1471 unsigned hash;
1472 enum machine_mode mode;
1474 register struct table_elt *p;
1476 if (GET_CODE (x) == REG)
1478 unsigned int regno = REGNO (x);
1480 /* Don't check the machine mode when comparing registers;
1481 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1482 for (p = table[hash]; p; p = p->next_same_hash)
1483 if (GET_CODE (p->exp) == REG
1484 && REGNO (p->exp) == regno)
1485 return p;
1487 else
1489 for (p = table[hash]; p; p = p->next_same_hash)
1490 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1491 return p;
1494 return 0;
1497 /* Look for an expression equivalent to X and with code CODE.
1498 If one is found, return that expression. */
1500 static rtx
1501 lookup_as_function (x, code)
1502 rtx x;
1503 enum rtx_code code;
1505 register struct table_elt *p
1506 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1508 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1509 long as we are narrowing. So if we looked in vain for a mode narrower
1510 than word_mode before, look for word_mode now. */
1511 if (p == 0 && code == CONST_INT
1512 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1514 x = copy_rtx (x);
1515 PUT_MODE (x, word_mode);
1516 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1519 if (p == 0)
1520 return 0;
1522 for (p = p->first_same_value; p; p = p->next_same_value)
1523 if (GET_CODE (p->exp) == code
1524 /* Make sure this is a valid entry in the table. */
1525 && exp_equiv_p (p->exp, p->exp, 1, 0))
1526 return p->exp;
1528 return 0;
1531 /* Insert X in the hash table, assuming HASH is its hash code
1532 and CLASSP is an element of the class it should go in
1533 (or 0 if a new class should be made).
1534 It is inserted at the proper position to keep the class in
1535 the order cheapest first.
1537 MODE is the machine-mode of X, or if X is an integer constant
1538 with VOIDmode then MODE is the mode with which X will be used.
1540 For elements of equal cheapness, the most recent one
1541 goes in front, except that the first element in the list
1542 remains first unless a cheaper element is added. The order of
1543 pseudo-registers does not matter, as canon_reg will be called to
1544 find the cheapest when a register is retrieved from the table.
1546 The in_memory field in the hash table element is set to 0.
1547 The caller must set it nonzero if appropriate.
1549 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1550 and if insert_regs returns a nonzero value
1551 you must then recompute its hash code before calling here.
1553 If necessary, update table showing constant values of quantities. */
1555 #define CHEAPER(X, Y) \
1556 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1558 static struct table_elt *
1559 insert (x, classp, hash, mode)
1560 register rtx x;
1561 register struct table_elt *classp;
1562 unsigned hash;
1563 enum machine_mode mode;
1565 register struct table_elt *elt;
1567 /* If X is a register and we haven't made a quantity for it,
1568 something is wrong. */
1569 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1570 abort ();
1572 /* If X is a hard register, show it is being put in the table. */
1573 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1575 unsigned int regno = REGNO (x);
1576 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1577 unsigned int i;
1579 for (i = regno; i < endregno; i++)
1580 SET_HARD_REG_BIT (hard_regs_in_table, i);
1583 /* If X is a label, show we recorded it. */
1584 if (GET_CODE (x) == LABEL_REF
1585 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1586 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1587 new_label_ref = x;
1589 /* Put an element for X into the right hash bucket. */
1591 elt = free_element_chain;
1592 if (elt)
1593 free_element_chain = elt->next_same_hash;
1594 else
1596 n_elements_made++;
1597 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1600 elt->exp = x;
1601 elt->canon_exp = NULL_RTX;
1602 elt->cost = COST (x);
1603 elt->regcost = approx_reg_cost (x);
1604 elt->next_same_value = 0;
1605 elt->prev_same_value = 0;
1606 elt->next_same_hash = table[hash];
1607 elt->prev_same_hash = 0;
1608 elt->related_value = 0;
1609 elt->in_memory = 0;
1610 elt->mode = mode;
1611 elt->is_const = (CONSTANT_P (x)
1612 /* GNU C++ takes advantage of this for `this'
1613 (and other const values). */
1614 || (RTX_UNCHANGING_P (x)
1615 && GET_CODE (x) == REG
1616 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1617 || FIXED_BASE_PLUS_P (x));
1619 if (table[hash])
1620 table[hash]->prev_same_hash = elt;
1621 table[hash] = elt;
1623 /* Put it into the proper value-class. */
1624 if (classp)
1626 classp = classp->first_same_value;
1627 if (CHEAPER (elt, classp))
1628 /* Insert at the head of the class */
1630 register struct table_elt *p;
1631 elt->next_same_value = classp;
1632 classp->prev_same_value = elt;
1633 elt->first_same_value = elt;
1635 for (p = classp; p; p = p->next_same_value)
1636 p->first_same_value = elt;
1638 else
1640 /* Insert not at head of the class. */
1641 /* Put it after the last element cheaper than X. */
1642 register struct table_elt *p, *next;
1644 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1645 p = next);
1647 /* Put it after P and before NEXT. */
1648 elt->next_same_value = next;
1649 if (next)
1650 next->prev_same_value = elt;
1652 elt->prev_same_value = p;
1653 p->next_same_value = elt;
1654 elt->first_same_value = classp;
1657 else
1658 elt->first_same_value = elt;
1660 /* If this is a constant being set equivalent to a register or a register
1661 being set equivalent to a constant, note the constant equivalence.
1663 If this is a constant, it cannot be equivalent to a different constant,
1664 and a constant is the only thing that can be cheaper than a register. So
1665 we know the register is the head of the class (before the constant was
1666 inserted).
1668 If this is a register that is not already known equivalent to a
1669 constant, we must check the entire class.
1671 If this is a register that is already known equivalent to an insn,
1672 update the qtys `const_insn' to show that `this_insn' is the latest
1673 insn making that quantity equivalent to the constant. */
1675 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1676 && GET_CODE (x) != REG)
1678 int exp_q = REG_QTY (REGNO (classp->exp));
1679 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1681 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1682 exp_ent->const_insn = this_insn;
1685 else if (GET_CODE (x) == REG
1686 && classp
1687 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1688 && ! elt->is_const)
1690 register struct table_elt *p;
1692 for (p = classp; p != 0; p = p->next_same_value)
1694 if (p->is_const && GET_CODE (p->exp) != REG)
1696 int x_q = REG_QTY (REGNO (x));
1697 struct qty_table_elem *x_ent = &qty_table[x_q];
1699 x_ent->const_rtx
1700 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1701 x_ent->const_insn = this_insn;
1702 break;
1707 else if (GET_CODE (x) == REG
1708 && qty_table[REG_QTY (REGNO (x))].const_rtx
1709 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1710 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1712 /* If this is a constant with symbolic value,
1713 and it has a term with an explicit integer value,
1714 link it up with related expressions. */
1715 if (GET_CODE (x) == CONST)
1717 rtx subexp = get_related_value (x);
1718 unsigned subhash;
1719 struct table_elt *subelt, *subelt_prev;
1721 if (subexp != 0)
1723 /* Get the integer-free subexpression in the hash table. */
1724 subhash = safe_hash (subexp, mode) & HASH_MASK;
1725 subelt = lookup (subexp, subhash, mode);
1726 if (subelt == 0)
1727 subelt = insert (subexp, NULL_PTR, subhash, mode);
1728 /* Initialize SUBELT's circular chain if it has none. */
1729 if (subelt->related_value == 0)
1730 subelt->related_value = subelt;
1731 /* Find the element in the circular chain that precedes SUBELT. */
1732 subelt_prev = subelt;
1733 while (subelt_prev->related_value != subelt)
1734 subelt_prev = subelt_prev->related_value;
1735 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1736 This way the element that follows SUBELT is the oldest one. */
1737 elt->related_value = subelt_prev->related_value;
1738 subelt_prev->related_value = elt;
1742 return elt;
1745 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1746 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1747 the two classes equivalent.
1749 CLASS1 will be the surviving class; CLASS2 should not be used after this
1750 call.
1752 Any invalid entries in CLASS2 will not be copied. */
1754 static void
1755 merge_equiv_classes (class1, class2)
1756 struct table_elt *class1, *class2;
1758 struct table_elt *elt, *next, *new;
1760 /* Ensure we start with the head of the classes. */
1761 class1 = class1->first_same_value;
1762 class2 = class2->first_same_value;
1764 /* If they were already equal, forget it. */
1765 if (class1 == class2)
1766 return;
1768 for (elt = class2; elt; elt = next)
1770 unsigned int hash;
1771 rtx exp = elt->exp;
1772 enum machine_mode mode = elt->mode;
1774 next = elt->next_same_value;
1776 /* Remove old entry, make a new one in CLASS1's class.
1777 Don't do this for invalid entries as we cannot find their
1778 hash code (it also isn't necessary). */
1779 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1781 hash_arg_in_memory = 0;
1782 hash = HASH (exp, mode);
1784 if (GET_CODE (exp) == REG)
1785 delete_reg_equiv (REGNO (exp));
1787 remove_from_table (elt, hash);
1789 if (insert_regs (exp, class1, 0))
1791 rehash_using_reg (exp);
1792 hash = HASH (exp, mode);
1794 new = insert (exp, class1, hash, mode);
1795 new->in_memory = hash_arg_in_memory;
1800 /* Flush the entire hash table. */
1802 static void
1803 flush_hash_table ()
1805 int i;
1806 struct table_elt *p;
1808 for (i = 0; i < HASH_SIZE; i++)
1809 for (p = table[i]; p; p = table[i])
1811 /* Note that invalidate can remove elements
1812 after P in the current hash chain. */
1813 if (GET_CODE (p->exp) == REG)
1814 invalidate (p->exp, p->mode);
1815 else
1816 remove_from_table (p, i);
1820 /* Function called for each rtx to check whether true dependence exist. */
1821 struct check_dependence_data
1823 enum machine_mode mode;
1824 rtx exp;
1826 static int
1827 check_dependence (x, data)
1828 rtx *x;
1829 void *data;
1831 struct check_dependence_data *d = (struct check_dependence_data *) data;
1832 if (*x && GET_CODE (*x) == MEM)
1833 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1834 else
1835 return 0;
1838 /* Remove from the hash table, or mark as invalid, all expressions whose
1839 values could be altered by storing in X. X is a register, a subreg, or
1840 a memory reference with nonvarying address (because, when a memory
1841 reference with a varying address is stored in, all memory references are
1842 removed by invalidate_memory so specific invalidation is superfluous).
1843 FULL_MODE, if not VOIDmode, indicates that this much should be
1844 invalidated instead of just the amount indicated by the mode of X. This
1845 is only used for bitfield stores into memory.
1847 A nonvarying address may be just a register or just a symbol reference,
1848 or it may be either of those plus a numeric offset. */
1850 static void
1851 invalidate (x, full_mode)
1852 rtx x;
1853 enum machine_mode full_mode;
1855 register int i;
1856 register struct table_elt *p;
1858 switch (GET_CODE (x))
1860 case REG:
1862 /* If X is a register, dependencies on its contents are recorded
1863 through the qty number mechanism. Just change the qty number of
1864 the register, mark it as invalid for expressions that refer to it,
1865 and remove it itself. */
1866 unsigned int regno = REGNO (x);
1867 unsigned int hash = HASH (x, GET_MODE (x));
1869 /* Remove REGNO from any quantity list it might be on and indicate
1870 that its value might have changed. If it is a pseudo, remove its
1871 entry from the hash table.
1873 For a hard register, we do the first two actions above for any
1874 additional hard registers corresponding to X. Then, if any of these
1875 registers are in the table, we must remove any REG entries that
1876 overlap these registers. */
1878 delete_reg_equiv (regno);
1879 REG_TICK (regno)++;
1881 if (regno >= FIRST_PSEUDO_REGISTER)
1883 /* Because a register can be referenced in more than one mode,
1884 we might have to remove more than one table entry. */
1885 struct table_elt *elt;
1887 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1888 remove_from_table (elt, hash);
1890 else
1892 HOST_WIDE_INT in_table
1893 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1894 unsigned int endregno
1895 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1896 unsigned int tregno, tendregno, rn;
1897 register struct table_elt *p, *next;
1899 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1901 for (rn = regno + 1; rn < endregno; rn++)
1903 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1904 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1905 delete_reg_equiv (rn);
1906 REG_TICK (rn)++;
1909 if (in_table)
1910 for (hash = 0; hash < HASH_SIZE; hash++)
1911 for (p = table[hash]; p; p = next)
1913 next = p->next_same_hash;
1915 if (GET_CODE (p->exp) != REG
1916 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1917 continue;
1919 tregno = REGNO (p->exp);
1920 tendregno
1921 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1922 if (tendregno > regno && tregno < endregno)
1923 remove_from_table (p, hash);
1927 return;
1929 case SUBREG:
1930 invalidate (SUBREG_REG (x), VOIDmode);
1931 return;
1933 case PARALLEL:
1934 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1935 invalidate (XVECEXP (x, 0, i), VOIDmode);
1936 return;
1938 case EXPR_LIST:
1939 /* This is part of a disjoint return value; extract the location in
1940 question ignoring the offset. */
1941 invalidate (XEXP (x, 0), VOIDmode);
1942 return;
1944 case MEM:
1945 /* Calculate the canonical version of X here so that
1946 true_dependence doesn't generate new RTL for X on each call. */
1947 x = canon_rtx (x);
1949 /* Remove all hash table elements that refer to overlapping pieces of
1950 memory. */
1951 if (full_mode == VOIDmode)
1952 full_mode = GET_MODE (x);
1954 for (i = 0; i < HASH_SIZE; i++)
1956 register struct table_elt *next;
1958 for (p = table[i]; p; p = next)
1960 next = p->next_same_hash;
1961 if (p->in_memory)
1963 struct check_dependence_data d;
1965 /* Just canonicalize the expression once;
1966 otherwise each time we call invalidate
1967 true_dependence will canonicalize the
1968 expression again. */
1969 if (!p->canon_exp)
1970 p->canon_exp = canon_rtx (p->exp);
1971 d.exp = x;
1972 d.mode = full_mode;
1973 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1974 remove_from_table (p, i);
1978 return;
1980 default:
1981 abort ();
1985 /* Remove all expressions that refer to register REGNO,
1986 since they are already invalid, and we are about to
1987 mark that register valid again and don't want the old
1988 expressions to reappear as valid. */
1990 static void
1991 remove_invalid_refs (regno)
1992 unsigned int regno;
1994 unsigned int i;
1995 struct table_elt *p, *next;
1997 for (i = 0; i < HASH_SIZE; i++)
1998 for (p = table[i]; p; p = next)
2000 next = p->next_same_hash;
2001 if (GET_CODE (p->exp) != REG
2002 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
2003 remove_from_table (p, i);
2007 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
2008 static void
2009 remove_invalid_subreg_refs (regno, word, mode)
2010 unsigned int regno;
2011 unsigned int word;
2012 enum machine_mode mode;
2014 unsigned int i;
2015 struct table_elt *p, *next;
2016 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
2018 for (i = 0; i < HASH_SIZE; i++)
2019 for (p = table[i]; p; p = next)
2021 rtx exp;
2022 next = p->next_same_hash;
2024 exp = p->exp;
2025 if (GET_CODE (p->exp) != REG
2026 && (GET_CODE (exp) != SUBREG
2027 || GET_CODE (SUBREG_REG (exp)) != REG
2028 || REGNO (SUBREG_REG (exp)) != regno
2029 || (((SUBREG_WORD (exp)
2030 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
2031 >= word)
2032 && SUBREG_WORD (exp) <= end))
2033 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
2034 remove_from_table (p, i);
2038 /* Recompute the hash codes of any valid entries in the hash table that
2039 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2041 This is called when we make a jump equivalence. */
2043 static void
2044 rehash_using_reg (x)
2045 rtx x;
2047 unsigned int i;
2048 struct table_elt *p, *next;
2049 unsigned hash;
2051 if (GET_CODE (x) == SUBREG)
2052 x = SUBREG_REG (x);
2054 /* If X is not a register or if the register is known not to be in any
2055 valid entries in the table, we have no work to do. */
2057 if (GET_CODE (x) != REG
2058 || REG_IN_TABLE (REGNO (x)) < 0
2059 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2060 return;
2062 /* Scan all hash chains looking for valid entries that mention X.
2063 If we find one and it is in the wrong hash chain, move it. We can skip
2064 objects that are registers, since they are handled specially. */
2066 for (i = 0; i < HASH_SIZE; i++)
2067 for (p = table[i]; p; p = next)
2069 next = p->next_same_hash;
2070 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2071 && exp_equiv_p (p->exp, p->exp, 1, 0)
2072 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2074 if (p->next_same_hash)
2075 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2077 if (p->prev_same_hash)
2078 p->prev_same_hash->next_same_hash = p->next_same_hash;
2079 else
2080 table[i] = p->next_same_hash;
2082 p->next_same_hash = table[hash];
2083 p->prev_same_hash = 0;
2084 if (table[hash])
2085 table[hash]->prev_same_hash = p;
2086 table[hash] = p;
2091 /* Remove from the hash table any expression that is a call-clobbered
2092 register. Also update their TICK values. */
2094 static void
2095 invalidate_for_call ()
2097 unsigned int regno, endregno;
2098 unsigned int i;
2099 unsigned hash;
2100 struct table_elt *p, *next;
2101 int in_table = 0;
2103 /* Go through all the hard registers. For each that is clobbered in
2104 a CALL_INSN, remove the register from quantity chains and update
2105 reg_tick if defined. Also see if any of these registers is currently
2106 in the table. */
2108 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2109 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2111 delete_reg_equiv (regno);
2112 if (REG_TICK (regno) >= 0)
2113 REG_TICK (regno)++;
2115 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2118 /* In the case where we have no call-clobbered hard registers in the
2119 table, we are done. Otherwise, scan the table and remove any
2120 entry that overlaps a call-clobbered register. */
2122 if (in_table)
2123 for (hash = 0; hash < HASH_SIZE; hash++)
2124 for (p = table[hash]; p; p = next)
2126 next = p->next_same_hash;
2128 if (GET_CODE (p->exp) != REG
2129 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2130 continue;
2132 regno = REGNO (p->exp);
2133 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2135 for (i = regno; i < endregno; i++)
2136 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2138 remove_from_table (p, hash);
2139 break;
2144 /* Given an expression X of type CONST,
2145 and ELT which is its table entry (or 0 if it
2146 is not in the hash table),
2147 return an alternate expression for X as a register plus integer.
2148 If none can be found, return 0. */
2150 static rtx
2151 use_related_value (x, elt)
2152 rtx x;
2153 struct table_elt *elt;
2155 register struct table_elt *relt = 0;
2156 register struct table_elt *p, *q;
2157 HOST_WIDE_INT offset;
2159 /* First, is there anything related known?
2160 If we have a table element, we can tell from that.
2161 Otherwise, must look it up. */
2163 if (elt != 0 && elt->related_value != 0)
2164 relt = elt;
2165 else if (elt == 0 && GET_CODE (x) == CONST)
2167 rtx subexp = get_related_value (x);
2168 if (subexp != 0)
2169 relt = lookup (subexp,
2170 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2171 GET_MODE (subexp));
2174 if (relt == 0)
2175 return 0;
2177 /* Search all related table entries for one that has an
2178 equivalent register. */
2180 p = relt;
2181 while (1)
2183 /* This loop is strange in that it is executed in two different cases.
2184 The first is when X is already in the table. Then it is searching
2185 the RELATED_VALUE list of X's class (RELT). The second case is when
2186 X is not in the table. Then RELT points to a class for the related
2187 value.
2189 Ensure that, whatever case we are in, that we ignore classes that have
2190 the same value as X. */
2192 if (rtx_equal_p (x, p->exp))
2193 q = 0;
2194 else
2195 for (q = p->first_same_value; q; q = q->next_same_value)
2196 if (GET_CODE (q->exp) == REG)
2197 break;
2199 if (q)
2200 break;
2202 p = p->related_value;
2204 /* We went all the way around, so there is nothing to be found.
2205 Alternatively, perhaps RELT was in the table for some other reason
2206 and it has no related values recorded. */
2207 if (p == relt || p == 0)
2208 break;
2211 if (q == 0)
2212 return 0;
2214 offset = (get_integer_term (x) - get_integer_term (p->exp));
2215 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2216 return plus_constant (q->exp, offset);
2219 /* Hash a string. Just add its bytes up. */
2220 static inline unsigned
2221 canon_hash_string (ps)
2222 const char *ps;
2224 unsigned hash = 0;
2225 const unsigned char *p = (const unsigned char *)ps;
2227 if (p)
2228 while (*p)
2229 hash += *p++;
2231 return hash;
2234 /* Hash an rtx. We are careful to make sure the value is never negative.
2235 Equivalent registers hash identically.
2236 MODE is used in hashing for CONST_INTs only;
2237 otherwise the mode of X is used.
2239 Store 1 in do_not_record if any subexpression is volatile.
2241 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2242 which does not have the RTX_UNCHANGING_P bit set.
2244 Note that cse_insn knows that the hash code of a MEM expression
2245 is just (int) MEM plus the hash code of the address. */
2247 static unsigned
2248 canon_hash (x, mode)
2249 rtx x;
2250 enum machine_mode mode;
2252 register int i, j;
2253 register unsigned hash = 0;
2254 register enum rtx_code code;
2255 register const char *fmt;
2257 /* repeat is used to turn tail-recursion into iteration. */
2258 repeat:
2259 if (x == 0)
2260 return hash;
2262 code = GET_CODE (x);
2263 switch (code)
2265 case REG:
2267 unsigned int regno = REGNO (x);
2269 /* On some machines, we can't record any non-fixed hard register,
2270 because extending its life will cause reload problems. We
2271 consider ap, fp, and sp to be fixed for this purpose.
2273 We also consider CCmode registers to be fixed for this purpose;
2274 failure to do so leads to failure to simplify 0<100 type of
2275 conditionals.
2277 On all machines, we can't record any global registers. */
2279 if (regno < FIRST_PSEUDO_REGISTER
2280 && (global_regs[regno]
2281 || (SMALL_REGISTER_CLASSES
2282 && ! fixed_regs[regno]
2283 && regno != FRAME_POINTER_REGNUM
2284 && regno != HARD_FRAME_POINTER_REGNUM
2285 && regno != ARG_POINTER_REGNUM
2286 && regno != STACK_POINTER_REGNUM
2287 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2289 do_not_record = 1;
2290 return 0;
2293 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2294 return hash;
2297 /* We handle SUBREG of a REG specially because the underlying
2298 reg changes its hash value with every value change; we don't
2299 want to have to forget unrelated subregs when one subreg changes. */
2300 case SUBREG:
2302 if (GET_CODE (SUBREG_REG (x)) == REG)
2304 hash += (((unsigned) SUBREG << 7)
2305 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2306 return hash;
2308 break;
2311 case CONST_INT:
2313 unsigned HOST_WIDE_INT tem = INTVAL (x);
2314 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2315 return hash;
2318 case CONST_DOUBLE:
2319 /* This is like the general case, except that it only counts
2320 the integers representing the constant. */
2321 hash += (unsigned) code + (unsigned) GET_MODE (x);
2322 if (GET_MODE (x) != VOIDmode)
2323 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2325 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2326 hash += tem;
2328 else
2329 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2330 + (unsigned) CONST_DOUBLE_HIGH (x));
2331 return hash;
2333 /* Assume there is only one rtx object for any given label. */
2334 case LABEL_REF:
2335 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2336 return hash;
2338 case SYMBOL_REF:
2339 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2340 return hash;
2342 case MEM:
2343 /* We don't record if marked volatile or if BLKmode since we don't
2344 know the size of the move. */
2345 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2347 do_not_record = 1;
2348 return 0;
2350 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2352 hash_arg_in_memory = 1;
2354 /* Now that we have already found this special case,
2355 might as well speed it up as much as possible. */
2356 hash += (unsigned) MEM;
2357 x = XEXP (x, 0);
2358 goto repeat;
2360 case USE:
2361 /* A USE that mentions non-volatile memory needs special
2362 handling since the MEM may be BLKmode which normally
2363 prevents an entry from being made. Pure calls are
2364 marked by a USE which mentions BLKmode memory. */
2365 if (GET_CODE (XEXP (x, 0)) == MEM
2366 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2368 hash += (unsigned)USE;
2369 x = XEXP (x, 0);
2371 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2372 hash_arg_in_memory = 1;
2374 /* Now that we have already found this special case,
2375 might as well speed it up as much as possible. */
2376 hash += (unsigned) MEM;
2377 x = XEXP (x, 0);
2378 goto repeat;
2380 break;
2382 case PRE_DEC:
2383 case PRE_INC:
2384 case POST_DEC:
2385 case POST_INC:
2386 case PRE_MODIFY:
2387 case POST_MODIFY:
2388 case PC:
2389 case CC0:
2390 case CALL:
2391 case UNSPEC_VOLATILE:
2392 do_not_record = 1;
2393 return 0;
2395 case ASM_OPERANDS:
2396 if (MEM_VOLATILE_P (x))
2398 do_not_record = 1;
2399 return 0;
2401 else
2403 /* We don't want to take the filename and line into account. */
2404 hash += (unsigned) code + (unsigned) GET_MODE (x)
2405 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2406 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2407 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2409 if (ASM_OPERANDS_INPUT_LENGTH (x))
2411 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2413 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2414 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2415 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2416 (x, i)));
2419 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2420 x = ASM_OPERANDS_INPUT (x, 0);
2421 mode = GET_MODE (x);
2422 goto repeat;
2425 return hash;
2427 break;
2429 default:
2430 break;
2433 i = GET_RTX_LENGTH (code) - 1;
2434 hash += (unsigned) code + (unsigned) GET_MODE (x);
2435 fmt = GET_RTX_FORMAT (code);
2436 for (; i >= 0; i--)
2438 if (fmt[i] == 'e')
2440 rtx tem = XEXP (x, i);
2442 /* If we are about to do the last recursive call
2443 needed at this level, change it into iteration.
2444 This function is called enough to be worth it. */
2445 if (i == 0)
2447 x = tem;
2448 goto repeat;
2450 hash += canon_hash (tem, 0);
2452 else if (fmt[i] == 'E')
2453 for (j = 0; j < XVECLEN (x, i); j++)
2454 hash += canon_hash (XVECEXP (x, i, j), 0);
2455 else if (fmt[i] == 's')
2456 hash += canon_hash_string (XSTR (x, i));
2457 else if (fmt[i] == 'i')
2459 register unsigned tem = XINT (x, i);
2460 hash += tem;
2462 else if (fmt[i] == '0' || fmt[i] == 't')
2463 /* Unused. */
2465 else
2466 abort ();
2468 return hash;
2471 /* Like canon_hash but with no side effects. */
2473 static unsigned
2474 safe_hash (x, mode)
2475 rtx x;
2476 enum machine_mode mode;
2478 int save_do_not_record = do_not_record;
2479 int save_hash_arg_in_memory = hash_arg_in_memory;
2480 unsigned hash = canon_hash (x, mode);
2481 hash_arg_in_memory = save_hash_arg_in_memory;
2482 do_not_record = save_do_not_record;
2483 return hash;
2486 /* Return 1 iff X and Y would canonicalize into the same thing,
2487 without actually constructing the canonicalization of either one.
2488 If VALIDATE is nonzero,
2489 we assume X is an expression being processed from the rtl
2490 and Y was found in the hash table. We check register refs
2491 in Y for being marked as valid.
2493 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2494 that is known to be in the register. Ordinarily, we don't allow them
2495 to match, because letting them match would cause unpredictable results
2496 in all the places that search a hash table chain for an equivalent
2497 for a given value. A possible equivalent that has different structure
2498 has its hash code computed from different data. Whether the hash code
2499 is the same as that of the given value is pure luck. */
2501 static int
2502 exp_equiv_p (x, y, validate, equal_values)
2503 rtx x, y;
2504 int validate;
2505 int equal_values;
2507 register int i, j;
2508 register enum rtx_code code;
2509 register const char *fmt;
2511 /* Note: it is incorrect to assume an expression is equivalent to itself
2512 if VALIDATE is nonzero. */
2513 if (x == y && !validate)
2514 return 1;
2515 if (x == 0 || y == 0)
2516 return x == y;
2518 code = GET_CODE (x);
2519 if (code != GET_CODE (y))
2521 if (!equal_values)
2522 return 0;
2524 /* If X is a constant and Y is a register or vice versa, they may be
2525 equivalent. We only have to validate if Y is a register. */
2526 if (CONSTANT_P (x) && GET_CODE (y) == REG
2527 && REGNO_QTY_VALID_P (REGNO (y)))
2529 int y_q = REG_QTY (REGNO (y));
2530 struct qty_table_elem *y_ent = &qty_table[y_q];
2532 if (GET_MODE (y) == y_ent->mode
2533 && rtx_equal_p (x, y_ent->const_rtx)
2534 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2535 return 1;
2538 if (CONSTANT_P (y) && code == REG
2539 && REGNO_QTY_VALID_P (REGNO (x)))
2541 int x_q = REG_QTY (REGNO (x));
2542 struct qty_table_elem *x_ent = &qty_table[x_q];
2544 if (GET_MODE (x) == x_ent->mode
2545 && rtx_equal_p (y, x_ent->const_rtx))
2546 return 1;
2549 return 0;
2552 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2553 if (GET_MODE (x) != GET_MODE (y))
2554 return 0;
2556 switch (code)
2558 case PC:
2559 case CC0:
2560 case CONST_INT:
2561 return x == y;
2563 case LABEL_REF:
2564 return XEXP (x, 0) == XEXP (y, 0);
2566 case SYMBOL_REF:
2567 return XSTR (x, 0) == XSTR (y, 0);
2569 case REG:
2571 unsigned int regno = REGNO (y);
2572 unsigned int endregno
2573 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2574 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2575 unsigned int i;
2577 /* If the quantities are not the same, the expressions are not
2578 equivalent. If there are and we are not to validate, they
2579 are equivalent. Otherwise, ensure all regs are up-to-date. */
2581 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2582 return 0;
2584 if (! validate)
2585 return 1;
2587 for (i = regno; i < endregno; i++)
2588 if (REG_IN_TABLE (i) != REG_TICK (i))
2589 return 0;
2591 return 1;
2594 /* For commutative operations, check both orders. */
2595 case PLUS:
2596 case MULT:
2597 case AND:
2598 case IOR:
2599 case XOR:
2600 case NE:
2601 case EQ:
2602 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2603 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2604 validate, equal_values))
2605 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2606 validate, equal_values)
2607 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2608 validate, equal_values)));
2610 case ASM_OPERANDS:
2611 /* We don't use the generic code below because we want to
2612 disregard filename and line numbers. */
2614 /* A volatile asm isn't equivalent to any other. */
2615 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2616 return 0;
2618 if (GET_MODE (x) != GET_MODE (y)
2619 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2620 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2621 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2622 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2623 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2624 return 0;
2626 if (ASM_OPERANDS_INPUT_LENGTH (x))
2628 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2629 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2630 ASM_OPERANDS_INPUT (y, i),
2631 validate, equal_values)
2632 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2633 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2634 return 0;
2637 return 1;
2639 default:
2640 break;
2643 /* Compare the elements. If any pair of corresponding elements
2644 fail to match, return 0 for the whole things. */
2646 fmt = GET_RTX_FORMAT (code);
2647 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2649 switch (fmt[i])
2651 case 'e':
2652 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2653 return 0;
2654 break;
2656 case 'E':
2657 if (XVECLEN (x, i) != XVECLEN (y, i))
2658 return 0;
2659 for (j = 0; j < XVECLEN (x, i); j++)
2660 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2661 validate, equal_values))
2662 return 0;
2663 break;
2665 case 's':
2666 if (strcmp (XSTR (x, i), XSTR (y, i)))
2667 return 0;
2668 break;
2670 case 'i':
2671 if (XINT (x, i) != XINT (y, i))
2672 return 0;
2673 break;
2675 case 'w':
2676 if (XWINT (x, i) != XWINT (y, i))
2677 return 0;
2678 break;
2680 case '0':
2681 case 't':
2682 break;
2684 default:
2685 abort ();
2689 return 1;
2692 /* Return 1 if X has a value that can vary even between two
2693 executions of the program. 0 means X can be compared reliably
2694 against certain constants or near-constants. */
2696 static int
2697 cse_rtx_varies_p (x, from_alias)
2698 register rtx x;
2699 int from_alias;
2701 /* We need not check for X and the equivalence class being of the same
2702 mode because if X is equivalent to a constant in some mode, it
2703 doesn't vary in any mode. */
2705 if (GET_CODE (x) == REG
2706 && REGNO_QTY_VALID_P (REGNO (x)))
2708 int x_q = REG_QTY (REGNO (x));
2709 struct qty_table_elem *x_ent = &qty_table[x_q];
2711 if (GET_MODE (x) == x_ent->mode
2712 && x_ent->const_rtx != NULL_RTX)
2713 return 0;
2716 if (GET_CODE (x) == PLUS
2717 && GET_CODE (XEXP (x, 1)) == CONST_INT
2718 && GET_CODE (XEXP (x, 0)) == REG
2719 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2721 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2722 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2724 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2725 && x0_ent->const_rtx != NULL_RTX)
2726 return 0;
2729 /* This can happen as the result of virtual register instantiation, if
2730 the initial constant is too large to be a valid address. This gives
2731 us a three instruction sequence, load large offset into a register,
2732 load fp minus a constant into a register, then a MEM which is the
2733 sum of the two `constant' registers. */
2734 if (GET_CODE (x) == PLUS
2735 && GET_CODE (XEXP (x, 0)) == REG
2736 && GET_CODE (XEXP (x, 1)) == REG
2737 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2738 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2740 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2741 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2742 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2743 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2745 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2746 && x0_ent->const_rtx != NULL_RTX
2747 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2748 && x1_ent->const_rtx != NULL_RTX)
2749 return 0;
2752 return rtx_varies_p (x, from_alias);
2755 /* Canonicalize an expression:
2756 replace each register reference inside it
2757 with the "oldest" equivalent register.
2759 If INSN is non-zero and we are replacing a pseudo with a hard register
2760 or vice versa, validate_change is used to ensure that INSN remains valid
2761 after we make our substitution. The calls are made with IN_GROUP non-zero
2762 so apply_change_group must be called upon the outermost return from this
2763 function (unless INSN is zero). The result of apply_change_group can
2764 generally be discarded since the changes we are making are optional. */
2766 static rtx
2767 canon_reg (x, insn)
2768 rtx x;
2769 rtx insn;
2771 register int i;
2772 register enum rtx_code code;
2773 register const char *fmt;
2775 if (x == 0)
2776 return x;
2778 code = GET_CODE (x);
2779 switch (code)
2781 case PC:
2782 case CC0:
2783 case CONST:
2784 case CONST_INT:
2785 case CONST_DOUBLE:
2786 case SYMBOL_REF:
2787 case LABEL_REF:
2788 case ADDR_VEC:
2789 case ADDR_DIFF_VEC:
2790 return x;
2792 case REG:
2794 register int first;
2795 register int q;
2796 register struct qty_table_elem *ent;
2798 /* Never replace a hard reg, because hard regs can appear
2799 in more than one machine mode, and we must preserve the mode
2800 of each occurrence. Also, some hard regs appear in
2801 MEMs that are shared and mustn't be altered. Don't try to
2802 replace any reg that maps to a reg of class NO_REGS. */
2803 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2804 || ! REGNO_QTY_VALID_P (REGNO (x)))
2805 return x;
2807 q = REG_QTY (REGNO (x));
2808 ent = &qty_table[q];
2809 first = ent->first_reg;
2810 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2811 : REGNO_REG_CLASS (first) == NO_REGS ? x
2812 : gen_rtx_REG (ent->mode, first));
2815 default:
2816 break;
2819 fmt = GET_RTX_FORMAT (code);
2820 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2822 register int j;
2824 if (fmt[i] == 'e')
2826 rtx new = canon_reg (XEXP (x, i), insn);
2827 int insn_code;
2829 /* If replacing pseudo with hard reg or vice versa, ensure the
2830 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2831 if (insn != 0 && new != 0
2832 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2833 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2834 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2835 || (insn_code = recog_memoized (insn)) < 0
2836 || insn_data[insn_code].n_dups > 0))
2837 validate_change (insn, &XEXP (x, i), new, 1);
2838 else
2839 XEXP (x, i) = new;
2841 else if (fmt[i] == 'E')
2842 for (j = 0; j < XVECLEN (x, i); j++)
2843 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2846 return x;
2849 /* LOC is a location within INSN that is an operand address (the contents of
2850 a MEM). Find the best equivalent address to use that is valid for this
2851 insn.
2853 On most CISC machines, complicated address modes are costly, and rtx_cost
2854 is a good approximation for that cost. However, most RISC machines have
2855 only a few (usually only one) memory reference formats. If an address is
2856 valid at all, it is often just as cheap as any other address. Hence, for
2857 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2858 costs of various addresses. For two addresses of equal cost, choose the one
2859 with the highest `rtx_cost' value as that has the potential of eliminating
2860 the most insns. For equal costs, we choose the first in the equivalence
2861 class. Note that we ignore the fact that pseudo registers are cheaper
2862 than hard registers here because we would also prefer the pseudo registers.
2865 static void
2866 find_best_addr (insn, loc, mode)
2867 rtx insn;
2868 rtx *loc;
2869 enum machine_mode mode;
2871 struct table_elt *elt;
2872 rtx addr = *loc;
2873 #ifdef ADDRESS_COST
2874 struct table_elt *p;
2875 int found_better = 1;
2876 #endif
2877 int save_do_not_record = do_not_record;
2878 int save_hash_arg_in_memory = hash_arg_in_memory;
2879 int addr_volatile;
2880 int regno;
2881 unsigned hash;
2883 /* Do not try to replace constant addresses or addresses of local and
2884 argument slots. These MEM expressions are made only once and inserted
2885 in many instructions, as well as being used to control symbol table
2886 output. It is not safe to clobber them.
2888 There are some uncommon cases where the address is already in a register
2889 for some reason, but we cannot take advantage of that because we have
2890 no easy way to unshare the MEM. In addition, looking up all stack
2891 addresses is costly. */
2892 if ((GET_CODE (addr) == PLUS
2893 && GET_CODE (XEXP (addr, 0)) == REG
2894 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2895 && (regno = REGNO (XEXP (addr, 0)),
2896 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2897 || regno == ARG_POINTER_REGNUM))
2898 || (GET_CODE (addr) == REG
2899 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2900 || regno == HARD_FRAME_POINTER_REGNUM
2901 || regno == ARG_POINTER_REGNUM))
2902 || GET_CODE (addr) == ADDRESSOF
2903 || CONSTANT_ADDRESS_P (addr))
2904 return;
2906 /* If this address is not simply a register, try to fold it. This will
2907 sometimes simplify the expression. Many simplifications
2908 will not be valid, but some, usually applying the associative rule, will
2909 be valid and produce better code. */
2910 if (GET_CODE (addr) != REG)
2912 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2913 int addr_folded_cost = address_cost (folded, mode);
2914 int addr_cost = address_cost (addr, mode);
2916 if ((addr_folded_cost < addr_cost
2917 || (addr_folded_cost == addr_cost
2918 /* ??? The rtx_cost comparison is left over from an older
2919 version of this code. It is probably no longer helpful. */
2920 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2921 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2922 && validate_change (insn, loc, folded, 0))
2923 addr = folded;
2926 /* If this address is not in the hash table, we can't look for equivalences
2927 of the whole address. Also, ignore if volatile. */
2929 do_not_record = 0;
2930 hash = HASH (addr, Pmode);
2931 addr_volatile = do_not_record;
2932 do_not_record = save_do_not_record;
2933 hash_arg_in_memory = save_hash_arg_in_memory;
2935 if (addr_volatile)
2936 return;
2938 elt = lookup (addr, hash, Pmode);
2940 #ifndef ADDRESS_COST
2941 if (elt)
2943 int our_cost = elt->cost;
2945 /* Find the lowest cost below ours that works. */
2946 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2947 if (elt->cost < our_cost
2948 && (GET_CODE (elt->exp) == REG
2949 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2950 && validate_change (insn, loc,
2951 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2952 return;
2954 #else
2956 if (elt)
2958 /* We need to find the best (under the criteria documented above) entry
2959 in the class that is valid. We use the `flag' field to indicate
2960 choices that were invalid and iterate until we can't find a better
2961 one that hasn't already been tried. */
2963 for (p = elt->first_same_value; p; p = p->next_same_value)
2964 p->flag = 0;
2966 while (found_better)
2968 int best_addr_cost = address_cost (*loc, mode);
2969 int best_rtx_cost = (elt->cost + 1) >> 1;
2970 int exp_cost;
2971 struct table_elt *best_elt = elt;
2973 found_better = 0;
2974 for (p = elt->first_same_value; p; p = p->next_same_value)
2975 if (! p->flag)
2977 if ((GET_CODE (p->exp) == REG
2978 || exp_equiv_p (p->exp, p->exp, 1, 0))
2979 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2980 || (exp_cost == best_addr_cost
2981 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2983 found_better = 1;
2984 best_addr_cost = exp_cost;
2985 best_rtx_cost = (p->cost + 1) >> 1;
2986 best_elt = p;
2990 if (found_better)
2992 if (validate_change (insn, loc,
2993 canon_reg (copy_rtx (best_elt->exp),
2994 NULL_RTX), 0))
2995 return;
2996 else
2997 best_elt->flag = 1;
3002 /* If the address is a binary operation with the first operand a register
3003 and the second a constant, do the same as above, but looking for
3004 equivalences of the register. Then try to simplify before checking for
3005 the best address to use. This catches a few cases: First is when we
3006 have REG+const and the register is another REG+const. We can often merge
3007 the constants and eliminate one insn and one register. It may also be
3008 that a machine has a cheap REG+REG+const. Finally, this improves the
3009 code on the Alpha for unaligned byte stores. */
3011 if (flag_expensive_optimizations
3012 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3013 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3014 && GET_CODE (XEXP (*loc, 0)) == REG
3015 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3017 rtx c = XEXP (*loc, 1);
3019 do_not_record = 0;
3020 hash = HASH (XEXP (*loc, 0), Pmode);
3021 do_not_record = save_do_not_record;
3022 hash_arg_in_memory = save_hash_arg_in_memory;
3024 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3025 if (elt == 0)
3026 return;
3028 /* We need to find the best (under the criteria documented above) entry
3029 in the class that is valid. We use the `flag' field to indicate
3030 choices that were invalid and iterate until we can't find a better
3031 one that hasn't already been tried. */
3033 for (p = elt->first_same_value; p; p = p->next_same_value)
3034 p->flag = 0;
3036 while (found_better)
3038 int best_addr_cost = address_cost (*loc, mode);
3039 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3040 struct table_elt *best_elt = elt;
3041 rtx best_rtx = *loc;
3042 int count;
3044 /* This is at worst case an O(n^2) algorithm, so limit our search
3045 to the first 32 elements on the list. This avoids trouble
3046 compiling code with very long basic blocks that can easily
3047 call simplify_gen_binary so many times that we run out of
3048 memory. */
3050 found_better = 0;
3051 for (p = elt->first_same_value, count = 0;
3052 p && count < 32;
3053 p = p->next_same_value, count++)
3054 if (! p->flag
3055 && (GET_CODE (p->exp) == REG
3056 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3058 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3059 p->exp, c);
3060 int new_cost;
3061 new_cost = address_cost (new, mode);
3063 if (new_cost < best_addr_cost
3064 || (new_cost == best_addr_cost
3065 && (COST (new) + 1) >> 1 > best_rtx_cost))
3067 found_better = 1;
3068 best_addr_cost = new_cost;
3069 best_rtx_cost = (COST (new) + 1) >> 1;
3070 best_elt = p;
3071 best_rtx = new;
3075 if (found_better)
3077 if (validate_change (insn, loc,
3078 canon_reg (copy_rtx (best_rtx),
3079 NULL_RTX), 0))
3080 return;
3081 else
3082 best_elt->flag = 1;
3086 #endif
3089 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3090 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3091 what values are being compared.
3093 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3094 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3095 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3096 compared to produce cc0.
3098 The return value is the comparison operator and is either the code of
3099 A or the code corresponding to the inverse of the comparison. */
3101 static enum rtx_code
3102 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3103 enum rtx_code code;
3104 rtx *parg1, *parg2;
3105 enum machine_mode *pmode1, *pmode2;
3107 rtx arg1, arg2;
3109 arg1 = *parg1, arg2 = *parg2;
3111 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3113 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3115 /* Set non-zero when we find something of interest. */
3116 rtx x = 0;
3117 int reverse_code = 0;
3118 struct table_elt *p = 0;
3120 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3121 On machines with CC0, this is the only case that can occur, since
3122 fold_rtx will return the COMPARE or item being compared with zero
3123 when given CC0. */
3125 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3126 x = arg1;
3128 /* If ARG1 is a comparison operator and CODE is testing for
3129 STORE_FLAG_VALUE, get the inner arguments. */
3131 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3133 if (code == NE
3134 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3135 && code == LT && STORE_FLAG_VALUE == -1)
3136 #ifdef FLOAT_STORE_FLAG_VALUE
3137 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3138 && (REAL_VALUE_NEGATIVE
3139 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3140 #endif
3142 x = arg1;
3143 else if (code == EQ
3144 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3145 && code == GE && STORE_FLAG_VALUE == -1)
3146 #ifdef FLOAT_STORE_FLAG_VALUE
3147 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3148 && (REAL_VALUE_NEGATIVE
3149 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3150 #endif
3152 x = arg1, reverse_code = 1;
3155 /* ??? We could also check for
3157 (ne (and (eq (...) (const_int 1))) (const_int 0))
3159 and related forms, but let's wait until we see them occurring. */
3161 if (x == 0)
3162 /* Look up ARG1 in the hash table and see if it has an equivalence
3163 that lets us see what is being compared. */
3164 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3165 GET_MODE (arg1));
3166 if (p)
3168 p = p->first_same_value;
3170 /* If what we compare is already known to be constant, that is as
3171 good as it gets.
3172 We need to break the loop in this case, because otherwise we
3173 can have an infinite loop when looking at a reg that is known
3174 to be a constant which is the same as a comparison of a reg
3175 against zero which appears later in the insn stream, which in
3176 turn is constant and the same as the comparison of the first reg
3177 against zero... */
3178 if (p->is_const)
3179 break;
3182 for (; p; p = p->next_same_value)
3184 enum machine_mode inner_mode = GET_MODE (p->exp);
3186 /* If the entry isn't valid, skip it. */
3187 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3188 continue;
3190 if (GET_CODE (p->exp) == COMPARE
3191 /* Another possibility is that this machine has a compare insn
3192 that includes the comparison code. In that case, ARG1 would
3193 be equivalent to a comparison operation that would set ARG1 to
3194 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3195 ORIG_CODE is the actual comparison being done; if it is an EQ,
3196 we must reverse ORIG_CODE. On machine with a negative value
3197 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3198 || ((code == NE
3199 || (code == LT
3200 && GET_MODE_CLASS (inner_mode) == MODE_INT
3201 && (GET_MODE_BITSIZE (inner_mode)
3202 <= HOST_BITS_PER_WIDE_INT)
3203 && (STORE_FLAG_VALUE
3204 & ((HOST_WIDE_INT) 1
3205 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3206 #ifdef FLOAT_STORE_FLAG_VALUE
3207 || (code == LT
3208 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3209 && (REAL_VALUE_NEGATIVE
3210 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3211 #endif
3213 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3215 x = p->exp;
3216 break;
3218 else if ((code == EQ
3219 || (code == GE
3220 && GET_MODE_CLASS (inner_mode) == MODE_INT
3221 && (GET_MODE_BITSIZE (inner_mode)
3222 <= HOST_BITS_PER_WIDE_INT)
3223 && (STORE_FLAG_VALUE
3224 & ((HOST_WIDE_INT) 1
3225 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3226 #ifdef FLOAT_STORE_FLAG_VALUE
3227 || (code == GE
3228 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3229 && (REAL_VALUE_NEGATIVE
3230 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3231 #endif
3233 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3235 reverse_code = 1;
3236 x = p->exp;
3237 break;
3240 /* If this is fp + constant, the equivalent is a better operand since
3241 it may let us predict the value of the comparison. */
3242 else if (NONZERO_BASE_PLUS_P (p->exp))
3244 arg1 = p->exp;
3245 continue;
3249 /* If we didn't find a useful equivalence for ARG1, we are done.
3250 Otherwise, set up for the next iteration. */
3251 if (x == 0)
3252 break;
3254 /* If we need to reverse the comparison, make sure that that is
3255 possible -- we can't necessarily infer the value of GE from LT
3256 with floating-point operands. */
3257 if (reverse_code)
3259 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3260 if (reversed == UNKNOWN)
3261 break;
3262 else code = reversed;
3264 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3265 code = GET_CODE (x);
3266 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3269 /* Return our results. Return the modes from before fold_rtx
3270 because fold_rtx might produce const_int, and then it's too late. */
3271 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3272 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3274 return code;
3277 /* If X is a nontrivial arithmetic operation on an argument
3278 for which a constant value can be determined, return
3279 the result of operating on that value, as a constant.
3280 Otherwise, return X, possibly with one or more operands
3281 modified by recursive calls to this function.
3283 If X is a register whose contents are known, we do NOT
3284 return those contents here. equiv_constant is called to
3285 perform that task.
3287 INSN is the insn that we may be modifying. If it is 0, make a copy
3288 of X before modifying it. */
3290 static rtx
3291 fold_rtx (x, insn)
3292 rtx x;
3293 rtx insn;
3295 register enum rtx_code code;
3296 register enum machine_mode mode;
3297 register const char *fmt;
3298 register int i;
3299 rtx new = 0;
3300 int copied = 0;
3301 int must_swap = 0;
3303 /* Folded equivalents of first two operands of X. */
3304 rtx folded_arg0;
3305 rtx folded_arg1;
3307 /* Constant equivalents of first three operands of X;
3308 0 when no such equivalent is known. */
3309 rtx const_arg0;
3310 rtx const_arg1;
3311 rtx const_arg2;
3313 /* The mode of the first operand of X. We need this for sign and zero
3314 extends. */
3315 enum machine_mode mode_arg0;
3317 if (x == 0)
3318 return x;
3320 mode = GET_MODE (x);
3321 code = GET_CODE (x);
3322 switch (code)
3324 case CONST:
3325 case CONST_INT:
3326 case CONST_DOUBLE:
3327 case SYMBOL_REF:
3328 case LABEL_REF:
3329 case REG:
3330 /* No use simplifying an EXPR_LIST
3331 since they are used only for lists of args
3332 in a function call's REG_EQUAL note. */
3333 case EXPR_LIST:
3334 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3335 want to (e.g.,) make (addressof (const_int 0)) just because
3336 the location is known to be zero. */
3337 case ADDRESSOF:
3338 return x;
3340 #ifdef HAVE_cc0
3341 case CC0:
3342 return prev_insn_cc0;
3343 #endif
3345 case PC:
3346 /* If the next insn is a CODE_LABEL followed by a jump table,
3347 PC's value is a LABEL_REF pointing to that label. That
3348 lets us fold switch statements on the Vax. */
3349 if (insn && GET_CODE (insn) == JUMP_INSN)
3351 rtx next = next_nonnote_insn (insn);
3353 if (next && GET_CODE (next) == CODE_LABEL
3354 && NEXT_INSN (next) != 0
3355 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3356 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3357 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3358 return gen_rtx_LABEL_REF (Pmode, next);
3360 break;
3362 case SUBREG:
3363 /* See if we previously assigned a constant value to this SUBREG. */
3364 if ((new = lookup_as_function (x, CONST_INT)) != 0
3365 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3366 return new;
3368 /* If this is a paradoxical SUBREG, we have no idea what value the
3369 extra bits would have. However, if the operand is equivalent
3370 to a SUBREG whose operand is the same as our mode, and all the
3371 modes are within a word, we can just use the inner operand
3372 because these SUBREGs just say how to treat the register.
3374 Similarly if we find an integer constant. */
3376 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3378 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3379 struct table_elt *elt;
3381 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3382 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3383 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3384 imode)) != 0)
3385 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3387 if (CONSTANT_P (elt->exp)
3388 && GET_MODE (elt->exp) == VOIDmode)
3389 return elt->exp;
3391 if (GET_CODE (elt->exp) == SUBREG
3392 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3393 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3394 return copy_rtx (SUBREG_REG (elt->exp));
3397 return x;
3400 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3401 We might be able to if the SUBREG is extracting a single word in an
3402 integral mode or extracting the low part. */
3404 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3405 const_arg0 = equiv_constant (folded_arg0);
3406 if (const_arg0)
3407 folded_arg0 = const_arg0;
3409 if (folded_arg0 != SUBREG_REG (x))
3411 new = 0;
3413 if (GET_MODE_CLASS (mode) == MODE_INT
3414 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3415 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3416 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3417 GET_MODE (SUBREG_REG (x)));
3418 if (new == 0 && subreg_lowpart_p (x))
3419 new = gen_lowpart_if_possible (mode, folded_arg0);
3420 if (new)
3421 return new;
3424 /* If this is a narrowing SUBREG and our operand is a REG, see if
3425 we can find an equivalence for REG that is an arithmetic operation
3426 in a wider mode where both operands are paradoxical SUBREGs
3427 from objects of our result mode. In that case, we couldn't report
3428 an equivalent value for that operation, since we don't know what the
3429 extra bits will be. But we can find an equivalence for this SUBREG
3430 by folding that operation is the narrow mode. This allows us to
3431 fold arithmetic in narrow modes when the machine only supports
3432 word-sized arithmetic.
3434 Also look for a case where we have a SUBREG whose operand is the
3435 same as our result. If both modes are smaller than a word, we
3436 are simply interpreting a register in different modes and we
3437 can use the inner value. */
3439 if (GET_CODE (folded_arg0) == REG
3440 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3441 && subreg_lowpart_p (x))
3443 struct table_elt *elt;
3445 /* We can use HASH here since we know that canon_hash won't be
3446 called. */
3447 elt = lookup (folded_arg0,
3448 HASH (folded_arg0, GET_MODE (folded_arg0)),
3449 GET_MODE (folded_arg0));
3451 if (elt)
3452 elt = elt->first_same_value;
3454 for (; elt; elt = elt->next_same_value)
3456 enum rtx_code eltcode = GET_CODE (elt->exp);
3458 /* Just check for unary and binary operations. */
3459 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3460 && GET_CODE (elt->exp) != SIGN_EXTEND
3461 && GET_CODE (elt->exp) != ZERO_EXTEND
3462 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3463 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3465 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3467 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3468 op0 = fold_rtx (op0, NULL_RTX);
3470 op0 = equiv_constant (op0);
3471 if (op0)
3472 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3473 op0, mode);
3475 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3476 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3477 && eltcode != DIV && eltcode != MOD
3478 && eltcode != UDIV && eltcode != UMOD
3479 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3480 && eltcode != ROTATE && eltcode != ROTATERT
3481 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3482 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3483 == mode))
3484 || CONSTANT_P (XEXP (elt->exp, 0)))
3485 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3486 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3487 == mode))
3488 || CONSTANT_P (XEXP (elt->exp, 1))))
3490 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3491 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3493 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3494 op0 = fold_rtx (op0, NULL_RTX);
3496 if (op0)
3497 op0 = equiv_constant (op0);
3499 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3500 op1 = fold_rtx (op1, NULL_RTX);
3502 if (op1)
3503 op1 = equiv_constant (op1);
3505 /* If we are looking for the low SImode part of
3506 (ashift:DI c (const_int 32)), it doesn't work
3507 to compute that in SImode, because a 32-bit shift
3508 in SImode is unpredictable. We know the value is 0. */
3509 if (op0 && op1
3510 && GET_CODE (elt->exp) == ASHIFT
3511 && GET_CODE (op1) == CONST_INT
3512 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3514 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3516 /* If the count fits in the inner mode's width,
3517 but exceeds the outer mode's width,
3518 the value will get truncated to 0
3519 by the subreg. */
3520 new = const0_rtx;
3521 else
3522 /* If the count exceeds even the inner mode's width,
3523 don't fold this expression. */
3524 new = 0;
3526 else if (op0 && op1)
3527 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3528 op0, op1);
3531 else if (GET_CODE (elt->exp) == SUBREG
3532 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3533 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3534 <= UNITS_PER_WORD)
3535 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3536 new = copy_rtx (SUBREG_REG (elt->exp));
3538 if (new)
3539 return new;
3543 return x;
3545 case NOT:
3546 case NEG:
3547 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3548 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3549 new = lookup_as_function (XEXP (x, 0), code);
3550 if (new)
3551 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3552 break;
3554 case MEM:
3555 /* If we are not actually processing an insn, don't try to find the
3556 best address. Not only don't we care, but we could modify the
3557 MEM in an invalid way since we have no insn to validate against. */
3558 if (insn != 0)
3559 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3562 /* Even if we don't fold in the insn itself,
3563 we can safely do so here, in hopes of getting a constant. */
3564 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3565 rtx base = 0;
3566 HOST_WIDE_INT offset = 0;
3568 if (GET_CODE (addr) == REG
3569 && REGNO_QTY_VALID_P (REGNO (addr)))
3571 int addr_q = REG_QTY (REGNO (addr));
3572 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3574 if (GET_MODE (addr) == addr_ent->mode
3575 && addr_ent->const_rtx != NULL_RTX)
3576 addr = addr_ent->const_rtx;
3579 /* If address is constant, split it into a base and integer offset. */
3580 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3581 base = addr;
3582 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3583 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3585 base = XEXP (XEXP (addr, 0), 0);
3586 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3588 else if (GET_CODE (addr) == LO_SUM
3589 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3590 base = XEXP (addr, 1);
3591 else if (GET_CODE (addr) == ADDRESSOF)
3592 return change_address (x, VOIDmode, addr);
3594 /* If this is a constant pool reference, we can fold it into its
3595 constant to allow better value tracking. */
3596 if (base && GET_CODE (base) == SYMBOL_REF
3597 && CONSTANT_POOL_ADDRESS_P (base))
3599 rtx constant = get_pool_constant (base);
3600 enum machine_mode const_mode = get_pool_mode (base);
3601 rtx new;
3603 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3604 constant_pool_entries_cost = COST (constant);
3606 /* If we are loading the full constant, we have an equivalence. */
3607 if (offset == 0 && mode == const_mode)
3608 return constant;
3610 /* If this actually isn't a constant (weird!), we can't do
3611 anything. Otherwise, handle the two most common cases:
3612 extracting a word from a multi-word constant, and extracting
3613 the low-order bits. Other cases don't seem common enough to
3614 worry about. */
3615 if (! CONSTANT_P (constant))
3616 return x;
3618 if (GET_MODE_CLASS (mode) == MODE_INT
3619 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3620 && offset % UNITS_PER_WORD == 0
3621 && (new = operand_subword (constant,
3622 offset / UNITS_PER_WORD,
3623 0, const_mode)) != 0)
3624 return new;
3626 if (((BYTES_BIG_ENDIAN
3627 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3628 || (! BYTES_BIG_ENDIAN && offset == 0))
3629 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3630 return new;
3633 /* If this is a reference to a label at a known position in a jump
3634 table, we also know its value. */
3635 if (base && GET_CODE (base) == LABEL_REF)
3637 rtx label = XEXP (base, 0);
3638 rtx table_insn = NEXT_INSN (label);
3640 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3641 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3643 rtx table = PATTERN (table_insn);
3645 if (offset >= 0
3646 && (offset / GET_MODE_SIZE (GET_MODE (table))
3647 < XVECLEN (table, 0)))
3648 return XVECEXP (table, 0,
3649 offset / GET_MODE_SIZE (GET_MODE (table)));
3651 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3652 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3654 rtx table = PATTERN (table_insn);
3656 if (offset >= 0
3657 && (offset / GET_MODE_SIZE (GET_MODE (table))
3658 < XVECLEN (table, 1)))
3660 offset /= GET_MODE_SIZE (GET_MODE (table));
3661 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3662 XEXP (table, 0));
3664 if (GET_MODE (table) != Pmode)
3665 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3667 /* Indicate this is a constant. This isn't a
3668 valid form of CONST, but it will only be used
3669 to fold the next insns and then discarded, so
3670 it should be safe.
3672 Note this expression must be explicitly discarded,
3673 by cse_insn, else it may end up in a REG_EQUAL note
3674 and "escape" to cause problems elsewhere. */
3675 return gen_rtx_CONST (GET_MODE (new), new);
3680 return x;
3683 #ifdef NO_FUNCTION_CSE
3684 case CALL:
3685 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3686 return x;
3687 break;
3688 #endif
3690 case ASM_OPERANDS:
3691 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3692 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3693 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3694 break;
3696 default:
3697 break;
3700 const_arg0 = 0;
3701 const_arg1 = 0;
3702 const_arg2 = 0;
3703 mode_arg0 = VOIDmode;
3705 /* Try folding our operands.
3706 Then see which ones have constant values known. */
3708 fmt = GET_RTX_FORMAT (code);
3709 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3710 if (fmt[i] == 'e')
3712 rtx arg = XEXP (x, i);
3713 rtx folded_arg = arg, const_arg = 0;
3714 enum machine_mode mode_arg = GET_MODE (arg);
3715 rtx cheap_arg, expensive_arg;
3716 rtx replacements[2];
3717 int j;
3719 /* Most arguments are cheap, so handle them specially. */
3720 switch (GET_CODE (arg))
3722 case REG:
3723 /* This is the same as calling equiv_constant; it is duplicated
3724 here for speed. */
3725 if (REGNO_QTY_VALID_P (REGNO (arg)))
3727 int arg_q = REG_QTY (REGNO (arg));
3728 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3730 if (arg_ent->const_rtx != NULL_RTX
3731 && GET_CODE (arg_ent->const_rtx) != REG
3732 && GET_CODE (arg_ent->const_rtx) != PLUS)
3733 const_arg
3734 = gen_lowpart_if_possible (GET_MODE (arg),
3735 arg_ent->const_rtx);
3737 break;
3739 case CONST:
3740 case CONST_INT:
3741 case SYMBOL_REF:
3742 case LABEL_REF:
3743 case CONST_DOUBLE:
3744 const_arg = arg;
3745 break;
3747 #ifdef HAVE_cc0
3748 case CC0:
3749 folded_arg = prev_insn_cc0;
3750 mode_arg = prev_insn_cc0_mode;
3751 const_arg = equiv_constant (folded_arg);
3752 break;
3753 #endif
3755 default:
3756 folded_arg = fold_rtx (arg, insn);
3757 const_arg = equiv_constant (folded_arg);
3760 /* For the first three operands, see if the operand
3761 is constant or equivalent to a constant. */
3762 switch (i)
3764 case 0:
3765 folded_arg0 = folded_arg;
3766 const_arg0 = const_arg;
3767 mode_arg0 = mode_arg;
3768 break;
3769 case 1:
3770 folded_arg1 = folded_arg;
3771 const_arg1 = const_arg;
3772 break;
3773 case 2:
3774 const_arg2 = const_arg;
3775 break;
3778 /* Pick the least expensive of the folded argument and an
3779 equivalent constant argument. */
3780 if (const_arg == 0 || const_arg == folded_arg
3781 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3782 cheap_arg = folded_arg, expensive_arg = const_arg;
3783 else
3784 cheap_arg = const_arg, expensive_arg = folded_arg;
3786 /* Try to replace the operand with the cheapest of the two
3787 possibilities. If it doesn't work and this is either of the first
3788 two operands of a commutative operation, try swapping them.
3789 If THAT fails, try the more expensive, provided it is cheaper
3790 than what is already there. */
3792 if (cheap_arg == XEXP (x, i))
3793 continue;
3795 if (insn == 0 && ! copied)
3797 x = copy_rtx (x);
3798 copied = 1;
3801 /* Order the replacements from cheapest to most expensive. */
3802 replacements[0] = cheap_arg;
3803 replacements[1] = expensive_arg;
3805 for (j = 0; j < 2 && replacements[j]; j++)
3807 int old_cost = COST_IN (XEXP (x, i), code);
3808 int new_cost = COST_IN (replacements[j], code);
3810 /* Stop if what existed before was cheaper. Prefer constants
3811 in the case of a tie. */
3812 if (new_cost > old_cost
3813 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3814 break;
3816 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3817 break;
3819 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3820 || code == LTGT || code == UNEQ || code == ORDERED
3821 || code == UNORDERED)
3823 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3824 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3826 if (apply_change_group ())
3828 /* Swap them back to be invalid so that this loop can
3829 continue and flag them to be swapped back later. */
3830 rtx tem;
3832 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3833 XEXP (x, 1) = tem;
3834 must_swap = 1;
3835 break;
3841 else
3843 if (fmt[i] == 'E')
3844 /* Don't try to fold inside of a vector of expressions.
3845 Doing nothing is harmless. */
3849 /* If a commutative operation, place a constant integer as the second
3850 operand unless the first operand is also a constant integer. Otherwise,
3851 place any constant second unless the first operand is also a constant. */
3853 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3854 || code == LTGT || code == UNEQ || code == ORDERED
3855 || code == UNORDERED)
3857 if (must_swap || (const_arg0
3858 && (const_arg1 == 0
3859 || (GET_CODE (const_arg0) == CONST_INT
3860 && GET_CODE (const_arg1) != CONST_INT))))
3862 register rtx tem = XEXP (x, 0);
3864 if (insn == 0 && ! copied)
3866 x = copy_rtx (x);
3867 copied = 1;
3870 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3871 validate_change (insn, &XEXP (x, 1), tem, 1);
3872 if (apply_change_group ())
3874 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3875 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3880 /* If X is an arithmetic operation, see if we can simplify it. */
3882 switch (GET_RTX_CLASS (code))
3884 case '1':
3886 int is_const = 0;
3888 /* We can't simplify extension ops unless we know the
3889 original mode. */
3890 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3891 && mode_arg0 == VOIDmode)
3892 break;
3894 /* If we had a CONST, strip it off and put it back later if we
3895 fold. */
3896 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3897 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3899 new = simplify_unary_operation (code, mode,
3900 const_arg0 ? const_arg0 : folded_arg0,
3901 mode_arg0);
3902 if (new != 0 && is_const)
3903 new = gen_rtx_CONST (mode, new);
3905 break;
3907 case '<':
3908 /* See what items are actually being compared and set FOLDED_ARG[01]
3909 to those values and CODE to the actual comparison code. If any are
3910 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3911 do anything if both operands are already known to be constant. */
3913 if (const_arg0 == 0 || const_arg1 == 0)
3915 struct table_elt *p0, *p1;
3916 rtx true = const_true_rtx, false = const0_rtx;
3917 enum machine_mode mode_arg1;
3919 #ifdef FLOAT_STORE_FLAG_VALUE
3920 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3922 true = (CONST_DOUBLE_FROM_REAL_VALUE
3923 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3924 false = CONST0_RTX (mode);
3926 #endif
3928 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3929 &mode_arg0, &mode_arg1);
3930 const_arg0 = equiv_constant (folded_arg0);
3931 const_arg1 = equiv_constant (folded_arg1);
3933 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3934 what kinds of things are being compared, so we can't do
3935 anything with this comparison. */
3937 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3938 break;
3940 /* If we do not now have two constants being compared, see
3941 if we can nevertheless deduce some things about the
3942 comparison. */
3943 if (const_arg0 == 0 || const_arg1 == 0)
3945 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3946 non-explicit constant? These aren't zero, but we
3947 don't know their sign. */
3948 if (const_arg1 == const0_rtx
3949 && (NONZERO_BASE_PLUS_P (folded_arg0)
3950 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3951 come out as 0. */
3952 || GET_CODE (folded_arg0) == SYMBOL_REF
3953 #endif
3954 || GET_CODE (folded_arg0) == LABEL_REF
3955 || GET_CODE (folded_arg0) == CONST))
3957 if (code == EQ)
3958 return false;
3959 else if (code == NE)
3960 return true;
3963 /* See if the two operands are the same. */
3965 if (folded_arg0 == folded_arg1
3966 || (GET_CODE (folded_arg0) == REG
3967 && GET_CODE (folded_arg1) == REG
3968 && (REG_QTY (REGNO (folded_arg0))
3969 == REG_QTY (REGNO (folded_arg1))))
3970 || ((p0 = lookup (folded_arg0,
3971 (safe_hash (folded_arg0, mode_arg0)
3972 & HASH_MASK), mode_arg0))
3973 && (p1 = lookup (folded_arg1,
3974 (safe_hash (folded_arg1, mode_arg0)
3975 & HASH_MASK), mode_arg0))
3976 && p0->first_same_value == p1->first_same_value))
3978 /* Sadly two equal NaNs are not equivalent. */
3979 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3980 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3981 return ((code == EQ || code == LE || code == GE
3982 || code == LEU || code == GEU || code == UNEQ
3983 || code == UNLE || code == UNGE || code == ORDERED)
3984 ? true : false);
3985 /* Take care for the FP compares we can resolve. */
3986 if (code == UNEQ || code == UNLE || code == UNGE)
3987 return true;
3988 if (code == LTGT || code == LT || code == GT)
3989 return false;
3992 /* If FOLDED_ARG0 is a register, see if the comparison we are
3993 doing now is either the same as we did before or the reverse
3994 (we only check the reverse if not floating-point). */
3995 else if (GET_CODE (folded_arg0) == REG)
3997 int qty = REG_QTY (REGNO (folded_arg0));
3999 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
4001 struct qty_table_elem *ent = &qty_table[qty];
4003 if ((comparison_dominates_p (ent->comparison_code, code)
4004 || (! FLOAT_MODE_P (mode_arg0)
4005 && comparison_dominates_p (ent->comparison_code,
4006 reverse_condition (code))))
4007 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4008 || (const_arg1
4009 && rtx_equal_p (ent->comparison_const,
4010 const_arg1))
4011 || (GET_CODE (folded_arg1) == REG
4012 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4013 return (comparison_dominates_p (ent->comparison_code, code)
4014 ? true : false);
4020 /* If we are comparing against zero, see if the first operand is
4021 equivalent to an IOR with a constant. If so, we may be able to
4022 determine the result of this comparison. */
4024 if (const_arg1 == const0_rtx)
4026 rtx y = lookup_as_function (folded_arg0, IOR);
4027 rtx inner_const;
4029 if (y != 0
4030 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4031 && GET_CODE (inner_const) == CONST_INT
4032 && INTVAL (inner_const) != 0)
4034 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4035 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4036 && (INTVAL (inner_const)
4037 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4038 rtx true = const_true_rtx, false = const0_rtx;
4040 #ifdef FLOAT_STORE_FLAG_VALUE
4041 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4043 true = (CONST_DOUBLE_FROM_REAL_VALUE
4044 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4045 false = CONST0_RTX (mode);
4047 #endif
4049 switch (code)
4051 case EQ:
4052 return false;
4053 case NE:
4054 return true;
4055 case LT: case LE:
4056 if (has_sign)
4057 return true;
4058 break;
4059 case GT: case GE:
4060 if (has_sign)
4061 return false;
4062 break;
4063 default:
4064 break;
4069 new = simplify_relational_operation (code,
4070 (mode_arg0 != VOIDmode
4071 ? mode_arg0
4072 : (GET_MODE (const_arg0
4073 ? const_arg0
4074 : folded_arg0)
4075 != VOIDmode)
4076 ? GET_MODE (const_arg0
4077 ? const_arg0
4078 : folded_arg0)
4079 : GET_MODE (const_arg1
4080 ? const_arg1
4081 : folded_arg1)),
4082 const_arg0 ? const_arg0 : folded_arg0,
4083 const_arg1 ? const_arg1 : folded_arg1);
4084 #ifdef FLOAT_STORE_FLAG_VALUE
4085 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4087 if (new == const0_rtx)
4088 new = CONST0_RTX (mode);
4089 else
4090 new = (CONST_DOUBLE_FROM_REAL_VALUE
4091 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4093 #endif
4094 break;
4096 case '2':
4097 case 'c':
4098 switch (code)
4100 case PLUS:
4101 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4102 with that LABEL_REF as its second operand. If so, the result is
4103 the first operand of that MINUS. This handles switches with an
4104 ADDR_DIFF_VEC table. */
4105 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4107 rtx y
4108 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4109 : lookup_as_function (folded_arg0, MINUS);
4111 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4112 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4113 return XEXP (y, 0);
4115 /* Now try for a CONST of a MINUS like the above. */
4116 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4117 : lookup_as_function (folded_arg0, CONST))) != 0
4118 && GET_CODE (XEXP (y, 0)) == MINUS
4119 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4120 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4121 return XEXP (XEXP (y, 0), 0);
4124 /* Likewise if the operands are in the other order. */
4125 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4127 rtx y
4128 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4129 : lookup_as_function (folded_arg1, MINUS);
4131 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4132 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4133 return XEXP (y, 0);
4135 /* Now try for a CONST of a MINUS like the above. */
4136 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4137 : lookup_as_function (folded_arg1, CONST))) != 0
4138 && GET_CODE (XEXP (y, 0)) == MINUS
4139 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4140 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4141 return XEXP (XEXP (y, 0), 0);
4144 /* If second operand is a register equivalent to a negative
4145 CONST_INT, see if we can find a register equivalent to the
4146 positive constant. Make a MINUS if so. Don't do this for
4147 a non-negative constant since we might then alternate between
4148 chosing positive and negative constants. Having the positive
4149 constant previously-used is the more common case. Be sure
4150 the resulting constant is non-negative; if const_arg1 were
4151 the smallest negative number this would overflow: depending
4152 on the mode, this would either just be the same value (and
4153 hence not save anything) or be incorrect. */
4154 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4155 && INTVAL (const_arg1) < 0
4156 /* This used to test
4158 -INTVAL (const_arg1) >= 0
4160 But The Sun V5.0 compilers mis-compiled that test. So
4161 instead we test for the problematic value in a more direct
4162 manner and hope the Sun compilers get it correct. */
4163 && INTVAL (const_arg1) !=
4164 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4165 && GET_CODE (folded_arg1) == REG)
4167 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4168 struct table_elt *p
4169 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4170 mode);
4172 if (p)
4173 for (p = p->first_same_value; p; p = p->next_same_value)
4174 if (GET_CODE (p->exp) == REG)
4175 return simplify_gen_binary (MINUS, mode, folded_arg0,
4176 canon_reg (p->exp, NULL_RTX));
4178 goto from_plus;
4180 case MINUS:
4181 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4182 If so, produce (PLUS Z C2-C). */
4183 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4185 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4186 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4187 return fold_rtx (plus_constant (copy_rtx (y),
4188 -INTVAL (const_arg1)),
4189 NULL_RTX);
4192 /* Fall through. */
4194 from_plus:
4195 case SMIN: case SMAX: case UMIN: case UMAX:
4196 case IOR: case AND: case XOR:
4197 case MULT: case DIV: case UDIV:
4198 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4199 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4200 is known to be of similar form, we may be able to replace the
4201 operation with a combined operation. This may eliminate the
4202 intermediate operation if every use is simplified in this way.
4203 Note that the similar optimization done by combine.c only works
4204 if the intermediate operation's result has only one reference. */
4206 if (GET_CODE (folded_arg0) == REG
4207 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4209 int is_shift
4210 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4211 rtx y = lookup_as_function (folded_arg0, code);
4212 rtx inner_const;
4213 enum rtx_code associate_code;
4214 rtx new_const;
4216 if (y == 0
4217 || 0 == (inner_const
4218 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4219 || GET_CODE (inner_const) != CONST_INT
4220 /* If we have compiled a statement like
4221 "if (x == (x & mask1))", and now are looking at
4222 "x & mask2", we will have a case where the first operand
4223 of Y is the same as our first operand. Unless we detect
4224 this case, an infinite loop will result. */
4225 || XEXP (y, 0) == folded_arg0)
4226 break;
4228 /* Don't associate these operations if they are a PLUS with the
4229 same constant and it is a power of two. These might be doable
4230 with a pre- or post-increment. Similarly for two subtracts of
4231 identical powers of two with post decrement. */
4233 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4234 && ((HAVE_PRE_INCREMENT
4235 && exact_log2 (INTVAL (const_arg1)) >= 0)
4236 || (HAVE_POST_INCREMENT
4237 && exact_log2 (INTVAL (const_arg1)) >= 0)
4238 || (HAVE_PRE_DECREMENT
4239 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4240 || (HAVE_POST_DECREMENT
4241 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4242 break;
4244 /* Compute the code used to compose the constants. For example,
4245 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4247 associate_code
4248 = (code == MULT || code == DIV || code == UDIV ? MULT
4249 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4251 new_const = simplify_binary_operation (associate_code, mode,
4252 const_arg1, inner_const);
4254 if (new_const == 0)
4255 break;
4257 /* If we are associating shift operations, don't let this
4258 produce a shift of the size of the object or larger.
4259 This could occur when we follow a sign-extend by a right
4260 shift on a machine that does a sign-extend as a pair
4261 of shifts. */
4263 if (is_shift && GET_CODE (new_const) == CONST_INT
4264 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4266 /* As an exception, we can turn an ASHIFTRT of this
4267 form into a shift of the number of bits - 1. */
4268 if (code == ASHIFTRT)
4269 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4270 else
4271 break;
4274 y = copy_rtx (XEXP (y, 0));
4276 /* If Y contains our first operand (the most common way this
4277 can happen is if Y is a MEM), we would do into an infinite
4278 loop if we tried to fold it. So don't in that case. */
4280 if (! reg_mentioned_p (folded_arg0, y))
4281 y = fold_rtx (y, insn);
4283 return simplify_gen_binary (code, mode, y, new_const);
4285 break;
4287 default:
4288 break;
4291 new = simplify_binary_operation (code, mode,
4292 const_arg0 ? const_arg0 : folded_arg0,
4293 const_arg1 ? const_arg1 : folded_arg1);
4294 break;
4296 case 'o':
4297 /* (lo_sum (high X) X) is simply X. */
4298 if (code == LO_SUM && const_arg0 != 0
4299 && GET_CODE (const_arg0) == HIGH
4300 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4301 return const_arg1;
4302 break;
4304 case '3':
4305 case 'b':
4306 new = simplify_ternary_operation (code, mode, mode_arg0,
4307 const_arg0 ? const_arg0 : folded_arg0,
4308 const_arg1 ? const_arg1 : folded_arg1,
4309 const_arg2 ? const_arg2 : XEXP (x, 2));
4310 break;
4312 case 'x':
4313 /* Always eliminate CONSTANT_P_RTX at this stage. */
4314 if (code == CONSTANT_P_RTX)
4315 return (const_arg0 ? const1_rtx : const0_rtx);
4316 break;
4319 return new ? new : x;
4322 /* Return a constant value currently equivalent to X.
4323 Return 0 if we don't know one. */
4325 static rtx
4326 equiv_constant (x)
4327 rtx x;
4329 if (GET_CODE (x) == REG
4330 && REGNO_QTY_VALID_P (REGNO (x)))
4332 int x_q = REG_QTY (REGNO (x));
4333 struct qty_table_elem *x_ent = &qty_table[x_q];
4335 if (x_ent->const_rtx)
4336 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4339 if (x == 0 || CONSTANT_P (x))
4340 return x;
4342 /* If X is a MEM, try to fold it outside the context of any insn to see if
4343 it might be equivalent to a constant. That handles the case where it
4344 is a constant-pool reference. Then try to look it up in the hash table
4345 in case it is something whose value we have seen before. */
4347 if (GET_CODE (x) == MEM)
4349 struct table_elt *elt;
4351 x = fold_rtx (x, NULL_RTX);
4352 if (CONSTANT_P (x))
4353 return x;
4355 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4356 if (elt == 0)
4357 return 0;
4359 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4360 if (elt->is_const && CONSTANT_P (elt->exp))
4361 return elt->exp;
4364 return 0;
4367 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4368 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4369 least-significant part of X.
4370 MODE specifies how big a part of X to return.
4372 If the requested operation cannot be done, 0 is returned.
4374 This is similar to gen_lowpart in emit-rtl.c. */
4377 gen_lowpart_if_possible (mode, x)
4378 enum machine_mode mode;
4379 register rtx x;
4381 rtx result = gen_lowpart_common (mode, x);
4383 if (result)
4384 return result;
4385 else if (GET_CODE (x) == MEM)
4387 /* This is the only other case we handle. */
4388 register int offset = 0;
4389 rtx new;
4391 if (WORDS_BIG_ENDIAN)
4392 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4393 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4394 if (BYTES_BIG_ENDIAN)
4395 /* Adjust the address so that the address-after-the-data is
4396 unchanged. */
4397 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4398 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4399 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4400 if (! memory_address_p (mode, XEXP (new, 0)))
4401 return 0;
4402 MEM_COPY_ATTRIBUTES (new, x);
4403 return new;
4405 else
4406 return 0;
4409 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4410 branch. It will be zero if not.
4412 In certain cases, this can cause us to add an equivalence. For example,
4413 if we are following the taken case of
4414 if (i == 2)
4415 we can add the fact that `i' and '2' are now equivalent.
4417 In any case, we can record that this comparison was passed. If the same
4418 comparison is seen later, we will know its value. */
4420 static void
4421 record_jump_equiv (insn, taken)
4422 rtx insn;
4423 int taken;
4425 int cond_known_true;
4426 rtx op0, op1;
4427 rtx set;
4428 enum machine_mode mode, mode0, mode1;
4429 int reversed_nonequality = 0;
4430 enum rtx_code code;
4432 /* Ensure this is the right kind of insn. */
4433 if (! any_condjump_p (insn))
4434 return;
4435 set = pc_set (insn);
4437 /* See if this jump condition is known true or false. */
4438 if (taken)
4439 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4440 else
4441 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4443 /* Get the type of comparison being done and the operands being compared.
4444 If we had to reverse a non-equality condition, record that fact so we
4445 know that it isn't valid for floating-point. */
4446 code = GET_CODE (XEXP (SET_SRC (set), 0));
4447 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4448 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4450 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4451 if (! cond_known_true)
4453 code = reversed_comparison_code_parts (code, op0, op1, insn);
4455 /* Don't remember if we can't find the inverse. */
4456 if (code == UNKNOWN)
4457 return;
4460 /* The mode is the mode of the non-constant. */
4461 mode = mode0;
4462 if (mode1 != VOIDmode)
4463 mode = mode1;
4465 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4468 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4469 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4470 Make any useful entries we can with that information. Called from
4471 above function and called recursively. */
4473 static void
4474 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4475 enum rtx_code code;
4476 enum machine_mode mode;
4477 rtx op0, op1;
4478 int reversed_nonequality;
4480 unsigned op0_hash, op1_hash;
4481 int op0_in_memory, op1_in_memory;
4482 struct table_elt *op0_elt, *op1_elt;
4484 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4485 we know that they are also equal in the smaller mode (this is also
4486 true for all smaller modes whether or not there is a SUBREG, but
4487 is not worth testing for with no SUBREG). */
4489 /* Note that GET_MODE (op0) may not equal MODE. */
4490 if (code == EQ && GET_CODE (op0) == SUBREG
4491 && (GET_MODE_SIZE (GET_MODE (op0))
4492 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4494 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4495 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4497 record_jump_cond (code, mode, SUBREG_REG (op0),
4498 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4499 reversed_nonequality);
4502 if (code == EQ && GET_CODE (op1) == SUBREG
4503 && (GET_MODE_SIZE (GET_MODE (op1))
4504 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4506 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4507 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4509 record_jump_cond (code, mode, SUBREG_REG (op1),
4510 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4511 reversed_nonequality);
4514 /* Similarly, if this is an NE comparison, and either is a SUBREG
4515 making a smaller mode, we know the whole thing is also NE. */
4517 /* Note that GET_MODE (op0) may not equal MODE;
4518 if we test MODE instead, we can get an infinite recursion
4519 alternating between two modes each wider than MODE. */
4521 if (code == NE && GET_CODE (op0) == SUBREG
4522 && subreg_lowpart_p (op0)
4523 && (GET_MODE_SIZE (GET_MODE (op0))
4524 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4526 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4527 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4529 record_jump_cond (code, mode, SUBREG_REG (op0),
4530 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4531 reversed_nonequality);
4534 if (code == NE && GET_CODE (op1) == SUBREG
4535 && subreg_lowpart_p (op1)
4536 && (GET_MODE_SIZE (GET_MODE (op1))
4537 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4539 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4540 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4542 record_jump_cond (code, mode, SUBREG_REG (op1),
4543 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4544 reversed_nonequality);
4547 /* Hash both operands. */
4549 do_not_record = 0;
4550 hash_arg_in_memory = 0;
4551 op0_hash = HASH (op0, mode);
4552 op0_in_memory = hash_arg_in_memory;
4554 if (do_not_record)
4555 return;
4557 do_not_record = 0;
4558 hash_arg_in_memory = 0;
4559 op1_hash = HASH (op1, mode);
4560 op1_in_memory = hash_arg_in_memory;
4562 if (do_not_record)
4563 return;
4565 /* Look up both operands. */
4566 op0_elt = lookup (op0, op0_hash, mode);
4567 op1_elt = lookup (op1, op1_hash, mode);
4569 /* If both operands are already equivalent or if they are not in the
4570 table but are identical, do nothing. */
4571 if ((op0_elt != 0 && op1_elt != 0
4572 && op0_elt->first_same_value == op1_elt->first_same_value)
4573 || op0 == op1 || rtx_equal_p (op0, op1))
4574 return;
4576 /* If we aren't setting two things equal all we can do is save this
4577 comparison. Similarly if this is floating-point. In the latter
4578 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4579 If we record the equality, we might inadvertently delete code
4580 whose intent was to change -0 to +0. */
4582 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4584 struct qty_table_elem *ent;
4585 int qty;
4587 /* If we reversed a floating-point comparison, if OP0 is not a
4588 register, or if OP1 is neither a register or constant, we can't
4589 do anything. */
4591 if (GET_CODE (op1) != REG)
4592 op1 = equiv_constant (op1);
4594 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4595 || GET_CODE (op0) != REG || op1 == 0)
4596 return;
4598 /* Put OP0 in the hash table if it isn't already. This gives it a
4599 new quantity number. */
4600 if (op0_elt == 0)
4602 if (insert_regs (op0, NULL_PTR, 0))
4604 rehash_using_reg (op0);
4605 op0_hash = HASH (op0, mode);
4607 /* If OP0 is contained in OP1, this changes its hash code
4608 as well. Faster to rehash than to check, except
4609 for the simple case of a constant. */
4610 if (! CONSTANT_P (op1))
4611 op1_hash = HASH (op1,mode);
4614 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4615 op0_elt->in_memory = op0_in_memory;
4618 qty = REG_QTY (REGNO (op0));
4619 ent = &qty_table[qty];
4621 ent->comparison_code = code;
4622 if (GET_CODE (op1) == REG)
4624 /* Look it up again--in case op0 and op1 are the same. */
4625 op1_elt = lookup (op1, op1_hash, mode);
4627 /* Put OP1 in the hash table so it gets a new quantity number. */
4628 if (op1_elt == 0)
4630 if (insert_regs (op1, NULL_PTR, 0))
4632 rehash_using_reg (op1);
4633 op1_hash = HASH (op1, mode);
4636 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4637 op1_elt->in_memory = op1_in_memory;
4640 ent->comparison_const = NULL_RTX;
4641 ent->comparison_qty = REG_QTY (REGNO (op1));
4643 else
4645 ent->comparison_const = op1;
4646 ent->comparison_qty = -1;
4649 return;
4652 /* If either side is still missing an equivalence, make it now,
4653 then merge the equivalences. */
4655 if (op0_elt == 0)
4657 if (insert_regs (op0, NULL_PTR, 0))
4659 rehash_using_reg (op0);
4660 op0_hash = HASH (op0, mode);
4663 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4664 op0_elt->in_memory = op0_in_memory;
4667 if (op1_elt == 0)
4669 if (insert_regs (op1, NULL_PTR, 0))
4671 rehash_using_reg (op1);
4672 op1_hash = HASH (op1, mode);
4675 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4676 op1_elt->in_memory = op1_in_memory;
4679 merge_equiv_classes (op0_elt, op1_elt);
4680 last_jump_equiv_class = op0_elt;
4683 /* CSE processing for one instruction.
4684 First simplify sources and addresses of all assignments
4685 in the instruction, using previously-computed equivalents values.
4686 Then install the new sources and destinations in the table
4687 of available values.
4689 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4690 the insn. It means that INSN is inside libcall block. In this
4691 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4693 /* Data on one SET contained in the instruction. */
4695 struct set
4697 /* The SET rtx itself. */
4698 rtx rtl;
4699 /* The SET_SRC of the rtx (the original value, if it is changing). */
4700 rtx src;
4701 /* The hash-table element for the SET_SRC of the SET. */
4702 struct table_elt *src_elt;
4703 /* Hash value for the SET_SRC. */
4704 unsigned src_hash;
4705 /* Hash value for the SET_DEST. */
4706 unsigned dest_hash;
4707 /* The SET_DEST, with SUBREG, etc., stripped. */
4708 rtx inner_dest;
4709 /* Nonzero if the SET_SRC is in memory. */
4710 char src_in_memory;
4711 /* Nonzero if the SET_SRC contains something
4712 whose value cannot be predicted and understood. */
4713 char src_volatile;
4714 /* Original machine mode, in case it becomes a CONST_INT. */
4715 enum machine_mode mode;
4716 /* A constant equivalent for SET_SRC, if any. */
4717 rtx src_const;
4718 /* Original SET_SRC value used for libcall notes. */
4719 rtx orig_src;
4720 /* Hash value of constant equivalent for SET_SRC. */
4721 unsigned src_const_hash;
4722 /* Table entry for constant equivalent for SET_SRC, if any. */
4723 struct table_elt *src_const_elt;
4726 static void
4727 cse_insn (insn, libcall_insn)
4728 rtx insn;
4729 rtx libcall_insn;
4731 register rtx x = PATTERN (insn);
4732 register int i;
4733 rtx tem;
4734 register int n_sets = 0;
4736 #ifdef HAVE_cc0
4737 /* Records what this insn does to set CC0. */
4738 rtx this_insn_cc0 = 0;
4739 enum machine_mode this_insn_cc0_mode = VOIDmode;
4740 #endif
4742 rtx src_eqv = 0;
4743 struct table_elt *src_eqv_elt = 0;
4744 int src_eqv_volatile = 0;
4745 int src_eqv_in_memory = 0;
4746 unsigned src_eqv_hash = 0;
4748 struct set *sets = (struct set *) NULL_PTR;
4750 this_insn = insn;
4752 /* Find all the SETs and CLOBBERs in this instruction.
4753 Record all the SETs in the array `set' and count them.
4754 Also determine whether there is a CLOBBER that invalidates
4755 all memory references, or all references at varying addresses. */
4757 if (GET_CODE (insn) == CALL_INSN)
4759 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4761 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4762 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4763 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4767 if (GET_CODE (x) == SET)
4769 sets = (struct set *) alloca (sizeof (struct set));
4770 sets[0].rtl = x;
4772 /* Ignore SETs that are unconditional jumps.
4773 They never need cse processing, so this does not hurt.
4774 The reason is not efficiency but rather
4775 so that we can test at the end for instructions
4776 that have been simplified to unconditional jumps
4777 and not be misled by unchanged instructions
4778 that were unconditional jumps to begin with. */
4779 if (SET_DEST (x) == pc_rtx
4780 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4783 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4784 The hard function value register is used only once, to copy to
4785 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4786 Ensure we invalidate the destination register. On the 80386 no
4787 other code would invalidate it since it is a fixed_reg.
4788 We need not check the return of apply_change_group; see canon_reg. */
4790 else if (GET_CODE (SET_SRC (x)) == CALL)
4792 canon_reg (SET_SRC (x), insn);
4793 apply_change_group ();
4794 fold_rtx (SET_SRC (x), insn);
4795 invalidate (SET_DEST (x), VOIDmode);
4797 else
4798 n_sets = 1;
4800 else if (GET_CODE (x) == PARALLEL)
4802 register int lim = XVECLEN (x, 0);
4804 sets = (struct set *) alloca (lim * sizeof (struct set));
4806 /* Find all regs explicitly clobbered in this insn,
4807 and ensure they are not replaced with any other regs
4808 elsewhere in this insn.
4809 When a reg that is clobbered is also used for input,
4810 we should presume that that is for a reason,
4811 and we should not substitute some other register
4812 which is not supposed to be clobbered.
4813 Therefore, this loop cannot be merged into the one below
4814 because a CALL may precede a CLOBBER and refer to the
4815 value clobbered. We must not let a canonicalization do
4816 anything in that case. */
4817 for (i = 0; i < lim; i++)
4819 register rtx y = XVECEXP (x, 0, i);
4820 if (GET_CODE (y) == CLOBBER)
4822 rtx clobbered = XEXP (y, 0);
4824 if (GET_CODE (clobbered) == REG
4825 || GET_CODE (clobbered) == SUBREG)
4826 invalidate (clobbered, VOIDmode);
4827 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4828 || GET_CODE (clobbered) == ZERO_EXTRACT)
4829 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4833 for (i = 0; i < lim; i++)
4835 register rtx y = XVECEXP (x, 0, i);
4836 if (GET_CODE (y) == SET)
4838 /* As above, we ignore unconditional jumps and call-insns and
4839 ignore the result of apply_change_group. */
4840 if (GET_CODE (SET_SRC (y)) == CALL)
4842 canon_reg (SET_SRC (y), insn);
4843 apply_change_group ();
4844 fold_rtx (SET_SRC (y), insn);
4845 invalidate (SET_DEST (y), VOIDmode);
4847 else if (SET_DEST (y) == pc_rtx
4848 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4850 else
4851 sets[n_sets++].rtl = y;
4853 else if (GET_CODE (y) == CLOBBER)
4855 /* If we clobber memory, canon the address.
4856 This does nothing when a register is clobbered
4857 because we have already invalidated the reg. */
4858 if (GET_CODE (XEXP (y, 0)) == MEM)
4859 canon_reg (XEXP (y, 0), NULL_RTX);
4861 else if (GET_CODE (y) == USE
4862 && ! (GET_CODE (XEXP (y, 0)) == REG
4863 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4864 canon_reg (y, NULL_RTX);
4865 else if (GET_CODE (y) == CALL)
4867 /* The result of apply_change_group can be ignored; see
4868 canon_reg. */
4869 canon_reg (y, insn);
4870 apply_change_group ();
4871 fold_rtx (y, insn);
4875 else if (GET_CODE (x) == CLOBBER)
4877 if (GET_CODE (XEXP (x, 0)) == MEM)
4878 canon_reg (XEXP (x, 0), NULL_RTX);
4881 /* Canonicalize a USE of a pseudo register or memory location. */
4882 else if (GET_CODE (x) == USE
4883 && ! (GET_CODE (XEXP (x, 0)) == REG
4884 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4885 canon_reg (XEXP (x, 0), NULL_RTX);
4886 else if (GET_CODE (x) == CALL)
4888 /* The result of apply_change_group can be ignored; see canon_reg. */
4889 canon_reg (x, insn);
4890 apply_change_group ();
4891 fold_rtx (x, insn);
4894 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4895 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4896 is handled specially for this case, and if it isn't set, then there will
4897 be no equivalence for the destination. */
4898 if (n_sets == 1 && REG_NOTES (insn) != 0
4899 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4900 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4901 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4902 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4904 /* Canonicalize sources and addresses of destinations.
4905 We do this in a separate pass to avoid problems when a MATCH_DUP is
4906 present in the insn pattern. In that case, we want to ensure that
4907 we don't break the duplicate nature of the pattern. So we will replace
4908 both operands at the same time. Otherwise, we would fail to find an
4909 equivalent substitution in the loop calling validate_change below.
4911 We used to suppress canonicalization of DEST if it appears in SRC,
4912 but we don't do this any more. */
4914 for (i = 0; i < n_sets; i++)
4916 rtx dest = SET_DEST (sets[i].rtl);
4917 rtx src = SET_SRC (sets[i].rtl);
4918 rtx new = canon_reg (src, insn);
4919 int insn_code;
4921 sets[i].orig_src = src;
4922 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4923 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4924 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4925 || (insn_code = recog_memoized (insn)) < 0
4926 || insn_data[insn_code].n_dups > 0)
4927 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4928 else
4929 SET_SRC (sets[i].rtl) = new;
4931 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4933 validate_change (insn, &XEXP (dest, 1),
4934 canon_reg (XEXP (dest, 1), insn), 1);
4935 validate_change (insn, &XEXP (dest, 2),
4936 canon_reg (XEXP (dest, 2), insn), 1);
4939 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4940 || GET_CODE (dest) == ZERO_EXTRACT
4941 || GET_CODE (dest) == SIGN_EXTRACT)
4942 dest = XEXP (dest, 0);
4944 if (GET_CODE (dest) == MEM)
4945 canon_reg (dest, insn);
4948 /* Now that we have done all the replacements, we can apply the change
4949 group and see if they all work. Note that this will cause some
4950 canonicalizations that would have worked individually not to be applied
4951 because some other canonicalization didn't work, but this should not
4952 occur often.
4954 The result of apply_change_group can be ignored; see canon_reg. */
4956 apply_change_group ();
4958 /* Set sets[i].src_elt to the class each source belongs to.
4959 Detect assignments from or to volatile things
4960 and set set[i] to zero so they will be ignored
4961 in the rest of this function.
4963 Nothing in this loop changes the hash table or the register chains. */
4965 for (i = 0; i < n_sets; i++)
4967 register rtx src, dest;
4968 register rtx src_folded;
4969 register struct table_elt *elt = 0, *p;
4970 enum machine_mode mode;
4971 rtx src_eqv_here;
4972 rtx src_const = 0;
4973 rtx src_related = 0;
4974 struct table_elt *src_const_elt = 0;
4975 int src_cost = MAX_COST;
4976 int src_eqv_cost = MAX_COST;
4977 int src_folded_cost = MAX_COST;
4978 int src_related_cost = MAX_COST;
4979 int src_elt_cost = MAX_COST;
4980 int src_regcost = MAX_COST;
4981 int src_eqv_regcost = MAX_COST;
4982 int src_folded_regcost = MAX_COST;
4983 int src_related_regcost = MAX_COST;
4984 int src_elt_regcost = MAX_COST;
4985 /* Set non-zero if we need to call force_const_mem on with the
4986 contents of src_folded before using it. */
4987 int src_folded_force_flag = 0;
4989 dest = SET_DEST (sets[i].rtl);
4990 src = SET_SRC (sets[i].rtl);
4992 /* If SRC is a constant that has no machine mode,
4993 hash it with the destination's machine mode.
4994 This way we can keep different modes separate. */
4996 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4997 sets[i].mode = mode;
4999 if (src_eqv)
5001 enum machine_mode eqvmode = mode;
5002 if (GET_CODE (dest) == STRICT_LOW_PART)
5003 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5004 do_not_record = 0;
5005 hash_arg_in_memory = 0;
5006 src_eqv = fold_rtx (src_eqv, insn);
5007 src_eqv_hash = HASH (src_eqv, eqvmode);
5009 /* Find the equivalence class for the equivalent expression. */
5011 if (!do_not_record)
5012 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5014 src_eqv_volatile = do_not_record;
5015 src_eqv_in_memory = hash_arg_in_memory;
5018 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5019 value of the INNER register, not the destination. So it is not
5020 a valid substitution for the source. But save it for later. */
5021 if (GET_CODE (dest) == STRICT_LOW_PART)
5022 src_eqv_here = 0;
5023 else
5024 src_eqv_here = src_eqv;
5026 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5027 simplified result, which may not necessarily be valid. */
5028 src_folded = fold_rtx (src, insn);
5030 #if 0
5031 /* ??? This caused bad code to be generated for the m68k port with -O2.
5032 Suppose src is (CONST_INT -1), and that after truncation src_folded
5033 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5034 At the end we will add src and src_const to the same equivalence
5035 class. We now have 3 and -1 on the same equivalence class. This
5036 causes later instructions to be mis-optimized. */
5037 /* If storing a constant in a bitfield, pre-truncate the constant
5038 so we will be able to record it later. */
5039 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5040 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5042 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5044 if (GET_CODE (src) == CONST_INT
5045 && GET_CODE (width) == CONST_INT
5046 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5047 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5048 src_folded
5049 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5050 << INTVAL (width)) - 1));
5052 #endif
5054 /* Compute SRC's hash code, and also notice if it
5055 should not be recorded at all. In that case,
5056 prevent any further processing of this assignment. */
5057 do_not_record = 0;
5058 hash_arg_in_memory = 0;
5060 sets[i].src = src;
5061 sets[i].src_hash = HASH (src, mode);
5062 sets[i].src_volatile = do_not_record;
5063 sets[i].src_in_memory = hash_arg_in_memory;
5065 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5066 a pseudo that is set more than once, do not record SRC. Using
5067 SRC as a replacement for anything else will be incorrect in that
5068 situation. Note that this usually occurs only for stack slots,
5069 in which case all the RTL would be referring to SRC, so we don't
5070 lose any optimization opportunities by not having SRC in the
5071 hash table. */
5073 if (GET_CODE (src) == MEM
5074 && find_reg_note (insn, REG_EQUIV, src) != 0
5075 && GET_CODE (dest) == REG
5076 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
5077 && REG_N_SETS (REGNO (dest)) != 1)
5078 sets[i].src_volatile = 1;
5080 #if 0
5081 /* It is no longer clear why we used to do this, but it doesn't
5082 appear to still be needed. So let's try without it since this
5083 code hurts cse'ing widened ops. */
5084 /* If source is a perverse subreg (such as QI treated as an SI),
5085 treat it as volatile. It may do the work of an SI in one context
5086 where the extra bits are not being used, but cannot replace an SI
5087 in general. */
5088 if (GET_CODE (src) == SUBREG
5089 && (GET_MODE_SIZE (GET_MODE (src))
5090 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5091 sets[i].src_volatile = 1;
5092 #endif
5094 /* Locate all possible equivalent forms for SRC. Try to replace
5095 SRC in the insn with each cheaper equivalent.
5097 We have the following types of equivalents: SRC itself, a folded
5098 version, a value given in a REG_EQUAL note, or a value related
5099 to a constant.
5101 Each of these equivalents may be part of an additional class
5102 of equivalents (if more than one is in the table, they must be in
5103 the same class; we check for this).
5105 If the source is volatile, we don't do any table lookups.
5107 We note any constant equivalent for possible later use in a
5108 REG_NOTE. */
5110 if (!sets[i].src_volatile)
5111 elt = lookup (src, sets[i].src_hash, mode);
5113 sets[i].src_elt = elt;
5115 if (elt && src_eqv_here && src_eqv_elt)
5117 if (elt->first_same_value != src_eqv_elt->first_same_value)
5119 /* The REG_EQUAL is indicating that two formerly distinct
5120 classes are now equivalent. So merge them. */
5121 merge_equiv_classes (elt, src_eqv_elt);
5122 src_eqv_hash = HASH (src_eqv, elt->mode);
5123 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5126 src_eqv_here = 0;
5129 else if (src_eqv_elt)
5130 elt = src_eqv_elt;
5132 /* Try to find a constant somewhere and record it in `src_const'.
5133 Record its table element, if any, in `src_const_elt'. Look in
5134 any known equivalences first. (If the constant is not in the
5135 table, also set `sets[i].src_const_hash'). */
5136 if (elt)
5137 for (p = elt->first_same_value; p; p = p->next_same_value)
5138 if (p->is_const)
5140 src_const = p->exp;
5141 src_const_elt = elt;
5142 break;
5145 if (src_const == 0
5146 && (CONSTANT_P (src_folded)
5147 /* Consider (minus (label_ref L1) (label_ref L2)) as
5148 "constant" here so we will record it. This allows us
5149 to fold switch statements when an ADDR_DIFF_VEC is used. */
5150 || (GET_CODE (src_folded) == MINUS
5151 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5152 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5153 src_const = src_folded, src_const_elt = elt;
5154 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5155 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5157 /* If we don't know if the constant is in the table, get its
5158 hash code and look it up. */
5159 if (src_const && src_const_elt == 0)
5161 sets[i].src_const_hash = HASH (src_const, mode);
5162 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5165 sets[i].src_const = src_const;
5166 sets[i].src_const_elt = src_const_elt;
5168 /* If the constant and our source are both in the table, mark them as
5169 equivalent. Otherwise, if a constant is in the table but the source
5170 isn't, set ELT to it. */
5171 if (src_const_elt && elt
5172 && src_const_elt->first_same_value != elt->first_same_value)
5173 merge_equiv_classes (elt, src_const_elt);
5174 else if (src_const_elt && elt == 0)
5175 elt = src_const_elt;
5177 /* See if there is a register linearly related to a constant
5178 equivalent of SRC. */
5179 if (src_const
5180 && (GET_CODE (src_const) == CONST
5181 || (src_const_elt && src_const_elt->related_value != 0)))
5183 src_related = use_related_value (src_const, src_const_elt);
5184 if (src_related)
5186 struct table_elt *src_related_elt
5187 = lookup (src_related, HASH (src_related, mode), mode);
5188 if (src_related_elt && elt)
5190 if (elt->first_same_value
5191 != src_related_elt->first_same_value)
5192 /* This can occur when we previously saw a CONST
5193 involving a SYMBOL_REF and then see the SYMBOL_REF
5194 twice. Merge the involved classes. */
5195 merge_equiv_classes (elt, src_related_elt);
5197 src_related = 0;
5198 src_related_elt = 0;
5200 else if (src_related_elt && elt == 0)
5201 elt = src_related_elt;
5205 /* See if we have a CONST_INT that is already in a register in a
5206 wider mode. */
5208 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5209 && GET_MODE_CLASS (mode) == MODE_INT
5210 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5212 enum machine_mode wider_mode;
5214 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5215 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5216 && src_related == 0;
5217 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5219 struct table_elt *const_elt
5220 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5222 if (const_elt == 0)
5223 continue;
5225 for (const_elt = const_elt->first_same_value;
5226 const_elt; const_elt = const_elt->next_same_value)
5227 if (GET_CODE (const_elt->exp) == REG)
5229 src_related = gen_lowpart_if_possible (mode,
5230 const_elt->exp);
5231 break;
5236 /* Another possibility is that we have an AND with a constant in
5237 a mode narrower than a word. If so, it might have been generated
5238 as part of an "if" which would narrow the AND. If we already
5239 have done the AND in a wider mode, we can use a SUBREG of that
5240 value. */
5242 if (flag_expensive_optimizations && ! src_related
5243 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5244 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5246 enum machine_mode tmode;
5247 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5249 for (tmode = GET_MODE_WIDER_MODE (mode);
5250 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5251 tmode = GET_MODE_WIDER_MODE (tmode))
5253 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5254 struct table_elt *larger_elt;
5256 if (inner)
5258 PUT_MODE (new_and, tmode);
5259 XEXP (new_and, 0) = inner;
5260 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5261 if (larger_elt == 0)
5262 continue;
5264 for (larger_elt = larger_elt->first_same_value;
5265 larger_elt; larger_elt = larger_elt->next_same_value)
5266 if (GET_CODE (larger_elt->exp) == REG)
5268 src_related
5269 = gen_lowpart_if_possible (mode, larger_elt->exp);
5270 break;
5273 if (src_related)
5274 break;
5279 #ifdef LOAD_EXTEND_OP
5280 /* See if a MEM has already been loaded with a widening operation;
5281 if it has, we can use a subreg of that. Many CISC machines
5282 also have such operations, but this is only likely to be
5283 beneficial these machines. */
5285 if (flag_expensive_optimizations && src_related == 0
5286 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5287 && GET_MODE_CLASS (mode) == MODE_INT
5288 && GET_CODE (src) == MEM && ! do_not_record
5289 && LOAD_EXTEND_OP (mode) != NIL)
5291 enum machine_mode tmode;
5293 /* Set what we are trying to extend and the operation it might
5294 have been extended with. */
5295 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5296 XEXP (memory_extend_rtx, 0) = src;
5298 for (tmode = GET_MODE_WIDER_MODE (mode);
5299 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5300 tmode = GET_MODE_WIDER_MODE (tmode))
5302 struct table_elt *larger_elt;
5304 PUT_MODE (memory_extend_rtx, tmode);
5305 larger_elt = lookup (memory_extend_rtx,
5306 HASH (memory_extend_rtx, tmode), tmode);
5307 if (larger_elt == 0)
5308 continue;
5310 for (larger_elt = larger_elt->first_same_value;
5311 larger_elt; larger_elt = larger_elt->next_same_value)
5312 if (GET_CODE (larger_elt->exp) == REG)
5314 src_related = gen_lowpart_if_possible (mode,
5315 larger_elt->exp);
5316 break;
5319 if (src_related)
5320 break;
5323 #endif /* LOAD_EXTEND_OP */
5325 if (src == src_folded)
5326 src_folded = 0;
5328 /* At this point, ELT, if non-zero, points to a class of expressions
5329 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5330 and SRC_RELATED, if non-zero, each contain additional equivalent
5331 expressions. Prune these latter expressions by deleting expressions
5332 already in the equivalence class.
5334 Check for an equivalent identical to the destination. If found,
5335 this is the preferred equivalent since it will likely lead to
5336 elimination of the insn. Indicate this by placing it in
5337 `src_related'. */
5339 if (elt)
5340 elt = elt->first_same_value;
5341 for (p = elt; p; p = p->next_same_value)
5343 enum rtx_code code = GET_CODE (p->exp);
5345 /* If the expression is not valid, ignore it. Then we do not
5346 have to check for validity below. In most cases, we can use
5347 `rtx_equal_p', since canonicalization has already been done. */
5348 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5349 continue;
5351 /* Also skip paradoxical subregs, unless that's what we're
5352 looking for. */
5353 if (code == SUBREG
5354 && (GET_MODE_SIZE (GET_MODE (p->exp))
5355 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5356 && ! (src != 0
5357 && GET_CODE (src) == SUBREG
5358 && GET_MODE (src) == GET_MODE (p->exp)
5359 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5360 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5361 continue;
5363 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5364 src = 0;
5365 else if (src_folded && GET_CODE (src_folded) == code
5366 && rtx_equal_p (src_folded, p->exp))
5367 src_folded = 0;
5368 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5369 && rtx_equal_p (src_eqv_here, p->exp))
5370 src_eqv_here = 0;
5371 else if (src_related && GET_CODE (src_related) == code
5372 && rtx_equal_p (src_related, p->exp))
5373 src_related = 0;
5375 /* This is the same as the destination of the insns, we want
5376 to prefer it. Copy it to src_related. The code below will
5377 then give it a negative cost. */
5378 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5379 src_related = dest;
5382 /* Find the cheapest valid equivalent, trying all the available
5383 possibilities. Prefer items not in the hash table to ones
5384 that are when they are equal cost. Note that we can never
5385 worsen an insn as the current contents will also succeed.
5386 If we find an equivalent identical to the destination, use it as best,
5387 since this insn will probably be eliminated in that case. */
5388 if (src)
5390 if (rtx_equal_p (src, dest))
5391 src_cost = src_regcost = -1;
5392 else
5394 src_cost = COST (src);
5395 src_regcost = approx_reg_cost (src);
5399 if (src_eqv_here)
5401 if (rtx_equal_p (src_eqv_here, dest))
5402 src_eqv_cost = src_eqv_regcost = -1;
5403 else
5405 src_eqv_cost = COST (src_eqv_here);
5406 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5410 if (src_folded)
5412 if (rtx_equal_p (src_folded, dest))
5413 src_folded_cost = src_folded_regcost = -1;
5414 else
5416 src_folded_cost = COST (src_folded);
5417 src_folded_regcost = approx_reg_cost (src_folded);
5421 if (src_related)
5423 if (rtx_equal_p (src_related, dest))
5424 src_related_cost = src_related_regcost = -1;
5425 else
5427 src_related_cost = COST (src_related);
5428 src_related_regcost = approx_reg_cost (src_related);
5432 /* If this was an indirect jump insn, a known label will really be
5433 cheaper even though it looks more expensive. */
5434 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5435 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5437 /* Terminate loop when replacement made. This must terminate since
5438 the current contents will be tested and will always be valid. */
5439 while (1)
5441 rtx trial;
5443 /* Skip invalid entries. */
5444 while (elt && GET_CODE (elt->exp) != REG
5445 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5446 elt = elt->next_same_value;
5448 /* A paradoxical subreg would be bad here: it'll be the right
5449 size, but later may be adjusted so that the upper bits aren't
5450 what we want. So reject it. */
5451 if (elt != 0
5452 && GET_CODE (elt->exp) == SUBREG
5453 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5454 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5455 /* It is okay, though, if the rtx we're trying to match
5456 will ignore any of the bits we can't predict. */
5457 && ! (src != 0
5458 && GET_CODE (src) == SUBREG
5459 && GET_MODE (src) == GET_MODE (elt->exp)
5460 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5461 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5463 elt = elt->next_same_value;
5464 continue;
5467 if (elt)
5469 src_elt_cost = elt->cost;
5470 src_elt_regcost = elt->regcost;
5473 /* Find cheapest and skip it for the next time. For items
5474 of equal cost, use this order:
5475 src_folded, src, src_eqv, src_related and hash table entry. */
5476 if (src_folded
5477 && preferrable (src_folded_cost, src_folded_regcost,
5478 src_cost, src_regcost) <= 0
5479 && preferrable (src_folded_cost, src_folded_regcost,
5480 src_eqv_cost, src_eqv_regcost) <= 0
5481 && preferrable (src_folded_cost, src_folded_regcost,
5482 src_related_cost, src_related_regcost) <= 0
5483 && preferrable (src_folded_cost, src_folded_regcost,
5484 src_elt_cost, src_elt_regcost) <= 0)
5486 trial = src_folded, src_folded_cost = MAX_COST;
5487 if (src_folded_force_flag)
5488 trial = force_const_mem (mode, trial);
5490 else if (src
5491 && preferrable (src_cost, src_regcost,
5492 src_eqv_cost, src_eqv_regcost) <= 0
5493 && preferrable (src_cost, src_regcost,
5494 src_related_cost, src_related_regcost) <= 0
5495 && preferrable (src_cost, src_regcost,
5496 src_elt_cost, src_elt_regcost) <= 0)
5497 trial = src, src_cost = MAX_COST;
5498 else if (src_eqv_here
5499 && preferrable (src_eqv_cost, src_eqv_regcost,
5500 src_related_cost, src_related_regcost) <= 0
5501 && preferrable (src_eqv_cost, src_eqv_regcost,
5502 src_elt_cost, src_elt_regcost) <= 0)
5503 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5504 else if (src_related
5505 && preferrable (src_related_cost, src_related_regcost,
5506 src_elt_cost, src_elt_regcost) <= 0)
5507 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5508 else
5510 trial = copy_rtx (elt->exp);
5511 elt = elt->next_same_value;
5512 src_elt_cost = MAX_COST;
5515 /* We don't normally have an insn matching (set (pc) (pc)), so
5516 check for this separately here. We will delete such an
5517 insn below.
5519 Tablejump insns contain a USE of the table, so simply replacing
5520 the operand with the constant won't match. This is simply an
5521 unconditional branch, however, and is therefore valid. Just
5522 insert the substitution here and we will delete and re-emit
5523 the insn later. */
5525 if (n_sets == 1 && dest == pc_rtx
5526 && (trial == pc_rtx
5527 || (GET_CODE (trial) == LABEL_REF
5528 && ! condjump_p (insn))))
5530 if (trial == pc_rtx)
5532 SET_SRC (sets[i].rtl) = trial;
5533 cse_jumps_altered = 1;
5534 break;
5537 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5538 INSN_CODE (insn) = -1;
5540 if (NEXT_INSN (insn) != 0
5541 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5542 emit_barrier_after (insn);
5544 cse_jumps_altered = 1;
5545 break;
5548 /* Look for a substitution that makes a valid insn. */
5549 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5551 /* If we just made a substitution inside a libcall, then we
5552 need to make the same substitution in any notes attached
5553 to the RETVAL insn. */
5554 if (libcall_insn
5555 && (GET_CODE (sets[i].orig_src) == REG
5556 || GET_CODE (sets[i].orig_src) == SUBREG
5557 || GET_CODE (sets[i].orig_src) == MEM))
5558 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5559 canon_reg (SET_SRC (sets[i].rtl), insn));
5561 /* The result of apply_change_group can be ignored; see
5562 canon_reg. */
5564 validate_change (insn, &SET_SRC (sets[i].rtl),
5565 canon_reg (SET_SRC (sets[i].rtl), insn),
5567 apply_change_group ();
5568 break;
5571 /* If we previously found constant pool entries for
5572 constants and this is a constant, try making a
5573 pool entry. Put it in src_folded unless we already have done
5574 this since that is where it likely came from. */
5576 else if (constant_pool_entries_cost
5577 && CONSTANT_P (trial)
5578 /* Reject cases that will abort in decode_rtx_const.
5579 On the alpha when simplifying a switch, we get
5580 (const (truncate (minus (label_ref) (label_ref)))). */
5581 && ! (GET_CODE (trial) == CONST
5582 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5583 /* Likewise on IA-64, except without the truncate. */
5584 && ! (GET_CODE (trial) == CONST
5585 && GET_CODE (XEXP (trial, 0)) == MINUS
5586 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5587 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5588 && (src_folded == 0
5589 || (GET_CODE (src_folded) != MEM
5590 && ! src_folded_force_flag))
5591 && GET_MODE_CLASS (mode) != MODE_CC
5592 && mode != VOIDmode)
5594 src_folded_force_flag = 1;
5595 src_folded = trial;
5596 src_folded_cost = constant_pool_entries_cost;
5600 src = SET_SRC (sets[i].rtl);
5602 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5603 However, there is an important exception: If both are registers
5604 that are not the head of their equivalence class, replace SET_SRC
5605 with the head of the class. If we do not do this, we will have
5606 both registers live over a portion of the basic block. This way,
5607 their lifetimes will likely abut instead of overlapping. */
5608 if (GET_CODE (dest) == REG
5609 && REGNO_QTY_VALID_P (REGNO (dest)))
5611 int dest_q = REG_QTY (REGNO (dest));
5612 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5614 if (dest_ent->mode == GET_MODE (dest)
5615 && dest_ent->first_reg != REGNO (dest)
5616 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5617 /* Don't do this if the original insn had a hard reg as
5618 SET_SRC or SET_DEST. */
5619 && (GET_CODE (sets[i].src) != REG
5620 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5621 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5622 /* We can't call canon_reg here because it won't do anything if
5623 SRC is a hard register. */
5625 int src_q = REG_QTY (REGNO (src));
5626 struct qty_table_elem *src_ent = &qty_table[src_q];
5627 int first = src_ent->first_reg;
5628 rtx new_src
5629 = (first >= FIRST_PSEUDO_REGISTER
5630 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5632 /* We must use validate-change even for this, because this
5633 might be a special no-op instruction, suitable only to
5634 tag notes onto. */
5635 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5637 src = new_src;
5638 /* If we had a constant that is cheaper than what we are now
5639 setting SRC to, use that constant. We ignored it when we
5640 thought we could make this into a no-op. */
5641 if (src_const && COST (src_const) < COST (src)
5642 && validate_change (insn, &SET_SRC (sets[i].rtl),
5643 src_const, 0))
5644 src = src_const;
5649 /* If we made a change, recompute SRC values. */
5650 if (src != sets[i].src)
5652 cse_altered = 1;
5653 do_not_record = 0;
5654 hash_arg_in_memory = 0;
5655 sets[i].src = src;
5656 sets[i].src_hash = HASH (src, mode);
5657 sets[i].src_volatile = do_not_record;
5658 sets[i].src_in_memory = hash_arg_in_memory;
5659 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5662 /* If this is a single SET, we are setting a register, and we have an
5663 equivalent constant, we want to add a REG_NOTE. We don't want
5664 to write a REG_EQUAL note for a constant pseudo since verifying that
5665 that pseudo hasn't been eliminated is a pain. Such a note also
5666 won't help anything.
5668 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5669 which can be created for a reference to a compile time computable
5670 entry in a jump table. */
5672 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5673 && GET_CODE (src_const) != REG
5674 && ! (GET_CODE (src_const) == CONST
5675 && GET_CODE (XEXP (src_const, 0)) == MINUS
5676 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5677 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5679 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5681 /* Make sure that the rtx is not shared with any other insn. */
5682 src_const = copy_rtx (src_const);
5684 /* Record the actual constant value in a REG_EQUAL note, making
5685 a new one if one does not already exist. */
5686 if (tem)
5687 XEXP (tem, 0) = src_const;
5688 else
5689 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5690 src_const, REG_NOTES (insn));
5692 /* If storing a constant value in a register that
5693 previously held the constant value 0,
5694 record this fact with a REG_WAS_0 note on this insn.
5696 Note that the *register* is required to have previously held 0,
5697 not just any register in the quantity and we must point to the
5698 insn that set that register to zero.
5700 Rather than track each register individually, we just see if
5701 the last set for this quantity was for this register. */
5703 if (REGNO_QTY_VALID_P (REGNO (dest)))
5705 int dest_q = REG_QTY (REGNO (dest));
5706 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5708 if (dest_ent->const_rtx == const0_rtx)
5710 /* See if we previously had a REG_WAS_0 note. */
5711 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5712 rtx const_insn = dest_ent->const_insn;
5714 if ((tem = single_set (const_insn)) != 0
5715 && rtx_equal_p (SET_DEST (tem), dest))
5717 if (note)
5718 XEXP (note, 0) = const_insn;
5719 else
5720 REG_NOTES (insn)
5721 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5722 REG_NOTES (insn));
5728 /* Now deal with the destination. */
5729 do_not_record = 0;
5731 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5732 to the MEM or REG within it. */
5733 while (GET_CODE (dest) == SIGN_EXTRACT
5734 || GET_CODE (dest) == ZERO_EXTRACT
5735 || GET_CODE (dest) == SUBREG
5736 || GET_CODE (dest) == STRICT_LOW_PART)
5737 dest = XEXP (dest, 0);
5739 sets[i].inner_dest = dest;
5741 if (GET_CODE (dest) == MEM)
5743 #ifdef PUSH_ROUNDING
5744 /* Stack pushes invalidate the stack pointer. */
5745 rtx addr = XEXP (dest, 0);
5746 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5747 && XEXP (addr, 0) == stack_pointer_rtx)
5748 invalidate (stack_pointer_rtx, Pmode);
5749 #endif
5750 dest = fold_rtx (dest, insn);
5753 /* Compute the hash code of the destination now,
5754 before the effects of this instruction are recorded,
5755 since the register values used in the address computation
5756 are those before this instruction. */
5757 sets[i].dest_hash = HASH (dest, mode);
5759 /* Don't enter a bit-field in the hash table
5760 because the value in it after the store
5761 may not equal what was stored, due to truncation. */
5763 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5764 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5766 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5768 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5769 && GET_CODE (width) == CONST_INT
5770 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5771 && ! (INTVAL (src_const)
5772 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5773 /* Exception: if the value is constant,
5774 and it won't be truncated, record it. */
5776 else
5778 /* This is chosen so that the destination will be invalidated
5779 but no new value will be recorded.
5780 We must invalidate because sometimes constant
5781 values can be recorded for bitfields. */
5782 sets[i].src_elt = 0;
5783 sets[i].src_volatile = 1;
5784 src_eqv = 0;
5785 src_eqv_elt = 0;
5789 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5790 the insn. */
5791 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5793 /* One less use of the label this insn used to jump to. */
5794 if (JUMP_LABEL (insn) != 0)
5795 --LABEL_NUSES (JUMP_LABEL (insn));
5796 PUT_CODE (insn, NOTE);
5797 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5798 NOTE_SOURCE_FILE (insn) = 0;
5799 cse_jumps_altered = 1;
5800 /* No more processing for this set. */
5801 sets[i].rtl = 0;
5804 /* If this SET is now setting PC to a label, we know it used to
5805 be a conditional or computed branch. So we see if we can follow
5806 it. If it was a computed branch, delete it and re-emit. */
5807 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5809 /* If this is not in the format for a simple branch and
5810 we are the only SET in it, re-emit it. */
5811 if (! simplejump_p (insn) && n_sets == 1)
5813 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5814 JUMP_LABEL (new) = XEXP (src, 0);
5815 LABEL_NUSES (XEXP (src, 0))++;
5816 insn = new;
5818 else
5819 /* Otherwise, force rerecognition, since it probably had
5820 a different pattern before.
5821 This shouldn't really be necessary, since whatever
5822 changed the source value above should have done this.
5823 Until the right place is found, might as well do this here. */
5824 INSN_CODE (insn) = -1;
5826 never_reached_warning (insn);
5828 /* Now emit a BARRIER after the unconditional jump. Do not bother
5829 deleting any unreachable code, let jump/flow do that. */
5830 if (NEXT_INSN (insn) != 0
5831 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5832 emit_barrier_after (insn);
5834 cse_jumps_altered = 1;
5835 sets[i].rtl = 0;
5838 /* If destination is volatile, invalidate it and then do no further
5839 processing for this assignment. */
5841 else if (do_not_record)
5843 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5844 invalidate (dest, VOIDmode);
5845 else if (GET_CODE (dest) == MEM)
5847 /* Outgoing arguments for a libcall don't
5848 affect any recorded expressions. */
5849 if (! libcall_insn || insn == libcall_insn)
5850 invalidate (dest, VOIDmode);
5852 else if (GET_CODE (dest) == STRICT_LOW_PART
5853 || GET_CODE (dest) == ZERO_EXTRACT)
5854 invalidate (XEXP (dest, 0), GET_MODE (dest));
5855 sets[i].rtl = 0;
5858 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5859 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5861 #ifdef HAVE_cc0
5862 /* If setting CC0, record what it was set to, or a constant, if it
5863 is equivalent to a constant. If it is being set to a floating-point
5864 value, make a COMPARE with the appropriate constant of 0. If we
5865 don't do this, later code can interpret this as a test against
5866 const0_rtx, which can cause problems if we try to put it into an
5867 insn as a floating-point operand. */
5868 if (dest == cc0_rtx)
5870 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5871 this_insn_cc0_mode = mode;
5872 if (FLOAT_MODE_P (mode))
5873 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5874 CONST0_RTX (mode));
5876 #endif
5879 /* Now enter all non-volatile source expressions in the hash table
5880 if they are not already present.
5881 Record their equivalence classes in src_elt.
5882 This way we can insert the corresponding destinations into
5883 the same classes even if the actual sources are no longer in them
5884 (having been invalidated). */
5886 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5887 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5889 register struct table_elt *elt;
5890 register struct table_elt *classp = sets[0].src_elt;
5891 rtx dest = SET_DEST (sets[0].rtl);
5892 enum machine_mode eqvmode = GET_MODE (dest);
5894 if (GET_CODE (dest) == STRICT_LOW_PART)
5896 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5897 classp = 0;
5899 if (insert_regs (src_eqv, classp, 0))
5901 rehash_using_reg (src_eqv);
5902 src_eqv_hash = HASH (src_eqv, eqvmode);
5904 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5905 elt->in_memory = src_eqv_in_memory;
5906 src_eqv_elt = elt;
5908 /* Check to see if src_eqv_elt is the same as a set source which
5909 does not yet have an elt, and if so set the elt of the set source
5910 to src_eqv_elt. */
5911 for (i = 0; i < n_sets; i++)
5912 if (sets[i].rtl && sets[i].src_elt == 0
5913 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5914 sets[i].src_elt = src_eqv_elt;
5917 for (i = 0; i < n_sets; i++)
5918 if (sets[i].rtl && ! sets[i].src_volatile
5919 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5921 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5923 /* REG_EQUAL in setting a STRICT_LOW_PART
5924 gives an equivalent for the entire destination register,
5925 not just for the subreg being stored in now.
5926 This is a more interesting equivalence, so we arrange later
5927 to treat the entire reg as the destination. */
5928 sets[i].src_elt = src_eqv_elt;
5929 sets[i].src_hash = src_eqv_hash;
5931 else
5933 /* Insert source and constant equivalent into hash table, if not
5934 already present. */
5935 register struct table_elt *classp = src_eqv_elt;
5936 register rtx src = sets[i].src;
5937 register rtx dest = SET_DEST (sets[i].rtl);
5938 enum machine_mode mode
5939 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5941 if (sets[i].src_elt == 0)
5943 /* Don't put a hard register source into the table if this is
5944 the last insn of a libcall. In this case, we only need
5945 to put src_eqv_elt in src_elt. */
5946 if (GET_CODE (src) != REG
5947 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5948 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5950 register struct table_elt *elt;
5952 /* Note that these insert_regs calls cannot remove
5953 any of the src_elt's, because they would have failed to
5954 match if not still valid. */
5955 if (insert_regs (src, classp, 0))
5957 rehash_using_reg (src);
5958 sets[i].src_hash = HASH (src, mode);
5960 elt = insert (src, classp, sets[i].src_hash, mode);
5961 elt->in_memory = sets[i].src_in_memory;
5962 sets[i].src_elt = classp = elt;
5964 else
5965 sets[i].src_elt = classp;
5967 if (sets[i].src_const && sets[i].src_const_elt == 0
5968 && src != sets[i].src_const
5969 && ! rtx_equal_p (sets[i].src_const, src))
5970 sets[i].src_elt = insert (sets[i].src_const, classp,
5971 sets[i].src_const_hash, mode);
5974 else if (sets[i].src_elt == 0)
5975 /* If we did not insert the source into the hash table (e.g., it was
5976 volatile), note the equivalence class for the REG_EQUAL value, if any,
5977 so that the destination goes into that class. */
5978 sets[i].src_elt = src_eqv_elt;
5980 invalidate_from_clobbers (x);
5982 /* Some registers are invalidated by subroutine calls. Memory is
5983 invalidated by non-constant calls. */
5985 if (GET_CODE (insn) == CALL_INSN)
5987 if (! CONST_CALL_P (insn))
5988 invalidate_memory ();
5989 invalidate_for_call ();
5992 /* Now invalidate everything set by this instruction.
5993 If a SUBREG or other funny destination is being set,
5994 sets[i].rtl is still nonzero, so here we invalidate the reg
5995 a part of which is being set. */
5997 for (i = 0; i < n_sets; i++)
5998 if (sets[i].rtl)
6000 /* We can't use the inner dest, because the mode associated with
6001 a ZERO_EXTRACT is significant. */
6002 register rtx dest = SET_DEST (sets[i].rtl);
6004 /* Needed for registers to remove the register from its
6005 previous quantity's chain.
6006 Needed for memory if this is a nonvarying address, unless
6007 we have just done an invalidate_memory that covers even those. */
6008 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6009 invalidate (dest, VOIDmode);
6010 else if (GET_CODE (dest) == MEM)
6012 /* Outgoing arguments for a libcall don't
6013 affect any recorded expressions. */
6014 if (! libcall_insn || insn == libcall_insn)
6015 invalidate (dest, VOIDmode);
6017 else if (GET_CODE (dest) == STRICT_LOW_PART
6018 || GET_CODE (dest) == ZERO_EXTRACT)
6019 invalidate (XEXP (dest, 0), GET_MODE (dest));
6022 /* A volatile ASM invalidates everything. */
6023 if (GET_CODE (insn) == INSN
6024 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6025 && MEM_VOLATILE_P (PATTERN (insn)))
6026 flush_hash_table ();
6028 /* Make sure registers mentioned in destinations
6029 are safe for use in an expression to be inserted.
6030 This removes from the hash table
6031 any invalid entry that refers to one of these registers.
6033 We don't care about the return value from mention_regs because
6034 we are going to hash the SET_DEST values unconditionally. */
6036 for (i = 0; i < n_sets; i++)
6038 if (sets[i].rtl)
6040 rtx x = SET_DEST (sets[i].rtl);
6042 if (GET_CODE (x) != REG)
6043 mention_regs (x);
6044 else
6046 /* We used to rely on all references to a register becoming
6047 inaccessible when a register changes to a new quantity,
6048 since that changes the hash code. However, that is not
6049 safe, since after HASH_SIZE new quantities we get a
6050 hash 'collision' of a register with its own invalid
6051 entries. And since SUBREGs have been changed not to
6052 change their hash code with the hash code of the register,
6053 it wouldn't work any longer at all. So we have to check
6054 for any invalid references lying around now.
6055 This code is similar to the REG case in mention_regs,
6056 but it knows that reg_tick has been incremented, and
6057 it leaves reg_in_table as -1 . */
6058 unsigned int regno = REGNO (x);
6059 unsigned int endregno
6060 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6061 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6062 unsigned int i;
6064 for (i = regno; i < endregno; i++)
6066 if (REG_IN_TABLE (i) >= 0)
6068 remove_invalid_refs (i);
6069 REG_IN_TABLE (i) = -1;
6076 /* We may have just removed some of the src_elt's from the hash table.
6077 So replace each one with the current head of the same class. */
6079 for (i = 0; i < n_sets; i++)
6080 if (sets[i].rtl)
6082 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6083 /* If elt was removed, find current head of same class,
6084 or 0 if nothing remains of that class. */
6086 register struct table_elt *elt = sets[i].src_elt;
6088 while (elt && elt->prev_same_value)
6089 elt = elt->prev_same_value;
6091 while (elt && elt->first_same_value == 0)
6092 elt = elt->next_same_value;
6093 sets[i].src_elt = elt ? elt->first_same_value : 0;
6097 /* Now insert the destinations into their equivalence classes. */
6099 for (i = 0; i < n_sets; i++)
6100 if (sets[i].rtl)
6102 register rtx dest = SET_DEST (sets[i].rtl);
6103 rtx inner_dest = sets[i].inner_dest;
6104 register struct table_elt *elt;
6106 /* Don't record value if we are not supposed to risk allocating
6107 floating-point values in registers that might be wider than
6108 memory. */
6109 if ((flag_float_store
6110 && GET_CODE (dest) == MEM
6111 && FLOAT_MODE_P (GET_MODE (dest)))
6112 /* Don't record BLKmode values, because we don't know the
6113 size of it, and can't be sure that other BLKmode values
6114 have the same or smaller size. */
6115 || GET_MODE (dest) == BLKmode
6116 /* Don't record values of destinations set inside a libcall block
6117 since we might delete the libcall. Things should have been set
6118 up so we won't want to reuse such a value, but we play it safe
6119 here. */
6120 || libcall_insn
6121 /* If we didn't put a REG_EQUAL value or a source into the hash
6122 table, there is no point is recording DEST. */
6123 || sets[i].src_elt == 0
6124 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6125 or SIGN_EXTEND, don't record DEST since it can cause
6126 some tracking to be wrong.
6128 ??? Think about this more later. */
6129 || (GET_CODE (dest) == SUBREG
6130 && (GET_MODE_SIZE (GET_MODE (dest))
6131 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6132 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6133 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6134 continue;
6136 /* STRICT_LOW_PART isn't part of the value BEING set,
6137 and neither is the SUBREG inside it.
6138 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6139 if (GET_CODE (dest) == STRICT_LOW_PART)
6140 dest = SUBREG_REG (XEXP (dest, 0));
6142 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6143 /* Registers must also be inserted into chains for quantities. */
6144 if (insert_regs (dest, sets[i].src_elt, 1))
6146 /* If `insert_regs' changes something, the hash code must be
6147 recalculated. */
6148 rehash_using_reg (dest);
6149 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6152 if (GET_CODE (inner_dest) == MEM
6153 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6154 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6155 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6156 Consider the case in which the address of the MEM is
6157 passed to a function, which alters the MEM. Then, if we
6158 later use Y instead of the MEM we'll miss the update. */
6159 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6160 else
6161 elt = insert (dest, sets[i].src_elt,
6162 sets[i].dest_hash, GET_MODE (dest));
6164 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6165 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6166 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6167 0))));
6169 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6170 narrower than M2, and both M1 and M2 are the same number of words,
6171 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6172 make that equivalence as well.
6174 However, BAR may have equivalences for which gen_lowpart_if_possible
6175 will produce a simpler value than gen_lowpart_if_possible applied to
6176 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6177 BAR's equivalences. If we don't get a simplified form, make
6178 the SUBREG. It will not be used in an equivalence, but will
6179 cause two similar assignments to be detected.
6181 Note the loop below will find SUBREG_REG (DEST) since we have
6182 already entered SRC and DEST of the SET in the table. */
6184 if (GET_CODE (dest) == SUBREG
6185 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6186 / UNITS_PER_WORD)
6187 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6188 && (GET_MODE_SIZE (GET_MODE (dest))
6189 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6190 && sets[i].src_elt != 0)
6192 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6193 struct table_elt *elt, *classp = 0;
6195 for (elt = sets[i].src_elt->first_same_value; elt;
6196 elt = elt->next_same_value)
6198 rtx new_src = 0;
6199 unsigned src_hash;
6200 struct table_elt *src_elt;
6202 /* Ignore invalid entries. */
6203 if (GET_CODE (elt->exp) != REG
6204 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6205 continue;
6207 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6208 if (new_src == 0)
6209 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6211 src_hash = HASH (new_src, new_mode);
6212 src_elt = lookup (new_src, src_hash, new_mode);
6214 /* Put the new source in the hash table is if isn't
6215 already. */
6216 if (src_elt == 0)
6218 if (insert_regs (new_src, classp, 0))
6220 rehash_using_reg (new_src);
6221 src_hash = HASH (new_src, new_mode);
6223 src_elt = insert (new_src, classp, src_hash, new_mode);
6224 src_elt->in_memory = elt->in_memory;
6226 else if (classp && classp != src_elt->first_same_value)
6227 /* Show that two things that we've seen before are
6228 actually the same. */
6229 merge_equiv_classes (src_elt, classp);
6231 classp = src_elt->first_same_value;
6232 /* Ignore invalid entries. */
6233 while (classp
6234 && GET_CODE (classp->exp) != REG
6235 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6236 classp = classp->next_same_value;
6241 /* Special handling for (set REG0 REG1) where REG0 is the
6242 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6243 be used in the sequel, so (if easily done) change this insn to
6244 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6245 that computed their value. Then REG1 will become a dead store
6246 and won't cloud the situation for later optimizations.
6248 Do not make this change if REG1 is a hard register, because it will
6249 then be used in the sequel and we may be changing a two-operand insn
6250 into a three-operand insn.
6252 Also do not do this if we are operating on a copy of INSN.
6254 Also don't do this if INSN ends a libcall; this would cause an unrelated
6255 register to be set in the middle of a libcall, and we then get bad code
6256 if the libcall is deleted. */
6258 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6259 && NEXT_INSN (PREV_INSN (insn)) == insn
6260 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6261 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6262 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6264 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6265 struct qty_table_elem *src_ent = &qty_table[src_q];
6267 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6268 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6270 rtx prev = prev_nonnote_insn (insn);
6272 /* Do not swap the registers around if the previous instruction
6273 attaches a REG_EQUIV note to REG1.
6275 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6276 from the pseudo that originally shadowed an incoming argument
6277 to another register. Some uses of REG_EQUIV might rely on it
6278 being attached to REG1 rather than REG2.
6280 This section previously turned the REG_EQUIV into a REG_EQUAL
6281 note. We cannot do that because REG_EQUIV may provide an
6282 uninitialised stack slot when REG_PARM_STACK_SPACE is used. */
6284 if (prev != 0 && GET_CODE (prev) == INSN
6285 && GET_CODE (PATTERN (prev)) == SET
6286 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6287 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6289 rtx dest = SET_DEST (sets[0].rtl);
6290 rtx src = SET_SRC (sets[0].rtl);
6291 rtx note;
6293 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6294 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6295 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6296 apply_change_group ();
6298 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6299 any REG_WAS_0 note on INSN to PREV. */
6300 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6301 if (note)
6302 remove_note (prev, note);
6304 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6305 if (note)
6307 remove_note (insn, note);
6308 XEXP (note, 1) = REG_NOTES (prev);
6309 REG_NOTES (prev) = note;
6312 /* If INSN has a REG_EQUAL note, and this note mentions
6313 REG0, then we must delete it, because the value in
6314 REG0 has changed. If the note's value is REG1, we must
6315 also delete it because that is now this insn's dest. */
6316 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6317 if (note != 0
6318 && (reg_mentioned_p (dest, XEXP (note, 0))
6319 || rtx_equal_p (src, XEXP (note, 0))))
6320 remove_note (insn, note);
6325 /* If this is a conditional jump insn, record any known equivalences due to
6326 the condition being tested. */
6328 last_jump_equiv_class = 0;
6329 if (GET_CODE (insn) == JUMP_INSN
6330 && n_sets == 1 && GET_CODE (x) == SET
6331 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6332 record_jump_equiv (insn, 0);
6334 #ifdef HAVE_cc0
6335 /* If the previous insn set CC0 and this insn no longer references CC0,
6336 delete the previous insn. Here we use the fact that nothing expects CC0
6337 to be valid over an insn, which is true until the final pass. */
6338 if (prev_insn && GET_CODE (prev_insn) == INSN
6339 && (tem = single_set (prev_insn)) != 0
6340 && SET_DEST (tem) == cc0_rtx
6341 && ! reg_mentioned_p (cc0_rtx, x))
6343 PUT_CODE (prev_insn, NOTE);
6344 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6345 NOTE_SOURCE_FILE (prev_insn) = 0;
6348 prev_insn_cc0 = this_insn_cc0;
6349 prev_insn_cc0_mode = this_insn_cc0_mode;
6350 #endif
6352 prev_insn = insn;
6355 /* Remove from the hash table all expressions that reference memory. */
6357 static void
6358 invalidate_memory ()
6360 register int i;
6361 register struct table_elt *p, *next;
6363 for (i = 0; i < HASH_SIZE; i++)
6364 for (p = table[i]; p; p = next)
6366 next = p->next_same_hash;
6367 if (p->in_memory)
6368 remove_from_table (p, i);
6372 /* If ADDR is an address that implicitly affects the stack pointer, return
6373 1 and update the register tables to show the effect. Else, return 0. */
6375 static int
6376 addr_affects_sp_p (addr)
6377 register rtx addr;
6379 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6380 && GET_CODE (XEXP (addr, 0)) == REG
6381 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6383 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6384 REG_TICK (STACK_POINTER_REGNUM)++;
6386 /* This should be *very* rare. */
6387 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6388 invalidate (stack_pointer_rtx, VOIDmode);
6390 return 1;
6393 return 0;
6396 /* Perform invalidation on the basis of everything about an insn
6397 except for invalidating the actual places that are SET in it.
6398 This includes the places CLOBBERed, and anything that might
6399 alias with something that is SET or CLOBBERed.
6401 X is the pattern of the insn. */
6403 static void
6404 invalidate_from_clobbers (x)
6405 rtx x;
6407 if (GET_CODE (x) == CLOBBER)
6409 rtx ref = XEXP (x, 0);
6410 if (ref)
6412 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6413 || GET_CODE (ref) == MEM)
6414 invalidate (ref, VOIDmode);
6415 else if (GET_CODE (ref) == STRICT_LOW_PART
6416 || GET_CODE (ref) == ZERO_EXTRACT)
6417 invalidate (XEXP (ref, 0), GET_MODE (ref));
6420 else if (GET_CODE (x) == PARALLEL)
6422 register int i;
6423 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6425 register rtx y = XVECEXP (x, 0, i);
6426 if (GET_CODE (y) == CLOBBER)
6428 rtx ref = XEXP (y, 0);
6429 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6430 || GET_CODE (ref) == MEM)
6431 invalidate (ref, VOIDmode);
6432 else if (GET_CODE (ref) == STRICT_LOW_PART
6433 || GET_CODE (ref) == ZERO_EXTRACT)
6434 invalidate (XEXP (ref, 0), GET_MODE (ref));
6440 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6441 and replace any registers in them with either an equivalent constant
6442 or the canonical form of the register. If we are inside an address,
6443 only do this if the address remains valid.
6445 OBJECT is 0 except when within a MEM in which case it is the MEM.
6447 Return the replacement for X. */
6449 static rtx
6450 cse_process_notes (x, object)
6451 rtx x;
6452 rtx object;
6454 enum rtx_code code = GET_CODE (x);
6455 const char *fmt = GET_RTX_FORMAT (code);
6456 int i;
6458 switch (code)
6460 case CONST_INT:
6461 case CONST:
6462 case SYMBOL_REF:
6463 case LABEL_REF:
6464 case CONST_DOUBLE:
6465 case PC:
6466 case CC0:
6467 case LO_SUM:
6468 return x;
6470 case MEM:
6471 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6472 return x;
6474 case EXPR_LIST:
6475 case INSN_LIST:
6476 if (REG_NOTE_KIND (x) == REG_EQUAL)
6477 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6478 if (XEXP (x, 1))
6479 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6480 return x;
6482 case SIGN_EXTEND:
6483 case ZERO_EXTEND:
6484 case SUBREG:
6486 rtx new = cse_process_notes (XEXP (x, 0), object);
6487 /* We don't substitute VOIDmode constants into these rtx,
6488 since they would impede folding. */
6489 if (GET_MODE (new) != VOIDmode)
6490 validate_change (object, &XEXP (x, 0), new, 0);
6491 return x;
6494 case REG:
6495 i = REG_QTY (REGNO (x));
6497 /* Return a constant or a constant register. */
6498 if (REGNO_QTY_VALID_P (REGNO (x)))
6500 struct qty_table_elem *ent = &qty_table[i];
6502 if (ent->const_rtx != NULL_RTX
6503 && (CONSTANT_P (ent->const_rtx)
6504 || GET_CODE (ent->const_rtx) == REG))
6506 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6507 if (new)
6508 return new;
6512 /* Otherwise, canonicalize this register. */
6513 return canon_reg (x, NULL_RTX);
6515 default:
6516 break;
6519 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6520 if (fmt[i] == 'e')
6521 validate_change (object, &XEXP (x, i),
6522 cse_process_notes (XEXP (x, i), object), 0);
6524 return x;
6527 /* Find common subexpressions between the end test of a loop and the beginning
6528 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6530 Often we have a loop where an expression in the exit test is used
6531 in the body of the loop. For example "while (*p) *q++ = *p++;".
6532 Because of the way we duplicate the loop exit test in front of the loop,
6533 however, we don't detect that common subexpression. This will be caught
6534 when global cse is implemented, but this is a quite common case.
6536 This function handles the most common cases of these common expressions.
6537 It is called after we have processed the basic block ending with the
6538 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6539 jumps to a label used only once. */
6541 static void
6542 cse_around_loop (loop_start)
6543 rtx loop_start;
6545 rtx insn;
6546 int i;
6547 struct table_elt *p;
6549 /* If the jump at the end of the loop doesn't go to the start, we don't
6550 do anything. */
6551 for (insn = PREV_INSN (loop_start);
6552 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6553 insn = PREV_INSN (insn))
6556 if (insn == 0
6557 || GET_CODE (insn) != NOTE
6558 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6559 return;
6561 /* If the last insn of the loop (the end test) was an NE comparison,
6562 we will interpret it as an EQ comparison, since we fell through
6563 the loop. Any equivalences resulting from that comparison are
6564 therefore not valid and must be invalidated. */
6565 if (last_jump_equiv_class)
6566 for (p = last_jump_equiv_class->first_same_value; p;
6567 p = p->next_same_value)
6569 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6570 || (GET_CODE (p->exp) == SUBREG
6571 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6572 invalidate (p->exp, VOIDmode);
6573 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6574 || GET_CODE (p->exp) == ZERO_EXTRACT)
6575 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6578 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6579 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6581 The only thing we do with SET_DEST is invalidate entries, so we
6582 can safely process each SET in order. It is slightly less efficient
6583 to do so, but we only want to handle the most common cases.
6585 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6586 These pseudos won't have valid entries in any of the tables indexed
6587 by register number, such as reg_qty. We avoid out-of-range array
6588 accesses by not processing any instructions created after cse started. */
6590 for (insn = NEXT_INSN (loop_start);
6591 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6592 && INSN_UID (insn) < max_insn_uid
6593 && ! (GET_CODE (insn) == NOTE
6594 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6595 insn = NEXT_INSN (insn))
6597 if (INSN_P (insn)
6598 && (GET_CODE (PATTERN (insn)) == SET
6599 || GET_CODE (PATTERN (insn)) == CLOBBER))
6600 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6601 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6602 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6603 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6604 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6605 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6606 loop_start);
6610 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6611 since they are done elsewhere. This function is called via note_stores. */
6613 static void
6614 invalidate_skipped_set (dest, set, data)
6615 rtx set;
6616 rtx dest;
6617 void *data ATTRIBUTE_UNUSED;
6619 enum rtx_code code = GET_CODE (dest);
6621 if (code == MEM
6622 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6623 /* There are times when an address can appear varying and be a PLUS
6624 during this scan when it would be a fixed address were we to know
6625 the proper equivalences. So invalidate all memory if there is
6626 a BLKmode or nonscalar memory reference or a reference to a
6627 variable address. */
6628 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6629 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6631 invalidate_memory ();
6632 return;
6635 if (GET_CODE (set) == CLOBBER
6636 #ifdef HAVE_cc0
6637 || dest == cc0_rtx
6638 #endif
6639 || dest == pc_rtx)
6640 return;
6642 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6643 invalidate (XEXP (dest, 0), GET_MODE (dest));
6644 else if (code == REG || code == SUBREG || code == MEM)
6645 invalidate (dest, VOIDmode);
6648 /* Invalidate all insns from START up to the end of the function or the
6649 next label. This called when we wish to CSE around a block that is
6650 conditionally executed. */
6652 static void
6653 invalidate_skipped_block (start)
6654 rtx start;
6656 rtx insn;
6658 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6659 insn = NEXT_INSN (insn))
6661 if (! INSN_P (insn))
6662 continue;
6664 if (GET_CODE (insn) == CALL_INSN)
6666 if (! CONST_CALL_P (insn))
6667 invalidate_memory ();
6668 invalidate_for_call ();
6671 invalidate_from_clobbers (PATTERN (insn));
6672 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6676 /* If modifying X will modify the value in *DATA (which is really an
6677 `rtx *'), indicate that fact by setting the pointed to value to
6678 NULL_RTX. */
6680 static void
6681 cse_check_loop_start (x, set, data)
6682 rtx x;
6683 rtx set ATTRIBUTE_UNUSED;
6684 void *data;
6686 rtx *cse_check_loop_start_value = (rtx *) data;
6688 if (*cse_check_loop_start_value == NULL_RTX
6689 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6690 return;
6692 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6693 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6694 *cse_check_loop_start_value = NULL_RTX;
6697 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6698 a loop that starts with the label at LOOP_START.
6700 If X is a SET, we see if its SET_SRC is currently in our hash table.
6701 If so, we see if it has a value equal to some register used only in the
6702 loop exit code (as marked by jump.c).
6704 If those two conditions are true, we search backwards from the start of
6705 the loop to see if that same value was loaded into a register that still
6706 retains its value at the start of the loop.
6708 If so, we insert an insn after the load to copy the destination of that
6709 load into the equivalent register and (try to) replace our SET_SRC with that
6710 register.
6712 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6714 static void
6715 cse_set_around_loop (x, insn, loop_start)
6716 rtx x;
6717 rtx insn;
6718 rtx loop_start;
6720 struct table_elt *src_elt;
6722 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6723 are setting PC or CC0 or whose SET_SRC is already a register. */
6724 if (GET_CODE (x) == SET
6725 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6726 && GET_CODE (SET_SRC (x)) != REG)
6728 src_elt = lookup (SET_SRC (x),
6729 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6730 GET_MODE (SET_DEST (x)));
6732 if (src_elt)
6733 for (src_elt = src_elt->first_same_value; src_elt;
6734 src_elt = src_elt->next_same_value)
6735 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6736 && COST (src_elt->exp) < COST (SET_SRC (x)))
6738 rtx p, set;
6740 /* Look for an insn in front of LOOP_START that sets
6741 something in the desired mode to SET_SRC (x) before we hit
6742 a label or CALL_INSN. */
6744 for (p = prev_nonnote_insn (loop_start);
6745 p && GET_CODE (p) != CALL_INSN
6746 && GET_CODE (p) != CODE_LABEL;
6747 p = prev_nonnote_insn (p))
6748 if ((set = single_set (p)) != 0
6749 && GET_CODE (SET_DEST (set)) == REG
6750 && GET_MODE (SET_DEST (set)) == src_elt->mode
6751 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6753 /* We now have to ensure that nothing between P
6754 and LOOP_START modified anything referenced in
6755 SET_SRC (x). We know that nothing within the loop
6756 can modify it, or we would have invalidated it in
6757 the hash table. */
6758 rtx q;
6759 rtx cse_check_loop_start_value = SET_SRC (x);
6760 for (q = p; q != loop_start; q = NEXT_INSN (q))
6761 if (INSN_P (q))
6762 note_stores (PATTERN (q),
6763 cse_check_loop_start,
6764 &cse_check_loop_start_value);
6766 /* If nothing was changed and we can replace our
6767 SET_SRC, add an insn after P to copy its destination
6768 to what we will be replacing SET_SRC with. */
6769 if (cse_check_loop_start_value
6770 && validate_change (insn, &SET_SRC (x),
6771 src_elt->exp, 0))
6773 /* If this creates new pseudos, this is unsafe,
6774 because the regno of new pseudo is unsuitable
6775 to index into reg_qty when cse_insn processes
6776 the new insn. Therefore, if a new pseudo was
6777 created, discard this optimization. */
6778 int nregs = max_reg_num ();
6779 rtx move
6780 = gen_move_insn (src_elt->exp, SET_DEST (set));
6781 if (nregs != max_reg_num ())
6783 if (! validate_change (insn, &SET_SRC (x),
6784 SET_SRC (set), 0))
6785 abort ();
6787 else
6788 emit_insn_after (move, p);
6790 break;
6795 /* Deal with the destination of X affecting the stack pointer. */
6796 addr_affects_sp_p (SET_DEST (x));
6798 /* See comment on similar code in cse_insn for explanation of these
6799 tests. */
6800 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6801 || GET_CODE (SET_DEST (x)) == MEM)
6802 invalidate (SET_DEST (x), VOIDmode);
6803 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6804 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6805 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6808 /* Find the end of INSN's basic block and return its range,
6809 the total number of SETs in all the insns of the block, the last insn of the
6810 block, and the branch path.
6812 The branch path indicates which branches should be followed. If a non-zero
6813 path size is specified, the block should be rescanned and a different set
6814 of branches will be taken. The branch path is only used if
6815 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6817 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6818 used to describe the block. It is filled in with the information about
6819 the current block. The incoming structure's branch path, if any, is used
6820 to construct the output branch path. */
6822 void
6823 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6824 rtx insn;
6825 struct cse_basic_block_data *data;
6826 int follow_jumps;
6827 int after_loop;
6828 int skip_blocks;
6830 rtx p = insn, q;
6831 int nsets = 0;
6832 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6833 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6834 int path_size = data->path_size;
6835 int path_entry = 0;
6836 int i;
6838 /* Update the previous branch path, if any. If the last branch was
6839 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6840 shorten the path by one and look at the previous branch. We know that
6841 at least one branch must have been taken if PATH_SIZE is non-zero. */
6842 while (path_size > 0)
6844 if (data->path[path_size - 1].status != NOT_TAKEN)
6846 data->path[path_size - 1].status = NOT_TAKEN;
6847 break;
6849 else
6850 path_size--;
6853 /* If the first instruction is marked with QImode, that means we've
6854 already processed this block. Our caller will look at DATA->LAST
6855 to figure out where to go next. We want to return the next block
6856 in the instruction stream, not some branched-to block somewhere
6857 else. We accomplish this by pretending our called forbid us to
6858 follow jumps, or skip blocks. */
6859 if (GET_MODE (insn) == QImode)
6860 follow_jumps = skip_blocks = 0;
6862 /* Scan to end of this basic block. */
6863 while (p && GET_CODE (p) != CODE_LABEL)
6865 /* Don't cse out the end of a loop. This makes a difference
6866 only for the unusual loops that always execute at least once;
6867 all other loops have labels there so we will stop in any case.
6868 Cse'ing out the end of the loop is dangerous because it
6869 might cause an invariant expression inside the loop
6870 to be reused after the end of the loop. This would make it
6871 hard to move the expression out of the loop in loop.c,
6872 especially if it is one of several equivalent expressions
6873 and loop.c would like to eliminate it.
6875 If we are running after loop.c has finished, we can ignore
6876 the NOTE_INSN_LOOP_END. */
6878 if (! after_loop && GET_CODE (p) == NOTE
6879 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6880 break;
6882 /* Don't cse over a call to setjmp; on some machines (eg vax)
6883 the regs restored by the longjmp come from
6884 a later time than the setjmp. */
6885 if (GET_CODE (p) == NOTE
6886 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6887 break;
6889 /* A PARALLEL can have lots of SETs in it,
6890 especially if it is really an ASM_OPERANDS. */
6891 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6892 nsets += XVECLEN (PATTERN (p), 0);
6893 else if (GET_CODE (p) != NOTE)
6894 nsets += 1;
6896 /* Ignore insns made by CSE; they cannot affect the boundaries of
6897 the basic block. */
6899 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6900 high_cuid = INSN_CUID (p);
6901 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6902 low_cuid = INSN_CUID (p);
6904 /* See if this insn is in our branch path. If it is and we are to
6905 take it, do so. */
6906 if (path_entry < path_size && data->path[path_entry].branch == p)
6908 if (data->path[path_entry].status != NOT_TAKEN)
6909 p = JUMP_LABEL (p);
6911 /* Point to next entry in path, if any. */
6912 path_entry++;
6915 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6916 was specified, we haven't reached our maximum path length, there are
6917 insns following the target of the jump, this is the only use of the
6918 jump label, and the target label is preceded by a BARRIER.
6920 Alternatively, we can follow the jump if it branches around a
6921 block of code and there are no other branches into the block.
6922 In this case invalidate_skipped_block will be called to invalidate any
6923 registers set in the block when following the jump. */
6925 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6926 && GET_CODE (p) == JUMP_INSN
6927 && GET_CODE (PATTERN (p)) == SET
6928 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6929 && JUMP_LABEL (p) != 0
6930 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6931 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6933 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6934 if ((GET_CODE (q) != NOTE
6935 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6936 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6937 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6938 break;
6940 /* If we ran into a BARRIER, this code is an extension of the
6941 basic block when the branch is taken. */
6942 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6944 /* Don't allow ourself to keep walking around an
6945 always-executed loop. */
6946 if (next_real_insn (q) == next)
6948 p = NEXT_INSN (p);
6949 continue;
6952 /* Similarly, don't put a branch in our path more than once. */
6953 for (i = 0; i < path_entry; i++)
6954 if (data->path[i].branch == p)
6955 break;
6957 if (i != path_entry)
6958 break;
6960 data->path[path_entry].branch = p;
6961 data->path[path_entry++].status = TAKEN;
6963 /* This branch now ends our path. It was possible that we
6964 didn't see this branch the last time around (when the
6965 insn in front of the target was a JUMP_INSN that was
6966 turned into a no-op). */
6967 path_size = path_entry;
6969 p = JUMP_LABEL (p);
6970 /* Mark block so we won't scan it again later. */
6971 PUT_MODE (NEXT_INSN (p), QImode);
6973 /* Detect a branch around a block of code. */
6974 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6976 register rtx tmp;
6978 if (next_real_insn (q) == next)
6980 p = NEXT_INSN (p);
6981 continue;
6984 for (i = 0; i < path_entry; i++)
6985 if (data->path[i].branch == p)
6986 break;
6988 if (i != path_entry)
6989 break;
6991 /* This is no_labels_between_p (p, q) with an added check for
6992 reaching the end of a function (in case Q precedes P). */
6993 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6994 if (GET_CODE (tmp) == CODE_LABEL)
6995 break;
6997 if (tmp == q)
6999 data->path[path_entry].branch = p;
7000 data->path[path_entry++].status = AROUND;
7002 path_size = path_entry;
7004 p = JUMP_LABEL (p);
7005 /* Mark block so we won't scan it again later. */
7006 PUT_MODE (NEXT_INSN (p), QImode);
7010 p = NEXT_INSN (p);
7013 data->low_cuid = low_cuid;
7014 data->high_cuid = high_cuid;
7015 data->nsets = nsets;
7016 data->last = p;
7018 /* If all jumps in the path are not taken, set our path length to zero
7019 so a rescan won't be done. */
7020 for (i = path_size - 1; i >= 0; i--)
7021 if (data->path[i].status != NOT_TAKEN)
7022 break;
7024 if (i == -1)
7025 data->path_size = 0;
7026 else
7027 data->path_size = path_size;
7029 /* End the current branch path. */
7030 data->path[path_size].branch = 0;
7033 /* Perform cse on the instructions of a function.
7034 F is the first instruction.
7035 NREGS is one plus the highest pseudo-reg number used in the instruction.
7037 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7038 (only if -frerun-cse-after-loop).
7040 Returns 1 if jump_optimize should be redone due to simplifications
7041 in conditional jump instructions. */
7044 cse_main (f, nregs, after_loop, file)
7045 rtx f;
7046 int nregs;
7047 int after_loop;
7048 FILE *file;
7050 struct cse_basic_block_data val;
7051 register rtx insn = f;
7052 register int i;
7054 cse_jumps_altered = 0;
7055 recorded_label_ref = 0;
7056 constant_pool_entries_cost = 0;
7057 val.path_size = 0;
7059 init_recog ();
7060 init_alias_analysis ();
7062 max_reg = nregs;
7064 max_insn_uid = get_max_uid ();
7066 reg_eqv_table = (struct reg_eqv_elem *)
7067 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7069 #ifdef LOAD_EXTEND_OP
7071 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7072 and change the code and mode as appropriate. */
7073 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7074 #endif
7076 /* Reset the counter indicating how many elements have been made
7077 thus far. */
7078 n_elements_made = 0;
7080 /* Find the largest uid. */
7082 max_uid = get_max_uid ();
7083 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7085 /* Compute the mapping from uids to cuids.
7086 CUIDs are numbers assigned to insns, like uids,
7087 except that cuids increase monotonically through the code.
7088 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7089 between two insns is not affected by -g. */
7091 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7093 if (GET_CODE (insn) != NOTE
7094 || NOTE_LINE_NUMBER (insn) < 0)
7095 INSN_CUID (insn) = ++i;
7096 else
7097 /* Give a line number note the same cuid as preceding insn. */
7098 INSN_CUID (insn) = i;
7101 /* Initialize which registers are clobbered by calls. */
7103 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7105 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7106 if ((call_used_regs[i]
7107 /* Used to check !fixed_regs[i] here, but that isn't safe;
7108 fixed regs are still call-clobbered, and sched can get
7109 confused if they can "live across calls".
7111 The frame pointer is always preserved across calls. The arg
7112 pointer is if it is fixed. The stack pointer usually is, unless
7113 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7114 will be present. If we are generating PIC code, the PIC offset
7115 table register is preserved across calls. */
7117 && i != STACK_POINTER_REGNUM
7118 && i != FRAME_POINTER_REGNUM
7119 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7120 && i != HARD_FRAME_POINTER_REGNUM
7121 #endif
7122 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7123 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7124 #endif
7125 #if !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
7126 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7127 #endif
7129 || global_regs[i])
7130 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7132 ggc_push_context ();
7134 /* Loop over basic blocks.
7135 Compute the maximum number of qty's needed for each basic block
7136 (which is 2 for each SET). */
7137 insn = f;
7138 while (insn)
7140 cse_altered = 0;
7141 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7142 flag_cse_skip_blocks);
7144 /* If this basic block was already processed or has no sets, skip it. */
7145 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7147 PUT_MODE (insn, VOIDmode);
7148 insn = (val.last ? NEXT_INSN (val.last) : 0);
7149 val.path_size = 0;
7150 continue;
7153 cse_basic_block_start = val.low_cuid;
7154 cse_basic_block_end = val.high_cuid;
7155 max_qty = val.nsets * 2;
7157 if (file)
7158 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7159 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7160 val.nsets);
7162 /* Make MAX_QTY bigger to give us room to optimize
7163 past the end of this basic block, if that should prove useful. */
7164 if (max_qty < 500)
7165 max_qty = 500;
7167 max_qty += max_reg;
7169 /* If this basic block is being extended by following certain jumps,
7170 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7171 Otherwise, we start after this basic block. */
7172 if (val.path_size > 0)
7173 cse_basic_block (insn, val.last, val.path, 0);
7174 else
7176 int old_cse_jumps_altered = cse_jumps_altered;
7177 rtx temp;
7179 /* When cse changes a conditional jump to an unconditional
7180 jump, we want to reprocess the block, since it will give
7181 us a new branch path to investigate. */
7182 cse_jumps_altered = 0;
7183 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7184 if (cse_jumps_altered == 0
7185 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7186 insn = temp;
7188 cse_jumps_altered |= old_cse_jumps_altered;
7191 if (cse_altered)
7192 ggc_collect ();
7194 #ifdef USE_C_ALLOCA
7195 alloca (0);
7196 #endif
7199 ggc_pop_context ();
7201 if (max_elements_made < n_elements_made)
7202 max_elements_made = n_elements_made;
7204 /* Clean up. */
7205 end_alias_analysis ();
7206 free (uid_cuid);
7207 free (reg_eqv_table);
7209 return cse_jumps_altered || recorded_label_ref;
7212 /* Process a single basic block. FROM and TO and the limits of the basic
7213 block. NEXT_BRANCH points to the branch path when following jumps or
7214 a null path when not following jumps.
7216 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7217 loop. This is true when we are being called for the last time on a
7218 block and this CSE pass is before loop.c. */
7220 static rtx
7221 cse_basic_block (from, to, next_branch, around_loop)
7222 register rtx from, to;
7223 struct branch_path *next_branch;
7224 int around_loop;
7226 register rtx insn;
7227 int to_usage = 0;
7228 rtx libcall_insn = NULL_RTX;
7229 int num_insns = 0;
7231 /* This array is undefined before max_reg, so only allocate
7232 the space actually needed and adjust the start. */
7234 qty_table
7235 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7236 * sizeof (struct qty_table_elem));
7237 qty_table -= max_reg;
7239 new_basic_block ();
7241 /* TO might be a label. If so, protect it from being deleted. */
7242 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7243 ++LABEL_NUSES (to);
7245 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7247 register enum rtx_code code = GET_CODE (insn);
7249 /* If we have processed 1,000 insns, flush the hash table to
7250 avoid extreme quadratic behavior. We must not include NOTEs
7251 in the count since there may be more of them when generating
7252 debugging information. If we clear the table at different
7253 times, code generated with -g -O might be different than code
7254 generated with -O but not -g.
7256 ??? This is a real kludge and needs to be done some other way.
7257 Perhaps for 2.9. */
7258 if (code != NOTE && num_insns++ > 1000)
7260 flush_hash_table ();
7261 num_insns = 0;
7264 /* See if this is a branch that is part of the path. If so, and it is
7265 to be taken, do so. */
7266 if (next_branch->branch == insn)
7268 enum taken status = next_branch++->status;
7269 if (status != NOT_TAKEN)
7271 if (status == TAKEN)
7272 record_jump_equiv (insn, 1);
7273 else
7274 invalidate_skipped_block (NEXT_INSN (insn));
7276 /* Set the last insn as the jump insn; it doesn't affect cc0.
7277 Then follow this branch. */
7278 #ifdef HAVE_cc0
7279 prev_insn_cc0 = 0;
7280 #endif
7281 prev_insn = insn;
7282 insn = JUMP_LABEL (insn);
7283 continue;
7287 if (GET_MODE (insn) == QImode)
7288 PUT_MODE (insn, VOIDmode);
7290 if (GET_RTX_CLASS (code) == 'i')
7292 rtx p;
7294 /* Process notes first so we have all notes in canonical forms when
7295 looking for duplicate operations. */
7297 if (REG_NOTES (insn))
7298 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7300 /* Track when we are inside in LIBCALL block. Inside such a block,
7301 we do not want to record destinations. The last insn of a
7302 LIBCALL block is not considered to be part of the block, since
7303 its destination is the result of the block and hence should be
7304 recorded. */
7306 if (REG_NOTES (insn) != 0)
7308 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7309 libcall_insn = XEXP (p, 0);
7310 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7311 libcall_insn = 0;
7314 new_label_ref = 0;
7315 cse_insn (insn, libcall_insn);
7317 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL
7318 note for it, we must rerun jump since it needs to place the
7319 note. If this is a LABEL_REF for a CODE_LABEL that isn't in
7320 the insn chain, don't do this since no REG_LABEL will be added. */
7321 if (new_label_ref != 0 && INSN_UID (XEXP (new_label_ref, 0)) != 0
7322 && reg_mentioned_p (new_label_ref, PATTERN (insn))
7323 && ! find_reg_note (insn, REG_LABEL, XEXP (new_label_ref, 0)))
7324 recorded_label_ref = 1;
7327 /* If INSN is now an unconditional jump, skip to the end of our
7328 basic block by pretending that we just did the last insn in the
7329 basic block. If we are jumping to the end of our block, show
7330 that we can have one usage of TO. */
7332 if (any_uncondjump_p (insn))
7334 if (to == 0)
7336 free (qty_table + max_reg);
7337 return 0;
7340 if (JUMP_LABEL (insn) == to)
7341 to_usage = 1;
7343 /* Maybe TO was deleted because the jump is unconditional.
7344 If so, there is nothing left in this basic block. */
7345 /* ??? Perhaps it would be smarter to set TO
7346 to whatever follows this insn,
7347 and pretend the basic block had always ended here. */
7348 if (INSN_DELETED_P (to))
7349 break;
7351 insn = PREV_INSN (to);
7354 /* See if it is ok to keep on going past the label
7355 which used to end our basic block. Remember that we incremented
7356 the count of that label, so we decrement it here. If we made
7357 a jump unconditional, TO_USAGE will be one; in that case, we don't
7358 want to count the use in that jump. */
7360 if (to != 0 && NEXT_INSN (insn) == to
7361 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7363 struct cse_basic_block_data val;
7364 rtx prev;
7366 insn = NEXT_INSN (to);
7368 /* If TO was the last insn in the function, we are done. */
7369 if (insn == 0)
7371 free (qty_table + max_reg);
7372 return 0;
7375 /* If TO was preceded by a BARRIER we are done with this block
7376 because it has no continuation. */
7377 prev = prev_nonnote_insn (to);
7378 if (prev && GET_CODE (prev) == BARRIER)
7380 free (qty_table + max_reg);
7381 return insn;
7384 /* Find the end of the following block. Note that we won't be
7385 following branches in this case. */
7386 to_usage = 0;
7387 val.path_size = 0;
7388 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7390 /* If the tables we allocated have enough space left
7391 to handle all the SETs in the next basic block,
7392 continue through it. Otherwise, return,
7393 and that block will be scanned individually. */
7394 if (val.nsets * 2 + next_qty > max_qty)
7395 break;
7397 cse_basic_block_start = val.low_cuid;
7398 cse_basic_block_end = val.high_cuid;
7399 to = val.last;
7401 /* Prevent TO from being deleted if it is a label. */
7402 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7403 ++LABEL_NUSES (to);
7405 /* Back up so we process the first insn in the extension. */
7406 insn = PREV_INSN (insn);
7410 if (next_qty > max_qty)
7411 abort ();
7413 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7414 the previous insn is the only insn that branches to the head of a loop,
7415 we can cse into the loop. Don't do this if we changed the jump
7416 structure of a loop unless we aren't going to be following jumps. */
7418 if ((cse_jumps_altered == 0
7419 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7420 && around_loop && to != 0
7421 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7422 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7423 && JUMP_LABEL (PREV_INSN (to)) != 0
7424 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7425 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7427 free (qty_table + max_reg);
7429 return to ? NEXT_INSN (to) : 0;
7432 /* Count the number of times registers are used (not set) in X.
7433 COUNTS is an array in which we accumulate the count, INCR is how much
7434 we count each register usage.
7436 Don't count a usage of DEST, which is the SET_DEST of a SET which
7437 contains X in its SET_SRC. This is because such a SET does not
7438 modify the liveness of DEST. */
7440 static void
7441 count_reg_usage (x, counts, dest, incr)
7442 rtx x;
7443 int *counts;
7444 rtx dest;
7445 int incr;
7447 enum rtx_code code;
7448 const char *fmt;
7449 int i, j;
7451 if (x == 0)
7452 return;
7454 switch (code = GET_CODE (x))
7456 case REG:
7457 if (x != dest)
7458 counts[REGNO (x)] += incr;
7459 return;
7461 case PC:
7462 case CC0:
7463 case CONST:
7464 case CONST_INT:
7465 case CONST_DOUBLE:
7466 case SYMBOL_REF:
7467 case LABEL_REF:
7468 return;
7470 case CLOBBER:
7471 /* If we are clobbering a MEM, mark any registers inside the address
7472 as being used. */
7473 if (GET_CODE (XEXP (x, 0)) == MEM)
7474 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7475 return;
7477 case SET:
7478 /* Unless we are setting a REG, count everything in SET_DEST. */
7479 if (GET_CODE (SET_DEST (x)) != REG)
7480 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7482 /* If SRC has side-effects, then we can't delete this insn, so the
7483 usage of SET_DEST inside SRC counts.
7485 ??? Strictly-speaking, we might be preserving this insn
7486 because some other SET has side-effects, but that's hard
7487 to do and can't happen now. */
7488 count_reg_usage (SET_SRC (x), counts,
7489 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7490 incr);
7491 return;
7493 case CALL_INSN:
7494 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7495 /* Fall through. */
7497 case INSN:
7498 case JUMP_INSN:
7499 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7501 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7502 use them. */
7504 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7505 return;
7507 case EXPR_LIST:
7508 case INSN_LIST:
7509 if (REG_NOTE_KIND (x) == REG_EQUAL
7510 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7511 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7512 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7513 return;
7515 default:
7516 break;
7519 fmt = GET_RTX_FORMAT (code);
7520 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7522 if (fmt[i] == 'e')
7523 count_reg_usage (XEXP (x, i), counts, dest, incr);
7524 else if (fmt[i] == 'E')
7525 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7526 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7530 /* Scan all the insns and delete any that are dead; i.e., they store a register
7531 that is never used or they copy a register to itself.
7533 This is used to remove insns made obviously dead by cse, loop or other
7534 optimizations. It improves the heuristics in loop since it won't try to
7535 move dead invariants out of loops or make givs for dead quantities. The
7536 remaining passes of the compilation are also sped up. */
7538 void
7539 delete_trivially_dead_insns (insns, nreg)
7540 rtx insns;
7541 int nreg;
7543 int *counts;
7544 rtx insn, prev;
7545 #ifdef HAVE_cc0
7546 rtx tem;
7547 #endif
7548 int i;
7549 int in_libcall = 0, dead_libcall = 0;
7551 /* First count the number of times each register is used. */
7552 counts = (int *) xcalloc (nreg, sizeof (int));
7553 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7554 count_reg_usage (insn, counts, NULL_RTX, 1);
7556 /* Go from the last insn to the first and delete insns that only set unused
7557 registers or copy a register to itself. As we delete an insn, remove
7558 usage counts for registers it uses.
7560 The first jump optimization pass may leave a real insn as the last
7561 insn in the function. We must not skip that insn or we may end
7562 up deleting code that is not really dead. */
7563 insn = get_last_insn ();
7564 if (! INSN_P (insn))
7565 insn = prev_real_insn (insn);
7567 for (; insn; insn = prev)
7569 int live_insn = 0;
7570 rtx note;
7572 prev = prev_real_insn (insn);
7574 /* Don't delete any insns that are part of a libcall block unless
7575 we can delete the whole libcall block.
7577 Flow or loop might get confused if we did that. Remember
7578 that we are scanning backwards. */
7579 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7581 in_libcall = 1;
7582 live_insn = 1;
7583 dead_libcall = 0;
7585 /* See if there's a REG_EQUAL note on this insn and try to
7586 replace the source with the REG_EQUAL expression.
7588 We assume that insns with REG_RETVALs can only be reg->reg
7589 copies at this point. */
7590 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7591 if (note)
7593 rtx set = single_set (insn);
7594 rtx new = simplify_rtx (XEXP (note, 0));
7596 if (!new)
7597 new = XEXP (note, 0);
7599 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7601 remove_note (insn,
7602 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7603 dead_libcall = 1;
7607 else if (in_libcall)
7608 live_insn = ! dead_libcall;
7609 else if (GET_CODE (PATTERN (insn)) == SET)
7611 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7612 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7613 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7614 SET_SRC (PATTERN (insn))))
7616 else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART
7617 && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0),
7618 SET_SRC (PATTERN (insn))))
7621 #ifdef HAVE_cc0
7622 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7623 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7624 && ((tem = next_nonnote_insn (insn)) == 0
7625 || ! INSN_P (tem)
7626 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7628 #endif
7629 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7630 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7631 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7632 || side_effects_p (SET_SRC (PATTERN (insn)))
7633 /* An ADDRESSOF expression can turn into a use of the
7634 internal arg pointer, so always consider the
7635 internal arg pointer live. If it is truly dead,
7636 flow will delete the initializing insn. */
7637 || (SET_DEST (PATTERN (insn))
7638 == current_function_internal_arg_pointer))
7639 live_insn = 1;
7641 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7642 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7644 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7646 if (GET_CODE (elt) == SET)
7648 if ((GET_CODE (SET_DEST (elt)) == REG
7649 || GET_CODE (SET_DEST (elt)) == SUBREG)
7650 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7653 #ifdef HAVE_cc0
7654 else if (GET_CODE (SET_DEST (elt)) == CC0
7655 && ! side_effects_p (SET_SRC (elt))
7656 && ((tem = next_nonnote_insn (insn)) == 0
7657 || ! INSN_P (tem)
7658 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7660 #endif
7661 else if (GET_CODE (SET_DEST (elt)) != REG
7662 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7663 || counts[REGNO (SET_DEST (elt))] != 0
7664 || side_effects_p (SET_SRC (elt))
7665 /* An ADDRESSOF expression can turn into a use of the
7666 internal arg pointer, so always consider the
7667 internal arg pointer live. If it is truly dead,
7668 flow will delete the initializing insn. */
7669 || (SET_DEST (elt)
7670 == current_function_internal_arg_pointer))
7671 live_insn = 1;
7673 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7674 live_insn = 1;
7676 else
7677 live_insn = 1;
7679 /* If this is a dead insn, delete it and show registers in it aren't
7680 being used. */
7682 if (! live_insn)
7684 count_reg_usage (insn, counts, NULL_RTX, -1);
7685 delete_insn (insn);
7688 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7690 in_libcall = 0;
7691 dead_libcall = 0;
7695 /* Clean up. */
7696 free (counts);