* cp-tree.def (FUNCTION_NAME): New tree node.
[official-gcc.git] / gcc / regmove.c
blob8b047ea972bdcb609eadb39738dead5e91537c19
1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
27 #include "config.h"
28 #include "system.h"
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
30 #include "tm_p.h"
31 #include "insn-config.h"
32 #include "recog.h"
33 #include "output.h"
34 #include "reload.h"
35 #include "regs.h"
36 #include "hard-reg-set.h"
37 #include "flags.h"
38 #include "function.h"
39 #include "expr.h"
40 #include "insn-flags.h"
41 #include "basic-block.h"
42 #include "toplev.h"
44 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
45 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
46 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
47 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
48 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int, int));
49 static int *regmove_bb_head;
51 struct match {
52 int with[MAX_RECOG_OPERANDS];
53 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
54 int commutative[MAX_RECOG_OPERANDS];
55 int early_clobber[MAX_RECOG_OPERANDS];
58 static rtx discover_flags_reg PROTO((void));
59 static void mark_flags_life_zones PROTO((rtx));
60 static void flags_set_1 PROTO((rtx, rtx, void *));
62 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
63 static int find_matches PROTO((rtx, struct match *));
64 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
66 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
67 static int stable_and_no_regs_but_for_p PROTO((rtx, rtx, rtx));
68 static int regclass_compatible_p PROTO((int, int));
69 static int replacement_quality PROTO((rtx));
70 static int fixup_match_2 PROTO((rtx, rtx, rtx, rtx, FILE *));
71 static int loop_depth;
73 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
74 causing too much register allocation problems. */
75 static int
76 regclass_compatible_p (class0, class1)
77 int class0, class1;
79 return (class0 == class1
80 || (reg_class_subset_p (class0, class1)
81 && ! CLASS_LIKELY_SPILLED_P (class0))
82 || (reg_class_subset_p (class1, class0)
83 && ! CLASS_LIKELY_SPILLED_P (class1)));
86 /* Generate and return an insn body to add r1 and c,
87 storing the result in r0. */
88 static rtx
89 gen_add3_insn (r0, r1, c)
90 rtx r0, r1, c;
92 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
94 if (icode == CODE_FOR_nothing
95 || ! ((*insn_data[icode].operand[0].predicate)
96 (r0, insn_data[icode].operand[0].mode))
97 || ! ((*insn_data[icode].operand[1].predicate)
98 (r1, insn_data[icode].operand[1].mode))
99 || ! ((*insn_data[icode].operand[2].predicate)
100 (c, insn_data[icode].operand[2].mode)))
101 return NULL_RTX;
103 return (GEN_FCN (icode) (r0, r1, c));
107 /* INC_INSN is an instruction that adds INCREMENT to REG.
108 Try to fold INC_INSN as a post/pre in/decrement into INSN.
109 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
110 Return nonzero for success. */
111 static int
112 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
113 rtx reg, insn, inc_insn ,inc_insn_set;
114 HOST_WIDE_INT increment;
115 int pre;
117 enum rtx_code inc_code;
119 rtx pset = single_set (insn);
120 if (pset)
122 /* Can't use the size of SET_SRC, we might have something like
123 (sign_extend:SI (mem:QI ... */
124 rtx use = find_use_as_address (pset, reg, 0);
125 if (use != 0 && use != (rtx) 1)
127 int size = GET_MODE_SIZE (GET_MODE (use));
128 if (0
129 || (HAVE_POST_INCREMENT
130 && pre == 0 && (inc_code = POST_INC, increment == size))
131 || (HAVE_PRE_INCREMENT
132 && pre == 1 && (inc_code = PRE_INC, increment == size))
133 || (HAVE_POST_DECREMENT
134 && pre == 0 && (inc_code = POST_DEC, increment == -size))
135 || (HAVE_PRE_DECREMENT
136 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
139 if (inc_insn_set)
140 validate_change
141 (inc_insn,
142 &SET_SRC (inc_insn_set),
143 XEXP (SET_SRC (inc_insn_set), 0), 1);
144 validate_change (insn, &XEXP (use, 0),
145 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
146 if (apply_change_group ())
148 REG_NOTES (insn)
149 = gen_rtx_EXPR_LIST (REG_INC,
150 reg, REG_NOTES (insn));
151 if (! inc_insn_set)
153 PUT_CODE (inc_insn, NOTE);
154 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
155 NOTE_SOURCE_FILE (inc_insn) = 0;
157 return 1;
162 return 0;
165 /* Determine if the pattern generated by add_optab has a clobber,
166 such as might be issued for a flags hard register. To make the
167 code elsewhere simpler, we handle cc0 in this same framework.
169 Return the register if one was discovered. Return NULL_RTX if
170 if no flags were found. Return pc_rtx if we got confused. */
172 static rtx
173 discover_flags_reg ()
175 rtx tmp;
176 tmp = gen_rtx_REG (word_mode, 10000);
177 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
179 /* If we get something that isn't a simple set, or a
180 [(set ..) (clobber ..)], this whole function will go wrong. */
181 if (GET_CODE (tmp) == SET)
182 return NULL_RTX;
183 else if (GET_CODE (tmp) == PARALLEL)
185 int found;
187 if (XVECLEN (tmp, 0) != 2)
188 return pc_rtx;
189 tmp = XVECEXP (tmp, 0, 1);
190 if (GET_CODE (tmp) != CLOBBER)
191 return pc_rtx;
192 tmp = XEXP (tmp, 0);
194 /* Don't do anything foolish if the md wanted to clobber a
195 scratch or something. We only care about hard regs.
196 Moreover we don't like the notion of subregs of hard regs. */
197 if (GET_CODE (tmp) == SUBREG
198 && GET_CODE (SUBREG_REG (tmp)) == REG
199 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
200 return pc_rtx;
201 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
203 return (found ? tmp : NULL_RTX);
206 return pc_rtx;
209 /* It is a tedious task identifying when the flags register is live and
210 when it is safe to optimize. Since we process the instruction stream
211 multiple times, locate and record these live zones by marking the
212 mode of the instructions --
214 QImode is used on the instruction at which the flags becomes live.
216 HImode is used within the range (exclusive) that the flags are
217 live. Thus the user of the flags is not marked.
219 All other instructions are cleared to VOIDmode. */
221 /* Used to communicate with flags_set_1. */
222 static rtx flags_set_1_rtx;
223 static int flags_set_1_set;
225 static void
226 mark_flags_life_zones (flags)
227 rtx flags;
229 int flags_regno;
230 int flags_nregs;
231 int block;
233 #ifdef HAVE_cc0
234 /* If we found a flags register on a cc0 host, bail. */
235 if (flags == NULL_RTX)
236 flags = cc0_rtx;
237 else if (flags != cc0_rtx)
238 flags = pc_rtx;
239 #endif
241 /* Simple cases first: if no flags, clear all modes. If confusing,
242 mark the entire function as being in a flags shadow. */
243 if (flags == NULL_RTX || flags == pc_rtx)
245 enum machine_mode mode = (flags ? HImode : VOIDmode);
246 rtx insn;
247 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
248 PUT_MODE (insn, mode);
249 return;
252 #ifdef HAVE_cc0
253 flags_regno = -1;
254 flags_nregs = 1;
255 #else
256 flags_regno = REGNO (flags);
257 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
258 #endif
259 flags_set_1_rtx = flags;
261 /* Process each basic block. */
262 for (block = n_basic_blocks - 1; block >= 0; block--)
264 rtx insn, end;
265 int live;
267 insn = BLOCK_HEAD (block);
268 end = BLOCK_END (block);
270 /* Look out for the (unlikely) case of flags being live across
271 basic block boundaries. */
272 live = 0;
273 #ifndef HAVE_cc0
275 int i;
276 for (i = 0; i < flags_nregs; ++i)
277 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
278 flags_regno + i);
280 #endif
282 while (1)
284 /* Process liveness in reverse order of importance --
285 alive, death, birth. This lets more important info
286 overwrite the mode of lesser info. */
288 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
290 #ifdef HAVE_cc0
291 /* In the cc0 case, death is not marked in reg notes,
292 but is instead the mere use of cc0 when it is alive. */
293 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
294 live = 0;
295 #else
296 /* In the hard reg case, we watch death notes. */
297 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
298 live = 0;
299 #endif
300 PUT_MODE (insn, (live ? HImode : VOIDmode));
302 /* In either case, birth is denoted simply by it's presence
303 as the destination of a set. */
304 flags_set_1_set = 0;
305 note_stores (PATTERN (insn), flags_set_1, NULL);
306 if (flags_set_1_set)
308 live = 1;
309 PUT_MODE (insn, QImode);
312 else
313 PUT_MODE (insn, (live ? HImode : VOIDmode));
315 if (insn == end)
316 break;
317 insn = NEXT_INSN (insn);
322 /* A subroutine of mark_flags_life_zones, called through note_stores. */
324 static void
325 flags_set_1 (x, pat, data)
326 rtx x, pat;
327 void *data ATTRIBUTE_UNUSED;
329 if (GET_CODE (pat) == SET
330 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
331 flags_set_1_set = 1;
334 static int *regno_src_regno;
336 /* Indicate how good a choice REG (which appears as a source) is to replace
337 a destination register with. The higher the returned value, the better
338 the choice. The main objective is to avoid using a register that is
339 a candidate for tying to a hard register, since the output might in
340 turn be a candidate to be tied to a different hard register. */
341 static int
342 replacement_quality(reg)
343 rtx reg;
345 int src_regno;
347 /* Bad if this isn't a register at all. */
348 if (GET_CODE (reg) != REG)
349 return 0;
351 /* If this register is not meant to get a hard register,
352 it is a poor choice. */
353 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
354 return 0;
356 src_regno = regno_src_regno[REGNO (reg)];
358 /* If it was not copied from another register, it is fine. */
359 if (src_regno < 0)
360 return 3;
362 /* Copied from a hard register? */
363 if (src_regno < FIRST_PSEUDO_REGISTER)
364 return 1;
366 /* Copied from a pseudo register - not as bad as from a hard register,
367 yet still cumbersome, since the register live length will be lengthened
368 when the registers get tied. */
369 return 2;
372 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
373 in INSN.
375 Search forward to see if SRC dies before either it or DEST is modified,
376 but don't scan past the end of a basic block. If so, we can replace SRC
377 with DEST and let SRC die in INSN.
379 This will reduce the number of registers live in that range and may enable
380 DEST to be tied to SRC, thus often saving one register in addition to a
381 register-register copy. */
383 static int
384 optimize_reg_copy_1 (insn, dest, src)
385 rtx insn;
386 rtx dest;
387 rtx src;
389 rtx p, q;
390 rtx note;
391 rtx dest_death = 0;
392 int sregno = REGNO (src);
393 int dregno = REGNO (dest);
395 /* We don't want to mess with hard regs if register classes are small. */
396 if (sregno == dregno
397 || (SMALL_REGISTER_CLASSES
398 && (sregno < FIRST_PSEUDO_REGISTER
399 || dregno < FIRST_PSEUDO_REGISTER))
400 /* We don't see all updates to SP if they are in an auto-inc memory
401 reference, so we must disallow this optimization on them. */
402 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
403 return 0;
405 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
407 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
408 || (GET_CODE (p) == NOTE
409 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
410 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
411 break;
413 /* ??? We can't scan past the end of a basic block without updating
414 the register lifetime info (REG_DEAD/basic_block_live_at_start).
415 A CALL_INSN might be the last insn of a basic block, if it is inside
416 an EH region. There is no easy way to tell, so we just always break
417 when we see a CALL_INSN if flag_exceptions is nonzero. */
418 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
419 break;
421 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
422 continue;
424 if (reg_set_p (src, p) || reg_set_p (dest, p)
425 /* Don't change a USE of a register. */
426 || (GET_CODE (PATTERN (p)) == USE
427 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
428 break;
430 /* See if all of SRC dies in P. This test is slightly more
431 conservative than it needs to be. */
432 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
433 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
435 int failed = 0;
436 int d_length = 0;
437 int s_length = 0;
438 int d_n_calls = 0;
439 int s_n_calls = 0;
441 /* We can do the optimization. Scan forward from INSN again,
442 replacing regs as we go. Set FAILED if a replacement can't
443 be done. In that case, we can't move the death note for SRC.
444 This should be rare. */
446 /* Set to stop at next insn. */
447 for (q = next_real_insn (insn);
448 q != next_real_insn (p);
449 q = next_real_insn (q))
451 if (reg_overlap_mentioned_p (src, PATTERN (q)))
453 /* If SRC is a hard register, we might miss some
454 overlapping registers with validate_replace_rtx,
455 so we would have to undo it. We can't if DEST is
456 present in the insn, so fail in that combination
457 of cases. */
458 if (sregno < FIRST_PSEUDO_REGISTER
459 && reg_mentioned_p (dest, PATTERN (q)))
460 failed = 1;
462 /* Replace all uses and make sure that the register
463 isn't still present. */
464 else if (validate_replace_rtx (src, dest, q)
465 && (sregno >= FIRST_PSEUDO_REGISTER
466 || ! reg_overlap_mentioned_p (src,
467 PATTERN (q))))
469 /* We assume that a register is used exactly once per
470 insn in the REG_N_REFS updates below. If this is not
471 correct, no great harm is done.
473 Since we do not know if we will change the lifetime of
474 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH
475 or REG_N_CALLS_CROSSED at this time. */
476 if (sregno >= FIRST_PSEUDO_REGISTER)
477 REG_N_REFS (sregno) -= loop_depth;
479 if (dregno >= FIRST_PSEUDO_REGISTER)
480 REG_N_REFS (dregno) += loop_depth;
482 else
484 validate_replace_rtx (dest, src, q);
485 failed = 1;
489 /* For SREGNO, count the total number of insns scanned.
490 For DREGNO, count the total number of insns scanned after
491 passing the death note for DREGNO. */
492 s_length++;
493 if (dest_death)
494 d_length++;
496 /* If the insn in which SRC dies is a CALL_INSN, don't count it
497 as a call that has been crossed. Otherwise, count it. */
498 if (q != p && GET_CODE (q) == CALL_INSN)
500 /* Similarly, total calls for SREGNO, total calls beyond
501 the death note for DREGNO. */
502 s_n_calls++;
503 if (dest_death)
504 d_n_calls++;
507 /* If DEST dies here, remove the death note and save it for
508 later. Make sure ALL of DEST dies here; again, this is
509 overly conservative. */
510 if (dest_death == 0
511 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
513 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
514 failed = 1, dest_death = 0;
515 else
516 remove_note (q, dest_death);
520 if (! failed)
522 /* These counters need to be updated if and only if we are
523 going to move the REG_DEAD note. */
524 if (sregno >= FIRST_PSEUDO_REGISTER)
526 if (REG_LIVE_LENGTH (sregno) >= 0)
528 REG_LIVE_LENGTH (sregno) -= s_length;
529 /* REG_LIVE_LENGTH is only an approximation after
530 combine if sched is not run, so make sure that we
531 still have a reasonable value. */
532 if (REG_LIVE_LENGTH (sregno) < 2)
533 REG_LIVE_LENGTH (sregno) = 2;
536 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
539 /* Move death note of SRC from P to INSN. */
540 remove_note (p, note);
541 XEXP (note, 1) = REG_NOTES (insn);
542 REG_NOTES (insn) = note;
545 /* Put death note of DEST on P if we saw it die. */
546 if (dest_death)
548 XEXP (dest_death, 1) = REG_NOTES (p);
549 REG_NOTES (p) = dest_death;
551 if (dregno >= FIRST_PSEUDO_REGISTER)
553 /* If and only if we are moving the death note for DREGNO,
554 then we need to update its counters. */
555 if (REG_LIVE_LENGTH (dregno) >= 0)
556 REG_LIVE_LENGTH (dregno) += d_length;
557 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
561 return ! failed;
564 /* If SRC is a hard register which is set or killed in some other
565 way, we can't do this optimization. */
566 else if (sregno < FIRST_PSEUDO_REGISTER
567 && dead_or_set_p (p, src))
568 break;
570 return 0;
573 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
574 a sequence of insns that modify DEST followed by an insn that sets
575 SRC to DEST in which DEST dies, with no prior modification of DEST.
576 (There is no need to check if the insns in between actually modify
577 DEST. We should not have cases where DEST is not modified, but
578 the optimization is safe if no such modification is detected.)
579 In that case, we can replace all uses of DEST, starting with INSN and
580 ending with the set of SRC to DEST, with SRC. We do not do this
581 optimization if a CALL_INSN is crossed unless SRC already crosses a
582 call or if DEST dies before the copy back to SRC.
584 It is assumed that DEST and SRC are pseudos; it is too complicated to do
585 this for hard registers since the substitutions we may make might fail. */
587 static void
588 optimize_reg_copy_2 (insn, dest, src)
589 rtx insn;
590 rtx dest;
591 rtx src;
593 rtx p, q;
594 rtx set;
595 int sregno = REGNO (src);
596 int dregno = REGNO (dest);
598 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
600 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
601 || (GET_CODE (p) == NOTE
602 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
603 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
604 break;
606 /* ??? We can't scan past the end of a basic block without updating
607 the register lifetime info (REG_DEAD/basic_block_live_at_start).
608 A CALL_INSN might be the last insn of a basic block, if it is inside
609 an EH region. There is no easy way to tell, so we just always break
610 when we see a CALL_INSN if flag_exceptions is nonzero. */
611 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
612 break;
614 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
615 continue;
617 set = single_set (p);
618 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
619 && find_reg_note (p, REG_DEAD, dest))
621 /* We can do the optimization. Scan forward from INSN again,
622 replacing regs as we go. */
624 /* Set to stop at next insn. */
625 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
626 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
628 if (reg_mentioned_p (dest, PATTERN (q)))
630 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
632 /* We assume that a register is used exactly once per
633 insn in the updates below. If this is not correct,
634 no great harm is done. */
635 REG_N_REFS (dregno) -= loop_depth;
636 REG_N_REFS (sregno) += loop_depth;
640 if (GET_CODE (q) == CALL_INSN)
642 REG_N_CALLS_CROSSED (dregno)--;
643 REG_N_CALLS_CROSSED (sregno)++;
647 remove_note (p, find_reg_note (p, REG_DEAD, dest));
648 REG_N_DEATHS (dregno)--;
649 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
650 REG_N_DEATHS (sregno)--;
651 return;
654 if (reg_set_p (src, p)
655 || find_reg_note (p, REG_DEAD, dest)
656 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
657 break;
660 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
661 Look if SRC dies there, and if it is only set once, by loading
662 it from memory. If so, try to encorporate the zero/sign extension
663 into the memory read, change SRC to the mode of DEST, and alter
664 the remaining accesses to use the appropriate SUBREG. This allows
665 SRC and DEST to be tied later. */
666 static void
667 optimize_reg_copy_3 (insn, dest, src)
668 rtx insn;
669 rtx dest;
670 rtx src;
672 rtx src_reg = XEXP (src, 0);
673 int src_no = REGNO (src_reg);
674 int dst_no = REGNO (dest);
675 rtx p, set, subreg;
676 enum machine_mode old_mode;
678 if (src_no < FIRST_PSEUDO_REGISTER
679 || dst_no < FIRST_PSEUDO_REGISTER
680 || ! find_reg_note (insn, REG_DEAD, src_reg)
681 || REG_N_SETS (src_no) != 1)
682 return;
683 for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
685 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
686 || (GET_CODE (p) == NOTE
687 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
688 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
689 return;
691 /* ??? We can't scan past the end of a basic block without updating
692 the register lifetime info (REG_DEAD/basic_block_live_at_start).
693 A CALL_INSN might be the last insn of a basic block, if it is inside
694 an EH region. There is no easy way to tell, so we just always break
695 when we see a CALL_INSN if flag_exceptions is nonzero. */
696 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
697 return;
699 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
700 continue;
702 if (! p)
703 return;
705 if (! (set = single_set (p))
706 || GET_CODE (SET_SRC (set)) != MEM
707 || SET_DEST (set) != src_reg)
708 return;
710 /* Be conserative: although this optimization is also valid for
711 volatile memory references, that could cause trouble in later passes. */
712 if (MEM_VOLATILE_P (SET_SRC (set)))
713 return;
715 /* Do not use a SUBREG to truncate from one mode to another if truncation
716 is not a nop. */
717 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
718 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
719 GET_MODE_BITSIZE (GET_MODE (src_reg))))
720 return;
722 old_mode = GET_MODE (src_reg);
723 PUT_MODE (src_reg, GET_MODE (src));
724 XEXP (src, 0) = SET_SRC (set);
726 /* Include this change in the group so that it's easily undone if
727 one of the changes in the group is invalid. */
728 validate_change (p, &SET_SRC (set), src, 1);
730 /* Now walk forward making additional replacements. We want to be able
731 to undo all the changes if a later substitution fails. */
732 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
733 while (p = NEXT_INSN (p), p != insn)
735 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
736 continue;
738 /* Make a tenative change. */
739 validate_replace_rtx_group (src_reg, subreg, p);
742 validate_replace_rtx_group (src, src_reg, insn);
744 /* Now see if all the changes are valid. */
745 if (! apply_change_group ())
747 /* One or more changes were no good. Back out everything. */
748 PUT_MODE (src_reg, old_mode);
749 XEXP (src, 0) = src_reg;
754 /* If we were not able to update the users of src to use dest directly, try
755 instead moving the value to dest directly before the operation. */
757 static void
758 copy_src_to_dest (insn, src, dest, loop_depth, old_max_uid)
759 rtx insn;
760 rtx src;
761 rtx dest;
762 int loop_depth;
763 int old_max_uid;
765 rtx seq;
766 rtx link;
767 rtx next;
768 rtx set;
769 rtx move_insn;
770 rtx *p_insn_notes;
771 rtx *p_move_notes;
772 int src_regno;
773 int dest_regno;
774 int bb;
775 int insn_uid;
776 int move_uid;
778 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
779 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
780 parameter when there is no frame pointer that is not allocated a register.
781 For now, we just reject them, rather than incrementing the live length. */
783 if (GET_CODE (src) == REG
784 && REG_LIVE_LENGTH (REGNO (src)) > 0
785 && GET_CODE (dest) == REG
786 && REG_LIVE_LENGTH (REGNO (dest)) > 0
787 && (set = single_set (insn)) != NULL_RTX
788 && !reg_mentioned_p (dest, SET_SRC (set))
789 && GET_MODE (src) == GET_MODE (dest))
791 int old_num_regs = reg_rtx_no;
793 /* Generate the src->dest move. */
794 start_sequence ();
795 emit_move_insn (dest, src);
796 seq = gen_sequence ();
797 end_sequence ();
798 /* If this sequence uses new registers, we may not use it. */
799 if (old_num_regs != reg_rtx_no
800 || ! validate_replace_rtx (src, dest, insn))
802 /* We have to restore reg_rtx_no to its old value, lest
803 recompute_reg_usage will try to compute the usage of the
804 new regs, yet reg_n_info is not valid for them. */
805 reg_rtx_no = old_num_regs;
806 return;
808 emit_insn_before (seq, insn);
809 move_insn = PREV_INSN (insn);
810 p_move_notes = &REG_NOTES (move_insn);
811 p_insn_notes = &REG_NOTES (insn);
813 /* Move any notes mentioning src to the move instruction */
814 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
816 next = XEXP (link, 1);
817 if (XEXP (link, 0) == src)
819 *p_move_notes = link;
820 p_move_notes = &XEXP (link, 1);
822 else
824 *p_insn_notes = link;
825 p_insn_notes = &XEXP (link, 1);
829 *p_move_notes = NULL_RTX;
830 *p_insn_notes = NULL_RTX;
832 /* Is the insn the head of a basic block? If so extend it */
833 insn_uid = INSN_UID (insn);
834 move_uid = INSN_UID (move_insn);
835 if (insn_uid < old_max_uid)
837 bb = regmove_bb_head[insn_uid];
838 if (bb >= 0)
840 BLOCK_HEAD (bb) = move_insn;
841 regmove_bb_head[insn_uid] = -1;
845 /* Update the various register tables. */
846 dest_regno = REGNO (dest);
847 REG_N_SETS (dest_regno) += loop_depth;
848 REG_N_REFS (dest_regno) += loop_depth;
849 REG_LIVE_LENGTH (dest_regno)++;
850 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
851 REGNO_FIRST_UID (dest_regno) = move_uid;
853 src_regno = REGNO (src);
854 if (! find_reg_note (move_insn, REG_DEAD, src))
855 REG_LIVE_LENGTH (src_regno)++;
857 if (REGNO_FIRST_UID (src_regno) == insn_uid)
858 REGNO_FIRST_UID (src_regno) = move_uid;
860 if (REGNO_LAST_UID (src_regno) == insn_uid)
861 REGNO_LAST_UID (src_regno) = move_uid;
863 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
864 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
869 /* Return whether REG is set in only one location, and is set to a
870 constant, but is set in a different basic block from INSN (an
871 instructions which uses REG). In this case REG is equivalent to a
872 constant, and we don't want to break that equivalence, because that
873 may increase register pressure and make reload harder. If REG is
874 set in the same basic block as INSN, we don't worry about it,
875 because we'll probably need a register anyhow (??? but what if REG
876 is used in a different basic block as well as this one?). FIRST is
877 the first insn in the function. */
879 static int
880 reg_is_remote_constant_p (reg, insn, first)
881 rtx reg;
882 rtx insn;
883 rtx first;
885 register rtx p;
887 if (REG_N_SETS (REGNO (reg)) != 1)
888 return 0;
890 /* Look for the set. */
891 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
893 rtx s;
895 if (REG_NOTE_KIND (p) != 0)
896 continue;
897 s = single_set (XEXP (p, 0));
898 if (s != 0
899 && GET_CODE (SET_DEST (s)) == REG
900 && REGNO (SET_DEST (s)) == REGNO (reg))
902 /* The register is set in the same basic block. */
903 return 0;
907 for (p = first; p && p != insn; p = NEXT_INSN (p))
909 rtx s;
911 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
912 continue;
913 s = single_set (p);
914 if (s != 0
915 && GET_CODE (SET_DEST (s)) == REG
916 && REGNO (SET_DEST (s)) == REGNO (reg))
918 /* This is the instruction which sets REG. If there is a
919 REG_EQUAL note, then REG is equivalent to a constant. */
920 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
921 return 1;
922 return 0;
926 return 0;
929 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
930 another add immediate instruction with the same source and dest registers,
931 and if we find one, we change INSN to an increment, and return 1. If
932 no changes are made, we return 0.
934 This changes
935 (set (reg100) (plus reg1 offset1))
937 (set (reg100) (plus reg1 offset2))
939 (set (reg100) (plus reg1 offset1))
941 (set (reg100) (plus reg100 offset2-offset1)) */
943 /* ??? What does this comment mean? */
944 /* cse disrupts preincrement / postdecrement squences when it finds a
945 hard register as ultimate source, like the frame pointer. */
947 static int
948 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
949 rtx insn, dst, src, offset;
950 FILE *regmove_dump_file;
952 rtx p, dst_death = 0;
953 int length, num_calls = 0;
955 /* If SRC dies in INSN, we'd have to move the death note. This is
956 considered to be very unlikely, so we just skip the optimization
957 in this case. */
958 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
959 return 0;
961 /* Scan backward to find the first instruction that sets DST. */
963 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
965 rtx pset;
967 if (GET_CODE (p) == CODE_LABEL
968 || GET_CODE (p) == JUMP_INSN
969 || (GET_CODE (p) == NOTE
970 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
971 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
972 break;
974 /* ??? We can't scan past the end of a basic block without updating
975 the register lifetime info (REG_DEAD/basic_block_live_at_start).
976 A CALL_INSN might be the last insn of a basic block, if it is inside
977 an EH region. There is no easy way to tell, so we just always break
978 when we see a CALL_INSN if flag_exceptions is nonzero. */
979 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
980 break;
982 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
983 continue;
985 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
986 dst_death = p;
987 if (! dst_death)
988 length++;
990 pset = single_set (p);
991 if (pset && SET_DEST (pset) == dst
992 && GET_CODE (SET_SRC (pset)) == PLUS
993 && XEXP (SET_SRC (pset), 0) == src
994 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
996 HOST_WIDE_INT newconst
997 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
998 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
1000 if (add && validate_change (insn, &PATTERN (insn), add, 0))
1002 /* Remove the death note for DST from DST_DEATH. */
1003 if (dst_death)
1005 remove_death (REGNO (dst), dst_death);
1006 REG_LIVE_LENGTH (REGNO (dst)) += length;
1007 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
1010 REG_N_REFS (REGNO (dst)) += loop_depth;
1011 REG_N_REFS (REGNO (src)) -= loop_depth;
1013 if (regmove_dump_file)
1014 fprintf (regmove_dump_file,
1015 "Fixed operand of insn %d.\n",
1016 INSN_UID (insn));
1018 #ifdef AUTO_INC_DEC
1019 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
1021 if (GET_CODE (p) == CODE_LABEL
1022 || GET_CODE (p) == JUMP_INSN
1023 || (GET_CODE (p) == NOTE
1024 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1025 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1026 break;
1027 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1028 continue;
1029 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1031 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1032 return 1;
1033 break;
1036 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1038 if (GET_CODE (p) == CODE_LABEL
1039 || GET_CODE (p) == JUMP_INSN
1040 || (GET_CODE (p) == NOTE
1041 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1042 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1043 break;
1044 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1045 continue;
1046 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1048 try_auto_increment (p, insn, 0, dst, newconst, 1);
1049 break;
1052 #endif
1053 return 1;
1057 if (reg_set_p (dst, PATTERN (p)))
1058 break;
1060 /* If we have passed a call instruction, and the
1061 pseudo-reg SRC is not already live across a call,
1062 then don't perform the optimization. */
1063 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1064 hard regs are clobbered. Thus, we only use it for src for
1065 non-call insns. */
1066 if (GET_CODE (p) == CALL_INSN)
1068 if (! dst_death)
1069 num_calls++;
1071 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1072 break;
1074 if (call_used_regs [REGNO (dst)]
1075 || find_reg_fusage (p, CLOBBER, dst))
1076 break;
1078 else if (reg_set_p (src, PATTERN (p)))
1079 break;
1082 return 0;
1085 void
1086 regmove_optimize (f, nregs, regmove_dump_file)
1087 rtx f;
1088 int nregs;
1089 FILE *regmove_dump_file;
1091 int old_max_uid = get_max_uid ();
1092 rtx insn;
1093 struct match match;
1094 int pass;
1095 int i;
1096 rtx copy_src, copy_dst;
1098 /* Find out where a potential flags register is live, and so that we
1099 can supress some optimizations in those zones. */
1100 mark_flags_life_zones (discover_flags_reg ());
1102 regno_src_regno = (int *) xmalloc (sizeof *regno_src_regno * nregs);
1103 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1105 regmove_bb_head = (int *) xmalloc (sizeof (int) * (old_max_uid + 1));
1106 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1107 for (i = 0; i < n_basic_blocks; i++)
1108 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1110 /* A forward/backward pass. Replace output operands with input operands. */
1112 loop_depth = 1;
1114 for (pass = 0; pass <= 2; pass++)
1116 if (! flag_regmove && pass >= flag_expensive_optimizations)
1117 goto done;
1119 if (regmove_dump_file)
1120 fprintf (regmove_dump_file, "Starting %s pass...\n",
1121 pass ? "backward" : "forward");
1123 for (insn = pass ? get_last_insn () : f; insn;
1124 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1126 rtx set;
1127 int op_no, match_no;
1129 if (GET_CODE (insn) == NOTE)
1131 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1132 loop_depth++;
1133 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1134 loop_depth--;
1137 set = single_set (insn);
1138 if (! set)
1139 continue;
1141 if (flag_expensive_optimizations && ! pass
1142 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1143 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1144 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1145 && GET_CODE (SET_DEST(set)) == REG)
1146 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1148 if (flag_expensive_optimizations && ! pass
1149 && GET_CODE (SET_SRC (set)) == REG
1150 && GET_CODE (SET_DEST(set)) == REG)
1152 /* If this is a register-register copy where SRC is not dead,
1153 see if we can optimize it. If this optimization succeeds,
1154 it will become a copy where SRC is dead. */
1155 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1156 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1157 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1159 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1160 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1161 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1162 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1163 && SET_SRC (set) != SET_DEST (set))
1165 int srcregno = REGNO (SET_SRC(set));
1166 if (regno_src_regno[srcregno] >= 0)
1167 srcregno = regno_src_regno[srcregno];
1168 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1172 if (! flag_regmove)
1173 continue;
1175 if (! find_matches (insn, &match))
1176 continue;
1178 /* Now scan through the operands looking for a source operand
1179 which is supposed to match the destination operand.
1180 Then scan forward for an instruction which uses the dest
1181 operand.
1182 If it dies there, then replace the dest in both operands with
1183 the source operand. */
1185 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1187 rtx src, dst, src_subreg;
1188 enum reg_class src_class, dst_class;
1190 match_no = match.with[op_no];
1192 /* Nothing to do if the two operands aren't supposed to match. */
1193 if (match_no < 0)
1194 continue;
1196 src = recog_data.operand[op_no];
1197 dst = recog_data.operand[match_no];
1199 if (GET_CODE (src) != REG)
1200 continue;
1202 src_subreg = src;
1203 if (GET_CODE (dst) == SUBREG
1204 && GET_MODE_SIZE (GET_MODE (dst))
1205 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1207 src_subreg
1208 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1209 src, SUBREG_WORD (dst));
1210 dst = SUBREG_REG (dst);
1212 if (GET_CODE (dst) != REG
1213 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1214 continue;
1216 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1218 if (match.commutative[op_no] < op_no)
1219 regno_src_regno[REGNO (dst)] = REGNO (src);
1220 continue;
1223 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1224 continue;
1226 /* op_no/src must be a read-only operand, and
1227 match_operand/dst must be a write-only operand. */
1228 if (match.use[op_no] != READ
1229 || match.use[match_no] != WRITE)
1230 continue;
1232 if (match.early_clobber[match_no]
1233 && count_occurrences (PATTERN (insn), src) > 1)
1234 continue;
1236 /* Make sure match_operand is the destination. */
1237 if (recog_data.operand[match_no] != SET_DEST (set))
1238 continue;
1240 /* If the operands already match, then there is nothing to do. */
1241 if (operands_match_p (src, dst))
1242 continue;
1244 /* But in the commutative case, we might find a better match. */
1245 if (match.commutative[op_no] >= 0)
1247 rtx comm = recog_data.operand[match.commutative[op_no]];
1248 if (operands_match_p (comm, dst)
1249 && (replacement_quality (comm)
1250 >= replacement_quality (src)))
1251 continue;
1254 src_class = reg_preferred_class (REGNO (src));
1255 dst_class = reg_preferred_class (REGNO (dst));
1256 if (! regclass_compatible_p (src_class, dst_class))
1257 continue;
1259 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1260 op_no, match_no,
1261 regmove_dump_file))
1262 break;
1267 /* A backward pass. Replace input operands with output operands. */
1269 if (regmove_dump_file)
1270 fprintf (regmove_dump_file, "Starting backward pass...\n");
1272 loop_depth = 1;
1274 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1276 if (GET_CODE (insn) == NOTE)
1278 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1279 loop_depth++;
1280 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1281 loop_depth--;
1283 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1285 int op_no, match_no;
1286 int success = 0;
1288 if (! find_matches (insn, &match))
1289 continue;
1291 /* Now scan through the operands looking for a destination operand
1292 which is supposed to match a source operand.
1293 Then scan backward for an instruction which sets the source
1294 operand. If safe, then replace the source operand with the
1295 dest operand in both instructions. */
1297 copy_src = NULL_RTX;
1298 copy_dst = NULL_RTX;
1299 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1301 rtx set, p, src, dst;
1302 rtx src_note, dst_note;
1303 int num_calls = 0;
1304 enum reg_class src_class, dst_class;
1305 int length;
1307 match_no = match.with[op_no];
1309 /* Nothing to do if the two operands aren't supposed to match. */
1310 if (match_no < 0)
1311 continue;
1313 dst = recog_data.operand[match_no];
1314 src = recog_data.operand[op_no];
1316 if (GET_CODE (src) != REG)
1317 continue;
1319 if (GET_CODE (dst) != REG
1320 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1321 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1322 continue;
1324 /* If the operands already match, then there is nothing to do. */
1325 if (operands_match_p (src, dst))
1326 continue;
1328 if (match.commutative[op_no] >= 0)
1330 rtx comm = recog_data.operand[match.commutative[op_no]];
1331 if (operands_match_p (comm, dst))
1332 continue;
1335 set = single_set (insn);
1336 if (! set)
1337 continue;
1339 /* match_no/dst must be a write-only operand, and
1340 operand_operand/src must be a read-only operand. */
1341 if (match.use[op_no] != READ
1342 || match.use[match_no] != WRITE)
1343 continue;
1345 if (match.early_clobber[match_no]
1346 && count_occurrences (PATTERN (insn), src) > 1)
1347 continue;
1349 /* Make sure match_no is the destination. */
1350 if (recog_data.operand[match_no] != SET_DEST (set))
1351 continue;
1353 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1355 if (GET_CODE (SET_SRC (set)) == PLUS
1356 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1357 && XEXP (SET_SRC (set), 0) == src
1358 && fixup_match_2 (insn, dst, src,
1359 XEXP (SET_SRC (set), 1),
1360 regmove_dump_file))
1361 break;
1362 continue;
1364 src_class = reg_preferred_class (REGNO (src));
1365 dst_class = reg_preferred_class (REGNO (dst));
1366 if (! regclass_compatible_p (src_class, dst_class))
1368 if (!copy_src)
1370 copy_src = src;
1371 copy_dst = dst;
1373 continue;
1376 /* Can not modify an earlier insn to set dst if this insn
1377 uses an old value in the source. */
1378 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1380 if (!copy_src)
1382 copy_src = src;
1383 copy_dst = dst;
1385 continue;
1388 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1390 if (!copy_src)
1392 copy_src = src;
1393 copy_dst = dst;
1395 continue;
1399 /* If src is set once in a different basic block,
1400 and is set equal to a constant, then do not use
1401 it for this optimization, as this would make it
1402 no longer equivalent to a constant. */
1404 if (reg_is_remote_constant_p (src, insn, f))
1406 if (!copy_src)
1408 copy_src = src;
1409 copy_dst = dst;
1411 continue;
1415 if (regmove_dump_file)
1416 fprintf (regmove_dump_file,
1417 "Could fix operand %d of insn %d matching operand %d.\n",
1418 op_no, INSN_UID (insn), match_no);
1420 /* Scan backward to find the first instruction that uses
1421 the input operand. If the operand is set here, then
1422 replace it in both instructions with match_no. */
1424 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1426 rtx pset;
1428 if (GET_CODE (p) == CODE_LABEL
1429 || GET_CODE (p) == JUMP_INSN
1430 || (GET_CODE (p) == NOTE
1431 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1432 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1433 break;
1435 /* ??? We can't scan past the end of a basic block without
1436 updating the register lifetime info
1437 (REG_DEAD/basic_block_live_at_start).
1438 A CALL_INSN might be the last insn of a basic block, if
1439 it is inside an EH region. There is no easy way to tell,
1440 so we just always break when we see a CALL_INSN if
1441 flag_exceptions is nonzero. */
1442 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1443 break;
1445 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1446 continue;
1448 length++;
1450 /* ??? See if all of SRC is set in P. This test is much
1451 more conservative than it needs to be. */
1452 pset = single_set (p);
1453 if (pset && SET_DEST (pset) == src)
1455 /* We use validate_replace_rtx, in case there
1456 are multiple identical source operands. All of
1457 them have to be changed at the same time. */
1458 if (validate_replace_rtx (src, dst, insn))
1460 if (validate_change (p, &SET_DEST (pset),
1461 dst, 0))
1462 success = 1;
1463 else
1465 /* Change all source operands back.
1466 This modifies the dst as a side-effect. */
1467 validate_replace_rtx (dst, src, insn);
1468 /* Now make sure the dst is right. */
1469 validate_change (insn,
1470 recog_data.operand_loc[match_no],
1471 dst, 0);
1474 break;
1477 if (reg_overlap_mentioned_p (src, PATTERN (p))
1478 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1479 break;
1481 /* If we have passed a call instruction, and the
1482 pseudo-reg DST is not already live across a call,
1483 then don't perform the optimization. */
1484 if (GET_CODE (p) == CALL_INSN)
1486 num_calls++;
1488 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1489 break;
1493 if (success)
1495 int dstno, srcno;
1497 /* Remove the death note for SRC from INSN. */
1498 remove_note (insn, src_note);
1499 /* Move the death note for SRC to P if it is used
1500 there. */
1501 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1503 XEXP (src_note, 1) = REG_NOTES (p);
1504 REG_NOTES (p) = src_note;
1506 /* If there is a REG_DEAD note for DST on P, then remove
1507 it, because DST is now set there. */
1508 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1509 remove_note (p, dst_note);
1511 dstno = REGNO (dst);
1512 srcno = REGNO (src);
1514 REG_N_SETS (dstno)++;
1515 REG_N_SETS (srcno)--;
1517 REG_N_CALLS_CROSSED (dstno) += num_calls;
1518 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1520 REG_LIVE_LENGTH (dstno) += length;
1521 if (REG_LIVE_LENGTH (srcno) >= 0)
1523 REG_LIVE_LENGTH (srcno) -= length;
1524 /* REG_LIVE_LENGTH is only an approximation after
1525 combine if sched is not run, so make sure that we
1526 still have a reasonable value. */
1527 if (REG_LIVE_LENGTH (srcno) < 2)
1528 REG_LIVE_LENGTH (srcno) = 2;
1531 /* We assume that a register is used exactly once per
1532 insn in the updates above. If this is not correct,
1533 no great harm is done. */
1535 REG_N_REFS (dstno) += 2 * loop_depth;
1536 REG_N_REFS (srcno) -= 2 * loop_depth;
1538 /* If that was the only time src was set,
1539 and src was not live at the start of the
1540 function, we know that we have no more
1541 references to src; clear REG_N_REFS so it
1542 won't make reload do any work. */
1543 if (REG_N_SETS (REGNO (src)) == 0
1544 && ! regno_uninitialized (REGNO (src)))
1545 REG_N_REFS (REGNO (src)) = 0;
1547 if (regmove_dump_file)
1548 fprintf (regmove_dump_file,
1549 "Fixed operand %d of insn %d matching operand %d.\n",
1550 op_no, INSN_UID (insn), match_no);
1552 break;
1556 /* If we weren't able to replace any of the alternatives, try an
1557 alternative appoach of copying the source to the destination. */
1558 if (!success && copy_src != NULL_RTX)
1559 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth,
1560 old_max_uid);
1565 /* In fixup_match_1, some insns may have been inserted after basic block
1566 ends. Fix that here. */
1567 for (i = 0; i < n_basic_blocks; i++)
1569 rtx end = BLOCK_END (i);
1570 rtx new = end;
1571 rtx next = NEXT_INSN (new);
1572 while (next != 0 && INSN_UID (next) >= old_max_uid
1573 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1574 new = next, next = NEXT_INSN (new);
1575 BLOCK_END (i) = new;
1578 done:
1579 /* Clean up. */
1580 free (regno_src_regno);
1581 free (regmove_bb_head);
1584 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1585 Returns 0 if INSN can't be recognized, or if the alternative can't be
1586 determined.
1588 Initialize the info in MATCHP based on the constraints. */
1590 static int
1591 find_matches (insn, matchp)
1592 rtx insn;
1593 struct match *matchp;
1595 int likely_spilled[MAX_RECOG_OPERANDS];
1596 int op_no;
1597 int any_matches = 0;
1599 extract_insn (insn);
1600 if (! constrain_operands (0))
1601 return 0;
1603 /* Must initialize this before main loop, because the code for
1604 the commutative case may set matches for operands other than
1605 the current one. */
1606 for (op_no = recog_data.n_operands; --op_no >= 0; )
1607 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1609 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1611 const char *p;
1612 char c;
1613 int i = 0;
1615 p = recog_data.constraints[op_no];
1617 likely_spilled[op_no] = 0;
1618 matchp->use[op_no] = READ;
1619 matchp->early_clobber[op_no] = 0;
1620 if (*p == '=')
1621 matchp->use[op_no] = WRITE;
1622 else if (*p == '+')
1623 matchp->use[op_no] = READWRITE;
1625 for (;*p && i < which_alternative; p++)
1626 if (*p == ',')
1627 i++;
1629 while ((c = *p++) != '\0' && c != ',')
1630 switch (c)
1632 case '=':
1633 break;
1634 case '+':
1635 break;
1636 case '&':
1637 matchp->early_clobber[op_no] = 1;
1638 break;
1639 case '%':
1640 matchp->commutative[op_no] = op_no + 1;
1641 matchp->commutative[op_no + 1] = op_no;
1642 break;
1643 case '0': case '1': case '2': case '3': case '4':
1644 case '5': case '6': case '7': case '8': case '9':
1645 c -= '0';
1646 if (c < op_no && likely_spilled[(unsigned char) c])
1647 break;
1648 matchp->with[op_no] = c;
1649 any_matches = 1;
1650 if (matchp->commutative[op_no] >= 0)
1651 matchp->with[matchp->commutative[op_no]] = c;
1652 break;
1653 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1654 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1655 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1656 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1657 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1658 likely_spilled[op_no] = 1;
1659 break;
1662 return any_matches;
1665 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1666 the only set in INSN. INSN has just been recognized and constrained.
1667 SRC is operand number OPERAND_NUMBER in INSN.
1668 DST is operand number MATCH_NUMBER in INSN.
1669 If BACKWARD is nonzero, we have been called in a backward pass.
1670 Return nonzero for success. */
1671 static int
1672 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1673 match_number, regmove_dump_file)
1674 rtx insn, set, src, src_subreg, dst;
1675 int backward, operand_number, match_number;
1676 FILE *regmove_dump_file;
1678 rtx p;
1679 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1680 int success = 0;
1681 int num_calls = 0, s_num_calls = 0;
1682 enum rtx_code code = NOTE;
1683 HOST_WIDE_INT insn_const, newconst;
1684 rtx overlap = 0; /* need to move insn ? */
1685 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1686 int length, s_length, true_loop_depth;
1688 /* If SRC is marked as unchanging, we may not change it.
1689 ??? Maybe we could get better code by removing the unchanging bit
1690 instead, and changing it back if we don't succeed? */
1691 if (RTX_UNCHANGING_P (src))
1692 return 0;
1694 if (! src_note)
1696 /* Look for (set (regX) (op regA constX))
1697 (set (regY) (op regA constY))
1698 and change that to
1699 (set (regA) (op regA constX)).
1700 (set (regY) (op regA constY-constX)).
1701 This works for add and shift operations, if
1702 regA is dead after or set by the second insn. */
1704 code = GET_CODE (SET_SRC (set));
1705 if ((code == PLUS || code == LSHIFTRT
1706 || code == ASHIFT || code == ASHIFTRT)
1707 && XEXP (SET_SRC (set), 0) == src
1708 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1709 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1710 else if (! stable_and_no_regs_but_for_p (SET_SRC (set), src, dst))
1711 return 0;
1712 else
1713 /* We might find a src_note while scanning. */
1714 code = NOTE;
1717 if (regmove_dump_file)
1718 fprintf (regmove_dump_file,
1719 "Could fix operand %d of insn %d matching operand %d.\n",
1720 operand_number, INSN_UID (insn), match_number);
1722 /* If SRC is equivalent to a constant set in a different basic block,
1723 then do not use it for this optimization. We want the equivalence
1724 so that if we have to reload this register, we can reload the
1725 constant, rather than extending the lifespan of the register. */
1726 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1727 return 0;
1729 /* Scan forward to find the next instruction that
1730 uses the output operand. If the operand dies here,
1731 then replace it in both instructions with
1732 operand_number. */
1734 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1736 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1737 || (GET_CODE (p) == NOTE
1738 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1739 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1740 break;
1742 /* ??? We can't scan past the end of a basic block without updating
1743 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1744 A CALL_INSN might be the last insn of a basic block, if it is
1745 inside an EH region. There is no easy way to tell, so we just
1746 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1747 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1748 break;
1750 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1751 continue;
1753 length++;
1754 if (src_note)
1755 s_length++;
1757 if (reg_set_p (src, p) || reg_set_p (dst, p)
1758 || (GET_CODE (PATTERN (p)) == USE
1759 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1760 break;
1762 /* See if all of DST dies in P. This test is
1763 slightly more conservative than it needs to be. */
1764 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1765 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1767 /* If we would be moving INSN, check that we won't move it
1768 into the shadow of a live a live flags register. */
1769 /* ??? We only try to move it in front of P, although
1770 we could move it anywhere between OVERLAP and P. */
1771 if (overlap && GET_MODE (PREV_INSN (p)) != VOIDmode)
1772 break;
1774 if (! src_note)
1776 rtx q;
1777 rtx set2;
1779 /* If an optimization is done, the value of SRC while P
1780 is executed will be changed. Check that this is OK. */
1781 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1782 break;
1783 for (q = p; q; q = NEXT_INSN (q))
1785 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1786 || (GET_CODE (q) == NOTE
1787 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1788 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1790 q = 0;
1791 break;
1794 /* ??? We can't scan past the end of a basic block without
1795 updating the register lifetime info
1796 (REG_DEAD/basic_block_live_at_start).
1797 A CALL_INSN might be the last insn of a basic block, if
1798 it is inside an EH region. There is no easy way to tell,
1799 so we just always break when we see a CALL_INSN if
1800 flag_exceptions is nonzero. */
1801 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1803 q = 0;
1804 break;
1807 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1808 continue;
1809 if (reg_overlap_mentioned_p (src, PATTERN (q))
1810 || reg_set_p (src, q))
1811 break;
1813 if (q)
1814 set2 = single_set (q);
1815 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1816 || XEXP (SET_SRC (set2), 0) != src
1817 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1818 || (SET_DEST (set2) != src
1819 && ! find_reg_note (q, REG_DEAD, src)))
1821 /* If this is a PLUS, we can still save a register by doing
1822 src += insn_const;
1824 src -= insn_const; .
1825 This also gives opportunities for subsequent
1826 optimizations in the backward pass, so do it there. */
1827 if (code == PLUS && backward
1828 /* Don't do this if we can likely tie DST to SET_DEST
1829 of P later; we can't do this tying here if we got a
1830 hard register. */
1831 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1832 && single_set (p)
1833 && GET_CODE (SET_DEST (single_set (p))) == REG
1834 && (REGNO (SET_DEST (single_set (p)))
1835 < FIRST_PSEUDO_REGISTER))
1836 /* We may only emit an insn directly after P if we
1837 are not in the shadow of a live flags register. */
1838 && GET_MODE (p) == VOIDmode)
1840 search_end = q;
1841 q = insn;
1842 set2 = set;
1843 newconst = -insn_const;
1844 code = MINUS;
1846 else
1847 break;
1849 else
1851 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1852 /* Reject out of range shifts. */
1853 if (code != PLUS
1854 && (newconst < 0
1855 || (newconst
1856 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1857 break;
1858 if (code == PLUS)
1860 post_inc = q;
1861 if (SET_DEST (set2) != src)
1862 post_inc_set = set2;
1865 /* We use 1 as last argument to validate_change so that all
1866 changes are accepted or rejected together by apply_change_group
1867 when it is called by validate_replace_rtx . */
1868 validate_change (q, &XEXP (SET_SRC (set2), 1),
1869 GEN_INT (newconst), 1);
1871 validate_change (insn, recog_data.operand_loc[match_number], src, 1);
1872 if (validate_replace_rtx (dst, src_subreg, p))
1873 success = 1;
1874 break;
1877 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1878 break;
1879 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1881 /* INSN was already checked to be movable wrt. the registers that it
1882 sets / uses when we found no REG_DEAD note for src on it, but it
1883 still might clobber the flags register. We'll have to check that
1884 we won't insert it into the shadow of a live flags register when
1885 we finally know where we are to move it. */
1886 overlap = p;
1887 src_note = find_reg_note (p, REG_DEAD, src);
1890 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1891 already live across a call, then don't perform the optimization. */
1892 if (GET_CODE (p) == CALL_INSN)
1894 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1895 break;
1897 num_calls++;
1899 if (src_note)
1900 s_num_calls++;
1905 if (! success)
1906 return 0;
1908 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1910 /* Remove the death note for DST from P. */
1911 remove_note (p, dst_note);
1912 if (code == MINUS)
1914 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1915 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1916 && search_end
1917 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1918 post_inc = 0;
1919 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1920 REG_N_SETS (REGNO (src))++;
1921 REG_N_REFS (REGNO (src)) += true_loop_depth;
1922 REG_LIVE_LENGTH (REGNO (src))++;
1924 if (overlap)
1926 /* The lifetime of src and dest overlap,
1927 but we can change this by moving insn. */
1928 rtx pat = PATTERN (insn);
1929 if (src_note)
1930 remove_note (overlap, src_note);
1931 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1932 && code == PLUS
1933 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1934 insn = overlap;
1935 else
1937 rtx notes = REG_NOTES (insn);
1939 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1940 PUT_CODE (insn, NOTE);
1941 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1942 NOTE_SOURCE_FILE (insn) = 0;
1943 /* emit_insn_after_with_line_notes has no
1944 return value, so search for the new insn. */
1945 insn = p;
1946 while (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
1947 || PATTERN (insn) != pat)
1948 insn = PREV_INSN (insn);
1950 REG_NOTES (insn) = notes;
1953 /* Sometimes we'd generate src = const; src += n;
1954 if so, replace the instruction that set src
1955 in the first place. */
1957 if (! overlap && (code == PLUS || code == MINUS))
1959 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1960 rtx q, set2;
1961 int num_calls2 = 0, s_length2 = 0;
1963 if (note && CONSTANT_P (XEXP (note, 0)))
1965 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1967 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1968 || (GET_CODE (q) == NOTE
1969 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1970 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1972 q = 0;
1973 break;
1976 /* ??? We can't scan past the end of a basic block without
1977 updating the register lifetime info
1978 (REG_DEAD/basic_block_live_at_start).
1979 A CALL_INSN might be the last insn of a basic block, if
1980 it is inside an EH region. There is no easy way to tell,
1981 so we just always break when we see a CALL_INSN if
1982 flag_exceptions is nonzero. */
1983 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1985 q = 0;
1986 break;
1989 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1990 continue;
1991 s_length2++;
1992 if (reg_set_p (src, q))
1994 set2 = single_set (q);
1995 break;
1997 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1999 q = 0;
2000 break;
2002 if (GET_CODE (p) == CALL_INSN)
2003 num_calls2++;
2005 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
2006 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
2008 PUT_CODE (q, NOTE);
2009 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
2010 NOTE_SOURCE_FILE (q) = 0;
2011 REG_N_SETS (REGNO (src))--;
2012 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
2013 REG_N_REFS (REGNO (src)) -= true_loop_depth;
2014 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
2015 insn_const = 0;
2020 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
2021 && (code == PLUS || code == MINUS) && insn_const
2022 && try_auto_increment (p, insn, 0, src, insn_const, 1))
2023 insn = p;
2024 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
2025 && post_inc
2026 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
2027 post_inc = 0;
2028 /* If post_inc still prevails, try to find an
2029 insn where it can be used as a pre-in/decrement.
2030 If code is MINUS, this was already tried. */
2031 if (post_inc && code == PLUS
2032 /* Check that newconst is likely to be usable
2033 in a pre-in/decrement before starting the search. */
2034 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
2035 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
2036 && exact_log2 (newconst))
2038 rtx q, inc_dest;
2040 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
2041 for (q = post_inc; (q = NEXT_INSN (q)); )
2043 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
2044 || (GET_CODE (q) == NOTE
2045 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
2046 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
2047 break;
2049 /* ??? We can't scan past the end of a basic block without updating
2050 the register lifetime info (REG_DEAD/basic_block_live_at_start).
2051 A CALL_INSN might be the last insn of a basic block, if it
2052 is inside an EH region. There is no easy way to tell so we
2053 just always break when we see a CALL_INSN if flag_exceptions
2054 is nonzero. */
2055 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
2056 break;
2058 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
2059 continue;
2060 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
2061 || reg_set_p (src, q)))
2062 break;
2063 if (reg_set_p (inc_dest, q))
2064 break;
2065 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2067 try_auto_increment (q, post_inc,
2068 post_inc_set, inc_dest, newconst, 1);
2069 break;
2073 /* Move the death note for DST to INSN if it is used
2074 there. */
2075 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2077 XEXP (dst_note, 1) = REG_NOTES (insn);
2078 REG_NOTES (insn) = dst_note;
2081 if (src_note)
2083 /* Move the death note for SRC from INSN to P. */
2084 if (! overlap)
2085 remove_note (insn, src_note);
2086 XEXP (src_note, 1) = REG_NOTES (p);
2087 REG_NOTES (p) = src_note;
2089 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2092 REG_N_SETS (REGNO (src))++;
2093 REG_N_SETS (REGNO (dst))--;
2095 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2097 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2098 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2100 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2101 /* REG_LIVE_LENGTH is only an approximation after
2102 combine if sched is not run, so make sure that we
2103 still have a reasonable value. */
2104 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2105 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2108 /* We assume that a register is used exactly once per
2109 insn in the updates above. If this is not correct,
2110 no great harm is done. */
2112 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
2113 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
2115 /* If that was the only time dst was set,
2116 and dst was not live at the start of the
2117 function, we know that we have no more
2118 references to dst; clear REG_N_REFS so it
2119 won't make reload do any work. */
2120 if (REG_N_SETS (REGNO (dst)) == 0
2121 && ! regno_uninitialized (REGNO (dst)))
2122 REG_N_REFS (REGNO (dst)) = 0;
2124 if (regmove_dump_file)
2125 fprintf (regmove_dump_file,
2126 "Fixed operand %d of insn %d matching operand %d.\n",
2127 operand_number, INSN_UID (insn), match_number);
2128 return 1;
2132 /* return nonzero if X is stable and mentions no regsiters but for
2133 mentioning SRC or mentioning / changing DST . If in doubt, presume
2134 it is unstable.
2135 The rationale is that we want to check if we can move an insn easily
2136 while just paying attention to SRC and DST. A register is considered
2137 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2138 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2139 want any registers but SRC and DST. */
2140 static int
2141 stable_and_no_regs_but_for_p (x, src, dst)
2142 rtx x, src, dst;
2144 RTX_CODE code = GET_CODE (x);
2145 switch (GET_RTX_CLASS (code))
2147 case '<': case '1': case 'c': case '2': case 'b': case '3':
2149 int i;
2150 const char *fmt = GET_RTX_FORMAT (code);
2151 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2152 if (fmt[i] == 'e'
2153 && ! stable_and_no_regs_but_for_p (XEXP (x, i), src, dst))
2154 return 0;
2155 return 1;
2157 case 'o':
2158 if (code == REG)
2159 return x == src || x == dst;
2160 /* If this is a MEM, look inside - there might be a register hidden in
2161 the address of an unchanging MEM. */
2162 if (code == MEM
2163 && ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst))
2164 return 0;
2165 /* fall through */
2166 default:
2167 return ! rtx_unstable_p (x);