1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
46 #include "rtlhooks-def.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
87 All real quantity numbers are greater than or equal to `max_reg'.
88 If register N has not been assigned a quantity, reg_qty[N] will equal N.
90 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
91 entries should be referenced with an index below `max_reg'.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
205 /* One plus largest register number used in this function. */
209 /* One plus largest instruction UID used in this function at time of
212 static int max_insn_uid
;
214 /* Length of qty_table vector. We know in advance we will not need
215 a quantity number this big. */
219 /* Next quantity number to be allocated.
220 This is 1 + the largest number needed so far. */
224 /* Per-qty information tracking.
226 `first_reg' and `last_reg' track the head and tail of the
227 chain of registers which currently contain this quantity.
229 `mode' contains the machine mode of this quantity.
231 `const_rtx' holds the rtx of the constant value of this
232 quantity, if known. A summations of the frame/arg pointer
233 and a constant can also be entered here. When this holds
234 a known value, `const_insn' is the insn which stored the
237 `comparison_{code,const,qty}' are used to track when a
238 comparison between a quantity and some constant or register has
239 been passed. In such a case, we know the results of the comparison
240 in case we see it again. These members record a comparison that
241 is known to be true. `comparison_code' holds the rtx code of such
242 a comparison, else it is set to UNKNOWN and the other two
243 comparison members are undefined. `comparison_const' holds
244 the constant being compared against, or zero if the comparison
245 is not against a constant. `comparison_qty' holds the quantity
246 being compared against when the result is known. If the comparison
247 is not with a register, `comparison_qty' is -1. */
249 struct qty_table_elem
253 rtx comparison_const
;
255 unsigned int first_reg
, last_reg
;
256 /* The sizes of these fields should match the sizes of the
257 code and mode fields of struct rtx_def (see rtl.h). */
258 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
259 ENUM_BITFIELD(machine_mode
) mode
: 8;
262 /* The table of all qtys, indexed by qty number. */
263 static struct qty_table_elem
*qty_table
;
266 /* For machines that have a CC0, we do not record its value in the hash
267 table since its use is guaranteed to be the insn immediately following
268 its definition and any other insn is presumed to invalidate it.
270 Instead, we store below the value last assigned to CC0. If it should
271 happen to be a constant, it is stored in preference to the actual
272 assigned value. In case it is a constant, we store the mode in which
273 the constant should be interpreted. */
275 static rtx prev_insn_cc0
;
276 static enum machine_mode prev_insn_cc0_mode
;
278 /* Previous actual insn. 0 if at first insn of basic block. */
280 static rtx prev_insn
;
283 /* Insn being scanned. */
285 static rtx this_insn
;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem
*reg_eqv_table
;
306 /* Next in hash chain. */
307 struct cse_reg_info
*hash_next
;
309 /* The next cse_reg_info structure in the free or used list. */
310 struct cse_reg_info
*next
;
315 /* The quantity number of the register's current contents. */
318 /* The number of times the register has been altered in the current
322 /* The REG_TICK value at which rtx's containing this register are
323 valid in the hash table. If this does not equal the current
324 reg_tick value, such expressions existing in the hash table are
328 /* The SUBREG that was set when REG_TICK was last incremented. Set
329 to -1 if the last store was to the whole register, not a subreg. */
330 unsigned int subreg_ticked
;
333 /* A free list of cse_reg_info entries. */
334 static struct cse_reg_info
*cse_reg_info_free_list
;
336 /* A used list of cse_reg_info entries. */
337 static struct cse_reg_info
*cse_reg_info_used_list
;
338 static struct cse_reg_info
*cse_reg_info_used_list_end
;
340 /* A mapping from registers to cse_reg_info data structures. */
341 #define REGHASH_SHIFT 7
342 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
343 #define REGHASH_MASK (REGHASH_SIZE - 1)
344 static struct cse_reg_info
*reg_hash
[REGHASH_SIZE
];
346 #define REGHASH_FN(REGNO) \
347 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
349 /* The last lookup we did into the cse_reg_info_tree. This allows us
350 to cache repeated lookups. */
351 static unsigned int cached_regno
;
352 static struct cse_reg_info
*cached_cse_reg_info
;
354 /* A HARD_REG_SET containing all the hard registers for which there is
355 currently a REG expression in the hash table. Note the difference
356 from the above variables, which indicate if the REG is mentioned in some
357 expression in the table. */
359 static HARD_REG_SET hard_regs_in_table
;
361 /* CUID of insn that starts the basic block currently being cse-processed. */
363 static int cse_basic_block_start
;
365 /* CUID of insn that ends the basic block currently being cse-processed. */
367 static int cse_basic_block_end
;
369 /* Vector mapping INSN_UIDs to cuids.
370 The cuids are like uids but increase monotonically always.
371 We use them to see whether a reg is used outside a given basic block. */
373 static int *uid_cuid
;
375 /* Highest UID in UID_CUID. */
378 /* Get the cuid of an insn. */
380 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
382 /* Nonzero if this pass has made changes, and therefore it's
383 worthwhile to run the garbage collector. */
385 static int cse_altered
;
387 /* Nonzero if cse has altered conditional jump insns
388 in such a way that jump optimization should be redone. */
390 static int cse_jumps_altered
;
392 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
393 REG_LABEL, we have to rerun jump after CSE to put in the note. */
394 static int recorded_label_ref
;
396 /* canon_hash stores 1 in do_not_record
397 if it notices a reference to CC0, PC, or some other volatile
400 static int do_not_record
;
402 #ifdef LOAD_EXTEND_OP
404 /* Scratch rtl used when looking for load-extended copy of a MEM. */
405 static rtx memory_extend_rtx
;
408 /* canon_hash stores 1 in hash_arg_in_memory
409 if it notices a reference to memory within the expression being hashed. */
411 static int hash_arg_in_memory
;
413 /* The hash table contains buckets which are chains of `struct table_elt's,
414 each recording one expression's information.
415 That expression is in the `exp' field.
417 The canon_exp field contains a canonical (from the point of view of
418 alias analysis) version of the `exp' field.
420 Those elements with the same hash code are chained in both directions
421 through the `next_same_hash' and `prev_same_hash' fields.
423 Each set of expressions with equivalent values
424 are on a two-way chain through the `next_same_value'
425 and `prev_same_value' fields, and all point with
426 the `first_same_value' field at the first element in
427 that chain. The chain is in order of increasing cost.
428 Each element's cost value is in its `cost' field.
430 The `in_memory' field is nonzero for elements that
431 involve any reference to memory. These elements are removed
432 whenever a write is done to an unidentified location in memory.
433 To be safe, we assume that a memory address is unidentified unless
434 the address is either a symbol constant or a constant plus
435 the frame pointer or argument pointer.
437 The `related_value' field is used to connect related expressions
438 (that differ by adding an integer).
439 The related expressions are chained in a circular fashion.
440 `related_value' is zero for expressions for which this
443 The `cost' field stores the cost of this element's expression.
444 The `regcost' field stores the value returned by approx_reg_cost for
445 this element's expression.
447 The `is_const' flag is set if the element is a constant (including
450 The `flag' field is used as a temporary during some search routines.
452 The `mode' field is usually the same as GET_MODE (`exp'), but
453 if `exp' is a CONST_INT and has no machine mode then the `mode'
454 field is the mode it was being used as. Each constant is
455 recorded separately for each mode it is used with. */
461 struct table_elt
*next_same_hash
;
462 struct table_elt
*prev_same_hash
;
463 struct table_elt
*next_same_value
;
464 struct table_elt
*prev_same_value
;
465 struct table_elt
*first_same_value
;
466 struct table_elt
*related_value
;
469 /* The size of this field should match the size
470 of the mode field of struct rtx_def (see rtl.h). */
471 ENUM_BITFIELD(machine_mode
) mode
: 8;
477 /* We don't want a lot of buckets, because we rarely have very many
478 things stored in the hash table, and a lot of buckets slows
479 down a lot of loops that happen frequently. */
481 #define HASH_SIZE (1 << HASH_SHIFT)
482 #define HASH_MASK (HASH_SIZE - 1)
484 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
485 register (hard registers may require `do_not_record' to be set). */
488 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
489 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
490 : canon_hash (X, M)) & HASH_MASK)
492 /* Determine whether register number N is considered a fixed register for the
493 purpose of approximating register costs.
494 It is desirable to replace other regs with fixed regs, to reduce need for
496 A reg wins if it is either the frame pointer or designated as fixed. */
497 #define FIXED_REGNO_P(N) \
498 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
499 || fixed_regs[N] || global_regs[N])
501 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
502 hard registers and pointers into the frame are the cheapest with a cost
503 of 0. Next come pseudos with a cost of one and other hard registers with
504 a cost of 2. Aside from these special cases, call `rtx_cost'. */
506 #define CHEAP_REGNO(N) \
507 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
508 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
509 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
510 || ((N) < FIRST_PSEUDO_REGISTER \
511 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
513 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
514 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
516 /* Get the info associated with register N. */
518 #define GET_CSE_REG_INFO(N) \
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
522 /* Get the number of times this register has been updated in this
525 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
527 /* Get the point at which REG was recorded in the table. */
529 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
531 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
534 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
536 /* Get the quantity number for REG. */
538 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
540 /* Determine if the quantity number for register X represents a valid index
541 into the qty_table. */
543 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
545 static struct table_elt
*table
[HASH_SIZE
];
547 /* Chain of `struct table_elt's made so far for this function
548 but currently removed from the table. */
550 static struct table_elt
*free_element_chain
;
552 /* Number of `struct table_elt' structures made so far for this function. */
554 static int n_elements_made
;
556 /* Maximum value `n_elements_made' has had so far in this compilation
557 for functions previously processed. */
559 static int max_elements_made
;
561 /* Surviving equivalence class when two equivalence classes are merged
562 by recording the effects of a jump in the last insn. Zero if the
563 last insn was not a conditional jump. */
565 static struct table_elt
*last_jump_equiv_class
;
567 /* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
572 static int constant_pool_entries_cost
;
573 static int constant_pool_entries_regcost
;
575 /* This data describes a block that will be processed by cse_basic_block. */
577 struct cse_basic_block_data
579 /* Lowest CUID value of insns in block. */
581 /* Highest CUID value of insns in block. */
583 /* Total number of SETs in block. */
585 /* Last insn in the block. */
587 /* Size of current branch path, if any. */
589 /* Current branch path, indicating which branches will be taken. */
592 /* The branch insn. */
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
597 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
601 static bool fixed_base_plus_p (rtx x
);
602 static int notreg_cost (rtx
, enum rtx_code
);
603 static int approx_reg_cost_1 (rtx
*, void *);
604 static int approx_reg_cost (rtx
);
605 static int preferable (int, int, int, int);
606 static void new_basic_block (void);
607 static void make_new_qty (unsigned int, enum machine_mode
);
608 static void make_regs_eqv (unsigned int, unsigned int);
609 static void delete_reg_equiv (unsigned int);
610 static int mention_regs (rtx
);
611 static int insert_regs (rtx
, struct table_elt
*, int);
612 static void remove_from_table (struct table_elt
*, unsigned);
613 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
614 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
615 static rtx
lookup_as_function (rtx
, enum rtx_code
);
616 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
618 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
619 static void invalidate (rtx
, enum machine_mode
);
620 static int cse_rtx_varies_p (rtx
, int);
621 static void remove_invalid_refs (unsigned int);
622 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
624 static void rehash_using_reg (rtx
);
625 static void invalidate_memory (void);
626 static void invalidate_for_call (void);
627 static rtx
use_related_value (rtx
, struct table_elt
*);
628 static unsigned canon_hash (rtx
, enum machine_mode
);
629 static unsigned canon_hash_string (const char *);
630 static unsigned safe_hash (rtx
, enum machine_mode
);
631 static int exp_equiv_p (rtx
, rtx
, int, int);
632 static rtx
canon_reg (rtx
, rtx
);
633 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
634 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
636 enum machine_mode
*);
637 static rtx
fold_rtx (rtx
, rtx
);
638 static rtx
equiv_constant (rtx
);
639 static void record_jump_equiv (rtx
, int);
640 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
642 static void cse_insn (rtx
, rtx
);
643 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
645 static int addr_affects_sp_p (rtx
);
646 static void invalidate_from_clobbers (rtx
);
647 static rtx
cse_process_notes (rtx
, rtx
);
648 static void cse_around_loop (rtx
);
649 static void invalidate_skipped_set (rtx
, rtx
, void *);
650 static void invalidate_skipped_block (rtx
);
651 static void cse_check_loop_start (rtx
, rtx
, void *);
652 static void cse_set_around_loop (rtx
, rtx
, rtx
);
653 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*, int);
654 static void count_reg_usage (rtx
, int *, int);
655 static int check_for_label_ref (rtx
*, void *);
656 extern void dump_class (struct table_elt
*);
657 static struct cse_reg_info
* get_cse_reg_info (unsigned int);
658 static int check_dependence (rtx
*, void *);
660 static void flush_hash_table (void);
661 static bool insn_live_p (rtx
, int *);
662 static bool set_live_p (rtx
, rtx
, int *);
663 static bool dead_libcall_p (rtx
, int *);
664 static int cse_change_cc_mode (rtx
*, void *);
665 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
666 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
669 #undef RTL_HOOKS_GEN_LOWPART
670 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
672 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
674 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
675 virtual regs here because the simplify_*_operation routines are called
676 by integrate.c, which is called before virtual register instantiation. */
679 fixed_base_plus_p (rtx x
)
681 switch (GET_CODE (x
))
684 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
686 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
688 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
689 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
694 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
696 return fixed_base_plus_p (XEXP (x
, 0));
703 /* Dump the expressions in the equivalence class indicated by CLASSP.
704 This function is used only for debugging. */
706 dump_class (struct table_elt
*classp
)
708 struct table_elt
*elt
;
710 fprintf (stderr
, "Equivalence chain for ");
711 print_rtl (stderr
, classp
->exp
);
712 fprintf (stderr
, ": \n");
714 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
716 print_rtl (stderr
, elt
->exp
);
717 fprintf (stderr
, "\n");
721 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
724 approx_reg_cost_1 (rtx
*xp
, void *data
)
731 unsigned int regno
= REGNO (x
);
733 if (! CHEAP_REGNO (regno
))
735 if (regno
< FIRST_PSEUDO_REGISTER
)
737 if (SMALL_REGISTER_CLASSES
)
749 /* Return an estimate of the cost of the registers used in an rtx.
750 This is mostly the number of different REG expressions in the rtx;
751 however for some exceptions like fixed registers we use a cost of
752 0. If any other hard register reference occurs, return MAX_COST. */
755 approx_reg_cost (rtx x
)
759 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
765 /* Return a negative value if an rtx A, whose costs are given by COST_A
766 and REGCOST_A, is more desirable than an rtx B.
767 Return a positive value if A is less desirable, or 0 if the two are
770 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
772 /* First, get rid of cases involving expressions that are entirely
774 if (cost_a
!= cost_b
)
776 if (cost_a
== MAX_COST
)
778 if (cost_b
== MAX_COST
)
782 /* Avoid extending lifetimes of hardregs. */
783 if (regcost_a
!= regcost_b
)
785 if (regcost_a
== MAX_COST
)
787 if (regcost_b
== MAX_COST
)
791 /* Normal operation costs take precedence. */
792 if (cost_a
!= cost_b
)
793 return cost_a
- cost_b
;
794 /* Only if these are identical consider effects on register pressure. */
795 if (regcost_a
!= regcost_b
)
796 return regcost_a
- regcost_b
;
800 /* Internal function, to compute cost when X is not a register; called
801 from COST macro to keep it simple. */
804 notreg_cost (rtx x
, enum rtx_code outer
)
806 return ((GET_CODE (x
) == SUBREG
807 && REG_P (SUBREG_REG (x
))
808 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
809 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
810 && (GET_MODE_SIZE (GET_MODE (x
))
811 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
812 && subreg_lowpart_p (x
)
813 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
814 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
816 : rtx_cost (x
, outer
) * 2);
820 static struct cse_reg_info
*
821 get_cse_reg_info (unsigned int regno
)
823 struct cse_reg_info
**hash_head
= ®_hash
[REGHASH_FN (regno
)];
824 struct cse_reg_info
*p
;
826 for (p
= *hash_head
; p
!= NULL
; p
= p
->hash_next
)
827 if (p
->regno
== regno
)
832 /* Get a new cse_reg_info structure. */
833 if (cse_reg_info_free_list
)
835 p
= cse_reg_info_free_list
;
836 cse_reg_info_free_list
= p
->next
;
839 p
= xmalloc (sizeof (struct cse_reg_info
));
841 /* Insert into hash table. */
842 p
->hash_next
= *hash_head
;
847 p
->reg_in_table
= -1;
848 p
->subreg_ticked
= -1;
851 p
->next
= cse_reg_info_used_list
;
852 cse_reg_info_used_list
= p
;
853 if (!cse_reg_info_used_list_end
)
854 cse_reg_info_used_list_end
= p
;
857 /* Cache this lookup; we tend to be looking up information about the
858 same register several times in a row. */
859 cached_regno
= regno
;
860 cached_cse_reg_info
= p
;
865 /* Clear the hash table and initialize each register with its own quantity,
866 for a new basic block. */
869 new_basic_block (void)
875 /* Clear out hash table state for this pass. */
877 memset (reg_hash
, 0, sizeof reg_hash
);
879 if (cse_reg_info_used_list
)
881 cse_reg_info_used_list_end
->next
= cse_reg_info_free_list
;
882 cse_reg_info_free_list
= cse_reg_info_used_list
;
883 cse_reg_info_used_list
= cse_reg_info_used_list_end
= 0;
885 cached_cse_reg_info
= 0;
887 CLEAR_HARD_REG_SET (hard_regs_in_table
);
889 /* The per-quantity values used to be initialized here, but it is
890 much faster to initialize each as it is made in `make_new_qty'. */
892 for (i
= 0; i
< HASH_SIZE
; i
++)
894 struct table_elt
*first
;
899 struct table_elt
*last
= first
;
903 while (last
->next_same_hash
!= NULL
)
904 last
= last
->next_same_hash
;
906 /* Now relink this hash entire chain into
907 the free element list. */
909 last
->next_same_hash
= free_element_chain
;
910 free_element_chain
= first
;
920 /* Say that register REG contains a quantity in mode MODE not in any
921 register before and initialize that quantity. */
924 make_new_qty (unsigned int reg
, enum machine_mode mode
)
927 struct qty_table_elem
*ent
;
928 struct reg_eqv_elem
*eqv
;
930 if (next_qty
>= max_qty
)
933 q
= REG_QTY (reg
) = next_qty
++;
935 ent
->first_reg
= reg
;
938 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
939 ent
->comparison_code
= UNKNOWN
;
941 eqv
= ®_eqv_table
[reg
];
942 eqv
->next
= eqv
->prev
= -1;
945 /* Make reg NEW equivalent to reg OLD.
946 OLD is not changing; NEW is. */
949 make_regs_eqv (unsigned int new, unsigned int old
)
951 unsigned int lastr
, firstr
;
952 int q
= REG_QTY (old
);
953 struct qty_table_elem
*ent
;
957 /* Nothing should become eqv until it has a "non-invalid" qty number. */
958 if (! REGNO_QTY_VALID_P (old
))
962 firstr
= ent
->first_reg
;
963 lastr
= ent
->last_reg
;
965 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
966 hard regs. Among pseudos, if NEW will live longer than any other reg
967 of the same qty, and that is beyond the current basic block,
968 make it the new canonical replacement for this qty. */
969 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
970 /* Certain fixed registers might be of the class NO_REGS. This means
971 that not only can they not be allocated by the compiler, but
972 they cannot be used in substitutions or canonicalizations
974 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
975 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
976 || (new >= FIRST_PSEUDO_REGISTER
977 && (firstr
< FIRST_PSEUDO_REGISTER
978 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
979 || (uid_cuid
[REGNO_FIRST_UID (new)]
980 < cse_basic_block_start
))
981 && (uid_cuid
[REGNO_LAST_UID (new)]
982 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
984 reg_eqv_table
[firstr
].prev
= new;
985 reg_eqv_table
[new].next
= firstr
;
986 reg_eqv_table
[new].prev
= -1;
987 ent
->first_reg
= new;
991 /* If NEW is a hard reg (known to be non-fixed), insert at end.
992 Otherwise, insert before any non-fixed hard regs that are at the
993 end. Registers of class NO_REGS cannot be used as an
994 equivalent for anything. */
995 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
996 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
997 && new >= FIRST_PSEUDO_REGISTER
)
998 lastr
= reg_eqv_table
[lastr
].prev
;
999 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
1000 if (reg_eqv_table
[lastr
].next
>= 0)
1001 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1003 qty_table
[q
].last_reg
= new;
1004 reg_eqv_table
[lastr
].next
= new;
1005 reg_eqv_table
[new].prev
= lastr
;
1009 /* Remove REG from its equivalence class. */
1012 delete_reg_equiv (unsigned int reg
)
1014 struct qty_table_elem
*ent
;
1015 int q
= REG_QTY (reg
);
1018 /* If invalid, do nothing. */
1022 ent
= &qty_table
[q
];
1024 p
= reg_eqv_table
[reg
].prev
;
1025 n
= reg_eqv_table
[reg
].next
;
1028 reg_eqv_table
[n
].prev
= p
;
1032 reg_eqv_table
[p
].next
= n
;
1036 REG_QTY (reg
) = reg
;
1039 /* Remove any invalid expressions from the hash table
1040 that refer to any of the registers contained in expression X.
1042 Make sure that newly inserted references to those registers
1043 as subexpressions will be considered valid.
1045 mention_regs is not called when a register itself
1046 is being stored in the table.
1048 Return 1 if we have done something that may have changed the hash code
1052 mention_regs (rtx x
)
1062 code
= GET_CODE (x
);
1065 unsigned int regno
= REGNO (x
);
1066 unsigned int endregno
1067 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1068 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1071 for (i
= regno
; i
< endregno
; i
++)
1073 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1074 remove_invalid_refs (i
);
1076 REG_IN_TABLE (i
) = REG_TICK (i
);
1077 SUBREG_TICKED (i
) = -1;
1083 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1084 pseudo if they don't use overlapping words. We handle only pseudos
1085 here for simplicity. */
1086 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1087 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1089 unsigned int i
= REGNO (SUBREG_REG (x
));
1091 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1093 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1094 the last store to this register really stored into this
1095 subreg, then remove the memory of this subreg.
1096 Otherwise, remove any memory of the entire register and
1097 all its subregs from the table. */
1098 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1099 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1100 remove_invalid_refs (i
);
1102 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1105 REG_IN_TABLE (i
) = REG_TICK (i
);
1106 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1110 /* If X is a comparison or a COMPARE and either operand is a register
1111 that does not have a quantity, give it one. This is so that a later
1112 call to record_jump_equiv won't cause X to be assigned a different
1113 hash code and not found in the table after that call.
1115 It is not necessary to do this here, since rehash_using_reg can
1116 fix up the table later, but doing this here eliminates the need to
1117 call that expensive function in the most common case where the only
1118 use of the register is in the comparison. */
1120 if (code
== COMPARE
|| COMPARISON_P (x
))
1122 if (REG_P (XEXP (x
, 0))
1123 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1124 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1126 rehash_using_reg (XEXP (x
, 0));
1130 if (REG_P (XEXP (x
, 1))
1131 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1132 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1134 rehash_using_reg (XEXP (x
, 1));
1139 fmt
= GET_RTX_FORMAT (code
);
1140 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1142 changed
|= mention_regs (XEXP (x
, i
));
1143 else if (fmt
[i
] == 'E')
1144 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1145 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1150 /* Update the register quantities for inserting X into the hash table
1151 with a value equivalent to CLASSP.
1152 (If the class does not contain a REG, it is irrelevant.)
1153 If MODIFIED is nonzero, X is a destination; it is being modified.
1154 Note that delete_reg_equiv should be called on a register
1155 before insert_regs is done on that register with MODIFIED != 0.
1157 Nonzero value means that elements of reg_qty have changed
1158 so X's hash code may be different. */
1161 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1165 unsigned int regno
= REGNO (x
);
1168 /* If REGNO is in the equivalence table already but is of the
1169 wrong mode for that equivalence, don't do anything here. */
1171 qty_valid
= REGNO_QTY_VALID_P (regno
);
1174 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1176 if (ent
->mode
!= GET_MODE (x
))
1180 if (modified
|| ! qty_valid
)
1183 for (classp
= classp
->first_same_value
;
1185 classp
= classp
->next_same_value
)
1186 if (REG_P (classp
->exp
)
1187 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1189 make_regs_eqv (regno
, REGNO (classp
->exp
));
1193 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1194 than REG_IN_TABLE to find out if there was only a single preceding
1195 invalidation - for the SUBREG - or another one, which would be
1196 for the full register. However, if we find here that REG_TICK
1197 indicates that the register is invalid, it means that it has
1198 been invalidated in a separate operation. The SUBREG might be used
1199 now (then this is a recursive call), or we might use the full REG
1200 now and a SUBREG of it later. So bump up REG_TICK so that
1201 mention_regs will do the right thing. */
1203 && REG_IN_TABLE (regno
) >= 0
1204 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1206 make_new_qty (regno
, GET_MODE (x
));
1213 /* If X is a SUBREG, we will likely be inserting the inner register in the
1214 table. If that register doesn't have an assigned quantity number at
1215 this point but does later, the insertion that we will be doing now will
1216 not be accessible because its hash code will have changed. So assign
1217 a quantity number now. */
1219 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1220 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1222 insert_regs (SUBREG_REG (x
), NULL
, 0);
1227 return mention_regs (x
);
1230 /* Look in or update the hash table. */
1232 /* Remove table element ELT from use in the table.
1233 HASH is its hash code, made using the HASH macro.
1234 It's an argument because often that is known in advance
1235 and we save much time not recomputing it. */
1238 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1243 /* Mark this element as removed. See cse_insn. */
1244 elt
->first_same_value
= 0;
1246 /* Remove the table element from its equivalence class. */
1249 struct table_elt
*prev
= elt
->prev_same_value
;
1250 struct table_elt
*next
= elt
->next_same_value
;
1253 next
->prev_same_value
= prev
;
1256 prev
->next_same_value
= next
;
1259 struct table_elt
*newfirst
= next
;
1262 next
->first_same_value
= newfirst
;
1263 next
= next
->next_same_value
;
1268 /* Remove the table element from its hash bucket. */
1271 struct table_elt
*prev
= elt
->prev_same_hash
;
1272 struct table_elt
*next
= elt
->next_same_hash
;
1275 next
->prev_same_hash
= prev
;
1278 prev
->next_same_hash
= next
;
1279 else if (table
[hash
] == elt
)
1283 /* This entry is not in the proper hash bucket. This can happen
1284 when two classes were merged by `merge_equiv_classes'. Search
1285 for the hash bucket that it heads. This happens only very
1286 rarely, so the cost is acceptable. */
1287 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1288 if (table
[hash
] == elt
)
1293 /* Remove the table element from its related-value circular chain. */
1295 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1297 struct table_elt
*p
= elt
->related_value
;
1299 while (p
->related_value
!= elt
)
1300 p
= p
->related_value
;
1301 p
->related_value
= elt
->related_value
;
1302 if (p
->related_value
== p
)
1303 p
->related_value
= 0;
1306 /* Now add it to the free element chain. */
1307 elt
->next_same_hash
= free_element_chain
;
1308 free_element_chain
= elt
;
1311 /* Look up X in the hash table and return its table element,
1312 or 0 if X is not in the table.
1314 MODE is the machine-mode of X, or if X is an integer constant
1315 with VOIDmode then MODE is the mode with which X will be used.
1317 Here we are satisfied to find an expression whose tree structure
1320 static struct table_elt
*
1321 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1323 struct table_elt
*p
;
1325 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1326 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1327 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), 0)))
1333 /* Like `lookup' but don't care whether the table element uses invalid regs.
1334 Also ignore discrepancies in the machine mode of a register. */
1336 static struct table_elt
*
1337 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1339 struct table_elt
*p
;
1343 unsigned int regno
= REGNO (x
);
1345 /* Don't check the machine mode when comparing registers;
1346 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1347 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1349 && REGNO (p
->exp
) == regno
)
1354 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1355 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1362 /* Look for an expression equivalent to X and with code CODE.
1363 If one is found, return that expression. */
1366 lookup_as_function (rtx x
, enum rtx_code code
)
1369 = lookup (x
, safe_hash (x
, VOIDmode
) & HASH_MASK
, GET_MODE (x
));
1371 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1372 long as we are narrowing. So if we looked in vain for a mode narrower
1373 than word_mode before, look for word_mode now. */
1374 if (p
== 0 && code
== CONST_INT
1375 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1378 PUT_MODE (x
, word_mode
);
1379 p
= lookup (x
, safe_hash (x
, VOIDmode
) & HASH_MASK
, word_mode
);
1385 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1386 if (GET_CODE (p
->exp
) == code
1387 /* Make sure this is a valid entry in the table. */
1388 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1394 /* Insert X in the hash table, assuming HASH is its hash code
1395 and CLASSP is an element of the class it should go in
1396 (or 0 if a new class should be made).
1397 It is inserted at the proper position to keep the class in
1398 the order cheapest first.
1400 MODE is the machine-mode of X, or if X is an integer constant
1401 with VOIDmode then MODE is the mode with which X will be used.
1403 For elements of equal cheapness, the most recent one
1404 goes in front, except that the first element in the list
1405 remains first unless a cheaper element is added. The order of
1406 pseudo-registers does not matter, as canon_reg will be called to
1407 find the cheapest when a register is retrieved from the table.
1409 The in_memory field in the hash table element is set to 0.
1410 The caller must set it nonzero if appropriate.
1412 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1413 and if insert_regs returns a nonzero value
1414 you must then recompute its hash code before calling here.
1416 If necessary, update table showing constant values of quantities. */
1418 #define CHEAPER(X, Y) \
1419 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1421 static struct table_elt
*
1422 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1424 struct table_elt
*elt
;
1426 /* If X is a register and we haven't made a quantity for it,
1427 something is wrong. */
1428 if (REG_P (x
) && ! REGNO_QTY_VALID_P (REGNO (x
)))
1431 /* If X is a hard register, show it is being put in the table. */
1432 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1434 unsigned int regno
= REGNO (x
);
1435 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1438 for (i
= regno
; i
< endregno
; i
++)
1439 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1442 /* Put an element for X into the right hash bucket. */
1444 elt
= free_element_chain
;
1446 free_element_chain
= elt
->next_same_hash
;
1450 elt
= xmalloc (sizeof (struct table_elt
));
1454 elt
->canon_exp
= NULL_RTX
;
1455 elt
->cost
= COST (x
);
1456 elt
->regcost
= approx_reg_cost (x
);
1457 elt
->next_same_value
= 0;
1458 elt
->prev_same_value
= 0;
1459 elt
->next_same_hash
= table
[hash
];
1460 elt
->prev_same_hash
= 0;
1461 elt
->related_value
= 0;
1464 elt
->is_const
= (CONSTANT_P (x
)
1465 /* GNU C++ takes advantage of this for `this'
1466 (and other const values). */
1468 && RTX_UNCHANGING_P (x
)
1469 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1470 || fixed_base_plus_p (x
));
1473 table
[hash
]->prev_same_hash
= elt
;
1476 /* Put it into the proper value-class. */
1479 classp
= classp
->first_same_value
;
1480 if (CHEAPER (elt
, classp
))
1481 /* Insert at the head of the class. */
1483 struct table_elt
*p
;
1484 elt
->next_same_value
= classp
;
1485 classp
->prev_same_value
= elt
;
1486 elt
->first_same_value
= elt
;
1488 for (p
= classp
; p
; p
= p
->next_same_value
)
1489 p
->first_same_value
= elt
;
1493 /* Insert not at head of the class. */
1494 /* Put it after the last element cheaper than X. */
1495 struct table_elt
*p
, *next
;
1497 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1500 /* Put it after P and before NEXT. */
1501 elt
->next_same_value
= next
;
1503 next
->prev_same_value
= elt
;
1505 elt
->prev_same_value
= p
;
1506 p
->next_same_value
= elt
;
1507 elt
->first_same_value
= classp
;
1511 elt
->first_same_value
= elt
;
1513 /* If this is a constant being set equivalent to a register or a register
1514 being set equivalent to a constant, note the constant equivalence.
1516 If this is a constant, it cannot be equivalent to a different constant,
1517 and a constant is the only thing that can be cheaper than a register. So
1518 we know the register is the head of the class (before the constant was
1521 If this is a register that is not already known equivalent to a
1522 constant, we must check the entire class.
1524 If this is a register that is already known equivalent to an insn,
1525 update the qtys `const_insn' to show that `this_insn' is the latest
1526 insn making that quantity equivalent to the constant. */
1528 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1531 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1532 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1534 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1535 exp_ent
->const_insn
= this_insn
;
1540 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1543 struct table_elt
*p
;
1545 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1547 if (p
->is_const
&& !REG_P (p
->exp
))
1549 int x_q
= REG_QTY (REGNO (x
));
1550 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1553 = gen_lowpart (GET_MODE (x
), p
->exp
);
1554 x_ent
->const_insn
= this_insn
;
1561 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1562 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1563 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1565 /* If this is a constant with symbolic value,
1566 and it has a term with an explicit integer value,
1567 link it up with related expressions. */
1568 if (GET_CODE (x
) == CONST
)
1570 rtx subexp
= get_related_value (x
);
1572 struct table_elt
*subelt
, *subelt_prev
;
1576 /* Get the integer-free subexpression in the hash table. */
1577 subhash
= safe_hash (subexp
, mode
) & HASH_MASK
;
1578 subelt
= lookup (subexp
, subhash
, mode
);
1580 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1581 /* Initialize SUBELT's circular chain if it has none. */
1582 if (subelt
->related_value
== 0)
1583 subelt
->related_value
= subelt
;
1584 /* Find the element in the circular chain that precedes SUBELT. */
1585 subelt_prev
= subelt
;
1586 while (subelt_prev
->related_value
!= subelt
)
1587 subelt_prev
= subelt_prev
->related_value
;
1588 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1589 This way the element that follows SUBELT is the oldest one. */
1590 elt
->related_value
= subelt_prev
->related_value
;
1591 subelt_prev
->related_value
= elt
;
1598 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1599 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1600 the two classes equivalent.
1602 CLASS1 will be the surviving class; CLASS2 should not be used after this
1605 Any invalid entries in CLASS2 will not be copied. */
1608 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1610 struct table_elt
*elt
, *next
, *new;
1612 /* Ensure we start with the head of the classes. */
1613 class1
= class1
->first_same_value
;
1614 class2
= class2
->first_same_value
;
1616 /* If they were already equal, forget it. */
1617 if (class1
== class2
)
1620 for (elt
= class2
; elt
; elt
= next
)
1624 enum machine_mode mode
= elt
->mode
;
1626 next
= elt
->next_same_value
;
1628 /* Remove old entry, make a new one in CLASS1's class.
1629 Don't do this for invalid entries as we cannot find their
1630 hash code (it also isn't necessary). */
1631 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, 0))
1633 bool need_rehash
= false;
1635 hash_arg_in_memory
= 0;
1636 hash
= HASH (exp
, mode
);
1640 need_rehash
= (unsigned) REG_QTY (REGNO (exp
)) != REGNO (exp
);
1641 delete_reg_equiv (REGNO (exp
));
1644 remove_from_table (elt
, hash
);
1646 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1648 rehash_using_reg (exp
);
1649 hash
= HASH (exp
, mode
);
1651 new = insert (exp
, class1
, hash
, mode
);
1652 new->in_memory
= hash_arg_in_memory
;
1657 /* Flush the entire hash table. */
1660 flush_hash_table (void)
1663 struct table_elt
*p
;
1665 for (i
= 0; i
< HASH_SIZE
; i
++)
1666 for (p
= table
[i
]; p
; p
= table
[i
])
1668 /* Note that invalidate can remove elements
1669 after P in the current hash chain. */
1671 invalidate (p
->exp
, p
->mode
);
1673 remove_from_table (p
, i
);
1677 /* Function called for each rtx to check whether true dependence exist. */
1678 struct check_dependence_data
1680 enum machine_mode mode
;
1686 check_dependence (rtx
*x
, void *data
)
1688 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1689 if (*x
&& MEM_P (*x
))
1690 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1696 /* Remove from the hash table, or mark as invalid, all expressions whose
1697 values could be altered by storing in X. X is a register, a subreg, or
1698 a memory reference with nonvarying address (because, when a memory
1699 reference with a varying address is stored in, all memory references are
1700 removed by invalidate_memory so specific invalidation is superfluous).
1701 FULL_MODE, if not VOIDmode, indicates that this much should be
1702 invalidated instead of just the amount indicated by the mode of X. This
1703 is only used for bitfield stores into memory.
1705 A nonvarying address may be just a register or just a symbol reference,
1706 or it may be either of those plus a numeric offset. */
1709 invalidate (rtx x
, enum machine_mode full_mode
)
1712 struct table_elt
*p
;
1715 switch (GET_CODE (x
))
1719 /* If X is a register, dependencies on its contents are recorded
1720 through the qty number mechanism. Just change the qty number of
1721 the register, mark it as invalid for expressions that refer to it,
1722 and remove it itself. */
1723 unsigned int regno
= REGNO (x
);
1724 unsigned int hash
= HASH (x
, GET_MODE (x
));
1726 /* Remove REGNO from any quantity list it might be on and indicate
1727 that its value might have changed. If it is a pseudo, remove its
1728 entry from the hash table.
1730 For a hard register, we do the first two actions above for any
1731 additional hard registers corresponding to X. Then, if any of these
1732 registers are in the table, we must remove any REG entries that
1733 overlap these registers. */
1735 delete_reg_equiv (regno
);
1737 SUBREG_TICKED (regno
) = -1;
1739 if (regno
>= FIRST_PSEUDO_REGISTER
)
1741 /* Because a register can be referenced in more than one mode,
1742 we might have to remove more than one table entry. */
1743 struct table_elt
*elt
;
1745 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1746 remove_from_table (elt
, hash
);
1750 HOST_WIDE_INT in_table
1751 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1752 unsigned int endregno
1753 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1754 unsigned int tregno
, tendregno
, rn
;
1755 struct table_elt
*p
, *next
;
1757 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1759 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1761 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1762 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1763 delete_reg_equiv (rn
);
1765 SUBREG_TICKED (rn
) = -1;
1769 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1770 for (p
= table
[hash
]; p
; p
= next
)
1772 next
= p
->next_same_hash
;
1775 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1778 tregno
= REGNO (p
->exp
);
1780 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1781 if (tendregno
> regno
&& tregno
< endregno
)
1782 remove_from_table (p
, hash
);
1789 invalidate (SUBREG_REG (x
), VOIDmode
);
1793 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1794 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1798 /* This is part of a disjoint return value; extract the location in
1799 question ignoring the offset. */
1800 invalidate (XEXP (x
, 0), VOIDmode
);
1804 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1805 /* Calculate the canonical version of X here so that
1806 true_dependence doesn't generate new RTL for X on each call. */
1809 /* Remove all hash table elements that refer to overlapping pieces of
1811 if (full_mode
== VOIDmode
)
1812 full_mode
= GET_MODE (x
);
1814 for (i
= 0; i
< HASH_SIZE
; i
++)
1816 struct table_elt
*next
;
1818 for (p
= table
[i
]; p
; p
= next
)
1820 next
= p
->next_same_hash
;
1823 struct check_dependence_data d
;
1825 /* Just canonicalize the expression once;
1826 otherwise each time we call invalidate
1827 true_dependence will canonicalize the
1828 expression again. */
1830 p
->canon_exp
= canon_rtx (p
->exp
);
1834 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1835 remove_from_table (p
, i
);
1846 /* Remove all expressions that refer to register REGNO,
1847 since they are already invalid, and we are about to
1848 mark that register valid again and don't want the old
1849 expressions to reappear as valid. */
1852 remove_invalid_refs (unsigned int regno
)
1855 struct table_elt
*p
, *next
;
1857 for (i
= 0; i
< HASH_SIZE
; i
++)
1858 for (p
= table
[i
]; p
; p
= next
)
1860 next
= p
->next_same_hash
;
1862 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1863 remove_from_table (p
, i
);
1867 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1870 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1871 enum machine_mode mode
)
1874 struct table_elt
*p
, *next
;
1875 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1877 for (i
= 0; i
< HASH_SIZE
; i
++)
1878 for (p
= table
[i
]; p
; p
= next
)
1881 next
= p
->next_same_hash
;
1884 && (GET_CODE (exp
) != SUBREG
1885 || !REG_P (SUBREG_REG (exp
))
1886 || REGNO (SUBREG_REG (exp
)) != regno
1887 || (((SUBREG_BYTE (exp
)
1888 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1889 && SUBREG_BYTE (exp
) <= end
))
1890 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1891 remove_from_table (p
, i
);
1895 /* Recompute the hash codes of any valid entries in the hash table that
1896 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1898 This is called when we make a jump equivalence. */
1901 rehash_using_reg (rtx x
)
1904 struct table_elt
*p
, *next
;
1907 if (GET_CODE (x
) == SUBREG
)
1910 /* If X is not a register or if the register is known not to be in any
1911 valid entries in the table, we have no work to do. */
1914 || REG_IN_TABLE (REGNO (x
)) < 0
1915 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1918 /* Scan all hash chains looking for valid entries that mention X.
1919 If we find one and it is in the wrong hash chain, move it. */
1921 for (i
= 0; i
< HASH_SIZE
; i
++)
1922 for (p
= table
[i
]; p
; p
= next
)
1924 next
= p
->next_same_hash
;
1925 if (reg_mentioned_p (x
, p
->exp
)
1926 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1927 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) & HASH_MASK
))
1929 if (p
->next_same_hash
)
1930 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1932 if (p
->prev_same_hash
)
1933 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1935 table
[i
] = p
->next_same_hash
;
1937 p
->next_same_hash
= table
[hash
];
1938 p
->prev_same_hash
= 0;
1940 table
[hash
]->prev_same_hash
= p
;
1946 /* Remove from the hash table any expression that is a call-clobbered
1947 register. Also update their TICK values. */
1950 invalidate_for_call (void)
1952 unsigned int regno
, endregno
;
1955 struct table_elt
*p
, *next
;
1958 /* Go through all the hard registers. For each that is clobbered in
1959 a CALL_INSN, remove the register from quantity chains and update
1960 reg_tick if defined. Also see if any of these registers is currently
1963 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1964 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1966 delete_reg_equiv (regno
);
1967 if (REG_TICK (regno
) >= 0)
1970 SUBREG_TICKED (regno
) = -1;
1973 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
1976 /* In the case where we have no call-clobbered hard registers in the
1977 table, we are done. Otherwise, scan the table and remove any
1978 entry that overlaps a call-clobbered register. */
1981 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1982 for (p
= table
[hash
]; p
; p
= next
)
1984 next
= p
->next_same_hash
;
1987 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1990 regno
= REGNO (p
->exp
);
1991 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
1993 for (i
= regno
; i
< endregno
; i
++)
1994 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1996 remove_from_table (p
, hash
);
2002 /* Given an expression X of type CONST,
2003 and ELT which is its table entry (or 0 if it
2004 is not in the hash table),
2005 return an alternate expression for X as a register plus integer.
2006 If none can be found, return 0. */
2009 use_related_value (rtx x
, struct table_elt
*elt
)
2011 struct table_elt
*relt
= 0;
2012 struct table_elt
*p
, *q
;
2013 HOST_WIDE_INT offset
;
2015 /* First, is there anything related known?
2016 If we have a table element, we can tell from that.
2017 Otherwise, must look it up. */
2019 if (elt
!= 0 && elt
->related_value
!= 0)
2021 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2023 rtx subexp
= get_related_value (x
);
2025 relt
= lookup (subexp
,
2026 safe_hash (subexp
, GET_MODE (subexp
)) & HASH_MASK
,
2033 /* Search all related table entries for one that has an
2034 equivalent register. */
2039 /* This loop is strange in that it is executed in two different cases.
2040 The first is when X is already in the table. Then it is searching
2041 the RELATED_VALUE list of X's class (RELT). The second case is when
2042 X is not in the table. Then RELT points to a class for the related
2045 Ensure that, whatever case we are in, that we ignore classes that have
2046 the same value as X. */
2048 if (rtx_equal_p (x
, p
->exp
))
2051 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2058 p
= p
->related_value
;
2060 /* We went all the way around, so there is nothing to be found.
2061 Alternatively, perhaps RELT was in the table for some other reason
2062 and it has no related values recorded. */
2063 if (p
== relt
|| p
== 0)
2070 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2071 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2072 return plus_constant (q
->exp
, offset
);
2075 /* Hash a string. Just add its bytes up. */
2076 static inline unsigned
2077 canon_hash_string (const char *ps
)
2080 const unsigned char *p
= (const unsigned char *) ps
;
2089 /* Hash an rtx. We are careful to make sure the value is never negative.
2090 Equivalent registers hash identically.
2091 MODE is used in hashing for CONST_INTs only;
2092 otherwise the mode of X is used.
2094 Store 1 in do_not_record if any subexpression is volatile.
2096 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2097 which does not have the RTX_UNCHANGING_P bit set.
2099 Note that cse_insn knows that the hash code of a MEM expression
2100 is just (int) MEM plus the hash code of the address. */
2103 canon_hash (rtx x
, enum machine_mode mode
)
2110 /* repeat is used to turn tail-recursion into iteration. */
2115 code
= GET_CODE (x
);
2120 unsigned int regno
= REGNO (x
);
2123 /* On some machines, we can't record any non-fixed hard register,
2124 because extending its life will cause reload problems. We
2125 consider ap, fp, sp, gp to be fixed for this purpose.
2127 We also consider CCmode registers to be fixed for this purpose;
2128 failure to do so leads to failure to simplify 0<100 type of
2131 On all machines, we can't record any global registers.
2132 Nor should we record any register that is in a small
2133 class, as defined by CLASS_LIKELY_SPILLED_P. */
2135 if (regno
>= FIRST_PSEUDO_REGISTER
)
2137 else if (x
== frame_pointer_rtx
2138 || x
== hard_frame_pointer_rtx
2139 || x
== arg_pointer_rtx
2140 || x
== stack_pointer_rtx
2141 || x
== pic_offset_table_rtx
)
2143 else if (global_regs
[regno
])
2145 else if (fixed_regs
[regno
])
2147 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2149 else if (SMALL_REGISTER_CLASSES
)
2151 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2162 hash
+= ((unsigned) REG
<< 7) + (unsigned) REG_QTY (regno
);
2166 /* We handle SUBREG of a REG specially because the underlying
2167 reg changes its hash value with every value change; we don't
2168 want to have to forget unrelated subregs when one subreg changes. */
2171 if (REG_P (SUBREG_REG (x
)))
2173 hash
+= (((unsigned) SUBREG
<< 7)
2174 + REGNO (SUBREG_REG (x
))
2175 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2183 unsigned HOST_WIDE_INT tem
= INTVAL (x
);
2184 hash
+= ((unsigned) CONST_INT
<< 7) + (unsigned) mode
+ tem
;
2189 /* This is like the general case, except that it only counts
2190 the integers representing the constant. */
2191 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2192 if (GET_MODE (x
) != VOIDmode
)
2193 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2195 hash
+= ((unsigned) CONST_DOUBLE_LOW (x
)
2196 + (unsigned) CONST_DOUBLE_HIGH (x
));
2204 units
= CONST_VECTOR_NUNITS (x
);
2206 for (i
= 0; i
< units
; ++i
)
2208 elt
= CONST_VECTOR_ELT (x
, i
);
2209 hash
+= canon_hash (elt
, GET_MODE (elt
));
2215 /* Assume there is only one rtx object for any given label. */
2217 hash
+= ((unsigned) LABEL_REF
<< 7) + (unsigned long) XEXP (x
, 0);
2221 hash
+= ((unsigned) SYMBOL_REF
<< 7) + (unsigned long) XSTR (x
, 0);
2225 /* We don't record if marked volatile or if BLKmode since we don't
2226 know the size of the move. */
2227 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2232 if (! RTX_UNCHANGING_P (x
) || fixed_base_plus_p (XEXP (x
, 0)))
2233 hash_arg_in_memory
= 1;
2235 /* Now that we have already found this special case,
2236 might as well speed it up as much as possible. */
2237 hash
+= (unsigned) MEM
;
2242 /* A USE that mentions non-volatile memory needs special
2243 handling since the MEM may be BLKmode which normally
2244 prevents an entry from being made. Pure calls are
2245 marked by a USE which mentions BLKmode memory. */
2246 if (MEM_P (XEXP (x
, 0))
2247 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2249 hash
+= (unsigned) USE
;
2252 if (! RTX_UNCHANGING_P (x
) || fixed_base_plus_p (XEXP (x
, 0)))
2253 hash_arg_in_memory
= 1;
2255 /* Now that we have already found this special case,
2256 might as well speed it up as much as possible. */
2257 hash
+= (unsigned) MEM
;
2272 case UNSPEC_VOLATILE
:
2277 if (MEM_VOLATILE_P (x
))
2284 /* We don't want to take the filename and line into account. */
2285 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2286 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x
))
2287 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2288 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2290 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2292 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2294 hash
+= (canon_hash (ASM_OPERANDS_INPUT (x
, i
),
2295 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)))
2296 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2300 hash
+= canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2301 x
= ASM_OPERANDS_INPUT (x
, 0);
2302 mode
= GET_MODE (x
);
2314 i
= GET_RTX_LENGTH (code
) - 1;
2315 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2316 fmt
= GET_RTX_FORMAT (code
);
2321 rtx tem
= XEXP (x
, i
);
2323 /* If we are about to do the last recursive call
2324 needed at this level, change it into iteration.
2325 This function is called enough to be worth it. */
2331 hash
+= canon_hash (tem
, 0);
2333 else if (fmt
[i
] == 'E')
2334 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2335 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
2336 else if (fmt
[i
] == 's')
2337 hash
+= canon_hash_string (XSTR (x
, i
));
2338 else if (fmt
[i
] == 'i')
2340 unsigned tem
= XINT (x
, i
);
2343 else if (fmt
[i
] == '0' || fmt
[i
] == 't')
2352 /* Like canon_hash but with no side effects. */
2355 safe_hash (rtx x
, enum machine_mode mode
)
2357 int save_do_not_record
= do_not_record
;
2358 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2359 unsigned hash
= canon_hash (x
, mode
);
2360 hash_arg_in_memory
= save_hash_arg_in_memory
;
2361 do_not_record
= save_do_not_record
;
2365 /* Return 1 iff X and Y would canonicalize into the same thing,
2366 without actually constructing the canonicalization of either one.
2367 If VALIDATE is nonzero,
2368 we assume X is an expression being processed from the rtl
2369 and Y was found in the hash table. We check register refs
2370 in Y for being marked as valid.
2372 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2373 that is known to be in the register. Ordinarily, we don't allow them
2374 to match, because letting them match would cause unpredictable results
2375 in all the places that search a hash table chain for an equivalent
2376 for a given value. A possible equivalent that has different structure
2377 has its hash code computed from different data. Whether the hash code
2378 is the same as that of the given value is pure luck. */
2381 exp_equiv_p (rtx x
, rtx y
, int validate
, int equal_values
)
2387 /* Note: it is incorrect to assume an expression is equivalent to itself
2388 if VALIDATE is nonzero. */
2389 if (x
== y
&& !validate
)
2391 if (x
== 0 || y
== 0)
2394 code
= GET_CODE (x
);
2395 if (code
!= GET_CODE (y
))
2400 /* If X is a constant and Y is a register or vice versa, they may be
2401 equivalent. We only have to validate if Y is a register. */
2402 if (CONSTANT_P (x
) && REG_P (y
)
2403 && REGNO_QTY_VALID_P (REGNO (y
)))
2405 int y_q
= REG_QTY (REGNO (y
));
2406 struct qty_table_elem
*y_ent
= &qty_table
[y_q
];
2408 if (GET_MODE (y
) == y_ent
->mode
2409 && rtx_equal_p (x
, y_ent
->const_rtx
)
2410 && (! validate
|| REG_IN_TABLE (REGNO (y
)) == REG_TICK (REGNO (y
))))
2414 if (CONSTANT_P (y
) && code
== REG
2415 && REGNO_QTY_VALID_P (REGNO (x
)))
2417 int x_q
= REG_QTY (REGNO (x
));
2418 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2420 if (GET_MODE (x
) == x_ent
->mode
2421 && rtx_equal_p (y
, x_ent
->const_rtx
))
2428 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2429 if (GET_MODE (x
) != GET_MODE (y
))
2440 return XEXP (x
, 0) == XEXP (y
, 0);
2443 return XSTR (x
, 0) == XSTR (y
, 0);
2447 unsigned int regno
= REGNO (y
);
2448 unsigned int endregno
2449 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2450 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2453 /* If the quantities are not the same, the expressions are not
2454 equivalent. If there are and we are not to validate, they
2455 are equivalent. Otherwise, ensure all regs are up-to-date. */
2457 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2463 for (i
= regno
; i
< endregno
; i
++)
2464 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2470 /* For commutative operations, check both orders. */
2478 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2479 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2480 validate
, equal_values
))
2481 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2482 validate
, equal_values
)
2483 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2484 validate
, equal_values
)));
2487 /* We don't use the generic code below because we want to
2488 disregard filename and line numbers. */
2490 /* A volatile asm isn't equivalent to any other. */
2491 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2494 if (GET_MODE (x
) != GET_MODE (y
)
2495 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2496 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2497 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2498 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2499 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2502 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2504 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2505 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2506 ASM_OPERANDS_INPUT (y
, i
),
2507 validate
, equal_values
)
2508 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2509 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2519 /* Compare the elements. If any pair of corresponding elements
2520 fail to match, return 0 for the whole things. */
2522 fmt
= GET_RTX_FORMAT (code
);
2523 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2528 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2533 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2535 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2536 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2537 validate
, equal_values
))
2542 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2547 if (XINT (x
, i
) != XINT (y
, i
))
2552 if (XWINT (x
, i
) != XWINT (y
, i
))
2568 /* Return 1 if X has a value that can vary even between two
2569 executions of the program. 0 means X can be compared reliably
2570 against certain constants or near-constants. */
2573 cse_rtx_varies_p (rtx x
, int from_alias
)
2575 /* We need not check for X and the equivalence class being of the same
2576 mode because if X is equivalent to a constant in some mode, it
2577 doesn't vary in any mode. */
2580 && REGNO_QTY_VALID_P (REGNO (x
)))
2582 int x_q
= REG_QTY (REGNO (x
));
2583 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2585 if (GET_MODE (x
) == x_ent
->mode
2586 && x_ent
->const_rtx
!= NULL_RTX
)
2590 if (GET_CODE (x
) == PLUS
2591 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2592 && REG_P (XEXP (x
, 0))
2593 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2595 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2596 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2598 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2599 && x0_ent
->const_rtx
!= NULL_RTX
)
2603 /* This can happen as the result of virtual register instantiation, if
2604 the initial constant is too large to be a valid address. This gives
2605 us a three instruction sequence, load large offset into a register,
2606 load fp minus a constant into a register, then a MEM which is the
2607 sum of the two `constant' registers. */
2608 if (GET_CODE (x
) == PLUS
2609 && REG_P (XEXP (x
, 0))
2610 && REG_P (XEXP (x
, 1))
2611 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2612 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2614 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2615 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2616 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2617 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2619 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2620 && x0_ent
->const_rtx
!= NULL_RTX
2621 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2622 && x1_ent
->const_rtx
!= NULL_RTX
)
2626 return rtx_varies_p (x
, from_alias
);
2629 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2630 the result if necessary. INSN is as for canon_reg. */
2633 validate_canon_reg (rtx
*xloc
, rtx insn
)
2635 rtx
new = canon_reg (*xloc
, insn
);
2638 /* If replacing pseudo with hard reg or vice versa, ensure the
2639 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2640 if (insn
!= 0 && new != 0
2641 && REG_P (new) && REG_P (*xloc
)
2642 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2643 != (REGNO (*xloc
) < FIRST_PSEUDO_REGISTER
))
2644 || GET_MODE (new) != GET_MODE (*xloc
)
2645 || (insn_code
= recog_memoized (insn
)) < 0
2646 || insn_data
[insn_code
].n_dups
> 0))
2647 validate_change (insn
, xloc
, new, 1);
2652 /* Canonicalize an expression:
2653 replace each register reference inside it
2654 with the "oldest" equivalent register.
2656 If INSN is nonzero and we are replacing a pseudo with a hard register
2657 or vice versa, validate_change is used to ensure that INSN remains valid
2658 after we make our substitution. The calls are made with IN_GROUP nonzero
2659 so apply_change_group must be called upon the outermost return from this
2660 function (unless INSN is zero). The result of apply_change_group can
2661 generally be discarded since the changes we are making are optional. */
2664 canon_reg (rtx x
, rtx insn
)
2673 code
= GET_CODE (x
);
2692 struct qty_table_elem
*ent
;
2694 /* Never replace a hard reg, because hard regs can appear
2695 in more than one machine mode, and we must preserve the mode
2696 of each occurrence. Also, some hard regs appear in
2697 MEMs that are shared and mustn't be altered. Don't try to
2698 replace any reg that maps to a reg of class NO_REGS. */
2699 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2700 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2703 q
= REG_QTY (REGNO (x
));
2704 ent
= &qty_table
[q
];
2705 first
= ent
->first_reg
;
2706 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2707 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2708 : gen_rtx_REG (ent
->mode
, first
));
2715 fmt
= GET_RTX_FORMAT (code
);
2716 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2721 validate_canon_reg (&XEXP (x
, i
), insn
);
2722 else if (fmt
[i
] == 'E')
2723 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2724 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2730 /* LOC is a location within INSN that is an operand address (the contents of
2731 a MEM). Find the best equivalent address to use that is valid for this
2734 On most CISC machines, complicated address modes are costly, and rtx_cost
2735 is a good approximation for that cost. However, most RISC machines have
2736 only a few (usually only one) memory reference formats. If an address is
2737 valid at all, it is often just as cheap as any other address. Hence, for
2738 RISC machines, we use `address_cost' to compare the costs of various
2739 addresses. For two addresses of equal cost, choose the one with the
2740 highest `rtx_cost' value as that has the potential of eliminating the
2741 most insns. For equal costs, we choose the first in the equivalence
2742 class. Note that we ignore the fact that pseudo registers are cheaper than
2743 hard registers here because we would also prefer the pseudo registers. */
2746 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2748 struct table_elt
*elt
;
2750 struct table_elt
*p
;
2751 int found_better
= 1;
2752 int save_do_not_record
= do_not_record
;
2753 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2758 /* Do not try to replace constant addresses or addresses of local and
2759 argument slots. These MEM expressions are made only once and inserted
2760 in many instructions, as well as being used to control symbol table
2761 output. It is not safe to clobber them.
2763 There are some uncommon cases where the address is already in a register
2764 for some reason, but we cannot take advantage of that because we have
2765 no easy way to unshare the MEM. In addition, looking up all stack
2766 addresses is costly. */
2767 if ((GET_CODE (addr
) == PLUS
2768 && REG_P (XEXP (addr
, 0))
2769 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2770 && (regno
= REGNO (XEXP (addr
, 0)),
2771 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2772 || regno
== ARG_POINTER_REGNUM
))
2774 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2775 || regno
== HARD_FRAME_POINTER_REGNUM
2776 || regno
== ARG_POINTER_REGNUM
))
2777 || CONSTANT_ADDRESS_P (addr
))
2780 /* If this address is not simply a register, try to fold it. This will
2781 sometimes simplify the expression. Many simplifications
2782 will not be valid, but some, usually applying the associative rule, will
2783 be valid and produce better code. */
2786 rtx folded
= fold_rtx (copy_rtx (addr
), NULL_RTX
);
2787 int addr_folded_cost
= address_cost (folded
, mode
);
2788 int addr_cost
= address_cost (addr
, mode
);
2790 if ((addr_folded_cost
< addr_cost
2791 || (addr_folded_cost
== addr_cost
2792 /* ??? The rtx_cost comparison is left over from an older
2793 version of this code. It is probably no longer helpful. */
2794 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2795 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2796 && validate_change (insn
, loc
, folded
, 0))
2800 /* If this address is not in the hash table, we can't look for equivalences
2801 of the whole address. Also, ignore if volatile. */
2804 hash
= HASH (addr
, Pmode
);
2805 addr_volatile
= do_not_record
;
2806 do_not_record
= save_do_not_record
;
2807 hash_arg_in_memory
= save_hash_arg_in_memory
;
2812 elt
= lookup (addr
, hash
, Pmode
);
2816 /* We need to find the best (under the criteria documented above) entry
2817 in the class that is valid. We use the `flag' field to indicate
2818 choices that were invalid and iterate until we can't find a better
2819 one that hasn't already been tried. */
2821 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2824 while (found_better
)
2826 int best_addr_cost
= address_cost (*loc
, mode
);
2827 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2829 struct table_elt
*best_elt
= elt
;
2832 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2836 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2837 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2838 || (exp_cost
== best_addr_cost
2839 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2842 best_addr_cost
= exp_cost
;
2843 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2850 if (validate_change (insn
, loc
,
2851 canon_reg (copy_rtx (best_elt
->exp
),
2860 /* If the address is a binary operation with the first operand a register
2861 and the second a constant, do the same as above, but looking for
2862 equivalences of the register. Then try to simplify before checking for
2863 the best address to use. This catches a few cases: First is when we
2864 have REG+const and the register is another REG+const. We can often merge
2865 the constants and eliminate one insn and one register. It may also be
2866 that a machine has a cheap REG+REG+const. Finally, this improves the
2867 code on the Alpha for unaligned byte stores. */
2869 if (flag_expensive_optimizations
2870 && ARITHMETIC_P (*loc
)
2871 && REG_P (XEXP (*loc
, 0)))
2873 rtx op1
= XEXP (*loc
, 1);
2876 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2877 do_not_record
= save_do_not_record
;
2878 hash_arg_in_memory
= save_hash_arg_in_memory
;
2880 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2884 /* We need to find the best (under the criteria documented above) entry
2885 in the class that is valid. We use the `flag' field to indicate
2886 choices that were invalid and iterate until we can't find a better
2887 one that hasn't already been tried. */
2889 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2892 while (found_better
)
2894 int best_addr_cost
= address_cost (*loc
, mode
);
2895 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2896 struct table_elt
*best_elt
= elt
;
2897 rtx best_rtx
= *loc
;
2900 /* This is at worst case an O(n^2) algorithm, so limit our search
2901 to the first 32 elements on the list. This avoids trouble
2902 compiling code with very long basic blocks that can easily
2903 call simplify_gen_binary so many times that we run out of
2907 for (p
= elt
->first_same_value
, count
= 0;
2909 p
= p
->next_same_value
, count
++)
2912 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2914 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
2917 new_cost
= address_cost (new, mode
);
2919 if (new_cost
< best_addr_cost
2920 || (new_cost
== best_addr_cost
2921 && (COST (new) + 1) >> 1 > best_rtx_cost
))
2924 best_addr_cost
= new_cost
;
2925 best_rtx_cost
= (COST (new) + 1) >> 1;
2933 if (validate_change (insn
, loc
,
2934 canon_reg (copy_rtx (best_rtx
),
2944 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2945 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2946 what values are being compared.
2948 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2949 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2950 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2951 compared to produce cc0.
2953 The return value is the comparison operator and is either the code of
2954 A or the code corresponding to the inverse of the comparison. */
2956 static enum rtx_code
2957 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2958 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2962 arg1
= *parg1
, arg2
= *parg2
;
2964 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2966 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2968 /* Set nonzero when we find something of interest. */
2970 int reverse_code
= 0;
2971 struct table_elt
*p
= 0;
2973 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2974 On machines with CC0, this is the only case that can occur, since
2975 fold_rtx will return the COMPARE or item being compared with zero
2978 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2981 /* If ARG1 is a comparison operator and CODE is testing for
2982 STORE_FLAG_VALUE, get the inner arguments. */
2984 else if (COMPARISON_P (arg1
))
2986 #ifdef FLOAT_STORE_FLAG_VALUE
2987 REAL_VALUE_TYPE fsfv
;
2991 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2992 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2993 #ifdef FLOAT_STORE_FLAG_VALUE
2994 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2995 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2996 REAL_VALUE_NEGATIVE (fsfv
)))
3001 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3002 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3003 #ifdef FLOAT_STORE_FLAG_VALUE
3004 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3005 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3006 REAL_VALUE_NEGATIVE (fsfv
)))
3009 x
= arg1
, reverse_code
= 1;
3012 /* ??? We could also check for
3014 (ne (and (eq (...) (const_int 1))) (const_int 0))
3016 and related forms, but let's wait until we see them occurring. */
3019 /* Look up ARG1 in the hash table and see if it has an equivalence
3020 that lets us see what is being compared. */
3021 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) & HASH_MASK
,
3025 p
= p
->first_same_value
;
3027 /* If what we compare is already known to be constant, that is as
3029 We need to break the loop in this case, because otherwise we
3030 can have an infinite loop when looking at a reg that is known
3031 to be a constant which is the same as a comparison of a reg
3032 against zero which appears later in the insn stream, which in
3033 turn is constant and the same as the comparison of the first reg
3039 for (; p
; p
= p
->next_same_value
)
3041 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3042 #ifdef FLOAT_STORE_FLAG_VALUE
3043 REAL_VALUE_TYPE fsfv
;
3046 /* If the entry isn't valid, skip it. */
3047 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
3050 if (GET_CODE (p
->exp
) == COMPARE
3051 /* Another possibility is that this machine has a compare insn
3052 that includes the comparison code. In that case, ARG1 would
3053 be equivalent to a comparison operation that would set ARG1 to
3054 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3055 ORIG_CODE is the actual comparison being done; if it is an EQ,
3056 we must reverse ORIG_CODE. On machine with a negative value
3057 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3060 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3061 && (GET_MODE_BITSIZE (inner_mode
)
3062 <= HOST_BITS_PER_WIDE_INT
)
3063 && (STORE_FLAG_VALUE
3064 & ((HOST_WIDE_INT
) 1
3065 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3066 #ifdef FLOAT_STORE_FLAG_VALUE
3068 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3069 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3070 REAL_VALUE_NEGATIVE (fsfv
)))
3073 && COMPARISON_P (p
->exp
)))
3078 else if ((code
== EQ
3080 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3081 && (GET_MODE_BITSIZE (inner_mode
)
3082 <= HOST_BITS_PER_WIDE_INT
)
3083 && (STORE_FLAG_VALUE
3084 & ((HOST_WIDE_INT
) 1
3085 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3086 #ifdef FLOAT_STORE_FLAG_VALUE
3088 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3089 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3090 REAL_VALUE_NEGATIVE (fsfv
)))
3093 && COMPARISON_P (p
->exp
))
3100 /* If this non-trapping address, e.g. fp + constant, the
3101 equivalent is a better operand since it may let us predict
3102 the value of the comparison. */
3103 else if (!rtx_addr_can_trap_p (p
->exp
))
3110 /* If we didn't find a useful equivalence for ARG1, we are done.
3111 Otherwise, set up for the next iteration. */
3115 /* If we need to reverse the comparison, make sure that that is
3116 possible -- we can't necessarily infer the value of GE from LT
3117 with floating-point operands. */
3120 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3121 if (reversed
== UNKNOWN
)
3126 else if (COMPARISON_P (x
))
3127 code
= GET_CODE (x
);
3128 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3131 /* Return our results. Return the modes from before fold_rtx
3132 because fold_rtx might produce const_int, and then it's too late. */
3133 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3134 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3139 /* If X is a nontrivial arithmetic operation on an argument
3140 for which a constant value can be determined, return
3141 the result of operating on that value, as a constant.
3142 Otherwise, return X, possibly with one or more operands
3143 modified by recursive calls to this function.
3145 If X is a register whose contents are known, we do NOT
3146 return those contents here. equiv_constant is called to
3149 INSN is the insn that we may be modifying. If it is 0, make a copy
3150 of X before modifying it. */
3153 fold_rtx (rtx x
, rtx insn
)
3156 enum machine_mode mode
;
3163 /* Folded equivalents of first two operands of X. */
3167 /* Constant equivalents of first three operands of X;
3168 0 when no such equivalent is known. */
3173 /* The mode of the first operand of X. We need this for sign and zero
3175 enum machine_mode mode_arg0
;
3180 mode
= GET_MODE (x
);
3181 code
= GET_CODE (x
);
3191 /* No use simplifying an EXPR_LIST
3192 since they are used only for lists of args
3193 in a function call's REG_EQUAL note. */
3199 return prev_insn_cc0
;
3203 /* If the next insn is a CODE_LABEL followed by a jump table,
3204 PC's value is a LABEL_REF pointing to that label. That
3205 lets us fold switch statements on the VAX. */
3208 if (insn
&& tablejump_p (insn
, &next
, NULL
))
3209 return gen_rtx_LABEL_REF (Pmode
, next
);
3214 /* See if we previously assigned a constant value to this SUBREG. */
3215 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3216 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3219 /* If this is a paradoxical SUBREG, we have no idea what value the
3220 extra bits would have. However, if the operand is equivalent
3221 to a SUBREG whose operand is the same as our mode, and all the
3222 modes are within a word, we can just use the inner operand
3223 because these SUBREGs just say how to treat the register.
3225 Similarly if we find an integer constant. */
3227 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3229 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3230 struct table_elt
*elt
;
3232 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3233 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3234 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3236 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3238 if (CONSTANT_P (elt
->exp
)
3239 && GET_MODE (elt
->exp
) == VOIDmode
)
3242 if (GET_CODE (elt
->exp
) == SUBREG
3243 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3244 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
3245 return copy_rtx (SUBREG_REG (elt
->exp
));
3251 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3252 We might be able to if the SUBREG is extracting a single word in an
3253 integral mode or extracting the low part. */
3255 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3256 const_arg0
= equiv_constant (folded_arg0
);
3258 folded_arg0
= const_arg0
;
3260 if (folded_arg0
!= SUBREG_REG (x
))
3262 new = simplify_subreg (mode
, folded_arg0
,
3263 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3268 if (REG_P (folded_arg0
)
3269 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3271 struct table_elt
*elt
;
3273 /* We can use HASH here since we know that canon_hash won't be
3275 elt
= lookup (folded_arg0
,
3276 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3277 GET_MODE (folded_arg0
));
3280 elt
= elt
->first_same_value
;
3282 if (subreg_lowpart_p (x
))
3283 /* If this is a narrowing SUBREG and our operand is a REG, see
3284 if we can find an equivalence for REG that is an arithmetic
3285 operation in a wider mode where both operands are paradoxical
3286 SUBREGs from objects of our result mode. In that case, we
3287 couldn-t report an equivalent value for that operation, since we
3288 don't know what the extra bits will be. But we can find an
3289 equivalence for this SUBREG by folding that operation in the
3290 narrow mode. This allows us to fold arithmetic in narrow modes
3291 when the machine only supports word-sized arithmetic.
3293 Also look for a case where we have a SUBREG whose operand
3294 is the same as our result. If both modes are smaller
3295 than a word, we are simply interpreting a register in
3296 different modes and we can use the inner value. */
3298 for (; elt
; elt
= elt
->next_same_value
)
3300 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3302 /* Just check for unary and binary operations. */
3303 if (UNARY_P (elt
->exp
)
3304 && eltcode
!= SIGN_EXTEND
3305 && eltcode
!= ZERO_EXTEND
3306 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3307 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3308 && (GET_MODE_CLASS (mode
)
3309 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3311 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3313 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3314 op0
= fold_rtx (op0
, NULL_RTX
);
3316 op0
= equiv_constant (op0
);
3318 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3321 else if (ARITHMETIC_P (elt
->exp
)
3322 && eltcode
!= DIV
&& eltcode
!= MOD
3323 && eltcode
!= UDIV
&& eltcode
!= UMOD
3324 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3325 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3326 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3327 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3329 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3330 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3331 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3333 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3335 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3336 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3338 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3339 op0
= fold_rtx (op0
, NULL_RTX
);
3342 op0
= equiv_constant (op0
);
3344 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3345 op1
= fold_rtx (op1
, NULL_RTX
);
3348 op1
= equiv_constant (op1
);
3350 /* If we are looking for the low SImode part of
3351 (ashift:DI c (const_int 32)), it doesn't work
3352 to compute that in SImode, because a 32-bit shift
3353 in SImode is unpredictable. We know the value is 0. */
3355 && GET_CODE (elt
->exp
) == ASHIFT
3356 && GET_CODE (op1
) == CONST_INT
3357 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3360 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3361 /* If the count fits in the inner mode's width,
3362 but exceeds the outer mode's width,
3363 the value will get truncated to 0
3365 new = CONST0_RTX (mode
);
3367 /* If the count exceeds even the inner mode's width,
3368 don't fold this expression. */
3371 else if (op0
&& op1
)
3372 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
, op0
, op1
);
3375 else if (GET_CODE (elt
->exp
) == SUBREG
3376 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3377 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3379 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
3380 new = copy_rtx (SUBREG_REG (elt
->exp
));
3386 /* A SUBREG resulting from a zero extension may fold to zero if
3387 it extracts higher bits than the ZERO_EXTEND's source bits.
3388 FIXME: if combine tried to, er, combine these instructions,
3389 this transformation may be moved to simplify_subreg. */
3390 for (; elt
; elt
= elt
->next_same_value
)
3392 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3394 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3395 return CONST0_RTX (mode
);
3403 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3404 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3405 new = lookup_as_function (XEXP (x
, 0), code
);
3407 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3411 /* If we are not actually processing an insn, don't try to find the
3412 best address. Not only don't we care, but we could modify the
3413 MEM in an invalid way since we have no insn to validate against. */
3415 find_best_addr (insn
, &XEXP (x
, 0), GET_MODE (x
));
3418 /* Even if we don't fold in the insn itself,
3419 we can safely do so here, in hopes of getting a constant. */
3420 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3422 HOST_WIDE_INT offset
= 0;
3425 && REGNO_QTY_VALID_P (REGNO (addr
)))
3427 int addr_q
= REG_QTY (REGNO (addr
));
3428 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3430 if (GET_MODE (addr
) == addr_ent
->mode
3431 && addr_ent
->const_rtx
!= NULL_RTX
)
3432 addr
= addr_ent
->const_rtx
;
3435 /* If address is constant, split it into a base and integer offset. */
3436 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3438 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3439 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3441 base
= XEXP (XEXP (addr
, 0), 0);
3442 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3444 else if (GET_CODE (addr
) == LO_SUM
3445 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3446 base
= XEXP (addr
, 1);
3448 /* If this is a constant pool reference, we can fold it into its
3449 constant to allow better value tracking. */
3450 if (base
&& GET_CODE (base
) == SYMBOL_REF
3451 && CONSTANT_POOL_ADDRESS_P (base
))
3453 rtx constant
= get_pool_constant (base
);
3454 enum machine_mode const_mode
= get_pool_mode (base
);
3457 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3459 constant_pool_entries_cost
= COST (constant
);
3460 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3463 /* If we are loading the full constant, we have an equivalence. */
3464 if (offset
== 0 && mode
== const_mode
)
3467 /* If this actually isn't a constant (weird!), we can't do
3468 anything. Otherwise, handle the two most common cases:
3469 extracting a word from a multi-word constant, and extracting
3470 the low-order bits. Other cases don't seem common enough to
3472 if (! CONSTANT_P (constant
))
3475 if (GET_MODE_CLASS (mode
) == MODE_INT
3476 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3477 && offset
% UNITS_PER_WORD
== 0
3478 && (new = operand_subword (constant
,
3479 offset
/ UNITS_PER_WORD
,
3480 0, const_mode
)) != 0)
3483 if (((BYTES_BIG_ENDIAN
3484 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3485 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3486 && (new = gen_lowpart (mode
, constant
)) != 0)
3490 /* If this is a reference to a label at a known position in a jump
3491 table, we also know its value. */
3492 if (base
&& GET_CODE (base
) == LABEL_REF
)
3494 rtx label
= XEXP (base
, 0);
3495 rtx table_insn
= NEXT_INSN (label
);
3497 if (table_insn
&& JUMP_P (table_insn
)
3498 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3500 rtx table
= PATTERN (table_insn
);
3503 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3504 < XVECLEN (table
, 0)))
3505 return XVECEXP (table
, 0,
3506 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3508 if (table_insn
&& JUMP_P (table_insn
)
3509 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3511 rtx table
= PATTERN (table_insn
);
3514 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3515 < XVECLEN (table
, 1)))
3517 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3518 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3521 if (GET_MODE (table
) != Pmode
)
3522 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3524 /* Indicate this is a constant. This isn't a
3525 valid form of CONST, but it will only be used
3526 to fold the next insns and then discarded, so
3529 Note this expression must be explicitly discarded,
3530 by cse_insn, else it may end up in a REG_EQUAL note
3531 and "escape" to cause problems elsewhere. */
3532 return gen_rtx_CONST (GET_MODE (new), new);
3540 #ifdef NO_FUNCTION_CSE
3542 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3548 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3549 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3550 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3560 mode_arg0
= VOIDmode
;
3562 /* Try folding our operands.
3563 Then see which ones have constant values known. */
3565 fmt
= GET_RTX_FORMAT (code
);
3566 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3569 rtx arg
= XEXP (x
, i
);
3570 rtx folded_arg
= arg
, const_arg
= 0;
3571 enum machine_mode mode_arg
= GET_MODE (arg
);
3572 rtx cheap_arg
, expensive_arg
;
3573 rtx replacements
[2];
3575 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3577 /* Most arguments are cheap, so handle them specially. */
3578 switch (GET_CODE (arg
))
3581 /* This is the same as calling equiv_constant; it is duplicated
3583 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3585 int arg_q
= REG_QTY (REGNO (arg
));
3586 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3588 if (arg_ent
->const_rtx
!= NULL_RTX
3589 && !REG_P (arg_ent
->const_rtx
)
3590 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3592 = gen_lowpart (GET_MODE (arg
),
3593 arg_ent
->const_rtx
);
3608 folded_arg
= prev_insn_cc0
;
3609 mode_arg
= prev_insn_cc0_mode
;
3610 const_arg
= equiv_constant (folded_arg
);
3615 folded_arg
= fold_rtx (arg
, insn
);
3616 const_arg
= equiv_constant (folded_arg
);
3619 /* For the first three operands, see if the operand
3620 is constant or equivalent to a constant. */
3624 folded_arg0
= folded_arg
;
3625 const_arg0
= const_arg
;
3626 mode_arg0
= mode_arg
;
3629 folded_arg1
= folded_arg
;
3630 const_arg1
= const_arg
;
3633 const_arg2
= const_arg
;
3637 /* Pick the least expensive of the folded argument and an
3638 equivalent constant argument. */
3639 if (const_arg
== 0 || const_arg
== folded_arg
3640 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3641 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3643 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3645 /* Try to replace the operand with the cheapest of the two
3646 possibilities. If it doesn't work and this is either of the first
3647 two operands of a commutative operation, try swapping them.
3648 If THAT fails, try the more expensive, provided it is cheaper
3649 than what is already there. */
3651 if (cheap_arg
== XEXP (x
, i
))
3654 if (insn
== 0 && ! copied
)
3660 /* Order the replacements from cheapest to most expensive. */
3661 replacements
[0] = cheap_arg
;
3662 replacements
[1] = expensive_arg
;
3664 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3666 int new_cost
= COST_IN (replacements
[j
], code
);
3668 /* Stop if what existed before was cheaper. Prefer constants
3669 in the case of a tie. */
3670 if (new_cost
> old_cost
3671 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3674 /* It's not safe to substitute the operand of a conversion
3675 operator with a constant, as the conversion's identity
3676 depends upon the mode of it's operand. This optimization
3677 is handled by the call to simplify_unary_operation. */
3678 if (GET_RTX_CLASS (code
) == RTX_UNARY
3679 && GET_MODE (replacements
[j
]) != mode_arg0
3680 && (code
== ZERO_EXTEND
3681 || code
== SIGN_EXTEND
3683 || code
== FLOAT_TRUNCATE
3684 || code
== FLOAT_EXTEND
3687 || code
== UNSIGNED_FLOAT
3688 || code
== UNSIGNED_FIX
))
3691 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3694 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3695 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3697 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3698 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3700 if (apply_change_group ())
3702 /* Swap them back to be invalid so that this loop can
3703 continue and flag them to be swapped back later. */
3706 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3718 /* Don't try to fold inside of a vector of expressions.
3719 Doing nothing is harmless. */
3723 /* If a commutative operation, place a constant integer as the second
3724 operand unless the first operand is also a constant integer. Otherwise,
3725 place any constant second unless the first operand is also a constant. */
3727 if (COMMUTATIVE_P (x
))
3730 || swap_commutative_operands_p (const_arg0
? const_arg0
3732 const_arg1
? const_arg1
3735 rtx tem
= XEXP (x
, 0);
3737 if (insn
== 0 && ! copied
)
3743 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3744 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3745 if (apply_change_group ())
3747 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3748 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3753 /* If X is an arithmetic operation, see if we can simplify it. */
3755 switch (GET_RTX_CLASS (code
))
3761 /* We can't simplify extension ops unless we know the
3763 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3764 && mode_arg0
== VOIDmode
)
3767 /* If we had a CONST, strip it off and put it back later if we
3769 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3770 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3772 new = simplify_unary_operation (code
, mode
,
3773 const_arg0
? const_arg0
: folded_arg0
,
3775 if (new != 0 && is_const
)
3776 new = gen_rtx_CONST (mode
, new);
3781 case RTX_COMM_COMPARE
:
3782 /* See what items are actually being compared and set FOLDED_ARG[01]
3783 to those values and CODE to the actual comparison code. If any are
3784 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3785 do anything if both operands are already known to be constant. */
3787 if (const_arg0
== 0 || const_arg1
== 0)
3789 struct table_elt
*p0
, *p1
;
3790 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3791 enum machine_mode mode_arg1
;
3793 #ifdef FLOAT_STORE_FLAG_VALUE
3794 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3796 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3797 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3798 false_rtx
= CONST0_RTX (mode
);
3802 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3803 &mode_arg0
, &mode_arg1
);
3804 const_arg0
= equiv_constant (folded_arg0
);
3805 const_arg1
= equiv_constant (folded_arg1
);
3807 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3808 what kinds of things are being compared, so we can't do
3809 anything with this comparison. */
3811 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3814 /* If we do not now have two constants being compared, see
3815 if we can nevertheless deduce some things about the
3817 if (const_arg0
== 0 || const_arg1
== 0)
3819 /* Some addresses are known to be nonzero. We don't know
3820 their sign, but equality comparisons are known. */
3821 if (const_arg1
== const0_rtx
3822 && nonzero_address_p (folded_arg0
))
3826 else if (code
== NE
)
3830 /* See if the two operands are the same. */
3832 if (folded_arg0
== folded_arg1
3833 || (REG_P (folded_arg0
)
3834 && REG_P (folded_arg1
)
3835 && (REG_QTY (REGNO (folded_arg0
))
3836 == REG_QTY (REGNO (folded_arg1
))))
3837 || ((p0
= lookup (folded_arg0
,
3838 (safe_hash (folded_arg0
, mode_arg0
)
3839 & HASH_MASK
), mode_arg0
))
3840 && (p1
= lookup (folded_arg1
,
3841 (safe_hash (folded_arg1
, mode_arg0
)
3842 & HASH_MASK
), mode_arg0
))
3843 && p0
->first_same_value
== p1
->first_same_value
))
3845 /* Sadly two equal NaNs are not equivalent. */
3846 if (!HONOR_NANS (mode_arg0
))
3847 return ((code
== EQ
|| code
== LE
|| code
== GE
3848 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3849 || code
== UNLE
|| code
== UNGE
3851 ? true_rtx
: false_rtx
);
3852 /* Take care for the FP compares we can resolve. */
3853 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
3855 if (code
== LTGT
|| code
== LT
|| code
== GT
)
3859 /* If FOLDED_ARG0 is a register, see if the comparison we are
3860 doing now is either the same as we did before or the reverse
3861 (we only check the reverse if not floating-point). */
3862 else if (REG_P (folded_arg0
))
3864 int qty
= REG_QTY (REGNO (folded_arg0
));
3866 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3868 struct qty_table_elem
*ent
= &qty_table
[qty
];
3870 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3871 || (! FLOAT_MODE_P (mode_arg0
)
3872 && comparison_dominates_p (ent
->comparison_code
,
3873 reverse_condition (code
))))
3874 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3876 && rtx_equal_p (ent
->comparison_const
,
3878 || (REG_P (folded_arg1
)
3879 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3880 return (comparison_dominates_p (ent
->comparison_code
, code
)
3881 ? true_rtx
: false_rtx
);
3887 /* If we are comparing against zero, see if the first operand is
3888 equivalent to an IOR with a constant. If so, we may be able to
3889 determine the result of this comparison. */
3891 if (const_arg1
== const0_rtx
)
3893 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3897 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3898 && GET_CODE (inner_const
) == CONST_INT
3899 && INTVAL (inner_const
) != 0)
3901 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
3902 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
3903 && (INTVAL (inner_const
)
3904 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
3905 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3907 #ifdef FLOAT_STORE_FLAG_VALUE
3908 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3910 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3911 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3912 false_rtx
= CONST0_RTX (mode
);
3937 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3938 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3939 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3944 case RTX_COMM_ARITH
:
3948 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3949 with that LABEL_REF as its second operand. If so, the result is
3950 the first operand of that MINUS. This handles switches with an
3951 ADDR_DIFF_VEC table. */
3952 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3955 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3956 : lookup_as_function (folded_arg0
, MINUS
);
3958 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3959 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3962 /* Now try for a CONST of a MINUS like the above. */
3963 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3964 : lookup_as_function (folded_arg0
, CONST
))) != 0
3965 && GET_CODE (XEXP (y
, 0)) == MINUS
3966 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3967 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3968 return XEXP (XEXP (y
, 0), 0);
3971 /* Likewise if the operands are in the other order. */
3972 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3975 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3976 : lookup_as_function (folded_arg1
, MINUS
);
3978 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3979 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
3982 /* Now try for a CONST of a MINUS like the above. */
3983 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3984 : lookup_as_function (folded_arg1
, CONST
))) != 0
3985 && GET_CODE (XEXP (y
, 0)) == MINUS
3986 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3987 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
3988 return XEXP (XEXP (y
, 0), 0);
3991 /* If second operand is a register equivalent to a negative
3992 CONST_INT, see if we can find a register equivalent to the
3993 positive constant. Make a MINUS if so. Don't do this for
3994 a non-negative constant since we might then alternate between
3995 choosing positive and negative constants. Having the positive
3996 constant previously-used is the more common case. Be sure
3997 the resulting constant is non-negative; if const_arg1 were
3998 the smallest negative number this would overflow: depending
3999 on the mode, this would either just be the same value (and
4000 hence not save anything) or be incorrect. */
4001 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4002 && INTVAL (const_arg1
) < 0
4003 /* This used to test
4005 -INTVAL (const_arg1) >= 0
4007 But The Sun V5.0 compilers mis-compiled that test. So
4008 instead we test for the problematic value in a more direct
4009 manner and hope the Sun compilers get it correct. */
4010 && INTVAL (const_arg1
) !=
4011 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4012 && REG_P (folded_arg1
))
4014 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4016 = lookup (new_const
, safe_hash (new_const
, mode
) & HASH_MASK
,
4020 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4022 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4023 canon_reg (p
->exp
, NULL_RTX
));
4028 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4029 If so, produce (PLUS Z C2-C). */
4030 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4032 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4033 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4034 return fold_rtx (plus_constant (copy_rtx (y
),
4035 -INTVAL (const_arg1
)),
4042 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4043 case IOR
: case AND
: case XOR
:
4045 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4046 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4047 is known to be of similar form, we may be able to replace the
4048 operation with a combined operation. This may eliminate the
4049 intermediate operation if every use is simplified in this way.
4050 Note that the similar optimization done by combine.c only works
4051 if the intermediate operation's result has only one reference. */
4053 if (REG_P (folded_arg0
)
4054 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4057 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4058 rtx y
= lookup_as_function (folded_arg0
, code
);
4060 enum rtx_code associate_code
;
4064 || 0 == (inner_const
4065 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4066 || GET_CODE (inner_const
) != CONST_INT
4067 /* If we have compiled a statement like
4068 "if (x == (x & mask1))", and now are looking at
4069 "x & mask2", we will have a case where the first operand
4070 of Y is the same as our first operand. Unless we detect
4071 this case, an infinite loop will result. */
4072 || XEXP (y
, 0) == folded_arg0
)
4075 /* Don't associate these operations if they are a PLUS with the
4076 same constant and it is a power of two. These might be doable
4077 with a pre- or post-increment. Similarly for two subtracts of
4078 identical powers of two with post decrement. */
4080 if (code
== PLUS
&& const_arg1
== inner_const
4081 && ((HAVE_PRE_INCREMENT
4082 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4083 || (HAVE_POST_INCREMENT
4084 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4085 || (HAVE_PRE_DECREMENT
4086 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4087 || (HAVE_POST_DECREMENT
4088 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4091 /* Compute the code used to compose the constants. For example,
4092 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4094 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4096 new_const
= simplify_binary_operation (associate_code
, mode
,
4097 const_arg1
, inner_const
);
4102 /* If we are associating shift operations, don't let this
4103 produce a shift of the size of the object or larger.
4104 This could occur when we follow a sign-extend by a right
4105 shift on a machine that does a sign-extend as a pair
4108 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4109 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4111 /* As an exception, we can turn an ASHIFTRT of this
4112 form into a shift of the number of bits - 1. */
4113 if (code
== ASHIFTRT
)
4114 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4119 y
= copy_rtx (XEXP (y
, 0));
4121 /* If Y contains our first operand (the most common way this
4122 can happen is if Y is a MEM), we would do into an infinite
4123 loop if we tried to fold it. So don't in that case. */
4125 if (! reg_mentioned_p (folded_arg0
, y
))
4126 y
= fold_rtx (y
, insn
);
4128 return simplify_gen_binary (code
, mode
, y
, new_const
);
4132 case DIV
: case UDIV
:
4133 /* ??? The associative optimization performed immediately above is
4134 also possible for DIV and UDIV using associate_code of MULT.
4135 However, we would need extra code to verify that the
4136 multiplication does not overflow, that is, there is no overflow
4137 in the calculation of new_const. */
4144 new = simplify_binary_operation (code
, mode
,
4145 const_arg0
? const_arg0
: folded_arg0
,
4146 const_arg1
? const_arg1
: folded_arg1
);
4150 /* (lo_sum (high X) X) is simply X. */
4151 if (code
== LO_SUM
&& const_arg0
!= 0
4152 && GET_CODE (const_arg0
) == HIGH
4153 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4158 case RTX_BITFIELD_OPS
:
4159 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4160 const_arg0
? const_arg0
: folded_arg0
,
4161 const_arg1
? const_arg1
: folded_arg1
,
4162 const_arg2
? const_arg2
: XEXP (x
, 2));
4169 return new ? new : x
;
4172 /* Return a constant value currently equivalent to X.
4173 Return 0 if we don't know one. */
4176 equiv_constant (rtx x
)
4179 && REGNO_QTY_VALID_P (REGNO (x
)))
4181 int x_q
= REG_QTY (REGNO (x
));
4182 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4184 if (x_ent
->const_rtx
)
4185 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4188 if (x
== 0 || CONSTANT_P (x
))
4191 /* If X is a MEM, try to fold it outside the context of any insn to see if
4192 it might be equivalent to a constant. That handles the case where it
4193 is a constant-pool reference. Then try to look it up in the hash table
4194 in case it is something whose value we have seen before. */
4198 struct table_elt
*elt
;
4200 x
= fold_rtx (x
, NULL_RTX
);
4204 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) & HASH_MASK
, GET_MODE (x
));
4208 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4209 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4216 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4217 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4218 least-significant part of X.
4219 MODE specifies how big a part of X to return.
4221 If the requested operation cannot be done, 0 is returned.
4223 This is similar to gen_lowpart_general in emit-rtl.c. */
4226 gen_lowpart_if_possible (enum machine_mode mode
, rtx x
)
4228 rtx result
= gen_lowpart_common (mode
, x
);
4234 /* This is the only other case we handle. */
4238 if (WORDS_BIG_ENDIAN
)
4239 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4240 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4241 if (BYTES_BIG_ENDIAN
)
4242 /* Adjust the address so that the address-after-the-data is
4244 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4245 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4247 new = adjust_address_nv (x
, mode
, offset
);
4248 if (! memory_address_p (mode
, XEXP (new, 0)))
4257 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4258 branch. It will be zero if not.
4260 In certain cases, this can cause us to add an equivalence. For example,
4261 if we are following the taken case of
4263 we can add the fact that `i' and '2' are now equivalent.
4265 In any case, we can record that this comparison was passed. If the same
4266 comparison is seen later, we will know its value. */
4269 record_jump_equiv (rtx insn
, int taken
)
4271 int cond_known_true
;
4274 enum machine_mode mode
, mode0
, mode1
;
4275 int reversed_nonequality
= 0;
4278 /* Ensure this is the right kind of insn. */
4279 if (! any_condjump_p (insn
))
4281 set
= pc_set (insn
);
4283 /* See if this jump condition is known true or false. */
4285 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4287 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4289 /* Get the type of comparison being done and the operands being compared.
4290 If we had to reverse a non-equality condition, record that fact so we
4291 know that it isn't valid for floating-point. */
4292 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4293 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4294 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4296 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4297 if (! cond_known_true
)
4299 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4301 /* Don't remember if we can't find the inverse. */
4302 if (code
== UNKNOWN
)
4306 /* The mode is the mode of the non-constant. */
4308 if (mode1
!= VOIDmode
)
4311 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4314 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4315 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4316 Make any useful entries we can with that information. Called from
4317 above function and called recursively. */
4320 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4321 rtx op1
, int reversed_nonequality
)
4323 unsigned op0_hash
, op1_hash
;
4324 int op0_in_memory
, op1_in_memory
;
4325 struct table_elt
*op0_elt
, *op1_elt
;
4327 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4328 we know that they are also equal in the smaller mode (this is also
4329 true for all smaller modes whether or not there is a SUBREG, but
4330 is not worth testing for with no SUBREG). */
4332 /* Note that GET_MODE (op0) may not equal MODE. */
4333 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4334 && (GET_MODE_SIZE (GET_MODE (op0
))
4335 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4337 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4338 rtx tem
= gen_lowpart (inner_mode
, op1
);
4340 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4341 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4342 reversed_nonequality
);
4345 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4346 && (GET_MODE_SIZE (GET_MODE (op1
))
4347 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4349 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4350 rtx tem
= gen_lowpart (inner_mode
, op0
);
4352 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4353 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4354 reversed_nonequality
);
4357 /* Similarly, if this is an NE comparison, and either is a SUBREG
4358 making a smaller mode, we know the whole thing is also NE. */
4360 /* Note that GET_MODE (op0) may not equal MODE;
4361 if we test MODE instead, we can get an infinite recursion
4362 alternating between two modes each wider than MODE. */
4364 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4365 && subreg_lowpart_p (op0
)
4366 && (GET_MODE_SIZE (GET_MODE (op0
))
4367 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4369 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4370 rtx tem
= gen_lowpart (inner_mode
, op1
);
4372 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
4373 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op1
, 0),
4374 reversed_nonequality
);
4377 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4378 && subreg_lowpart_p (op1
)
4379 && (GET_MODE_SIZE (GET_MODE (op1
))
4380 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4382 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4383 rtx tem
= gen_lowpart (inner_mode
, op0
);
4385 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
4386 tem
? tem
: gen_rtx_SUBREG (inner_mode
, op0
, 0),
4387 reversed_nonequality
);
4390 /* Hash both operands. */
4393 hash_arg_in_memory
= 0;
4394 op0_hash
= HASH (op0
, mode
);
4395 op0_in_memory
= hash_arg_in_memory
;
4401 hash_arg_in_memory
= 0;
4402 op1_hash
= HASH (op1
, mode
);
4403 op1_in_memory
= hash_arg_in_memory
;
4408 /* Look up both operands. */
4409 op0_elt
= lookup (op0
, op0_hash
, mode
);
4410 op1_elt
= lookup (op1
, op1_hash
, mode
);
4412 /* If both operands are already equivalent or if they are not in the
4413 table but are identical, do nothing. */
4414 if ((op0_elt
!= 0 && op1_elt
!= 0
4415 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4416 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4419 /* If we aren't setting two things equal all we can do is save this
4420 comparison. Similarly if this is floating-point. In the latter
4421 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4422 If we record the equality, we might inadvertently delete code
4423 whose intent was to change -0 to +0. */
4425 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4427 struct qty_table_elem
*ent
;
4430 /* If we reversed a floating-point comparison, if OP0 is not a
4431 register, or if OP1 is neither a register or constant, we can't
4435 op1
= equiv_constant (op1
);
4437 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4438 || !REG_P (op0
) || op1
== 0)
4441 /* Put OP0 in the hash table if it isn't already. This gives it a
4442 new quantity number. */
4445 if (insert_regs (op0
, NULL
, 0))
4447 rehash_using_reg (op0
);
4448 op0_hash
= HASH (op0
, mode
);
4450 /* If OP0 is contained in OP1, this changes its hash code
4451 as well. Faster to rehash than to check, except
4452 for the simple case of a constant. */
4453 if (! CONSTANT_P (op1
))
4454 op1_hash
= HASH (op1
,mode
);
4457 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4458 op0_elt
->in_memory
= op0_in_memory
;
4461 qty
= REG_QTY (REGNO (op0
));
4462 ent
= &qty_table
[qty
];
4464 ent
->comparison_code
= code
;
4467 /* Look it up again--in case op0 and op1 are the same. */
4468 op1_elt
= lookup (op1
, op1_hash
, mode
);
4470 /* Put OP1 in the hash table so it gets a new quantity number. */
4473 if (insert_regs (op1
, NULL
, 0))
4475 rehash_using_reg (op1
);
4476 op1_hash
= HASH (op1
, mode
);
4479 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4480 op1_elt
->in_memory
= op1_in_memory
;
4483 ent
->comparison_const
= NULL_RTX
;
4484 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4488 ent
->comparison_const
= op1
;
4489 ent
->comparison_qty
= -1;
4495 /* If either side is still missing an equivalence, make it now,
4496 then merge the equivalences. */
4500 if (insert_regs (op0
, NULL
, 0))
4502 rehash_using_reg (op0
);
4503 op0_hash
= HASH (op0
, mode
);
4506 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4507 op0_elt
->in_memory
= op0_in_memory
;
4512 if (insert_regs (op1
, NULL
, 0))
4514 rehash_using_reg (op1
);
4515 op1_hash
= HASH (op1
, mode
);
4518 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4519 op1_elt
->in_memory
= op1_in_memory
;
4522 merge_equiv_classes (op0_elt
, op1_elt
);
4523 last_jump_equiv_class
= op0_elt
;
4526 /* CSE processing for one instruction.
4527 First simplify sources and addresses of all assignments
4528 in the instruction, using previously-computed equivalents values.
4529 Then install the new sources and destinations in the table
4530 of available values.
4532 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4533 the insn. It means that INSN is inside libcall block. In this
4534 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4536 /* Data on one SET contained in the instruction. */
4540 /* The SET rtx itself. */
4542 /* The SET_SRC of the rtx (the original value, if it is changing). */
4544 /* The hash-table element for the SET_SRC of the SET. */
4545 struct table_elt
*src_elt
;
4546 /* Hash value for the SET_SRC. */
4548 /* Hash value for the SET_DEST. */
4550 /* The SET_DEST, with SUBREG, etc., stripped. */
4552 /* Nonzero if the SET_SRC is in memory. */
4554 /* Nonzero if the SET_SRC contains something
4555 whose value cannot be predicted and understood. */
4557 /* Original machine mode, in case it becomes a CONST_INT.
4558 The size of this field should match the size of the mode
4559 field of struct rtx_def (see rtl.h). */
4560 ENUM_BITFIELD(machine_mode
) mode
: 8;
4561 /* A constant equivalent for SET_SRC, if any. */
4563 /* Original SET_SRC value used for libcall notes. */
4565 /* Hash value of constant equivalent for SET_SRC. */
4566 unsigned src_const_hash
;
4567 /* Table entry for constant equivalent for SET_SRC, if any. */
4568 struct table_elt
*src_const_elt
;
4572 cse_insn (rtx insn
, rtx libcall_insn
)
4574 rtx x
= PATTERN (insn
);
4580 /* Records what this insn does to set CC0. */
4581 rtx this_insn_cc0
= 0;
4582 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4586 struct table_elt
*src_eqv_elt
= 0;
4587 int src_eqv_volatile
= 0;
4588 int src_eqv_in_memory
= 0;
4589 unsigned src_eqv_hash
= 0;
4591 struct set
*sets
= (struct set
*) 0;
4595 /* Find all the SETs and CLOBBERs in this instruction.
4596 Record all the SETs in the array `set' and count them.
4597 Also determine whether there is a CLOBBER that invalidates
4598 all memory references, or all references at varying addresses. */
4602 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4604 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4605 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4606 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4610 if (GET_CODE (x
) == SET
)
4612 sets
= alloca (sizeof (struct set
));
4615 /* Ignore SETs that are unconditional jumps.
4616 They never need cse processing, so this does not hurt.
4617 The reason is not efficiency but rather
4618 so that we can test at the end for instructions
4619 that have been simplified to unconditional jumps
4620 and not be misled by unchanged instructions
4621 that were unconditional jumps to begin with. */
4622 if (SET_DEST (x
) == pc_rtx
4623 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4626 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4627 The hard function value register is used only once, to copy to
4628 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4629 Ensure we invalidate the destination register. On the 80386 no
4630 other code would invalidate it since it is a fixed_reg.
4631 We need not check the return of apply_change_group; see canon_reg. */
4633 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4635 canon_reg (SET_SRC (x
), insn
);
4636 apply_change_group ();
4637 fold_rtx (SET_SRC (x
), insn
);
4638 invalidate (SET_DEST (x
), VOIDmode
);
4643 else if (GET_CODE (x
) == PARALLEL
)
4645 int lim
= XVECLEN (x
, 0);
4647 sets
= alloca (lim
* sizeof (struct set
));
4649 /* Find all regs explicitly clobbered in this insn,
4650 and ensure they are not replaced with any other regs
4651 elsewhere in this insn.
4652 When a reg that is clobbered is also used for input,
4653 we should presume that that is for a reason,
4654 and we should not substitute some other register
4655 which is not supposed to be clobbered.
4656 Therefore, this loop cannot be merged into the one below
4657 because a CALL may precede a CLOBBER and refer to the
4658 value clobbered. We must not let a canonicalization do
4659 anything in that case. */
4660 for (i
= 0; i
< lim
; i
++)
4662 rtx y
= XVECEXP (x
, 0, i
);
4663 if (GET_CODE (y
) == CLOBBER
)
4665 rtx clobbered
= XEXP (y
, 0);
4667 if (REG_P (clobbered
)
4668 || GET_CODE (clobbered
) == SUBREG
)
4669 invalidate (clobbered
, VOIDmode
);
4670 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4671 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4672 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4676 for (i
= 0; i
< lim
; i
++)
4678 rtx y
= XVECEXP (x
, 0, i
);
4679 if (GET_CODE (y
) == SET
)
4681 /* As above, we ignore unconditional jumps and call-insns and
4682 ignore the result of apply_change_group. */
4683 if (GET_CODE (SET_SRC (y
)) == CALL
)
4685 canon_reg (SET_SRC (y
), insn
);
4686 apply_change_group ();
4687 fold_rtx (SET_SRC (y
), insn
);
4688 invalidate (SET_DEST (y
), VOIDmode
);
4690 else if (SET_DEST (y
) == pc_rtx
4691 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4694 sets
[n_sets
++].rtl
= y
;
4696 else if (GET_CODE (y
) == CLOBBER
)
4698 /* If we clobber memory, canon the address.
4699 This does nothing when a register is clobbered
4700 because we have already invalidated the reg. */
4701 if (MEM_P (XEXP (y
, 0)))
4702 canon_reg (XEXP (y
, 0), NULL_RTX
);
4704 else if (GET_CODE (y
) == USE
4705 && ! (REG_P (XEXP (y
, 0))
4706 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4707 canon_reg (y
, NULL_RTX
);
4708 else if (GET_CODE (y
) == CALL
)
4710 /* The result of apply_change_group can be ignored; see
4712 canon_reg (y
, insn
);
4713 apply_change_group ();
4718 else if (GET_CODE (x
) == CLOBBER
)
4720 if (MEM_P (XEXP (x
, 0)))
4721 canon_reg (XEXP (x
, 0), NULL_RTX
);
4724 /* Canonicalize a USE of a pseudo register or memory location. */
4725 else if (GET_CODE (x
) == USE
4726 && ! (REG_P (XEXP (x
, 0))
4727 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4728 canon_reg (XEXP (x
, 0), NULL_RTX
);
4729 else if (GET_CODE (x
) == CALL
)
4731 /* The result of apply_change_group can be ignored; see canon_reg. */
4732 canon_reg (x
, insn
);
4733 apply_change_group ();
4737 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4738 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4739 is handled specially for this case, and if it isn't set, then there will
4740 be no equivalence for the destination. */
4741 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4742 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4743 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4744 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4746 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4747 XEXP (tem
, 0) = src_eqv
;
4750 /* Canonicalize sources and addresses of destinations.
4751 We do this in a separate pass to avoid problems when a MATCH_DUP is
4752 present in the insn pattern. In that case, we want to ensure that
4753 we don't break the duplicate nature of the pattern. So we will replace
4754 both operands at the same time. Otherwise, we would fail to find an
4755 equivalent substitution in the loop calling validate_change below.
4757 We used to suppress canonicalization of DEST if it appears in SRC,
4758 but we don't do this any more. */
4760 for (i
= 0; i
< n_sets
; i
++)
4762 rtx dest
= SET_DEST (sets
[i
].rtl
);
4763 rtx src
= SET_SRC (sets
[i
].rtl
);
4764 rtx
new = canon_reg (src
, insn
);
4767 sets
[i
].orig_src
= src
;
4768 if ((REG_P (new) && REG_P (src
)
4769 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4770 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4771 || (insn_code
= recog_memoized (insn
)) < 0
4772 || insn_data
[insn_code
].n_dups
> 0)
4773 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4775 SET_SRC (sets
[i
].rtl
) = new;
4777 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
4779 validate_change (insn
, &XEXP (dest
, 1),
4780 canon_reg (XEXP (dest
, 1), insn
), 1);
4781 validate_change (insn
, &XEXP (dest
, 2),
4782 canon_reg (XEXP (dest
, 2), insn
), 1);
4785 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
4786 || GET_CODE (dest
) == ZERO_EXTRACT
4787 || GET_CODE (dest
) == SIGN_EXTRACT
)
4788 dest
= XEXP (dest
, 0);
4791 canon_reg (dest
, insn
);
4794 /* Now that we have done all the replacements, we can apply the change
4795 group and see if they all work. Note that this will cause some
4796 canonicalizations that would have worked individually not to be applied
4797 because some other canonicalization didn't work, but this should not
4800 The result of apply_change_group can be ignored; see canon_reg. */
4802 apply_change_group ();
4804 /* Set sets[i].src_elt to the class each source belongs to.
4805 Detect assignments from or to volatile things
4806 and set set[i] to zero so they will be ignored
4807 in the rest of this function.
4809 Nothing in this loop changes the hash table or the register chains. */
4811 for (i
= 0; i
< n_sets
; i
++)
4815 struct table_elt
*elt
= 0, *p
;
4816 enum machine_mode mode
;
4819 rtx src_related
= 0;
4820 struct table_elt
*src_const_elt
= 0;
4821 int src_cost
= MAX_COST
;
4822 int src_eqv_cost
= MAX_COST
;
4823 int src_folded_cost
= MAX_COST
;
4824 int src_related_cost
= MAX_COST
;
4825 int src_elt_cost
= MAX_COST
;
4826 int src_regcost
= MAX_COST
;
4827 int src_eqv_regcost
= MAX_COST
;
4828 int src_folded_regcost
= MAX_COST
;
4829 int src_related_regcost
= MAX_COST
;
4830 int src_elt_regcost
= MAX_COST
;
4831 /* Set nonzero if we need to call force_const_mem on with the
4832 contents of src_folded before using it. */
4833 int src_folded_force_flag
= 0;
4835 dest
= SET_DEST (sets
[i
].rtl
);
4836 src
= SET_SRC (sets
[i
].rtl
);
4838 /* If SRC is a constant that has no machine mode,
4839 hash it with the destination's machine mode.
4840 This way we can keep different modes separate. */
4842 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4843 sets
[i
].mode
= mode
;
4847 enum machine_mode eqvmode
= mode
;
4848 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4849 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4851 hash_arg_in_memory
= 0;
4852 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4854 /* Find the equivalence class for the equivalent expression. */
4857 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4859 src_eqv_volatile
= do_not_record
;
4860 src_eqv_in_memory
= hash_arg_in_memory
;
4863 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4864 value of the INNER register, not the destination. So it is not
4865 a valid substitution for the source. But save it for later. */
4866 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4869 src_eqv_here
= src_eqv
;
4871 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4872 simplified result, which may not necessarily be valid. */
4873 src_folded
= fold_rtx (src
, insn
);
4876 /* ??? This caused bad code to be generated for the m68k port with -O2.
4877 Suppose src is (CONST_INT -1), and that after truncation src_folded
4878 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4879 At the end we will add src and src_const to the same equivalence
4880 class. We now have 3 and -1 on the same equivalence class. This
4881 causes later instructions to be mis-optimized. */
4882 /* If storing a constant in a bitfield, pre-truncate the constant
4883 so we will be able to record it later. */
4884 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
4885 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
4887 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4889 if (GET_CODE (src
) == CONST_INT
4890 && GET_CODE (width
) == CONST_INT
4891 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4892 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4894 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4895 << INTVAL (width
)) - 1));
4899 /* Compute SRC's hash code, and also notice if it
4900 should not be recorded at all. In that case,
4901 prevent any further processing of this assignment. */
4903 hash_arg_in_memory
= 0;
4906 sets
[i
].src_hash
= HASH (src
, mode
);
4907 sets
[i
].src_volatile
= do_not_record
;
4908 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4910 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4911 a pseudo, do not record SRC. Using SRC as a replacement for
4912 anything else will be incorrect in that situation. Note that
4913 this usually occurs only for stack slots, in which case all the
4914 RTL would be referring to SRC, so we don't lose any optimization
4915 opportunities by not having SRC in the hash table. */
4918 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4920 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4921 sets
[i
].src_volatile
= 1;
4924 /* It is no longer clear why we used to do this, but it doesn't
4925 appear to still be needed. So let's try without it since this
4926 code hurts cse'ing widened ops. */
4927 /* If source is a paradoxical subreg (such as QI treated as an SI),
4928 treat it as volatile. It may do the work of an SI in one context
4929 where the extra bits are not being used, but cannot replace an SI
4931 if (GET_CODE (src
) == SUBREG
4932 && (GET_MODE_SIZE (GET_MODE (src
))
4933 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
4934 sets
[i
].src_volatile
= 1;
4937 /* Locate all possible equivalent forms for SRC. Try to replace
4938 SRC in the insn with each cheaper equivalent.
4940 We have the following types of equivalents: SRC itself, a folded
4941 version, a value given in a REG_EQUAL note, or a value related
4944 Each of these equivalents may be part of an additional class
4945 of equivalents (if more than one is in the table, they must be in
4946 the same class; we check for this).
4948 If the source is volatile, we don't do any table lookups.
4950 We note any constant equivalent for possible later use in a
4953 if (!sets
[i
].src_volatile
)
4954 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4956 sets
[i
].src_elt
= elt
;
4958 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4960 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4962 /* The REG_EQUAL is indicating that two formerly distinct
4963 classes are now equivalent. So merge them. */
4964 merge_equiv_classes (elt
, src_eqv_elt
);
4965 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4966 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4972 else if (src_eqv_elt
)
4975 /* Try to find a constant somewhere and record it in `src_const'.
4976 Record its table element, if any, in `src_const_elt'. Look in
4977 any known equivalences first. (If the constant is not in the
4978 table, also set `sets[i].src_const_hash'). */
4980 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4984 src_const_elt
= elt
;
4989 && (CONSTANT_P (src_folded
)
4990 /* Consider (minus (label_ref L1) (label_ref L2)) as
4991 "constant" here so we will record it. This allows us
4992 to fold switch statements when an ADDR_DIFF_VEC is used. */
4993 || (GET_CODE (src_folded
) == MINUS
4994 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4995 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4996 src_const
= src_folded
, src_const_elt
= elt
;
4997 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4998 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5000 /* If we don't know if the constant is in the table, get its
5001 hash code and look it up. */
5002 if (src_const
&& src_const_elt
== 0)
5004 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5005 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5008 sets
[i
].src_const
= src_const
;
5009 sets
[i
].src_const_elt
= src_const_elt
;
5011 /* If the constant and our source are both in the table, mark them as
5012 equivalent. Otherwise, if a constant is in the table but the source
5013 isn't, set ELT to it. */
5014 if (src_const_elt
&& elt
5015 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5016 merge_equiv_classes (elt
, src_const_elt
);
5017 else if (src_const_elt
&& elt
== 0)
5018 elt
= src_const_elt
;
5020 /* See if there is a register linearly related to a constant
5021 equivalent of SRC. */
5023 && (GET_CODE (src_const
) == CONST
5024 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5026 src_related
= use_related_value (src_const
, src_const_elt
);
5029 struct table_elt
*src_related_elt
5030 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5031 if (src_related_elt
&& elt
)
5033 if (elt
->first_same_value
5034 != src_related_elt
->first_same_value
)
5035 /* This can occur when we previously saw a CONST
5036 involving a SYMBOL_REF and then see the SYMBOL_REF
5037 twice. Merge the involved classes. */
5038 merge_equiv_classes (elt
, src_related_elt
);
5041 src_related_elt
= 0;
5043 else if (src_related_elt
&& elt
== 0)
5044 elt
= src_related_elt
;
5048 /* See if we have a CONST_INT that is already in a register in a
5051 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5052 && GET_MODE_CLASS (mode
) == MODE_INT
5053 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5055 enum machine_mode wider_mode
;
5057 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5058 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5059 && src_related
== 0;
5060 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5062 struct table_elt
*const_elt
5063 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5068 for (const_elt
= const_elt
->first_same_value
;
5069 const_elt
; const_elt
= const_elt
->next_same_value
)
5070 if (REG_P (const_elt
->exp
))
5072 src_related
= gen_lowpart (mode
,
5079 /* Another possibility is that we have an AND with a constant in
5080 a mode narrower than a word. If so, it might have been generated
5081 as part of an "if" which would narrow the AND. If we already
5082 have done the AND in a wider mode, we can use a SUBREG of that
5085 if (flag_expensive_optimizations
&& ! src_related
5086 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5087 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5089 enum machine_mode tmode
;
5090 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5092 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5093 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5094 tmode
= GET_MODE_WIDER_MODE (tmode
))
5096 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5097 struct table_elt
*larger_elt
;
5101 PUT_MODE (new_and
, tmode
);
5102 XEXP (new_and
, 0) = inner
;
5103 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5104 if (larger_elt
== 0)
5107 for (larger_elt
= larger_elt
->first_same_value
;
5108 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5109 if (REG_P (larger_elt
->exp
))
5112 = gen_lowpart (mode
, larger_elt
->exp
);
5122 #ifdef LOAD_EXTEND_OP
5123 /* See if a MEM has already been loaded with a widening operation;
5124 if it has, we can use a subreg of that. Many CISC machines
5125 also have such operations, but this is only likely to be
5126 beneficial on these machines. */
5128 if (flag_expensive_optimizations
&& src_related
== 0
5129 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5130 && GET_MODE_CLASS (mode
) == MODE_INT
5131 && MEM_P (src
) && ! do_not_record
5132 && LOAD_EXTEND_OP (mode
) != NIL
)
5134 enum machine_mode tmode
;
5136 /* Set what we are trying to extend and the operation it might
5137 have been extended with. */
5138 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5139 XEXP (memory_extend_rtx
, 0) = src
;
5141 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5142 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5143 tmode
= GET_MODE_WIDER_MODE (tmode
))
5145 struct table_elt
*larger_elt
;
5147 PUT_MODE (memory_extend_rtx
, tmode
);
5148 larger_elt
= lookup (memory_extend_rtx
,
5149 HASH (memory_extend_rtx
, tmode
), tmode
);
5150 if (larger_elt
== 0)
5153 for (larger_elt
= larger_elt
->first_same_value
;
5154 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5155 if (REG_P (larger_elt
->exp
))
5157 src_related
= gen_lowpart (mode
,
5166 #endif /* LOAD_EXTEND_OP */
5168 if (src
== src_folded
)
5171 /* At this point, ELT, if nonzero, points to a class of expressions
5172 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5173 and SRC_RELATED, if nonzero, each contain additional equivalent
5174 expressions. Prune these latter expressions by deleting expressions
5175 already in the equivalence class.
5177 Check for an equivalent identical to the destination. If found,
5178 this is the preferred equivalent since it will likely lead to
5179 elimination of the insn. Indicate this by placing it in
5183 elt
= elt
->first_same_value
;
5184 for (p
= elt
; p
; p
= p
->next_same_value
)
5186 enum rtx_code code
= GET_CODE (p
->exp
);
5188 /* If the expression is not valid, ignore it. Then we do not
5189 have to check for validity below. In most cases, we can use
5190 `rtx_equal_p', since canonicalization has already been done. */
5191 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
5194 /* Also skip paradoxical subregs, unless that's what we're
5197 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5198 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5200 && GET_CODE (src
) == SUBREG
5201 && GET_MODE (src
) == GET_MODE (p
->exp
)
5202 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5203 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5206 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5208 else if (src_folded
&& GET_CODE (src_folded
) == code
5209 && rtx_equal_p (src_folded
, p
->exp
))
5211 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5212 && rtx_equal_p (src_eqv_here
, p
->exp
))
5214 else if (src_related
&& GET_CODE (src_related
) == code
5215 && rtx_equal_p (src_related
, p
->exp
))
5218 /* This is the same as the destination of the insns, we want
5219 to prefer it. Copy it to src_related. The code below will
5220 then give it a negative cost. */
5221 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5225 /* Find the cheapest valid equivalent, trying all the available
5226 possibilities. Prefer items not in the hash table to ones
5227 that are when they are equal cost. Note that we can never
5228 worsen an insn as the current contents will also succeed.
5229 If we find an equivalent identical to the destination, use it as best,
5230 since this insn will probably be eliminated in that case. */
5233 if (rtx_equal_p (src
, dest
))
5234 src_cost
= src_regcost
= -1;
5237 src_cost
= COST (src
);
5238 src_regcost
= approx_reg_cost (src
);
5244 if (rtx_equal_p (src_eqv_here
, dest
))
5245 src_eqv_cost
= src_eqv_regcost
= -1;
5248 src_eqv_cost
= COST (src_eqv_here
);
5249 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5255 if (rtx_equal_p (src_folded
, dest
))
5256 src_folded_cost
= src_folded_regcost
= -1;
5259 src_folded_cost
= COST (src_folded
);
5260 src_folded_regcost
= approx_reg_cost (src_folded
);
5266 if (rtx_equal_p (src_related
, dest
))
5267 src_related_cost
= src_related_regcost
= -1;
5270 src_related_cost
= COST (src_related
);
5271 src_related_regcost
= approx_reg_cost (src_related
);
5275 /* If this was an indirect jump insn, a known label will really be
5276 cheaper even though it looks more expensive. */
5277 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5278 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5280 /* Terminate loop when replacement made. This must terminate since
5281 the current contents will be tested and will always be valid. */
5286 /* Skip invalid entries. */
5287 while (elt
&& !REG_P (elt
->exp
)
5288 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5289 elt
= elt
->next_same_value
;
5291 /* A paradoxical subreg would be bad here: it'll be the right
5292 size, but later may be adjusted so that the upper bits aren't
5293 what we want. So reject it. */
5295 && GET_CODE (elt
->exp
) == SUBREG
5296 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5297 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5298 /* It is okay, though, if the rtx we're trying to match
5299 will ignore any of the bits we can't predict. */
5301 && GET_CODE (src
) == SUBREG
5302 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5303 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5304 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5306 elt
= elt
->next_same_value
;
5312 src_elt_cost
= elt
->cost
;
5313 src_elt_regcost
= elt
->regcost
;
5316 /* Find cheapest and skip it for the next time. For items
5317 of equal cost, use this order:
5318 src_folded, src, src_eqv, src_related and hash table entry. */
5320 && preferable (src_folded_cost
, src_folded_regcost
,
5321 src_cost
, src_regcost
) <= 0
5322 && preferable (src_folded_cost
, src_folded_regcost
,
5323 src_eqv_cost
, src_eqv_regcost
) <= 0
5324 && preferable (src_folded_cost
, src_folded_regcost
,
5325 src_related_cost
, src_related_regcost
) <= 0
5326 && preferable (src_folded_cost
, src_folded_regcost
,
5327 src_elt_cost
, src_elt_regcost
) <= 0)
5329 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5330 if (src_folded_force_flag
)
5332 rtx forced
= force_const_mem (mode
, trial
);
5338 && preferable (src_cost
, src_regcost
,
5339 src_eqv_cost
, src_eqv_regcost
) <= 0
5340 && preferable (src_cost
, src_regcost
,
5341 src_related_cost
, src_related_regcost
) <= 0
5342 && preferable (src_cost
, src_regcost
,
5343 src_elt_cost
, src_elt_regcost
) <= 0)
5344 trial
= src
, src_cost
= MAX_COST
;
5345 else if (src_eqv_here
5346 && preferable (src_eqv_cost
, src_eqv_regcost
,
5347 src_related_cost
, src_related_regcost
) <= 0
5348 && preferable (src_eqv_cost
, src_eqv_regcost
,
5349 src_elt_cost
, src_elt_regcost
) <= 0)
5350 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5351 else if (src_related
5352 && preferable (src_related_cost
, src_related_regcost
,
5353 src_elt_cost
, src_elt_regcost
) <= 0)
5354 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5357 trial
= copy_rtx (elt
->exp
);
5358 elt
= elt
->next_same_value
;
5359 src_elt_cost
= MAX_COST
;
5362 /* We don't normally have an insn matching (set (pc) (pc)), so
5363 check for this separately here. We will delete such an
5366 For other cases such as a table jump or conditional jump
5367 where we know the ultimate target, go ahead and replace the
5368 operand. While that may not make a valid insn, we will
5369 reemit the jump below (and also insert any necessary
5371 if (n_sets
== 1 && dest
== pc_rtx
5373 || (GET_CODE (trial
) == LABEL_REF
5374 && ! condjump_p (insn
))))
5376 SET_SRC (sets
[i
].rtl
) = trial
;
5377 cse_jumps_altered
= 1;
5381 /* Look for a substitution that makes a valid insn. */
5382 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5384 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5386 /* If we just made a substitution inside a libcall, then we
5387 need to make the same substitution in any notes attached
5388 to the RETVAL insn. */
5390 && (REG_P (sets
[i
].orig_src
)
5391 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5392 || MEM_P (sets
[i
].orig_src
)))
5394 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5396 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5401 /* The result of apply_change_group can be ignored; see
5404 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5405 apply_change_group ();
5409 /* If we previously found constant pool entries for
5410 constants and this is a constant, try making a
5411 pool entry. Put it in src_folded unless we already have done
5412 this since that is where it likely came from. */
5414 else if (constant_pool_entries_cost
5415 && CONSTANT_P (trial
)
5416 /* Reject cases that will abort in decode_rtx_const.
5417 On the alpha when simplifying a switch, we get
5418 (const (truncate (minus (label_ref) (label_ref)))). */
5419 && ! (GET_CODE (trial
) == CONST
5420 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5421 /* Likewise on IA-64, except without the truncate. */
5422 && ! (GET_CODE (trial
) == CONST
5423 && GET_CODE (XEXP (trial
, 0)) == MINUS
5424 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5425 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5427 || (!MEM_P (src_folded
)
5428 && ! src_folded_force_flag
))
5429 && GET_MODE_CLASS (mode
) != MODE_CC
5430 && mode
!= VOIDmode
)
5432 src_folded_force_flag
= 1;
5434 src_folded_cost
= constant_pool_entries_cost
;
5435 src_folded_regcost
= constant_pool_entries_regcost
;
5439 src
= SET_SRC (sets
[i
].rtl
);
5441 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5442 However, there is an important exception: If both are registers
5443 that are not the head of their equivalence class, replace SET_SRC
5444 with the head of the class. If we do not do this, we will have
5445 both registers live over a portion of the basic block. This way,
5446 their lifetimes will likely abut instead of overlapping. */
5448 && REGNO_QTY_VALID_P (REGNO (dest
)))
5450 int dest_q
= REG_QTY (REGNO (dest
));
5451 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5453 if (dest_ent
->mode
== GET_MODE (dest
)
5454 && dest_ent
->first_reg
!= REGNO (dest
)
5455 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5456 /* Don't do this if the original insn had a hard reg as
5457 SET_SRC or SET_DEST. */
5458 && (!REG_P (sets
[i
].src
)
5459 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5460 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5461 /* We can't call canon_reg here because it won't do anything if
5462 SRC is a hard register. */
5464 int src_q
= REG_QTY (REGNO (src
));
5465 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5466 int first
= src_ent
->first_reg
;
5468 = (first
>= FIRST_PSEUDO_REGISTER
5469 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5471 /* We must use validate-change even for this, because this
5472 might be a special no-op instruction, suitable only to
5474 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5477 /* If we had a constant that is cheaper than what we are now
5478 setting SRC to, use that constant. We ignored it when we
5479 thought we could make this into a no-op. */
5480 if (src_const
&& COST (src_const
) < COST (src
)
5481 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5488 /* If we made a change, recompute SRC values. */
5489 if (src
!= sets
[i
].src
)
5493 hash_arg_in_memory
= 0;
5495 sets
[i
].src_hash
= HASH (src
, mode
);
5496 sets
[i
].src_volatile
= do_not_record
;
5497 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5498 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5501 /* If this is a single SET, we are setting a register, and we have an
5502 equivalent constant, we want to add a REG_NOTE. We don't want
5503 to write a REG_EQUAL note for a constant pseudo since verifying that
5504 that pseudo hasn't been eliminated is a pain. Such a note also
5505 won't help anything.
5507 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5508 which can be created for a reference to a compile time computable
5509 entry in a jump table. */
5511 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5512 && !REG_P (src_const
)
5513 && ! (GET_CODE (src_const
) == CONST
5514 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5515 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5516 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5518 /* We only want a REG_EQUAL note if src_const != src. */
5519 if (! rtx_equal_p (src
, src_const
))
5521 /* Make sure that the rtx is not shared. */
5522 src_const
= copy_rtx (src_const
);
5524 /* Record the actual constant value in a REG_EQUAL note,
5525 making a new one if one does not already exist. */
5526 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5530 /* Now deal with the destination. */
5533 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5534 to the MEM or REG within it. */
5535 while (GET_CODE (dest
) == SIGN_EXTRACT
5536 || GET_CODE (dest
) == ZERO_EXTRACT
5537 || GET_CODE (dest
) == SUBREG
5538 || GET_CODE (dest
) == STRICT_LOW_PART
)
5539 dest
= XEXP (dest
, 0);
5541 sets
[i
].inner_dest
= dest
;
5545 #ifdef PUSH_ROUNDING
5546 /* Stack pushes invalidate the stack pointer. */
5547 rtx addr
= XEXP (dest
, 0);
5548 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5549 && XEXP (addr
, 0) == stack_pointer_rtx
)
5550 invalidate (stack_pointer_rtx
, Pmode
);
5552 dest
= fold_rtx (dest
, insn
);
5555 /* Compute the hash code of the destination now,
5556 before the effects of this instruction are recorded,
5557 since the register values used in the address computation
5558 are those before this instruction. */
5559 sets
[i
].dest_hash
= HASH (dest
, mode
);
5561 /* Don't enter a bit-field in the hash table
5562 because the value in it after the store
5563 may not equal what was stored, due to truncation. */
5565 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5566 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5568 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5570 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5571 && GET_CODE (width
) == CONST_INT
5572 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5573 && ! (INTVAL (src_const
)
5574 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5575 /* Exception: if the value is constant,
5576 and it won't be truncated, record it. */
5580 /* This is chosen so that the destination will be invalidated
5581 but no new value will be recorded.
5582 We must invalidate because sometimes constant
5583 values can be recorded for bitfields. */
5584 sets
[i
].src_elt
= 0;
5585 sets
[i
].src_volatile
= 1;
5591 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5593 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5595 /* One less use of the label this insn used to jump to. */
5597 cse_jumps_altered
= 1;
5598 /* No more processing for this set. */
5602 /* If this SET is now setting PC to a label, we know it used to
5603 be a conditional or computed branch. */
5604 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
5606 /* Now emit a BARRIER after the unconditional jump. */
5607 if (NEXT_INSN (insn
) == 0
5608 || !BARRIER_P (NEXT_INSN (insn
)))
5609 emit_barrier_after (insn
);
5611 /* We reemit the jump in as many cases as possible just in
5612 case the form of an unconditional jump is significantly
5613 different than a computed jump or conditional jump.
5615 If this insn has multiple sets, then reemitting the
5616 jump is nontrivial. So instead we just force rerecognition
5617 and hope for the best. */
5622 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5623 JUMP_LABEL (new) = XEXP (src
, 0);
5624 LABEL_NUSES (XEXP (src
, 0))++;
5626 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5627 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5630 XEXP (note
, 1) = NULL_RTX
;
5631 REG_NOTES (new) = note
;
5637 /* Now emit a BARRIER after the unconditional jump. */
5638 if (NEXT_INSN (insn
) == 0
5639 || !BARRIER_P (NEXT_INSN (insn
)))
5640 emit_barrier_after (insn
);
5643 INSN_CODE (insn
) = -1;
5645 /* Do not bother deleting any unreachable code,
5646 let jump/flow do that. */
5648 cse_jumps_altered
= 1;
5652 /* If destination is volatile, invalidate it and then do no further
5653 processing for this assignment. */
5655 else if (do_not_record
)
5657 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5658 invalidate (dest
, VOIDmode
);
5659 else if (MEM_P (dest
))
5661 /* Outgoing arguments for a libcall don't
5662 affect any recorded expressions. */
5663 if (! libcall_insn
|| insn
== libcall_insn
)
5664 invalidate (dest
, VOIDmode
);
5666 else if (GET_CODE (dest
) == STRICT_LOW_PART
5667 || GET_CODE (dest
) == ZERO_EXTRACT
)
5668 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5672 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5673 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5676 /* If setting CC0, record what it was set to, or a constant, if it
5677 is equivalent to a constant. If it is being set to a floating-point
5678 value, make a COMPARE with the appropriate constant of 0. If we
5679 don't do this, later code can interpret this as a test against
5680 const0_rtx, which can cause problems if we try to put it into an
5681 insn as a floating-point operand. */
5682 if (dest
== cc0_rtx
)
5684 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5685 this_insn_cc0_mode
= mode
;
5686 if (FLOAT_MODE_P (mode
))
5687 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5693 /* Now enter all non-volatile source expressions in the hash table
5694 if they are not already present.
5695 Record their equivalence classes in src_elt.
5696 This way we can insert the corresponding destinations into
5697 the same classes even if the actual sources are no longer in them
5698 (having been invalidated). */
5700 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5701 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5703 struct table_elt
*elt
;
5704 struct table_elt
*classp
= sets
[0].src_elt
;
5705 rtx dest
= SET_DEST (sets
[0].rtl
);
5706 enum machine_mode eqvmode
= GET_MODE (dest
);
5708 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5710 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5713 if (insert_regs (src_eqv
, classp
, 0))
5715 rehash_using_reg (src_eqv
);
5716 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5718 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5719 elt
->in_memory
= src_eqv_in_memory
;
5722 /* Check to see if src_eqv_elt is the same as a set source which
5723 does not yet have an elt, and if so set the elt of the set source
5725 for (i
= 0; i
< n_sets
; i
++)
5726 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5727 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5728 sets
[i
].src_elt
= src_eqv_elt
;
5731 for (i
= 0; i
< n_sets
; i
++)
5732 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5733 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5735 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5737 /* REG_EQUAL in setting a STRICT_LOW_PART
5738 gives an equivalent for the entire destination register,
5739 not just for the subreg being stored in now.
5740 This is a more interesting equivalence, so we arrange later
5741 to treat the entire reg as the destination. */
5742 sets
[i
].src_elt
= src_eqv_elt
;
5743 sets
[i
].src_hash
= src_eqv_hash
;
5747 /* Insert source and constant equivalent into hash table, if not
5749 struct table_elt
*classp
= src_eqv_elt
;
5750 rtx src
= sets
[i
].src
;
5751 rtx dest
= SET_DEST (sets
[i
].rtl
);
5752 enum machine_mode mode
5753 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5755 /* It's possible that we have a source value known to be
5756 constant but don't have a REG_EQUAL note on the insn.
5757 Lack of a note will mean src_eqv_elt will be NULL. This
5758 can happen where we've generated a SUBREG to access a
5759 CONST_INT that is already in a register in a wider mode.
5760 Ensure that the source expression is put in the proper
5763 classp
= sets
[i
].src_const_elt
;
5765 if (sets
[i
].src_elt
== 0)
5767 /* Don't put a hard register source into the table if this is
5768 the last insn of a libcall. In this case, we only need
5769 to put src_eqv_elt in src_elt. */
5770 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5772 struct table_elt
*elt
;
5774 /* Note that these insert_regs calls cannot remove
5775 any of the src_elt's, because they would have failed to
5776 match if not still valid. */
5777 if (insert_regs (src
, classp
, 0))
5779 rehash_using_reg (src
);
5780 sets
[i
].src_hash
= HASH (src
, mode
);
5782 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5783 elt
->in_memory
= sets
[i
].src_in_memory
;
5784 sets
[i
].src_elt
= classp
= elt
;
5787 sets
[i
].src_elt
= classp
;
5789 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5790 && src
!= sets
[i
].src_const
5791 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5792 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5793 sets
[i
].src_const_hash
, mode
);
5796 else if (sets
[i
].src_elt
== 0)
5797 /* If we did not insert the source into the hash table (e.g., it was
5798 volatile), note the equivalence class for the REG_EQUAL value, if any,
5799 so that the destination goes into that class. */
5800 sets
[i
].src_elt
= src_eqv_elt
;
5802 invalidate_from_clobbers (x
);
5804 /* Some registers are invalidated by subroutine calls. Memory is
5805 invalidated by non-constant calls. */
5809 if (! CONST_OR_PURE_CALL_P (insn
))
5810 invalidate_memory ();
5811 invalidate_for_call ();
5814 /* Now invalidate everything set by this instruction.
5815 If a SUBREG or other funny destination is being set,
5816 sets[i].rtl is still nonzero, so here we invalidate the reg
5817 a part of which is being set. */
5819 for (i
= 0; i
< n_sets
; i
++)
5822 /* We can't use the inner dest, because the mode associated with
5823 a ZERO_EXTRACT is significant. */
5824 rtx dest
= SET_DEST (sets
[i
].rtl
);
5826 /* Needed for registers to remove the register from its
5827 previous quantity's chain.
5828 Needed for memory if this is a nonvarying address, unless
5829 we have just done an invalidate_memory that covers even those. */
5830 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5831 invalidate (dest
, VOIDmode
);
5832 else if (MEM_P (dest
))
5834 /* Outgoing arguments for a libcall don't
5835 affect any recorded expressions. */
5836 if (! libcall_insn
|| insn
== libcall_insn
)
5837 invalidate (dest
, VOIDmode
);
5839 else if (GET_CODE (dest
) == STRICT_LOW_PART
5840 || GET_CODE (dest
) == ZERO_EXTRACT
)
5841 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5844 /* A volatile ASM invalidates everything. */
5845 if (NONJUMP_INSN_P (insn
)
5846 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5847 && MEM_VOLATILE_P (PATTERN (insn
)))
5848 flush_hash_table ();
5850 /* Make sure registers mentioned in destinations
5851 are safe for use in an expression to be inserted.
5852 This removes from the hash table
5853 any invalid entry that refers to one of these registers.
5855 We don't care about the return value from mention_regs because
5856 we are going to hash the SET_DEST values unconditionally. */
5858 for (i
= 0; i
< n_sets
; i
++)
5862 rtx x
= SET_DEST (sets
[i
].rtl
);
5868 /* We used to rely on all references to a register becoming
5869 inaccessible when a register changes to a new quantity,
5870 since that changes the hash code. However, that is not
5871 safe, since after HASH_SIZE new quantities we get a
5872 hash 'collision' of a register with its own invalid
5873 entries. And since SUBREGs have been changed not to
5874 change their hash code with the hash code of the register,
5875 it wouldn't work any longer at all. So we have to check
5876 for any invalid references lying around now.
5877 This code is similar to the REG case in mention_regs,
5878 but it knows that reg_tick has been incremented, and
5879 it leaves reg_in_table as -1 . */
5880 unsigned int regno
= REGNO (x
);
5881 unsigned int endregno
5882 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
5883 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
5886 for (i
= regno
; i
< endregno
; i
++)
5888 if (REG_IN_TABLE (i
) >= 0)
5890 remove_invalid_refs (i
);
5891 REG_IN_TABLE (i
) = -1;
5898 /* We may have just removed some of the src_elt's from the hash table.
5899 So replace each one with the current head of the same class. */
5901 for (i
= 0; i
< n_sets
; i
++)
5904 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5905 /* If elt was removed, find current head of same class,
5906 or 0 if nothing remains of that class. */
5908 struct table_elt
*elt
= sets
[i
].src_elt
;
5910 while (elt
&& elt
->prev_same_value
)
5911 elt
= elt
->prev_same_value
;
5913 while (elt
&& elt
->first_same_value
== 0)
5914 elt
= elt
->next_same_value
;
5915 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5919 /* Now insert the destinations into their equivalence classes. */
5921 for (i
= 0; i
< n_sets
; i
++)
5924 rtx dest
= SET_DEST (sets
[i
].rtl
);
5925 struct table_elt
*elt
;
5927 /* Don't record value if we are not supposed to risk allocating
5928 floating-point values in registers that might be wider than
5930 if ((flag_float_store
5932 && FLOAT_MODE_P (GET_MODE (dest
)))
5933 /* Don't record BLKmode values, because we don't know the
5934 size of it, and can't be sure that other BLKmode values
5935 have the same or smaller size. */
5936 || GET_MODE (dest
) == BLKmode
5937 /* Don't record values of destinations set inside a libcall block
5938 since we might delete the libcall. Things should have been set
5939 up so we won't want to reuse such a value, but we play it safe
5942 /* If we didn't put a REG_EQUAL value or a source into the hash
5943 table, there is no point is recording DEST. */
5944 || sets
[i
].src_elt
== 0
5945 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5946 or SIGN_EXTEND, don't record DEST since it can cause
5947 some tracking to be wrong.
5949 ??? Think about this more later. */
5950 || (GET_CODE (dest
) == SUBREG
5951 && (GET_MODE_SIZE (GET_MODE (dest
))
5952 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5953 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5954 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5957 /* STRICT_LOW_PART isn't part of the value BEING set,
5958 and neither is the SUBREG inside it.
5959 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5960 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5961 dest
= SUBREG_REG (XEXP (dest
, 0));
5963 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5964 /* Registers must also be inserted into chains for quantities. */
5965 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5967 /* If `insert_regs' changes something, the hash code must be
5969 rehash_using_reg (dest
);
5970 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5973 elt
= insert (dest
, sets
[i
].src_elt
,
5974 sets
[i
].dest_hash
, GET_MODE (dest
));
5976 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5977 && (! RTX_UNCHANGING_P (sets
[i
].inner_dest
)
5978 || fixed_base_plus_p (XEXP (sets
[i
].inner_dest
,
5981 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5982 narrower than M2, and both M1 and M2 are the same number of words,
5983 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5984 make that equivalence as well.
5986 However, BAR may have equivalences for which gen_lowpart
5987 will produce a simpler value than gen_lowpart applied to
5988 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5989 BAR's equivalences. If we don't get a simplified form, make
5990 the SUBREG. It will not be used in an equivalence, but will
5991 cause two similar assignments to be detected.
5993 Note the loop below will find SUBREG_REG (DEST) since we have
5994 already entered SRC and DEST of the SET in the table. */
5996 if (GET_CODE (dest
) == SUBREG
5997 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5999 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6000 && (GET_MODE_SIZE (GET_MODE (dest
))
6001 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6002 && sets
[i
].src_elt
!= 0)
6004 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6005 struct table_elt
*elt
, *classp
= 0;
6007 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6008 elt
= elt
->next_same_value
)
6012 struct table_elt
*src_elt
;
6015 /* Ignore invalid entries. */
6016 if (!REG_P (elt
->exp
)
6017 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6020 /* We may have already been playing subreg games. If the
6021 mode is already correct for the destination, use it. */
6022 if (GET_MODE (elt
->exp
) == new_mode
)
6026 /* Calculate big endian correction for the SUBREG_BYTE.
6027 We have already checked that M1 (GET_MODE (dest))
6028 is not narrower than M2 (new_mode). */
6029 if (BYTES_BIG_ENDIAN
)
6030 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6031 - GET_MODE_SIZE (new_mode
));
6033 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6034 GET_MODE (dest
), byte
);
6037 /* The call to simplify_gen_subreg fails if the value
6038 is VOIDmode, yet we can't do any simplification, e.g.
6039 for EXPR_LISTs denoting function call results.
6040 It is invalid to construct a SUBREG with a VOIDmode
6041 SUBREG_REG, hence a zero new_src means we can't do
6042 this substitution. */
6046 src_hash
= HASH (new_src
, new_mode
);
6047 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6049 /* Put the new source in the hash table is if isn't
6053 if (insert_regs (new_src
, classp
, 0))
6055 rehash_using_reg (new_src
);
6056 src_hash
= HASH (new_src
, new_mode
);
6058 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6059 src_elt
->in_memory
= elt
->in_memory
;
6061 else if (classp
&& classp
!= src_elt
->first_same_value
)
6062 /* Show that two things that we've seen before are
6063 actually the same. */
6064 merge_equiv_classes (src_elt
, classp
);
6066 classp
= src_elt
->first_same_value
;
6067 /* Ignore invalid entries. */
6069 && !REG_P (classp
->exp
)
6070 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, 0))
6071 classp
= classp
->next_same_value
;
6076 /* Special handling for (set REG0 REG1) where REG0 is the
6077 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6078 be used in the sequel, so (if easily done) change this insn to
6079 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6080 that computed their value. Then REG1 will become a dead store
6081 and won't cloud the situation for later optimizations.
6083 Do not make this change if REG1 is a hard register, because it will
6084 then be used in the sequel and we may be changing a two-operand insn
6085 into a three-operand insn.
6087 Also do not do this if we are operating on a copy of INSN.
6089 Also don't do this if INSN ends a libcall; this would cause an unrelated
6090 register to be set in the middle of a libcall, and we then get bad code
6091 if the libcall is deleted. */
6093 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6094 && NEXT_INSN (PREV_INSN (insn
)) == insn
6095 && REG_P (SET_SRC (sets
[0].rtl
))
6096 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6097 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6099 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6100 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6102 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6103 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6106 /* Scan for the previous nonnote insn, but stop at a basic
6110 prev
= PREV_INSN (prev
);
6112 while (prev
&& NOTE_P (prev
)
6113 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6115 /* Do not swap the registers around if the previous instruction
6116 attaches a REG_EQUIV note to REG1.
6118 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6119 from the pseudo that originally shadowed an incoming argument
6120 to another register. Some uses of REG_EQUIV might rely on it
6121 being attached to REG1 rather than REG2.
6123 This section previously turned the REG_EQUIV into a REG_EQUAL
6124 note. We cannot do that because REG_EQUIV may provide an
6125 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6127 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6128 && GET_CODE (PATTERN (prev
)) == SET
6129 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6130 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6132 rtx dest
= SET_DEST (sets
[0].rtl
);
6133 rtx src
= SET_SRC (sets
[0].rtl
);
6136 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6137 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6138 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6139 apply_change_group ();
6141 /* If INSN has a REG_EQUAL note, and this note mentions
6142 REG0, then we must delete it, because the value in
6143 REG0 has changed. If the note's value is REG1, we must
6144 also delete it because that is now this insn's dest. */
6145 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6147 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6148 || rtx_equal_p (src
, XEXP (note
, 0))))
6149 remove_note (insn
, note
);
6154 /* If this is a conditional jump insn, record any known equivalences due to
6155 the condition being tested. */
6157 last_jump_equiv_class
= 0;
6159 && n_sets
== 1 && GET_CODE (x
) == SET
6160 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6161 record_jump_equiv (insn
, 0);
6164 /* If the previous insn set CC0 and this insn no longer references CC0,
6165 delete the previous insn. Here we use the fact that nothing expects CC0
6166 to be valid over an insn, which is true until the final pass. */
6167 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6168 && (tem
= single_set (prev_insn
)) != 0
6169 && SET_DEST (tem
) == cc0_rtx
6170 && ! reg_mentioned_p (cc0_rtx
, x
))
6171 delete_insn (prev_insn
);
6173 prev_insn_cc0
= this_insn_cc0
;
6174 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6179 /* Remove from the hash table all expressions that reference memory. */
6182 invalidate_memory (void)
6185 struct table_elt
*p
, *next
;
6187 for (i
= 0; i
< HASH_SIZE
; i
++)
6188 for (p
= table
[i
]; p
; p
= next
)
6190 next
= p
->next_same_hash
;
6192 remove_from_table (p
, i
);
6196 /* If ADDR is an address that implicitly affects the stack pointer, return
6197 1 and update the register tables to show the effect. Else, return 0. */
6200 addr_affects_sp_p (rtx addr
)
6202 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6203 && REG_P (XEXP (addr
, 0))
6204 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6206 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6208 REG_TICK (STACK_POINTER_REGNUM
)++;
6209 /* Is it possible to use a subreg of SP? */
6210 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6213 /* This should be *very* rare. */
6214 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6215 invalidate (stack_pointer_rtx
, VOIDmode
);
6223 /* Perform invalidation on the basis of everything about an insn
6224 except for invalidating the actual places that are SET in it.
6225 This includes the places CLOBBERed, and anything that might
6226 alias with something that is SET or CLOBBERed.
6228 X is the pattern of the insn. */
6231 invalidate_from_clobbers (rtx x
)
6233 if (GET_CODE (x
) == CLOBBER
)
6235 rtx ref
= XEXP (x
, 0);
6238 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6240 invalidate (ref
, VOIDmode
);
6241 else if (GET_CODE (ref
) == STRICT_LOW_PART
6242 || GET_CODE (ref
) == ZERO_EXTRACT
)
6243 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6246 else if (GET_CODE (x
) == PARALLEL
)
6249 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6251 rtx y
= XVECEXP (x
, 0, i
);
6252 if (GET_CODE (y
) == CLOBBER
)
6254 rtx ref
= XEXP (y
, 0);
6255 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6257 invalidate (ref
, VOIDmode
);
6258 else if (GET_CODE (ref
) == STRICT_LOW_PART
6259 || GET_CODE (ref
) == ZERO_EXTRACT
)
6260 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6266 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6267 and replace any registers in them with either an equivalent constant
6268 or the canonical form of the register. If we are inside an address,
6269 only do this if the address remains valid.
6271 OBJECT is 0 except when within a MEM in which case it is the MEM.
6273 Return the replacement for X. */
6276 cse_process_notes (rtx x
, rtx object
)
6278 enum rtx_code code
= GET_CODE (x
);
6279 const char *fmt
= GET_RTX_FORMAT (code
);
6296 validate_change (x
, &XEXP (x
, 0),
6297 cse_process_notes (XEXP (x
, 0), x
), 0);
6302 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6303 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6305 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6312 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6313 /* We don't substitute VOIDmode constants into these rtx,
6314 since they would impede folding. */
6315 if (GET_MODE (new) != VOIDmode
)
6316 validate_change (object
, &XEXP (x
, 0), new, 0);
6321 i
= REG_QTY (REGNO (x
));
6323 /* Return a constant or a constant register. */
6324 if (REGNO_QTY_VALID_P (REGNO (x
)))
6326 struct qty_table_elem
*ent
= &qty_table
[i
];
6328 if (ent
->const_rtx
!= NULL_RTX
6329 && (CONSTANT_P (ent
->const_rtx
)
6330 || REG_P (ent
->const_rtx
)))
6332 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6338 /* Otherwise, canonicalize this register. */
6339 return canon_reg (x
, NULL_RTX
);
6345 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6347 validate_change (object
, &XEXP (x
, i
),
6348 cse_process_notes (XEXP (x
, i
), object
), 0);
6353 /* Find common subexpressions between the end test of a loop and the beginning
6354 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6356 Often we have a loop where an expression in the exit test is used
6357 in the body of the loop. For example "while (*p) *q++ = *p++;".
6358 Because of the way we duplicate the loop exit test in front of the loop,
6359 however, we don't detect that common subexpression. This will be caught
6360 when global cse is implemented, but this is a quite common case.
6362 This function handles the most common cases of these common expressions.
6363 It is called after we have processed the basic block ending with the
6364 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6365 jumps to a label used only once. */
6368 cse_around_loop (rtx loop_start
)
6372 struct table_elt
*p
;
6374 /* If the jump at the end of the loop doesn't go to the start, we don't
6376 for (insn
= PREV_INSN (loop_start
);
6377 insn
&& (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) >= 0);
6378 insn
= PREV_INSN (insn
))
6383 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
6386 /* If the last insn of the loop (the end test) was an NE comparison,
6387 we will interpret it as an EQ comparison, since we fell through
6388 the loop. Any equivalences resulting from that comparison are
6389 therefore not valid and must be invalidated. */
6390 if (last_jump_equiv_class
)
6391 for (p
= last_jump_equiv_class
->first_same_value
; p
;
6392 p
= p
->next_same_value
)
6394 if (MEM_P (p
->exp
) || REG_P (p
->exp
)
6395 || (GET_CODE (p
->exp
) == SUBREG
6396 && REG_P (SUBREG_REG (p
->exp
))))
6397 invalidate (p
->exp
, VOIDmode
);
6398 else if (GET_CODE (p
->exp
) == STRICT_LOW_PART
6399 || GET_CODE (p
->exp
) == ZERO_EXTRACT
)
6400 invalidate (XEXP (p
->exp
, 0), GET_MODE (p
->exp
));
6403 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6404 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6406 The only thing we do with SET_DEST is invalidate entries, so we
6407 can safely process each SET in order. It is slightly less efficient
6408 to do so, but we only want to handle the most common cases.
6410 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6411 These pseudos won't have valid entries in any of the tables indexed
6412 by register number, such as reg_qty. We avoid out-of-range array
6413 accesses by not processing any instructions created after cse started. */
6415 for (insn
= NEXT_INSN (loop_start
);
6416 !CALL_P (insn
) && !LABEL_P (insn
)
6417 && INSN_UID (insn
) < max_insn_uid
6419 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
6420 insn
= NEXT_INSN (insn
))
6423 && (GET_CODE (PATTERN (insn
)) == SET
6424 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
6425 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
6426 else if (INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == PARALLEL
)
6427 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6428 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
6429 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
6430 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
6435 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6436 since they are done elsewhere. This function is called via note_stores. */
6439 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6441 enum rtx_code code
= GET_CODE (dest
);
6444 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6445 /* There are times when an address can appear varying and be a PLUS
6446 during this scan when it would be a fixed address were we to know
6447 the proper equivalences. So invalidate all memory if there is
6448 a BLKmode or nonscalar memory reference or a reference to a
6449 variable address. */
6450 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6451 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6453 invalidate_memory ();
6457 if (GET_CODE (set
) == CLOBBER
6462 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6463 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6464 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6465 invalidate (dest
, VOIDmode
);
6468 /* Invalidate all insns from START up to the end of the function or the
6469 next label. This called when we wish to CSE around a block that is
6470 conditionally executed. */
6473 invalidate_skipped_block (rtx start
)
6477 for (insn
= start
; insn
&& !LABEL_P (insn
);
6478 insn
= NEXT_INSN (insn
))
6480 if (! INSN_P (insn
))
6485 if (! CONST_OR_PURE_CALL_P (insn
))
6486 invalidate_memory ();
6487 invalidate_for_call ();
6490 invalidate_from_clobbers (PATTERN (insn
));
6491 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6495 /* If modifying X will modify the value in *DATA (which is really an
6496 `rtx *'), indicate that fact by setting the pointed to value to
6500 cse_check_loop_start (rtx x
, rtx set ATTRIBUTE_UNUSED
, void *data
)
6502 rtx
*cse_check_loop_start_value
= (rtx
*) data
;
6504 if (*cse_check_loop_start_value
== NULL_RTX
6505 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
6508 if ((MEM_P (x
) && MEM_P (*cse_check_loop_start_value
))
6509 || reg_overlap_mentioned_p (x
, *cse_check_loop_start_value
))
6510 *cse_check_loop_start_value
= NULL_RTX
;
6513 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6514 a loop that starts with the label at LOOP_START.
6516 If X is a SET, we see if its SET_SRC is currently in our hash table.
6517 If so, we see if it has a value equal to some register used only in the
6518 loop exit code (as marked by jump.c).
6520 If those two conditions are true, we search backwards from the start of
6521 the loop to see if that same value was loaded into a register that still
6522 retains its value at the start of the loop.
6524 If so, we insert an insn after the load to copy the destination of that
6525 load into the equivalent register and (try to) replace our SET_SRC with that
6528 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6531 cse_set_around_loop (rtx x
, rtx insn
, rtx loop_start
)
6533 struct table_elt
*src_elt
;
6535 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6536 are setting PC or CC0 or whose SET_SRC is already a register. */
6537 if (GET_CODE (x
) == SET
6538 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
6539 && !REG_P (SET_SRC (x
)))
6541 src_elt
= lookup (SET_SRC (x
),
6542 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
6543 GET_MODE (SET_DEST (x
)));
6546 for (src_elt
= src_elt
->first_same_value
; src_elt
;
6547 src_elt
= src_elt
->next_same_value
)
6548 if (REG_P (src_elt
->exp
) && REG_LOOP_TEST_P (src_elt
->exp
)
6549 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
6553 /* Look for an insn in front of LOOP_START that sets
6554 something in the desired mode to SET_SRC (x) before we hit
6555 a label or CALL_INSN. */
6557 for (p
= prev_nonnote_insn (loop_start
);
6560 p
= prev_nonnote_insn (p
))
6561 if ((set
= single_set (p
)) != 0
6562 && REG_P (SET_DEST (set
))
6563 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
6564 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
6566 /* We now have to ensure that nothing between P
6567 and LOOP_START modified anything referenced in
6568 SET_SRC (x). We know that nothing within the loop
6569 can modify it, or we would have invalidated it in
6572 rtx cse_check_loop_start_value
= SET_SRC (x
);
6573 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
6575 note_stores (PATTERN (q
),
6576 cse_check_loop_start
,
6577 &cse_check_loop_start_value
);
6579 /* If nothing was changed and we can replace our
6580 SET_SRC, add an insn after P to copy its destination
6581 to what we will be replacing SET_SRC with. */
6582 if (cse_check_loop_start_value
6584 && !can_throw_internal (insn
)
6585 && validate_change (insn
, &SET_SRC (x
),
6588 /* If this creates new pseudos, this is unsafe,
6589 because the regno of new pseudo is unsuitable
6590 to index into reg_qty when cse_insn processes
6591 the new insn. Therefore, if a new pseudo was
6592 created, discard this optimization. */
6593 int nregs
= max_reg_num ();
6595 = gen_move_insn (src_elt
->exp
, SET_DEST (set
));
6596 if (nregs
!= max_reg_num ())
6598 if (! validate_change (insn
, &SET_SRC (x
),
6604 if (CONSTANT_P (SET_SRC (set
))
6605 && ! find_reg_equal_equiv_note (insn
))
6606 set_unique_reg_note (insn
, REG_EQUAL
,
6608 if (control_flow_insn_p (p
))
6609 /* p can cause a control flow transfer so it
6610 is the last insn of a basic block. We can't
6611 therefore use emit_insn_after. */
6612 emit_insn_before (move
, next_nonnote_insn (p
));
6614 emit_insn_after (move
, p
);
6622 /* Deal with the destination of X affecting the stack pointer. */
6623 addr_affects_sp_p (SET_DEST (x
));
6625 /* See comment on similar code in cse_insn for explanation of these
6627 if (REG_P (SET_DEST (x
)) || GET_CODE (SET_DEST (x
)) == SUBREG
6628 || MEM_P (SET_DEST (x
)))
6629 invalidate (SET_DEST (x
), VOIDmode
);
6630 else if (GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
6631 || GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
6632 invalidate (XEXP (SET_DEST (x
), 0), GET_MODE (SET_DEST (x
)));
6635 /* Find the end of INSN's basic block and return its range,
6636 the total number of SETs in all the insns of the block, the last insn of the
6637 block, and the branch path.
6639 The branch path indicates which branches should be followed. If a nonzero
6640 path size is specified, the block should be rescanned and a different set
6641 of branches will be taken. The branch path is only used if
6642 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6644 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6645 used to describe the block. It is filled in with the information about
6646 the current block. The incoming structure's branch path, if any, is used
6647 to construct the output branch path. */
6650 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6651 int follow_jumps
, int after_loop
, int skip_blocks
)
6655 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6656 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6657 int path_size
= data
->path_size
;
6661 /* Update the previous branch path, if any. If the last branch was
6662 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6663 If it was previously PATH_NOT_TAKEN,
6664 shorten the path by one and look at the previous branch. We know that
6665 at least one branch must have been taken if PATH_SIZE is nonzero. */
6666 while (path_size
> 0)
6668 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6670 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6677 /* If the first instruction is marked with QImode, that means we've
6678 already processed this block. Our caller will look at DATA->LAST
6679 to figure out where to go next. We want to return the next block
6680 in the instruction stream, not some branched-to block somewhere
6681 else. We accomplish this by pretending our called forbid us to
6682 follow jumps, or skip blocks. */
6683 if (GET_MODE (insn
) == QImode
)
6684 follow_jumps
= skip_blocks
= 0;
6686 /* Scan to end of this basic block. */
6687 while (p
&& !LABEL_P (p
))
6689 /* Don't cse out the end of a loop. This makes a difference
6690 only for the unusual loops that always execute at least once;
6691 all other loops have labels there so we will stop in any case.
6692 Cse'ing out the end of the loop is dangerous because it
6693 might cause an invariant expression inside the loop
6694 to be reused after the end of the loop. This would make it
6695 hard to move the expression out of the loop in loop.c,
6696 especially if it is one of several equivalent expressions
6697 and loop.c would like to eliminate it.
6699 If we are running after loop.c has finished, we can ignore
6700 the NOTE_INSN_LOOP_END. */
6702 if (! after_loop
&& NOTE_P (p
)
6703 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
6706 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6707 the regs restored by the longjmp come from
6708 a later time than the setjmp. */
6709 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6710 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6713 /* A PARALLEL can have lots of SETs in it,
6714 especially if it is really an ASM_OPERANDS. */
6715 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6716 nsets
+= XVECLEN (PATTERN (p
), 0);
6717 else if (!NOTE_P (p
))
6720 /* Ignore insns made by CSE; they cannot affect the boundaries of
6723 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6724 high_cuid
= INSN_CUID (p
);
6725 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6726 low_cuid
= INSN_CUID (p
);
6728 /* See if this insn is in our branch path. If it is and we are to
6730 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6732 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6735 /* Point to next entry in path, if any. */
6739 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6740 was specified, we haven't reached our maximum path length, there are
6741 insns following the target of the jump, this is the only use of the
6742 jump label, and the target label is preceded by a BARRIER.
6744 Alternatively, we can follow the jump if it branches around a
6745 block of code and there are no other branches into the block.
6746 In this case invalidate_skipped_block will be called to invalidate any
6747 registers set in the block when following the jump. */
6749 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6751 && GET_CODE (PATTERN (p
)) == SET
6752 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6753 && JUMP_LABEL (p
) != 0
6754 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6755 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6757 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6759 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6760 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6761 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6762 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6765 /* If we ran into a BARRIER, this code is an extension of the
6766 basic block when the branch is taken. */
6767 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6769 /* Don't allow ourself to keep walking around an
6770 always-executed loop. */
6771 if (next_real_insn (q
) == next
)
6777 /* Similarly, don't put a branch in our path more than once. */
6778 for (i
= 0; i
< path_entry
; i
++)
6779 if (data
->path
[i
].branch
== p
)
6782 if (i
!= path_entry
)
6785 data
->path
[path_entry
].branch
= p
;
6786 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6788 /* This branch now ends our path. It was possible that we
6789 didn't see this branch the last time around (when the
6790 insn in front of the target was a JUMP_INSN that was
6791 turned into a no-op). */
6792 path_size
= path_entry
;
6795 /* Mark block so we won't scan it again later. */
6796 PUT_MODE (NEXT_INSN (p
), QImode
);
6798 /* Detect a branch around a block of code. */
6799 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6803 if (next_real_insn (q
) == next
)
6809 for (i
= 0; i
< path_entry
; i
++)
6810 if (data
->path
[i
].branch
== p
)
6813 if (i
!= path_entry
)
6816 /* This is no_labels_between_p (p, q) with an added check for
6817 reaching the end of a function (in case Q precedes P). */
6818 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6824 data
->path
[path_entry
].branch
= p
;
6825 data
->path
[path_entry
++].status
= PATH_AROUND
;
6827 path_size
= path_entry
;
6830 /* Mark block so we won't scan it again later. */
6831 PUT_MODE (NEXT_INSN (p
), QImode
);
6838 data
->low_cuid
= low_cuid
;
6839 data
->high_cuid
= high_cuid
;
6840 data
->nsets
= nsets
;
6843 /* If all jumps in the path are not taken, set our path length to zero
6844 so a rescan won't be done. */
6845 for (i
= path_size
- 1; i
>= 0; i
--)
6846 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6850 data
->path_size
= 0;
6852 data
->path_size
= path_size
;
6854 /* End the current branch path. */
6855 data
->path
[path_size
].branch
= 0;
6858 /* Perform cse on the instructions of a function.
6859 F is the first instruction.
6860 NREGS is one plus the highest pseudo-reg number used in the instruction.
6862 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6863 (only if -frerun-cse-after-loop).
6865 Returns 1 if jump_optimize should be redone due to simplifications
6866 in conditional jump instructions. */
6869 cse_main (rtx f
, int nregs
, int after_loop
, FILE *file
)
6871 struct cse_basic_block_data val
;
6875 val
.path
= xmalloc (sizeof (struct branch_path
)
6876 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6878 cse_jumps_altered
= 0;
6879 recorded_label_ref
= 0;
6880 constant_pool_entries_cost
= 0;
6881 constant_pool_entries_regcost
= 0;
6883 rtl_hooks
= cse_rtl_hooks
;
6886 init_alias_analysis ();
6890 max_insn_uid
= get_max_uid ();
6892 reg_eqv_table
= xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
6894 #ifdef LOAD_EXTEND_OP
6896 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6897 and change the code and mode as appropriate. */
6898 memory_extend_rtx
= gen_rtx_ZERO_EXTEND (VOIDmode
, NULL_RTX
);
6901 /* Reset the counter indicating how many elements have been made
6903 n_elements_made
= 0;
6905 /* Find the largest uid. */
6907 max_uid
= get_max_uid ();
6908 uid_cuid
= xcalloc (max_uid
+ 1, sizeof (int));
6910 /* Compute the mapping from uids to cuids.
6911 CUIDs are numbers assigned to insns, like uids,
6912 except that cuids increase monotonically through the code.
6913 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6914 between two insns is not affected by -g. */
6916 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6919 || NOTE_LINE_NUMBER (insn
) < 0)
6920 INSN_CUID (insn
) = ++i
;
6922 /* Give a line number note the same cuid as preceding insn. */
6923 INSN_CUID (insn
) = i
;
6926 ggc_push_context ();
6928 /* Loop over basic blocks.
6929 Compute the maximum number of qty's needed for each basic block
6930 (which is 2 for each SET). */
6935 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
6936 flag_cse_skip_blocks
);
6938 /* If this basic block was already processed or has no sets, skip it. */
6939 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6941 PUT_MODE (insn
, VOIDmode
);
6942 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6947 cse_basic_block_start
= val
.low_cuid
;
6948 cse_basic_block_end
= val
.high_cuid
;
6949 max_qty
= val
.nsets
* 2;
6952 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
6953 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
6956 /* Make MAX_QTY bigger to give us room to optimize
6957 past the end of this basic block, if that should prove useful. */
6963 /* If this basic block is being extended by following certain jumps,
6964 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6965 Otherwise, we start after this basic block. */
6966 if (val
.path_size
> 0)
6967 cse_basic_block (insn
, val
.last
, val
.path
, 0);
6970 int old_cse_jumps_altered
= cse_jumps_altered
;
6973 /* When cse changes a conditional jump to an unconditional
6974 jump, we want to reprocess the block, since it will give
6975 us a new branch path to investigate. */
6976 cse_jumps_altered
= 0;
6977 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
6978 if (cse_jumps_altered
== 0
6979 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
6982 cse_jumps_altered
|= old_cse_jumps_altered
;
6995 if (max_elements_made
< n_elements_made
)
6996 max_elements_made
= n_elements_made
;
6999 end_alias_analysis ();
7001 free (reg_eqv_table
);
7003 rtl_hooks
= general_rtl_hooks
;
7005 return cse_jumps_altered
|| recorded_label_ref
;
7008 /* Process a single basic block. FROM and TO and the limits of the basic
7009 block. NEXT_BRANCH points to the branch path when following jumps or
7010 a null path when not following jumps.
7012 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7013 loop. This is true when we are being called for the last time on a
7014 block and this CSE pass is before loop.c. */
7017 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
,
7022 rtx libcall_insn
= NULL_RTX
;
7024 int no_conflict
= 0;
7026 /* This array is undefined before max_reg, so only allocate
7027 the space actually needed and adjust the start. */
7029 qty_table
= xmalloc ((max_qty
- max_reg
) * sizeof (struct qty_table_elem
));
7030 qty_table
-= max_reg
;
7034 /* TO might be a label. If so, protect it from being deleted. */
7035 if (to
!= 0 && LABEL_P (to
))
7038 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7040 enum rtx_code code
= GET_CODE (insn
);
7042 /* If we have processed 1,000 insns, flush the hash table to
7043 avoid extreme quadratic behavior. We must not include NOTEs
7044 in the count since there may be more of them when generating
7045 debugging information. If we clear the table at different
7046 times, code generated with -g -O might be different than code
7047 generated with -O but not -g.
7049 ??? This is a real kludge and needs to be done some other way.
7051 if (code
!= NOTE
&& num_insns
++ > 1000)
7053 flush_hash_table ();
7057 /* See if this is a branch that is part of the path. If so, and it is
7058 to be taken, do so. */
7059 if (next_branch
->branch
== insn
)
7061 enum taken status
= next_branch
++->status
;
7062 if (status
!= PATH_NOT_TAKEN
)
7064 if (status
== PATH_TAKEN
)
7065 record_jump_equiv (insn
, 1);
7067 invalidate_skipped_block (NEXT_INSN (insn
));
7069 /* Set the last insn as the jump insn; it doesn't affect cc0.
7070 Then follow this branch. */
7075 insn
= JUMP_LABEL (insn
);
7080 if (GET_MODE (insn
) == QImode
)
7081 PUT_MODE (insn
, VOIDmode
);
7083 if (GET_RTX_CLASS (code
) == RTX_INSN
)
7087 /* Process notes first so we have all notes in canonical forms when
7088 looking for duplicate operations. */
7090 if (REG_NOTES (insn
))
7091 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7093 /* Track when we are inside in LIBCALL block. Inside such a block,
7094 we do not want to record destinations. The last insn of a
7095 LIBCALL block is not considered to be part of the block, since
7096 its destination is the result of the block and hence should be
7099 if (REG_NOTES (insn
) != 0)
7101 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
7102 libcall_insn
= XEXP (p
, 0);
7103 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7105 /* Keep libcall_insn for the last SET insn of a no-conflict
7106 block to prevent changing the destination. */
7112 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
7116 cse_insn (insn
, libcall_insn
);
7118 if (no_conflict
== -1)
7124 /* If we haven't already found an insn where we added a LABEL_REF,
7126 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
7127 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
7129 recorded_label_ref
= 1;
7132 /* If INSN is now an unconditional jump, skip to the end of our
7133 basic block by pretending that we just did the last insn in the
7134 basic block. If we are jumping to the end of our block, show
7135 that we can have one usage of TO. */
7137 if (any_uncondjump_p (insn
))
7141 free (qty_table
+ max_reg
);
7145 if (JUMP_LABEL (insn
) == to
)
7148 /* Maybe TO was deleted because the jump is unconditional.
7149 If so, there is nothing left in this basic block. */
7150 /* ??? Perhaps it would be smarter to set TO
7151 to whatever follows this insn,
7152 and pretend the basic block had always ended here. */
7153 if (INSN_DELETED_P (to
))
7156 insn
= PREV_INSN (to
);
7159 /* See if it is ok to keep on going past the label
7160 which used to end our basic block. Remember that we incremented
7161 the count of that label, so we decrement it here. If we made
7162 a jump unconditional, TO_USAGE will be one; in that case, we don't
7163 want to count the use in that jump. */
7165 if (to
!= 0 && NEXT_INSN (insn
) == to
7166 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
7168 struct cse_basic_block_data val
;
7171 insn
= NEXT_INSN (to
);
7173 /* If TO was the last insn in the function, we are done. */
7176 free (qty_table
+ max_reg
);
7180 /* If TO was preceded by a BARRIER we are done with this block
7181 because it has no continuation. */
7182 prev
= prev_nonnote_insn (to
);
7183 if (prev
&& BARRIER_P (prev
))
7185 free (qty_table
+ max_reg
);
7189 /* Find the end of the following block. Note that we won't be
7190 following branches in this case. */
7193 val
.path
= xmalloc (sizeof (struct branch_path
)
7194 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
7195 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7198 /* If the tables we allocated have enough space left
7199 to handle all the SETs in the next basic block,
7200 continue through it. Otherwise, return,
7201 and that block will be scanned individually. */
7202 if (val
.nsets
* 2 + next_qty
> max_qty
)
7205 cse_basic_block_start
= val
.low_cuid
;
7206 cse_basic_block_end
= val
.high_cuid
;
7209 /* Prevent TO from being deleted if it is a label. */
7210 if (to
!= 0 && LABEL_P (to
))
7213 /* Back up so we process the first insn in the extension. */
7214 insn
= PREV_INSN (insn
);
7218 if (next_qty
> max_qty
)
7221 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7222 the previous insn is the only insn that branches to the head of a loop,
7223 we can cse into the loop. Don't do this if we changed the jump
7224 structure of a loop unless we aren't going to be following jumps. */
7226 insn
= prev_nonnote_insn (to
);
7227 if ((cse_jumps_altered
== 0
7228 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7229 && around_loop
&& to
!= 0
7230 && NOTE_P (to
) && NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
7232 && JUMP_LABEL (insn
) != 0
7233 && LABEL_NUSES (JUMP_LABEL (insn
)) == 1)
7234 cse_around_loop (JUMP_LABEL (insn
));
7236 free (qty_table
+ max_reg
);
7238 return to
? NEXT_INSN (to
) : 0;
7241 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7242 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7245 check_for_label_ref (rtx
*rtl
, void *data
)
7247 rtx insn
= (rtx
) data
;
7249 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7250 we must rerun jump since it needs to place the note. If this is a
7251 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7252 since no REG_LABEL will be added. */
7253 return (GET_CODE (*rtl
) == LABEL_REF
7254 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7255 && LABEL_P (XEXP (*rtl
, 0))
7256 && INSN_UID (XEXP (*rtl
, 0)) != 0
7257 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7260 /* Count the number of times registers are used (not set) in X.
7261 COUNTS is an array in which we accumulate the count, INCR is how much
7262 we count each register usage. */
7265 count_reg_usage (rtx x
, int *counts
, int incr
)
7275 switch (code
= GET_CODE (x
))
7278 counts
[REGNO (x
)] += incr
;
7292 /* If we are clobbering a MEM, mark any registers inside the address
7294 if (MEM_P (XEXP (x
, 0)))
7295 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, incr
);
7299 /* Unless we are setting a REG, count everything in SET_DEST. */
7300 if (!REG_P (SET_DEST (x
)))
7301 count_reg_usage (SET_DEST (x
), counts
, incr
);
7302 count_reg_usage (SET_SRC (x
), counts
, incr
);
7306 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, incr
);
7311 count_reg_usage (PATTERN (x
), counts
, incr
);
7313 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7316 note
= find_reg_equal_equiv_note (x
);
7319 rtx eqv
= XEXP (note
, 0);
7321 if (GET_CODE (eqv
) == EXPR_LIST
)
7322 /* This REG_EQUAL note describes the result of a function call.
7323 Process all the arguments. */
7326 count_reg_usage (XEXP (eqv
, 0), counts
, incr
);
7327 eqv
= XEXP (eqv
, 1);
7329 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7331 count_reg_usage (eqv
, counts
, incr
);
7336 if (REG_NOTE_KIND (x
) == REG_EQUAL
7337 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7338 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7339 involving registers in the address. */
7340 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7341 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7343 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7347 /* Iterate over just the inputs, not the constraints as well. */
7348 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7349 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, incr
);
7359 fmt
= GET_RTX_FORMAT (code
);
7360 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7363 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7364 else if (fmt
[i
] == 'E')
7365 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7366 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7370 /* Return true if set is live. */
7372 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7379 if (set_noop_p (set
))
7383 else if (GET_CODE (SET_DEST (set
)) == CC0
7384 && !side_effects_p (SET_SRC (set
))
7385 && ((tem
= next_nonnote_insn (insn
)) == 0
7387 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7390 else if (!REG_P (SET_DEST (set
))
7391 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7392 || counts
[REGNO (SET_DEST (set
))] != 0
7393 || side_effects_p (SET_SRC (set
)))
7398 /* Return true if insn is live. */
7401 insn_live_p (rtx insn
, int *counts
)
7404 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7406 else if (GET_CODE (PATTERN (insn
)) == SET
)
7407 return set_live_p (PATTERN (insn
), insn
, counts
);
7408 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7410 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7412 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7414 if (GET_CODE (elt
) == SET
)
7416 if (set_live_p (elt
, insn
, counts
))
7419 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7428 /* Return true if libcall is dead as a whole. */
7431 dead_libcall_p (rtx insn
, int *counts
)
7435 /* See if there's a REG_EQUAL note on this insn and try to
7436 replace the source with the REG_EQUAL expression.
7438 We assume that insns with REG_RETVALs can only be reg->reg
7439 copies at this point. */
7440 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7444 set
= single_set (insn
);
7448 new = simplify_rtx (XEXP (note
, 0));
7450 new = XEXP (note
, 0);
7452 /* While changing insn, we must update the counts accordingly. */
7453 count_reg_usage (insn
, counts
, -1);
7455 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7457 count_reg_usage (insn
, counts
, 1);
7458 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7459 remove_note (insn
, note
);
7463 if (CONSTANT_P (new))
7465 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7466 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7468 count_reg_usage (insn
, counts
, 1);
7469 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7470 remove_note (insn
, note
);
7475 count_reg_usage (insn
, counts
, 1);
7479 /* Scan all the insns and delete any that are dead; i.e., they store a register
7480 that is never used or they copy a register to itself.
7482 This is used to remove insns made obviously dead by cse, loop or other
7483 optimizations. It improves the heuristics in loop since it won't try to
7484 move dead invariants out of loops or make givs for dead quantities. The
7485 remaining passes of the compilation are also sped up. */
7488 delete_trivially_dead_insns (rtx insns
, int nreg
)
7492 int in_libcall
= 0, dead_libcall
= 0;
7493 int ndead
= 0, nlastdead
, niterations
= 0;
7495 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7496 /* First count the number of times each register is used. */
7497 counts
= xcalloc (nreg
, sizeof (int));
7498 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7499 count_reg_usage (insn
, counts
, 1);
7505 /* Go from the last insn to the first and delete insns that only set unused
7506 registers or copy a register to itself. As we delete an insn, remove
7507 usage counts for registers it uses.
7509 The first jump optimization pass may leave a real insn as the last
7510 insn in the function. We must not skip that insn or we may end
7511 up deleting code that is not really dead. */
7512 insn
= get_last_insn ();
7513 if (! INSN_P (insn
))
7514 insn
= prev_real_insn (insn
);
7516 for (; insn
; insn
= prev
)
7520 prev
= prev_real_insn (insn
);
7522 /* Don't delete any insns that are part of a libcall block unless
7523 we can delete the whole libcall block.
7525 Flow or loop might get confused if we did that. Remember
7526 that we are scanning backwards. */
7527 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7531 dead_libcall
= dead_libcall_p (insn
, counts
);
7533 else if (in_libcall
)
7534 live_insn
= ! dead_libcall
;
7536 live_insn
= insn_live_p (insn
, counts
);
7538 /* If this is a dead insn, delete it and show registers in it aren't
7543 count_reg_usage (insn
, counts
, -1);
7544 delete_insn_and_edges (insn
);
7548 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7555 while (ndead
!= nlastdead
);
7557 if (dump_file
&& ndead
)
7558 fprintf (dump_file
, "Deleted %i trivially dead insns; %i iterations\n",
7559 ndead
, niterations
);
7562 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7566 /* This function is called via for_each_rtx. The argument, NEWREG, is
7567 a condition code register with the desired mode. If we are looking
7568 at the same register in a different mode, replace it with
7572 cse_change_cc_mode (rtx
*loc
, void *data
)
7574 rtx newreg
= (rtx
) data
;
7578 && REGNO (*loc
) == REGNO (newreg
)
7579 && GET_MODE (*loc
) != GET_MODE (newreg
))
7587 /* Change the mode of any reference to the register REGNO (NEWREG) to
7588 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7589 any instruction which modifies NEWREG. */
7592 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7596 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7598 if (! INSN_P (insn
))
7601 if (reg_set_p (newreg
, insn
))
7604 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, newreg
);
7605 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, newreg
);
7609 /* BB is a basic block which finishes with CC_REG as a condition code
7610 register which is set to CC_SRC. Look through the successors of BB
7611 to find blocks which have a single predecessor (i.e., this one),
7612 and look through those blocks for an assignment to CC_REG which is
7613 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7614 permitted to change the mode of CC_SRC to a compatible mode. This
7615 returns VOIDmode if no equivalent assignments were found.
7616 Otherwise it returns the mode which CC_SRC should wind up with.
7618 The main complexity in this function is handling the mode issues.
7619 We may have more than one duplicate which we can eliminate, and we
7620 try to find a mode which will work for multiple duplicates. */
7622 static enum machine_mode
7623 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7626 enum machine_mode mode
;
7627 unsigned int insn_count
;
7630 enum machine_mode modes
[2];
7635 /* We expect to have two successors. Look at both before picking
7636 the final mode for the comparison. If we have more successors
7637 (i.e., some sort of table jump, although that seems unlikely),
7638 then we require all beyond the first two to use the same
7641 found_equiv
= false;
7642 mode
= GET_MODE (cc_src
);
7644 FOR_EACH_EDGE (e
, bb
->succs
)
7649 if (e
->flags
& EDGE_COMPLEX
)
7652 if (EDGE_COUNT (e
->dest
->preds
) != 1
7653 || e
->dest
== EXIT_BLOCK_PTR
)
7656 end
= NEXT_INSN (BB_END (e
->dest
));
7657 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7661 if (! INSN_P (insn
))
7664 /* If CC_SRC is modified, we have to stop looking for
7665 something which uses it. */
7666 if (modified_in_p (cc_src
, insn
))
7669 /* Check whether INSN sets CC_REG to CC_SRC. */
7670 set
= single_set (insn
);
7672 && REG_P (SET_DEST (set
))
7673 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7676 enum machine_mode set_mode
;
7677 enum machine_mode comp_mode
;
7680 set_mode
= GET_MODE (SET_SRC (set
));
7681 comp_mode
= set_mode
;
7682 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7684 else if (GET_CODE (cc_src
) == COMPARE
7685 && GET_CODE (SET_SRC (set
)) == COMPARE
7687 && rtx_equal_p (XEXP (cc_src
, 0),
7688 XEXP (SET_SRC (set
), 0))
7689 && rtx_equal_p (XEXP (cc_src
, 1),
7690 XEXP (SET_SRC (set
), 1)))
7693 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7694 if (comp_mode
!= VOIDmode
7695 && (can_change_mode
|| comp_mode
== mode
))
7702 if (insn_count
< ARRAY_SIZE (insns
))
7704 insns
[insn_count
] = insn
;
7705 modes
[insn_count
] = set_mode
;
7706 last_insns
[insn_count
] = end
;
7709 if (mode
!= comp_mode
)
7711 if (! can_change_mode
)
7714 PUT_MODE (cc_src
, mode
);
7719 if (set_mode
!= mode
)
7721 /* We found a matching expression in the
7722 wrong mode, but we don't have room to
7723 store it in the array. Punt. This case
7727 /* INSN sets CC_REG to a value equal to CC_SRC
7728 with the right mode. We can simply delete
7733 /* We found an instruction to delete. Keep looking,
7734 in the hopes of finding a three-way jump. */
7738 /* We found an instruction which sets the condition
7739 code, so don't look any farther. */
7743 /* If INSN sets CC_REG in some other way, don't look any
7745 if (reg_set_p (cc_reg
, insn
))
7749 /* If we fell off the bottom of the block, we can keep looking
7750 through successors. We pass CAN_CHANGE_MODE as false because
7751 we aren't prepared to handle compatibility between the
7752 further blocks and this block. */
7755 enum machine_mode submode
;
7757 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7758 if (submode
!= VOIDmode
)
7760 if (submode
!= mode
)
7763 can_change_mode
= false;
7772 /* Now INSN_COUNT is the number of instructions we found which set
7773 CC_REG to a value equivalent to CC_SRC. The instructions are in
7774 INSNS. The modes used by those instructions are in MODES. */
7777 for (i
= 0; i
< insn_count
; ++i
)
7779 if (modes
[i
] != mode
)
7781 /* We need to change the mode of CC_REG in INSNS[i] and
7782 subsequent instructions. */
7785 if (GET_MODE (cc_reg
) == mode
)
7788 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7790 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7794 delete_insn (insns
[i
]);
7800 /* If we have a fixed condition code register (or two), walk through
7801 the instructions and try to eliminate duplicate assignments. */
7804 cse_condition_code_reg (void)
7806 unsigned int cc_regno_1
;
7807 unsigned int cc_regno_2
;
7812 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7815 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7816 if (cc_regno_2
!= INVALID_REGNUM
)
7817 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7819 cc_reg_2
= NULL_RTX
;
7828 enum machine_mode mode
;
7829 enum machine_mode orig_mode
;
7831 /* Look for blocks which end with a conditional jump based on a
7832 condition code register. Then look for the instruction which
7833 sets the condition code register. Then look through the
7834 successor blocks for instructions which set the condition
7835 code register to the same value. There are other possible
7836 uses of the condition code register, but these are by far the
7837 most common and the ones which we are most likely to be able
7840 last_insn
= BB_END (bb
);
7841 if (!JUMP_P (last_insn
))
7844 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7846 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7851 cc_src_insn
= NULL_RTX
;
7853 for (insn
= PREV_INSN (last_insn
);
7854 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7855 insn
= PREV_INSN (insn
))
7859 if (! INSN_P (insn
))
7861 set
= single_set (insn
);
7863 && REG_P (SET_DEST (set
))
7864 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7867 cc_src
= SET_SRC (set
);
7870 else if (reg_set_p (cc_reg
, insn
))
7877 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7880 /* Now CC_REG is a condition code register used for a
7881 conditional jump at the end of the block, and CC_SRC, in
7882 CC_SRC_INSN, is the value to which that condition code
7883 register is set, and CC_SRC is still meaningful at the end of
7886 orig_mode
= GET_MODE (cc_src
);
7887 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7888 if (mode
!= VOIDmode
)
7890 if (mode
!= GET_MODE (cc_src
))
7892 if (mode
!= orig_mode
)
7894 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7896 /* Change the mode of CC_REG in CC_SRC_INSN to
7897 GET_MODE (NEWREG). */
7898 for_each_rtx (&PATTERN (cc_src_insn
), cse_change_cc_mode
,
7900 for_each_rtx (®_NOTES (cc_src_insn
), cse_change_cc_mode
,
7903 /* Do the same in the following insns that use the
7904 current value of CC_REG within BB. */
7905 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7906 NEXT_INSN (last_insn
),