1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "insn-config.h"
30 #include "hard-reg-set.h"
32 #include "basic-block.h"
37 #include "diagnostic-core.h"
40 #include "addresses.h"
44 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
46 #define regno_save_mode \
47 (this_target_reload->x_regno_save_mode)
48 #define cached_reg_save_code \
49 (this_target_reload->x_cached_reg_save_code)
50 #define cached_reg_restore_code \
51 (this_target_reload->x_cached_reg_restore_code)
53 /* For each hard register, a place on the stack where it can be saved,
57 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
59 /* The number of elements in the subsequent array. */
60 static int save_slots_num
;
62 /* Allocated slots so far. */
63 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
65 /* Set of hard regs currently residing in save area (during insn scan). */
67 static HARD_REG_SET hard_regs_saved
;
69 /* Number of registers currently in hard_regs_saved. */
71 static int n_regs_saved
;
73 /* Computed by mark_referenced_regs, all regs referenced in a given
75 static HARD_REG_SET referenced_regs
;
78 typedef void refmarker_fn (rtx
*loc
, enum machine_mode mode
, int hardregno
,
81 static int reg_save_code (int, enum machine_mode
);
82 static int reg_restore_code (int, enum machine_mode
);
84 struct saved_hard_reg
;
85 static void initiate_saved_hard_regs (void);
86 static struct saved_hard_reg
*new_saved_hard_reg (int, int);
87 static void finish_saved_hard_regs (void);
88 static int saved_hard_reg_compare_func (const void *, const void *);
90 static void mark_set_regs (rtx
, const_rtx
, void *);
91 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
92 static refmarker_fn mark_reg_as_referenced
;
93 static refmarker_fn replace_reg_with_saved_mem
;
94 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
96 static int insert_restore (struct insn_chain
*, int, int, int,
98 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
100 static void add_stored_regs (rtx
, const_rtx
, void *);
104 static GTY(()) rtx savepat
;
105 static GTY(()) rtx restpat
;
106 static GTY(()) rtx test_reg
;
107 static GTY(()) rtx test_mem
;
108 static GTY(()) rtx saveinsn
;
109 static GTY(()) rtx restinsn
;
111 /* Return the INSN_CODE used to save register REG in mode MODE. */
113 reg_save_code (int reg
, enum machine_mode mode
)
116 if (cached_reg_save_code
[reg
][mode
])
117 return cached_reg_save_code
[reg
][mode
];
118 if (!HARD_REGNO_MODE_OK (reg
, mode
))
120 cached_reg_save_code
[reg
][mode
] = -1;
121 cached_reg_restore_code
[reg
][mode
] = -1;
125 /* Update the register number and modes of the register
126 and memory operand. */
127 SET_REGNO (test_reg
, reg
);
128 PUT_MODE (test_reg
, mode
);
129 PUT_MODE (test_mem
, mode
);
131 /* Force re-recognition of the modified insns. */
132 INSN_CODE (saveinsn
) = -1;
133 INSN_CODE (restinsn
) = -1;
135 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
136 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
138 /* Now extract both insns and see if we can meet their
140 ok
= (cached_reg_save_code
[reg
][mode
] != -1
141 && cached_reg_restore_code
[reg
][mode
] != -1);
144 extract_insn (saveinsn
);
145 ok
= constrain_operands (1);
146 extract_insn (restinsn
);
147 ok
&= constrain_operands (1);
152 cached_reg_save_code
[reg
][mode
] = -1;
153 cached_reg_restore_code
[reg
][mode
] = -1;
155 gcc_assert (cached_reg_save_code
[reg
][mode
]);
156 return cached_reg_save_code
[reg
][mode
];
159 /* Return the INSN_CODE used to restore register REG in mode MODE. */
161 reg_restore_code (int reg
, enum machine_mode mode
)
163 if (cached_reg_restore_code
[reg
][mode
])
164 return cached_reg_restore_code
[reg
][mode
];
165 /* Populate our cache. */
166 reg_save_code (reg
, mode
);
167 return cached_reg_restore_code
[reg
][mode
];
170 /* Initialize for caller-save.
172 Look at all the hard registers that are used by a call and for which
173 reginfo.c has not already excluded from being used across a call.
175 Ensure that we can find a mode to save the register and that there is a
176 simple insn to save and restore the register. This latter check avoids
177 problems that would occur if we tried to save the MQ register of some
178 machines directly into memory. */
181 init_caller_save (void)
188 if (caller_save_initialized_p
)
191 caller_save_initialized_p
= true;
193 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
194 /* First find all the registers that we need to deal with and all
195 the modes that they can have. If we can't find a mode to use,
196 we can't have the register live over calls. */
198 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
200 if (call_used_regs
[i
]
201 && !TEST_HARD_REG_BIT (call_fixed_reg_set
, i
))
203 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
205 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
207 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
209 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
214 regno_save_mode
[i
][1] = VOIDmode
;
217 /* The following code tries to approximate the conditions under which
218 we can easily save and restore a register without scratch registers or
219 other complexities. It will usually work, except under conditions where
220 the validity of an insn operand is dependent on the address offset.
221 No such cases are currently known.
223 We first find a typical offset from some BASE_REG_CLASS register.
224 This address is chosen by finding the first register in the class
225 and by finding the smallest power of two that is a valid offset from
226 that register in every mode we will use to save registers. */
228 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
229 if (TEST_HARD_REG_BIT
231 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
234 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
236 addr_reg
= gen_rtx_REG (Pmode
, i
);
238 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
240 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
242 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
243 if (regno_save_mode
[i
][1] != VOIDmode
244 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
247 if (i
== FIRST_PSEUDO_REGISTER
)
251 /* If we didn't find a valid address, we must use register indirect. */
255 /* Next we try to form an insn to save and restore the register. We
256 see if such an insn is recognized and meets its constraints.
258 To avoid lots of unnecessary RTL allocation, we construct all the RTL
259 once, then modify the memory and register operands in-place. */
261 test_reg
= gen_rtx_REG (VOIDmode
, 0);
262 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
263 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
264 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
266 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, savepat
, -1, 0);
267 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, restpat
, -1, 0);
269 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
270 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
271 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
273 regno_save_mode
[i
][j
] = VOIDmode
;
276 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
277 if (call_used_regs
[i
])
278 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
285 /* Initialize save areas by showing that we haven't allocated any yet. */
288 init_save_areas (void)
292 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
293 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
294 regno_save_mem
[i
][j
] = 0;
299 /* The structure represents a hard register which should be saved
300 through the call. It is used when the integrated register
301 allocator (IRA) is used and sharing save slots is on. */
302 struct saved_hard_reg
304 /* Order number starting with 0. */
306 /* The hard regno. */
308 /* Execution frequency of all calls through which given hard
309 register should be saved. */
311 /* Stack slot reserved to save the hard register through calls. */
313 /* True if it is first hard register in the chain of hard registers
314 sharing the same stack slot. */
316 /* Order number of the next hard register structure with the same
317 slot in the chain. -1 represents end of the chain. */
321 /* Map: hard register number to the corresponding structure. */
322 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
324 /* The number of all structures representing hard registers should be
325 saved, in order words, the number of used elements in the following
327 static int saved_regs_num
;
329 /* Pointers to all the structures. Index is the order number of the
330 corresponding structure. */
331 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
333 /* First called function for work with saved hard registers. */
335 initiate_saved_hard_regs (void)
340 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
341 hard_reg_map
[i
] = NULL
;
344 /* Allocate and return new saved hard register with given REGNO and
346 static struct saved_hard_reg
*
347 new_saved_hard_reg (int regno
, int call_freq
)
349 struct saved_hard_reg
*saved_reg
;
352 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
353 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
354 saved_reg
->num
= saved_regs_num
++;
355 saved_reg
->hard_regno
= regno
;
356 saved_reg
->call_freq
= call_freq
;
357 saved_reg
->first_p
= FALSE
;
358 saved_reg
->next
= -1;
362 /* Free memory allocated for the saved hard registers. */
364 finish_saved_hard_regs (void)
368 for (i
= 0; i
< saved_regs_num
; i
++)
369 free (all_saved_regs
[i
]);
372 /* The function is used to sort the saved hard register structures
373 according their frequency. */
375 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
377 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
378 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
380 if (flag_omit_frame_pointer
)
382 if (p1
->call_freq
- p2
->call_freq
!= 0)
383 return p1
->call_freq
- p2
->call_freq
;
385 else if (p2
->call_freq
- p1
->call_freq
!= 0)
386 return p2
->call_freq
- p1
->call_freq
;
388 return p1
->num
- p2
->num
;
391 /* Allocate save areas for any hard registers that might need saving.
392 We take a conservative approach here and look for call-clobbered hard
393 registers that are assigned to pseudos that cross calls. This may
394 overestimate slightly (especially if some of these registers are later
395 used as spill registers), but it should not be significant.
397 For IRA we use priority coloring to decrease stack slots needed for
398 saving hard registers through calls. We build conflicts for them
403 In the fallback case we should iterate backwards across all possible
404 modes for the save, choosing the largest available one instead of
405 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
407 We do not try to use "move multiple" instructions that exist
408 on some machines (such as the 68k moveml). It could be a win to try
409 and use them when possible. The hard part is doing it in a way that is
410 machine independent since they might be saving non-consecutive
411 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
414 setup_save_areas (void)
418 HARD_REG_SET hard_regs_used
;
420 /* Allocate space in the save area for the largest multi-register
421 pseudos first, then work backwards to single register
424 /* Find and record all call-used hard-registers in this function. */
425 CLEAR_HARD_REG_SET (hard_regs_used
);
426 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
427 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
429 unsigned int regno
= reg_renumber
[i
];
430 unsigned int endregno
431 = end_hard_regno (GET_MODE (regno_reg_rtx
[i
]), regno
);
432 for (r
= regno
; r
< endregno
; r
++)
433 if (call_used_regs
[r
])
434 SET_HARD_REG_BIT (hard_regs_used
, r
);
437 if (optimize
&& flag_ira_share_save_slots
)
440 struct insn_chain
*chain
, *next
;
441 char *saved_reg_conflicts
;
444 struct saved_hard_reg
*saved_reg
, *saved_reg2
, *saved_reg3
;
445 int call_saved_regs_num
;
446 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
447 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
448 reg_set_iterator rsi
;
450 int prev_save_slots_num
;
451 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
453 initiate_saved_hard_regs ();
454 /* Create hard reg saved regs. */
455 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
460 || find_reg_note (insn
, REG_NORETURN
, NULL
))
462 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
463 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
464 &chain
->live_throughout
);
465 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
467 /* Record all registers set in this call insn. These don't
468 need to be saved. N.B. the call insn might set a subreg
469 of a multi-hard-reg pseudo; then the pseudo is considered
470 live during the call, but the subreg that is set
472 CLEAR_HARD_REG_SET (this_insn_sets
);
473 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
474 /* Sibcalls are considered to set the return value. */
475 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
476 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
478 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
479 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
480 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
481 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
482 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
484 if (hard_reg_map
[regno
] != NULL
)
485 hard_reg_map
[regno
]->call_freq
+= freq
;
487 saved_reg
= new_saved_hard_reg (regno
, freq
);
489 /* Look through all live pseudos, mark their hard registers. */
490 EXECUTE_IF_SET_IN_REG_SET
491 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
493 int r
= reg_renumber
[regno
];
499 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
500 for (; r
< bound
; r
++)
501 if (TEST_HARD_REG_BIT (used_regs
, r
))
503 if (hard_reg_map
[r
] != NULL
)
504 hard_reg_map
[r
]->call_freq
+= freq
;
506 saved_reg
= new_saved_hard_reg (r
, freq
);
507 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
511 /* Find saved hard register conflicts. */
512 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
513 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
514 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
516 call_saved_regs_num
= 0;
520 || find_reg_note (insn
, REG_NORETURN
, NULL
))
522 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
523 &chain
->live_throughout
);
524 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
526 /* Record all registers set in this call insn. These don't
527 need to be saved. N.B. the call insn might set a subreg
528 of a multi-hard-reg pseudo; then the pseudo is considered
529 live during the call, but the subreg that is set
531 CLEAR_HARD_REG_SET (this_insn_sets
);
532 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
533 /* Sibcalls are considered to set the return value,
534 compare df-scan.c:df_get_call_refs. */
535 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
536 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
538 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
539 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
540 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
541 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
542 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
544 gcc_assert (hard_reg_map
[regno
] != NULL
);
545 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
547 /* Look through all live pseudos, mark their hard registers. */
548 EXECUTE_IF_SET_IN_REG_SET
549 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
551 int r
= reg_renumber
[regno
];
557 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
558 for (; r
< bound
; r
++)
559 if (TEST_HARD_REG_BIT (used_regs
, r
))
560 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
562 for (i
= 0; i
< call_saved_regs_num
; i
++)
564 saved_reg
= call_saved_regs
[i
];
565 for (j
= 0; j
< call_saved_regs_num
; j
++)
568 saved_reg2
= call_saved_regs
[j
];
569 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
571 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
577 /* Sort saved hard regs. */
578 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
579 saved_hard_reg_compare_func
);
580 /* Initiate slots available from the previous reload
582 prev_save_slots_num
= save_slots_num
;
583 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
585 /* Allocate stack slots for the saved hard registers. */
586 for (i
= 0; i
< saved_regs_num
; i
++)
588 saved_reg
= all_saved_regs
[i
];
589 regno
= saved_reg
->hard_regno
;
590 for (j
= 0; j
< i
; j
++)
592 saved_reg2
= all_saved_regs
[j
];
593 if (! saved_reg2
->first_p
)
595 slot
= saved_reg2
->slot
;
596 for (k
= j
; k
>= 0; k
= next_k
)
598 saved_reg3
= all_saved_regs
[k
];
599 next_k
= saved_reg3
->next
;
600 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
605 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
606 <= GET_MODE_SIZE (regno_save_mode
607 [saved_reg2
->hard_regno
][1])))
611 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
612 regno_save_mem
[regno
][1] = saved_reg
->slot
;
613 saved_reg
->next
= saved_reg2
->next
;
614 saved_reg2
->next
= i
;
615 if (dump_file
!= NULL
)
616 fprintf (dump_file
, "%d uses slot of %d\n",
617 regno
, saved_reg2
->hard_regno
);
623 saved_reg
->first_p
= TRUE
;
624 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
626 slot
= prev_save_slots
[j
];
627 if (slot
== NULL_RTX
)
629 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
630 <= GET_MODE_SIZE (GET_MODE (slot
))
631 && best_slot_num
< 0)
633 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
636 if (best_slot_num
>= 0)
638 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
642 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
643 if (dump_file
!= NULL
)
645 "%d uses a slot from prev iteration\n", regno
);
646 prev_save_slots
[best_slot_num
] = NULL_RTX
;
647 if (best_slot_num
+ 1 == prev_save_slots_num
)
648 prev_save_slots_num
--;
653 = assign_stack_local_1
654 (regno_save_mode
[regno
][1],
655 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0, true);
656 if (dump_file
!= NULL
)
657 fprintf (dump_file
, "%d uses a new slot\n", regno
);
659 regno_save_mem
[regno
][1] = saved_reg
->slot
;
660 save_slots
[save_slots_num
++] = saved_reg
->slot
;
663 free (saved_reg_conflicts
);
664 finish_saved_hard_regs ();
668 /* Now run through all the call-used hard-registers and allocate
669 space for them in the caller-save area. Try to allocate space
670 in a manner which allows multi-register saves/restores to be done. */
672 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
673 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
677 /* If no mode exists for this size, try another. Also break out
678 if we have already saved this hard register. */
679 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
682 /* See if any register in this group has been saved. */
683 for (k
= 0; k
< j
; k
++)
684 if (regno_save_mem
[i
+ k
][1])
692 for (k
= 0; k
< j
; k
++)
693 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
701 /* We have found an acceptable mode to store in. Since
702 hard register is always saved in the widest mode
703 available, the mode may be wider than necessary, it is
704 OK to reduce the alignment of spill space. We will
705 verify that it is equal to or greater than required
706 when we restore and save the hard register in
707 insert_restore and insert_save. */
709 = assign_stack_local_1 (regno_save_mode
[i
][j
],
710 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
713 /* Setup single word save area just in case... */
714 for (k
= 0; k
< j
; k
++)
715 /* This should not depend on WORDS_BIG_ENDIAN.
716 The order of words in regs is the same as in memory. */
717 regno_save_mem
[i
+ k
][1]
718 = adjust_address_nv (regno_save_mem
[i
][j
],
719 regno_save_mode
[i
+ k
][1],
724 /* Now loop again and set the alias set of any save areas we made to
725 the alias set used to represent frame objects. */
726 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
727 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
728 if (regno_save_mem
[i
][j
] != 0)
729 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
734 /* Find the places where hard regs are live across calls and save them. */
737 save_call_clobbered_regs (void)
739 struct insn_chain
*chain
, *next
, *last
= NULL
;
740 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
742 /* Computed in mark_set_regs, holds all registers set by the current
744 HARD_REG_SET this_insn_sets
;
746 CLEAR_HARD_REG_SET (hard_regs_saved
);
749 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
751 rtx insn
= chain
->insn
;
752 enum rtx_code code
= GET_CODE (insn
);
756 gcc_assert (!chain
->is_caller_save_insn
);
758 if (NONDEBUG_INSN_P (insn
))
760 /* If some registers have been saved, see if INSN references
761 any of them. We must restore them before the insn if so. */
767 if (code
== JUMP_INSN
)
768 /* Restore all registers if this is a JUMP_INSN. */
769 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
772 CLEAR_HARD_REG_SET (referenced_regs
);
773 mark_referenced_regs (&PATTERN (insn
),
774 mark_reg_as_referenced
, NULL
);
775 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
778 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
779 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
780 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
, save_mode
);
783 if (code
== CALL_INSN
784 && ! SIBLING_CALL_P (insn
)
785 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
788 HARD_REG_SET hard_regs_to_save
;
789 reg_set_iterator rsi
;
791 /* Use the register life information in CHAIN to compute which
792 regs are live during the call. */
793 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
794 &chain
->live_throughout
);
795 /* Save hard registers always in the widest mode available. */
796 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
797 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
798 save_mode
[regno
] = regno_save_mode
[regno
][1];
800 save_mode
[regno
] = VOIDmode
;
802 /* Look through all live pseudos, mark their hard registers
803 and choose proper mode for saving. */
804 EXECUTE_IF_SET_IN_REG_SET
805 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
807 int r
= reg_renumber
[regno
];
809 enum machine_mode mode
;
813 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
814 mode
= HARD_REGNO_CALLER_SAVE_MODE
815 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
816 if (GET_MODE_BITSIZE (mode
)
817 > GET_MODE_BITSIZE (save_mode
[r
]))
820 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
823 /* Record all registers set in this call insn. These don't need
824 to be saved. N.B. the call insn might set a subreg of a
825 multi-hard-reg pseudo; then the pseudo is considered live
826 during the call, but the subreg that is set isn't. */
827 CLEAR_HARD_REG_SET (this_insn_sets
);
828 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
830 /* Compute which hard regs must be saved before this call. */
831 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
832 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
833 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
834 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
836 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
837 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
838 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
840 /* Must recompute n_regs_saved. */
842 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
843 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
848 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
849 mark_referenced_regs (&PATTERN (insn
),
850 replace_reg_with_saved_mem
,
853 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
856 /* At the end of the basic block, we must restore any registers that
857 remain saved. If the last insn in the block is a JUMP_INSN, put
858 the restore before the insn, otherwise, put it after the insn. */
860 if (DEBUG_INSN_P (insn
) && last
&& last
->block
== chain
->block
)
863 basic_block bb
= BLOCK_FOR_INSN (insn
);
865 /* When adding hard reg restores after a DEBUG_INSN, move
866 all notes between last real insn and this DEBUG_INSN after
867 the DEBUG_INSN, otherwise we could get code
868 -g/-g0 differences. */
869 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
871 prev
= PREV_INSN (ins
);
874 NEXT_INSN (prev
) = NEXT_INSN (ins
);
875 PREV_INSN (NEXT_INSN (ins
)) = prev
;
876 PREV_INSN (ins
) = insn
;
877 NEXT_INSN (ins
) = NEXT_INSN (insn
);
878 NEXT_INSN (insn
) = ins
;
880 PREV_INSN (NEXT_INSN (ins
)) = ins
;
881 if (BB_END (bb
) == insn
)
885 gcc_assert (DEBUG_INSN_P (ins
));
891 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
892 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
893 regno
+= insert_restore (chain
, JUMP_P (insn
),
894 regno
, MOVE_MAX_WORDS
, save_mode
);
899 /* Here from note_stores, or directly from save_call_clobbered_regs, when
900 an insn stores a value in a register.
901 Set the proper bit or bits in this_insn_sets. All pseudos that have
902 been assigned hard regs have had their register number changed already,
903 so we can ignore pseudos. */
905 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
907 int regno
, endregno
, i
;
908 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
910 if (GET_CODE (reg
) == SUBREG
)
912 rtx inner
= SUBREG_REG (reg
);
913 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
915 regno
= subreg_regno (reg
);
916 endregno
= regno
+ subreg_nregs (reg
);
919 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
922 endregno
= END_HARD_REGNO (reg
);
927 for (i
= regno
; i
< endregno
; i
++)
928 SET_HARD_REG_BIT (*this_insn_sets
, i
);
931 /* Here from note_stores when an insn stores a value in a register.
932 Set the proper bit or bits in the passed regset. All pseudos that have
933 been assigned hard regs have had their register number changed already,
934 so we can ignore pseudos. */
936 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
938 int regno
, endregno
, i
;
939 enum machine_mode mode
= GET_MODE (reg
);
942 if (GET_CODE (setter
) == CLOBBER
)
945 if (GET_CODE (reg
) == SUBREG
946 && REG_P (SUBREG_REG (reg
))
947 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
949 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
950 GET_MODE (SUBREG_REG (reg
)),
953 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
954 endregno
= regno
+ subreg_nregs (reg
);
958 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
961 regno
= REGNO (reg
) + offset
;
962 endregno
= end_hard_regno (mode
, regno
);
965 for (i
= regno
; i
< endregno
; i
++)
966 SET_REGNO_REG_SET ((regset
) data
, i
);
969 /* Walk X and record all referenced registers in REFERENCED_REGS. */
971 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
973 enum rtx_code code
= GET_CODE (*loc
);
978 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
979 if (code
== SET
|| code
== CLOBBER
)
981 loc
= &SET_DEST (*loc
);
982 code
= GET_CODE (*loc
);
983 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
984 || code
== PC
|| code
== CC0
985 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
986 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
987 /* If we're setting only part of a multi-word register,
988 we shall mark it as referenced, because the words
989 that are not being set should be restored. */
990 && ((GET_MODE_SIZE (GET_MODE (*loc
))
991 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
))))
992 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
)))
993 <= UNITS_PER_WORD
))))
996 if (code
== MEM
|| code
== SUBREG
)
998 loc
= &XEXP (*loc
, 0);
999 code
= GET_CODE (*loc
);
1004 int regno
= REGNO (*loc
);
1005 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1006 : reg_renumber
[regno
]);
1009 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1011 /* ??? Will we ever end up with an equiv expression in a debug
1012 insn, that would have required restoring a reg, or will
1013 reload take care of it for us? */
1015 /* If this is a pseudo that did not get a hard register, scan its
1016 memory location, since it might involve the use of another
1017 register, which might be saved. */
1018 else if (reg_equiv_mem
[regno
] != 0)
1019 mark_referenced_regs (&XEXP (reg_equiv_mem
[regno
], 0), mark
, arg
);
1020 else if (reg_equiv_address
[regno
] != 0)
1021 mark_referenced_regs (®_equiv_address
[regno
], mark
, arg
);
1025 fmt
= GET_RTX_FORMAT (code
);
1026 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1029 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1030 else if (fmt
[i
] == 'E')
1031 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1032 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1036 /* Parameter function for mark_referenced_regs() that adds registers
1037 present in the insn and in equivalent mems and addresses to
1041 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1042 enum machine_mode mode
,
1044 void *arg ATTRIBUTE_UNUSED
)
1046 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1049 /* Parameter function for mark_referenced_regs() that replaces
1050 registers referenced in a debug_insn that would have been restored,
1051 should it be a non-debug_insn, with their save locations. */
1054 replace_reg_with_saved_mem (rtx
*loc
,
1055 enum machine_mode mode
,
1059 unsigned int i
, nregs
= hard_regno_nregs
[regno
][mode
];
1061 enum machine_mode
*save_mode
= (enum machine_mode
*)arg
;
1063 for (i
= 0; i
< nregs
; i
++)
1064 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1067 /* If none of the registers in the range would need restoring, we're
1073 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1077 && regno_save_mem
[regno
][nregs
])
1079 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1081 if (nregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
1082 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1084 if (GET_MODE (mem
) != mode
)
1086 /* This is gen_lowpart_if_possible(), but without validating
1087 the newly-formed address. */
1090 if (WORDS_BIG_ENDIAN
)
1091 offset
= (MAX (GET_MODE_SIZE (GET_MODE (mem
)), UNITS_PER_WORD
)
1092 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1093 if (BYTES_BIG_ENDIAN
)
1094 /* Adjust the address so that the address-after-the-data is
1096 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1097 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (mem
))));
1099 mem
= adjust_address_nv (mem
, mode
, offset
);
1104 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1105 for (i
= 0; i
< nregs
; i
++)
1106 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1108 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1109 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1113 gcc_assert (save_mode
[regno
] != VOIDmode
);
1114 XVECEXP (mem
, 0, i
) = gen_rtx_REG (save_mode
[regno
],
1119 gcc_assert (GET_MODE (mem
) == mode
);
1124 /* Insert a sequence of insns to restore. Place these insns in front of
1125 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1126 the maximum number of registers which should be restored during this call.
1127 It should never be less than 1 since we only work with entire registers.
1129 Note that we have verified in init_caller_save that we can do this
1130 with a simple SET, so use it. Set INSN_CODE to what we save there
1131 since the address might not be valid so the insn might not be recognized.
1132 These insns will be reloaded and have register elimination done by
1133 find_reload, so we need not worry about that here.
1135 Return the extra number of registers saved. */
1138 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1139 int maxrestore
, enum machine_mode
*save_mode
)
1144 unsigned int numregs
= 0;
1145 struct insn_chain
*new_chain
;
1148 /* A common failure mode if register status is not correct in the
1149 RTL is for this routine to be called with a REGNO we didn't
1150 expect to save. That will cause us to write an insn with a (nil)
1151 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1152 later, check for this common case here instead. This will remove
1153 one step in debugging such problems. */
1154 gcc_assert (regno_save_mem
[regno
][1]);
1156 /* Get the pattern to emit and update our status.
1158 See if we can restore `maxrestore' registers at once. Work
1159 backwards to the single register case. */
1160 for (i
= maxrestore
; i
> 0; i
--)
1165 if (regno_save_mem
[regno
][i
] == 0)
1168 for (j
= 0; j
< i
; j
++)
1169 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1174 /* Must do this one restore at a time. */
1182 mem
= regno_save_mem
[regno
][numregs
];
1183 if (save_mode
[regno
] != VOIDmode
1184 && save_mode
[regno
] != GET_MODE (mem
)
1185 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1186 /* Check that insn to restore REGNO in save_mode[regno] is
1188 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1189 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1191 mem
= copy_rtx (mem
);
1193 /* Verify that the alignment of spill space is equal to or greater
1195 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1196 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1198 pat
= gen_rtx_SET (VOIDmode
,
1199 gen_rtx_REG (GET_MODE (mem
),
1201 code
= reg_restore_code (regno
, GET_MODE (mem
));
1202 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1204 /* Clear status for all registers we restored. */
1205 for (k
= 0; k
< i
; k
++)
1207 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1208 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1212 /* Tell our callers how many extra registers we saved/restored. */
1216 /* Like insert_restore above, but save registers instead. */
1219 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1220 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
1226 unsigned int numregs
= 0;
1227 struct insn_chain
*new_chain
;
1230 /* A common failure mode if register status is not correct in the
1231 RTL is for this routine to be called with a REGNO we didn't
1232 expect to save. That will cause us to write an insn with a (nil)
1233 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1234 later, check for this common case here. This will remove one
1235 step in debugging such problems. */
1236 gcc_assert (regno_save_mem
[regno
][1]);
1238 /* Get the pattern to emit and update our status.
1240 See if we can save several registers with a single instruction.
1241 Work backwards to the single register case. */
1242 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1246 if (regno_save_mem
[regno
][i
] == 0)
1249 for (j
= 0; j
< i
; j
++)
1250 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1255 /* Must do this one save at a time. */
1263 mem
= regno_save_mem
[regno
][numregs
];
1264 if (save_mode
[regno
] != VOIDmode
1265 && save_mode
[regno
] != GET_MODE (mem
)
1266 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1267 /* Check that insn to save REGNO in save_mode[regno] is
1269 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1270 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1272 mem
= copy_rtx (mem
);
1274 /* Verify that the alignment of spill space is equal to or greater
1276 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1277 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1279 pat
= gen_rtx_SET (VOIDmode
, mem
,
1280 gen_rtx_REG (GET_MODE (mem
),
1282 code
= reg_save_code (regno
, GET_MODE (mem
));
1283 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1285 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1286 for (k
= 0; k
< numregs
; k
++)
1288 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1289 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1293 /* Tell our callers how many extra registers we saved/restored. */
1297 /* A for_each_rtx callback used by add_used_regs. Add the hard-register
1298 equivalent of each REG to regset DATA. */
1301 add_used_regs_1 (rtx
*loc
, void *data
)
1308 live
= (regset
) data
;
1312 if (!HARD_REGISTER_NUM_P (regno
))
1313 regno
= reg_renumber
[regno
];
1315 for (i
= hard_regno_nregs
[regno
][GET_MODE (x
)] - 1; i
>= 0; i
--)
1316 SET_REGNO_REG_SET (live
, regno
+ i
);
1321 /* A note_uses callback used by insert_one_insn. Add the hard-register
1322 equivalent of each REG to regset DATA. */
1325 add_used_regs (rtx
*loc
, void *data
)
1327 for_each_rtx (loc
, add_used_regs_1
, data
);
1330 /* Emit a new caller-save insn and set the code. */
1331 static struct insn_chain
*
1332 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1334 rtx insn
= chain
->insn
;
1335 struct insn_chain
*new_chain
;
1338 /* If INSN references CC0, put our insns in front of the insn that sets
1339 CC0. This is always safe, since the only way we could be passed an
1340 insn that references CC0 is for a restore, and doing a restore earlier
1341 isn't a problem. We do, however, assume here that CALL_INSNs don't
1342 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1344 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1346 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1347 chain
= chain
->prev
, insn
= chain
->insn
;
1350 new_chain
= new_insn_chain ();
1355 new_chain
->prev
= chain
->prev
;
1356 if (new_chain
->prev
!= 0)
1357 new_chain
->prev
->next
= new_chain
;
1359 reload_insn_chain
= new_chain
;
1361 chain
->prev
= new_chain
;
1362 new_chain
->next
= chain
;
1363 new_chain
->insn
= emit_insn_before (pat
, insn
);
1364 /* ??? It would be nice if we could exclude the already / still saved
1365 registers from the live sets. */
1366 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1367 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1368 &new_chain
->live_throughout
);
1369 /* If CHAIN->INSN is a call, then the registers which contain
1370 the arguments to the function are live in the new insn. */
1371 if (CALL_P (chain
->insn
))
1372 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1374 link
= XEXP (link
, 1))
1375 note_uses (&XEXP (link
, 0), add_used_regs
,
1376 &new_chain
->live_throughout
);
1378 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1379 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
1380 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1384 new_chain
->next
= chain
->next
;
1385 if (new_chain
->next
!= 0)
1386 new_chain
->next
->prev
= new_chain
;
1387 chain
->next
= new_chain
;
1388 new_chain
->prev
= chain
;
1389 new_chain
->insn
= emit_insn_after (pat
, insn
);
1390 /* ??? It would be nice if we could exclude the already / still saved
1391 registers from the live sets, and observe REG_UNUSED notes. */
1392 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1393 /* Registers that are set in CHAIN->INSN live in the new insn.
1394 (Unless there is a REG_UNUSED note for them, but we don't
1395 look for them here.) */
1396 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1397 &new_chain
->live_throughout
);
1398 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1399 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
1400 BB_END (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1402 new_chain
->block
= chain
->block
;
1403 new_chain
->is_caller_save_insn
= 1;
1405 INSN_CODE (new_chain
->insn
) = code
;
1408 #include "gt-caller-save.h"