1 ;; Hardware Transactional Memory (HTM) patterns.
2 ;; Copyright (C) 2013-2014 Free Software Foundation, Inc.
3 ;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
30 ;; UNSPEC_VOLATILE usage
33 (define_c_enum "unspecv"
50 (define_expand "tabort"
52 (unspec_volatile:CC [(match_operand:SI 1 "int_reg_operand" "")]
57 (set (match_operand:SI 0 "int_reg_operand" "")
58 (minus:SI (const_int 1) (match_dup 3)))]
61 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
62 operands[3] = gen_reg_rtx (SImode);
65 (define_insn "*tabort_internal"
66 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
67 (unspec_volatile:CC [(match_operand:SI 0 "int_reg_operand" "r")]
71 [(set_attr "type" "htm")
72 (set_attr "length" "4")])
74 (define_expand "tabortdc"
76 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
77 (match_operand:SI 2 "gpc_reg_operand" "r")
78 (match_operand:SI 3 "gpc_reg_operand" "r")]
79 UNSPECV_HTM_TABORTDC))
83 (set (match_operand:SI 0 "int_reg_operand" "")
84 (minus:SI (const_int 1) (match_dup 5)))]
87 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
88 operands[5] = gen_reg_rtx (SImode);
91 (define_insn "*tabortdc_internal"
92 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
93 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
94 (match_operand:SI 1 "gpc_reg_operand" "r")
95 (match_operand:SI 2 "gpc_reg_operand" "r")]
96 UNSPECV_HTM_TABORTDC))]
99 [(set_attr "type" "htm")
100 (set_attr "length" "4")])
102 (define_expand "tabortdci"
104 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
105 (match_operand:SI 2 "gpc_reg_operand" "r")
106 (match_operand 3 "s5bit_cint_operand" "n")]
107 UNSPECV_HTM_TABORTDCI))
111 (set (match_operand:SI 0 "int_reg_operand" "")
112 (minus:SI (const_int 1) (match_dup 5)))]
115 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
116 operands[5] = gen_reg_rtx (SImode);
119 (define_insn "*tabortdci_internal"
120 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
121 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
122 (match_operand:SI 1 "gpc_reg_operand" "r")
123 (match_operand 2 "s5bit_cint_operand" "n")]
124 UNSPECV_HTM_TABORTDCI))]
126 "tabortdci. %0,%1,%2"
127 [(set_attr "type" "htm")
128 (set_attr "length" "4")])
130 (define_expand "tabortwc"
132 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
133 (match_operand:SI 2 "gpc_reg_operand" "r")
134 (match_operand:SI 3 "gpc_reg_operand" "r")]
135 UNSPECV_HTM_TABORTWC))
139 (set (match_operand:SI 0 "int_reg_operand" "")
140 (minus:SI (const_int 1) (match_dup 5)))]
143 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
144 operands[5] = gen_reg_rtx (SImode);
147 (define_insn "*tabortwc_internal"
148 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
149 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
150 (match_operand:SI 1 "gpc_reg_operand" "r")
151 (match_operand:SI 2 "gpc_reg_operand" "r")]
152 UNSPECV_HTM_TABORTWC))]
155 [(set_attr "type" "htm")
156 (set_attr "length" "4")])
158 (define_expand "tabortwci"
160 (unspec_volatile:CC [(match_operand 1 "u5bit_cint_operand" "n")
161 (match_operand:SI 2 "gpc_reg_operand" "r")
162 (match_operand 3 "s5bit_cint_operand" "n")]
163 UNSPECV_HTM_TABORTWCI))
167 (set (match_operand:SI 0 "int_reg_operand" "")
168 (minus:SI (const_int 1) (match_dup 5)))]
171 operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
172 operands[5] = gen_reg_rtx (SImode);
175 (define_expand "ttest"
177 (unspec_volatile:CC [(const_int 0)
180 UNSPECV_HTM_TABORTWCI))
181 (set (subreg:CC (match_dup 2) 0) (match_dup 1))
182 (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 24)))
183 (parallel [(set (match_operand:SI 0 "int_reg_operand" "")
184 (and:SI (match_dup 3) (const_int 15)))
185 (clobber (scratch:CC))])]
188 operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
189 operands[2] = gen_reg_rtx (SImode);
190 operands[3] = gen_reg_rtx (SImode);
193 (define_insn "*tabortwci_internal"
194 [(set (match_operand:CC 3 "cc_reg_operand" "=x")
195 (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
196 (match_operand:SI 1 "gpc_reg_operand" "r")
197 (match_operand 2 "s5bit_cint_operand" "n")]
198 UNSPECV_HTM_TABORTWCI))]
200 "tabortwci. %0,%1,%2"
201 [(set_attr "type" "htm")
202 (set_attr "length" "4")])
204 (define_expand "tbegin"
206 (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
211 (set (match_operand:SI 0 "int_reg_operand" "")
212 (minus:SI (const_int 1) (match_dup 3)))]
215 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
216 operands[3] = gen_reg_rtx (SImode);
219 (define_insn "*tbegin_internal"
220 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
221 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
222 UNSPECV_HTM_TBEGIN))]
225 [(set_attr "type" "htm")
226 (set_attr "length" "4")])
228 (define_expand "tcheck"
230 (unspec_volatile:CC [(match_operand 1 "u3bit_cint_operand" "n")]
235 (set (match_operand:SI 0 "int_reg_operand" "")
236 (minus:SI (const_int 1) (match_dup 3)))]
239 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
240 operands[3] = gen_reg_rtx (SImode);
243 (define_insn "*tcheck_internal"
244 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
245 (unspec_volatile:CC [(match_operand 0 "u3bit_cint_operand" "n")]
246 UNSPECV_HTM_TCHECK))]
249 [(set_attr "type" "htm")
250 (set_attr "length" "4")])
252 (define_expand "tend"
254 (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
259 (set (match_operand:SI 0 "int_reg_operand" "")
260 (minus:SI (const_int 1) (match_dup 3)))]
263 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
264 operands[3] = gen_reg_rtx (SImode);
267 (define_insn "*tend_internal"
268 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
269 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
273 [(set_attr "type" "htm")
274 (set_attr "length" "4")])
276 (define_expand "trechkpt"
278 (unspec_volatile:CC [(const_int 0)]
279 UNSPECV_HTM_TRECHKPT))
283 (set (match_operand:SI 0 "int_reg_operand" "")
284 (minus:SI (const_int 1) (match_dup 2)))]
287 operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
288 operands[2] = gen_reg_rtx (SImode);
291 (define_insn "*trechkpt_internal"
292 [(set (match_operand:CC 0 "cc_reg_operand" "=x")
293 (unspec_volatile:CC [(const_int 0)]
294 UNSPECV_HTM_TRECHKPT))]
297 [(set_attr "type" "htm")
298 (set_attr "length" "4")])
300 (define_expand "treclaim"
302 (unspec_volatile:CC [(match_operand:SI 1 "gpc_reg_operand" "r")]
303 UNSPECV_HTM_TRECLAIM))
307 (set (match_operand:SI 0 "int_reg_operand" "")
308 (minus:SI (const_int 1) (match_dup 3)))]
311 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
312 operands[3] = gen_reg_rtx (SImode);
315 (define_insn "*treclaim_internal"
316 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
317 (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
318 UNSPECV_HTM_TRECLAIM))]
321 [(set_attr "type" "htm")
322 (set_attr "length" "4")])
326 (unspec_volatile:CC [(match_operand 1 "const_0_to_1_operand" "n")]
331 (set (match_operand:SI 0 "int_reg_operand" "")
332 (minus:SI (const_int 1) (match_dup 3)))]
335 operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
336 operands[3] = gen_reg_rtx (SImode);
339 (define_insn "*tsr_internal"
340 [(set (match_operand:CC 1 "cc_reg_operand" "=x")
341 (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
345 [(set_attr "type" "htm")
346 (set_attr "length" "4")])
348 (define_insn "htm_mfspr_<mode>"
349 [(set (match_operand:P 0 "gpc_reg_operand" "=r")
350 (unspec_volatile:P [(match_operand 1 "u10bit_cint_operand" "n")
351 (match_operand:P 2 "htm_spr_reg_operand" "")]
355 [(set_attr "type" "htm")
356 (set_attr "length" "4")])
358 (define_insn "htm_mtspr_<mode>"
359 [(set (match_operand:P 2 "htm_spr_reg_operand" "")
360 (unspec_volatile:P [(match_operand:P 0 "gpc_reg_operand" "r")
361 (match_operand 1 "u10bit_cint_operand" "n")]
365 [(set_attr "type" "htm")
366 (set_attr "length" "4")])