* g++.dg/cpp/ucn-1.C: Fix typo.
[official-gcc.git] / gcc / reginfo.c
blob9f16cee36d72f96f1fbeaf2e7de4b61aef3d7a15
1 /* Compute different info about registers.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* This file contains regscan pass of the compiler and passes for
22 dealing with info about modes of pseudo-registers inside
23 subregisters. It also defines some tables of information about the
24 hardware registers, function init_reg_sets to initialize the
25 tables, and other auxiliary functions to deal with info about
26 registers and their classes. */
28 #include "config.h"
29 #include "system.h"
30 #include "coretypes.h"
31 #include "backend.h"
32 #include "target.h"
33 #include "rtl.h"
34 #include "tree.h"
35 #include "df.h"
36 #include "tm_p.h"
37 #include "insn-config.h"
38 #include "regs.h"
39 #include "ira.h"
40 #include "recog.h"
41 #include "diagnostic-core.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "tree-pass.h"
46 /* Maximum register number used in this function, plus one. */
48 int max_regno;
50 /* Used to cache the results of simplifiable_subregs. SHAPE is the input
51 parameter and SIMPLIFIABLE_REGS is the result. */
52 struct simplifiable_subreg
54 simplifiable_subreg (const subreg_shape &);
56 subreg_shape shape;
57 HARD_REG_SET simplifiable_regs;
60 struct target_hard_regs default_target_hard_regs;
61 struct target_regs default_target_regs;
62 #if SWITCHABLE_TARGET
63 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
64 struct target_regs *this_target_regs = &default_target_regs;
65 #endif
67 /* Data for initializing fixed_regs. */
68 static const char initial_fixed_regs[] = FIXED_REGISTERS;
70 /* Data for initializing call_used_regs. */
71 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
73 #ifdef CALL_REALLY_USED_REGISTERS
74 /* Data for initializing call_really_used_regs. */
75 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
76 #endif
78 #ifdef CALL_REALLY_USED_REGISTERS
79 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
80 #else
81 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
82 #endif
84 /* Indexed by hard register number, contains 1 for registers
85 that are being used for global register decls.
86 These must be exempt from ordinary flow analysis
87 and are also considered fixed. */
88 char global_regs[FIRST_PSEUDO_REGISTER];
90 /* Declaration for the global register. */
91 tree global_regs_decl[FIRST_PSEUDO_REGISTER];
93 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
94 in dataflow more conveniently. */
95 regset regs_invalidated_by_call_regset;
97 /* Same information as FIXED_REG_SET but in regset form. */
98 regset fixed_reg_set_regset;
100 /* The bitmap_obstack is used to hold some static variables that
101 should not be reset after each function is compiled. */
102 static bitmap_obstack persistent_obstack;
104 /* Used to initialize reg_alloc_order. */
105 #ifdef REG_ALLOC_ORDER
106 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
107 #endif
109 /* The same information, but as an array of unsigned ints. We copy from
110 these unsigned ints to the table above. We do this so the tm.h files
111 do not have to be aware of the wordsize for machines with <= 64 regs.
112 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
113 #define N_REG_INTS \
114 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
116 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
117 = REG_CLASS_CONTENTS;
119 /* Array containing all of the register names. */
120 static const char *const initial_reg_names[] = REGISTER_NAMES;
122 /* Array containing all of the register class names. */
123 const char * reg_class_names[] = REG_CLASS_NAMES;
125 /* No more global register variables may be declared; true once
126 reginfo has been initialized. */
127 static int no_global_reg_vars = 0;
129 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
130 correspond to the hard registers, if any, set in that map. This
131 could be done far more efficiently by having all sorts of special-cases
132 with moving single words, but probably isn't worth the trouble. */
133 void
134 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
136 unsigned i;
137 bitmap_iterator bi;
139 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
141 if (i >= FIRST_PSEUDO_REGISTER)
142 return;
143 SET_HARD_REG_BIT (*to, i);
147 /* Function called only once per target_globals to initialize the
148 target_hard_regs structure. Once this is done, various switches
149 may override. */
150 void
151 init_reg_sets (void)
153 int i, j;
155 /* First copy the register information from the initial int form into
156 the regsets. */
158 for (i = 0; i < N_REG_CLASSES; i++)
160 CLEAR_HARD_REG_SET (reg_class_contents[i]);
162 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
163 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
164 if (int_reg_class_contents[i][j / 32]
165 & ((unsigned) 1 << (j % 32)))
166 SET_HARD_REG_BIT (reg_class_contents[i], j);
169 /* Sanity check: make sure the target macros FIXED_REGISTERS and
170 CALL_USED_REGISTERS had the right number of initializers. */
171 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
172 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
173 #ifdef CALL_REALLY_USED_REGISTERS
174 gcc_assert (sizeof call_really_used_regs
175 == sizeof initial_call_really_used_regs);
176 #endif
177 #ifdef REG_ALLOC_ORDER
178 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
179 #endif
180 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
182 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
183 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
184 #ifdef CALL_REALLY_USED_REGISTERS
185 memcpy (call_really_used_regs, initial_call_really_used_regs,
186 sizeof call_really_used_regs);
187 #endif
188 #ifdef REG_ALLOC_ORDER
189 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
190 #endif
191 memcpy (reg_names, initial_reg_names, sizeof reg_names);
193 SET_HARD_REG_SET (accessible_reg_set);
194 SET_HARD_REG_SET (operand_reg_set);
197 /* We need to save copies of some of the register information which
198 can be munged by command-line switches so we can restore it during
199 subsequent back-end reinitialization. */
200 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
201 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
202 #ifdef CALL_REALLY_USED_REGISTERS
203 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
204 #endif
205 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
206 static HARD_REG_SET saved_accessible_reg_set;
207 static HARD_REG_SET saved_operand_reg_set;
209 /* Save the register information. */
210 void
211 save_register_info (void)
213 /* Sanity check: make sure the target macros FIXED_REGISTERS and
214 CALL_USED_REGISTERS had the right number of initializers. */
215 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
216 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
217 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
218 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
220 /* Likewise for call_really_used_regs. */
221 #ifdef CALL_REALLY_USED_REGISTERS
222 gcc_assert (sizeof call_really_used_regs
223 == sizeof saved_call_really_used_regs);
224 memcpy (saved_call_really_used_regs, call_really_used_regs,
225 sizeof call_really_used_regs);
226 #endif
228 /* And similarly for reg_names. */
229 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
230 memcpy (saved_reg_names, reg_names, sizeof reg_names);
231 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
232 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
235 /* Restore the register information. */
236 static void
237 restore_register_info (void)
239 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
240 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
242 #ifdef CALL_REALLY_USED_REGISTERS
243 memcpy (call_really_used_regs, saved_call_really_used_regs,
244 sizeof call_really_used_regs);
245 #endif
247 memcpy (reg_names, saved_reg_names, sizeof reg_names);
248 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
249 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
252 /* After switches have been processed, which perhaps alter
253 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
254 static void
255 init_reg_sets_1 (void)
257 unsigned int i, j;
258 unsigned int /* machine_mode */ m;
260 restore_register_info ();
262 #ifdef REG_ALLOC_ORDER
263 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
264 inv_reg_alloc_order[reg_alloc_order[i]] = i;
265 #endif
267 /* Let the target tweak things if necessary. */
269 targetm.conditional_register_usage ();
271 /* Compute number of hard regs in each class. */
273 memset (reg_class_size, 0, sizeof reg_class_size);
274 for (i = 0; i < N_REG_CLASSES; i++)
276 bool any_nonfixed = false;
277 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
278 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
280 reg_class_size[i]++;
281 if (!fixed_regs[j])
282 any_nonfixed = true;
284 class_only_fixed_regs[i] = !any_nonfixed;
287 /* Initialize the table of subunions.
288 reg_class_subunion[I][J] gets the largest-numbered reg-class
289 that is contained in the union of classes I and J. */
291 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
292 for (i = 0; i < N_REG_CLASSES; i++)
294 for (j = 0; j < N_REG_CLASSES; j++)
296 HARD_REG_SET c;
297 int k;
299 COPY_HARD_REG_SET (c, reg_class_contents[i]);
300 IOR_HARD_REG_SET (c, reg_class_contents[j]);
301 for (k = 0; k < N_REG_CLASSES; k++)
302 if (hard_reg_set_subset_p (reg_class_contents[k], c)
303 && !hard_reg_set_subset_p (reg_class_contents[k],
304 reg_class_contents
305 [(int) reg_class_subunion[i][j]]))
306 reg_class_subunion[i][j] = (enum reg_class) k;
310 /* Initialize the table of superunions.
311 reg_class_superunion[I][J] gets the smallest-numbered reg-class
312 containing the union of classes I and J. */
314 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
315 for (i = 0; i < N_REG_CLASSES; i++)
317 for (j = 0; j < N_REG_CLASSES; j++)
319 HARD_REG_SET c;
320 int k;
322 COPY_HARD_REG_SET (c, reg_class_contents[i]);
323 IOR_HARD_REG_SET (c, reg_class_contents[j]);
324 for (k = 0; k < N_REG_CLASSES; k++)
325 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
326 break;
328 reg_class_superunion[i][j] = (enum reg_class) k;
332 /* Initialize the tables of subclasses and superclasses of each reg class.
333 First clear the whole table, then add the elements as they are found. */
335 for (i = 0; i < N_REG_CLASSES; i++)
337 for (j = 0; j < N_REG_CLASSES; j++)
338 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
341 for (i = 0; i < N_REG_CLASSES; i++)
343 if (i == (int) NO_REGS)
344 continue;
346 for (j = i + 1; j < N_REG_CLASSES; j++)
347 if (hard_reg_set_subset_p (reg_class_contents[i],
348 reg_class_contents[j]))
350 /* Reg class I is a subclass of J.
351 Add J to the table of superclasses of I. */
352 enum reg_class *p;
354 /* Add I to the table of superclasses of J. */
355 p = &reg_class_subclasses[j][0];
356 while (*p != LIM_REG_CLASSES) p++;
357 *p = (enum reg_class) i;
361 /* Initialize "constant" tables. */
363 CLEAR_HARD_REG_SET (fixed_reg_set);
364 CLEAR_HARD_REG_SET (call_used_reg_set);
365 CLEAR_HARD_REG_SET (call_fixed_reg_set);
366 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
367 if (!regs_invalidated_by_call_regset)
369 bitmap_obstack_initialize (&persistent_obstack);
370 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
372 else
373 CLEAR_REG_SET (regs_invalidated_by_call_regset);
374 if (!fixed_reg_set_regset)
375 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
376 else
377 CLEAR_REG_SET (fixed_reg_set_regset);
379 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
380 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
382 /* As a special exception, registers whose class is NO_REGS are
383 not accepted by `register_operand'. The reason for this change
384 is to allow the representation of special architecture artifacts
385 (such as a condition code register) without extending the rtl
386 definitions. Since registers of class NO_REGS cannot be used
387 as registers in any case where register classes are examined,
388 it is better to apply this exception in a target-independent way. */
389 if (REGNO_REG_CLASS (i) == NO_REGS)
390 CLEAR_HARD_REG_BIT (operand_reg_set, i);
392 /* If a register is too limited to be treated as a register operand,
393 then it should never be allocated to a pseudo. */
394 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
396 fixed_regs[i] = 1;
397 call_used_regs[i] = 1;
400 /* call_used_regs must include fixed_regs. */
401 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
402 #ifdef CALL_REALLY_USED_REGISTERS
403 /* call_used_regs must include call_really_used_regs. */
404 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
405 #endif
407 if (fixed_regs[i])
409 SET_HARD_REG_BIT (fixed_reg_set, i);
410 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
413 if (call_used_regs[i])
414 SET_HARD_REG_BIT (call_used_reg_set, i);
416 /* There are a couple of fixed registers that we know are safe to
417 exclude from being clobbered by calls:
419 The frame pointer is always preserved across calls. The arg
420 pointer is if it is fixed. The stack pointer usually is,
421 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
422 CLOBBER will be present. If we are generating PIC code, the
423 PIC offset table register is preserved across calls, though the
424 target can override that. */
426 if (i == STACK_POINTER_REGNUM)
428 else if (global_regs[i])
430 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
431 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
433 else if (i == FRAME_POINTER_REGNUM)
435 else if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
436 && i == HARD_FRAME_POINTER_REGNUM)
438 else if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
439 && i == ARG_POINTER_REGNUM && fixed_regs[i])
441 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
442 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
444 else if (CALL_REALLY_USED_REGNO_P (i))
446 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
447 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
451 COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set);
453 /* Preserve global registers if called more than once. */
454 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
456 if (global_regs[i])
458 fixed_regs[i] = call_used_regs[i] = 1;
459 SET_HARD_REG_BIT (fixed_reg_set, i);
460 SET_HARD_REG_BIT (call_used_reg_set, i);
461 SET_HARD_REG_BIT (call_fixed_reg_set, i);
465 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
466 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
467 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
469 HARD_REG_SET ok_regs;
470 CLEAR_HARD_REG_SET (ok_regs);
471 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
472 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (machine_mode) m))
473 SET_HARD_REG_BIT (ok_regs, j);
475 for (i = 0; i < N_REG_CLASSES; i++)
476 if ((targetm.class_max_nregs ((reg_class_t) i, (machine_mode) m)
477 <= reg_class_size[i])
478 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
480 contains_reg_of_mode [i][m] = 1;
481 have_regs_of_mode [m] = 1;
486 /* Compute the table of register modes.
487 These values are used to record death information for individual registers
488 (as opposed to a multi-register mode).
489 This function might be invoked more than once, if the target has support
490 for changing register usage conventions on a per-function basis.
492 void
493 init_reg_modes_target (void)
495 int i, j;
497 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
498 for (j = 0; j < MAX_MACHINE_MODE; j++)
499 hard_regno_nregs[i][j] = HARD_REGNO_NREGS (i, (machine_mode)j);
501 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
503 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
505 /* If we couldn't find a valid mode, just use the previous mode
506 if it is suitable, otherwise fall back on word_mode. */
507 if (reg_raw_mode[i] == VOIDmode)
509 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
510 reg_raw_mode[i] = reg_raw_mode[i - 1];
511 else
512 reg_raw_mode[i] = word_mode;
517 /* Finish initializing the register sets and initialize the register modes.
518 This function might be invoked more than once, if the target has support
519 for changing register usage conventions on a per-function basis.
521 void
522 init_regs (void)
524 /* This finishes what was started by init_reg_sets, but couldn't be done
525 until after register usage was specified. */
526 init_reg_sets_1 ();
529 /* The same as previous function plus initializing IRA. */
530 void
531 reinit_regs (void)
533 init_regs ();
534 /* caller_save needs to be re-initialized. */
535 caller_save_initialized_p = false;
536 if (this_target_rtl->target_specific_initialized)
538 ira_init ();
539 recog_init ();
543 /* Initialize some fake stack-frame MEM references for use in
544 memory_move_secondary_cost. */
545 void
546 init_fake_stack_mems (void)
548 int i;
550 for (i = 0; i < MAX_MACHINE_MODE; i++)
551 top_of_stack[i] = gen_rtx_MEM ((machine_mode) i, stack_pointer_rtx);
555 /* Compute cost of moving data from a register of class FROM to one of
556 TO, using MODE. */
559 register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to)
561 return targetm.register_move_cost (mode, from, to);
564 /* Compute cost of moving registers to/from memory. */
567 memory_move_cost (machine_mode mode, reg_class_t rclass, bool in)
569 return targetm.memory_move_cost (mode, rclass, in);
572 /* Compute extra cost of moving registers to/from memory due to reloads.
573 Only needed if secondary reloads are required for memory moves. */
575 memory_move_secondary_cost (machine_mode mode, reg_class_t rclass,
576 bool in)
578 reg_class_t altclass;
579 int partial_cost = 0;
580 /* We need a memory reference to feed to SECONDARY... macros. */
581 /* mem may be unused even if the SECONDARY_ macros are defined. */
582 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
584 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
586 if (altclass == NO_REGS)
587 return 0;
589 if (in)
590 partial_cost = register_move_cost (mode, altclass, rclass);
591 else
592 partial_cost = register_move_cost (mode, rclass, altclass);
594 if (rclass == altclass)
595 /* This isn't simply a copy-to-temporary situation. Can't guess
596 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
597 calling here in that case.
599 I'm tempted to put in an assert here, but returning this will
600 probably only give poor estimates, which is what we would've
601 had before this code anyways. */
602 return partial_cost;
604 /* Check if the secondary reload register will also need a
605 secondary reload. */
606 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
609 /* Return a machine mode that is legitimate for hard reg REGNO and large
610 enough to save nregs. If we can't find one, return VOIDmode.
611 If CALL_SAVED is true, only consider modes that are call saved. */
612 machine_mode
613 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
614 unsigned int nregs, bool call_saved)
616 unsigned int /* machine_mode */ m;
617 machine_mode found_mode = VOIDmode, mode;
619 /* We first look for the largest integer mode that can be validly
620 held in REGNO. If none, we look for the largest floating-point mode.
621 If we still didn't find a valid mode, try CCmode. */
623 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
624 mode != VOIDmode;
625 mode = GET_MODE_WIDER_MODE (mode))
626 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
627 && HARD_REGNO_MODE_OK (regno, mode)
628 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
629 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
630 found_mode = mode;
632 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
633 mode != VOIDmode;
634 mode = GET_MODE_WIDER_MODE (mode))
635 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
636 && HARD_REGNO_MODE_OK (regno, mode)
637 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
638 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
639 found_mode = mode;
641 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
642 mode != VOIDmode;
643 mode = GET_MODE_WIDER_MODE (mode))
644 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
645 && HARD_REGNO_MODE_OK (regno, mode)
646 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
647 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
648 found_mode = mode;
650 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
651 mode != VOIDmode;
652 mode = GET_MODE_WIDER_MODE (mode))
653 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
654 && HARD_REGNO_MODE_OK (regno, mode)
655 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
656 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
657 found_mode = mode;
659 if (found_mode != VOIDmode)
660 return found_mode;
662 /* Iterate over all of the CCmodes. */
663 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
665 mode = (machine_mode) m;
666 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
667 && HARD_REGNO_MODE_OK (regno, mode)
668 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
669 return mode;
672 /* We can't find a mode valid for this register. */
673 return VOIDmode;
676 /* Specify the usage characteristics of the register named NAME.
677 It should be a fixed register if FIXED and a
678 call-used register if CALL_USED. */
679 void
680 fix_register (const char *name, int fixed, int call_used)
682 int i;
683 int reg, nregs;
685 /* Decode the name and update the primary form of
686 the register info. */
688 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
690 gcc_assert (nregs >= 1);
691 for (i = reg; i < reg + nregs; i++)
693 if ((i == STACK_POINTER_REGNUM
694 #ifdef HARD_FRAME_POINTER_REGNUM
695 || i == HARD_FRAME_POINTER_REGNUM
696 #else
697 || i == FRAME_POINTER_REGNUM
698 #endif
700 && (fixed == 0 || call_used == 0))
702 switch (fixed)
704 case 0:
705 switch (call_used)
707 case 0:
708 error ("can%'t use %qs as a call-saved register", name);
709 break;
711 case 1:
712 error ("can%'t use %qs as a call-used register", name);
713 break;
715 default:
716 gcc_unreachable ();
718 break;
720 case 1:
721 switch (call_used)
723 case 1:
724 error ("can%'t use %qs as a fixed register", name);
725 break;
727 case 0:
728 default:
729 gcc_unreachable ();
731 break;
733 default:
734 gcc_unreachable ();
737 else
739 fixed_regs[i] = fixed;
740 call_used_regs[i] = call_used;
741 #ifdef CALL_REALLY_USED_REGISTERS
742 if (fixed == 0)
743 call_really_used_regs[i] = call_used;
744 #endif
748 else
750 warning (0, "unknown register name: %s", name);
754 /* Mark register number I as global. */
755 void
756 globalize_reg (tree decl, int i)
758 location_t loc = DECL_SOURCE_LOCATION (decl);
760 #ifdef STACK_REGS
761 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
763 error ("stack register used for global register variable");
764 return;
766 #endif
768 if (fixed_regs[i] == 0 && no_global_reg_vars)
769 error_at (loc, "global register variable follows a function definition");
771 if (global_regs[i])
773 warning_at (loc, 0,
774 "register of %qD used for multiple global register variables",
775 decl);
776 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
777 "conflicts with %qD", global_regs_decl[i]);
778 return;
781 if (call_used_regs[i] && ! fixed_regs[i])
782 warning_at (loc, 0, "call-clobbered register used for global register variable");
784 global_regs[i] = 1;
785 global_regs_decl[i] = decl;
787 /* If we're globalizing the frame pointer, we need to set the
788 appropriate regs_invalidated_by_call bit, even if it's already
789 set in fixed_regs. */
790 if (i != STACK_POINTER_REGNUM)
792 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
793 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
796 /* If already fixed, nothing else to do. */
797 if (fixed_regs[i])
798 return;
800 fixed_regs[i] = call_used_regs[i] = 1;
801 #ifdef CALL_REALLY_USED_REGISTERS
802 call_really_used_regs[i] = 1;
803 #endif
805 SET_HARD_REG_BIT (fixed_reg_set, i);
806 SET_HARD_REG_BIT (call_used_reg_set, i);
807 SET_HARD_REG_BIT (call_fixed_reg_set, i);
809 reinit_regs ();
813 /* Structure used to record preferences of given pseudo. */
814 struct reg_pref
816 /* (enum reg_class) prefclass is the preferred class. May be
817 NO_REGS if no class is better than memory. */
818 char prefclass;
820 /* altclass is a register class that we should use for allocating
821 pseudo if no register in the preferred class is available.
822 If no register in this class is available, memory is preferred.
824 It might appear to be more general to have a bitmask of classes here,
825 but since it is recommended that there be a class corresponding to the
826 union of most major pair of classes, that generality is not required. */
827 char altclass;
829 /* allocnoclass is a register class that IRA uses for allocating
830 the pseudo. */
831 char allocnoclass;
834 /* Record preferences of each pseudo. This is available after RA is
835 run. */
836 static struct reg_pref *reg_pref;
838 /* Current size of reg_info. */
839 static int reg_info_size;
840 /* Max_reg_num still last resize_reg_info call. */
841 static int max_regno_since_last_resize;
843 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
844 This function is sometimes called before the info has been computed.
845 When that happens, just return GENERAL_REGS, which is innocuous. */
846 enum reg_class
847 reg_preferred_class (int regno)
849 if (reg_pref == 0)
850 return GENERAL_REGS;
852 gcc_assert (regno < reg_info_size);
853 return (enum reg_class) reg_pref[regno].prefclass;
856 enum reg_class
857 reg_alternate_class (int regno)
859 if (reg_pref == 0)
860 return ALL_REGS;
862 gcc_assert (regno < reg_info_size);
863 return (enum reg_class) reg_pref[regno].altclass;
866 /* Return the reg_class which is used by IRA for its allocation. */
867 enum reg_class
868 reg_allocno_class (int regno)
870 if (reg_pref == 0)
871 return NO_REGS;
873 gcc_assert (regno < reg_info_size);
874 return (enum reg_class) reg_pref[regno].allocnoclass;
879 /* Allocate space for reg info and initilize it. */
880 static void
881 allocate_reg_info (void)
883 int i;
885 max_regno_since_last_resize = max_reg_num ();
886 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
887 gcc_assert (! reg_pref && ! reg_renumber);
888 reg_renumber = XNEWVEC (short, reg_info_size);
889 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
890 memset (reg_renumber, -1, reg_info_size * sizeof (short));
891 for (i = 0; i < reg_info_size; i++)
893 reg_pref[i].prefclass = GENERAL_REGS;
894 reg_pref[i].altclass = ALL_REGS;
895 reg_pref[i].allocnoclass = GENERAL_REGS;
900 /* Resize reg info. The new elements will be initialized. Return TRUE
901 if new pseudos were added since the last call. */
902 bool
903 resize_reg_info (void)
905 int old, i;
906 bool change_p;
908 if (reg_pref == NULL)
910 allocate_reg_info ();
911 return true;
913 change_p = max_regno_since_last_resize != max_reg_num ();
914 max_regno_since_last_resize = max_reg_num ();
915 if (reg_info_size >= max_reg_num ())
916 return change_p;
917 old = reg_info_size;
918 reg_info_size = max_reg_num () * 3 / 2 + 1;
919 gcc_assert (reg_pref && reg_renumber);
920 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
921 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
922 memset (reg_pref + old, -1,
923 (reg_info_size - old) * sizeof (struct reg_pref));
924 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
925 for (i = old; i < reg_info_size; i++)
927 reg_pref[i].prefclass = GENERAL_REGS;
928 reg_pref[i].altclass = ALL_REGS;
929 reg_pref[i].allocnoclass = GENERAL_REGS;
931 return true;
935 /* Free up the space allocated by allocate_reg_info. */
936 void
937 free_reg_info (void)
939 if (reg_pref)
941 free (reg_pref);
942 reg_pref = NULL;
945 if (reg_renumber)
947 free (reg_renumber);
948 reg_renumber = NULL;
952 /* Initialize some global data for this pass. */
953 static unsigned int
954 reginfo_init (void)
956 if (df)
957 df_compute_regs_ever_live (true);
959 /* This prevents dump_reg_info from losing if called
960 before reginfo is run. */
961 reg_pref = NULL;
962 reg_info_size = max_regno_since_last_resize = 0;
963 /* No more global register variables may be declared. */
964 no_global_reg_vars = 1;
965 return 1;
968 namespace {
970 const pass_data pass_data_reginfo_init =
972 RTL_PASS, /* type */
973 "reginfo", /* name */
974 OPTGROUP_NONE, /* optinfo_flags */
975 TV_NONE, /* tv_id */
976 0, /* properties_required */
977 0, /* properties_provided */
978 0, /* properties_destroyed */
979 0, /* todo_flags_start */
980 0, /* todo_flags_finish */
983 class pass_reginfo_init : public rtl_opt_pass
985 public:
986 pass_reginfo_init (gcc::context *ctxt)
987 : rtl_opt_pass (pass_data_reginfo_init, ctxt)
990 /* opt_pass methods: */
991 virtual unsigned int execute (function *) { return reginfo_init (); }
993 }; // class pass_reginfo_init
995 } // anon namespace
997 rtl_opt_pass *
998 make_pass_reginfo_init (gcc::context *ctxt)
1000 return new pass_reginfo_init (ctxt);
1005 /* Set up preferred, alternate, and allocno classes for REGNO as
1006 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
1007 void
1008 setup_reg_classes (int regno,
1009 enum reg_class prefclass, enum reg_class altclass,
1010 enum reg_class allocnoclass)
1012 if (reg_pref == NULL)
1013 return;
1014 gcc_assert (reg_info_size >= max_reg_num ());
1015 reg_pref[regno].prefclass = prefclass;
1016 reg_pref[regno].altclass = altclass;
1017 reg_pref[regno].allocnoclass = allocnoclass;
1021 /* This is the `regscan' pass of the compiler, run just before cse and
1022 again just before loop. It finds the first and last use of each
1023 pseudo-register. */
1025 static void reg_scan_mark_refs (rtx, rtx_insn *);
1027 void
1028 reg_scan (rtx_insn *f, unsigned int nregs ATTRIBUTE_UNUSED)
1030 rtx_insn *insn;
1032 timevar_push (TV_REG_SCAN);
1034 for (insn = f; insn; insn = NEXT_INSN (insn))
1035 if (INSN_P (insn))
1037 reg_scan_mark_refs (PATTERN (insn), insn);
1038 if (REG_NOTES (insn))
1039 reg_scan_mark_refs (REG_NOTES (insn), insn);
1042 timevar_pop (TV_REG_SCAN);
1046 /* X is the expression to scan. INSN is the insn it appears in.
1047 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1048 We should only record information for REGs with numbers
1049 greater than or equal to MIN_REGNO. */
1050 static void
1051 reg_scan_mark_refs (rtx x, rtx_insn *insn)
1053 enum rtx_code code;
1054 rtx dest;
1055 rtx note;
1057 if (!x)
1058 return;
1059 code = GET_CODE (x);
1060 switch (code)
1062 case CONST:
1063 CASE_CONST_ANY:
1064 case CC0:
1065 case PC:
1066 case SYMBOL_REF:
1067 case LABEL_REF:
1068 case ADDR_VEC:
1069 case ADDR_DIFF_VEC:
1070 case REG:
1071 return;
1073 case EXPR_LIST:
1074 if (XEXP (x, 0))
1075 reg_scan_mark_refs (XEXP (x, 0), insn);
1076 if (XEXP (x, 1))
1077 reg_scan_mark_refs (XEXP (x, 1), insn);
1078 break;
1080 case INSN_LIST:
1081 case INT_LIST:
1082 if (XEXP (x, 1))
1083 reg_scan_mark_refs (XEXP (x, 1), insn);
1084 break;
1086 case CLOBBER:
1087 if (MEM_P (XEXP (x, 0)))
1088 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1089 break;
1091 case SET:
1092 /* Count a set of the destination if it is a register. */
1093 for (dest = SET_DEST (x);
1094 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1095 || GET_CODE (dest) == ZERO_EXTRACT;
1096 dest = XEXP (dest, 0))
1099 /* If this is setting a pseudo from another pseudo or the sum of a
1100 pseudo and a constant integer and the other pseudo is known to be
1101 a pointer, set the destination to be a pointer as well.
1103 Likewise if it is setting the destination from an address or from a
1104 value equivalent to an address or to the sum of an address and
1105 something else.
1107 But don't do any of this if the pseudo corresponds to a user
1108 variable since it should have already been set as a pointer based
1109 on the type. */
1111 if (REG_P (SET_DEST (x))
1112 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1113 /* If the destination pseudo is set more than once, then other
1114 sets might not be to a pointer value (consider access to a
1115 union in two threads of control in the presence of global
1116 optimizations). So only set REG_POINTER on the destination
1117 pseudo if this is the only set of that pseudo. */
1118 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1119 && ! REG_USERVAR_P (SET_DEST (x))
1120 && ! REG_POINTER (SET_DEST (x))
1121 && ((REG_P (SET_SRC (x))
1122 && REG_POINTER (SET_SRC (x)))
1123 || ((GET_CODE (SET_SRC (x)) == PLUS
1124 || GET_CODE (SET_SRC (x)) == LO_SUM)
1125 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1126 && REG_P (XEXP (SET_SRC (x), 0))
1127 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1128 || GET_CODE (SET_SRC (x)) == CONST
1129 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1130 || GET_CODE (SET_SRC (x)) == LABEL_REF
1131 || (GET_CODE (SET_SRC (x)) == HIGH
1132 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1133 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1134 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1135 || ((GET_CODE (SET_SRC (x)) == PLUS
1136 || GET_CODE (SET_SRC (x)) == LO_SUM)
1137 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1138 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1139 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1140 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1141 && (GET_CODE (XEXP (note, 0)) == CONST
1142 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1143 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1144 REG_POINTER (SET_DEST (x)) = 1;
1146 /* If this is setting a register from a register or from a simple
1147 conversion of a register, propagate REG_EXPR. */
1148 if (REG_P (dest) && !REG_ATTRS (dest))
1149 set_reg_attrs_from_value (dest, SET_SRC (x));
1151 /* ... fall through ... */
1153 default:
1155 const char *fmt = GET_RTX_FORMAT (code);
1156 int i;
1157 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1159 if (fmt[i] == 'e')
1160 reg_scan_mark_refs (XEXP (x, i), insn);
1161 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1163 int j;
1164 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1165 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1173 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1174 is also in C2. */
1176 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1178 return (c1 == c2
1179 || c2 == ALL_REGS
1180 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1181 reg_class_contents[(int) c2]));
1184 /* Return nonzero if there is a register that is in both C1 and C2. */
1186 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1188 return (c1 == c2
1189 || c1 == ALL_REGS
1190 || c2 == ALL_REGS
1191 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1192 reg_class_contents[(int) c2]));
1196 inline hashval_t
1197 simplifiable_subregs_hasher::hash (const simplifiable_subreg *value)
1199 return value->shape.unique_id ();
1202 inline bool
1203 simplifiable_subregs_hasher::equal (const simplifiable_subreg *value,
1204 const subreg_shape *compare)
1206 return value->shape == *compare;
1209 inline simplifiable_subreg::simplifiable_subreg (const subreg_shape &shape_in)
1210 : shape (shape_in)
1212 CLEAR_HARD_REG_SET (simplifiable_regs);
1215 /* Return the set of hard registers that are able to form the subreg
1216 described by SHAPE. */
1218 const HARD_REG_SET &
1219 simplifiable_subregs (const subreg_shape &shape)
1221 if (!this_target_hard_regs->x_simplifiable_subregs)
1222 this_target_hard_regs->x_simplifiable_subregs
1223 = new hash_table <simplifiable_subregs_hasher> (30);
1224 simplifiable_subreg **slot
1225 = (this_target_hard_regs->x_simplifiable_subregs
1226 ->find_slot_with_hash (&shape, shape.unique_id (), INSERT));
1228 if (!*slot)
1230 simplifiable_subreg *info = new simplifiable_subreg (shape);
1231 for (unsigned int i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1232 if (HARD_REGNO_MODE_OK (i, shape.inner_mode)
1233 && simplify_subreg_regno (i, shape.inner_mode, shape.offset,
1234 shape.outer_mode) >= 0)
1235 SET_HARD_REG_BIT (info->simplifiable_regs, i);
1236 *slot = info;
1238 return (*slot)->simplifiable_regs;
1241 /* Passes for keeping and updating info about modes of registers
1242 inside subregisters. */
1244 static HARD_REG_SET **valid_mode_changes;
1245 static obstack valid_mode_changes_obstack;
1247 static void
1248 record_subregs_of_mode (rtx subreg)
1250 unsigned int regno;
1252 if (!REG_P (SUBREG_REG (subreg)))
1253 return;
1255 regno = REGNO (SUBREG_REG (subreg));
1256 if (regno < FIRST_PSEUDO_REGISTER)
1257 return;
1259 if (valid_mode_changes[regno])
1260 AND_HARD_REG_SET (*valid_mode_changes[regno],
1261 simplifiable_subregs (shape_of_subreg (subreg)));
1262 else
1264 valid_mode_changes[regno]
1265 = XOBNEW (&valid_mode_changes_obstack, HARD_REG_SET);
1266 COPY_HARD_REG_SET (*valid_mode_changes[regno],
1267 simplifiable_subregs (shape_of_subreg (subreg)));
1271 /* Call record_subregs_of_mode for all the subregs in X. */
1272 static void
1273 find_subregs_of_mode (rtx x)
1275 enum rtx_code code = GET_CODE (x);
1276 const char * const fmt = GET_RTX_FORMAT (code);
1277 int i;
1279 if (code == SUBREG)
1280 record_subregs_of_mode (x);
1282 /* Time for some deep diving. */
1283 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1285 if (fmt[i] == 'e')
1286 find_subregs_of_mode (XEXP (x, i));
1287 else if (fmt[i] == 'E')
1289 int j;
1290 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1291 find_subregs_of_mode (XVECEXP (x, i, j));
1296 void
1297 init_subregs_of_mode (void)
1299 basic_block bb;
1300 rtx_insn *insn;
1302 gcc_obstack_init (&valid_mode_changes_obstack);
1303 valid_mode_changes = XCNEWVEC (HARD_REG_SET *, max_reg_num ());
1305 FOR_EACH_BB_FN (bb, cfun)
1306 FOR_BB_INSNS (bb, insn)
1307 if (NONDEBUG_INSN_P (insn))
1308 find_subregs_of_mode (PATTERN (insn));
1311 const HARD_REG_SET *
1312 valid_mode_changes_for_regno (unsigned int regno)
1314 return valid_mode_changes[regno];
1317 void
1318 finish_subregs_of_mode (void)
1320 XDELETEVEC (valid_mode_changes);
1321 obstack_free (&valid_mode_changes_obstack, NULL);
1324 /* Free all data attached to the structure. This isn't a destructor because
1325 we don't want to run on exit. */
1327 void
1328 target_hard_regs::finalize ()
1330 delete x_simplifiable_subregs;