[AArch64] Allow multiple-of-8 immediate offsets for TImode LDP/STP
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / ldp_stp_unaligned_1.c
bloba70f92100fb91bcfdcfd4af1cab6f58915038568
1 /* { dg-options "-O2" } */
3 /* Check that we can use a REG + IMM addressing mode when moving an unaligned
4 TImode value to and from memory. */
6 struct foo
8 long long b;
9 __int128 a;
10 } __attribute__ ((packed));
12 void
13 bar (struct foo *p, struct foo *q)
15 p->a = q->a;
18 /* { dg-final { scan-assembler-not "add\tx\[0-9\]+, x\[0-9\]+" } } */
19 /* { dg-final { scan-assembler-times "ldp\tx\[0-9\]+, x\[0-9\], .*8" 1 } } */
20 /* { dg-final { scan-assembler-times "stp\tx\[0-9\]+, x\[0-9\], .*8" 1 } } */