1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int,
245 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
246 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
247 static void dup_replacements
PARAMS ((rtx
*, rtx
*));
248 static void combine_reloads
PARAMS ((void));
249 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
250 enum reload_type
, int, int));
251 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
252 enum machine_mode
, enum machine_mode
,
253 enum reg_class
, int, int));
254 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
255 static struct decomposition decompose
PARAMS ((rtx
));
256 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
257 static int alternative_allows_memconst
PARAMS ((const char *, int));
258 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
260 static rtx make_memloc
PARAMS ((rtx
, int));
261 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
262 int, enum reload_type
, int, rtx
));
263 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
264 static rtx subst_indexed_address
PARAMS ((rtx
));
265 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int,
272 enum reload_type
, int, rtx
));
273 static void copy_replacements_1
PARAMS ((rtx
*, rtx
*, int));
274 static int find_inc_amount
PARAMS ((rtx
, rtx
));
276 #ifdef HAVE_SECONDARY_RELOADS
278 /* Determine if any secondary reloads are needed for loading (if IN_P is
279 nonzero) or storing (if IN_P is zero) X to or from a reload register of
280 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
281 are needed, push them.
283 Return the reload number of the secondary reload we made, or -1 if
284 we didn't need one. *PICODE is set to the insn_code to use if we do
285 need a secondary reload. */
288 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
294 enum reg_class reload_class
;
295 enum machine_mode reload_mode
;
296 enum reload_type type
;
297 enum insn_code
*picode
;
299 enum reg_class
class = NO_REGS
;
300 enum machine_mode mode
= reload_mode
;
301 enum insn_code icode
= CODE_FOR_nothing
;
302 enum reg_class t_class
= NO_REGS
;
303 enum machine_mode t_mode
= VOIDmode
;
304 enum insn_code t_icode
= CODE_FOR_nothing
;
305 enum reload_type secondary_type
;
306 int s_reload
, t_reload
= -1;
308 if (type
== RELOAD_FOR_INPUT_ADDRESS
309 || type
== RELOAD_FOR_OUTPUT_ADDRESS
310 || type
== RELOAD_FOR_INPADDR_ADDRESS
311 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
312 secondary_type
= type
;
314 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
316 *picode
= CODE_FOR_nothing
;
318 /* If X is a paradoxical SUBREG, use the inner value to determine both the
319 mode and object being reloaded. */
320 if (GET_CODE (x
) == SUBREG
321 && (GET_MODE_SIZE (GET_MODE (x
))
322 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
325 reload_mode
= GET_MODE (x
);
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem
[REGNO (x
)] != 0)
336 x
= reg_equiv_mem
[REGNO (x
)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_data
[(int) icode
].operand
[in_p
].predicate
360 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is nonzero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 enum reg_class insn_class
;
378 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
379 insn_class
= ALL_REGS
;
383 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
385 = (insn_letter
== 'r' ? GENERAL_REGS
386 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
388 if (insn_class
== NO_REGS
)
391 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
395 /* The scratch register's constraint must start with "=&". */
396 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
397 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
400 if (reg_class_subset_p (reload_class
, insn_class
))
401 mode
= insn_data
[(int) icode
].operand
[2].mode
;
404 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
406 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
407 t_class
= (t_letter
== 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
410 icode
= CODE_FOR_nothing
;
414 /* This case isn't valid, so fail. Reload is allowed to use the same
415 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
416 in the case of a secondary register, we actually need two different
417 registers for correct code. We fail here to prevent the possibility of
418 silently generating incorrect code later.
420 The convention is that secondary input reloads are valid only if the
421 secondary_class is different from class. If you have such a case, you
422 can not use secondary reloads, you must work around the problem some
425 Allow this when a reload_in/out pattern is being used. I.e. assume
426 that the generated code handles this case. */
428 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
429 && t_icode
== CODE_FOR_nothing
)
432 /* If we need a tertiary reload, see if we have one we can reuse or else
435 if (t_class
!= NO_REGS
)
437 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
438 if (rld
[t_reload
].secondary_p
439 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
440 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
441 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
442 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
443 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
444 == CODE_FOR_nothing
))
445 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
446 == CODE_FOR_nothing
)))
447 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
448 && MERGABLE_RELOADS (secondary_type
,
449 rld
[t_reload
].when_needed
,
450 opnum
, rld
[t_reload
].opnum
))
453 rld
[t_reload
].inmode
= t_mode
;
455 rld
[t_reload
].outmode
= t_mode
;
457 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
458 rld
[t_reload
].class = t_class
;
460 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
461 rld
[t_reload
].optional
&= optional
;
462 rld
[t_reload
].secondary_p
= 1;
463 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
464 opnum
, rld
[t_reload
].opnum
))
465 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
468 if (t_reload
== n_reloads
)
470 /* We need to make a new tertiary reload for this register class. */
471 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
472 rld
[t_reload
].class = t_class
;
473 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
474 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
475 rld
[t_reload
].reg_rtx
= 0;
476 rld
[t_reload
].optional
= optional
;
477 rld
[t_reload
].inc
= 0;
478 /* Maybe we could combine these, but it seems too tricky. */
479 rld
[t_reload
].nocombine
= 1;
480 rld
[t_reload
].in_reg
= 0;
481 rld
[t_reload
].out_reg
= 0;
482 rld
[t_reload
].opnum
= opnum
;
483 rld
[t_reload
].when_needed
= secondary_type
;
484 rld
[t_reload
].secondary_in_reload
= -1;
485 rld
[t_reload
].secondary_out_reload
= -1;
486 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
487 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
488 rld
[t_reload
].secondary_p
= 1;
494 /* See if we can reuse an existing secondary reload. */
495 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
496 if (rld
[s_reload
].secondary_p
497 && (reg_class_subset_p (class, rld
[s_reload
].class)
498 || reg_class_subset_p (rld
[s_reload
].class, class))
499 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
500 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
501 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
502 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
503 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
504 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
505 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
506 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
507 opnum
, rld
[s_reload
].opnum
))
510 rld
[s_reload
].inmode
= mode
;
512 rld
[s_reload
].outmode
= mode
;
514 if (reg_class_subset_p (class, rld
[s_reload
].class))
515 rld
[s_reload
].class = class;
517 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
518 rld
[s_reload
].optional
&= optional
;
519 rld
[s_reload
].secondary_p
= 1;
520 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
521 opnum
, rld
[s_reload
].opnum
))
522 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
525 if (s_reload
== n_reloads
)
527 #ifdef SECONDARY_MEMORY_NEEDED
528 /* If we need a memory location to copy between the two reload regs,
529 set it up now. Note that we do the input case before making
530 the reload and the output case after. This is due to the
531 way reloads are output. */
533 if (in_p
&& icode
== CODE_FOR_nothing
534 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
536 get_secondary_mem (x
, reload_mode
, opnum
, type
);
538 /* We may have just added new reloads. Make sure we add
539 the new reload at the end. */
540 s_reload
= n_reloads
;
544 /* We need to make a new secondary reload for this register class. */
545 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
546 rld
[s_reload
].class = class;
548 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
549 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
550 rld
[s_reload
].reg_rtx
= 0;
551 rld
[s_reload
].optional
= optional
;
552 rld
[s_reload
].inc
= 0;
553 /* Maybe we could combine these, but it seems too tricky. */
554 rld
[s_reload
].nocombine
= 1;
555 rld
[s_reload
].in_reg
= 0;
556 rld
[s_reload
].out_reg
= 0;
557 rld
[s_reload
].opnum
= opnum
;
558 rld
[s_reload
].when_needed
= secondary_type
;
559 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
560 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
561 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
562 rld
[s_reload
].secondary_out_icode
563 = ! in_p
? t_icode
: CODE_FOR_nothing
;
564 rld
[s_reload
].secondary_p
= 1;
568 #ifdef SECONDARY_MEMORY_NEEDED
569 if (! in_p
&& icode
== CODE_FOR_nothing
570 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
571 get_secondary_mem (x
, mode
, opnum
, type
);
578 #endif /* HAVE_SECONDARY_RELOADS */
580 #ifdef SECONDARY_MEMORY_NEEDED
582 /* Return a memory location that will be used to copy X in mode MODE.
583 If we haven't already made a location for this mode in this insn,
584 call find_reloads_address on the location being returned. */
587 get_secondary_mem (x
, mode
, opnum
, type
)
588 rtx x ATTRIBUTE_UNUSED
;
589 enum machine_mode mode
;
591 enum reload_type type
;
596 /* By default, if MODE is narrower than a word, widen it to a word.
597 This is required because most machines that require these memory
598 locations do not support short load and stores from all registers
599 (e.g., FP registers). */
601 #ifdef SECONDARY_MEMORY_NEEDED_MODE
602 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
604 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
605 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
608 /* If we already have made a MEM for this operand in MODE, return it. */
609 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
610 return secondary_memlocs_elim
[(int) mode
][opnum
];
612 /* If this is the first time we've tried to get a MEM for this mode,
613 allocate a new one. `something_changed' in reload will get set
614 by noticing that the frame size has changed. */
616 if (secondary_memlocs
[(int) mode
] == 0)
618 #ifdef SECONDARY_MEMORY_NEEDED_RTX
619 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
621 secondary_memlocs
[(int) mode
]
622 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
626 /* Get a version of the address doing any eliminations needed. If that
627 didn't give us a new MEM, make a new one if it isn't valid. */
629 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
630 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
632 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
633 loc
= copy_rtx (loc
);
635 /* The only time the call below will do anything is if the stack
636 offset is too large. In that case IND_LEVELS doesn't matter, so we
637 can just pass a zero. Adjust the type to be the address of the
638 corresponding object. If the address was valid, save the eliminated
639 address. If it wasn't valid, we need to make a reload each time, so
644 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
645 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
648 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
652 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
656 /* Clear any secondary memory locations we've made. */
659 clear_secondary_mem ()
661 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
663 #endif /* SECONDARY_MEMORY_NEEDED */
665 /* Find the largest class for which every register number plus N is valid in
666 M1 (if in range) and is cheap to move into REGNO.
667 Abort if no such class exists. */
669 static enum reg_class
670 find_valid_class (m1
, n
, dest_regno
)
671 enum machine_mode m1 ATTRIBUTE_UNUSED
;
673 unsigned int dest_regno
;
678 enum reg_class best_class
= NO_REGS
;
679 enum reg_class dest_class
= REGNO_REG_CLASS (dest_regno
);
680 unsigned int best_size
= 0;
683 for (class = 1; class < N_REG_CLASSES
; class++)
686 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
687 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
688 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
689 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
694 cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
696 if ((reg_class_size
[class] > best_size
697 && (best_cost
< 0 || best_cost
>= cost
))
701 best_size
= reg_class_size
[class];
702 best_cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
712 /* Return the number of a previously made reload that can be combined with
713 a new one, or n_reloads if none of the existing reloads can be used.
714 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
715 push_reload, they determine the kind of the new reload that we try to
716 combine. P_IN points to the corresponding value of IN, which can be
717 modified by this function.
718 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
721 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
723 enum reg_class
class;
724 enum reload_type type
;
725 int opnum
, dont_share
;
729 /* We can't merge two reloads if the output of either one is
732 if (earlyclobber_operand_p (out
))
735 /* We can use an existing reload if the class is right
736 and at least one of IN and OUT is a match
737 and the other is at worst neutral.
738 (A zero compared against anything is neutral.)
740 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
741 for the same thing since that can cause us to need more reload registers
742 than we otherwise would. */
744 for (i
= 0; i
< n_reloads
; i
++)
745 if ((reg_class_subset_p (class, rld
[i
].class)
746 || reg_class_subset_p (rld
[i
].class, class))
747 /* If the existing reload has a register, it must fit our class. */
748 && (rld
[i
].reg_rtx
== 0
749 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
750 true_regnum (rld
[i
].reg_rtx
)))
751 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
752 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
753 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
754 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
755 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
756 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
757 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
760 /* Reloading a plain reg for input can match a reload to postincrement
761 that reg, since the postincrement's value is the right value.
762 Likewise, it can match a preincrement reload, since we regard
763 the preincrementation as happening before any ref in this insn
765 for (i
= 0; i
< n_reloads
; i
++)
766 if ((reg_class_subset_p (class, rld
[i
].class)
767 || reg_class_subset_p (rld
[i
].class, class))
768 /* If the existing reload has a register, it must fit our
770 && (rld
[i
].reg_rtx
== 0
771 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
772 true_regnum (rld
[i
].reg_rtx
)))
773 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
774 && ((GET_CODE (in
) == REG
775 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
776 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
777 || (GET_CODE (rld
[i
].in
) == REG
778 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
779 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
780 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
781 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
782 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
783 opnum
, rld
[i
].opnum
))
785 /* Make sure reload_in ultimately has the increment,
786 not the plain register. */
787 if (GET_CODE (in
) == REG
)
794 /* Return nonzero if X is a SUBREG which will require reloading of its
795 SUBREG_REG expression. */
798 reload_inner_reg_of_subreg (x
, mode
)
800 enum machine_mode mode
;
804 /* Only SUBREGs are problematical. */
805 if (GET_CODE (x
) != SUBREG
)
808 inner
= SUBREG_REG (x
);
810 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
811 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
814 /* If INNER is not a hard register, then INNER will not need to
816 if (GET_CODE (inner
) != REG
817 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
820 /* If INNER is not ok for MODE, then INNER will need reloading. */
821 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
824 /* If the outer part is a word or smaller, INNER larger than a
825 word and the number of regs for INNER is not the same as the
826 number of words in INNER, then INNER will need reloading. */
827 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
828 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
829 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
830 != (int) HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
833 /* Record one reload that needs to be performed.
834 IN is an rtx saying where the data are to be found before this instruction.
835 OUT says where they must be stored after the instruction.
836 (IN is zero for data not read, and OUT is zero for data not written.)
837 INLOC and OUTLOC point to the places in the instructions where
838 IN and OUT were found.
839 If IN and OUT are both nonzero, it means the same register must be used
840 to reload both IN and OUT.
842 CLASS is a register class required for the reloaded data.
843 INMODE is the machine mode that the instruction requires
844 for the reg that replaces IN and OUTMODE is likewise for OUT.
846 If IN is zero, then OUT's location and mode should be passed as
849 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
851 OPTIONAL nonzero means this reload does not need to be performed:
852 it can be discarded if that is more convenient.
854 OPNUM and TYPE say what the purpose of this reload is.
856 The return value is the reload-number for this reload.
858 If both IN and OUT are nonzero, in some rare cases we might
859 want to make two separate reloads. (Actually we never do this now.)
860 Therefore, the reload-number for OUT is stored in
861 output_reloadnum when we return; the return value applies to IN.
862 Usually (presently always), when IN and OUT are nonzero,
863 the two reload-numbers are equal, but the caller should be careful to
867 push_reload (in
, out
, inloc
, outloc
, class,
868 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
871 enum reg_class
class;
872 enum machine_mode inmode
, outmode
;
876 enum reload_type type
;
880 int dont_remove_subreg
= 0;
881 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
882 int secondary_in_reload
= -1, secondary_out_reload
= -1;
883 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
884 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
886 /* INMODE and/or OUTMODE could be VOIDmode if no mode
887 has been specified for the operand. In that case,
888 use the operand's mode as the mode to reload. */
889 if (inmode
== VOIDmode
&& in
!= 0)
890 inmode
= GET_MODE (in
);
891 if (outmode
== VOIDmode
&& out
!= 0)
892 outmode
= GET_MODE (out
);
894 /* If IN is a pseudo register everywhere-equivalent to a constant, and
895 it is not in a hard register, reload straight from the constant,
896 since we want to get rid of such pseudo registers.
897 Often this is done earlier, but not always in find_reloads_address. */
898 if (in
!= 0 && GET_CODE (in
) == REG
)
900 int regno
= REGNO (in
);
902 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
903 && reg_equiv_constant
[regno
] != 0)
904 in
= reg_equiv_constant
[regno
];
907 /* Likewise for OUT. Of course, OUT will never be equivalent to
908 an actual constant, but it might be equivalent to a memory location
909 (in the case of a parameter). */
910 if (out
!= 0 && GET_CODE (out
) == REG
)
912 int regno
= REGNO (out
);
914 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
915 && reg_equiv_constant
[regno
] != 0)
916 out
= reg_equiv_constant
[regno
];
919 /* If we have a read-write operand with an address side-effect,
920 change either IN or OUT so the side-effect happens only once. */
921 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
922 switch (GET_CODE (XEXP (in
, 0)))
924 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
925 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
928 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
929 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
936 /* If we are reloading a (SUBREG constant ...), really reload just the
937 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
938 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
939 a pseudo and hence will become a MEM) with M1 wider than M2 and the
940 register is a pseudo, also reload the inside expression.
941 For machines that extend byte loads, do this for any SUBREG of a pseudo
942 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
943 M2 is an integral mode that gets extended when loaded.
944 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
945 either M1 is not valid for R or M2 is wider than a word but we only
946 need one word to store an M2-sized quantity in R.
947 (However, if OUT is nonzero, we need to reload the reg *and*
948 the subreg, so do nothing here, and let following statement handle it.)
950 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
951 we can't handle it here because CONST_INT does not indicate a mode.
953 Similarly, we must reload the inside expression if we have a
954 STRICT_LOW_PART (presumably, in == out in the cas).
956 Also reload the inner expression if it does not require a secondary
957 reload but the SUBREG does.
959 Finally, reload the inner expression if it is a register that is in
960 the class whose registers cannot be referenced in a different size
961 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
962 cannot reload just the inside since we might end up with the wrong
963 register class. But if it is inside a STRICT_LOW_PART, we have
964 no choice, so we hope we do get the right register class there. */
966 if (in
!= 0 && GET_CODE (in
) == SUBREG
967 && (subreg_lowpart_p (in
) || strict_low
)
968 #ifdef CLASS_CANNOT_CHANGE_MODE
969 && (class != CLASS_CANNOT_CHANGE_MODE
970 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
972 && (CONSTANT_P (SUBREG_REG (in
))
973 || GET_CODE (SUBREG_REG (in
)) == PLUS
975 || (((GET_CODE (SUBREG_REG (in
)) == REG
976 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
977 || GET_CODE (SUBREG_REG (in
)) == MEM
)
978 && ((GET_MODE_SIZE (inmode
)
979 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
980 #ifdef LOAD_EXTEND_OP
981 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
982 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
984 && (GET_MODE_SIZE (inmode
)
985 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
986 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
987 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
989 #ifdef WORD_REGISTER_OPERATIONS
990 || ((GET_MODE_SIZE (inmode
)
991 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
992 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
993 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
997 || (GET_CODE (SUBREG_REG (in
)) == REG
998 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
999 /* The case where out is nonzero
1000 is handled differently in the following statement. */
1001 && (out
== 0 || subreg_lowpart_p (in
))
1002 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1003 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1005 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1007 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1008 GET_MODE (SUBREG_REG (in
)))))
1009 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1010 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1011 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
1012 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1013 GET_MODE (SUBREG_REG (in
)),
1017 #ifdef CLASS_CANNOT_CHANGE_MODE
1018 || (GET_CODE (SUBREG_REG (in
)) == REG
1019 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1020 && (TEST_HARD_REG_BIT
1021 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1022 REGNO (SUBREG_REG (in
))))
1023 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1028 in_subreg_loc
= inloc
;
1029 inloc
= &SUBREG_REG (in
);
1031 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1032 if (GET_CODE (in
) == MEM
)
1033 /* This is supposed to happen only for paradoxical subregs made by
1034 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1035 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1038 inmode
= GET_MODE (in
);
1041 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1042 either M1 is not valid for R or M2 is wider than a word but we only
1043 need one word to store an M2-sized quantity in R.
1045 However, we must reload the inner reg *as well as* the subreg in
1048 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1049 code above. This can happen if SUBREG_BYTE != 0. */
1051 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1053 enum reg_class in_class
= class;
1055 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1057 = find_valid_class (inmode
,
1058 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1059 GET_MODE (SUBREG_REG (in
)),
1062 REGNO (SUBREG_REG (in
)));
1064 /* This relies on the fact that emit_reload_insns outputs the
1065 instructions for input reloads of type RELOAD_OTHER in the same
1066 order as the reloads. Thus if the outer reload is also of type
1067 RELOAD_OTHER, we are guaranteed that this inner reload will be
1068 output before the outer reload. */
1069 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1070 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1071 dont_remove_subreg
= 1;
1074 /* Similarly for paradoxical and problematical SUBREGs on the output.
1075 Note that there is no reason we need worry about the previous value
1076 of SUBREG_REG (out); even if wider than out,
1077 storing in a subreg is entitled to clobber it all
1078 (except in the case of STRICT_LOW_PART,
1079 and in that case the constraint should label it input-output.) */
1080 if (out
!= 0 && GET_CODE (out
) == SUBREG
1081 && (subreg_lowpart_p (out
) || strict_low
)
1082 #ifdef CLASS_CANNOT_CHANGE_MODE
1083 && (class != CLASS_CANNOT_CHANGE_MODE
1084 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1087 && (CONSTANT_P (SUBREG_REG (out
))
1089 || (((GET_CODE (SUBREG_REG (out
)) == REG
1090 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1091 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1092 && ((GET_MODE_SIZE (outmode
)
1093 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1094 #ifdef WORD_REGISTER_OPERATIONS
1095 || ((GET_MODE_SIZE (outmode
)
1096 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1097 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1098 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1102 || (GET_CODE (SUBREG_REG (out
)) == REG
1103 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1104 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1105 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1107 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1109 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1110 GET_MODE (SUBREG_REG (out
)))))
1111 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1112 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1113 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1114 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1115 GET_MODE (SUBREG_REG (out
)),
1119 #ifdef CLASS_CANNOT_CHANGE_MODE
1120 || (GET_CODE (SUBREG_REG (out
)) == REG
1121 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1122 && (TEST_HARD_REG_BIT
1123 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1124 REGNO (SUBREG_REG (out
))))
1125 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1130 out_subreg_loc
= outloc
;
1131 outloc
= &SUBREG_REG (out
);
1133 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1134 if (GET_CODE (out
) == MEM
1135 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1138 outmode
= GET_MODE (out
);
1141 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1142 either M1 is not valid for R or M2 is wider than a word but we only
1143 need one word to store an M2-sized quantity in R.
1145 However, we must reload the inner reg *as well as* the subreg in
1146 that case. In this case, the inner reg is an in-out reload. */
1148 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1150 /* This relies on the fact that emit_reload_insns outputs the
1151 instructions for output reloads of type RELOAD_OTHER in reverse
1152 order of the reloads. Thus if the outer reload is also of type
1153 RELOAD_OTHER, we are guaranteed that this inner reload will be
1154 output after the outer reload. */
1155 dont_remove_subreg
= 1;
1156 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1158 find_valid_class (outmode
,
1159 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1160 GET_MODE (SUBREG_REG (out
)),
1163 REGNO (SUBREG_REG (out
))),
1164 VOIDmode
, VOIDmode
, 0, 0,
1165 opnum
, RELOAD_OTHER
);
1168 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1169 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1170 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1171 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1174 /* If IN is a SUBREG of a hard register, make a new REG. This
1175 simplifies some of the cases below. */
1177 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1178 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1179 && ! dont_remove_subreg
)
1180 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1182 /* Similarly for OUT. */
1183 if (out
!= 0 && GET_CODE (out
) == SUBREG
1184 && GET_CODE (SUBREG_REG (out
)) == REG
1185 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1186 && ! dont_remove_subreg
)
1187 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1189 /* Narrow down the class of register wanted if that is
1190 desirable on this machine for efficiency. */
1192 class = PREFERRED_RELOAD_CLASS (in
, class);
1194 /* Output reloads may need analogous treatment, different in detail. */
1195 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1197 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1200 /* Make sure we use a class that can handle the actual pseudo
1201 inside any subreg. For example, on the 386, QImode regs
1202 can appear within SImode subregs. Although GENERAL_REGS
1203 can handle SImode, QImode needs a smaller class. */
1204 #ifdef LIMIT_RELOAD_CLASS
1206 class = LIMIT_RELOAD_CLASS (inmode
, class);
1207 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1208 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1211 class = LIMIT_RELOAD_CLASS (outmode
, class);
1212 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1213 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1216 /* Verify that this class is at least possible for the mode that
1218 if (this_insn_is_asm
)
1220 enum machine_mode mode
;
1221 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1225 if (mode
== VOIDmode
)
1227 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1232 outmode
= word_mode
;
1234 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1235 if (HARD_REGNO_MODE_OK (i
, mode
)
1236 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1238 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1241 for (j
= 1; j
< nregs
; j
++)
1242 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1247 if (i
== FIRST_PSEUDO_REGISTER
)
1249 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1254 /* Optional output reloads are always OK even if we have no register class,
1255 since the function of these reloads is only to have spill_reg_store etc.
1256 set, so that the storing insn can be deleted later. */
1257 if (class == NO_REGS
1258 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1261 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1265 /* See if we need a secondary reload register to move between CLASS
1266 and IN or CLASS and OUT. Get the icode and push any required reloads
1267 needed for each of them if so. */
1269 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1272 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1273 &secondary_in_icode
);
1276 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1277 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1278 secondary_out_reload
1279 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1280 type
, &secondary_out_icode
);
1283 /* We found no existing reload suitable for re-use.
1284 So add an additional reload. */
1286 #ifdef SECONDARY_MEMORY_NEEDED
1287 /* If a memory location is needed for the copy, make one. */
1288 if (in
!= 0 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == SUBREG
)
1289 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1290 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1292 get_secondary_mem (in
, inmode
, opnum
, type
);
1298 rld
[i
].class = class;
1299 rld
[i
].inmode
= inmode
;
1300 rld
[i
].outmode
= outmode
;
1302 rld
[i
].optional
= optional
;
1304 rld
[i
].nocombine
= 0;
1305 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1306 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1307 rld
[i
].opnum
= opnum
;
1308 rld
[i
].when_needed
= type
;
1309 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1310 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1311 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1312 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1313 rld
[i
].secondary_p
= 0;
1317 #ifdef SECONDARY_MEMORY_NEEDED
1318 if (out
!= 0 && (GET_CODE (out
) == REG
|| GET_CODE (out
) == SUBREG
)
1319 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1320 && SECONDARY_MEMORY_NEEDED (class,
1321 REGNO_REG_CLASS (reg_or_subregno (out
)),
1323 get_secondary_mem (out
, outmode
, opnum
, type
);
1328 /* We are reusing an existing reload,
1329 but we may have additional information for it.
1330 For example, we may now have both IN and OUT
1331 while the old one may have just one of them. */
1333 /* The modes can be different. If they are, we want to reload in
1334 the larger mode, so that the value is valid for both modes. */
1335 if (inmode
!= VOIDmode
1336 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1337 rld
[i
].inmode
= inmode
;
1338 if (outmode
!= VOIDmode
1339 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1340 rld
[i
].outmode
= outmode
;
1343 rtx in_reg
= inloc
? *inloc
: 0;
1344 /* If we merge reloads for two distinct rtl expressions that
1345 are identical in content, there might be duplicate address
1346 reloads. Remove the extra set now, so that if we later find
1347 that we can inherit this reload, we can get rid of the
1348 address reloads altogether.
1350 Do not do this if both reloads are optional since the result
1351 would be an optional reload which could potentially leave
1352 unresolved address replacements.
1354 It is not sufficient to call transfer_replacements since
1355 choose_reload_regs will remove the replacements for address
1356 reloads of inherited reloads which results in the same
1358 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1359 && ! (rld
[i
].optional
&& optional
))
1361 /* We must keep the address reload with the lower operand
1363 if (opnum
> rld
[i
].opnum
)
1365 remove_address_replacements (in
);
1367 in_reg
= rld
[i
].in_reg
;
1370 remove_address_replacements (rld
[i
].in
);
1373 rld
[i
].in_reg
= in_reg
;
1378 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1380 if (reg_class_subset_p (class, rld
[i
].class))
1381 rld
[i
].class = class;
1382 rld
[i
].optional
&= optional
;
1383 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1384 opnum
, rld
[i
].opnum
))
1385 rld
[i
].when_needed
= RELOAD_OTHER
;
1386 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1389 /* If the ostensible rtx being reloaded differs from the rtx found
1390 in the location to substitute, this reload is not safe to combine
1391 because we cannot reliably tell whether it appears in the insn. */
1393 if (in
!= 0 && in
!= *inloc
)
1394 rld
[i
].nocombine
= 1;
1397 /* This was replaced by changes in find_reloads_address_1 and the new
1398 function inc_for_reload, which go with a new meaning of reload_inc. */
1400 /* If this is an IN/OUT reload in an insn that sets the CC,
1401 it must be for an autoincrement. It doesn't work to store
1402 the incremented value after the insn because that would clobber the CC.
1403 So we must do the increment of the value reloaded from,
1404 increment it, store it back, then decrement again. */
1405 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1409 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1410 /* If we did not find a nonzero amount-to-increment-by,
1411 that contradicts the belief that IN is being incremented
1412 in an address in this insn. */
1413 if (rld
[i
].inc
== 0)
1418 /* If we will replace IN and OUT with the reload-reg,
1419 record where they are located so that substitution need
1420 not do a tree walk. */
1422 if (replace_reloads
)
1426 struct replacement
*r
= &replacements
[n_replacements
++];
1428 r
->subreg_loc
= in_subreg_loc
;
1432 if (outloc
!= 0 && outloc
!= inloc
)
1434 struct replacement
*r
= &replacements
[n_replacements
++];
1437 r
->subreg_loc
= out_subreg_loc
;
1442 /* If this reload is just being introduced and it has both
1443 an incoming quantity and an outgoing quantity that are
1444 supposed to be made to match, see if either one of the two
1445 can serve as the place to reload into.
1447 If one of them is acceptable, set rld[i].reg_rtx
1450 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1452 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1455 earlyclobber_operand_p (out
));
1457 /* If the outgoing register already contains the same value
1458 as the incoming one, we can dispense with loading it.
1459 The easiest way to tell the caller that is to give a phony
1460 value for the incoming operand (same as outgoing one). */
1461 if (rld
[i
].reg_rtx
== out
1462 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1463 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1464 static_reload_reg_p
, i
, inmode
))
1468 /* If this is an input reload and the operand contains a register that
1469 dies in this insn and is used nowhere else, see if it is the right class
1470 to be used for this reload. Use it if so. (This occurs most commonly
1471 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1472 this if it is also an output reload that mentions the register unless
1473 the output is a SUBREG that clobbers an entire register.
1475 Note that the operand might be one of the spill regs, if it is a
1476 pseudo reg and we are in a block where spilling has not taken place.
1477 But if there is no spilling in this block, that is OK.
1478 An explicitly used hard reg cannot be a spill reg. */
1480 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1484 enum machine_mode rel_mode
= inmode
;
1486 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1489 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1490 if (REG_NOTE_KIND (note
) == REG_DEAD
1491 && GET_CODE (XEXP (note
, 0)) == REG
1492 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1493 && reg_mentioned_p (XEXP (note
, 0), in
)
1494 && ! refers_to_regno_for_reload_p (regno
,
1496 + HARD_REGNO_NREGS (regno
,
1498 PATTERN (this_insn
), inloc
)
1499 /* If this is also an output reload, IN cannot be used as
1500 the reload register if it is set in this insn unless IN
1502 && (out
== 0 || in
== out
1503 || ! hard_reg_set_here_p (regno
,
1505 + HARD_REGNO_NREGS (regno
,
1507 PATTERN (this_insn
)))
1508 /* ??? Why is this code so different from the previous?
1509 Is there any simple coherent way to describe the two together?
1510 What's going on here. */
1512 || (GET_CODE (in
) == SUBREG
1513 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1515 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1516 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1517 /* Make sure the operand fits in the reg that dies. */
1518 && (GET_MODE_SIZE (rel_mode
)
1519 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1520 && HARD_REGNO_MODE_OK (regno
, inmode
)
1521 && HARD_REGNO_MODE_OK (regno
, outmode
))
1524 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1525 HARD_REGNO_NREGS (regno
, outmode
));
1527 for (offs
= 0; offs
< nregs
; offs
++)
1528 if (fixed_regs
[regno
+ offs
]
1529 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1535 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1542 output_reloadnum
= i
;
1547 /* Record an additional place we must replace a value
1548 for which we have already recorded a reload.
1549 RELOADNUM is the value returned by push_reload
1550 when the reload was recorded.
1551 This is used in insn patterns that use match_dup. */
1554 push_replacement (loc
, reloadnum
, mode
)
1557 enum machine_mode mode
;
1559 if (replace_reloads
)
1561 struct replacement
*r
= &replacements
[n_replacements
++];
1562 r
->what
= reloadnum
;
1569 /* Duplicate any replacement we have recorded to apply at
1570 location ORIG_LOC to also be performed at DUP_LOC.
1571 This is used in insn patterns that use match_dup. */
1574 dup_replacements (dup_loc
, orig_loc
)
1578 int i
, n
= n_replacements
;
1580 for (i
= 0; i
< n
; i
++)
1582 struct replacement
*r
= &replacements
[i
];
1583 if (r
->where
== orig_loc
)
1584 push_replacement (dup_loc
, r
->what
, r
->mode
);
1588 /* Transfer all replacements that used to be in reload FROM to be in
1592 transfer_replacements (to
, from
)
1597 for (i
= 0; i
< n_replacements
; i
++)
1598 if (replacements
[i
].what
== from
)
1599 replacements
[i
].what
= to
;
1602 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1603 or a subpart of it. If we have any replacements registered for IN_RTX,
1604 cancel the reloads that were supposed to load them.
1605 Return nonzero if we canceled any reloads. */
1607 remove_address_replacements (in_rtx
)
1611 char reload_flags
[MAX_RELOADS
];
1612 int something_changed
= 0;
1614 memset (reload_flags
, 0, sizeof reload_flags
);
1615 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1617 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1618 reload_flags
[replacements
[i
].what
] |= 1;
1621 replacements
[j
++] = replacements
[i
];
1622 reload_flags
[replacements
[i
].what
] |= 2;
1625 /* Note that the following store must be done before the recursive calls. */
1628 for (i
= n_reloads
- 1; i
>= 0; i
--)
1630 if (reload_flags
[i
] == 1)
1632 deallocate_reload_reg (i
);
1633 remove_address_replacements (rld
[i
].in
);
1635 something_changed
= 1;
1638 return something_changed
;
1641 /* If there is only one output reload, and it is not for an earlyclobber
1642 operand, try to combine it with a (logically unrelated) input reload
1643 to reduce the number of reload registers needed.
1645 This is safe if the input reload does not appear in
1646 the value being output-reloaded, because this implies
1647 it is not needed any more once the original insn completes.
1649 If that doesn't work, see we can use any of the registers that
1650 die in this insn as a reload register. We can if it is of the right
1651 class and does not appear in the value being output-reloaded. */
1657 int output_reload
= -1;
1658 int secondary_out
= -1;
1661 /* Find the output reload; return unless there is exactly one
1662 and that one is mandatory. */
1664 for (i
= 0; i
< n_reloads
; i
++)
1665 if (rld
[i
].out
!= 0)
1667 if (output_reload
>= 0)
1672 if (output_reload
< 0 || rld
[output_reload
].optional
)
1675 /* An input-output reload isn't combinable. */
1677 if (rld
[output_reload
].in
!= 0)
1680 /* If this reload is for an earlyclobber operand, we can't do anything. */
1681 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1684 /* If there is a reload for part of the address of this operand, we would
1685 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1686 its life to the point where doing this combine would not lower the
1687 number of spill registers needed. */
1688 for (i
= 0; i
< n_reloads
; i
++)
1689 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1690 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1691 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1694 /* Check each input reload; can we combine it? */
1696 for (i
= 0; i
< n_reloads
; i
++)
1697 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1698 /* Life span of this reload must not extend past main insn. */
1699 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1700 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1701 && rld
[i
].when_needed
!= RELOAD_OTHER
1702 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1703 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1704 rld
[output_reload
].outmode
))
1706 && rld
[i
].reg_rtx
== 0
1707 #ifdef SECONDARY_MEMORY_NEEDED
1708 /* Don't combine two reloads with different secondary
1709 memory locations. */
1710 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1711 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1712 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1713 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1715 && (SMALL_REGISTER_CLASSES
1716 ? (rld
[i
].class == rld
[output_reload
].class)
1717 : (reg_class_subset_p (rld
[i
].class,
1718 rld
[output_reload
].class)
1719 || reg_class_subset_p (rld
[output_reload
].class,
1721 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1722 /* Args reversed because the first arg seems to be
1723 the one that we imagine being modified
1724 while the second is the one that might be affected. */
1725 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1727 /* However, if the input is a register that appears inside
1728 the output, then we also can't share.
1729 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1730 If the same reload reg is used for both reg 69 and the
1731 result to be stored in memory, then that result
1732 will clobber the address of the memory ref. */
1733 && ! (GET_CODE (rld
[i
].in
) == REG
1734 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1735 rld
[output_reload
].out
))))
1736 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1737 && (reg_class_size
[(int) rld
[i
].class]
1738 || SMALL_REGISTER_CLASSES
)
1739 /* We will allow making things slightly worse by combining an
1740 input and an output, but no worse than that. */
1741 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1742 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1746 /* We have found a reload to combine with! */
1747 rld
[i
].out
= rld
[output_reload
].out
;
1748 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1749 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1750 /* Mark the old output reload as inoperative. */
1751 rld
[output_reload
].out
= 0;
1752 /* The combined reload is needed for the entire insn. */
1753 rld
[i
].when_needed
= RELOAD_OTHER
;
1754 /* If the output reload had a secondary reload, copy it. */
1755 if (rld
[output_reload
].secondary_out_reload
!= -1)
1757 rld
[i
].secondary_out_reload
1758 = rld
[output_reload
].secondary_out_reload
;
1759 rld
[i
].secondary_out_icode
1760 = rld
[output_reload
].secondary_out_icode
;
1763 #ifdef SECONDARY_MEMORY_NEEDED
1764 /* Copy any secondary MEM. */
1765 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1766 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1767 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1769 /* If required, minimize the register class. */
1770 if (reg_class_subset_p (rld
[output_reload
].class,
1772 rld
[i
].class = rld
[output_reload
].class;
1774 /* Transfer all replacements from the old reload to the combined. */
1775 for (j
= 0; j
< n_replacements
; j
++)
1776 if (replacements
[j
].what
== output_reload
)
1777 replacements
[j
].what
= i
;
1782 /* If this insn has only one operand that is modified or written (assumed
1783 to be the first), it must be the one corresponding to this reload. It
1784 is safe to use anything that dies in this insn for that output provided
1785 that it does not occur in the output (we already know it isn't an
1786 earlyclobber. If this is an asm insn, give up. */
1788 if (INSN_CODE (this_insn
) == -1)
1791 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1792 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1793 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1796 /* See if some hard register that dies in this insn and is not used in
1797 the output is the right class. Only works if the register we pick
1798 up can fully hold our output reload. */
1799 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1800 if (REG_NOTE_KIND (note
) == REG_DEAD
1801 && GET_CODE (XEXP (note
, 0)) == REG
1802 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1803 rld
[output_reload
].out
)
1804 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1805 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1806 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1807 REGNO (XEXP (note
, 0)))
1808 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1809 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1810 /* Ensure that a secondary or tertiary reload for this output
1811 won't want this register. */
1812 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1813 || (! (TEST_HARD_REG_BIT
1814 (reg_class_contents
[(int) rld
[secondary_out
].class],
1815 REGNO (XEXP (note
, 0))))
1816 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1817 || ! (TEST_HARD_REG_BIT
1818 (reg_class_contents
[(int) rld
[secondary_out
].class],
1819 REGNO (XEXP (note
, 0)))))))
1820 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1822 rld
[output_reload
].reg_rtx
1823 = gen_rtx_REG (rld
[output_reload
].outmode
,
1824 REGNO (XEXP (note
, 0)));
1829 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1830 See if one of IN and OUT is a register that may be used;
1831 this is desirable since a spill-register won't be needed.
1832 If so, return the register rtx that proves acceptable.
1834 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1835 CLASS is the register class required for the reload.
1837 If FOR_REAL is >= 0, it is the number of the reload,
1838 and in some cases when it can be discovered that OUT doesn't need
1839 to be computed, clear out rld[FOR_REAL].out.
1841 If FOR_REAL is -1, this should not be done, because this call
1842 is just to see if a register can be found, not to find and install it.
1844 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1845 puts an additional constraint on being able to use IN for OUT since
1846 IN must not appear elsewhere in the insn (it is assumed that IN itself
1847 is safe from the earlyclobber). */
1850 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1851 inmode
, outmode
, class, for_real
, earlyclobber
)
1852 rtx real_in
, real_out
;
1853 rtx
*inloc
, *outloc
;
1854 enum machine_mode inmode
, outmode
;
1855 enum reg_class
class;
1865 /* If operands exceed a word, we can't use either of them
1866 unless they have the same size. */
1867 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1868 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1869 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1872 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1873 respectively refers to a hard register. */
1875 /* Find the inside of any subregs. */
1876 while (GET_CODE (out
) == SUBREG
)
1878 if (GET_CODE (SUBREG_REG (out
)) == REG
1879 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1880 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1881 GET_MODE (SUBREG_REG (out
)),
1884 out
= SUBREG_REG (out
);
1886 while (GET_CODE (in
) == SUBREG
)
1888 if (GET_CODE (SUBREG_REG (in
)) == REG
1889 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1890 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1891 GET_MODE (SUBREG_REG (in
)),
1894 in
= SUBREG_REG (in
);
1897 /* Narrow down the reg class, the same way push_reload will;
1898 otherwise we might find a dummy now, but push_reload won't. */
1899 class = PREFERRED_RELOAD_CLASS (in
, class);
1901 /* See if OUT will do. */
1902 if (GET_CODE (out
) == REG
1903 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1905 unsigned int regno
= REGNO (out
) + out_offset
;
1906 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1909 /* When we consider whether the insn uses OUT,
1910 ignore references within IN. They don't prevent us
1911 from copying IN into OUT, because those refs would
1912 move into the insn that reloads IN.
1914 However, we only ignore IN in its role as this reload.
1915 If the insn uses IN elsewhere and it contains OUT,
1916 that counts. We can't be sure it's the "same" operand
1917 so it might not go through this reload. */
1919 *inloc
= const0_rtx
;
1921 if (regno
< FIRST_PSEUDO_REGISTER
1922 && HARD_REGNO_MODE_OK (regno
, outmode
)
1923 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1924 PATTERN (this_insn
), outloc
))
1928 for (i
= 0; i
< nwords
; i
++)
1929 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1935 if (GET_CODE (real_out
) == REG
)
1938 value
= gen_rtx_REG (outmode
, regno
);
1945 /* Consider using IN if OUT was not acceptable
1946 or if OUT dies in this insn (like the quotient in a divmod insn).
1947 We can't use IN unless it is dies in this insn,
1948 which means we must know accurately which hard regs are live.
1949 Also, the result can't go in IN if IN is used within OUT,
1950 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1951 if (hard_regs_live_known
1952 && GET_CODE (in
) == REG
1953 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1955 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1956 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1957 && !fixed_regs
[REGNO (in
)]
1958 && HARD_REGNO_MODE_OK (REGNO (in
),
1959 /* The only case where out and real_out might
1960 have different modes is where real_out
1961 is a subreg, and in that case, out
1963 (GET_MODE (out
) != VOIDmode
1964 ? GET_MODE (out
) : outmode
)))
1966 unsigned int regno
= REGNO (in
) + in_offset
;
1967 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1969 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1970 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1971 PATTERN (this_insn
))
1973 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1974 PATTERN (this_insn
), inloc
)))
1978 for (i
= 0; i
< nwords
; i
++)
1979 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1985 /* If we were going to use OUT as the reload reg
1986 and changed our mind, it means OUT is a dummy that
1987 dies here. So don't bother copying value to it. */
1988 if (for_real
>= 0 && value
== real_out
)
1989 rld
[for_real
].out
= 0;
1990 if (GET_CODE (real_in
) == REG
)
1993 value
= gen_rtx_REG (inmode
, regno
);
2001 /* This page contains subroutines used mainly for determining
2002 whether the IN or an OUT of a reload can serve as the
2005 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2008 earlyclobber_operand_p (x
)
2013 for (i
= 0; i
< n_earlyclobbers
; i
++)
2014 if (reload_earlyclobbers
[i
] == x
)
2020 /* Return 1 if expression X alters a hard reg in the range
2021 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2022 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2023 X should be the body of an instruction. */
2026 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
2027 unsigned int beg_regno
, end_regno
;
2030 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2032 rtx op0
= SET_DEST (x
);
2034 while (GET_CODE (op0
) == SUBREG
)
2035 op0
= SUBREG_REG (op0
);
2036 if (GET_CODE (op0
) == REG
)
2038 unsigned int r
= REGNO (op0
);
2040 /* See if this reg overlaps range under consideration. */
2042 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2046 else if (GET_CODE (x
) == PARALLEL
)
2048 int i
= XVECLEN (x
, 0) - 1;
2051 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2058 /* Return 1 if ADDR is a valid memory address for mode MODE,
2059 and check that each pseudo reg has the proper kind of
2063 strict_memory_address_p (mode
, addr
)
2064 enum machine_mode mode ATTRIBUTE_UNUSED
;
2067 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2074 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2075 if they are the same hard reg, and has special hacks for
2076 autoincrement and autodecrement.
2077 This is specifically intended for find_reloads to use
2078 in determining whether two operands match.
2079 X is the operand whose number is the lower of the two.
2081 The value is 2 if Y contains a pre-increment that matches
2082 a non-incrementing address in X. */
2084 /* ??? To be completely correct, we should arrange to pass
2085 for X the output operand and for Y the input operand.
2086 For now, we assume that the output operand has the lower number
2087 because that is natural in (SET output (... input ...)). */
2090 operands_match_p (x
, y
)
2094 RTX_CODE code
= GET_CODE (x
);
2100 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2101 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2102 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2108 i
= REGNO (SUBREG_REG (x
));
2109 if (i
>= FIRST_PSEUDO_REGISTER
)
2111 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2112 GET_MODE (SUBREG_REG (x
)),
2119 if (GET_CODE (y
) == SUBREG
)
2121 j
= REGNO (SUBREG_REG (y
));
2122 if (j
>= FIRST_PSEUDO_REGISTER
)
2124 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2125 GET_MODE (SUBREG_REG (y
)),
2132 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2133 multiple hard register group, so that for example (reg:DI 0) and
2134 (reg:SI 1) will be considered the same register. */
2135 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2136 && i
< FIRST_PSEUDO_REGISTER
)
2137 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2138 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2139 && j
< FIRST_PSEUDO_REGISTER
)
2140 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2144 /* If two operands must match, because they are really a single
2145 operand of an assembler insn, then two postincrements are invalid
2146 because the assembler insn would increment only once.
2147 On the other hand, an postincrement matches ordinary indexing
2148 if the postincrement is the output operand. */
2149 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2150 return operands_match_p (XEXP (x
, 0), y
);
2151 /* Two preincrements are invalid
2152 because the assembler insn would increment only once.
2153 On the other hand, an preincrement matches ordinary indexing
2154 if the preincrement is the input operand.
2155 In this case, return 2, since some callers need to do special
2156 things when this happens. */
2157 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2158 || GET_CODE (y
) == PRE_MODIFY
)
2159 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2163 /* Now we have disposed of all the cases
2164 in which different rtx codes can match. */
2165 if (code
!= GET_CODE (y
))
2167 if (code
== LABEL_REF
)
2168 return XEXP (x
, 0) == XEXP (y
, 0);
2169 if (code
== SYMBOL_REF
)
2170 return XSTR (x
, 0) == XSTR (y
, 0);
2172 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2174 if (GET_MODE (x
) != GET_MODE (y
))
2177 /* Compare the elements. If any pair of corresponding elements
2178 fail to match, return 0 for the whole things. */
2181 fmt
= GET_RTX_FORMAT (code
);
2182 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2188 if (XWINT (x
, i
) != XWINT (y
, i
))
2193 if (XINT (x
, i
) != XINT (y
, i
))
2198 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2201 /* If any subexpression returns 2,
2202 we should return 2 if we are successful. */
2211 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2213 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2215 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2223 /* It is believed that rtx's at this level will never
2224 contain anything but integers and other rtx's,
2225 except for within LABEL_REFs and SYMBOL_REFs. */
2230 return 1 + success_2
;
2233 /* Describe the range of registers or memory referenced by X.
2234 If X is a register, set REG_FLAG and put the first register
2235 number into START and the last plus one into END.
2236 If X is a memory reference, put a base address into BASE
2237 and a range of integer offsets into START and END.
2238 If X is pushing on the stack, we can assume it causes no trouble,
2239 so we set the SAFE field. */
2241 static struct decomposition
2245 struct decomposition val
;
2251 if (GET_CODE (x
) == MEM
)
2253 rtx base
= NULL_RTX
, offset
= 0;
2254 rtx addr
= XEXP (x
, 0);
2256 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2257 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2259 val
.base
= XEXP (addr
, 0);
2260 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2261 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2262 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2266 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2268 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2269 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2270 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2272 val
.base
= XEXP (addr
, 0);
2273 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2274 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2275 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2280 if (GET_CODE (addr
) == CONST
)
2282 addr
= XEXP (addr
, 0);
2285 if (GET_CODE (addr
) == PLUS
)
2287 if (CONSTANT_P (XEXP (addr
, 0)))
2289 base
= XEXP (addr
, 1);
2290 offset
= XEXP (addr
, 0);
2292 else if (CONSTANT_P (XEXP (addr
, 1)))
2294 base
= XEXP (addr
, 0);
2295 offset
= XEXP (addr
, 1);
2302 offset
= const0_rtx
;
2304 if (GET_CODE (offset
) == CONST
)
2305 offset
= XEXP (offset
, 0);
2306 if (GET_CODE (offset
) == PLUS
)
2308 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2310 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2311 offset
= XEXP (offset
, 0);
2313 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2315 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2316 offset
= XEXP (offset
, 1);
2320 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2321 offset
= const0_rtx
;
2324 else if (GET_CODE (offset
) != CONST_INT
)
2326 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2327 offset
= const0_rtx
;
2330 if (all_const
&& GET_CODE (base
) == PLUS
)
2331 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2333 if (GET_CODE (offset
) != CONST_INT
)
2336 val
.start
= INTVAL (offset
);
2337 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2341 else if (GET_CODE (x
) == REG
)
2344 val
.start
= true_regnum (x
);
2347 /* A pseudo with no hard reg. */
2348 val
.start
= REGNO (x
);
2349 val
.end
= val
.start
+ 1;
2353 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2355 else if (GET_CODE (x
) == SUBREG
)
2357 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2358 /* This could be more precise, but it's good enough. */
2359 return decompose (SUBREG_REG (x
));
2361 val
.start
= true_regnum (x
);
2363 return decompose (SUBREG_REG (x
));
2366 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2368 else if (CONSTANT_P (x
)
2369 /* This hasn't been assigned yet, so it can't conflict yet. */
2370 || GET_CODE (x
) == SCRATCH
)
2377 /* Return 1 if altering Y will not modify the value of X.
2378 Y is also described by YDATA, which should be decompose (Y). */
2381 immune_p (x
, y
, ydata
)
2383 struct decomposition ydata
;
2385 struct decomposition xdata
;
2388 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2392 if (GET_CODE (y
) != MEM
)
2394 /* If Y is memory and X is not, Y can't affect X. */
2395 if (GET_CODE (x
) != MEM
)
2398 xdata
= decompose (x
);
2400 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2402 /* If bases are distinct symbolic constants, there is no overlap. */
2403 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2405 /* Constants and stack slots never overlap. */
2406 if (CONSTANT_P (xdata
.base
)
2407 && (ydata
.base
== frame_pointer_rtx
2408 || ydata
.base
== hard_frame_pointer_rtx
2409 || ydata
.base
== stack_pointer_rtx
))
2411 if (CONSTANT_P (ydata
.base
)
2412 && (xdata
.base
== frame_pointer_rtx
2413 || xdata
.base
== hard_frame_pointer_rtx
2414 || xdata
.base
== stack_pointer_rtx
))
2416 /* If either base is variable, we don't know anything. */
2420 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2423 /* Similar, but calls decompose. */
2426 safe_from_earlyclobber (op
, clobber
)
2429 struct decomposition early_data
;
2431 early_data
= decompose (clobber
);
2432 return immune_p (op
, clobber
, early_data
);
2435 /* Main entry point of this file: search the body of INSN
2436 for values that need reloading and record them with push_reload.
2437 REPLACE nonzero means record also where the values occur
2438 so that subst_reloads can be used.
2440 IND_LEVELS says how many levels of indirection are supported by this
2441 machine; a value of zero means that a memory reference is not a valid
2444 LIVE_KNOWN says we have valid information about which hard
2445 regs are live at each point in the program; this is true when
2446 we are called from global_alloc but false when stupid register
2447 allocation has been done.
2449 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2450 which is nonnegative if the reg has been commandeered for reloading into.
2451 It is copied into STATIC_RELOAD_REG_P and referenced from there
2452 by various subroutines.
2454 Return TRUE if some operands need to be changed, because of swapping
2455 commutative operands, reg_equiv_address substitution, or whatever. */
2458 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2460 int replace
, ind_levels
;
2462 short *reload_reg_p
;
2464 int insn_code_number
;
2467 /* These start out as the constraints for the insn
2468 and they are chewed up as we consider alternatives. */
2469 char *constraints
[MAX_RECOG_OPERANDS
];
2470 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2472 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2473 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2474 /* Nonzero for a MEM operand whose entire address needs a reload. */
2475 int address_reloaded
[MAX_RECOG_OPERANDS
];
2476 /* Value of enum reload_type to use for operand. */
2477 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2478 /* Value of enum reload_type to use within address of operand. */
2479 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2480 /* Save the usage of each operand. */
2481 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2482 int no_input_reloads
= 0, no_output_reloads
= 0;
2484 int this_alternative
[MAX_RECOG_OPERANDS
];
2485 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2486 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2487 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2488 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2489 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2491 int goal_alternative
[MAX_RECOG_OPERANDS
];
2492 int this_alternative_number
;
2493 int goal_alternative_number
= 0;
2494 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2495 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2496 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2497 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2498 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2499 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2500 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2501 int goal_alternative_swapped
;
2504 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2505 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2506 rtx body
= PATTERN (insn
);
2507 rtx set
= single_set (insn
);
2508 int goal_earlyclobber
= 0, this_earlyclobber
;
2509 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2515 n_earlyclobbers
= 0;
2516 replace_reloads
= replace
;
2517 hard_regs_live_known
= live_known
;
2518 static_reload_reg_p
= reload_reg_p
;
2520 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2521 neither are insns that SET cc0. Insns that use CC0 are not allowed
2522 to have any input reloads. */
2523 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2524 no_output_reloads
= 1;
2527 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2528 no_input_reloads
= 1;
2529 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2530 no_output_reloads
= 1;
2533 #ifdef SECONDARY_MEMORY_NEEDED
2534 /* The eliminated forms of any secondary memory locations are per-insn, so
2535 clear them out here. */
2537 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2540 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2541 is cheap to move between them. If it is not, there may not be an insn
2542 to do the copy, so we may need a reload. */
2543 if (GET_CODE (body
) == SET
2544 && GET_CODE (SET_DEST (body
)) == REG
2545 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2546 && GET_CODE (SET_SRC (body
)) == REG
2547 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2548 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2549 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2550 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2553 extract_insn (insn
);
2555 noperands
= reload_n_operands
= recog_data
.n_operands
;
2556 n_alternatives
= recog_data
.n_alternatives
;
2558 /* Just return "no reloads" if insn has no operands with constraints. */
2559 if (noperands
== 0 || n_alternatives
== 0)
2562 insn_code_number
= INSN_CODE (insn
);
2563 this_insn_is_asm
= insn_code_number
< 0;
2565 memcpy (operand_mode
, recog_data
.operand_mode
,
2566 noperands
* sizeof (enum machine_mode
));
2567 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2571 /* If we will need to know, later, whether some pair of operands
2572 are the same, we must compare them now and save the result.
2573 Reloading the base and index registers will clobber them
2574 and afterward they will fail to match. */
2576 for (i
= 0; i
< noperands
; i
++)
2581 substed_operand
[i
] = recog_data
.operand
[i
];
2584 modified
[i
] = RELOAD_READ
;
2586 /* Scan this operand's constraint to see if it is an output operand,
2587 an in-out operand, is commutative, or should match another. */
2592 modified
[i
] = RELOAD_WRITE
;
2594 modified
[i
] = RELOAD_READ_WRITE
;
2597 /* The last operand should not be marked commutative. */
2598 if (i
== noperands
- 1)
2603 else if (ISDIGIT (c
))
2605 c
= strtoul (p
- 1, &p
, 10);
2607 operands_match
[c
][i
]
2608 = operands_match_p (recog_data
.operand
[c
],
2609 recog_data
.operand
[i
]);
2611 /* An operand may not match itself. */
2615 /* If C can be commuted with C+1, and C might need to match I,
2616 then C+1 might also need to match I. */
2617 if (commutative
>= 0)
2619 if (c
== commutative
|| c
== commutative
+ 1)
2621 int other
= c
+ (c
== commutative
? 1 : -1);
2622 operands_match
[other
][i
]
2623 = operands_match_p (recog_data
.operand
[other
],
2624 recog_data
.operand
[i
]);
2626 if (i
== commutative
|| i
== commutative
+ 1)
2628 int other
= i
+ (i
== commutative
? 1 : -1);
2629 operands_match
[c
][other
]
2630 = operands_match_p (recog_data
.operand
[c
],
2631 recog_data
.operand
[other
]);
2633 /* Note that C is supposed to be less than I.
2634 No need to consider altering both C and I because in
2635 that case we would alter one into the other. */
2641 /* Examine each operand that is a memory reference or memory address
2642 and reload parts of the addresses into index registers.
2643 Also here any references to pseudo regs that didn't get hard regs
2644 but are equivalent to constants get replaced in the insn itself
2645 with those constants. Nobody will ever see them again.
2647 Finally, set up the preferred classes of each operand. */
2649 for (i
= 0; i
< noperands
; i
++)
2651 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2653 address_reloaded
[i
] = 0;
2654 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2655 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2658 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2659 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2662 if (*constraints
[i
] == 0)
2663 /* Ignore things like match_operator operands. */
2665 else if (constraints
[i
][0] == 'p'
2666 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0]))
2668 find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2669 recog_data
.operand
[i
],
2670 recog_data
.operand_loc
[i
],
2671 i
, operand_type
[i
], ind_levels
, insn
);
2673 /* If we now have a simple operand where we used to have a
2674 PLUS or MULT, re-recognize and try again. */
2675 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2676 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2677 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2678 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2680 INSN_CODE (insn
) = -1;
2681 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2686 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2687 substed_operand
[i
] = recog_data
.operand
[i
];
2689 else if (code
== MEM
)
2692 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2693 recog_data
.operand_loc
[i
],
2694 XEXP (recog_data
.operand
[i
], 0),
2695 &XEXP (recog_data
.operand
[i
], 0),
2696 i
, address_type
[i
], ind_levels
, insn
);
2697 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2698 substed_operand
[i
] = recog_data
.operand
[i
];
2700 else if (code
== SUBREG
)
2702 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2704 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2707 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2709 &address_reloaded
[i
]);
2711 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2712 that didn't get a hard register, emit a USE with a REG_EQUAL
2713 note in front so that we might inherit a previous, possibly
2717 && GET_CODE (op
) == MEM
2718 && GET_CODE (reg
) == REG
2719 && (GET_MODE_SIZE (GET_MODE (reg
))
2720 >= GET_MODE_SIZE (GET_MODE (op
))))
2721 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2723 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2725 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2727 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2728 /* We can get a PLUS as an "operand" as a result of register
2729 elimination. See eliminate_regs and gen_reload. We handle
2730 a unary operator by reloading the operand. */
2731 substed_operand
[i
] = recog_data
.operand
[i
]
2732 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2733 ind_levels
, 0, insn
,
2734 &address_reloaded
[i
]);
2735 else if (code
== REG
)
2737 /* This is equivalent to calling find_reloads_toplev.
2738 The code is duplicated for speed.
2739 When we find a pseudo always equivalent to a constant,
2740 we replace it by the constant. We must be sure, however,
2741 that we don't try to replace it in the insn in which it
2743 int regno
= REGNO (recog_data
.operand
[i
]);
2744 if (reg_equiv_constant
[regno
] != 0
2745 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2747 /* Record the existing mode so that the check if constants are
2748 allowed will work when operand_mode isn't specified. */
2750 if (operand_mode
[i
] == VOIDmode
)
2751 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2753 substed_operand
[i
] = recog_data
.operand
[i
]
2754 = reg_equiv_constant
[regno
];
2756 if (reg_equiv_memory_loc
[regno
] != 0
2757 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2758 /* We need not give a valid is_set_dest argument since the case
2759 of a constant equivalence was checked above. */
2760 substed_operand
[i
] = recog_data
.operand
[i
]
2761 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2762 ind_levels
, 0, insn
,
2763 &address_reloaded
[i
]);
2765 /* If the operand is still a register (we didn't replace it with an
2766 equivalent), get the preferred class to reload it into. */
2767 code
= GET_CODE (recog_data
.operand
[i
]);
2769 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2770 >= FIRST_PSEUDO_REGISTER
)
2771 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2775 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2776 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2779 /* If this is simply a copy from operand 1 to operand 0, merge the
2780 preferred classes for the operands. */
2781 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2782 && recog_data
.operand
[1] == SET_SRC (set
))
2784 preferred_class
[0] = preferred_class
[1]
2785 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2786 pref_or_nothing
[0] |= pref_or_nothing
[1];
2787 pref_or_nothing
[1] |= pref_or_nothing
[0];
2790 /* Now see what we need for pseudo-regs that didn't get hard regs
2791 or got the wrong kind of hard reg. For this, we must consider
2792 all the operands together against the register constraints. */
2794 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2797 goal_alternative_swapped
= 0;
2800 /* The constraints are made of several alternatives.
2801 Each operand's constraint looks like foo,bar,... with commas
2802 separating the alternatives. The first alternatives for all
2803 operands go together, the second alternatives go together, etc.
2805 First loop over alternatives. */
2807 for (this_alternative_number
= 0;
2808 this_alternative_number
< n_alternatives
;
2809 this_alternative_number
++)
2811 /* Loop over operands for one constraint alternative. */
2812 /* LOSERS counts those that don't fit this alternative
2813 and would require loading. */
2815 /* BAD is set to 1 if it some operand can't fit this alternative
2816 even after reloading. */
2818 /* REJECT is a count of how undesirable this alternative says it is
2819 if any reloading is required. If the alternative matches exactly
2820 then REJECT is ignored, but otherwise it gets this much
2821 counted against it in addition to the reloading needed. Each
2822 ? counts three times here since we want the disparaging caused by
2823 a bad register class to only count 1/3 as much. */
2826 this_earlyclobber
= 0;
2828 for (i
= 0; i
< noperands
; i
++)
2830 char *p
= constraints
[i
];
2833 /* 0 => this operand can be reloaded somehow for this alternative. */
2835 /* 0 => this operand can be reloaded if the alternative allows regs. */
2838 rtx operand
= recog_data
.operand
[i
];
2840 /* Nonzero means this is a MEM that must be reloaded into a reg
2841 regardless of what the constraint says. */
2842 int force_reload
= 0;
2844 /* Nonzero if a constant forced into memory would be OK for this
2847 int earlyclobber
= 0;
2849 /* If the predicate accepts a unary operator, it means that
2850 we need to reload the operand, but do not do this for
2851 match_operator and friends. */
2852 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2853 operand
= XEXP (operand
, 0);
2855 /* If the operand is a SUBREG, extract
2856 the REG or MEM (or maybe even a constant) within.
2857 (Constants can occur as a result of reg_equiv_constant.) */
2859 while (GET_CODE (operand
) == SUBREG
)
2861 /* Offset only matters when operand is a REG and
2862 it is a hard reg. This is because it is passed
2863 to reg_fits_class_p if it is a REG and all pseudos
2864 return 0 from that function. */
2865 if (GET_CODE (SUBREG_REG (operand
)) == REG
2866 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2868 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2869 GET_MODE (SUBREG_REG (operand
)),
2870 SUBREG_BYTE (operand
),
2871 GET_MODE (operand
));
2873 operand
= SUBREG_REG (operand
);
2874 /* Force reload if this is a constant or PLUS or if there may
2875 be a problem accessing OPERAND in the outer mode. */
2876 if (CONSTANT_P (operand
)
2877 || GET_CODE (operand
) == PLUS
2878 /* We must force a reload of paradoxical SUBREGs
2879 of a MEM because the alignment of the inner value
2880 may not be enough to do the outer reference. On
2881 big-endian machines, it may also reference outside
2884 On machines that extend byte operations and we have a
2885 SUBREG where both the inner and outer modes are no wider
2886 than a word and the inner mode is narrower, is integral,
2887 and gets extended when loaded from memory, combine.c has
2888 made assumptions about the behavior of the machine in such
2889 register access. If the data is, in fact, in memory we
2890 must always load using the size assumed to be in the
2891 register and let the insn do the different-sized
2894 This is doubly true if WORD_REGISTER_OPERATIONS. In
2895 this case eliminate_regs has left non-paradoxical
2896 subregs for push_reloads to see. Make sure it does
2897 by forcing the reload.
2899 ??? When is it right at this stage to have a subreg
2900 of a mem that is _not_ to be handled specialy? IMO
2901 those should have been reduced to just a mem. */
2902 || ((GET_CODE (operand
) == MEM
2903 || (GET_CODE (operand
)== REG
2904 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2905 #ifndef WORD_REGISTER_OPERATIONS
2906 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2907 < BIGGEST_ALIGNMENT
)
2908 && (GET_MODE_SIZE (operand_mode
[i
])
2909 > GET_MODE_SIZE (GET_MODE (operand
))))
2910 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2911 #ifdef LOAD_EXTEND_OP
2912 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2913 && (GET_MODE_SIZE (GET_MODE (operand
))
2915 && (GET_MODE_SIZE (operand_mode
[i
])
2916 > GET_MODE_SIZE (GET_MODE (operand
)))
2917 && INTEGRAL_MODE_P (GET_MODE (operand
))
2918 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2923 /* This following hunk of code should no longer be
2924 needed at all with SUBREG_BYTE. If you need this
2925 code back, please explain to me why so I can
2926 fix the real problem. -DaveM */
2928 /* Subreg of a hard reg which can't handle the subreg's mode
2929 or which would handle that mode in the wrong number of
2930 registers for subregging to work. */
2931 || (GET_CODE (operand
) == REG
2932 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2933 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2934 && (GET_MODE_SIZE (GET_MODE (operand
))
2936 && ((GET_MODE_SIZE (GET_MODE (operand
))
2938 != HARD_REGNO_NREGS (REGNO (operand
),
2939 GET_MODE (operand
))))
2940 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2947 this_alternative
[i
] = (int) NO_REGS
;
2948 this_alternative_win
[i
] = 0;
2949 this_alternative_match_win
[i
] = 0;
2950 this_alternative_offmemok
[i
] = 0;
2951 this_alternative_earlyclobber
[i
] = 0;
2952 this_alternative_matches
[i
] = -1;
2954 /* An empty constraint or empty alternative
2955 allows anything which matched the pattern. */
2956 if (*p
== 0 || *p
== ',')
2959 /* Scan this alternative's specs for this operand;
2960 set WIN if the operand fits any letter in this alternative.
2961 Otherwise, clear BADOP if this operand could
2962 fit some letter after reloads,
2963 or set WINREG if this operand could fit after reloads
2964 provided the constraint allows some registers. */
2966 while (*p
&& (c
= *p
++) != ',')
2969 case '=': case '+': case '*':
2973 /* The last operand should not be marked commutative. */
2974 if (i
!= noperands
- 1)
2987 /* Ignore rest of this alternative as far as
2988 reloading is concerned. */
2989 while (*p
&& *p
!= ',')
2993 case '0': case '1': case '2': case '3': case '4':
2994 case '5': case '6': case '7': case '8': case '9':
2995 c
= strtoul (p
- 1, &p
, 10);
2997 this_alternative_matches
[i
] = c
;
2998 /* We are supposed to match a previous operand.
2999 If we do, we win if that one did.
3000 If we do not, count both of the operands as losers.
3001 (This is too conservative, since most of the time
3002 only a single reload insn will be needed to make
3003 the two operands win. As a result, this alternative
3004 may be rejected when it is actually desirable.) */
3005 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
3006 /* If we are matching as if two operands were swapped,
3007 also pretend that operands_match had been computed
3009 But if I is the second of those and C is the first,
3010 don't exchange them, because operands_match is valid
3011 only on one side of its diagonal. */
3013 [(c
== commutative
|| c
== commutative
+ 1)
3014 ? 2 * commutative
+ 1 - c
: c
]
3015 [(i
== commutative
|| i
== commutative
+ 1)
3016 ? 2 * commutative
+ 1 - i
: i
])
3017 : operands_match
[c
][i
])
3019 /* If we are matching a non-offsettable address where an
3020 offsettable address was expected, then we must reject
3021 this combination, because we can't reload it. */
3022 if (this_alternative_offmemok
[c
]
3023 && GET_CODE (recog_data
.operand
[c
]) == MEM
3024 && this_alternative
[c
] == (int) NO_REGS
3025 && ! this_alternative_win
[c
])
3028 did_match
= this_alternative_win
[c
];
3032 /* Operands don't match. */
3034 /* Retroactively mark the operand we had to match
3035 as a loser, if it wasn't already. */
3036 if (this_alternative_win
[c
])
3038 this_alternative_win
[c
] = 0;
3039 if (this_alternative
[c
] == (int) NO_REGS
)
3041 /* But count the pair only once in the total badness of
3042 this alternative, if the pair can be a dummy reload. */
3044 = find_dummy_reload (recog_data
.operand
[i
],
3045 recog_data
.operand
[c
],
3046 recog_data
.operand_loc
[i
],
3047 recog_data
.operand_loc
[c
],
3048 operand_mode
[i
], operand_mode
[c
],
3049 this_alternative
[c
], -1,
3050 this_alternative_earlyclobber
[c
]);
3055 /* This can be fixed with reloads if the operand
3056 we are supposed to match can be fixed with reloads. */
3058 this_alternative
[i
] = this_alternative
[c
];
3060 /* If we have to reload this operand and some previous
3061 operand also had to match the same thing as this
3062 operand, we don't know how to do that. So reject this
3064 if (! did_match
|| force_reload
)
3065 for (j
= 0; j
< i
; j
++)
3066 if (this_alternative_matches
[j
]
3067 == this_alternative_matches
[i
])
3072 /* All necessary reloads for an address_operand
3073 were handled in find_reloads_address. */
3074 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3082 if (GET_CODE (operand
) == MEM
3083 || (GET_CODE (operand
) == REG
3084 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3085 && reg_renumber
[REGNO (operand
)] < 0))
3087 if (CONSTANT_P (operand
)
3088 /* force_const_mem does not accept HIGH. */
3089 && GET_CODE (operand
) != HIGH
)
3095 if (GET_CODE (operand
) == MEM
3096 && ! address_reloaded
[i
]
3097 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3098 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3103 if (GET_CODE (operand
) == MEM
3104 && ! address_reloaded
[i
]
3105 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3106 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3110 /* Memory operand whose address is not offsettable. */
3114 if (GET_CODE (operand
) == MEM
3115 && ! (ind_levels
? offsettable_memref_p (operand
)
3116 : offsettable_nonstrict_memref_p (operand
))
3117 /* Certain mem addresses will become offsettable
3118 after they themselves are reloaded. This is important;
3119 we don't want our own handling of unoffsettables
3120 to override the handling of reg_equiv_address. */
3121 && !(GET_CODE (XEXP (operand
, 0)) == REG
3123 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3127 /* Memory operand whose address is offsettable. */
3131 if ((GET_CODE (operand
) == MEM
3132 /* If IND_LEVELS, find_reloads_address won't reload a
3133 pseudo that didn't get a hard reg, so we have to
3134 reject that case. */
3135 && ((ind_levels
? offsettable_memref_p (operand
)
3136 : offsettable_nonstrict_memref_p (operand
))
3137 /* A reloaded address is offsettable because it is now
3138 just a simple register indirect. */
3139 || address_reloaded
[i
]))
3140 || (GET_CODE (operand
) == REG
3141 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3142 && reg_renumber
[REGNO (operand
)] < 0
3143 /* If reg_equiv_address is nonzero, we will be
3144 loading it into a register; hence it will be
3145 offsettable, but we cannot say that reg_equiv_mem
3146 is offsettable without checking. */
3147 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3148 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3149 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3151 /* force_const_mem does not accept HIGH. */
3152 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3153 || GET_CODE (operand
) == MEM
)
3160 /* Output operand that is stored before the need for the
3161 input operands (and their index registers) is over. */
3162 earlyclobber
= 1, this_earlyclobber
= 1;
3167 if (GET_CODE (operand
) == CONST_DOUBLE
3168 || (GET_CODE (operand
) == CONST_VECTOR
3169 && (GET_MODE_CLASS (GET_MODE (operand
))
3170 == MODE_VECTOR_FLOAT
)))
3176 if (GET_CODE (operand
) == CONST_DOUBLE
3177 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3182 if (GET_CODE (operand
) == CONST_INT
3183 || (GET_CODE (operand
) == CONST_DOUBLE
3184 && GET_MODE (operand
) == VOIDmode
))
3187 if (CONSTANT_P (operand
)
3188 #ifdef LEGITIMATE_PIC_OPERAND_P
3189 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3196 if (GET_CODE (operand
) == CONST_INT
3197 || (GET_CODE (operand
) == CONST_DOUBLE
3198 && GET_MODE (operand
) == VOIDmode
))
3210 if (GET_CODE (operand
) == CONST_INT
3211 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3221 /* A PLUS is never a valid operand, but reload can make
3222 it from a register when eliminating registers. */
3223 && GET_CODE (operand
) != PLUS
3224 /* A SCRATCH is not a valid operand. */
3225 && GET_CODE (operand
) != SCRATCH
3226 #ifdef LEGITIMATE_PIC_OPERAND_P
3227 && (! CONSTANT_P (operand
)
3229 || LEGITIMATE_PIC_OPERAND_P (operand
))
3231 && (GENERAL_REGS
== ALL_REGS
3232 || GET_CODE (operand
) != REG
3233 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3234 && reg_renumber
[REGNO (operand
)] < 0)))
3236 /* Drop through into 'r' case. */
3240 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3244 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3246 #ifdef EXTRA_CONSTRAINT
3247 if (EXTRA_MEMORY_CONSTRAINT (c
))
3251 if (EXTRA_CONSTRAINT (operand
, c
))
3253 /* If the address was already reloaded,
3255 if (GET_CODE (operand
) == MEM
&& address_reloaded
[i
])
3257 /* Likewise if the address will be reloaded because
3258 reg_equiv_address is nonzero. For reg_equiv_mem
3259 we have to check. */
3260 if (GET_CODE (operand
) == REG
3261 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3262 && reg_renumber
[REGNO (operand
)] < 0
3263 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3264 && EXTRA_CONSTRAINT (reg_equiv_mem
[REGNO (operand
)], c
))
3265 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3268 /* If we didn't already win, we can reload
3269 constants via force_const_mem, and other
3270 MEMs by reloading the address like for 'o'. */
3271 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3272 || GET_CODE (operand
) == MEM
)
3278 if (EXTRA_ADDRESS_CONSTRAINT (c
))
3280 if (EXTRA_CONSTRAINT (operand
, c
))
3283 /* If we didn't already win, we can reload
3284 the address into a base register. */
3285 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3290 if (EXTRA_CONSTRAINT (operand
, c
))
3297 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3299 if (GET_MODE (operand
) == BLKmode
)
3302 if (GET_CODE (operand
) == REG
3303 && reg_fits_class_p (operand
, this_alternative
[i
],
3304 offset
, GET_MODE (recog_data
.operand
[i
])))
3311 /* If this operand could be handled with a reg,
3312 and some reg is allowed, then this operand can be handled. */
3313 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3316 /* Record which operands fit this alternative. */
3317 this_alternative_earlyclobber
[i
] = earlyclobber
;
3318 if (win
&& ! force_reload
)
3319 this_alternative_win
[i
] = 1;
3320 else if (did_match
&& ! force_reload
)
3321 this_alternative_match_win
[i
] = 1;
3324 int const_to_mem
= 0;
3326 this_alternative_offmemok
[i
] = offmemok
;
3330 /* Alternative loses if it has no regs for a reg operand. */
3331 if (GET_CODE (operand
) == REG
3332 && this_alternative
[i
] == (int) NO_REGS
3333 && this_alternative_matches
[i
] < 0)
3336 /* If this is a constant that is reloaded into the desired
3337 class by copying it to memory first, count that as another
3338 reload. This is consistent with other code and is
3339 required to avoid choosing another alternative when
3340 the constant is moved into memory by this function on
3341 an early reload pass. Note that the test here is
3342 precisely the same as in the code below that calls
3344 if (CONSTANT_P (operand
)
3345 /* force_const_mem does not accept HIGH. */
3346 && GET_CODE (operand
) != HIGH
3347 && ((PREFERRED_RELOAD_CLASS (operand
,
3348 (enum reg_class
) this_alternative
[i
])
3350 || no_input_reloads
)
3351 && operand_mode
[i
] != VOIDmode
)
3354 if (this_alternative
[i
] != (int) NO_REGS
)
3358 /* If we can't reload this value at all, reject this
3359 alternative. Note that we could also lose due to
3360 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3363 if (! CONSTANT_P (operand
)
3364 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3365 && (PREFERRED_RELOAD_CLASS (operand
,
3366 (enum reg_class
) this_alternative
[i
])
3370 /* Alternative loses if it requires a type of reload not
3371 permitted for this insn. We can always reload SCRATCH
3372 and objects with a REG_UNUSED note. */
3373 else if (GET_CODE (operand
) != SCRATCH
3374 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3375 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3377 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3381 /* We prefer to reload pseudos over reloading other things,
3382 since such reloads may be able to be eliminated later.
3383 If we are reloading a SCRATCH, we won't be generating any
3384 insns, just using a register, so it is also preferred.
3385 So bump REJECT in other cases. Don't do this in the
3386 case where we are forcing a constant into memory and
3387 it will then win since we don't want to have a different
3388 alternative match then. */
3389 if (! (GET_CODE (operand
) == REG
3390 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3391 && GET_CODE (operand
) != SCRATCH
3392 && ! (const_to_mem
&& constmemok
))
3395 /* Input reloads can be inherited more often than output
3396 reloads can be removed, so penalize output reloads. */
3397 if (operand_type
[i
] != RELOAD_FOR_INPUT
3398 && GET_CODE (operand
) != SCRATCH
)
3402 /* If this operand is a pseudo register that didn't get a hard
3403 reg and this alternative accepts some register, see if the
3404 class that we want is a subset of the preferred class for this
3405 register. If not, but it intersects that class, use the
3406 preferred class instead. If it does not intersect the preferred
3407 class, show that usage of this alternative should be discouraged;
3408 it will be discouraged more still if the register is `preferred
3409 or nothing'. We do this because it increases the chance of
3410 reusing our spill register in a later insn and avoiding a pair
3411 of memory stores and loads.
3413 Don't bother with this if this alternative will accept this
3416 Don't do this for a multiword operand, since it is only a
3417 small win and has the risk of requiring more spill registers,
3418 which could cause a large loss.
3420 Don't do this if the preferred class has only one register
3421 because we might otherwise exhaust the class. */
3423 if (! win
&& ! did_match
3424 && this_alternative
[i
] != (int) NO_REGS
3425 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3426 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3428 if (! reg_class_subset_p (this_alternative
[i
],
3429 preferred_class
[i
]))
3431 /* Since we don't have a way of forming the intersection,
3432 we just do something special if the preferred class
3433 is a subset of the class we have; that's the most
3434 common case anyway. */
3435 if (reg_class_subset_p (preferred_class
[i
],
3436 this_alternative
[i
]))
3437 this_alternative
[i
] = (int) preferred_class
[i
];
3439 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3444 /* Now see if any output operands that are marked "earlyclobber"
3445 in this alternative conflict with any input operands
3446 or any memory addresses. */
3448 for (i
= 0; i
< noperands
; i
++)
3449 if (this_alternative_earlyclobber
[i
]
3450 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3452 struct decomposition early_data
;
3454 early_data
= decompose (recog_data
.operand
[i
]);
3456 if (modified
[i
] == RELOAD_READ
)
3459 if (this_alternative
[i
] == NO_REGS
)
3461 this_alternative_earlyclobber
[i
] = 0;
3462 if (this_insn_is_asm
)
3463 error_for_asm (this_insn
,
3464 "`&' constraint used with no register class");
3469 for (j
= 0; j
< noperands
; j
++)
3470 /* Is this an input operand or a memory ref? */
3471 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3472 || modified
[j
] != RELOAD_WRITE
)
3474 /* Ignore things like match_operator operands. */
3475 && *recog_data
.constraints
[j
] != 0
3476 /* Don't count an input operand that is constrained to match
3477 the early clobber operand. */
3478 && ! (this_alternative_matches
[j
] == i
3479 && rtx_equal_p (recog_data
.operand
[i
],
3480 recog_data
.operand
[j
]))
3481 /* Is it altered by storing the earlyclobber operand? */
3482 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3485 /* If the output is in a single-reg class,
3486 it's costly to reload it, so reload the input instead. */
3487 if (reg_class_size
[this_alternative
[i
]] == 1
3488 && (GET_CODE (recog_data
.operand
[j
]) == REG
3489 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3492 this_alternative_win
[j
] = 0;
3493 this_alternative_match_win
[j
] = 0;
3498 /* If an earlyclobber operand conflicts with something,
3499 it must be reloaded, so request this and count the cost. */
3503 this_alternative_win
[i
] = 0;
3504 this_alternative_match_win
[j
] = 0;
3505 for (j
= 0; j
< noperands
; j
++)
3506 if (this_alternative_matches
[j
] == i
3507 && this_alternative_match_win
[j
])
3509 this_alternative_win
[j
] = 0;
3510 this_alternative_match_win
[j
] = 0;
3516 /* If one alternative accepts all the operands, no reload required,
3517 choose that alternative; don't consider the remaining ones. */
3520 /* Unswap these so that they are never swapped at `finish'. */
3521 if (commutative
>= 0)
3523 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3524 recog_data
.operand
[commutative
+ 1]
3525 = substed_operand
[commutative
+ 1];
3527 for (i
= 0; i
< noperands
; i
++)
3529 goal_alternative_win
[i
] = this_alternative_win
[i
];
3530 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3531 goal_alternative
[i
] = this_alternative
[i
];
3532 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3533 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3534 goal_alternative_earlyclobber
[i
]
3535 = this_alternative_earlyclobber
[i
];
3537 goal_alternative_number
= this_alternative_number
;
3538 goal_alternative_swapped
= swapped
;
3539 goal_earlyclobber
= this_earlyclobber
;
3543 /* REJECT, set by the ! and ? constraint characters and when a register
3544 would be reloaded into a non-preferred class, discourages the use of
3545 this alternative for a reload goal. REJECT is incremented by six
3546 for each ? and two for each non-preferred class. */
3547 losers
= losers
* 6 + reject
;
3549 /* If this alternative can be made to work by reloading,
3550 and it needs less reloading than the others checked so far,
3551 record it as the chosen goal for reloading. */
3552 if (! bad
&& best
> losers
)
3554 for (i
= 0; i
< noperands
; i
++)
3556 goal_alternative
[i
] = this_alternative
[i
];
3557 goal_alternative_win
[i
] = this_alternative_win
[i
];
3558 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3559 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3560 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3561 goal_alternative_earlyclobber
[i
]
3562 = this_alternative_earlyclobber
[i
];
3564 goal_alternative_swapped
= swapped
;
3566 goal_alternative_number
= this_alternative_number
;
3567 goal_earlyclobber
= this_earlyclobber
;
3571 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3572 then we need to try each alternative twice,
3573 the second time matching those two operands
3574 as if we had exchanged them.
3575 To do this, really exchange them in operands.
3577 If we have just tried the alternatives the second time,
3578 return operands to normal and drop through. */
3580 if (commutative
>= 0)
3585 enum reg_class tclass
;
3588 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3589 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3590 /* Swap the duplicates too. */
3591 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3592 if (recog_data
.dup_num
[i
] == commutative
3593 || recog_data
.dup_num
[i
] == commutative
+ 1)
3594 *recog_data
.dup_loc
[i
]
3595 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3597 tclass
= preferred_class
[commutative
];
3598 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3599 preferred_class
[commutative
+ 1] = tclass
;
3601 t
= pref_or_nothing
[commutative
];
3602 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3603 pref_or_nothing
[commutative
+ 1] = t
;
3605 memcpy (constraints
, recog_data
.constraints
,
3606 noperands
* sizeof (char *));
3611 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3612 recog_data
.operand
[commutative
+ 1]
3613 = substed_operand
[commutative
+ 1];
3614 /* Unswap the duplicates too. */
3615 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3616 if (recog_data
.dup_num
[i
] == commutative
3617 || recog_data
.dup_num
[i
] == commutative
+ 1)
3618 *recog_data
.dup_loc
[i
]
3619 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3623 /* The operands don't meet the constraints.
3624 goal_alternative describes the alternative
3625 that we could reach by reloading the fewest operands.
3626 Reload so as to fit it. */
3628 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3630 /* No alternative works with reloads?? */
3631 if (insn_code_number
>= 0)
3632 fatal_insn ("unable to generate reloads for:", insn
);
3633 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3634 /* Avoid further trouble with this insn. */
3635 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3640 /* Jump to `finish' from above if all operands are valid already.
3641 In that case, goal_alternative_win is all 1. */
3644 /* Right now, for any pair of operands I and J that are required to match,
3646 goal_alternative_matches[J] is I.
3647 Set up goal_alternative_matched as the inverse function:
3648 goal_alternative_matched[I] = J. */
3650 for (i
= 0; i
< noperands
; i
++)
3651 goal_alternative_matched
[i
] = -1;
3653 for (i
= 0; i
< noperands
; i
++)
3654 if (! goal_alternative_win
[i
]
3655 && goal_alternative_matches
[i
] >= 0)
3656 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3658 for (i
= 0; i
< noperands
; i
++)
3659 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3661 /* If the best alternative is with operands 1 and 2 swapped,
3662 consider them swapped before reporting the reloads. Update the
3663 operand numbers of any reloads already pushed. */
3665 if (goal_alternative_swapped
)
3669 tem
= substed_operand
[commutative
];
3670 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3671 substed_operand
[commutative
+ 1] = tem
;
3672 tem
= recog_data
.operand
[commutative
];
3673 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3674 recog_data
.operand
[commutative
+ 1] = tem
;
3675 tem
= *recog_data
.operand_loc
[commutative
];
3676 *recog_data
.operand_loc
[commutative
]
3677 = *recog_data
.operand_loc
[commutative
+ 1];
3678 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3680 for (i
= 0; i
< n_reloads
; i
++)
3682 if (rld
[i
].opnum
== commutative
)
3683 rld
[i
].opnum
= commutative
+ 1;
3684 else if (rld
[i
].opnum
== commutative
+ 1)
3685 rld
[i
].opnum
= commutative
;
3689 for (i
= 0; i
< noperands
; i
++)
3691 operand_reloadnum
[i
] = -1;
3693 /* If this is an earlyclobber operand, we need to widen the scope.
3694 The reload must remain valid from the start of the insn being
3695 reloaded until after the operand is stored into its destination.
3696 We approximate this with RELOAD_OTHER even though we know that we
3697 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3699 One special case that is worth checking is when we have an
3700 output that is earlyclobber but isn't used past the insn (typically
3701 a SCRATCH). In this case, we only need have the reload live
3702 through the insn itself, but not for any of our input or output
3704 But we must not accidentally narrow the scope of an existing
3705 RELOAD_OTHER reload - leave these alone.
3707 In any case, anything needed to address this operand can remain
3708 however they were previously categorized. */
3710 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3712 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3713 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3716 /* Any constants that aren't allowed and can't be reloaded
3717 into registers are here changed into memory references. */
3718 for (i
= 0; i
< noperands
; i
++)
3719 if (! goal_alternative_win
[i
]
3720 && CONSTANT_P (recog_data
.operand
[i
])
3721 /* force_const_mem does not accept HIGH. */
3722 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3723 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3724 (enum reg_class
) goal_alternative
[i
])
3726 || no_input_reloads
)
3727 && operand_mode
[i
] != VOIDmode
)
3729 substed_operand
[i
] = recog_data
.operand
[i
]
3730 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3731 recog_data
.operand
[i
]),
3732 i
, address_type
[i
], ind_levels
, 0, insn
,
3734 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3735 goal_alternative_number
))
3736 goal_alternative_win
[i
] = 1;
3739 /* Record the values of the earlyclobber operands for the caller. */
3740 if (goal_earlyclobber
)
3741 for (i
= 0; i
< noperands
; i
++)
3742 if (goal_alternative_earlyclobber
[i
])
3743 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3745 /* Now record reloads for all the operands that need them. */
3746 for (i
= 0; i
< noperands
; i
++)
3747 if (! goal_alternative_win
[i
])
3749 /* Operands that match previous ones have already been handled. */
3750 if (goal_alternative_matches
[i
] >= 0)
3752 /* Handle an operand with a nonoffsettable address
3753 appearing where an offsettable address will do
3754 by reloading the address into a base register.
3756 ??? We can also do this when the operand is a register and
3757 reg_equiv_mem is not offsettable, but this is a bit tricky,
3758 so we don't bother with it. It may not be worth doing. */
3759 else if (goal_alternative_matched
[i
] == -1
3760 && goal_alternative_offmemok
[i
]
3761 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3763 operand_reloadnum
[i
]
3764 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3765 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3766 MODE_BASE_REG_CLASS (VOIDmode
),
3767 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3768 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3769 rld
[operand_reloadnum
[i
]].inc
3770 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3772 /* If this operand is an output, we will have made any
3773 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3774 now we are treating part of the operand as an input, so
3775 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3777 if (modified
[i
] == RELOAD_WRITE
)
3779 for (j
= 0; j
< n_reloads
; j
++)
3781 if (rld
[j
].opnum
== i
)
3783 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3784 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3785 else if (rld
[j
].when_needed
3786 == RELOAD_FOR_OUTADDR_ADDRESS
)
3787 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3792 else if (goal_alternative_matched
[i
] == -1)
3794 operand_reloadnum
[i
]
3795 = push_reload ((modified
[i
] != RELOAD_WRITE
3796 ? recog_data
.operand
[i
] : 0),
3797 (modified
[i
] != RELOAD_READ
3798 ? recog_data
.operand
[i
] : 0),
3799 (modified
[i
] != RELOAD_WRITE
3800 ? recog_data
.operand_loc
[i
] : 0),
3801 (modified
[i
] != RELOAD_READ
3802 ? recog_data
.operand_loc
[i
] : 0),
3803 (enum reg_class
) goal_alternative
[i
],
3804 (modified
[i
] == RELOAD_WRITE
3805 ? VOIDmode
: operand_mode
[i
]),
3806 (modified
[i
] == RELOAD_READ
3807 ? VOIDmode
: operand_mode
[i
]),
3808 (insn_code_number
< 0 ? 0
3809 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3810 0, i
, operand_type
[i
]);
3812 /* In a matching pair of operands, one must be input only
3813 and the other must be output only.
3814 Pass the input operand as IN and the other as OUT. */
3815 else if (modified
[i
] == RELOAD_READ
3816 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3818 operand_reloadnum
[i
]
3819 = push_reload (recog_data
.operand
[i
],
3820 recog_data
.operand
[goal_alternative_matched
[i
]],
3821 recog_data
.operand_loc
[i
],
3822 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3823 (enum reg_class
) goal_alternative
[i
],
3825 operand_mode
[goal_alternative_matched
[i
]],
3826 0, 0, i
, RELOAD_OTHER
);
3827 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3829 else if (modified
[i
] == RELOAD_WRITE
3830 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3832 operand_reloadnum
[goal_alternative_matched
[i
]]
3833 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3834 recog_data
.operand
[i
],
3835 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3836 recog_data
.operand_loc
[i
],
3837 (enum reg_class
) goal_alternative
[i
],
3838 operand_mode
[goal_alternative_matched
[i
]],
3840 0, 0, i
, RELOAD_OTHER
);
3841 operand_reloadnum
[i
] = output_reloadnum
;
3843 else if (insn_code_number
>= 0)
3847 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3848 /* Avoid further trouble with this insn. */
3849 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3854 else if (goal_alternative_matched
[i
] < 0
3855 && goal_alternative_matches
[i
] < 0
3858 /* For each non-matching operand that's a MEM or a pseudo-register
3859 that didn't get a hard register, make an optional reload.
3860 This may get done even if the insn needs no reloads otherwise. */
3862 rtx operand
= recog_data
.operand
[i
];
3864 while (GET_CODE (operand
) == SUBREG
)
3865 operand
= SUBREG_REG (operand
);
3866 if ((GET_CODE (operand
) == MEM
3867 || (GET_CODE (operand
) == REG
3868 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3869 /* If this is only for an output, the optional reload would not
3870 actually cause us to use a register now, just note that
3871 something is stored here. */
3872 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3873 || modified
[i
] == RELOAD_WRITE
)
3874 && ! no_input_reloads
3875 /* An optional output reload might allow to delete INSN later.
3876 We mustn't make in-out reloads on insns that are not permitted
3878 If this is an asm, we can't delete it; we must not even call
3879 push_reload for an optional output reload in this case,
3880 because we can't be sure that the constraint allows a register,
3881 and push_reload verifies the constraints for asms. */
3882 && (modified
[i
] == RELOAD_READ
3883 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3884 operand_reloadnum
[i
]
3885 = push_reload ((modified
[i
] != RELOAD_WRITE
3886 ? recog_data
.operand
[i
] : 0),
3887 (modified
[i
] != RELOAD_READ
3888 ? recog_data
.operand
[i
] : 0),
3889 (modified
[i
] != RELOAD_WRITE
3890 ? recog_data
.operand_loc
[i
] : 0),
3891 (modified
[i
] != RELOAD_READ
3892 ? recog_data
.operand_loc
[i
] : 0),
3893 (enum reg_class
) goal_alternative
[i
],
3894 (modified
[i
] == RELOAD_WRITE
3895 ? VOIDmode
: operand_mode
[i
]),
3896 (modified
[i
] == RELOAD_READ
3897 ? VOIDmode
: operand_mode
[i
]),
3898 (insn_code_number
< 0 ? 0
3899 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3900 1, i
, operand_type
[i
]);
3901 /* If a memory reference remains (either as a MEM or a pseudo that
3902 did not get a hard register), yet we can't make an optional
3903 reload, check if this is actually a pseudo register reference;
3904 we then need to emit a USE and/or a CLOBBER so that reload
3905 inheritance will do the right thing. */
3907 && (GET_CODE (operand
) == MEM
3908 || (GET_CODE (operand
) == REG
3909 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3910 && reg_renumber
[REGNO (operand
)] < 0)))
3912 operand
= *recog_data
.operand_loc
[i
];
3914 while (GET_CODE (operand
) == SUBREG
)
3915 operand
= SUBREG_REG (operand
);
3916 if (GET_CODE (operand
) == REG
)
3918 if (modified
[i
] != RELOAD_WRITE
)
3919 /* We mark the USE with QImode so that we recognize
3920 it as one that can be safely deleted at the end
3922 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3924 if (modified
[i
] != RELOAD_READ
)
3925 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3929 else if (goal_alternative_matches
[i
] >= 0
3930 && goal_alternative_win
[goal_alternative_matches
[i
]]
3931 && modified
[i
] == RELOAD_READ
3932 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3933 && ! no_input_reloads
&& ! no_output_reloads
3936 /* Similarly, make an optional reload for a pair of matching
3937 objects that are in MEM or a pseudo that didn't get a hard reg. */
3939 rtx operand
= recog_data
.operand
[i
];
3941 while (GET_CODE (operand
) == SUBREG
)
3942 operand
= SUBREG_REG (operand
);
3943 if ((GET_CODE (operand
) == MEM
3944 || (GET_CODE (operand
) == REG
3945 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3946 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3948 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3949 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3950 recog_data
.operand
[i
],
3951 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3952 recog_data
.operand_loc
[i
],
3953 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3954 operand_mode
[goal_alternative_matches
[i
]],
3956 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3959 /* Perform whatever substitutions on the operands we are supposed
3960 to make due to commutativity or replacement of registers
3961 with equivalent constants or memory slots. */
3963 for (i
= 0; i
< noperands
; i
++)
3965 /* We only do this on the last pass through reload, because it is
3966 possible for some data (like reg_equiv_address) to be changed during
3967 later passes. Moreover, we loose the opportunity to get a useful
3968 reload_{in,out}_reg when we do these replacements. */
3972 rtx substitution
= substed_operand
[i
];
3974 *recog_data
.operand_loc
[i
] = substitution
;
3976 /* If we're replacing an operand with a LABEL_REF, we need
3977 to make sure that there's a REG_LABEL note attached to
3978 this instruction. */
3979 if (GET_CODE (insn
) != JUMP_INSN
3980 && GET_CODE (substitution
) == LABEL_REF
3981 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3982 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
3983 XEXP (substitution
, 0),
3987 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3990 /* If this insn pattern contains any MATCH_DUP's, make sure that
3991 they will be substituted if the operands they match are substituted.
3992 Also do now any substitutions we already did on the operands.
3994 Don't do this if we aren't making replacements because we might be
3995 propagating things allocated by frame pointer elimination into places
3996 it doesn't expect. */
3998 if (insn_code_number
>= 0 && replace
)
3999 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4001 int opno
= recog_data
.dup_num
[i
];
4002 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4003 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4007 /* This loses because reloading of prior insns can invalidate the equivalence
4008 (or at least find_equiv_reg isn't smart enough to find it any more),
4009 causing this insn to need more reload regs than it needed before.
4010 It may be too late to make the reload regs available.
4011 Now this optimization is done safely in choose_reload_regs. */
4013 /* For each reload of a reg into some other class of reg,
4014 search for an existing equivalent reg (same value now) in the right class.
4015 We can use it as long as we don't need to change its contents. */
4016 for (i
= 0; i
< n_reloads
; i
++)
4017 if (rld
[i
].reg_rtx
== 0
4019 && GET_CODE (rld
[i
].in
) == REG
4023 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4024 static_reload_reg_p
, 0, rld
[i
].inmode
);
4025 /* Prevent generation of insn to load the value
4026 because the one we found already has the value. */
4028 rld
[i
].in
= rld
[i
].reg_rtx
;
4032 /* Perhaps an output reload can be combined with another
4033 to reduce needs by one. */
4034 if (!goal_earlyclobber
)
4037 /* If we have a pair of reloads for parts of an address, they are reloading
4038 the same object, the operands themselves were not reloaded, and they
4039 are for two operands that are supposed to match, merge the reloads and
4040 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4042 for (i
= 0; i
< n_reloads
; i
++)
4046 for (j
= i
+ 1; j
< n_reloads
; j
++)
4047 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4048 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4049 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4050 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4051 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4052 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4053 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4054 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4055 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4056 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4057 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4058 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4059 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4060 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4061 || (goal_alternative_matches
[rld
[j
].opnum
]
4064 for (k
= 0; k
< n_replacements
; k
++)
4065 if (replacements
[k
].what
== j
)
4066 replacements
[k
].what
= i
;
4068 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4069 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4070 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4072 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4077 /* Scan all the reloads and update their type.
4078 If a reload is for the address of an operand and we didn't reload
4079 that operand, change the type. Similarly, change the operand number
4080 of a reload when two operands match. If a reload is optional, treat it
4081 as though the operand isn't reloaded.
4083 ??? This latter case is somewhat odd because if we do the optional
4084 reload, it means the object is hanging around. Thus we need only
4085 do the address reload if the optional reload was NOT done.
4087 Change secondary reloads to be the address type of their operand, not
4090 If an operand's reload is now RELOAD_OTHER, change any
4091 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4092 RELOAD_FOR_OTHER_ADDRESS. */
4094 for (i
= 0; i
< n_reloads
; i
++)
4096 if (rld
[i
].secondary_p
4097 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4098 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4100 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4101 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4102 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4103 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4104 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4105 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4107 /* If we have a secondary reload to go along with this reload,
4108 change its type to RELOAD_FOR_OPADDR_ADDR. */
4110 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4111 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4112 && rld
[i
].secondary_in_reload
!= -1)
4114 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4116 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4118 /* If there's a tertiary reload we have to change it also. */
4119 if (secondary_in_reload
> 0
4120 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4121 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4122 = RELOAD_FOR_OPADDR_ADDR
;
4125 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4126 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4127 && rld
[i
].secondary_out_reload
!= -1)
4129 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4131 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4133 /* If there's a tertiary reload we have to change it also. */
4134 if (secondary_out_reload
4135 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4136 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4137 = RELOAD_FOR_OPADDR_ADDR
;
4140 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4141 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4142 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4144 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4147 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4148 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4149 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4150 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4152 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4154 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4155 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4158 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4159 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4160 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4162 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4163 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4164 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4165 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4166 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4167 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4168 This is complicated by the fact that a single operand can have more
4169 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4170 choose_reload_regs without affecting code quality, and cases that
4171 actually fail are extremely rare, so it turns out to be better to fix
4172 the problem here by not generating cases that choose_reload_regs will
4174 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4175 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4177 We can reduce the register pressure by exploiting that a
4178 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4179 does not conflict with any of them, if it is only used for the first of
4180 the RELOAD_FOR_X_ADDRESS reloads. */
4182 int first_op_addr_num
= -2;
4183 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4184 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4185 int need_change
= 0;
4186 /* We use last_op_addr_reload and the contents of the above arrays
4187 first as flags - -2 means no instance encountered, -1 means exactly
4188 one instance encountered.
4189 If more than one instance has been encountered, we store the reload
4190 number of the first reload of the kind in question; reload numbers
4191 are known to be non-negative. */
4192 for (i
= 0; i
< noperands
; i
++)
4193 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4194 for (i
= n_reloads
- 1; i
>= 0; i
--)
4196 switch (rld
[i
].when_needed
)
4198 case RELOAD_FOR_OPERAND_ADDRESS
:
4199 if (++first_op_addr_num
>= 0)
4201 first_op_addr_num
= i
;
4205 case RELOAD_FOR_INPUT_ADDRESS
:
4206 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4208 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4212 case RELOAD_FOR_OUTPUT_ADDRESS
:
4213 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4215 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4226 for (i
= 0; i
< n_reloads
; i
++)
4229 enum reload_type type
;
4231 switch (rld
[i
].when_needed
)
4233 case RELOAD_FOR_OPADDR_ADDR
:
4234 first_num
= first_op_addr_num
;
4235 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4237 case RELOAD_FOR_INPADDR_ADDRESS
:
4238 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4239 type
= RELOAD_FOR_INPUT_ADDRESS
;
4241 case RELOAD_FOR_OUTADDR_ADDRESS
:
4242 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4243 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4250 else if (i
> first_num
)
4251 rld
[i
].when_needed
= type
;
4254 /* Check if the only TYPE reload that uses reload I is
4255 reload FIRST_NUM. */
4256 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4258 if (rld
[j
].when_needed
== type
4259 && (rld
[i
].secondary_p
4260 ? rld
[j
].secondary_in_reload
== i
4261 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4263 rld
[i
].when_needed
= type
;
4272 /* See if we have any reloads that are now allowed to be merged
4273 because we've changed when the reload is needed to
4274 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4275 check for the most common cases. */
4277 for (i
= 0; i
< n_reloads
; i
++)
4278 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4279 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4280 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4281 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4282 for (j
= 0; j
< n_reloads
; j
++)
4283 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4284 && rld
[j
].when_needed
== rld
[i
].when_needed
4285 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4286 && rld
[i
].class == rld
[j
].class
4287 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4288 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4290 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4291 transfer_replacements (i
, j
);
4296 /* If we made any reloads for addresses, see if they violate a
4297 "no input reloads" requirement for this insn. But loads that we
4298 do after the insn (such as for output addresses) are fine. */
4299 if (no_input_reloads
)
4300 for (i
= 0; i
< n_reloads
; i
++)
4302 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4303 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4307 /* Compute reload_mode and reload_nregs. */
4308 for (i
= 0; i
< n_reloads
; i
++)
4311 = (rld
[i
].inmode
== VOIDmode
4312 || (GET_MODE_SIZE (rld
[i
].outmode
)
4313 > GET_MODE_SIZE (rld
[i
].inmode
)))
4314 ? rld
[i
].outmode
: rld
[i
].inmode
;
4316 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4319 /* Special case a simple move with an input reload and a
4320 destination of a hard reg, if the hard reg is ok, use it. */
4321 for (i
= 0; i
< n_reloads
; i
++)
4322 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4323 && GET_CODE (PATTERN (insn
)) == SET
4324 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4325 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4327 rtx dest
= SET_DEST (PATTERN (insn
));
4328 unsigned int regno
= REGNO (dest
);
4330 if (regno
< FIRST_PSEUDO_REGISTER
4331 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4332 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4333 rld
[i
].reg_rtx
= dest
;
4339 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4340 accepts a memory operand with constant address. */
4343 alternative_allows_memconst (constraint
, altnum
)
4344 const char *constraint
;
4348 /* Skip alternatives before the one requested. */
4351 while (*constraint
++ != ',');
4354 /* Scan the requested alternative for 'm' or 'o'.
4355 If one of them is present, this alternative accepts memory constants. */
4356 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4357 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
))
4362 /* Scan X for memory references and scan the addresses for reloading.
4363 Also checks for references to "constant" regs that we want to eliminate
4364 and replaces them with the values they stand for.
4365 We may alter X destructively if it contains a reference to such.
4366 If X is just a constant reg, we return the equivalent value
4369 IND_LEVELS says how many levels of indirect addressing this machine
4372 OPNUM and TYPE identify the purpose of the reload.
4374 IS_SET_DEST is true if X is the destination of a SET, which is not
4375 appropriate to be replaced by a constant.
4377 INSN, if nonzero, is the insn in which we do the reload. It is used
4378 to determine if we may generate output reloads, and where to put USEs
4379 for pseudos that we have to replace with stack slots.
4381 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4382 result of find_reloads_address. */
4385 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4389 enum reload_type type
;
4393 int *address_reloaded
;
4395 RTX_CODE code
= GET_CODE (x
);
4397 const char *fmt
= GET_RTX_FORMAT (code
);
4403 /* This code is duplicated for speed in find_reloads. */
4404 int regno
= REGNO (x
);
4405 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4406 x
= reg_equiv_constant
[regno
];
4408 /* This creates (subreg (mem...)) which would cause an unnecessary
4409 reload of the mem. */
4410 else if (reg_equiv_mem
[regno
] != 0)
4411 x
= reg_equiv_mem
[regno
];
4413 else if (reg_equiv_memory_loc
[regno
]
4414 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4416 rtx mem
= make_memloc (x
, regno
);
4417 if (reg_equiv_address
[regno
]
4418 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4420 /* If this is not a toplevel operand, find_reloads doesn't see
4421 this substitution. We have to emit a USE of the pseudo so
4422 that delete_output_reload can see it. */
4423 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4424 /* We mark the USE with QImode so that we recognize it
4425 as one that can be safely deleted at the end of
4427 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4430 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4431 opnum
, type
, ind_levels
, insn
);
4432 if (address_reloaded
)
4433 *address_reloaded
= i
;
4442 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4443 opnum
, type
, ind_levels
, insn
);
4444 if (address_reloaded
)
4445 *address_reloaded
= i
;
4450 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4452 /* Check for SUBREG containing a REG that's equivalent to a constant.
4453 If the constant has a known value, truncate it right now.
4454 Similarly if we are extracting a single-word of a multi-word
4455 constant. If the constant is symbolic, allow it to be substituted
4456 normally. push_reload will strip the subreg later. If the
4457 constant is VOIDmode, abort because we will lose the mode of
4458 the register (this should never happen because one of the cases
4459 above should handle it). */
4461 int regno
= REGNO (SUBREG_REG (x
));
4464 if (subreg_lowpart_p (x
)
4465 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4466 && reg_equiv_constant
[regno
] != 0
4467 && (tem
= gen_lowpart_common (GET_MODE (x
),
4468 reg_equiv_constant
[regno
])) != 0)
4471 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4472 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4473 && reg_equiv_constant
[regno
] != 0)
4476 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4477 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4483 /* If the subreg contains a reg that will be converted to a mem,
4484 convert the subreg to a narrower memref now.
4485 Otherwise, we would get (subreg (mem ...) ...),
4486 which would force reload of the mem.
4488 We also need to do this if there is an equivalent MEM that is
4489 not offsettable. In that case, alter_subreg would produce an
4490 invalid address on big-endian machines.
4492 For machines that extend byte loads, we must not reload using
4493 a wider mode if we have a paradoxical SUBREG. find_reloads will
4494 force a reload in that case. So we should not do anything here. */
4496 else if (regno
>= FIRST_PSEUDO_REGISTER
4497 #ifdef LOAD_EXTEND_OP
4498 && (GET_MODE_SIZE (GET_MODE (x
))
4499 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4501 && (reg_equiv_address
[regno
] != 0
4502 || (reg_equiv_mem
[regno
] != 0
4503 && (! strict_memory_address_p (GET_MODE (x
),
4504 XEXP (reg_equiv_mem
[regno
], 0))
4505 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4506 || num_not_at_initial_offset
))))
4507 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4511 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4515 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4516 ind_levels
, is_set_dest
, insn
,
4518 /* If we have replaced a reg with it's equivalent memory loc -
4519 that can still be handled here e.g. if it's in a paradoxical
4520 subreg - we must make the change in a copy, rather than using
4521 a destructive change. This way, find_reloads can still elect
4522 not to do the change. */
4523 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4525 x
= shallow_copy_rtx (x
);
4528 XEXP (x
, i
) = new_part
;
4534 /* Return a mem ref for the memory equivalent of reg REGNO.
4535 This mem ref is not shared with anything. */
4538 make_memloc (ad
, regno
)
4542 /* We must rerun eliminate_regs, in case the elimination
4543 offsets have changed. */
4545 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4547 /* If TEM might contain a pseudo, we must copy it to avoid
4548 modifying it when we do the substitution for the reload. */
4549 if (rtx_varies_p (tem
, 0))
4550 tem
= copy_rtx (tem
);
4552 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4553 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4555 /* Copy the result if it's still the same as the equivalence, to avoid
4556 modifying it when we do the substitution for the reload. */
4557 if (tem
== reg_equiv_memory_loc
[regno
])
4558 tem
= copy_rtx (tem
);
4562 /* Record all reloads needed for handling memory address AD
4563 which appears in *LOC in a memory reference to mode MODE
4564 which itself is found in location *MEMREFLOC.
4565 Note that we take shortcuts assuming that no multi-reg machine mode
4566 occurs as part of an address.
4568 OPNUM and TYPE specify the purpose of this reload.
4570 IND_LEVELS says how many levels of indirect addressing this machine
4573 INSN, if nonzero, is the insn in which we do the reload. It is used
4574 to determine if we may generate output reloads, and where to put USEs
4575 for pseudos that we have to replace with stack slots.
4577 Value is nonzero if this address is reloaded or replaced as a whole.
4578 This is interesting to the caller if the address is an autoincrement.
4580 Note that there is no verification that the address will be valid after
4581 this routine does its work. Instead, we rely on the fact that the address
4582 was valid when reload started. So we need only undo things that reload
4583 could have broken. These are wrong register types, pseudos not allocated
4584 to a hard register, and frame pointer elimination. */
4587 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4588 enum machine_mode mode
;
4593 enum reload_type type
;
4598 int removed_and
= 0;
4601 /* If the address is a register, see if it is a legitimate address and
4602 reload if not. We first handle the cases where we need not reload
4603 or where we must reload in a non-standard way. */
4605 if (GET_CODE (ad
) == REG
)
4609 /* If the register is equivalent to an invariant expression, substitute
4610 the invariant, and eliminate any eliminable register references. */
4611 tem
= reg_equiv_constant
[regno
];
4613 && (tem
= eliminate_regs (tem
, mode
, insn
))
4614 && strict_memory_address_p (mode
, tem
))
4620 tem
= reg_equiv_memory_loc
[regno
];
4623 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4625 tem
= make_memloc (ad
, regno
);
4626 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4628 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4629 &XEXP (tem
, 0), opnum
,
4630 ADDR_TYPE (type
), ind_levels
, insn
);
4632 /* We can avoid a reload if the register's equivalent memory
4633 expression is valid as an indirect memory address.
4634 But not all addresses are valid in a mem used as an indirect
4635 address: only reg or reg+constant. */
4638 && strict_memory_address_p (mode
, tem
)
4639 && (GET_CODE (XEXP (tem
, 0)) == REG
4640 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4641 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4642 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4644 /* TEM is not the same as what we'll be replacing the
4645 pseudo with after reload, put a USE in front of INSN
4646 in the final reload pass. */
4648 && num_not_at_initial_offset
4649 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4652 /* We mark the USE with QImode so that we
4653 recognize it as one that can be safely
4654 deleted at the end of reload. */
4655 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4658 /* This doesn't really count as replacing the address
4659 as a whole, since it is still a memory access. */
4667 /* The only remaining case where we can avoid a reload is if this is a
4668 hard register that is valid as a base register and which is not the
4669 subject of a CLOBBER in this insn. */
4671 else if (regno
< FIRST_PSEUDO_REGISTER
4672 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4673 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4676 /* If we do not have one of the cases above, we must do the reload. */
4677 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4678 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4682 if (strict_memory_address_p (mode
, ad
))
4684 /* The address appears valid, so reloads are not needed.
4685 But the address may contain an eliminable register.
4686 This can happen because a machine with indirect addressing
4687 may consider a pseudo register by itself a valid address even when
4688 it has failed to get a hard reg.
4689 So do a tree-walk to find and eliminate all such regs. */
4691 /* But first quickly dispose of a common case. */
4692 if (GET_CODE (ad
) == PLUS
4693 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4694 && GET_CODE (XEXP (ad
, 0)) == REG
4695 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4698 subst_reg_equivs_changed
= 0;
4699 *loc
= subst_reg_equivs (ad
, insn
);
4701 if (! subst_reg_equivs_changed
)
4704 /* Check result for validity after substitution. */
4705 if (strict_memory_address_p (mode
, ad
))
4709 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4714 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4719 *memrefloc
= copy_rtx (*memrefloc
);
4720 XEXP (*memrefloc
, 0) = ad
;
4721 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4727 /* The address is not valid. We have to figure out why. First see if
4728 we have an outer AND and remove it if so. Then analyze what's inside. */
4730 if (GET_CODE (ad
) == AND
)
4733 loc
= &XEXP (ad
, 0);
4737 /* One possibility for why the address is invalid is that it is itself
4738 a MEM. This can happen when the frame pointer is being eliminated, a
4739 pseudo is not allocated to a hard register, and the offset between the
4740 frame and stack pointers is not its initial value. In that case the
4741 pseudo will have been replaced by a MEM referring to the
4743 if (GET_CODE (ad
) == MEM
)
4745 /* First ensure that the address in this MEM is valid. Then, unless
4746 indirect addresses are valid, reload the MEM into a register. */
4748 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4749 opnum
, ADDR_TYPE (type
),
4750 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4752 /* If tem was changed, then we must create a new memory reference to
4753 hold it and store it back into memrefloc. */
4754 if (tem
!= ad
&& memrefloc
)
4756 *memrefloc
= copy_rtx (*memrefloc
);
4757 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4758 loc
= &XEXP (*memrefloc
, 0);
4760 loc
= &XEXP (*loc
, 0);
4763 /* Check similar cases as for indirect addresses as above except
4764 that we can allow pseudos and a MEM since they should have been
4765 taken care of above. */
4768 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4769 || GET_CODE (XEXP (tem
, 0)) == MEM
4770 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4771 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4772 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4773 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4775 /* Must use TEM here, not AD, since it is the one that will
4776 have any subexpressions reloaded, if needed. */
4777 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4778 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4781 return ! removed_and
;
4787 /* If we have address of a stack slot but it's not valid because the
4788 displacement is too large, compute the sum in a register.
4789 Handle all base registers here, not just fp/ap/sp, because on some
4790 targets (namely SH) we can also get too large displacements from
4791 big-endian corrections. */
4792 else if (GET_CODE (ad
) == PLUS
4793 && GET_CODE (XEXP (ad
, 0)) == REG
4794 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4795 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4796 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4798 /* Unshare the MEM rtx so we can safely alter it. */
4801 *memrefloc
= copy_rtx (*memrefloc
);
4802 loc
= &XEXP (*memrefloc
, 0);
4804 loc
= &XEXP (*loc
, 0);
4807 if (double_reg_address_ok
)
4809 /* Unshare the sum as well. */
4810 *loc
= ad
= copy_rtx (ad
);
4812 /* Reload the displacement into an index reg.
4813 We assume the frame pointer or arg pointer is a base reg. */
4814 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4815 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4821 /* If the sum of two regs is not necessarily valid,
4822 reload the sum into a base reg.
4823 That will at least work. */
4824 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4825 Pmode
, opnum
, type
, ind_levels
);
4827 return ! removed_and
;
4830 /* If we have an indexed stack slot, there are three possible reasons why
4831 it might be invalid: The index might need to be reloaded, the address
4832 might have been made by frame pointer elimination and hence have a
4833 constant out of range, or both reasons might apply.
4835 We can easily check for an index needing reload, but even if that is the
4836 case, we might also have an invalid constant. To avoid making the
4837 conservative assumption and requiring two reloads, we see if this address
4838 is valid when not interpreted strictly. If it is, the only problem is
4839 that the index needs a reload and find_reloads_address_1 will take care
4842 If we decide to do something here, it must be that
4843 `double_reg_address_ok' is true and that this address rtl was made by
4844 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4845 rework the sum so that the reload register will be added to the index.
4846 This is safe because we know the address isn't shared.
4848 We check for fp/ap/sp as both the first and second operand of the
4851 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4852 && GET_CODE (XEXP (ad
, 0)) == PLUS
4853 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4854 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4855 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4857 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4858 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4860 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4861 && ! memory_address_p (mode
, ad
))
4863 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4864 plus_constant (XEXP (XEXP (ad
, 0), 0),
4865 INTVAL (XEXP (ad
, 1))),
4866 XEXP (XEXP (ad
, 0), 1));
4867 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4868 MODE_BASE_REG_CLASS (mode
),
4869 GET_MODE (ad
), opnum
, type
, ind_levels
);
4870 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4876 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4877 && GET_CODE (XEXP (ad
, 0)) == PLUS
4878 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4879 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4880 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4882 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4883 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4885 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4886 && ! memory_address_p (mode
, ad
))
4888 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4889 XEXP (XEXP (ad
, 0), 0),
4890 plus_constant (XEXP (XEXP (ad
, 0), 1),
4891 INTVAL (XEXP (ad
, 1))));
4892 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4893 MODE_BASE_REG_CLASS (mode
),
4894 GET_MODE (ad
), opnum
, type
, ind_levels
);
4895 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4901 /* See if address becomes valid when an eliminable register
4902 in a sum is replaced. */
4905 if (GET_CODE (ad
) == PLUS
)
4906 tem
= subst_indexed_address (ad
);
4907 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4909 /* Ok, we win that way. Replace any additional eliminable
4912 subst_reg_equivs_changed
= 0;
4913 tem
= subst_reg_equivs (tem
, insn
);
4915 /* Make sure that didn't make the address invalid again. */
4917 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4924 /* If constants aren't valid addresses, reload the constant address
4926 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4928 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4929 Unshare it so we can safely alter it. */
4930 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4931 && CONSTANT_POOL_ADDRESS_P (ad
))
4933 *memrefloc
= copy_rtx (*memrefloc
);
4934 loc
= &XEXP (*memrefloc
, 0);
4936 loc
= &XEXP (*loc
, 0);
4939 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4940 Pmode
, opnum
, type
, ind_levels
);
4941 return ! removed_and
;
4944 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4948 /* Find all pseudo regs appearing in AD
4949 that are eliminable in favor of equivalent values
4950 and do not have hard regs; replace them by their equivalents.
4951 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4952 front of it for pseudos that we have to replace with stack slots. */
4955 subst_reg_equivs (ad
, insn
)
4959 RTX_CODE code
= GET_CODE (ad
);
4978 int regno
= REGNO (ad
);
4980 if (reg_equiv_constant
[regno
] != 0)
4982 subst_reg_equivs_changed
= 1;
4983 return reg_equiv_constant
[regno
];
4985 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4987 rtx mem
= make_memloc (ad
, regno
);
4988 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4990 subst_reg_equivs_changed
= 1;
4991 /* We mark the USE with QImode so that we recognize it
4992 as one that can be safely deleted at the end of
4994 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5003 /* Quickly dispose of a common case. */
5004 if (XEXP (ad
, 0) == frame_pointer_rtx
5005 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5013 fmt
= GET_RTX_FORMAT (code
);
5014 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5016 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5020 /* Compute the sum of X and Y, making canonicalizations assumed in an
5021 address, namely: sum constant integers, surround the sum of two
5022 constants with a CONST, put the constant as the second operand, and
5023 group the constant on the outermost sum.
5025 This routine assumes both inputs are already in canonical form. */
5032 enum machine_mode mode
= GET_MODE (x
);
5034 if (mode
== VOIDmode
)
5035 mode
= GET_MODE (y
);
5037 if (mode
== VOIDmode
)
5040 if (GET_CODE (x
) == CONST_INT
)
5041 return plus_constant (y
, INTVAL (x
));
5042 else if (GET_CODE (y
) == CONST_INT
)
5043 return plus_constant (x
, INTVAL (y
));
5044 else if (CONSTANT_P (x
))
5045 tem
= x
, x
= y
, y
= tem
;
5047 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5048 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5050 /* Note that if the operands of Y are specified in the opposite
5051 order in the recursive calls below, infinite recursion will occur. */
5052 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5053 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5055 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5056 constant will have been placed second. */
5057 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5059 if (GET_CODE (x
) == CONST
)
5061 if (GET_CODE (y
) == CONST
)
5064 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5067 return gen_rtx_PLUS (mode
, x
, y
);
5070 /* If ADDR is a sum containing a pseudo register that should be
5071 replaced with a constant (from reg_equiv_constant),
5072 return the result of doing so, and also apply the associative
5073 law so that the result is more likely to be a valid address.
5074 (But it is not guaranteed to be one.)
5076 Note that at most one register is replaced, even if more are
5077 replaceable. Also, we try to put the result into a canonical form
5078 so it is more likely to be a valid address.
5080 In all other cases, return ADDR. */
5083 subst_indexed_address (addr
)
5086 rtx op0
= 0, op1
= 0, op2
= 0;
5090 if (GET_CODE (addr
) == PLUS
)
5092 /* Try to find a register to replace. */
5093 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5094 if (GET_CODE (op0
) == REG
5095 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5096 && reg_renumber
[regno
] < 0
5097 && reg_equiv_constant
[regno
] != 0)
5098 op0
= reg_equiv_constant
[regno
];
5099 else if (GET_CODE (op1
) == REG
5100 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5101 && reg_renumber
[regno
] < 0
5102 && reg_equiv_constant
[regno
] != 0)
5103 op1
= reg_equiv_constant
[regno
];
5104 else if (GET_CODE (op0
) == PLUS
5105 && (tem
= subst_indexed_address (op0
)) != op0
)
5107 else if (GET_CODE (op1
) == PLUS
5108 && (tem
= subst_indexed_address (op1
)) != op1
)
5113 /* Pick out up to three things to add. */
5114 if (GET_CODE (op1
) == PLUS
)
5115 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5116 else if (GET_CODE (op0
) == PLUS
)
5117 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5119 /* Compute the sum. */
5121 op1
= form_sum (op1
, op2
);
5123 op0
= form_sum (op0
, op1
);
5130 /* Update the REG_INC notes for an insn. It updates all REG_INC
5131 notes for the instruction which refer to REGNO the to refer
5132 to the reload number.
5134 INSN is the insn for which any REG_INC notes need updating.
5136 REGNO is the register number which has been reloaded.
5138 RELOADNUM is the reload number. */
5141 update_auto_inc_notes (insn
, regno
, reloadnum
)
5142 rtx insn ATTRIBUTE_UNUSED
;
5143 int regno ATTRIBUTE_UNUSED
;
5144 int reloadnum ATTRIBUTE_UNUSED
;
5149 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5150 if (REG_NOTE_KIND (link
) == REG_INC
5151 && REGNO (XEXP (link
, 0)) == regno
)
5152 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5156 /* Record the pseudo registers we must reload into hard registers in a
5157 subexpression of a would-be memory address, X referring to a value
5158 in mode MODE. (This function is not called if the address we find
5161 CONTEXT = 1 means we are considering regs as index regs,
5162 = 0 means we are considering them as base regs.
5164 OPNUM and TYPE specify the purpose of any reloads made.
5166 IND_LEVELS says how many levels of indirect addressing are
5167 supported at this point in the address.
5169 INSN, if nonzero, is the insn in which we do the reload. It is used
5170 to determine if we may generate output reloads.
5172 We return nonzero if X, as a whole, is reloaded or replaced. */
5174 /* Note that we take shortcuts assuming that no multi-reg machine mode
5175 occurs as part of an address.
5176 Also, this is not fully machine-customizable; it works for machines
5177 such as VAXen and 68000's and 32000's, but other possible machines
5178 could have addressing modes that this does not handle right. */
5181 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5182 enum machine_mode mode
;
5187 enum reload_type type
;
5191 RTX_CODE code
= GET_CODE (x
);
5197 rtx orig_op0
= XEXP (x
, 0);
5198 rtx orig_op1
= XEXP (x
, 1);
5199 RTX_CODE code0
= GET_CODE (orig_op0
);
5200 RTX_CODE code1
= GET_CODE (orig_op1
);
5204 if (GET_CODE (op0
) == SUBREG
)
5206 op0
= SUBREG_REG (op0
);
5207 code0
= GET_CODE (op0
);
5208 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5209 op0
= gen_rtx_REG (word_mode
,
5211 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5212 GET_MODE (SUBREG_REG (orig_op0
)),
5213 SUBREG_BYTE (orig_op0
),
5214 GET_MODE (orig_op0
))));
5217 if (GET_CODE (op1
) == SUBREG
)
5219 op1
= SUBREG_REG (op1
);
5220 code1
= GET_CODE (op1
);
5221 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5222 /* ??? Why is this given op1's mode and above for
5223 ??? op0 SUBREGs we use word_mode? */
5224 op1
= gen_rtx_REG (GET_MODE (op1
),
5226 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5227 GET_MODE (SUBREG_REG (orig_op1
)),
5228 SUBREG_BYTE (orig_op1
),
5229 GET_MODE (orig_op1
))));
5232 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5233 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5235 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5236 type
, ind_levels
, insn
);
5237 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5238 type
, ind_levels
, insn
);
5241 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5242 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5244 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5245 type
, ind_levels
, insn
);
5246 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5247 type
, ind_levels
, insn
);
5250 else if (code0
== CONST_INT
|| code0
== CONST
5251 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5252 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5253 type
, ind_levels
, insn
);
5255 else if (code1
== CONST_INT
|| code1
== CONST
5256 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5257 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5258 type
, ind_levels
, insn
);
5260 else if (code0
== REG
&& code1
== REG
)
5262 if (REG_OK_FOR_INDEX_P (op0
)
5263 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5265 else if (REG_OK_FOR_INDEX_P (op1
)
5266 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5268 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5269 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5270 type
, ind_levels
, insn
);
5271 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5272 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5273 type
, ind_levels
, insn
);
5274 else if (REG_OK_FOR_INDEX_P (op1
))
5275 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5276 type
, ind_levels
, insn
);
5277 else if (REG_OK_FOR_INDEX_P (op0
))
5278 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5279 type
, ind_levels
, insn
);
5282 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5283 type
, ind_levels
, insn
);
5284 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5285 type
, ind_levels
, insn
);
5289 else if (code0
== REG
)
5291 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5292 type
, ind_levels
, insn
);
5293 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5294 type
, ind_levels
, insn
);
5297 else if (code1
== REG
)
5299 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5300 type
, ind_levels
, insn
);
5301 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5302 type
, ind_levels
, insn
);
5311 rtx op0
= XEXP (x
, 0);
5312 rtx op1
= XEXP (x
, 1);
5314 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5317 /* Currently, we only support {PRE,POST}_MODIFY constructs
5318 where a base register is {inc,dec}remented by the contents
5319 of another register or by a constant value. Thus, these
5320 operands must match. */
5321 if (op0
!= XEXP (op1
, 0))
5324 /* Require index register (or constant). Let's just handle the
5325 register case in the meantime... If the target allows
5326 auto-modify by a constant then we could try replacing a pseudo
5327 register with its equivalent constant where applicable. */
5328 if (REG_P (XEXP (op1
, 1)))
5329 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5330 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5331 opnum
, type
, ind_levels
, insn
);
5333 if (REG_P (XEXP (op1
, 0)))
5335 int regno
= REGNO (XEXP (op1
, 0));
5338 /* A register that is incremented cannot be constant! */
5339 if (regno
>= FIRST_PSEUDO_REGISTER
5340 && reg_equiv_constant
[regno
] != 0)
5343 /* Handle a register that is equivalent to a memory location
5344 which cannot be addressed directly. */
5345 if (reg_equiv_memory_loc
[regno
] != 0
5346 && (reg_equiv_address
[regno
] != 0
5347 || num_not_at_initial_offset
))
5349 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5351 if (reg_equiv_address
[regno
]
5352 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5354 /* First reload the memory location's address.
5355 We can't use ADDR_TYPE (type) here, because we need to
5356 write back the value after reading it, hence we actually
5357 need two registers. */
5358 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5359 &XEXP (tem
, 0), opnum
,
5363 /* Then reload the memory location into a base
5365 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5367 MODE_BASE_REG_CLASS (mode
),
5368 GET_MODE (x
), GET_MODE (x
), 0,
5369 0, opnum
, RELOAD_OTHER
);
5371 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5376 if (reg_renumber
[regno
] >= 0)
5377 regno
= reg_renumber
[regno
];
5379 /* We require a base register here... */
5380 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5382 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5383 &XEXP (op1
, 0), &XEXP (x
, 0),
5384 MODE_BASE_REG_CLASS (mode
),
5385 GET_MODE (x
), GET_MODE (x
), 0, 0,
5386 opnum
, RELOAD_OTHER
);
5388 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5401 if (GET_CODE (XEXP (x
, 0)) == REG
)
5403 int regno
= REGNO (XEXP (x
, 0));
5407 /* A register that is incremented cannot be constant! */
5408 if (regno
>= FIRST_PSEUDO_REGISTER
5409 && reg_equiv_constant
[regno
] != 0)
5412 /* Handle a register that is equivalent to a memory location
5413 which cannot be addressed directly. */
5414 if (reg_equiv_memory_loc
[regno
] != 0
5415 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5417 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5418 if (reg_equiv_address
[regno
]
5419 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5421 /* First reload the memory location's address.
5422 We can't use ADDR_TYPE (type) here, because we need to
5423 write back the value after reading it, hence we actually
5424 need two registers. */
5425 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5426 &XEXP (tem
, 0), opnum
, type
,
5428 /* Put this inside a new increment-expression. */
5429 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5430 /* Proceed to reload that, as if it contained a register. */
5434 /* If we have a hard register that is ok as an index,
5435 don't make a reload. If an autoincrement of a nice register
5436 isn't "valid", it must be that no autoincrement is "valid".
5437 If that is true and something made an autoincrement anyway,
5438 this must be a special context where one is allowed.
5439 (For example, a "push" instruction.)
5440 We can't improve this address, so leave it alone. */
5442 /* Otherwise, reload the autoincrement into a suitable hard reg
5443 and record how much to increment by. */
5445 if (reg_renumber
[regno
] >= 0)
5446 regno
= reg_renumber
[regno
];
5447 if ((regno
>= FIRST_PSEUDO_REGISTER
5448 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5449 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5453 /* If we can output the register afterwards, do so, this
5454 saves the extra update.
5455 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5456 CALL_INSN - and it does not set CC0.
5457 But don't do this if we cannot directly address the
5458 memory location, since this will make it harder to
5459 reuse address reloads, and increases register pressure.
5460 Also don't do this if we can probably update x directly. */
5461 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5463 : reg_equiv_mem
[regno
]);
5464 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5465 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5466 && memory_operand (equiv
, GET_MODE (equiv
))
5468 && ! sets_cc0_p (PATTERN (insn
))
5470 && ! (icode
!= CODE_FOR_nothing
5471 && ((*insn_data
[icode
].operand
[0].predicate
)
5473 && ((*insn_data
[icode
].operand
[1].predicate
)
5476 /* We use the original pseudo for loc, so that
5477 emit_reload_insns() knows which pseudo this
5478 reload refers to and updates the pseudo rtx, not
5479 its equivalent memory location, as well as the
5480 corresponding entry in reg_last_reload_reg. */
5481 loc
= &XEXP (x_orig
, 0);
5484 = push_reload (x
, x
, loc
, loc
,
5485 (context
? INDEX_REG_CLASS
:
5486 MODE_BASE_REG_CLASS (mode
)),
5487 GET_MODE (x
), GET_MODE (x
), 0, 0,
5488 opnum
, RELOAD_OTHER
);
5493 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5494 (context
? INDEX_REG_CLASS
:
5495 MODE_BASE_REG_CLASS (mode
)),
5496 GET_MODE (x
), GET_MODE (x
), 0, 0,
5499 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5504 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5510 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5512 /* This is probably the result of a substitution, by eliminate_regs,
5513 of an equivalent address for a pseudo that was not allocated to a
5514 hard register. Verify that the specified address is valid and
5515 reload it into a register. */
5516 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5517 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5521 /* Since we know we are going to reload this item, don't decrement
5522 for the indirection level.
5524 Note that this is actually conservative: it would be slightly
5525 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5527 /* We can't use ADDR_TYPE (type) here, because we need to
5528 write back the value after reading it, hence we actually
5529 need two registers. */
5530 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5531 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5532 opnum
, type
, ind_levels
, insn
);
5534 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5535 (context
? INDEX_REG_CLASS
:
5536 MODE_BASE_REG_CLASS (mode
)),
5537 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5539 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5541 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5543 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5550 /* This is probably the result of a substitution, by eliminate_regs, of
5551 an equivalent address for a pseudo that was not allocated to a hard
5552 register. Verify that the specified address is valid and reload it
5555 Since we know we are going to reload this item, don't decrement for
5556 the indirection level.
5558 Note that this is actually conservative: it would be slightly more
5559 efficient to use the value of SPILL_INDIRECT_LEVELS from
5562 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5563 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5564 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5565 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5566 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5571 int regno
= REGNO (x
);
5573 if (reg_equiv_constant
[regno
] != 0)
5575 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5576 (context
? INDEX_REG_CLASS
:
5577 MODE_BASE_REG_CLASS (mode
)),
5578 GET_MODE (x
), opnum
, type
, ind_levels
);
5582 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5583 that feeds this insn. */
5584 if (reg_equiv_mem
[regno
] != 0)
5586 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5587 (context
? INDEX_REG_CLASS
:
5588 MODE_BASE_REG_CLASS (mode
)),
5589 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5594 if (reg_equiv_memory_loc
[regno
]
5595 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5597 rtx tem
= make_memloc (x
, regno
);
5598 if (reg_equiv_address
[regno
] != 0
5599 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5602 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5603 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5608 if (reg_renumber
[regno
] >= 0)
5609 regno
= reg_renumber
[regno
];
5611 if ((regno
>= FIRST_PSEUDO_REGISTER
5612 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5613 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5615 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5616 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5617 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5621 /* If a register appearing in an address is the subject of a CLOBBER
5622 in this insn, reload it into some other register to be safe.
5623 The CLOBBER is supposed to make the register unavailable
5624 from before this insn to after it. */
5625 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5627 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5628 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5629 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5636 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5638 /* If this is a SUBREG of a hard register and the resulting register
5639 is of the wrong class, reload the whole SUBREG. This avoids
5640 needless copies if SUBREG_REG is multi-word. */
5641 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5643 int regno
= subreg_regno (x
);
5645 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5646 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5648 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5649 (context
? INDEX_REG_CLASS
:
5650 MODE_BASE_REG_CLASS (mode
)),
5651 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5655 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5656 is larger than the class size, then reload the whole SUBREG. */
5659 enum reg_class
class = (context
? INDEX_REG_CLASS
5660 : MODE_BASE_REG_CLASS (mode
));
5661 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5662 > reg_class_size
[class])
5664 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5666 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5667 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5679 const char *fmt
= GET_RTX_FORMAT (code
);
5682 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5685 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5686 opnum
, type
, ind_levels
, insn
);
5693 /* X, which is found at *LOC, is a part of an address that needs to be
5694 reloaded into a register of class CLASS. If X is a constant, or if
5695 X is a PLUS that contains a constant, check that the constant is a
5696 legitimate operand and that we are supposed to be able to load
5697 it into the register.
5699 If not, force the constant into memory and reload the MEM instead.
5701 MODE is the mode to use, in case X is an integer constant.
5703 OPNUM and TYPE describe the purpose of any reloads made.
5705 IND_LEVELS says how many levels of indirect addressing this machine
5709 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5712 enum reg_class
class;
5713 enum machine_mode mode
;
5715 enum reload_type type
;
5719 && (! LEGITIMATE_CONSTANT_P (x
)
5720 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5724 tem
= x
= force_const_mem (mode
, x
);
5725 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5726 opnum
, type
, ind_levels
, 0);
5729 else if (GET_CODE (x
) == PLUS
5730 && CONSTANT_P (XEXP (x
, 1))
5731 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5732 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5736 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5737 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5738 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5739 opnum
, type
, ind_levels
, 0);
5742 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5743 mode
, VOIDmode
, 0, 0, opnum
, type
);
5746 /* X, a subreg of a pseudo, is a part of an address that needs to be
5749 If the pseudo is equivalent to a memory location that cannot be directly
5750 addressed, make the necessary address reloads.
5752 If address reloads have been necessary, or if the address is changed
5753 by register elimination, return the rtx of the memory location;
5754 otherwise, return X.
5756 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5759 OPNUM and TYPE identify the purpose of the reload.
5761 IND_LEVELS says how many levels of indirect addressing are
5762 supported at this point in the address.
5764 INSN, if nonzero, is the insn in which we do the reload. It is used
5765 to determine where to put USEs for pseudos that we have to replace with
5769 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5774 enum reload_type type
;
5778 int regno
= REGNO (SUBREG_REG (x
));
5780 if (reg_equiv_memory_loc
[regno
])
5782 /* If the address is not directly addressable, or if the address is not
5783 offsettable, then it must be replaced. */
5785 && (reg_equiv_address
[regno
]
5786 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5789 if (force_replace
|| num_not_at_initial_offset
)
5791 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5793 /* If the address changes because of register elimination, then
5794 it must be replaced. */
5796 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5798 int offset
= SUBREG_BYTE (x
);
5799 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5800 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5802 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5803 PUT_MODE (tem
, GET_MODE (x
));
5805 /* If this was a paradoxical subreg that we replaced, the
5806 resulting memory must be sufficiently aligned to allow
5807 us to widen the mode of the memory. */
5808 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5812 base
= XEXP (tem
, 0);
5813 if (GET_CODE (base
) == PLUS
)
5815 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5816 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5818 base
= XEXP (base
, 0);
5820 if (GET_CODE (base
) != REG
5821 || (REGNO_POINTER_ALIGN (REGNO (base
))
5822 < outer_size
* BITS_PER_UNIT
))
5826 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5827 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5830 /* If this is not a toplevel operand, find_reloads doesn't see
5831 this substitution. We have to emit a USE of the pseudo so
5832 that delete_output_reload can see it. */
5833 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5834 /* We mark the USE with QImode so that we recognize it
5835 as one that can be safely deleted at the end of
5837 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5847 /* Substitute into the current INSN the registers into which we have reloaded
5848 the things that need reloading. The array `replacements'
5849 contains the locations of all pointers that must be changed
5850 and says what to replace them with.
5852 Return the rtx that X translates into; usually X, but modified. */
5855 subst_reloads (insn
)
5860 for (i
= 0; i
< n_replacements
; i
++)
5862 struct replacement
*r
= &replacements
[i
];
5863 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5866 #ifdef ENABLE_CHECKING
5867 /* Internal consistency test. Check that we don't modify
5868 anything in the equivalence arrays. Whenever something from
5869 those arrays needs to be reloaded, it must be unshared before
5870 being substituted into; the equivalence must not be modified.
5871 Otherwise, if the equivalence is used after that, it will
5872 have been modified, and the thing substituted (probably a
5873 register) is likely overwritten and not a usable equivalence. */
5876 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5878 #define CHECK_MODF(ARRAY) \
5879 if (ARRAY[check_regno] \
5880 && loc_mentioned_in_p (r->where, \
5881 ARRAY[check_regno])) \
5884 CHECK_MODF (reg_equiv_constant
);
5885 CHECK_MODF (reg_equiv_memory_loc
);
5886 CHECK_MODF (reg_equiv_address
);
5887 CHECK_MODF (reg_equiv_mem
);
5890 #endif /* ENABLE_CHECKING */
5892 /* If we're replacing a LABEL_REF with a register, add a
5893 REG_LABEL note to indicate to flow which label this
5894 register refers to. */
5895 if (GET_CODE (*r
->where
) == LABEL_REF
5896 && GET_CODE (insn
) == JUMP_INSN
)
5897 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5898 XEXP (*r
->where
, 0),
5901 /* Encapsulate RELOADREG so its machine mode matches what
5902 used to be there. Note that gen_lowpart_common will
5903 do the wrong thing if RELOADREG is multi-word. RELOADREG
5904 will always be a REG here. */
5905 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5906 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5908 /* If we are putting this into a SUBREG and RELOADREG is a
5909 SUBREG, we would be making nested SUBREGs, so we have to fix
5910 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5912 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5914 if (GET_MODE (*r
->subreg_loc
)
5915 == GET_MODE (SUBREG_REG (reloadreg
)))
5916 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5920 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5922 /* When working with SUBREGs the rule is that the byte
5923 offset must be a multiple of the SUBREG's mode. */
5924 final_offset
= (final_offset
/
5925 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5926 final_offset
= (final_offset
*
5927 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5929 *r
->where
= SUBREG_REG (reloadreg
);
5930 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5934 *r
->where
= reloadreg
;
5936 /* If reload got no reg and isn't optional, something's wrong. */
5937 else if (! rld
[r
->what
].optional
)
5942 /* Make a copy of any replacements being done into X and move those
5943 copies to locations in Y, a copy of X. */
5946 copy_replacements (x
, y
)
5949 /* We can't support X being a SUBREG because we might then need to know its
5950 location if something inside it was replaced. */
5951 if (GET_CODE (x
) == SUBREG
)
5954 copy_replacements_1 (&x
, &y
, n_replacements
);
5958 copy_replacements_1 (px
, py
, orig_replacements
)
5961 int orig_replacements
;
5965 struct replacement
*r
;
5969 for (j
= 0; j
< orig_replacements
; j
++)
5971 if (replacements
[j
].subreg_loc
== px
)
5973 r
= &replacements
[n_replacements
++];
5974 r
->where
= replacements
[j
].where
;
5976 r
->what
= replacements
[j
].what
;
5977 r
->mode
= replacements
[j
].mode
;
5979 else if (replacements
[j
].where
== px
)
5981 r
= &replacements
[n_replacements
++];
5984 r
->what
= replacements
[j
].what
;
5985 r
->mode
= replacements
[j
].mode
;
5991 code
= GET_CODE (x
);
5992 fmt
= GET_RTX_FORMAT (code
);
5994 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5997 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
5998 else if (fmt
[i
] == 'E')
5999 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6000 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6005 /* Change any replacements being done to *X to be done to *Y */
6008 move_replacements (x
, y
)
6014 for (i
= 0; i
< n_replacements
; i
++)
6015 if (replacements
[i
].subreg_loc
== x
)
6016 replacements
[i
].subreg_loc
= y
;
6017 else if (replacements
[i
].where
== x
)
6019 replacements
[i
].where
= y
;
6020 replacements
[i
].subreg_loc
= 0;
6024 /* If LOC was scheduled to be replaced by something, return the replacement.
6025 Otherwise, return *LOC. */
6028 find_replacement (loc
)
6031 struct replacement
*r
;
6033 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6035 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6037 if (reloadreg
&& r
->where
== loc
)
6039 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6040 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6044 else if (reloadreg
&& r
->subreg_loc
== loc
)
6046 /* RELOADREG must be either a REG or a SUBREG.
6048 ??? Is it actually still ever a SUBREG? If so, why? */
6050 if (GET_CODE (reloadreg
) == REG
)
6051 return gen_rtx_REG (GET_MODE (*loc
),
6052 (REGNO (reloadreg
) +
6053 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6054 GET_MODE (SUBREG_REG (*loc
)),
6057 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6061 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6063 /* When working with SUBREGs the rule is that the byte
6064 offset must be a multiple of the SUBREG's mode. */
6065 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6066 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6067 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6073 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6074 what's inside and make a new rtl if so. */
6075 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6076 || GET_CODE (*loc
) == MULT
)
6078 rtx x
= find_replacement (&XEXP (*loc
, 0));
6079 rtx y
= find_replacement (&XEXP (*loc
, 1));
6081 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6082 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6088 /* Return nonzero if register in range [REGNO, ENDREGNO)
6089 appears either explicitly or implicitly in X
6090 other than being stored into (except for earlyclobber operands).
6092 References contained within the substructure at LOC do not count.
6093 LOC may be zero, meaning don't ignore anything.
6095 This is similar to refers_to_regno_p in rtlanal.c except that we
6096 look at equivalences for pseudos that didn't get hard registers. */
6099 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6100 unsigned int regno
, endregno
;
6113 code
= GET_CODE (x
);
6120 /* If this is a pseudo, a hard register must not have been allocated.
6121 X must therefore either be a constant or be in memory. */
6122 if (r
>= FIRST_PSEUDO_REGISTER
)
6124 if (reg_equiv_memory_loc
[r
])
6125 return refers_to_regno_for_reload_p (regno
, endregno
,
6126 reg_equiv_memory_loc
[r
],
6129 if (reg_equiv_constant
[r
])
6135 return (endregno
> r
6136 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6137 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6141 /* If this is a SUBREG of a hard reg, we can see exactly which
6142 registers are being modified. Otherwise, handle normally. */
6143 if (GET_CODE (SUBREG_REG (x
)) == REG
6144 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6146 unsigned int inner_regno
= subreg_regno (x
);
6147 unsigned int inner_endregno
6148 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6149 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6151 return endregno
> inner_regno
&& regno
< inner_endregno
;
6157 if (&SET_DEST (x
) != loc
6158 /* Note setting a SUBREG counts as referring to the REG it is in for
6159 a pseudo but not for hard registers since we can
6160 treat each word individually. */
6161 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6162 && loc
!= &SUBREG_REG (SET_DEST (x
))
6163 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6164 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6165 && refers_to_regno_for_reload_p (regno
, endregno
,
6166 SUBREG_REG (SET_DEST (x
)),
6168 /* If the output is an earlyclobber operand, this is
6170 || ((GET_CODE (SET_DEST (x
)) != REG
6171 || earlyclobber_operand_p (SET_DEST (x
)))
6172 && refers_to_regno_for_reload_p (regno
, endregno
,
6173 SET_DEST (x
), loc
))))
6176 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6185 /* X does not match, so try its subexpressions. */
6187 fmt
= GET_RTX_FORMAT (code
);
6188 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6190 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6198 if (refers_to_regno_for_reload_p (regno
, endregno
,
6202 else if (fmt
[i
] == 'E')
6205 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6206 if (loc
!= &XVECEXP (x
, i
, j
)
6207 && refers_to_regno_for_reload_p (regno
, endregno
,
6208 XVECEXP (x
, i
, j
), loc
))
6215 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6216 we check if any register number in X conflicts with the relevant register
6217 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6218 contains a MEM (we don't bother checking for memory addresses that can't
6219 conflict because we expect this to be a rare case.
6221 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6222 that we look at equivalences for pseudos that didn't get hard registers. */
6225 reg_overlap_mentioned_for_reload_p (x
, in
)
6228 int regno
, endregno
;
6230 /* Overly conservative. */
6231 if (GET_CODE (x
) == STRICT_LOW_PART
6232 || GET_RTX_CLASS (GET_CODE (x
)) == 'a')
6235 /* If either argument is a constant, then modifying X can not affect IN. */
6236 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6238 else if (GET_CODE (x
) == SUBREG
)
6240 regno
= REGNO (SUBREG_REG (x
));
6241 if (regno
< FIRST_PSEUDO_REGISTER
)
6242 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6243 GET_MODE (SUBREG_REG (x
)),
6247 else if (GET_CODE (x
) == REG
)
6251 /* If this is a pseudo, it must not have been assigned a hard register.
6252 Therefore, it must either be in memory or be a constant. */
6254 if (regno
>= FIRST_PSEUDO_REGISTER
)
6256 if (reg_equiv_memory_loc
[regno
])
6257 return refers_to_mem_for_reload_p (in
);
6258 else if (reg_equiv_constant
[regno
])
6263 else if (GET_CODE (x
) == MEM
)
6264 return refers_to_mem_for_reload_p (in
);
6265 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6266 || GET_CODE (x
) == CC0
)
6267 return reg_mentioned_p (x
, in
);
6268 else if (GET_CODE (x
) == PLUS
)
6269 return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6270 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6274 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6275 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6277 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6280 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6284 refers_to_mem_for_reload_p (x
)
6290 if (GET_CODE (x
) == MEM
)
6293 if (GET_CODE (x
) == REG
)
6294 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6295 && reg_equiv_memory_loc
[REGNO (x
)]);
6297 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6298 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6300 && (GET_CODE (XEXP (x
, i
)) == MEM
6301 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6307 /* Check the insns before INSN to see if there is a suitable register
6308 containing the same value as GOAL.
6309 If OTHER is -1, look for a register in class CLASS.
6310 Otherwise, just see if register number OTHER shares GOAL's value.
6312 Return an rtx for the register found, or zero if none is found.
6314 If RELOAD_REG_P is (short *)1,
6315 we reject any hard reg that appears in reload_reg_rtx
6316 because such a hard reg is also needed coming into this insn.
6318 If RELOAD_REG_P is any other nonzero value,
6319 it is a vector indexed by hard reg number
6320 and we reject any hard reg whose element in the vector is nonnegative
6321 as well as any that appears in reload_reg_rtx.
6323 If GOAL is zero, then GOALREG is a register number; we look
6324 for an equivalent for that register.
6326 MODE is the machine mode of the value we want an equivalence for.
6327 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6329 This function is used by jump.c as well as in the reload pass.
6331 If GOAL is the sum of the stack pointer and a constant, we treat it
6332 as if it were a constant except that sp is required to be unchanging. */
6335 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6338 enum reg_class
class;
6340 short *reload_reg_p
;
6342 enum machine_mode mode
;
6345 rtx goaltry
, valtry
, value
, where
;
6351 int goal_mem_addr_varies
= 0;
6352 int need_stable_sp
= 0;
6358 else if (GET_CODE (goal
) == REG
)
6359 regno
= REGNO (goal
);
6360 else if (GET_CODE (goal
) == MEM
)
6362 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6363 if (MEM_VOLATILE_P (goal
))
6365 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6367 /* An address with side effects must be reexecuted. */
6382 else if (CONSTANT_P (goal
))
6384 else if (GET_CODE (goal
) == PLUS
6385 && XEXP (goal
, 0) == stack_pointer_rtx
6386 && CONSTANT_P (XEXP (goal
, 1)))
6387 goal_const
= need_stable_sp
= 1;
6388 else if (GET_CODE (goal
) == PLUS
6389 && XEXP (goal
, 0) == frame_pointer_rtx
6390 && CONSTANT_P (XEXP (goal
, 1)))
6395 /* Scan insns back from INSN, looking for one that copies
6396 a value into or out of GOAL.
6397 Stop and give up if we reach a label. */
6402 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6405 if (GET_CODE (p
) == INSN
6406 /* If we don't want spill regs ... */
6407 && (! (reload_reg_p
!= 0
6408 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6409 /* ... then ignore insns introduced by reload; they aren't
6410 useful and can cause results in reload_as_needed to be
6411 different from what they were when calculating the need for
6412 spills. If we notice an input-reload insn here, we will
6413 reject it below, but it might hide a usable equivalent.
6414 That makes bad code. It may even abort: perhaps no reg was
6415 spilled for this insn because it was assumed we would find
6417 || INSN_UID (p
) < reload_first_uid
))
6420 pat
= single_set (p
);
6422 /* First check for something that sets some reg equal to GOAL. */
6425 && true_regnum (SET_SRC (pat
)) == regno
6426 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6429 && true_regnum (SET_DEST (pat
)) == regno
6430 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6432 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6433 /* When looking for stack pointer + const,
6434 make sure we don't use a stack adjust. */
6435 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6436 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6438 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6439 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6441 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6442 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6443 /* If we are looking for a constant,
6444 and something equivalent to that constant was copied
6445 into a reg, we can use that reg. */
6446 || (goal_const
&& REG_NOTES (p
) != 0
6447 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6448 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6450 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6451 || (GET_CODE (SET_DEST (pat
)) == REG
6452 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6453 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6455 && GET_CODE (goal
) == CONST_INT
6457 = operand_subword (XEXP (tem
, 0), 0, 0,
6459 && rtx_equal_p (goal
, goaltry
)
6461 = operand_subword (SET_DEST (pat
), 0, 0,
6463 && (valueno
= true_regnum (valtry
)) >= 0)))
6464 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6466 && GET_CODE (SET_DEST (pat
)) == REG
6467 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6468 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6470 && GET_CODE (goal
) == CONST_INT
6471 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6473 && rtx_equal_p (goal
, goaltry
)
6475 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6476 && (valueno
= true_regnum (valtry
)) >= 0)))
6480 if (valueno
!= other
)
6483 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6489 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6490 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6503 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6504 (or copying VALUE into GOAL, if GOAL is also a register).
6505 Now verify that VALUE is really valid. */
6507 /* VALUENO is the register number of VALUE; a hard register. */
6509 /* Don't try to re-use something that is killed in this insn. We want
6510 to be able to trust REG_UNUSED notes. */
6511 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6514 /* If we propose to get the value from the stack pointer or if GOAL is
6515 a MEM based on the stack pointer, we need a stable SP. */
6516 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6517 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6521 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6522 if (GET_MODE (value
) != mode
)
6525 /* Reject VALUE if it was loaded from GOAL
6526 and is also a register that appears in the address of GOAL. */
6528 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6529 && refers_to_regno_for_reload_p (valueno
,
6531 + HARD_REGNO_NREGS (valueno
, mode
)),
6535 /* Reject registers that overlap GOAL. */
6537 if (!goal_mem
&& !goal_const
6538 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6539 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6542 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6543 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6545 /* Reject VALUE if it is one of the regs reserved for reloads.
6546 Reload1 knows how to reuse them anyway, and it would get
6547 confused if we allocated one without its knowledge.
6548 (Now that insns introduced by reload are ignored above,
6549 this case shouldn't happen, but I'm not positive.) */
6551 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6554 for (i
= 0; i
< valuenregs
; ++i
)
6555 if (reload_reg_p
[valueno
+ i
] >= 0)
6559 /* Reject VALUE if it is a register being used for an input reload
6560 even if it is not one of those reserved. */
6562 if (reload_reg_p
!= 0)
6565 for (i
= 0; i
< n_reloads
; i
++)
6566 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6568 int regno1
= REGNO (rld
[i
].reg_rtx
);
6569 int nregs1
= HARD_REGNO_NREGS (regno1
,
6570 GET_MODE (rld
[i
].reg_rtx
));
6571 if (regno1
< valueno
+ valuenregs
6572 && regno1
+ nregs1
> valueno
)
6578 /* We must treat frame pointer as varying here,
6579 since it can vary--in a nonlocal goto as generated by expand_goto. */
6580 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6582 /* Now verify that the values of GOAL and VALUE remain unaltered
6583 until INSN is reached. */
6592 /* Don't trust the conversion past a function call
6593 if either of the two is in a call-clobbered register, or memory. */
6594 if (GET_CODE (p
) == CALL_INSN
)
6598 if (goal_mem
|| need_stable_sp
)
6601 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6602 for (i
= 0; i
< nregs
; ++i
)
6603 if (call_used_regs
[regno
+ i
])
6606 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6607 for (i
= 0; i
< valuenregs
; ++i
)
6608 if (call_used_regs
[valueno
+ i
])
6610 #ifdef NON_SAVING_SETJMP
6611 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6620 /* Watch out for unspec_volatile, and volatile asms. */
6621 if (volatile_insn_p (pat
))
6624 /* If this insn P stores in either GOAL or VALUE, return 0.
6625 If GOAL is a memory ref and this insn writes memory, return 0.
6626 If GOAL is a memory ref and its address is not constant,
6627 and this insn P changes a register used in GOAL, return 0. */
6629 if (GET_CODE (pat
) == COND_EXEC
)
6630 pat
= COND_EXEC_CODE (pat
);
6631 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6633 rtx dest
= SET_DEST (pat
);
6634 while (GET_CODE (dest
) == SUBREG
6635 || GET_CODE (dest
) == ZERO_EXTRACT
6636 || GET_CODE (dest
) == SIGN_EXTRACT
6637 || GET_CODE (dest
) == STRICT_LOW_PART
)
6638 dest
= XEXP (dest
, 0);
6639 if (GET_CODE (dest
) == REG
)
6641 int xregno
= REGNO (dest
);
6643 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6644 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6647 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6649 if (xregno
< valueno
+ valuenregs
6650 && xregno
+ xnregs
> valueno
)
6652 if (goal_mem_addr_varies
6653 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6655 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6658 else if (goal_mem
&& GET_CODE (dest
) == MEM
6659 && ! push_operand (dest
, GET_MODE (dest
)))
6661 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6662 && reg_equiv_memory_loc
[regno
] != 0)
6664 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6667 else if (GET_CODE (pat
) == PARALLEL
)
6670 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6672 rtx v1
= XVECEXP (pat
, 0, i
);
6673 if (GET_CODE (v1
) == COND_EXEC
)
6674 v1
= COND_EXEC_CODE (v1
);
6675 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6677 rtx dest
= SET_DEST (v1
);
6678 while (GET_CODE (dest
) == SUBREG
6679 || GET_CODE (dest
) == ZERO_EXTRACT
6680 || GET_CODE (dest
) == SIGN_EXTRACT
6681 || GET_CODE (dest
) == STRICT_LOW_PART
)
6682 dest
= XEXP (dest
, 0);
6683 if (GET_CODE (dest
) == REG
)
6685 int xregno
= REGNO (dest
);
6687 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6688 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6691 if (xregno
< regno
+ nregs
6692 && xregno
+ xnregs
> regno
)
6694 if (xregno
< valueno
+ valuenregs
6695 && xregno
+ xnregs
> valueno
)
6697 if (goal_mem_addr_varies
6698 && reg_overlap_mentioned_for_reload_p (dest
,
6701 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6704 else if (goal_mem
&& GET_CODE (dest
) == MEM
6705 && ! push_operand (dest
, GET_MODE (dest
)))
6707 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6708 && reg_equiv_memory_loc
[regno
] != 0)
6710 else if (need_stable_sp
6711 && push_operand (dest
, GET_MODE (dest
)))
6717 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6721 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6722 link
= XEXP (link
, 1))
6724 pat
= XEXP (link
, 0);
6725 if (GET_CODE (pat
) == CLOBBER
)
6727 rtx dest
= SET_DEST (pat
);
6729 if (GET_CODE (dest
) == REG
)
6731 int xregno
= REGNO (dest
);
6733 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6735 if (xregno
< regno
+ nregs
6736 && xregno
+ xnregs
> regno
)
6738 else if (xregno
< valueno
+ valuenregs
6739 && xregno
+ xnregs
> valueno
)
6741 else if (goal_mem_addr_varies
6742 && reg_overlap_mentioned_for_reload_p (dest
,
6747 else if (goal_mem
&& GET_CODE (dest
) == MEM
6748 && ! push_operand (dest
, GET_MODE (dest
)))
6750 else if (need_stable_sp
6751 && push_operand (dest
, GET_MODE (dest
)))
6758 /* If this insn auto-increments or auto-decrements
6759 either regno or valueno, return 0 now.
6760 If GOAL is a memory ref and its address is not constant,
6761 and this insn P increments a register used in GOAL, return 0. */
6765 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6766 if (REG_NOTE_KIND (link
) == REG_INC
6767 && GET_CODE (XEXP (link
, 0)) == REG
)
6769 int incno
= REGNO (XEXP (link
, 0));
6770 if (incno
< regno
+ nregs
&& incno
>= regno
)
6772 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6774 if (goal_mem_addr_varies
6775 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6785 /* Find a place where INCED appears in an increment or decrement operator
6786 within X, and return the amount INCED is incremented or decremented by.
6787 The value is always positive. */
6790 find_inc_amount (x
, inced
)
6793 enum rtx_code code
= GET_CODE (x
);
6799 rtx addr
= XEXP (x
, 0);
6800 if ((GET_CODE (addr
) == PRE_DEC
6801 || GET_CODE (addr
) == POST_DEC
6802 || GET_CODE (addr
) == PRE_INC
6803 || GET_CODE (addr
) == POST_INC
)
6804 && XEXP (addr
, 0) == inced
)
6805 return GET_MODE_SIZE (GET_MODE (x
));
6806 else if ((GET_CODE (addr
) == PRE_MODIFY
6807 || GET_CODE (addr
) == POST_MODIFY
)
6808 && GET_CODE (XEXP (addr
, 1)) == PLUS
6809 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6810 && XEXP (addr
, 0) == inced
6811 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6813 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6814 return i
< 0 ? -i
: i
;
6818 fmt
= GET_RTX_FORMAT (code
);
6819 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6823 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6830 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6832 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6842 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6843 If SETS is nonzero, also consider SETs. */
6846 regno_clobbered_p (regno
, insn
, mode
, sets
)
6849 enum machine_mode mode
;
6852 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6853 unsigned int endregno
= regno
+ nregs
;
6855 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6856 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6857 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6859 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6861 return test
>= regno
&& test
< endregno
;
6864 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6866 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6870 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6871 if ((GET_CODE (elt
) == CLOBBER
6872 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6873 && GET_CODE (XEXP (elt
, 0)) == REG
)
6875 unsigned int test
= REGNO (XEXP (elt
, 0));
6877 if (test
>= regno
&& test
< endregno
)
6886 static const char *const reload_when_needed_name
[] =
6889 "RELOAD_FOR_OUTPUT",
6891 "RELOAD_FOR_INPUT_ADDRESS",
6892 "RELOAD_FOR_INPADDR_ADDRESS",
6893 "RELOAD_FOR_OUTPUT_ADDRESS",
6894 "RELOAD_FOR_OUTADDR_ADDRESS",
6895 "RELOAD_FOR_OPERAND_ADDRESS",
6896 "RELOAD_FOR_OPADDR_ADDR",
6898 "RELOAD_FOR_OTHER_ADDRESS"
6901 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6903 /* These functions are used to print the variables set by 'find_reloads' */
6906 debug_reload_to_stream (f
)
6914 for (r
= 0; r
< n_reloads
; r
++)
6916 fprintf (f
, "Reload %d: ", r
);
6920 fprintf (f
, "reload_in (%s) = ",
6921 GET_MODE_NAME (rld
[r
].inmode
));
6922 print_inline_rtx (f
, rld
[r
].in
, 24);
6923 fprintf (f
, "\n\t");
6926 if (rld
[r
].out
!= 0)
6928 fprintf (f
, "reload_out (%s) = ",
6929 GET_MODE_NAME (rld
[r
].outmode
));
6930 print_inline_rtx (f
, rld
[r
].out
, 24);
6931 fprintf (f
, "\n\t");
6934 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6936 fprintf (f
, "%s (opnum = %d)",
6937 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6940 if (rld
[r
].optional
)
6941 fprintf (f
, ", optional");
6943 if (rld
[r
].nongroup
)
6944 fprintf (f
, ", nongroup");
6946 if (rld
[r
].inc
!= 0)
6947 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6949 if (rld
[r
].nocombine
)
6950 fprintf (f
, ", can't combine");
6952 if (rld
[r
].secondary_p
)
6953 fprintf (f
, ", secondary_reload_p");
6955 if (rld
[r
].in_reg
!= 0)
6957 fprintf (f
, "\n\treload_in_reg: ");
6958 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6961 if (rld
[r
].out_reg
!= 0)
6963 fprintf (f
, "\n\treload_out_reg: ");
6964 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6967 if (rld
[r
].reg_rtx
!= 0)
6969 fprintf (f
, "\n\treload_reg_rtx: ");
6970 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6974 if (rld
[r
].secondary_in_reload
!= -1)
6976 fprintf (f
, "%ssecondary_in_reload = %d",
6977 prefix
, rld
[r
].secondary_in_reload
);
6981 if (rld
[r
].secondary_out_reload
!= -1)
6982 fprintf (f
, "%ssecondary_out_reload = %d\n",
6983 prefix
, rld
[r
].secondary_out_reload
);
6986 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6988 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6989 insn_data
[rld
[r
].secondary_in_icode
].name
);
6993 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6994 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6995 insn_data
[rld
[r
].secondary_out_icode
].name
);
7004 debug_reload_to_stream (stderr
);