1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 optab optab_table
[OTI_MAX
];
59 rtx libfunc_table
[LTI_MAX
];
61 /* Tables of patterns for converting one mode to another. */
62 convert_optab convert_optab_table
[CTI_MAX
];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab
[NUM_RTX_CODE
+ 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
87 /* The insn generating function can not take an rtx_code argument.
88 TRAP_RTX is used as an rtx argument. Its code is replaced with
89 the code to be used in the trap insn and all other fields are ignored. */
90 static GTY(()) rtx trap_rtx
;
92 static int add_equal_note (rtx
, rtx
, enum rtx_code
, rtx
, rtx
);
93 static rtx
widen_operand (rtx
, enum machine_mode
, enum machine_mode
, int,
95 static int expand_cmplxdiv_straight (rtx
, rtx
, rtx
, rtx
, rtx
, rtx
,
96 enum machine_mode
, int,
97 enum optab_methods
, enum mode_class
,
99 static int expand_cmplxdiv_wide (rtx
, rtx
, rtx
, rtx
, rtx
, rtx
,
100 enum machine_mode
, int, enum optab_methods
,
101 enum mode_class
, optab
);
102 static void prepare_cmp_insn (rtx
*, rtx
*, enum rtx_code
*, rtx
,
103 enum machine_mode
*, int *,
104 enum can_compare_purpose
);
105 static enum insn_code
can_fix_p (enum machine_mode
, enum machine_mode
, int,
107 static enum insn_code
can_float_p (enum machine_mode
, enum machine_mode
, int);
108 static optab
new_optab (void);
109 static convert_optab
new_convert_optab (void);
110 static inline optab
init_optab (enum rtx_code
);
111 static inline optab
init_optabv (enum rtx_code
);
112 static inline convert_optab
init_convert_optab (enum rtx_code
);
113 static void init_libfuncs (optab
, int, int, const char *, int);
114 static void init_integral_libfuncs (optab
, const char *, int);
115 static void init_floating_libfuncs (optab
, const char *, int);
116 static void init_interclass_conv_libfuncs (convert_optab
, const char *,
117 enum mode_class
, enum mode_class
);
118 static void init_intraclass_conv_libfuncs (convert_optab
, const char *,
119 enum mode_class
, bool);
120 static void emit_cmp_and_jump_insn_1 (rtx
, rtx
, enum machine_mode
,
121 enum rtx_code
, int, rtx
);
122 static void prepare_float_lib_cmp (rtx
*, rtx
*, enum rtx_code
*,
123 enum machine_mode
*, int *);
124 static rtx
expand_vector_binop (enum machine_mode
, optab
, rtx
, rtx
, rtx
, int,
126 static rtx
expand_vector_unop (enum machine_mode
, optab
, rtx
, rtx
, int);
127 static rtx
widen_clz (enum machine_mode
, rtx
, rtx
);
128 static rtx
expand_parity (enum machine_mode
, rtx
, rtx
);
130 #ifndef HAVE_conditional_trap
131 #define HAVE_conditional_trap 0
132 #define gen_conditional_trap(a,b) (abort (), NULL_RTX)
135 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
136 the result of operation CODE applied to OP0 (and OP1 if it is a binary
139 If the last insn does not set TARGET, don't do anything, but return 1.
141 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
142 don't add the REG_EQUAL note but return 0. Our caller can then try
143 again, ensuring that TARGET is not one of the operands. */
146 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
148 rtx last_insn
, insn
, set
;
153 || NEXT_INSN (insns
) == NULL_RTX
)
156 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
157 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
158 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
159 && GET_RTX_CLASS (code
) != RTX_COMPARE
160 && GET_RTX_CLASS (code
) != RTX_UNARY
)
163 if (GET_CODE (target
) == ZERO_EXTRACT
)
166 for (last_insn
= insns
;
167 NEXT_INSN (last_insn
) != NULL_RTX
;
168 last_insn
= NEXT_INSN (last_insn
))
171 set
= single_set (last_insn
);
175 if (! rtx_equal_p (SET_DEST (set
), target
)
176 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
177 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
178 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
181 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
182 besides the last insn. */
183 if (reg_overlap_mentioned_p (target
, op0
)
184 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
186 insn
= PREV_INSN (last_insn
);
187 while (insn
!= NULL_RTX
)
189 if (reg_set_p (target
, insn
))
192 insn
= PREV_INSN (insn
);
196 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
197 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
199 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
201 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
206 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
207 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
208 not actually do a sign-extend or zero-extend, but can leave the
209 higher-order bits of the result rtx undefined, for example, in the case
210 of logical operations, but not right shifts. */
213 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
214 int unsignedp
, int no_extend
)
218 /* If we don't have to extend and this is a constant, return it. */
219 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
222 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
223 extend since it will be more efficient to do so unless the signedness of
224 a promoted object differs from our extension. */
226 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
227 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
228 return convert_modes (mode
, oldmode
, op
, unsignedp
);
230 /* If MODE is no wider than a single word, we return a paradoxical
232 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
233 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
235 /* Otherwise, get an object of MODE, clobber it, and set the low-order
238 result
= gen_reg_rtx (mode
);
239 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
240 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
244 /* Generate code to perform a straightforward complex divide. */
247 expand_cmplxdiv_straight (rtx real0
, rtx real1
, rtx imag0
, rtx imag1
,
248 rtx realr
, rtx imagr
, enum machine_mode submode
,
249 int unsignedp
, enum optab_methods methods
,
250 enum mode_class
class, optab binoptab
)
256 optab this_add_optab
= add_optab
;
257 optab this_sub_optab
= sub_optab
;
258 optab this_neg_optab
= neg_optab
;
259 optab this_mul_optab
= smul_optab
;
261 if (binoptab
== sdivv_optab
)
263 this_add_optab
= addv_optab
;
264 this_sub_optab
= subv_optab
;
265 this_neg_optab
= negv_optab
;
266 this_mul_optab
= smulv_optab
;
269 /* Don't fetch these from memory more than once. */
270 real0
= force_reg (submode
, real0
);
271 real1
= force_reg (submode
, real1
);
274 imag0
= force_reg (submode
, imag0
);
276 imag1
= force_reg (submode
, imag1
);
278 /* Divisor: c*c + d*d. */
279 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
280 NULL_RTX
, unsignedp
, methods
);
282 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
283 NULL_RTX
, unsignedp
, methods
);
285 if (temp1
== 0 || temp2
== 0)
288 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
289 NULL_RTX
, unsignedp
, methods
);
295 /* Mathematically, ((a)(c-id))/divisor. */
296 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
298 /* Calculate the dividend. */
299 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
300 NULL_RTX
, unsignedp
, methods
);
302 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
303 NULL_RTX
, unsignedp
, methods
);
305 if (real_t
== 0 || imag_t
== 0)
308 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
309 NULL_RTX
, unsignedp
);
313 /* Mathematically, ((a+ib)(c-id))/divider. */
314 /* Calculate the dividend. */
315 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
316 NULL_RTX
, unsignedp
, methods
);
318 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
319 NULL_RTX
, unsignedp
, methods
);
321 if (temp1
== 0 || temp2
== 0)
324 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
325 NULL_RTX
, unsignedp
, methods
);
327 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
328 NULL_RTX
, unsignedp
, methods
);
330 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
331 NULL_RTX
, unsignedp
, methods
);
333 if (temp1
== 0 || temp2
== 0)
336 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
337 NULL_RTX
, unsignedp
, methods
);
339 if (real_t
== 0 || imag_t
== 0)
343 if (class == MODE_COMPLEX_FLOAT
)
344 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
345 realr
, unsignedp
, methods
);
347 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
348 real_t
, divisor
, realr
, unsignedp
);
354 emit_move_insn (realr
, res
);
356 if (class == MODE_COMPLEX_FLOAT
)
357 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
358 imagr
, unsignedp
, methods
);
360 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
361 imag_t
, divisor
, imagr
, unsignedp
);
367 emit_move_insn (imagr
, res
);
372 /* Generate code to perform a wide-input-range-acceptable complex divide. */
375 expand_cmplxdiv_wide (rtx real0
, rtx real1
, rtx imag0
, rtx imag1
, rtx realr
,
376 rtx imagr
, enum machine_mode submode
, int unsignedp
,
377 enum optab_methods methods
, enum mode_class
class,
382 rtx temp1
, temp2
, lab1
, lab2
;
383 enum machine_mode mode
;
385 optab this_add_optab
= add_optab
;
386 optab this_sub_optab
= sub_optab
;
387 optab this_neg_optab
= neg_optab
;
388 optab this_mul_optab
= smul_optab
;
390 if (binoptab
== sdivv_optab
)
392 this_add_optab
= addv_optab
;
393 this_sub_optab
= subv_optab
;
394 this_neg_optab
= negv_optab
;
395 this_mul_optab
= smulv_optab
;
398 /* Don't fetch these from memory more than once. */
399 real0
= force_reg (submode
, real0
);
400 real1
= force_reg (submode
, real1
);
403 imag0
= force_reg (submode
, imag0
);
405 imag1
= force_reg (submode
, imag1
);
407 /* XXX What's an "unsigned" complex number? */
415 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
416 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
419 if (temp1
== 0 || temp2
== 0)
422 mode
= GET_MODE (temp1
);
423 lab1
= gen_label_rtx ();
424 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
425 mode
, unsignedp
, lab1
);
427 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
429 if (class == MODE_COMPLEX_FLOAT
)
430 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
431 NULL_RTX
, unsignedp
, methods
);
433 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
434 imag1
, real1
, NULL_RTX
, unsignedp
);
439 /* Calculate divisor. */
441 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
442 NULL_RTX
, unsignedp
, methods
);
447 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
448 NULL_RTX
, unsignedp
, methods
);
453 /* Calculate dividend. */
459 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
461 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
462 NULL_RTX
, unsignedp
, methods
);
467 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
468 NULL_RTX
, unsignedp
);
470 if (real_t
== 0 || imag_t
== 0)
475 /* Compute (a+ib)/(c+id) as
476 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
478 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
479 NULL_RTX
, unsignedp
, methods
);
484 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
485 NULL_RTX
, unsignedp
, methods
);
487 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
488 NULL_RTX
, unsignedp
, methods
);
493 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
494 NULL_RTX
, unsignedp
, methods
);
496 if (real_t
== 0 || imag_t
== 0)
500 if (class == MODE_COMPLEX_FLOAT
)
501 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
502 realr
, unsignedp
, methods
);
504 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
505 real_t
, divisor
, realr
, unsignedp
);
511 emit_move_insn (realr
, res
);
513 if (class == MODE_COMPLEX_FLOAT
)
514 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
515 imagr
, unsignedp
, methods
);
517 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
518 imag_t
, divisor
, imagr
, unsignedp
);
524 emit_move_insn (imagr
, res
);
526 lab2
= gen_label_rtx ();
527 emit_jump_insn (gen_jump (lab2
));
532 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
534 if (class == MODE_COMPLEX_FLOAT
)
535 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
536 NULL_RTX
, unsignedp
, methods
);
538 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
539 real1
, imag1
, NULL_RTX
, unsignedp
);
544 /* Calculate divisor. */
546 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
547 NULL_RTX
, unsignedp
, methods
);
552 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
553 NULL_RTX
, unsignedp
, methods
);
558 /* Calculate dividend. */
562 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
564 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
565 NULL_RTX
, unsignedp
, methods
);
567 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
568 NULL_RTX
, unsignedp
);
570 if (real_t
== 0 || imag_t
== 0)
575 /* Compute (a+ib)/(c+id) as
576 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
578 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
579 NULL_RTX
, unsignedp
, methods
);
584 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
585 NULL_RTX
, unsignedp
, methods
);
587 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
588 NULL_RTX
, unsignedp
, methods
);
593 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
594 NULL_RTX
, unsignedp
, methods
);
596 if (real_t
== 0 || imag_t
== 0)
600 if (class == MODE_COMPLEX_FLOAT
)
601 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
602 realr
, unsignedp
, methods
);
604 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
605 real_t
, divisor
, realr
, unsignedp
);
611 emit_move_insn (realr
, res
);
613 if (class == MODE_COMPLEX_FLOAT
)
614 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
615 imagr
, unsignedp
, methods
);
617 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
618 imag_t
, divisor
, imagr
, unsignedp
);
624 emit_move_insn (imagr
, res
);
631 /* Wrapper around expand_binop which takes an rtx code to specify
632 the operation to perform, not an optab pointer. All other
633 arguments are the same. */
635 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
636 rtx op1
, rtx target
, int unsignedp
,
637 enum optab_methods methods
)
639 optab binop
= code_to_optab
[(int) code
];
643 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
646 /* Generate code to perform an operation specified by BINOPTAB
647 on operands OP0 and OP1, with result having machine-mode MODE.
649 UNSIGNEDP is for the case where we have to widen the operands
650 to perform the operation. It says to use zero-extension.
652 If TARGET is nonzero, the value
653 is generated there, if it is convenient to do so.
654 In all cases an rtx is returned for the locus of the value;
655 this may or may not be TARGET. */
658 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
659 rtx target
, int unsignedp
, enum optab_methods methods
)
661 enum optab_methods next_methods
662 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
663 ? OPTAB_WIDEN
: methods
);
664 enum mode_class
class;
665 enum machine_mode wider_mode
;
667 int commutative_op
= 0;
668 int shift_op
= (binoptab
->code
== ASHIFT
669 || binoptab
->code
== ASHIFTRT
670 || binoptab
->code
== LSHIFTRT
671 || binoptab
->code
== ROTATE
672 || binoptab
->code
== ROTATERT
);
673 rtx entry_last
= get_last_insn ();
676 class = GET_MODE_CLASS (mode
);
678 op0
= protect_from_queue (op0
, 0);
679 op1
= protect_from_queue (op1
, 0);
681 target
= protect_from_queue (target
, 1);
685 /* Load duplicate non-volatile operands once. */
686 if (rtx_equal_p (op0
, op1
) && ! volatile_refs_p (op0
))
688 op0
= force_not_mem (op0
);
693 op0
= force_not_mem (op0
);
694 op1
= force_not_mem (op1
);
698 /* If subtracting an integer constant, convert this into an addition of
699 the negated constant. */
701 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
703 op1
= negate_rtx (mode
, op1
);
704 binoptab
= add_optab
;
707 /* If we are inside an appropriately-short loop and one operand is an
708 expensive constant, force it into a register. */
709 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
710 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
711 op0
= force_reg (mode
, op0
);
713 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
714 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
715 op1
= force_reg (mode
, op1
);
717 /* Record where to delete back to if we backtrack. */
718 last
= get_last_insn ();
720 /* If operation is commutative,
721 try to make the first operand a register.
722 Even better, try to make it the same as the target.
723 Also try to make the last operand a constant. */
724 if (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
725 || binoptab
== smul_widen_optab
726 || binoptab
== umul_widen_optab
727 || binoptab
== smul_highpart_optab
728 || binoptab
== umul_highpart_optab
)
732 if (((target
== 0 || REG_P (target
))
736 : rtx_equal_p (op1
, target
))
737 || GET_CODE (op0
) == CONST_INT
)
745 /* If we can do it with a three-operand insn, do so. */
747 if (methods
!= OPTAB_MUST_WIDEN
748 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
750 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
751 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
752 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
754 rtx xop0
= op0
, xop1
= op1
;
759 temp
= gen_reg_rtx (mode
);
761 /* If it is a commutative operator and the modes would match
762 if we would swap the operands, we can save the conversions. */
765 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
766 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
770 tmp
= op0
; op0
= op1
; op1
= tmp
;
771 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
775 /* In case the insn wants input operands in modes different from
776 those of the actual operands, convert the operands. It would
777 seem that we don't need to convert CONST_INTs, but we do, so
778 that they're properly zero-extended, sign-extended or truncated
781 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
782 xop0
= convert_modes (mode0
,
783 GET_MODE (op0
) != VOIDmode
788 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
789 xop1
= convert_modes (mode1
,
790 GET_MODE (op1
) != VOIDmode
795 /* Now, if insn's predicates don't allow our operands, put them into
798 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
799 && mode0
!= VOIDmode
)
800 xop0
= copy_to_mode_reg (mode0
, xop0
);
802 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
803 && mode1
!= VOIDmode
)
804 xop1
= copy_to_mode_reg (mode1
, xop1
);
806 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
807 temp
= gen_reg_rtx (mode
);
809 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
812 /* If PAT is composed of more than one insn, try to add an appropriate
813 REG_EQUAL note to it. If we can't because TEMP conflicts with an
814 operand, call ourselves again, this time without a target. */
815 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
816 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
818 delete_insns_since (last
);
819 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
827 delete_insns_since (last
);
830 /* If this is a multiply, see if we can do a widening operation that
831 takes operands of this mode and makes a wider mode. */
833 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
834 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
835 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
836 != CODE_FOR_nothing
))
838 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
839 unsignedp
? umul_widen_optab
: smul_widen_optab
,
840 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
844 if (GET_MODE_CLASS (mode
) == MODE_INT
)
845 return gen_lowpart (mode
, temp
);
847 return convert_to_mode (mode
, temp
, unsignedp
);
851 /* Look for a wider mode of the same class for which we think we
852 can open-code the operation. Check for a widening multiply at the
853 wider mode as well. */
855 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
856 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
857 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
858 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
860 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
861 || (binoptab
== smul_optab
862 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
863 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
864 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
865 != CODE_FOR_nothing
)))
867 rtx xop0
= op0
, xop1
= op1
;
870 /* For certain integer operations, we need not actually extend
871 the narrow operands, as long as we will truncate
872 the results to the same narrowness. */
874 if ((binoptab
== ior_optab
|| binoptab
== and_optab
875 || binoptab
== xor_optab
876 || binoptab
== add_optab
|| binoptab
== sub_optab
877 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
878 && class == MODE_INT
)
881 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
883 /* The second operand of a shift must always be extended. */
884 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
885 no_extend
&& binoptab
!= ashl_optab
);
887 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
888 unsignedp
, OPTAB_DIRECT
);
891 if (class != MODE_INT
)
894 target
= gen_reg_rtx (mode
);
895 convert_move (target
, temp
, 0);
899 return gen_lowpart (mode
, temp
);
902 delete_insns_since (last
);
906 /* These can be done a word at a time. */
907 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
909 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
910 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
916 /* If TARGET is the same as one of the operands, the REG_EQUAL note
917 won't be accurate, so use a new target. */
918 if (target
== 0 || target
== op0
|| target
== op1
)
919 target
= gen_reg_rtx (mode
);
923 /* Do the actual arithmetic. */
924 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
926 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
927 rtx x
= expand_binop (word_mode
, binoptab
,
928 operand_subword_force (op0
, i
, mode
),
929 operand_subword_force (op1
, i
, mode
),
930 target_piece
, unsignedp
, next_methods
);
935 if (target_piece
!= x
)
936 emit_move_insn (target_piece
, x
);
939 insns
= get_insns ();
942 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
944 if (binoptab
->code
!= UNKNOWN
)
946 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
947 copy_rtx (op0
), copy_rtx (op1
));
951 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
956 /* Synthesize double word shifts from single word shifts. */
957 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
958 || binoptab
== ashr_optab
)
960 && GET_CODE (op1
) == CONST_INT
961 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
962 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
963 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
964 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
966 rtx insns
, inter
, equiv_value
;
967 rtx into_target
, outof_target
;
968 rtx into_input
, outof_input
;
969 int shift_count
, left_shift
, outof_word
;
971 /* If TARGET is the same as one of the operands, the REG_EQUAL note
972 won't be accurate, so use a new target. */
973 if (target
== 0 || target
== op0
|| target
== op1
)
974 target
= gen_reg_rtx (mode
);
978 shift_count
= INTVAL (op1
);
980 /* OUTOF_* is the word we are shifting bits away from, and
981 INTO_* is the word that we are shifting bits towards, thus
982 they differ depending on the direction of the shift and
985 left_shift
= binoptab
== ashl_optab
;
986 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
988 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
989 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
991 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
992 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
994 if (shift_count
>= BITS_PER_WORD
)
996 inter
= expand_binop (word_mode
, binoptab
,
998 GEN_INT (shift_count
- BITS_PER_WORD
),
999 into_target
, unsignedp
, next_methods
);
1001 if (inter
!= 0 && inter
!= into_target
)
1002 emit_move_insn (into_target
, inter
);
1004 /* For a signed right shift, we must fill the word we are shifting
1005 out of with copies of the sign bit. Otherwise it is zeroed. */
1006 if (inter
!= 0 && binoptab
!= ashr_optab
)
1007 inter
= CONST0_RTX (word_mode
);
1008 else if (inter
!= 0)
1009 inter
= expand_binop (word_mode
, binoptab
,
1011 GEN_INT (BITS_PER_WORD
- 1),
1012 outof_target
, unsignedp
, next_methods
);
1014 if (inter
!= 0 && inter
!= outof_target
)
1015 emit_move_insn (outof_target
, inter
);
1020 optab reverse_unsigned_shift
, unsigned_shift
;
1022 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1023 we must do a logical shift in the opposite direction of the
1026 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
1028 /* For a shift of less than BITS_PER_WORD, to compute the word
1029 shifted towards, we need to unsigned shift the orig value of
1032 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
1034 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
1036 GEN_INT (BITS_PER_WORD
- shift_count
),
1037 0, unsignedp
, next_methods
);
1042 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
1043 op1
, 0, unsignedp
, next_methods
);
1046 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
1047 into_target
, unsignedp
, next_methods
);
1049 if (inter
!= 0 && inter
!= into_target
)
1050 emit_move_insn (into_target
, inter
);
1053 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
1054 op1
, outof_target
, unsignedp
, next_methods
);
1056 if (inter
!= 0 && inter
!= outof_target
)
1057 emit_move_insn (outof_target
, inter
);
1060 insns
= get_insns ();
1065 if (binoptab
->code
!= UNKNOWN
)
1066 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1070 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1075 /* Synthesize double word rotates from single word shifts. */
1076 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1077 && class == MODE_INT
1078 && GET_CODE (op1
) == CONST_INT
1079 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1080 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1081 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1083 rtx insns
, equiv_value
;
1084 rtx into_target
, outof_target
;
1085 rtx into_input
, outof_input
;
1087 int shift_count
, left_shift
, outof_word
;
1089 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1090 won't be accurate, so use a new target. Do this also if target is not
1091 a REG, first because having a register instead may open optimization
1092 opportunities, and second because if target and op0 happen to be MEMs
1093 designating the same location, we would risk clobbering it too early
1094 in the code sequence we generate below. */
1095 if (target
== 0 || target
== op0
|| target
== op1
|| ! REG_P (target
))
1096 target
= gen_reg_rtx (mode
);
1100 shift_count
= INTVAL (op1
);
1102 /* OUTOF_* is the word we are shifting bits away from, and
1103 INTO_* is the word that we are shifting bits towards, thus
1104 they differ depending on the direction of the shift and
1105 WORDS_BIG_ENDIAN. */
1107 left_shift
= (binoptab
== rotl_optab
);
1108 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1110 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1111 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1113 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1114 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1116 if (shift_count
== BITS_PER_WORD
)
1118 /* This is just a word swap. */
1119 emit_move_insn (outof_target
, into_input
);
1120 emit_move_insn (into_target
, outof_input
);
1125 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1126 rtx first_shift_count
, second_shift_count
;
1127 optab reverse_unsigned_shift
, unsigned_shift
;
1129 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1130 ? lshr_optab
: ashl_optab
);
1132 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1133 ? ashl_optab
: lshr_optab
);
1135 if (shift_count
> BITS_PER_WORD
)
1137 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1138 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1142 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1143 second_shift_count
= GEN_INT (shift_count
);
1146 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1147 outof_input
, first_shift_count
,
1148 NULL_RTX
, unsignedp
, next_methods
);
1149 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1150 into_input
, second_shift_count
,
1151 NULL_RTX
, unsignedp
, next_methods
);
1153 if (into_temp1
!= 0 && into_temp2
!= 0)
1154 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1155 into_target
, unsignedp
, next_methods
);
1159 if (inter
!= 0 && inter
!= into_target
)
1160 emit_move_insn (into_target
, inter
);
1162 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1163 into_input
, first_shift_count
,
1164 NULL_RTX
, unsignedp
, next_methods
);
1165 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1166 outof_input
, second_shift_count
,
1167 NULL_RTX
, unsignedp
, next_methods
);
1169 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1170 inter
= expand_binop (word_mode
, ior_optab
,
1171 outof_temp1
, outof_temp2
,
1172 outof_target
, unsignedp
, next_methods
);
1174 if (inter
!= 0 && inter
!= outof_target
)
1175 emit_move_insn (outof_target
, inter
);
1178 insns
= get_insns ();
1183 if (binoptab
->code
!= UNKNOWN
)
1184 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1188 /* We can't make this a no conflict block if this is a word swap,
1189 because the word swap case fails if the input and output values
1190 are in the same register. */
1191 if (shift_count
!= BITS_PER_WORD
)
1192 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1201 /* These can be done a word at a time by propagating carries. */
1202 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1203 && class == MODE_INT
1204 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1205 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1208 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1209 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1210 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1211 rtx xop0
, xop1
, xtarget
;
1213 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1214 value is one of those, use it. Otherwise, use 1 since it is the
1215 one easiest to get. */
1216 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1217 int normalizep
= STORE_FLAG_VALUE
;
1222 /* Prepare the operands. */
1223 xop0
= force_reg (mode
, op0
);
1224 xop1
= force_reg (mode
, op1
);
1226 xtarget
= gen_reg_rtx (mode
);
1228 if (target
== 0 || !REG_P (target
))
1231 /* Indicate for flow that the entire target reg is being set. */
1233 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1235 /* Do the actual arithmetic. */
1236 for (i
= 0; i
< nwords
; i
++)
1238 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1239 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1240 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1241 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1244 /* Main add/subtract of the input operands. */
1245 x
= expand_binop (word_mode
, binoptab
,
1246 op0_piece
, op1_piece
,
1247 target_piece
, unsignedp
, next_methods
);
1253 /* Store carry from main add/subtract. */
1254 carry_out
= gen_reg_rtx (word_mode
);
1255 carry_out
= emit_store_flag_force (carry_out
,
1256 (binoptab
== add_optab
1259 word_mode
, 1, normalizep
);
1266 /* Add/subtract previous carry to main result. */
1267 newx
= expand_binop (word_mode
,
1268 normalizep
== 1 ? binoptab
: otheroptab
,
1270 NULL_RTX
, 1, next_methods
);
1274 /* Get out carry from adding/subtracting carry in. */
1275 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1276 carry_tmp
= emit_store_flag_force (carry_tmp
,
1277 (binoptab
== add_optab
1280 word_mode
, 1, normalizep
);
1282 /* Logical-ior the two poss. carry together. */
1283 carry_out
= expand_binop (word_mode
, ior_optab
,
1284 carry_out
, carry_tmp
,
1285 carry_out
, 0, next_methods
);
1289 emit_move_insn (target_piece
, newx
);
1292 carry_in
= carry_out
;
1295 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1297 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
1298 || ! rtx_equal_p (target
, xtarget
))
1300 rtx temp
= emit_move_insn (target
, xtarget
);
1302 set_unique_reg_note (temp
,
1304 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1315 delete_insns_since (last
);
1318 /* If we want to multiply two two-word values and have normal and widening
1319 multiplies of single-word values, we can do this with three smaller
1320 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1321 because we are not operating on one word at a time.
1323 The multiplication proceeds as follows:
1324 _______________________
1325 [__op0_high_|__op0_low__]
1326 _______________________
1327 * [__op1_high_|__op1_low__]
1328 _______________________________________________
1329 _______________________
1330 (1) [__op0_low__*__op1_low__]
1331 _______________________
1332 (2a) [__op0_low__*__op1_high_]
1333 _______________________
1334 (2b) [__op0_high_*__op1_low__]
1335 _______________________
1336 (3) [__op0_high_*__op1_high_]
1339 This gives a 4-word result. Since we are only interested in the
1340 lower 2 words, partial result (3) and the upper words of (2a) and
1341 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1342 calculated using non-widening multiplication.
1344 (1), however, needs to be calculated with an unsigned widening
1345 multiplication. If this operation is not directly supported we
1346 try using a signed widening multiplication and adjust the result.
1347 This adjustment works as follows:
1349 If both operands are positive then no adjustment is needed.
1351 If the operands have different signs, for example op0_low < 0 and
1352 op1_low >= 0, the instruction treats the most significant bit of
1353 op0_low as a sign bit instead of a bit with significance
1354 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1355 with 2**BITS_PER_WORD - op0_low, and two's complements the
1356 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1359 Similarly, if both operands are negative, we need to add
1360 (op0_low + op1_low) * 2**BITS_PER_WORD.
1362 We use a trick to adjust quickly. We logically shift op0_low right
1363 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1364 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1365 logical shift exists, we do an arithmetic right shift and subtract
1368 if (binoptab
== smul_optab
1369 && class == MODE_INT
1370 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1371 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1372 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1373 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1374 != CODE_FOR_nothing
)
1375 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1376 != CODE_FOR_nothing
)))
1378 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1379 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1380 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1381 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1382 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1383 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1385 rtx op0_xhigh
= NULL_RTX
;
1386 rtx op1_xhigh
= NULL_RTX
;
1388 /* If the target is the same as one of the inputs, don't use it. This
1389 prevents problems with the REG_EQUAL note. */
1390 if (target
== op0
|| target
== op1
1391 || (target
!= 0 && !REG_P (target
)))
1394 /* Multiply the two lower words to get a double-word product.
1395 If unsigned widening multiplication is available, use that;
1396 otherwise use the signed form and compensate. */
1398 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1400 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1401 target
, 1, OPTAB_DIRECT
);
1403 /* If we didn't succeed, delete everything we did so far. */
1405 delete_insns_since (last
);
1407 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1411 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1412 != CODE_FOR_nothing
)
1414 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1415 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1416 target
, 1, OPTAB_DIRECT
);
1417 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1418 NULL_RTX
, 1, next_methods
);
1420 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1421 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1424 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1425 NULL_RTX
, 0, next_methods
);
1427 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1428 op0_xhigh
, op0_xhigh
, 0,
1432 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1433 NULL_RTX
, 1, next_methods
);
1435 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1436 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1439 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1440 NULL_RTX
, 0, next_methods
);
1442 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1443 op1_xhigh
, op1_xhigh
, 0,
1448 /* If we have been able to directly compute the product of the
1449 low-order words of the operands and perform any required adjustments
1450 of the operands, we proceed by trying two more multiplications
1451 and then computing the appropriate sum.
1453 We have checked above that the required addition is provided.
1454 Full-word addition will normally always succeed, especially if
1455 it is provided at all, so we don't worry about its failure. The
1456 multiplication may well fail, however, so we do handle that. */
1458 if (product
&& op0_xhigh
&& op1_xhigh
)
1460 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1461 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1462 NULL_RTX
, 0, OPTAB_DIRECT
);
1464 if (!REG_P (product_high
))
1465 product_high
= force_reg (word_mode
, product_high
);
1468 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1469 product_high
, 0, next_methods
);
1471 if (temp
!= 0 && temp
!= product_high
)
1472 emit_move_insn (product_high
, temp
);
1475 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1476 NULL_RTX
, 0, OPTAB_DIRECT
);
1479 temp
= expand_binop (word_mode
, add_optab
, temp
,
1480 product_high
, product_high
,
1483 if (temp
!= 0 && temp
!= product_high
)
1484 emit_move_insn (product_high
, temp
);
1486 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1490 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1492 temp
= emit_move_insn (product
, product
);
1493 set_unique_reg_note (temp
,
1495 gen_rtx_fmt_ee (MULT
, mode
,
1504 /* If we get here, we couldn't do it for some reason even though we
1505 originally thought we could. Delete anything we've emitted in
1508 delete_insns_since (last
);
1511 /* Open-code the vector operations if we have no hardware support
1513 if (class == MODE_VECTOR_INT
|| class == MODE_VECTOR_FLOAT
)
1514 return expand_vector_binop (mode
, binoptab
, op0
, op1
, target
,
1515 unsignedp
, methods
);
1517 /* We need to open-code the complex type operations: '+, -, * and /' */
1519 /* At this point we allow operations between two similar complex
1520 numbers, and also if one of the operands is not a complex number
1521 but rather of MODE_FLOAT or MODE_INT. However, the caller
1522 must make sure that the MODE of the non-complex operand matches
1523 the SUBMODE of the complex operand. */
1525 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1527 rtx real0
= 0, imag0
= 0;
1528 rtx real1
= 0, imag1
= 0;
1529 rtx realr
, imagr
, res
;
1533 /* Find the correct mode for the real and imaginary parts. */
1534 enum machine_mode submode
= GET_MODE_INNER (mode
);
1536 if (submode
== BLKmode
)
1541 if (GET_MODE (op0
) == mode
)
1543 real0
= gen_realpart (submode
, op0
);
1544 imag0
= gen_imagpart (submode
, op0
);
1549 if (GET_MODE (op1
) == mode
)
1551 real1
= gen_realpart (submode
, op1
);
1552 imag1
= gen_imagpart (submode
, op1
);
1557 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0 || imag1
!= 0))
1560 result
= gen_reg_rtx (mode
);
1561 realr
= gen_realpart (submode
, result
);
1562 imagr
= gen_imagpart (submode
, result
);
1564 switch (binoptab
->code
)
1567 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1569 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1570 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1571 realr
, unsignedp
, methods
);
1575 else if (res
!= realr
)
1576 emit_move_insn (realr
, res
);
1578 if (imag0
!= 0 && imag1
!= 0)
1579 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1580 imagr
, unsignedp
, methods
);
1581 else if (imag0
!= 0)
1583 else if (binoptab
->code
== MINUS
)
1584 res
= expand_unop (submode
,
1585 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1586 imag1
, imagr
, unsignedp
);
1592 else if (res
!= imagr
)
1593 emit_move_insn (imagr
, res
);
1599 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1601 if (imag0
!= 0 && imag1
!= 0)
1605 /* Don't fetch these from memory more than once. */
1606 real0
= force_reg (submode
, real0
);
1607 real1
= force_reg (submode
, real1
);
1608 imag0
= force_reg (submode
, imag0
);
1609 imag1
= force_reg (submode
, imag1
);
1611 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1612 unsignedp
, methods
);
1614 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1615 unsignedp
, methods
);
1617 if (temp1
== 0 || temp2
== 0)
1622 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1623 temp1
, temp2
, realr
, unsignedp
, methods
));
1627 else if (res
!= realr
)
1628 emit_move_insn (realr
, res
);
1630 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1631 NULL_RTX
, unsignedp
, methods
);
1633 /* Avoid expanding redundant multiplication for the common
1634 case of squaring a complex number. */
1635 if (rtx_equal_p (real0
, real1
) && rtx_equal_p (imag0
, imag1
))
1638 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1639 NULL_RTX
, unsignedp
, methods
);
1641 if (temp1
== 0 || temp2
== 0)
1646 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1647 temp1
, temp2
, imagr
, unsignedp
, methods
));
1651 else if (res
!= imagr
)
1652 emit_move_insn (imagr
, res
);
1658 /* Don't fetch these from memory more than once. */
1659 real0
= force_reg (submode
, real0
);
1660 real1
= force_reg (submode
, real1
);
1662 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1663 realr
, unsignedp
, methods
);
1666 else if (res
!= realr
)
1667 emit_move_insn (realr
, res
);
1670 res
= expand_binop (submode
, binoptab
,
1671 real1
, imag0
, imagr
, unsignedp
, methods
);
1673 res
= expand_binop (submode
, binoptab
,
1674 real0
, imag1
, imagr
, unsignedp
, methods
);
1678 else if (res
!= imagr
)
1679 emit_move_insn (imagr
, res
);
1686 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1690 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1692 /* Don't fetch these from memory more than once. */
1693 real1
= force_reg (submode
, real1
);
1695 /* Simply divide the real and imaginary parts by `c' */
1696 if (class == MODE_COMPLEX_FLOAT
)
1697 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1698 realr
, unsignedp
, methods
);
1700 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1701 real0
, real1
, realr
, unsignedp
);
1705 else if (res
!= realr
)
1706 emit_move_insn (realr
, res
);
1708 if (class == MODE_COMPLEX_FLOAT
)
1709 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1710 imagr
, unsignedp
, methods
);
1712 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1713 imag0
, real1
, imagr
, unsignedp
);
1717 else if (res
!= imagr
)
1718 emit_move_insn (imagr
, res
);
1724 switch (flag_complex_divide_method
)
1727 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1728 realr
, imagr
, submode
,
1734 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1735 realr
, imagr
, submode
,
1755 rtx equiv
= gen_rtx_fmt_ee (binoptab
->code
, mode
,
1756 copy_rtx (op0
), copy_rtx (op1
));
1757 emit_no_conflict_block (seq
, result
, op0
, op1
, equiv
);
1762 /* It can't be open-coded in this mode.
1763 Use a library call if one is available and caller says that's ok. */
1765 if (binoptab
->handlers
[(int) mode
].libfunc
1766 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1770 enum machine_mode op1_mode
= mode
;
1777 op1_mode
= word_mode
;
1778 /* Specify unsigned here,
1779 since negative shift counts are meaningless. */
1780 op1x
= convert_to_mode (word_mode
, op1
, 1);
1783 if (GET_MODE (op0
) != VOIDmode
1784 && GET_MODE (op0
) != mode
)
1785 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1787 /* Pass 1 for NO_QUEUE so we don't lose any increments
1788 if the libcall is cse'd or moved. */
1789 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1790 NULL_RTX
, LCT_CONST
, mode
, 2,
1791 op0
, mode
, op1x
, op1_mode
);
1793 insns
= get_insns ();
1796 target
= gen_reg_rtx (mode
);
1797 emit_libcall_block (insns
, target
, value
,
1798 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1803 delete_insns_since (last
);
1805 /* It can't be done in this mode. Can we do it in a wider mode? */
1807 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1808 || methods
== OPTAB_MUST_WIDEN
))
1810 /* Caller says, don't even try. */
1811 delete_insns_since (entry_last
);
1815 /* Compute the value of METHODS to pass to recursive calls.
1816 Don't allow widening to be tried recursively. */
1818 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1820 /* Look for a wider mode of the same class for which it appears we can do
1823 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1825 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1826 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1828 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1829 != CODE_FOR_nothing
)
1830 || (methods
== OPTAB_LIB
1831 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1833 rtx xop0
= op0
, xop1
= op1
;
1836 /* For certain integer operations, we need not actually extend
1837 the narrow operands, as long as we will truncate
1838 the results to the same narrowness. */
1840 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1841 || binoptab
== xor_optab
1842 || binoptab
== add_optab
|| binoptab
== sub_optab
1843 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1844 && class == MODE_INT
)
1847 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1848 unsignedp
, no_extend
);
1850 /* The second operand of a shift must always be extended. */
1851 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1852 no_extend
&& binoptab
!= ashl_optab
);
1854 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1855 unsignedp
, methods
);
1858 if (class != MODE_INT
)
1861 target
= gen_reg_rtx (mode
);
1862 convert_move (target
, temp
, 0);
1866 return gen_lowpart (mode
, temp
);
1869 delete_insns_since (last
);
1874 delete_insns_since (entry_last
);
1878 /* Like expand_binop, but for open-coding vectors binops. */
1881 expand_vector_binop (enum machine_mode mode
, optab binoptab
, rtx op0
,
1882 rtx op1
, rtx target
, int unsignedp
,
1883 enum optab_methods methods
)
1885 enum machine_mode submode
, tmode
;
1886 int size
, elts
, subsize
, subbitsize
, i
;
1887 rtx t
, a
, b
, res
, seq
;
1888 enum mode_class
class;
1890 class = GET_MODE_CLASS (mode
);
1892 size
= GET_MODE_SIZE (mode
);
1893 submode
= GET_MODE_INNER (mode
);
1895 /* Search for the widest vector mode with the same inner mode that is
1896 still narrower than MODE and that allows to open-code this operator.
1897 Note, if we find such a mode and the handler later decides it can't
1898 do the expansion, we'll be called recursively with the narrower mode. */
1899 for (tmode
= GET_CLASS_NARROWEST_MODE (class);
1900 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
1901 tmode
= GET_MODE_WIDER_MODE (tmode
))
1903 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
1904 && binoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
1908 switch (binoptab
->code
)
1913 tmode
= int_mode_for_mode (mode
);
1914 if (tmode
!= BLKmode
)
1920 subsize
= GET_MODE_SIZE (submode
);
1921 subbitsize
= GET_MODE_BITSIZE (submode
);
1922 elts
= size
/ subsize
;
1924 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1925 but that we operate on more than one element at a time. */
1926 if (subsize
== GET_MODE_UNIT_SIZE (mode
) && methods
== OPTAB_DIRECT
)
1931 /* Errors can leave us with a const0_rtx as operand. */
1932 if (GET_MODE (op0
) != mode
)
1933 op0
= copy_to_mode_reg (mode
, op0
);
1934 if (GET_MODE (op1
) != mode
)
1935 op1
= copy_to_mode_reg (mode
, op1
);
1938 target
= gen_reg_rtx (mode
);
1940 for (i
= 0; i
< elts
; ++i
)
1942 /* If this is part of a register, and not the first item in the
1943 word, we can't store using a SUBREG - that would clobber
1945 And storing with a SUBREG is only possible for the least
1946 significant part, hence we can't do it for big endian
1947 (unless we want to permute the evaluation order. */
1949 && (BYTES_BIG_ENDIAN
1950 ? subsize
< UNITS_PER_WORD
1951 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
1954 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
1955 if (CONSTANT_P (op0
))
1956 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
1958 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
1959 NULL_RTX
, submode
, submode
);
1960 if (CONSTANT_P (op1
))
1961 b
= simplify_gen_subreg (submode
, op1
, mode
, i
* subsize
);
1963 b
= extract_bit_field (op1
, subbitsize
, i
* subbitsize
, unsignedp
,
1964 NULL_RTX
, submode
, submode
);
1966 if (binoptab
->code
== DIV
)
1968 if (class == MODE_VECTOR_FLOAT
)
1969 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1970 unsignedp
, methods
);
1972 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1973 a
, b
, t
, unsignedp
);
1976 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1977 unsignedp
, methods
);
1983 emit_move_insn (t
, res
);
1985 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
);
2000 /* Like expand_unop but for open-coding vector unops. */
2003 expand_vector_unop (enum machine_mode mode
, optab unoptab
, rtx op0
,
2004 rtx target
, int unsignedp
)
2006 enum machine_mode submode
, tmode
;
2007 int size
, elts
, subsize
, subbitsize
, i
;
2010 size
= GET_MODE_SIZE (mode
);
2011 submode
= GET_MODE_INNER (mode
);
2013 /* Search for the widest vector mode with the same inner mode that is
2014 still narrower than MODE and that allows to open-code this operator.
2015 Note, if we find such a mode and the handler later decides it can't
2016 do the expansion, we'll be called recursively with the narrower mode. */
2017 for (tmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode
));
2018 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
2019 tmode
= GET_MODE_WIDER_MODE (tmode
))
2021 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
2022 && unoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
2025 /* If there is no negate operation, try doing a subtract from zero. */
2026 if (unoptab
== neg_optab
&& GET_MODE_CLASS (submode
) == MODE_INT
2027 /* Avoid infinite recursion when an
2028 error has left us with the wrong mode. */
2029 && GET_MODE (op0
) == mode
)
2032 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2033 target
, unsignedp
, OPTAB_DIRECT
);
2038 if (unoptab
== one_cmpl_optab
)
2040 tmode
= int_mode_for_mode (mode
);
2041 if (tmode
!= BLKmode
)
2045 subsize
= GET_MODE_SIZE (submode
);
2046 subbitsize
= GET_MODE_BITSIZE (submode
);
2047 elts
= size
/ subsize
;
2049 /* Errors can leave us with a const0_rtx as operand. */
2050 if (GET_MODE (op0
) != mode
)
2051 op0
= copy_to_mode_reg (mode
, op0
);
2054 target
= gen_reg_rtx (mode
);
2058 for (i
= 0; i
< elts
; ++i
)
2060 /* If this is part of a register, and not the first item in the
2061 word, we can't store using a SUBREG - that would clobber
2063 And storing with a SUBREG is only possible for the least
2064 significant part, hence we can't do it for big endian
2065 (unless we want to permute the evaluation order. */
2067 && (BYTES_BIG_ENDIAN
2068 ? subsize
< UNITS_PER_WORD
2069 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
2072 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
2073 if (CONSTANT_P (op0
))
2074 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
2076 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
2077 t
, submode
, submode
);
2079 res
= expand_unop (submode
, unoptab
, a
, t
, unsignedp
);
2082 emit_move_insn (t
, res
);
2084 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
);
2094 /* Expand a binary operator which has both signed and unsigned forms.
2095 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2098 If we widen unsigned operands, we may use a signed wider operation instead
2099 of an unsigned wider operation, since the result would be the same. */
2102 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2103 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2104 enum optab_methods methods
)
2107 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2108 struct optab wide_soptab
;
2110 /* Do it without widening, if possible. */
2111 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2112 unsignedp
, OPTAB_DIRECT
);
2113 if (temp
|| methods
== OPTAB_DIRECT
)
2116 /* Try widening to a signed int. Make a fake signed optab that
2117 hides any signed insn for direct use. */
2118 wide_soptab
= *soptab
;
2119 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
2120 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
2122 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2123 unsignedp
, OPTAB_WIDEN
);
2125 /* For unsigned operands, try widening to an unsigned int. */
2126 if (temp
== 0 && unsignedp
)
2127 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2128 unsignedp
, OPTAB_WIDEN
);
2129 if (temp
|| methods
== OPTAB_WIDEN
)
2132 /* Use the right width lib call if that exists. */
2133 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2134 if (temp
|| methods
== OPTAB_LIB
)
2137 /* Must widen and use a lib call, use either signed or unsigned. */
2138 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2139 unsignedp
, methods
);
2143 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2144 unsignedp
, methods
);
2148 /* Generate code to perform an operation specified by UNOPPTAB
2149 on operand OP0, with two results to TARG0 and TARG1.
2150 We assume that the order of the operands for the instruction
2151 is TARG0, TARG1, OP0.
2153 Either TARG0 or TARG1 may be zero, but what that means is that
2154 the result is not actually wanted. We will generate it into
2155 a dummy pseudo-reg and discard it. They may not both be zero.
2157 Returns 1 if this operation can be performed; 0 if not. */
2160 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2163 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2164 enum mode_class
class;
2165 enum machine_mode wider_mode
;
2166 rtx entry_last
= get_last_insn ();
2169 class = GET_MODE_CLASS (mode
);
2171 op0
= protect_from_queue (op0
, 0);
2175 op0
= force_not_mem (op0
);
2179 targ0
= protect_from_queue (targ0
, 1);
2181 targ0
= gen_reg_rtx (mode
);
2183 targ1
= protect_from_queue (targ1
, 1);
2185 targ1
= gen_reg_rtx (mode
);
2187 /* Record where to go back to if we fail. */
2188 last
= get_last_insn ();
2190 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2192 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2193 enum machine_mode mode0
= insn_data
[icode
].operand
[2].mode
;
2197 if (GET_MODE (xop0
) != VOIDmode
2198 && GET_MODE (xop0
) != mode0
)
2199 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2201 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2202 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop0
, mode0
))
2203 xop0
= copy_to_mode_reg (mode0
, xop0
);
2205 /* We could handle this, but we should always be called with a pseudo
2206 for our targets and all insns should take them as outputs. */
2207 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2208 || ! (*insn_data
[icode
].operand
[1].predicate
) (targ1
, mode
))
2211 pat
= GEN_FCN (icode
) (targ0
, targ1
, xop0
);
2218 delete_insns_since (last
);
2221 /* It can't be done in this mode. Can we do it in a wider mode? */
2223 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2225 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2226 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2228 if (unoptab
->handlers
[(int) wider_mode
].insn_code
2229 != CODE_FOR_nothing
)
2231 rtx t0
= gen_reg_rtx (wider_mode
);
2232 rtx t1
= gen_reg_rtx (wider_mode
);
2233 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2235 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2237 convert_move (targ0
, t0
, unsignedp
);
2238 convert_move (targ1
, t1
, unsignedp
);
2242 delete_insns_since (last
);
2247 delete_insns_since (entry_last
);
2251 /* Generate code to perform an operation specified by BINOPTAB
2252 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2253 We assume that the order of the operands for the instruction
2254 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2255 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2257 Either TARG0 or TARG1 may be zero, but what that means is that
2258 the result is not actually wanted. We will generate it into
2259 a dummy pseudo-reg and discard it. They may not both be zero.
2261 Returns 1 if this operation can be performed; 0 if not. */
2264 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2267 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2268 enum mode_class
class;
2269 enum machine_mode wider_mode
;
2270 rtx entry_last
= get_last_insn ();
2273 class = GET_MODE_CLASS (mode
);
2275 op0
= protect_from_queue (op0
, 0);
2276 op1
= protect_from_queue (op1
, 0);
2280 op0
= force_not_mem (op0
);
2281 op1
= force_not_mem (op1
);
2284 /* If we are inside an appropriately-short loop and one operand is an
2285 expensive constant, force it into a register. */
2286 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
2287 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
2288 op0
= force_reg (mode
, op0
);
2290 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
2291 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
2292 op1
= force_reg (mode
, op1
);
2295 targ0
= protect_from_queue (targ0
, 1);
2297 targ0
= gen_reg_rtx (mode
);
2299 targ1
= protect_from_queue (targ1
, 1);
2301 targ1
= gen_reg_rtx (mode
);
2303 /* Record where to go back to if we fail. */
2304 last
= get_last_insn ();
2306 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2308 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
2309 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2310 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2312 rtx xop0
= op0
, xop1
= op1
;
2314 /* In case the insn wants input operands in modes different from
2315 those of the actual operands, convert the operands. It would
2316 seem that we don't need to convert CONST_INTs, but we do, so
2317 that they're properly zero-extended, sign-extended or truncated
2320 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2321 xop0
= convert_modes (mode0
,
2322 GET_MODE (op0
) != VOIDmode
2327 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2328 xop1
= convert_modes (mode1
,
2329 GET_MODE (op1
) != VOIDmode
2334 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2335 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2336 xop0
= copy_to_mode_reg (mode0
, xop0
);
2338 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
2339 xop1
= copy_to_mode_reg (mode1
, xop1
);
2341 /* We could handle this, but we should always be called with a pseudo
2342 for our targets and all insns should take them as outputs. */
2343 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2344 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
2347 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2354 delete_insns_since (last
);
2357 /* It can't be done in this mode. Can we do it in a wider mode? */
2359 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2361 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2362 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2364 if (binoptab
->handlers
[(int) wider_mode
].insn_code
2365 != CODE_FOR_nothing
)
2367 rtx t0
= gen_reg_rtx (wider_mode
);
2368 rtx t1
= gen_reg_rtx (wider_mode
);
2369 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2370 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2372 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2375 convert_move (targ0
, t0
, unsignedp
);
2376 convert_move (targ1
, t1
, unsignedp
);
2380 delete_insns_since (last
);
2385 delete_insns_since (entry_last
);
2389 /* Wrapper around expand_unop which takes an rtx code to specify
2390 the operation to perform, not an optab pointer. All other
2391 arguments are the same. */
2393 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2394 rtx target
, int unsignedp
)
2396 optab unop
= code_to_optab
[(int) code
];
2400 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2406 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2408 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2410 enum mode_class
class = GET_MODE_CLASS (mode
);
2411 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2413 enum machine_mode wider_mode
;
2414 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2415 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2417 if (clz_optab
->handlers
[(int) wider_mode
].insn_code
2418 != CODE_FOR_nothing
)
2420 rtx xop0
, temp
, last
;
2422 last
= get_last_insn ();
2425 target
= gen_reg_rtx (mode
);
2426 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2427 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2429 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2430 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2431 - GET_MODE_BITSIZE (mode
)),
2432 target
, true, OPTAB_DIRECT
);
2434 delete_insns_since (last
);
2443 /* Try calculating (parity x) as (and (popcount x) 1), where
2444 popcount can also be done in a wider mode. */
2446 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2448 enum mode_class
class = GET_MODE_CLASS (mode
);
2449 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2451 enum machine_mode wider_mode
;
2452 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2453 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2455 if (popcount_optab
->handlers
[(int) wider_mode
].insn_code
2456 != CODE_FOR_nothing
)
2458 rtx xop0
, temp
, last
;
2460 last
= get_last_insn ();
2463 target
= gen_reg_rtx (mode
);
2464 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2465 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2468 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2469 target
, true, OPTAB_DIRECT
);
2471 delete_insns_since (last
);
2480 /* Generate code to perform an operation specified by UNOPTAB
2481 on operand OP0, with result having machine-mode MODE.
2483 UNSIGNEDP is for the case where we have to widen the operands
2484 to perform the operation. It says to use zero-extension.
2486 If TARGET is nonzero, the value
2487 is generated there, if it is convenient to do so.
2488 In all cases an rtx is returned for the locus of the value;
2489 this may or may not be TARGET. */
2492 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2495 enum mode_class
class;
2496 enum machine_mode wider_mode
;
2498 rtx last
= get_last_insn ();
2501 class = GET_MODE_CLASS (mode
);
2503 op0
= protect_from_queue (op0
, 0);
2507 op0
= force_not_mem (op0
);
2511 target
= protect_from_queue (target
, 1);
2513 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2515 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2516 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2522 temp
= gen_reg_rtx (mode
);
2524 if (GET_MODE (xop0
) != VOIDmode
2525 && GET_MODE (xop0
) != mode0
)
2526 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2528 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2530 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2531 xop0
= copy_to_mode_reg (mode0
, xop0
);
2533 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2534 temp
= gen_reg_rtx (mode
);
2536 pat
= GEN_FCN (icode
) (temp
, xop0
);
2539 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2540 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2542 delete_insns_since (last
);
2543 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2551 delete_insns_since (last
);
2554 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2556 /* Widening clz needs special treatment. */
2557 if (unoptab
== clz_optab
)
2559 temp
= widen_clz (mode
, op0
, target
);
2566 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2567 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2568 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2570 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2574 /* For certain operations, we need not actually extend
2575 the narrow operand, as long as we will truncate the
2576 results to the same narrowness. */
2578 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2579 (unoptab
== neg_optab
2580 || unoptab
== one_cmpl_optab
)
2581 && class == MODE_INT
);
2583 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2588 if (class != MODE_INT
)
2591 target
= gen_reg_rtx (mode
);
2592 convert_move (target
, temp
, 0);
2596 return gen_lowpart (mode
, temp
);
2599 delete_insns_since (last
);
2603 /* These can be done a word at a time. */
2604 if (unoptab
== one_cmpl_optab
2605 && class == MODE_INT
2606 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2607 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2612 if (target
== 0 || target
== op0
)
2613 target
= gen_reg_rtx (mode
);
2617 /* Do the actual arithmetic. */
2618 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2620 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2621 rtx x
= expand_unop (word_mode
, unoptab
,
2622 operand_subword_force (op0
, i
, mode
),
2623 target_piece
, unsignedp
);
2625 if (target_piece
!= x
)
2626 emit_move_insn (target_piece
, x
);
2629 insns
= get_insns ();
2632 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2633 gen_rtx_fmt_e (unoptab
->code
, mode
,
2638 /* Open-code the complex negation operation. */
2639 else if (unoptab
->code
== NEG
2640 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2646 /* Find the correct mode for the real and imaginary parts. */
2647 enum machine_mode submode
= GET_MODE_INNER (mode
);
2649 if (submode
== BLKmode
)
2653 target
= gen_reg_rtx (mode
);
2657 target_piece
= gen_imagpart (submode
, target
);
2658 x
= expand_unop (submode
, unoptab
,
2659 gen_imagpart (submode
, op0
),
2660 target_piece
, unsignedp
);
2661 if (target_piece
!= x
)
2662 emit_move_insn (target_piece
, x
);
2664 target_piece
= gen_realpart (submode
, target
);
2665 x
= expand_unop (submode
, unoptab
,
2666 gen_realpart (submode
, op0
),
2667 target_piece
, unsignedp
);
2668 if (target_piece
!= x
)
2669 emit_move_insn (target_piece
, x
);
2674 emit_no_conflict_block (seq
, target
, op0
, 0,
2675 gen_rtx_fmt_e (unoptab
->code
, mode
,
2680 /* Try negating floating point values by flipping the sign bit. */
2681 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2682 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2684 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2685 enum machine_mode imode
= int_mode_for_mode (mode
);
2686 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2688 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2690 HOST_WIDE_INT hi
, lo
;
2691 rtx last
= get_last_insn ();
2693 /* Handle targets with different FP word orders. */
2694 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2696 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2697 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2698 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2701 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2704 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2708 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2711 temp
= expand_binop (imode
, xor_optab
,
2712 gen_lowpart (imode
, op0
),
2713 immed_double_const (lo
, hi
, imode
),
2714 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2719 target
= gen_reg_rtx (mode
);
2720 insn
= emit_move_insn (target
, gen_lowpart (mode
, temp
));
2721 set_unique_reg_note (insn
, REG_EQUAL
,
2722 gen_rtx_fmt_e (NEG
, mode
,
2726 delete_insns_since (last
);
2730 /* Try calculating parity (x) as popcount (x) % 2. */
2731 if (unoptab
== parity_optab
)
2733 temp
= expand_parity (mode
, op0
, target
);
2738 /* If there is no negation pattern, try subtracting from zero. */
2739 if (unoptab
== neg_optab
&& class == MODE_INT
)
2741 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2742 target
, unsignedp
, OPTAB_DIRECT
);
2748 /* Now try a library call in this mode. */
2749 if (unoptab
->handlers
[(int) mode
].libfunc
)
2753 enum machine_mode outmode
= mode
;
2755 /* All of these functions return small values. Thus we choose to
2756 have them return something that isn't a double-word. */
2757 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
2758 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
2760 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
)));
2764 /* Pass 1 for NO_QUEUE so we don't lose any increments
2765 if the libcall is cse'd or moved. */
2766 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2767 NULL_RTX
, LCT_CONST
, outmode
,
2769 insns
= get_insns ();
2772 target
= gen_reg_rtx (outmode
);
2773 emit_libcall_block (insns
, target
, value
,
2774 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2779 if (class == MODE_VECTOR_FLOAT
|| class == MODE_VECTOR_INT
)
2780 return expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
);
2782 /* It can't be done in this mode. Can we do it in a wider mode? */
2784 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2786 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2787 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2789 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2790 != CODE_FOR_nothing
)
2791 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2795 /* For certain operations, we need not actually extend
2796 the narrow operand, as long as we will truncate the
2797 results to the same narrowness. */
2799 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2800 (unoptab
== neg_optab
2801 || unoptab
== one_cmpl_optab
)
2802 && class == MODE_INT
);
2804 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2807 /* If we are generating clz using wider mode, adjust the
2809 if (unoptab
== clz_optab
&& temp
!= 0)
2810 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2811 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2812 - GET_MODE_BITSIZE (mode
)),
2813 target
, true, OPTAB_DIRECT
);
2817 if (class != MODE_INT
)
2820 target
= gen_reg_rtx (mode
);
2821 convert_move (target
, temp
, 0);
2825 return gen_lowpart (mode
, temp
);
2828 delete_insns_since (last
);
2833 /* If there is no negate operation, try doing a subtract from zero.
2834 The US Software GOFAST library needs this. */
2835 if (unoptab
->code
== NEG
)
2838 temp
= expand_binop (mode
,
2839 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2840 CONST0_RTX (mode
), op0
,
2841 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2849 /* Emit code to compute the absolute value of OP0, with result to
2850 TARGET if convenient. (TARGET may be 0.) The return value says
2851 where the result actually is to be found.
2853 MODE is the mode of the operand; the mode of the result is
2854 different but can be deduced from MODE.
2859 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
2860 int result_unsignedp
)
2865 result_unsignedp
= 1;
2867 /* First try to do it with a special abs instruction. */
2868 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2873 /* For floating point modes, try clearing the sign bit. */
2874 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2875 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2877 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2878 enum machine_mode imode
= int_mode_for_mode (mode
);
2879 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2881 if (imode
!= BLKmode
&& bitpos
>= 0)
2883 HOST_WIDE_INT hi
, lo
;
2884 rtx last
= get_last_insn ();
2886 /* Handle targets with different FP word orders. */
2887 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2889 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2890 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2891 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2894 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2897 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2901 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2904 temp
= expand_binop (imode
, and_optab
,
2905 gen_lowpart (imode
, op0
),
2906 immed_double_const (~lo
, ~hi
, imode
),
2907 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2912 target
= gen_reg_rtx (mode
);
2913 insn
= emit_move_insn (target
, gen_lowpart (mode
, temp
));
2914 set_unique_reg_note (insn
, REG_EQUAL
,
2915 gen_rtx_fmt_e (ABS
, mode
,
2919 delete_insns_since (last
);
2923 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2924 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2926 rtx last
= get_last_insn ();
2928 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2930 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2936 delete_insns_since (last
);
2939 /* If this machine has expensive jumps, we can do integer absolute
2940 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2941 where W is the width of MODE. */
2943 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2945 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2946 size_int (GET_MODE_BITSIZE (mode
) - 1),
2949 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2952 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2953 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2963 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
2964 int result_unsignedp
, int safe
)
2969 result_unsignedp
= 1;
2971 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
2975 /* If that does not win, use conditional jump and negate. */
2977 /* It is safe to use the target if it is the same
2978 as the source if this is also a pseudo register */
2979 if (op0
== target
&& REG_P (op0
)
2980 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2983 op1
= gen_label_rtx ();
2984 if (target
== 0 || ! safe
2985 || GET_MODE (target
) != mode
2986 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
2988 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2989 target
= gen_reg_rtx (mode
);
2991 emit_move_insn (target
, op0
);
2994 /* If this mode is an integer too wide to compare properly,
2995 compare word by word. Rely on CSE to optimize constant cases. */
2996 if (GET_MODE_CLASS (mode
) == MODE_INT
2997 && ! can_compare_p (GE
, mode
, ccp_jump
))
2998 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
3001 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3002 NULL_RTX
, NULL_RTX
, op1
);
3004 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3007 emit_move_insn (target
, op0
);
3013 /* Emit code to compute the absolute value of OP0, with result to
3014 TARGET if convenient. (TARGET may be 0.) The return value says
3015 where the result actually is to be found.
3017 MODE is the mode of the operand; the mode of the result is
3018 different but can be deduced from MODE.
3020 UNSIGNEDP is relevant for complex integer modes. */
3023 expand_complex_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3026 enum mode_class
class = GET_MODE_CLASS (mode
);
3027 enum machine_mode wider_mode
;
3029 rtx entry_last
= get_last_insn ();
3032 optab this_abs_optab
;
3034 /* Find the correct mode for the real and imaginary parts. */
3035 enum machine_mode submode
= GET_MODE_INNER (mode
);
3037 if (submode
== BLKmode
)
3040 op0
= protect_from_queue (op0
, 0);
3044 op0
= force_not_mem (op0
);
3047 last
= get_last_insn ();
3050 target
= protect_from_queue (target
, 1);
3052 this_abs_optab
= ! unsignedp
&& flag_trapv
3053 && (GET_MODE_CLASS(mode
) == MODE_INT
)
3054 ? absv_optab
: abs_optab
;
3056 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3058 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
3059 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3065 temp
= gen_reg_rtx (submode
);
3067 if (GET_MODE (xop0
) != VOIDmode
3068 && GET_MODE (xop0
) != mode0
)
3069 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
3071 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3073 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
3074 xop0
= copy_to_mode_reg (mode0
, xop0
);
3076 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
3077 temp
= gen_reg_rtx (submode
);
3079 pat
= GEN_FCN (icode
) (temp
, xop0
);
3082 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3083 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
3086 delete_insns_since (last
);
3087 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
3096 delete_insns_since (last
);
3099 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3101 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3102 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3104 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3105 != CODE_FOR_nothing
)
3109 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3110 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3114 if (class != MODE_COMPLEX_INT
)
3117 target
= gen_reg_rtx (submode
);
3118 convert_move (target
, temp
, 0);
3122 return gen_lowpart (submode
, temp
);
3125 delete_insns_since (last
);
3129 /* Open-code the complex absolute-value operation
3130 if we can open-code sqrt. Otherwise it's not worth while. */
3131 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
3134 rtx real
, imag
, total
;
3136 real
= gen_realpart (submode
, op0
);
3137 imag
= gen_imagpart (submode
, op0
);
3139 /* Square both parts. */
3140 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
3141 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
3143 /* Sum the parts. */
3144 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
3145 0, OPTAB_LIB_WIDEN
);
3147 /* Get sqrt in TARGET. Set TARGET to where the result is. */
3148 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
3150 delete_insns_since (last
);
3155 /* Now try a library call in this mode. */
3156 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
3163 /* Pass 1 for NO_QUEUE so we don't lose any increments
3164 if the libcall is cse'd or moved. */
3165 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
3166 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
3167 insns
= get_insns ();
3170 target
= gen_reg_rtx (submode
);
3171 emit_libcall_block (insns
, target
, value
,
3172 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
3177 /* It can't be done in this mode. Can we do it in a wider mode? */
3179 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3180 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3182 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3183 != CODE_FOR_nothing
)
3184 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
3188 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3190 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3194 if (class != MODE_COMPLEX_INT
)
3197 target
= gen_reg_rtx (submode
);
3198 convert_move (target
, temp
, 0);
3202 return gen_lowpart (submode
, temp
);
3205 delete_insns_since (last
);
3209 delete_insns_since (entry_last
);
3213 /* Generate an instruction whose insn-code is INSN_CODE,
3214 with two operands: an output TARGET and an input OP0.
3215 TARGET *must* be nonzero, and the output is always stored there.
3216 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3217 the value that is stored into TARGET. */
3220 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3223 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3226 temp
= target
= protect_from_queue (target
, 1);
3228 op0
= protect_from_queue (op0
, 0);
3230 /* Sign and zero extension from memory is often done specially on
3231 RISC machines, so forcing into a register here can pessimize
3233 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
3234 op0
= force_not_mem (op0
);
3236 /* Now, if insn does not accept our operands, put them into pseudos. */
3238 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
3239 op0
= copy_to_mode_reg (mode0
, op0
);
3241 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
3242 || (flag_force_mem
&& MEM_P (temp
)))
3243 temp
= gen_reg_rtx (GET_MODE (temp
));
3245 pat
= GEN_FCN (icode
) (temp
, op0
);
3247 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3248 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3253 emit_move_insn (target
, temp
);
3256 /* Emit code to perform a series of operations on a multi-word quantity, one
3259 Such a block is preceded by a CLOBBER of the output, consists of multiple
3260 insns, each setting one word of the output, and followed by a SET copying
3261 the output to itself.
3263 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3264 note indicating that it doesn't conflict with the (also multi-word)
3265 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3268 INSNS is a block of code generated to perform the operation, not including
3269 the CLOBBER and final copy. All insns that compute intermediate values
3270 are first emitted, followed by the block as described above.
3272 TARGET, OP0, and OP1 are the output and inputs of the operations,
3273 respectively. OP1 may be zero for a unary operation.
3275 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3278 If TARGET is not a register, INSNS is simply emitted with no special
3279 processing. Likewise if anything in INSNS is not an INSN or if
3280 there is a libcall block inside INSNS.
3282 The final insn emitted is returned. */
3285 emit_no_conflict_block (rtx insns
, rtx target
, rtx op0
, rtx op1
, rtx equiv
)
3287 rtx prev
, next
, first
, last
, insn
;
3289 if (!REG_P (target
) || reload_in_progress
)
3290 return emit_insn (insns
);
3292 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3293 if (!NONJUMP_INSN_P (insn
)
3294 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
3295 return emit_insn (insns
);
3297 /* First emit all insns that do not store into words of the output and remove
3298 these from the list. */
3299 for (insn
= insns
; insn
; insn
= next
)
3304 next
= NEXT_INSN (insn
);
3306 /* Some ports (cris) create a libcall regions at their own. We must
3307 avoid any potential nesting of LIBCALLs. */
3308 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3309 remove_note (insn
, note
);
3310 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3311 remove_note (insn
, note
);
3313 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
3314 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3315 set
= PATTERN (insn
);
3316 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3318 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3319 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
3321 set
= XVECEXP (PATTERN (insn
), 0, i
);
3329 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
3331 if (PREV_INSN (insn
))
3332 NEXT_INSN (PREV_INSN (insn
)) = next
;
3337 PREV_INSN (next
) = PREV_INSN (insn
);
3343 prev
= get_last_insn ();
3345 /* Now write the CLOBBER of the output, followed by the setting of each
3346 of the words, followed by the final copy. */
3347 if (target
!= op0
&& target
!= op1
)
3348 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
3350 for (insn
= insns
; insn
; insn
= next
)
3352 next
= NEXT_INSN (insn
);
3355 if (op1
&& REG_P (op1
))
3356 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
3359 if (op0
&& REG_P (op0
))
3360 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
3364 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3365 != CODE_FOR_nothing
)
3367 last
= emit_move_insn (target
, target
);
3369 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
3373 last
= get_last_insn ();
3375 /* Remove any existing REG_EQUAL note from "last", or else it will
3376 be mistaken for a note referring to the full contents of the
3377 alleged libcall value when found together with the REG_RETVAL
3378 note added below. An existing note can come from an insn
3379 expansion at "last". */
3380 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3384 first
= get_insns ();
3386 first
= NEXT_INSN (prev
);
3388 /* Encapsulate the block so it gets manipulated as a unit. */
3389 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3391 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
3396 /* Emit code to make a call to a constant function or a library call.
3398 INSNS is a list containing all insns emitted in the call.
3399 These insns leave the result in RESULT. Our block is to copy RESULT
3400 to TARGET, which is logically equivalent to EQUIV.
3402 We first emit any insns that set a pseudo on the assumption that these are
3403 loading constants into registers; doing so allows them to be safely cse'ed
3404 between blocks. Then we emit all the other insns in the block, followed by
3405 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3406 note with an operand of EQUIV.
3408 Moving assignments to pseudos outside of the block is done to improve
3409 the generated code, but is not required to generate correct code,
3410 hence being unable to move an assignment is not grounds for not making
3411 a libcall block. There are two reasons why it is safe to leave these
3412 insns inside the block: First, we know that these pseudos cannot be
3413 used in generated RTL outside the block since they are created for
3414 temporary purposes within the block. Second, CSE will not record the
3415 values of anything set inside a libcall block, so we know they must
3416 be dead at the end of the block.
3418 Except for the first group of insns (the ones setting pseudos), the
3419 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3422 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3424 rtx final_dest
= target
;
3425 rtx prev
, next
, first
, last
, insn
;
3427 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3428 into a MEM later. Protect the libcall block from this change. */
3429 if (! REG_P (target
) || REG_USERVAR_P (target
))
3430 target
= gen_reg_rtx (GET_MODE (target
));
3432 /* If we're using non-call exceptions, a libcall corresponding to an
3433 operation that may trap may also trap. */
3434 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3436 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3439 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3441 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3442 remove_note (insn
, note
);
3446 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3447 reg note to indicate that this call cannot throw or execute a nonlocal
3448 goto (unless there is already a REG_EH_REGION note, in which case
3450 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3453 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3456 XEXP (note
, 0) = constm1_rtx
;
3458 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, constm1_rtx
,
3462 /* First emit all insns that set pseudos. Remove them from the list as
3463 we go. Avoid insns that set pseudos which were referenced in previous
3464 insns. These can be generated by move_by_pieces, for example,
3465 to update an address. Similarly, avoid insns that reference things
3466 set in previous insns. */
3468 for (insn
= insns
; insn
; insn
= next
)
3470 rtx set
= single_set (insn
);
3473 /* Some ports (cris) create a libcall regions at their own. We must
3474 avoid any potential nesting of LIBCALLs. */
3475 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3476 remove_note (insn
, note
);
3477 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3478 remove_note (insn
, note
);
3480 next
= NEXT_INSN (insn
);
3482 if (set
!= 0 && REG_P (SET_DEST (set
))
3483 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
3485 || ((! INSN_P(insns
)
3486 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
3487 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
3488 && ! modified_in_p (SET_SRC (set
), insns
)
3489 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
3491 if (PREV_INSN (insn
))
3492 NEXT_INSN (PREV_INSN (insn
)) = next
;
3497 PREV_INSN (next
) = PREV_INSN (insn
);
3502 /* Some ports use a loop to copy large arguments onto the stack.
3503 Don't move anything outside such a loop. */
3508 prev
= get_last_insn ();
3510 /* Write the remaining insns followed by the final copy. */
3512 for (insn
= insns
; insn
; insn
= next
)
3514 next
= NEXT_INSN (insn
);
3519 last
= emit_move_insn (target
, result
);
3520 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3521 != CODE_FOR_nothing
)
3522 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3525 /* Remove any existing REG_EQUAL note from "last", or else it will
3526 be mistaken for a note referring to the full contents of the
3527 libcall value when found together with the REG_RETVAL note added
3528 below. An existing note can come from an insn expansion at
3530 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3533 if (final_dest
!= target
)
3534 emit_move_insn (final_dest
, target
);
3537 first
= get_insns ();
3539 first
= NEXT_INSN (prev
);
3541 /* Encapsulate the block so it gets manipulated as a unit. */
3542 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
3544 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
3545 when the encapsulated region would not be in one basic block,
3546 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
3548 bool attach_libcall_retval_notes
= true;
3549 next
= NEXT_INSN (last
);
3550 for (insn
= first
; insn
!= next
; insn
= NEXT_INSN (insn
))
3551 if (control_flow_insn_p (insn
))
3553 attach_libcall_retval_notes
= false;
3557 if (attach_libcall_retval_notes
)
3559 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3561 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
3567 /* Generate code to store zero in X. */
3570 emit_clr_insn (rtx x
)
3572 emit_move_insn (x
, const0_rtx
);
3575 /* Generate code to store 1 in X
3576 assuming it contains zero beforehand. */
3579 emit_0_to_1_insn (rtx x
)
3581 emit_move_insn (x
, const1_rtx
);
3584 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3585 PURPOSE describes how this comparison will be used. CODE is the rtx
3586 comparison code we will be using.
3588 ??? Actually, CODE is slightly weaker than that. A target is still
3589 required to implement all of the normal bcc operations, but not
3590 required to implement all (or any) of the unordered bcc operations. */
3593 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3594 enum can_compare_purpose purpose
)
3598 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3600 if (purpose
== ccp_jump
)
3601 return bcc_gen_fctn
[(int) code
] != NULL
;
3602 else if (purpose
== ccp_store_flag
)
3603 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
3605 /* There's only one cmov entry point, and it's allowed to fail. */
3608 if (purpose
== ccp_jump
3609 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3611 if (purpose
== ccp_cmov
3612 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3614 if (purpose
== ccp_store_flag
3615 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3618 mode
= GET_MODE_WIDER_MODE (mode
);
3620 while (mode
!= VOIDmode
);
3625 /* This function is called when we are going to emit a compare instruction that
3626 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3628 *PMODE is the mode of the inputs (in case they are const_int).
3629 *PUNSIGNEDP nonzero says that the operands are unsigned;
3630 this matters if they need to be widened.
3632 If they have mode BLKmode, then SIZE specifies the size of both operands.
3634 This function performs all the setup necessary so that the caller only has
3635 to emit a single comparison insn. This setup can involve doing a BLKmode
3636 comparison or emitting a library call to perform the comparison if no insn
3637 is available to handle it.
3638 The values which are passed in through pointers can be modified; the caller
3639 should perform the comparison on the modified values. */
3642 prepare_cmp_insn (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
, rtx size
,
3643 enum machine_mode
*pmode
, int *punsignedp
,
3644 enum can_compare_purpose purpose
)
3646 enum machine_mode mode
= *pmode
;
3647 rtx x
= *px
, y
= *py
;
3648 int unsignedp
= *punsignedp
;
3649 enum mode_class
class;
3651 class = GET_MODE_CLASS (mode
);
3653 /* They could both be VOIDmode if both args are immediate constants,
3654 but we should fold that at an earlier stage.
3655 With no special code here, this will call abort,
3656 reminding the programmer to implement such folding. */
3658 if (mode
!= BLKmode
&& flag_force_mem
)
3660 /* Load duplicate non-volatile operands once. */
3661 if (rtx_equal_p (x
, y
) && ! volatile_refs_p (x
))
3663 x
= force_not_mem (x
);
3668 x
= force_not_mem (x
);
3669 y
= force_not_mem (y
);
3673 /* If we are inside an appropriately-short loop and one operand is an
3674 expensive constant, force it into a register. */
3675 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3676 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3677 x
= force_reg (mode
, x
);
3679 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3680 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3681 y
= force_reg (mode
, y
);
3684 /* Abort if we have a non-canonical comparison. The RTL documentation
3685 states that canonical comparisons are required only for targets which
3687 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3691 /* Don't let both operands fail to indicate the mode. */
3692 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3693 x
= force_reg (mode
, x
);
3695 /* Handle all BLKmode compares. */
3697 if (mode
== BLKmode
)
3699 enum machine_mode cmp_mode
, result_mode
;
3700 enum insn_code cmp_code
;
3705 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3711 x
= protect_from_queue (x
, 0);
3712 y
= protect_from_queue (y
, 0);
3713 size
= protect_from_queue (size
, 0);
3715 /* Try to use a memory block compare insn - either cmpstr
3716 or cmpmem will do. */
3717 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
3718 cmp_mode
!= VOIDmode
;
3719 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
3721 cmp_code
= cmpmem_optab
[cmp_mode
];
3722 if (cmp_code
== CODE_FOR_nothing
)
3723 cmp_code
= cmpstr_optab
[cmp_mode
];
3724 if (cmp_code
== CODE_FOR_nothing
)
3727 /* Must make sure the size fits the insn's mode. */
3728 if ((GET_CODE (size
) == CONST_INT
3729 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
3730 || (GET_MODE_BITSIZE (GET_MODE (size
))
3731 > GET_MODE_BITSIZE (cmp_mode
)))
3734 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
3735 result
= gen_reg_rtx (result_mode
);
3736 size
= convert_to_mode (cmp_mode
, size
, 1);
3737 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
3741 *pmode
= result_mode
;
3745 /* Otherwise call a library function, memcmp. */
3746 libfunc
= memcmp_libfunc
;
3747 length_type
= sizetype
;
3748 result_mode
= TYPE_MODE (integer_type_node
);
3749 cmp_mode
= TYPE_MODE (length_type
);
3750 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
3751 TYPE_UNSIGNED (length_type
));
3753 result
= emit_library_call_value (libfunc
, 0, LCT_PURE_MAKE_BLOCK
,
3760 *pmode
= result_mode
;
3764 /* Don't allow operands to the compare to trap, as that can put the
3765 compare and branch in different basic blocks. */
3766 if (flag_non_call_exceptions
)
3769 x
= force_reg (mode
, x
);
3771 y
= force_reg (mode
, y
);
3776 if (can_compare_p (*pcomparison
, mode
, purpose
))
3779 /* Handle a lib call just for the mode we are using. */
3781 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3783 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3786 /* If we want unsigned, and this mode has a distinct unsigned
3787 comparison routine, use that. */
3788 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3789 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3791 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3792 word_mode
, 2, x
, mode
, y
, mode
);
3794 /* Integer comparison returns a result that must be compared against 1,
3795 so that even if we do an unsigned compare afterward,
3796 there is still a value that can represent the result "less than". */
3803 if (class == MODE_FLOAT
)
3804 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3810 /* Before emitting an insn with code ICODE, make sure that X, which is going
3811 to be used for operand OPNUM of the insn, is converted from mode MODE to
3812 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3813 that it is accepted by the operand predicate. Return the new value. */
3816 prepare_operand (int icode
, rtx x
, int opnum
, enum machine_mode mode
,
3817 enum machine_mode wider_mode
, int unsignedp
)
3819 x
= protect_from_queue (x
, 0);
3821 if (mode
!= wider_mode
)
3822 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3824 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3825 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3829 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3835 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3836 we can do the comparison.
3837 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3838 be NULL_RTX which indicates that only a comparison is to be generated. */
3841 emit_cmp_and_jump_insn_1 (rtx x
, rtx y
, enum machine_mode mode
,
3842 enum rtx_code comparison
, int unsignedp
, rtx label
)
3844 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3845 enum mode_class
class = GET_MODE_CLASS (mode
);
3846 enum machine_mode wider_mode
= mode
;
3848 /* Try combined insns first. */
3851 enum insn_code icode
;
3852 PUT_MODE (test
, wider_mode
);
3856 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3858 if (icode
!= CODE_FOR_nothing
3859 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3861 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3862 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3863 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3868 /* Handle some compares against zero. */
3869 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3870 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3872 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3873 emit_insn (GEN_FCN (icode
) (x
));
3875 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3879 /* Handle compares for which there is a directly suitable insn. */
3881 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3882 if (icode
!= CODE_FOR_nothing
)
3884 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3885 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3886 emit_insn (GEN_FCN (icode
) (x
, y
));
3888 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3892 if (class != MODE_INT
&& class != MODE_FLOAT
3893 && class != MODE_COMPLEX_FLOAT
)
3896 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3898 while (wider_mode
!= VOIDmode
);
3903 /* Generate code to compare X with Y so that the condition codes are
3904 set and to jump to LABEL if the condition is true. If X is a
3905 constant and Y is not a constant, then the comparison is swapped to
3906 ensure that the comparison RTL has the canonical form.
3908 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3909 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3910 the proper branch condition code.
3912 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3914 MODE is the mode of the inputs (in case they are const_int).
3916 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3917 be passed unchanged to emit_cmp_insn, then potentially converted into an
3918 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3921 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3922 enum machine_mode mode
, int unsignedp
, rtx label
)
3924 rtx op0
= x
, op1
= y
;
3926 /* Swap operands and condition to ensure canonical RTL. */
3927 if (swap_commutative_operands_p (x
, y
))
3929 /* If we're not emitting a branch, this means some caller
3935 comparison
= swap_condition (comparison
);
3939 /* If OP0 is still a constant, then both X and Y must be constants. Force
3940 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3942 if (CONSTANT_P (op0
))
3943 op0
= force_reg (mode
, op0
);
3948 comparison
= unsigned_condition (comparison
);
3950 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3952 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3955 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3958 emit_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3959 enum machine_mode mode
, int unsignedp
)
3961 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3964 /* Emit a library call comparison between floating point X and Y.
3965 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3968 prepare_float_lib_cmp (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
,
3969 enum machine_mode
*pmode
, int *punsignedp
)
3971 enum rtx_code comparison
= *pcomparison
;
3972 enum rtx_code swapped
= swap_condition (comparison
);
3973 rtx x
= protect_from_queue (*px
, 0);
3974 rtx y
= protect_from_queue (*py
, 0);
3975 enum machine_mode orig_mode
= GET_MODE (x
);
3976 enum machine_mode mode
;
3977 rtx value
, target
, insns
, equiv
;
3980 for (mode
= orig_mode
; mode
!= VOIDmode
; mode
= GET_MODE_WIDER_MODE (mode
))
3982 if ((libfunc
= code_to_optab
[comparison
]->handlers
[mode
].libfunc
))
3985 if ((libfunc
= code_to_optab
[swapped
]->handlers
[mode
].libfunc
))
3988 tmp
= x
; x
= y
; y
= tmp
;
3989 comparison
= swapped
;
3994 if (mode
== VOIDmode
)
3997 if (mode
!= orig_mode
)
3999 x
= convert_to_mode (mode
, x
, 0);
4000 y
= convert_to_mode (mode
, y
, 0);
4003 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4004 the RTL. The allows the RTL optimizers to delete the libcall if the
4005 condition can be determined at compile-time. */
4006 if (comparison
== UNORDERED
)
4008 rtx temp
= simplify_gen_relational (NE
, word_mode
, mode
, x
, x
);
4009 equiv
= simplify_gen_relational (NE
, word_mode
, mode
, y
, y
);
4010 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
4011 temp
, const_true_rtx
, equiv
);
4015 equiv
= simplify_gen_relational (comparison
, word_mode
, mode
, x
, y
);
4016 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4018 rtx true_rtx
, false_rtx
;
4023 true_rtx
= const0_rtx
;
4024 false_rtx
= const_true_rtx
;
4028 true_rtx
= const_true_rtx
;
4029 false_rtx
= const0_rtx
;
4033 true_rtx
= const1_rtx
;
4034 false_rtx
= const0_rtx
;
4038 true_rtx
= const0_rtx
;
4039 false_rtx
= constm1_rtx
;
4043 true_rtx
= constm1_rtx
;
4044 false_rtx
= const0_rtx
;
4048 true_rtx
= const0_rtx
;
4049 false_rtx
= const1_rtx
;
4055 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
4056 equiv
, true_rtx
, false_rtx
);
4061 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4062 word_mode
, 2, x
, mode
, y
, mode
);
4063 insns
= get_insns ();
4066 target
= gen_reg_rtx (word_mode
);
4067 emit_libcall_block (insns
, target
, value
, equiv
);
4070 if (comparison
== UNORDERED
4071 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4077 *pcomparison
= comparison
;
4081 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4084 emit_indirect_jump (rtx loc
)
4086 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
4088 loc
= copy_to_mode_reg (Pmode
, loc
);
4090 emit_jump_insn (gen_indirect_jump (loc
));
4094 #ifdef HAVE_conditional_move
4096 /* Emit a conditional move instruction if the machine supports one for that
4097 condition and machine mode.
4099 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4100 the mode to use should they be constants. If it is VOIDmode, they cannot
4103 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4104 should be stored there. MODE is the mode to use should they be constants.
4105 If it is VOIDmode, they cannot both be constants.
4107 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4108 is not supported. */
4111 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4112 enum machine_mode cmode
, rtx op2
, rtx op3
,
4113 enum machine_mode mode
, int unsignedp
)
4115 rtx tem
, subtarget
, comparison
, insn
;
4116 enum insn_code icode
;
4117 enum rtx_code reversed
;
4119 /* If one operand is constant, make it the second one. Only do this
4120 if the other operand is not constant as well. */
4122 if (swap_commutative_operands_p (op0
, op1
))
4127 code
= swap_condition (code
);
4130 /* get_condition will prefer to generate LT and GT even if the old
4131 comparison was against zero, so undo that canonicalization here since
4132 comparisons against zero are cheaper. */
4133 if (code
== LT
&& op1
== const1_rtx
)
4134 code
= LE
, op1
= const0_rtx
;
4135 else if (code
== GT
&& op1
== constm1_rtx
)
4136 code
= GE
, op1
= const0_rtx
;
4138 if (cmode
== VOIDmode
)
4139 cmode
= GET_MODE (op0
);
4141 if (swap_commutative_operands_p (op2
, op3
)
4142 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4151 if (mode
== VOIDmode
)
4152 mode
= GET_MODE (op2
);
4154 icode
= movcc_gen_code
[mode
];
4156 if (icode
== CODE_FOR_nothing
)
4161 op2
= force_not_mem (op2
);
4162 op3
= force_not_mem (op3
);
4166 target
= protect_from_queue (target
, 1);
4168 target
= gen_reg_rtx (mode
);
4174 op2
= protect_from_queue (op2
, 0);
4175 op3
= protect_from_queue (op3
, 0);
4177 /* If the insn doesn't accept these operands, put them in pseudos. */
4179 if (! (*insn_data
[icode
].operand
[0].predicate
)
4180 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4181 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4183 if (! (*insn_data
[icode
].operand
[2].predicate
)
4184 (op2
, insn_data
[icode
].operand
[2].mode
))
4185 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4187 if (! (*insn_data
[icode
].operand
[3].predicate
)
4188 (op3
, insn_data
[icode
].operand
[3].mode
))
4189 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4191 /* Everything should now be in the suitable form, so emit the compare insn
4192 and then the conditional move. */
4195 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4197 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4198 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4199 return NULL and let the caller figure out how best to deal with this
4201 if (GET_CODE (comparison
) != code
)
4204 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4206 /* If that failed, then give up. */
4212 if (subtarget
!= target
)
4213 convert_move (target
, subtarget
, 0);
4218 /* Return nonzero if a conditional move of mode MODE is supported.
4220 This function is for combine so it can tell whether an insn that looks
4221 like a conditional move is actually supported by the hardware. If we
4222 guess wrong we lose a bit on optimization, but that's it. */
4223 /* ??? sparc64 supports conditionally moving integers values based on fp
4224 comparisons, and vice versa. How do we handle them? */
4227 can_conditionally_move_p (enum machine_mode mode
)
4229 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4235 #endif /* HAVE_conditional_move */
4237 /* Emit a conditional addition instruction if the machine supports one for that
4238 condition and machine mode.
4240 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4241 the mode to use should they be constants. If it is VOIDmode, they cannot
4244 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4245 should be stored there. MODE is the mode to use should they be constants.
4246 If it is VOIDmode, they cannot both be constants.
4248 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4249 is not supported. */
4252 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4253 enum machine_mode cmode
, rtx op2
, rtx op3
,
4254 enum machine_mode mode
, int unsignedp
)
4256 rtx tem
, subtarget
, comparison
, insn
;
4257 enum insn_code icode
;
4258 enum rtx_code reversed
;
4260 /* If one operand is constant, make it the second one. Only do this
4261 if the other operand is not constant as well. */
4263 if (swap_commutative_operands_p (op0
, op1
))
4268 code
= swap_condition (code
);
4271 /* get_condition will prefer to generate LT and GT even if the old
4272 comparison was against zero, so undo that canonicalization here since
4273 comparisons against zero are cheaper. */
4274 if (code
== LT
&& op1
== const1_rtx
)
4275 code
= LE
, op1
= const0_rtx
;
4276 else if (code
== GT
&& op1
== constm1_rtx
)
4277 code
= GE
, op1
= const0_rtx
;
4279 if (cmode
== VOIDmode
)
4280 cmode
= GET_MODE (op0
);
4282 if (swap_commutative_operands_p (op2
, op3
)
4283 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4292 if (mode
== VOIDmode
)
4293 mode
= GET_MODE (op2
);
4295 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
4297 if (icode
== CODE_FOR_nothing
)
4302 op2
= force_not_mem (op2
);
4303 op3
= force_not_mem (op3
);
4307 target
= protect_from_queue (target
, 1);
4309 target
= gen_reg_rtx (mode
);
4315 op2
= protect_from_queue (op2
, 0);
4316 op3
= protect_from_queue (op3
, 0);
4318 /* If the insn doesn't accept these operands, put them in pseudos. */
4320 if (! (*insn_data
[icode
].operand
[0].predicate
)
4321 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4322 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4324 if (! (*insn_data
[icode
].operand
[2].predicate
)
4325 (op2
, insn_data
[icode
].operand
[2].mode
))
4326 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4328 if (! (*insn_data
[icode
].operand
[3].predicate
)
4329 (op3
, insn_data
[icode
].operand
[3].mode
))
4330 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4332 /* Everything should now be in the suitable form, so emit the compare insn
4333 and then the conditional move. */
4336 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4338 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4339 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4340 return NULL and let the caller figure out how best to deal with this
4342 if (GET_CODE (comparison
) != code
)
4345 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4347 /* If that failed, then give up. */
4353 if (subtarget
!= target
)
4354 convert_move (target
, subtarget
, 0);
4359 /* These functions attempt to generate an insn body, rather than
4360 emitting the insn, but if the gen function already emits them, we
4361 make no attempt to turn them back into naked patterns.
4363 They do not protect from queued increments,
4364 because they may be used 1) in protect_from_queue itself
4365 and 2) in other passes where there is no queue. */
4367 /* Generate and return an insn body to add Y to X. */
4370 gen_add2_insn (rtx x
, rtx y
)
4372 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4374 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4375 (x
, insn_data
[icode
].operand
[0].mode
))
4376 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4377 (x
, insn_data
[icode
].operand
[1].mode
))
4378 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4379 (y
, insn_data
[icode
].operand
[2].mode
)))
4382 return (GEN_FCN (icode
) (x
, x
, y
));
4385 /* Generate and return an insn body to add r1 and c,
4386 storing the result in r0. */
4388 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4390 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4392 if (icode
== CODE_FOR_nothing
4393 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4394 (r0
, insn_data
[icode
].operand
[0].mode
))
4395 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4396 (r1
, insn_data
[icode
].operand
[1].mode
))
4397 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4398 (c
, insn_data
[icode
].operand
[2].mode
)))
4401 return (GEN_FCN (icode
) (r0
, r1
, c
));
4405 have_add2_insn (rtx x
, rtx y
)
4409 if (GET_MODE (x
) == VOIDmode
)
4412 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4414 if (icode
== CODE_FOR_nothing
)
4417 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4418 (x
, insn_data
[icode
].operand
[0].mode
))
4419 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4420 (x
, insn_data
[icode
].operand
[1].mode
))
4421 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4422 (y
, insn_data
[icode
].operand
[2].mode
)))
4428 /* Generate and return an insn body to subtract Y from X. */
4431 gen_sub2_insn (rtx x
, rtx y
)
4433 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4435 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4436 (x
, insn_data
[icode
].operand
[0].mode
))
4437 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4438 (x
, insn_data
[icode
].operand
[1].mode
))
4439 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4440 (y
, insn_data
[icode
].operand
[2].mode
)))
4443 return (GEN_FCN (icode
) (x
, x
, y
));
4446 /* Generate and return an insn body to subtract r1 and c,
4447 storing the result in r0. */
4449 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4451 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4453 if (icode
== CODE_FOR_nothing
4454 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4455 (r0
, insn_data
[icode
].operand
[0].mode
))
4456 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4457 (r1
, insn_data
[icode
].operand
[1].mode
))
4458 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4459 (c
, insn_data
[icode
].operand
[2].mode
)))
4462 return (GEN_FCN (icode
) (r0
, r1
, c
));
4466 have_sub2_insn (rtx x
, rtx y
)
4470 if (GET_MODE (x
) == VOIDmode
)
4473 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4475 if (icode
== CODE_FOR_nothing
)
4478 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4479 (x
, insn_data
[icode
].operand
[0].mode
))
4480 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4481 (x
, insn_data
[icode
].operand
[1].mode
))
4482 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4483 (y
, insn_data
[icode
].operand
[2].mode
)))
4489 /* Generate the body of an instruction to copy Y into X.
4490 It may be a list of insns, if one insn isn't enough. */
4493 gen_move_insn (rtx x
, rtx y
)
4498 emit_move_insn_1 (x
, y
);
4504 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4505 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4506 no such operation exists, CODE_FOR_nothing will be returned. */
4509 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4513 #ifdef HAVE_ptr_extend
4515 return CODE_FOR_ptr_extend
;
4518 tab
= unsignedp
? zext_optab
: sext_optab
;
4519 return tab
->handlers
[to_mode
][from_mode
].insn_code
;
4522 /* Generate the body of an insn to extend Y (with mode MFROM)
4523 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4526 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4527 enum machine_mode mfrom
, int unsignedp
)
4529 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4530 return GEN_FCN (icode
) (x
, y
);
4533 /* can_fix_p and can_float_p say whether the target machine
4534 can directly convert a given fixed point type to
4535 a given floating point type, or vice versa.
4536 The returned value is the CODE_FOR_... value to use,
4537 or CODE_FOR_nothing if these modes cannot be directly converted.
4539 *TRUNCP_PTR is set to 1 if it is necessary to output
4540 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4542 static enum insn_code
4543 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4544 int unsignedp
, int *truncp_ptr
)
4547 enum insn_code icode
;
4549 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4550 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
4551 if (icode
!= CODE_FOR_nothing
)
4557 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4558 for this to work. We need to rework the fix* and ftrunc* patterns
4559 and documentation. */
4560 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4561 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
4562 if (icode
!= CODE_FOR_nothing
4563 && ftrunc_optab
->handlers
[fltmode
].insn_code
!= CODE_FOR_nothing
)
4570 return CODE_FOR_nothing
;
4573 static enum insn_code
4574 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4579 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4580 return tab
->handlers
[fltmode
][fixmode
].insn_code
;
4583 /* Generate code to convert FROM to floating point
4584 and store in TO. FROM must be fixed point and not VOIDmode.
4585 UNSIGNEDP nonzero means regard FROM as unsigned.
4586 Normally this is done by correcting the final value
4587 if it is negative. */
4590 expand_float (rtx to
, rtx from
, int unsignedp
)
4592 enum insn_code icode
;
4594 enum machine_mode fmode
, imode
;
4596 /* Crash now, because we won't be able to decide which mode to use. */
4597 if (GET_MODE (from
) == VOIDmode
)
4600 /* Look for an insn to do the conversion. Do it in the specified
4601 modes if possible; otherwise convert either input, output or both to
4602 wider mode. If the integer mode is wider than the mode of FROM,
4603 we can do the conversion signed even if the input is unsigned. */
4605 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4606 fmode
= GET_MODE_WIDER_MODE (fmode
))
4607 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4608 imode
= GET_MODE_WIDER_MODE (imode
))
4610 int doing_unsigned
= unsignedp
;
4612 if (fmode
!= GET_MODE (to
)
4613 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4616 icode
= can_float_p (fmode
, imode
, unsignedp
);
4617 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
4618 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
4620 if (icode
!= CODE_FOR_nothing
)
4622 to
= protect_from_queue (to
, 1);
4623 from
= protect_from_queue (from
, 0);
4625 if (imode
!= GET_MODE (from
))
4626 from
= convert_to_mode (imode
, from
, unsignedp
);
4628 if (fmode
!= GET_MODE (to
))
4629 target
= gen_reg_rtx (fmode
);
4631 emit_unop_insn (icode
, target
, from
,
4632 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4635 convert_move (to
, target
, 0);
4640 /* Unsigned integer, and no way to convert directly.
4641 Convert as signed, then conditionally adjust the result. */
4644 rtx label
= gen_label_rtx ();
4646 REAL_VALUE_TYPE offset
;
4650 to
= protect_from_queue (to
, 1);
4651 from
= protect_from_queue (from
, 0);
4654 from
= force_not_mem (from
);
4656 /* Look for a usable floating mode FMODE wider than the source and at
4657 least as wide as the target. Using FMODE will avoid rounding woes
4658 with unsigned values greater than the signed maximum value. */
4660 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4661 fmode
= GET_MODE_WIDER_MODE (fmode
))
4662 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4663 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4666 if (fmode
== VOIDmode
)
4668 /* There is no such mode. Pretend the target is wide enough. */
4669 fmode
= GET_MODE (to
);
4671 /* Avoid double-rounding when TO is narrower than FROM. */
4672 if ((significand_size (fmode
) + 1)
4673 < GET_MODE_BITSIZE (GET_MODE (from
)))
4676 rtx neglabel
= gen_label_rtx ();
4678 /* Don't use TARGET if it isn't a register, is a hard register,
4679 or is the wrong mode. */
4681 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4682 || GET_MODE (target
) != fmode
)
4683 target
= gen_reg_rtx (fmode
);
4685 imode
= GET_MODE (from
);
4686 do_pending_stack_adjust ();
4688 /* Test whether the sign bit is set. */
4689 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4692 /* The sign bit is not set. Convert as signed. */
4693 expand_float (target
, from
, 0);
4694 emit_jump_insn (gen_jump (label
));
4697 /* The sign bit is set.
4698 Convert to a usable (positive signed) value by shifting right
4699 one bit, while remembering if a nonzero bit was shifted
4700 out; i.e., compute (from & 1) | (from >> 1). */
4702 emit_label (neglabel
);
4703 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4704 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4705 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4707 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4709 expand_float (target
, temp
, 0);
4711 /* Multiply by 2 to undo the shift above. */
4712 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4713 target
, 0, OPTAB_LIB_WIDEN
);
4715 emit_move_insn (target
, temp
);
4717 do_pending_stack_adjust ();
4723 /* If we are about to do some arithmetic to correct for an
4724 unsigned operand, do it in a pseudo-register. */
4726 if (GET_MODE (to
) != fmode
4727 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4728 target
= gen_reg_rtx (fmode
);
4730 /* Convert as signed integer to floating. */
4731 expand_float (target
, from
, 0);
4733 /* If FROM is negative (and therefore TO is negative),
4734 correct its value by 2**bitwidth. */
4736 do_pending_stack_adjust ();
4737 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4741 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4742 temp
= expand_binop (fmode
, add_optab
, target
,
4743 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4744 target
, 0, OPTAB_LIB_WIDEN
);
4746 emit_move_insn (target
, temp
);
4748 do_pending_stack_adjust ();
4753 /* No hardware instruction available; call a library routine. */
4758 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4760 to
= protect_from_queue (to
, 1);
4761 from
= protect_from_queue (from
, 0);
4763 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4764 from
= convert_to_mode (SImode
, from
, unsignedp
);
4767 from
= force_not_mem (from
);
4769 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4775 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4776 GET_MODE (to
), 1, from
,
4778 insns
= get_insns ();
4781 emit_libcall_block (insns
, target
, value
,
4782 gen_rtx_FLOAT (GET_MODE (to
), from
));
4787 /* Copy result to requested destination
4788 if we have been computing in a temp location. */
4792 if (GET_MODE (target
) == GET_MODE (to
))
4793 emit_move_insn (to
, target
);
4795 convert_move (to
, target
, 0);
4799 /* Generate code to convert FROM to fixed point and store in TO. FROM
4800 must be floating point. */
4803 expand_fix (rtx to
, rtx from
, int unsignedp
)
4805 enum insn_code icode
;
4807 enum machine_mode fmode
, imode
;
4810 /* We first try to find a pair of modes, one real and one integer, at
4811 least as wide as FROM and TO, respectively, in which we can open-code
4812 this conversion. If the integer mode is wider than the mode of TO,
4813 we can do the conversion either signed or unsigned. */
4815 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4816 fmode
= GET_MODE_WIDER_MODE (fmode
))
4817 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4818 imode
= GET_MODE_WIDER_MODE (imode
))
4820 int doing_unsigned
= unsignedp
;
4822 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4823 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4824 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4826 if (icode
!= CODE_FOR_nothing
)
4828 to
= protect_from_queue (to
, 1);
4829 from
= protect_from_queue (from
, 0);
4831 if (fmode
!= GET_MODE (from
))
4832 from
= convert_to_mode (fmode
, from
, 0);
4836 rtx temp
= gen_reg_rtx (GET_MODE (from
));
4837 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
4841 if (imode
!= GET_MODE (to
))
4842 target
= gen_reg_rtx (imode
);
4844 emit_unop_insn (icode
, target
, from
,
4845 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4847 convert_move (to
, target
, unsignedp
);
4852 /* For an unsigned conversion, there is one more way to do it.
4853 If we have a signed conversion, we generate code that compares
4854 the real value to the largest representable positive number. If if
4855 is smaller, the conversion is done normally. Otherwise, subtract
4856 one plus the highest signed number, convert, and add it back.
4858 We only need to check all real modes, since we know we didn't find
4859 anything with a wider integer mode.
4861 This code used to extend FP value into mode wider than the destination.
4862 This is not needed. Consider, for instance conversion from SFmode
4865 The hot path trought the code is dealing with inputs smaller than 2^63
4866 and doing just the conversion, so there is no bits to lose.
4868 In the other path we know the value is positive in the range 2^63..2^64-1
4869 inclusive. (as for other imput overflow happens and result is undefined)
4870 So we know that the most important bit set in mantissa corresponds to
4871 2^63. The subtraction of 2^63 should not generate any rounding as it
4872 simply clears out that bit. The rest is trivial. */
4874 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4875 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4876 fmode
= GET_MODE_WIDER_MODE (fmode
))
4877 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4881 REAL_VALUE_TYPE offset
;
4882 rtx limit
, lab1
, lab2
, insn
;
4884 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4885 real_2expN (&offset
, bitsize
- 1);
4886 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4887 lab1
= gen_label_rtx ();
4888 lab2
= gen_label_rtx ();
4891 to
= protect_from_queue (to
, 1);
4892 from
= protect_from_queue (from
, 0);
4895 from
= force_not_mem (from
);
4897 if (fmode
!= GET_MODE (from
))
4898 from
= convert_to_mode (fmode
, from
, 0);
4900 /* See if we need to do the subtraction. */
4901 do_pending_stack_adjust ();
4902 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4905 /* If not, do the signed "fix" and branch around fixup code. */
4906 expand_fix (to
, from
, 0);
4907 emit_jump_insn (gen_jump (lab2
));
4910 /* Otherwise, subtract 2**(N-1), convert to signed number,
4911 then add 2**(N-1). Do the addition using XOR since this
4912 will often generate better code. */
4914 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4915 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4916 expand_fix (to
, target
, 0);
4917 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4919 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
4921 to
, 1, OPTAB_LIB_WIDEN
);
4924 emit_move_insn (to
, target
);
4928 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4929 != CODE_FOR_nothing
)
4931 /* Make a place for a REG_NOTE and add it. */
4932 insn
= emit_move_insn (to
, to
);
4933 set_unique_reg_note (insn
,
4935 gen_rtx_fmt_e (UNSIGNED_FIX
,
4943 /* We can't do it with an insn, so use a library call. But first ensure
4944 that the mode of TO is at least as wide as SImode, since those are the
4945 only library calls we know about. */
4947 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4949 target
= gen_reg_rtx (SImode
);
4951 expand_fix (target
, from
, unsignedp
);
4959 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
4960 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4964 to
= protect_from_queue (to
, 1);
4965 from
= protect_from_queue (from
, 0);
4968 from
= force_not_mem (from
);
4972 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4973 GET_MODE (to
), 1, from
,
4975 insns
= get_insns ();
4978 emit_libcall_block (insns
, target
, value
,
4979 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4980 GET_MODE (to
), from
));
4985 if (GET_MODE (to
) == GET_MODE (target
))
4986 emit_move_insn (to
, target
);
4988 convert_move (to
, target
, 0);
4992 /* Report whether we have an instruction to perform the operation
4993 specified by CODE on operands of mode MODE. */
4995 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
4997 return (code_to_optab
[(int) code
] != 0
4998 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
4999 != CODE_FOR_nothing
));
5002 /* Create a blank optab. */
5007 optab op
= ggc_alloc (sizeof (struct optab
));
5008 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5010 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
5011 op
->handlers
[i
].libfunc
= 0;
5017 static convert_optab
5018 new_convert_optab (void)
5021 convert_optab op
= ggc_alloc (sizeof (struct convert_optab
));
5022 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5023 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5025 op
->handlers
[i
][j
].insn_code
= CODE_FOR_nothing
;
5026 op
->handlers
[i
][j
].libfunc
= 0;
5031 /* Same, but fill in its code as CODE, and write it into the
5032 code_to_optab table. */
5034 init_optab (enum rtx_code code
)
5036 optab op
= new_optab ();
5038 code_to_optab
[(int) code
] = op
;
5042 /* Same, but fill in its code as CODE, and do _not_ write it into
5043 the code_to_optab table. */
5045 init_optabv (enum rtx_code code
)
5047 optab op
= new_optab ();
5052 /* Conversion optabs never go in the code_to_optab table. */
5053 static inline convert_optab
5054 init_convert_optab (enum rtx_code code
)
5056 convert_optab op
= new_convert_optab ();
5061 /* Initialize the libfunc fields of an entire group of entries in some
5062 optab. Each entry is set equal to a string consisting of a leading
5063 pair of underscores followed by a generic operation name followed by
5064 a mode name (downshifted to lowercase) followed by a single character
5065 representing the number of operands for the given operation (which is
5066 usually one of the characters '2', '3', or '4').
5068 OPTABLE is the table in which libfunc fields are to be initialized.
5069 FIRST_MODE is the first machine mode index in the given optab to
5071 LAST_MODE is the last machine mode index in the given optab to
5073 OPNAME is the generic (string) name of the operation.
5074 SUFFIX is the character which specifies the number of operands for
5075 the given generic operation.
5079 init_libfuncs (optab optable
, int first_mode
, int last_mode
,
5080 const char *opname
, int suffix
)
5083 unsigned opname_len
= strlen (opname
);
5085 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
5086 mode
= (enum machine_mode
) ((int) mode
+ 1))
5088 const char *mname
= GET_MODE_NAME (mode
);
5089 unsigned mname_len
= strlen (mname
);
5090 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
5097 for (q
= opname
; *q
; )
5099 for (q
= mname
; *q
; q
++)
5100 *p
++ = TOLOWER (*q
);
5104 optable
->handlers
[(int) mode
].libfunc
5105 = init_one_libfunc (ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5109 /* Initialize the libfunc fields of an entire group of entries in some
5110 optab which correspond to all integer mode operations. The parameters
5111 have the same meaning as similarly named ones for the `init_libfuncs'
5112 routine. (See above). */
5115 init_integral_libfuncs (optab optable
, const char *opname
, int suffix
)
5117 int maxsize
= 2*BITS_PER_WORD
;
5118 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5119 maxsize
= LONG_LONG_TYPE_SIZE
;
5120 init_libfuncs (optable
, word_mode
,
5121 mode_for_size (maxsize
, MODE_INT
, 0),
5125 /* Initialize the libfunc fields of an entire group of entries in some
5126 optab which correspond to all real mode operations. The parameters
5127 have the same meaning as similarly named ones for the `init_libfuncs'
5128 routine. (See above). */
5131 init_floating_libfuncs (optab optable
, const char *opname
, int suffix
)
5133 init_libfuncs (optable
, MIN_MODE_FLOAT
, MAX_MODE_FLOAT
, opname
, suffix
);
5136 /* Initialize the libfunc fields of an entire group of entries of an
5137 inter-mode-class conversion optab. The string formation rules are
5138 similar to the ones for init_libfuncs, above, but instead of having
5139 a mode name and an operand count these functions have two mode names
5140 and no operand count. */
5142 init_interclass_conv_libfuncs (convert_optab tab
, const char *opname
,
5143 enum mode_class from_class
,
5144 enum mode_class to_class
)
5146 enum machine_mode first_from_mode
= GET_CLASS_NARROWEST_MODE (from_class
);
5147 enum machine_mode first_to_mode
= GET_CLASS_NARROWEST_MODE (to_class
);
5148 size_t opname_len
= strlen (opname
);
5149 size_t max_mname_len
= 0;
5151 enum machine_mode fmode
, tmode
;
5152 const char *fname
, *tname
;
5154 char *libfunc_name
, *suffix
;
5157 for (fmode
= first_from_mode
;
5159 fmode
= GET_MODE_WIDER_MODE (fmode
))
5160 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (fmode
)));
5162 for (tmode
= first_to_mode
;
5164 tmode
= GET_MODE_WIDER_MODE (tmode
))
5165 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (tmode
)));
5167 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
5168 libfunc_name
[0] = '_';
5169 libfunc_name
[1] = '_';
5170 memcpy (&libfunc_name
[2], opname
, opname_len
);
5171 suffix
= libfunc_name
+ opname_len
+ 2;
5173 for (fmode
= first_from_mode
; fmode
!= VOIDmode
;
5174 fmode
= GET_MODE_WIDER_MODE (fmode
))
5175 for (tmode
= first_to_mode
; tmode
!= VOIDmode
;
5176 tmode
= GET_MODE_WIDER_MODE (tmode
))
5178 fname
= GET_MODE_NAME (fmode
);
5179 tname
= GET_MODE_NAME (tmode
);
5182 for (q
= fname
; *q
; p
++, q
++)
5184 for (q
= tname
; *q
; p
++, q
++)
5189 tab
->handlers
[tmode
][fmode
].libfunc
5190 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
5195 /* Initialize the libfunc fields of an entire group of entries of an
5196 intra-mode-class conversion optab. The string formation rules are
5197 similar to the ones for init_libfunc, above. WIDENING says whether
5198 the optab goes from narrow to wide modes or vice versa. These functions
5199 have two mode names _and_ an operand count. */
5201 init_intraclass_conv_libfuncs (convert_optab tab
, const char *opname
,
5202 enum mode_class
class, bool widening
)
5204 enum machine_mode first_mode
= GET_CLASS_NARROWEST_MODE (class);
5205 size_t opname_len
= strlen (opname
);
5206 size_t max_mname_len
= 0;
5208 enum machine_mode nmode
, wmode
;
5209 const char *nname
, *wname
;
5211 char *libfunc_name
, *suffix
;
5214 for (nmode
= first_mode
; nmode
!= VOIDmode
;
5215 nmode
= GET_MODE_WIDER_MODE (nmode
))
5216 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (nmode
)));
5218 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
5219 libfunc_name
[0] = '_';
5220 libfunc_name
[1] = '_';
5221 memcpy (&libfunc_name
[2], opname
, opname_len
);
5222 suffix
= libfunc_name
+ opname_len
+ 2;
5224 for (nmode
= first_mode
; nmode
!= VOIDmode
;
5225 nmode
= GET_MODE_WIDER_MODE (nmode
))
5226 for (wmode
= GET_MODE_WIDER_MODE (nmode
); wmode
!= VOIDmode
;
5227 wmode
= GET_MODE_WIDER_MODE (wmode
))
5229 nname
= GET_MODE_NAME (nmode
);
5230 wname
= GET_MODE_NAME (wmode
);
5233 for (q
= widening
? nname
: wname
; *q
; p
++, q
++)
5235 for (q
= widening
? wname
: nname
; *q
; p
++, q
++)
5241 tab
->handlers
[widening
? wmode
: nmode
]
5242 [widening
? nmode
: wmode
].libfunc
5243 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
5250 init_one_libfunc (const char *name
)
5254 /* Create a FUNCTION_DECL that can be passed to
5255 targetm.encode_section_info. */
5256 /* ??? We don't have any type information except for this is
5257 a function. Pretend this is "int foo()". */
5258 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
5259 build_function_type (integer_type_node
, NULL_TREE
));
5260 DECL_ARTIFICIAL (decl
) = 1;
5261 DECL_EXTERNAL (decl
) = 1;
5262 TREE_PUBLIC (decl
) = 1;
5264 symbol
= XEXP (DECL_RTL (decl
), 0);
5266 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5267 are the flags assigned by targetm.encode_section_info. */
5268 SYMBOL_REF_DECL (symbol
) = 0;
5273 /* Call this to reset the function entry for one optab (OPTABLE) in mode
5274 MODE to NAME, which should be either 0 or a string constant. */
5276 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
5279 optable
->handlers
[mode
].libfunc
= init_one_libfunc (name
);
5281 optable
->handlers
[mode
].libfunc
= 0;
5284 /* Call this to reset the function entry for one conversion optab
5285 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
5286 either 0 or a string constant. */
5288 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
5289 enum machine_mode fmode
, const char *name
)
5292 optable
->handlers
[tmode
][fmode
].libfunc
= init_one_libfunc (name
);
5294 optable
->handlers
[tmode
][fmode
].libfunc
= 0;
5297 /* Call this once to initialize the contents of the optabs
5298 appropriately for the current target machine. */
5305 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5307 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5308 setcc_gen_code
[i
] = CODE_FOR_nothing
;
5310 #ifdef HAVE_conditional_move
5311 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5312 movcc_gen_code
[i
] = CODE_FOR_nothing
;
5315 add_optab
= init_optab (PLUS
);
5316 addv_optab
= init_optabv (PLUS
);
5317 sub_optab
= init_optab (MINUS
);
5318 subv_optab
= init_optabv (MINUS
);
5319 smul_optab
= init_optab (MULT
);
5320 smulv_optab
= init_optabv (MULT
);
5321 smul_highpart_optab
= init_optab (UNKNOWN
);
5322 umul_highpart_optab
= init_optab (UNKNOWN
);
5323 smul_widen_optab
= init_optab (UNKNOWN
);
5324 umul_widen_optab
= init_optab (UNKNOWN
);
5325 sdiv_optab
= init_optab (DIV
);
5326 sdivv_optab
= init_optabv (DIV
);
5327 sdivmod_optab
= init_optab (UNKNOWN
);
5328 udiv_optab
= init_optab (UDIV
);
5329 udivmod_optab
= init_optab (UNKNOWN
);
5330 smod_optab
= init_optab (MOD
);
5331 umod_optab
= init_optab (UMOD
);
5332 fmod_optab
= init_optab (UNKNOWN
);
5333 drem_optab
= init_optab (UNKNOWN
);
5334 ftrunc_optab
= init_optab (UNKNOWN
);
5335 and_optab
= init_optab (AND
);
5336 ior_optab
= init_optab (IOR
);
5337 xor_optab
= init_optab (XOR
);
5338 ashl_optab
= init_optab (ASHIFT
);
5339 ashr_optab
= init_optab (ASHIFTRT
);
5340 lshr_optab
= init_optab (LSHIFTRT
);
5341 rotl_optab
= init_optab (ROTATE
);
5342 rotr_optab
= init_optab (ROTATERT
);
5343 smin_optab
= init_optab (SMIN
);
5344 smax_optab
= init_optab (SMAX
);
5345 umin_optab
= init_optab (UMIN
);
5346 umax_optab
= init_optab (UMAX
);
5347 pow_optab
= init_optab (UNKNOWN
);
5348 atan2_optab
= init_optab (UNKNOWN
);
5350 /* These three have codes assigned exclusively for the sake of
5352 mov_optab
= init_optab (SET
);
5353 movstrict_optab
= init_optab (STRICT_LOW_PART
);
5354 cmp_optab
= init_optab (COMPARE
);
5356 ucmp_optab
= init_optab (UNKNOWN
);
5357 tst_optab
= init_optab (UNKNOWN
);
5359 eq_optab
= init_optab (EQ
);
5360 ne_optab
= init_optab (NE
);
5361 gt_optab
= init_optab (GT
);
5362 ge_optab
= init_optab (GE
);
5363 lt_optab
= init_optab (LT
);
5364 le_optab
= init_optab (LE
);
5365 unord_optab
= init_optab (UNORDERED
);
5367 neg_optab
= init_optab (NEG
);
5368 negv_optab
= init_optabv (NEG
);
5369 abs_optab
= init_optab (ABS
);
5370 absv_optab
= init_optabv (ABS
);
5371 addcc_optab
= init_optab (UNKNOWN
);
5372 one_cmpl_optab
= init_optab (NOT
);
5373 ffs_optab
= init_optab (FFS
);
5374 clz_optab
= init_optab (CLZ
);
5375 ctz_optab
= init_optab (CTZ
);
5376 popcount_optab
= init_optab (POPCOUNT
);
5377 parity_optab
= init_optab (PARITY
);
5378 sqrt_optab
= init_optab (SQRT
);
5379 floor_optab
= init_optab (UNKNOWN
);
5380 ceil_optab
= init_optab (UNKNOWN
);
5381 round_optab
= init_optab (UNKNOWN
);
5382 btrunc_optab
= init_optab (UNKNOWN
);
5383 nearbyint_optab
= init_optab (UNKNOWN
);
5384 sincos_optab
= init_optab (UNKNOWN
);
5385 sin_optab
= init_optab (UNKNOWN
);
5386 asin_optab
= init_optab (UNKNOWN
);
5387 cos_optab
= init_optab (UNKNOWN
);
5388 acos_optab
= init_optab (UNKNOWN
);
5389 exp_optab
= init_optab (UNKNOWN
);
5390 exp10_optab
= init_optab (UNKNOWN
);
5391 exp2_optab
= init_optab (UNKNOWN
);
5392 expm1_optab
= init_optab (UNKNOWN
);
5393 logb_optab
= init_optab (UNKNOWN
);
5394 ilogb_optab
= init_optab (UNKNOWN
);
5395 log_optab
= init_optab (UNKNOWN
);
5396 log10_optab
= init_optab (UNKNOWN
);
5397 log2_optab
= init_optab (UNKNOWN
);
5398 log1p_optab
= init_optab (UNKNOWN
);
5399 tan_optab
= init_optab (UNKNOWN
);
5400 atan_optab
= init_optab (UNKNOWN
);
5401 strlen_optab
= init_optab (UNKNOWN
);
5402 cbranch_optab
= init_optab (UNKNOWN
);
5403 cmov_optab
= init_optab (UNKNOWN
);
5404 cstore_optab
= init_optab (UNKNOWN
);
5405 push_optab
= init_optab (UNKNOWN
);
5407 vec_extract_optab
= init_optab (UNKNOWN
);
5408 vec_set_optab
= init_optab (UNKNOWN
);
5409 vec_init_optab
= init_optab (UNKNOWN
);
5411 sext_optab
= init_convert_optab (SIGN_EXTEND
);
5412 zext_optab
= init_convert_optab (ZERO_EXTEND
);
5413 trunc_optab
= init_convert_optab (TRUNCATE
);
5414 sfix_optab
= init_convert_optab (FIX
);
5415 ufix_optab
= init_convert_optab (UNSIGNED_FIX
);
5416 sfixtrunc_optab
= init_convert_optab (UNKNOWN
);
5417 ufixtrunc_optab
= init_convert_optab (UNKNOWN
);
5418 sfloat_optab
= init_convert_optab (FLOAT
);
5419 ufloat_optab
= init_convert_optab (UNSIGNED_FLOAT
);
5421 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5423 movmem_optab
[i
] = CODE_FOR_nothing
;
5424 clrmem_optab
[i
] = CODE_FOR_nothing
;
5425 cmpstr_optab
[i
] = CODE_FOR_nothing
;
5426 cmpmem_optab
[i
] = CODE_FOR_nothing
;
5428 #ifdef HAVE_SECONDARY_RELOADS
5429 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
5433 /* Fill in the optabs with the insns we support. */
5436 /* Initialize the optabs with the names of the library functions. */
5437 init_integral_libfuncs (add_optab
, "add", '3');
5438 init_floating_libfuncs (add_optab
, "add", '3');
5439 init_integral_libfuncs (addv_optab
, "addv", '3');
5440 init_floating_libfuncs (addv_optab
, "add", '3');
5441 init_integral_libfuncs (sub_optab
, "sub", '3');
5442 init_floating_libfuncs (sub_optab
, "sub", '3');
5443 init_integral_libfuncs (subv_optab
, "subv", '3');
5444 init_floating_libfuncs (subv_optab
, "sub", '3');
5445 init_integral_libfuncs (smul_optab
, "mul", '3');
5446 init_floating_libfuncs (smul_optab
, "mul", '3');
5447 init_integral_libfuncs (smulv_optab
, "mulv", '3');
5448 init_floating_libfuncs (smulv_optab
, "mul", '3');
5449 init_integral_libfuncs (sdiv_optab
, "div", '3');
5450 init_floating_libfuncs (sdiv_optab
, "div", '3');
5451 init_integral_libfuncs (sdivv_optab
, "divv", '3');
5452 init_integral_libfuncs (udiv_optab
, "udiv", '3');
5453 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
5454 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
5455 init_integral_libfuncs (smod_optab
, "mod", '3');
5456 init_integral_libfuncs (umod_optab
, "umod", '3');
5457 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
5458 init_integral_libfuncs (and_optab
, "and", '3');
5459 init_integral_libfuncs (ior_optab
, "ior", '3');
5460 init_integral_libfuncs (xor_optab
, "xor", '3');
5461 init_integral_libfuncs (ashl_optab
, "ashl", '3');
5462 init_integral_libfuncs (ashr_optab
, "ashr", '3');
5463 init_integral_libfuncs (lshr_optab
, "lshr", '3');
5464 init_integral_libfuncs (smin_optab
, "min", '3');
5465 init_floating_libfuncs (smin_optab
, "min", '3');
5466 init_integral_libfuncs (smax_optab
, "max", '3');
5467 init_floating_libfuncs (smax_optab
, "max", '3');
5468 init_integral_libfuncs (umin_optab
, "umin", '3');
5469 init_integral_libfuncs (umax_optab
, "umax", '3');
5470 init_integral_libfuncs (neg_optab
, "neg", '2');
5471 init_floating_libfuncs (neg_optab
, "neg", '2');
5472 init_integral_libfuncs (negv_optab
, "negv", '2');
5473 init_floating_libfuncs (negv_optab
, "neg", '2');
5474 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
5475 init_integral_libfuncs (ffs_optab
, "ffs", '2');
5476 init_integral_libfuncs (clz_optab
, "clz", '2');
5477 init_integral_libfuncs (ctz_optab
, "ctz", '2');
5478 init_integral_libfuncs (popcount_optab
, "popcount", '2');
5479 init_integral_libfuncs (parity_optab
, "parity", '2');
5481 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5482 init_integral_libfuncs (cmp_optab
, "cmp", '2');
5483 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
5484 init_floating_libfuncs (cmp_optab
, "cmp", '2');
5486 /* EQ etc are floating point only. */
5487 init_floating_libfuncs (eq_optab
, "eq", '2');
5488 init_floating_libfuncs (ne_optab
, "ne", '2');
5489 init_floating_libfuncs (gt_optab
, "gt", '2');
5490 init_floating_libfuncs (ge_optab
, "ge", '2');
5491 init_floating_libfuncs (lt_optab
, "lt", '2');
5492 init_floating_libfuncs (le_optab
, "le", '2');
5493 init_floating_libfuncs (unord_optab
, "unord", '2');
5496 init_interclass_conv_libfuncs (sfloat_optab
, "float", MODE_INT
, MODE_FLOAT
);
5497 init_interclass_conv_libfuncs (sfix_optab
, "fix", MODE_FLOAT
, MODE_INT
);
5498 init_interclass_conv_libfuncs (ufix_optab
, "fixuns", MODE_FLOAT
, MODE_INT
);
5500 /* sext_optab is also used for FLOAT_EXTEND. */
5501 init_intraclass_conv_libfuncs (sext_optab
, "extend", MODE_FLOAT
, true);
5502 init_intraclass_conv_libfuncs (trunc_optab
, "trunc", MODE_FLOAT
, false);
5504 /* Use cabs for double complex abs, since systems generally have cabs.
5505 Don't define any libcall for float complex, so that cabs will be used. */
5506 if (complex_double_type_node
)
5507 abs_optab
->handlers
[TYPE_MODE (complex_double_type_node
)].libfunc
5508 = init_one_libfunc ("cabs");
5510 /* The ffs function operates on `int'. */
5511 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
5512 = init_one_libfunc ("ffs");
5514 abort_libfunc
= init_one_libfunc ("abort");
5515 memcpy_libfunc
= init_one_libfunc ("memcpy");
5516 memmove_libfunc
= init_one_libfunc ("memmove");
5517 memcmp_libfunc
= init_one_libfunc ("memcmp");
5518 memset_libfunc
= init_one_libfunc ("memset");
5519 setbits_libfunc
= init_one_libfunc ("__setbits");
5521 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
5522 ? "_Unwind_SjLj_Resume"
5523 : "_Unwind_Resume");
5524 #ifndef DONT_USE_BUILTIN_SETJMP
5525 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
5526 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
5528 setjmp_libfunc
= init_one_libfunc ("setjmp");
5529 longjmp_libfunc
= init_one_libfunc ("longjmp");
5531 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
5532 unwind_sjlj_unregister_libfunc
5533 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5535 /* For function entry/exit instrumentation. */
5536 profile_function_entry_libfunc
5537 = init_one_libfunc ("__cyg_profile_func_enter");
5538 profile_function_exit_libfunc
5539 = init_one_libfunc ("__cyg_profile_func_exit");
5541 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
5543 if (HAVE_conditional_trap
)
5544 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
5546 /* Allow the target to add more libcalls or rename some, etc. */
5547 targetm
.init_libfuncs ();
5550 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5551 CODE. Return 0 on failure. */
5554 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED
, rtx op1
,
5555 rtx op2 ATTRIBUTE_UNUSED
, rtx tcode ATTRIBUTE_UNUSED
)
5557 enum machine_mode mode
= GET_MODE (op1
);
5558 enum insn_code icode
;
5561 if (!HAVE_conditional_trap
)
5564 if (mode
== VOIDmode
)
5567 icode
= cmp_optab
->handlers
[(int) mode
].insn_code
;
5568 if (icode
== CODE_FOR_nothing
)
5572 op1
= prepare_operand (icode
, op1
, 0, mode
, mode
, 0);
5573 op2
= prepare_operand (icode
, op2
, 1, mode
, mode
, 0);
5579 emit_insn (GEN_FCN (icode
) (op1
, op2
));
5581 PUT_CODE (trap_rtx
, code
);
5582 insn
= gen_conditional_trap (trap_rtx
, tcode
);
5586 insn
= get_insns ();
5593 #include "gt-optabs.h"