[AArch64] Merge stores of D-register values with different modes
[official-gcc.git] / gcc / testsuite / gfortran.dg / associate_21.f90
bloba7bbabab4318d4b632004ba75a50478cbe4b4cc4
1 ! { dg-do compile }
2 ! { dg-options "-ffrontend-optimize" }
3 ! PR 69742 - this used to ICE with front-end optimizatoin
4 ! Original test case by Marco Restelli.
5 program p
6 implicit none
7 integer, allocatable :: i(:), j
9 allocate( i(5) )
10 i = (/( j , j=1,5 )/)
12 ! The ICE appears when "size(i)" is used twice in associate
13 associate( i5 => i(size(i):size(i)) ) ! this gives ICE
14 !associate( i5 => i(size(2*i):size(i)) ) ! this works
15 i5 = 2
16 end associate
18 write(*,*) i
19 end program p