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[AArch64] Merge stores of D-register values with different modes
[official-gcc.git]
/
gcc
/
testsuite
/
gcc.c-torture
/
compile
/
pr52113.c
blob
61de64ff3a3cdbd4c3b22cb83336f2a091b037e5
1
/* PR rtl-optimization/52113 */
2
3
unsigned long
v1
;
4
unsigned char
v2
;
5
6
void
7
foo
(
void
)
8
{
9
if
(
v1
> (
v2
*
1000L
))
10
v1
=
0
;
11
}