1 ;; PowerPC paired single and double hummer description
2 ;; Copyright (C) 2007-2017 Free Software Foundation, Inc.
3 ;; Contributed by David Edelsohn <edelsohn@gnu.org> and Revital Eres
6 ;; This file is part of GCC.
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 3, or (at your
11 ;; option) any later version.
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ;; License for more details.
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with this program; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
22 (define_c_enum "unspec"
29 (define_insn "negv2sf2"
30 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
31 (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
34 [(set_attr "type" "fp")])
36 (define_insn "sqrtv2sf2"
37 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
38 (sqrt:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
41 [(set_attr "type" "fp")])
43 (define_insn "absv2sf2"
44 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
45 (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
48 [(set_attr "type" "fp")])
50 (define_insn "nabsv2sf2"
51 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
52 (neg:V2SF (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f"))))]
55 [(set_attr "type" "fp")])
57 (define_insn "addv2sf3"
58 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
59 (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f")
60 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
63 [(set_attr "type" "fp")])
65 (define_insn "subv2sf3"
66 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
67 (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
68 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
71 [(set_attr "type" "fp")])
73 (define_insn "mulv2sf3"
74 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
75 (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f")
76 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
79 [(set_attr "type" "fp")])
81 (define_insn "resv2sf2"
82 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
83 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))]
84 "TARGET_PAIRED_FLOAT && flag_finite_math_only"
86 [(set_attr "type" "fp")])
88 (define_insn "divv2sf3"
89 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
90 (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
91 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
94 [(set_attr "type" "sdiv")])
96 (define_insn "paired_madds0"
97 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
100 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
101 (parallel [(const_int 0)]))
102 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
103 (parallel [(const_int 0)]))
104 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f")
105 (parallel [(const_int 0)])))
107 (vec_select:SF (match_dup 1)
108 (parallel [(const_int 1)]))
109 (vec_select:SF (match_dup 2)
110 (parallel [(const_int 0)]))
111 (vec_select:SF (match_dup 3)
112 (parallel [(const_int 1)])))))]
113 "TARGET_PAIRED_FLOAT"
114 "ps_madds0 %0,%1,%2,%3"
115 [(set_attr "type" "fp")])
117 (define_insn "paired_madds1"
118 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
121 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
122 (parallel [(const_int 0)]))
123 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
124 (parallel [(const_int 1)]))
125 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f")
126 (parallel [(const_int 0)])))
128 (vec_select:SF (match_dup 1)
129 (parallel [(const_int 1)]))
130 (vec_select:SF (match_dup 2)
131 (parallel [(const_int 1)]))
132 (vec_select:SF (match_dup 3)
133 (parallel [(const_int 1)])))))]
134 "TARGET_PAIRED_FLOAT"
135 "ps_madds1 %0,%1,%2,%3"
136 [(set_attr "type" "fp")])
138 (define_insn "*paired_madd"
139 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
141 (match_operand:V2SF 1 "gpc_reg_operand" "f")
142 (match_operand:V2SF 2 "gpc_reg_operand" "f")
143 (match_operand:V2SF 3 "gpc_reg_operand" "f")))]
144 "TARGET_PAIRED_FLOAT"
145 "ps_madd %0,%1,%2,%3"
146 [(set_attr "type" "fp")])
148 (define_insn "*paired_msub"
149 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
151 (match_operand:V2SF 1 "gpc_reg_operand" "f")
152 (match_operand:V2SF 2 "gpc_reg_operand" "f")
153 (neg:V2SF (match_operand:V2SF 3 "gpc_reg_operand" "f"))))]
154 "TARGET_PAIRED_FLOAT"
155 "ps_msub %0,%1,%2,%3"
156 [(set_attr "type" "fp")])
158 (define_insn "*paired_nmadd"
159 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
162 (match_operand:V2SF 1 "gpc_reg_operand" "f")
163 (match_operand:V2SF 2 "gpc_reg_operand" "f")
164 (match_operand:V2SF 3 "gpc_reg_operand" "f"))))]
165 "TARGET_PAIRED_FLOAT"
166 "ps_nmadd %0,%1,%2,%3"
167 [(set_attr "type" "fp")])
169 (define_insn "*paired_nmsub"
170 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
173 (match_operand:V2SF 1 "gpc_reg_operand" "f")
174 (match_operand:V2SF 2 "gpc_reg_operand" "f")
175 (neg:V2SF (match_operand:V2SF 3 "gpc_reg_operand" "f")))))]
176 "TARGET_PAIRED_FLOAT"
177 "ps_nmsub %0,%1,%2,%3"
178 [(set_attr "type" "dmul")])
180 (define_insn "selv2sf4"
181 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
183 (if_then_else:SF (ge (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
184 (parallel [(const_int 0)]))
185 (match_operand:SF 4 "zero_fp_constant" "F"))
186 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
187 (parallel [(const_int 0)]))
188 (vec_select:SF (match_operand:V2SF 3 "gpc_reg_operand" "f")
189 (parallel [(const_int 0)])))
190 (if_then_else:SF (ge (vec_select:SF (match_dup 1)
191 (parallel [(const_int 1)]))
193 (vec_select:SF (match_dup 2)
194 (parallel [(const_int 1)]))
195 (vec_select:SF (match_dup 3)
196 (parallel [(const_int 1)])))))]
198 "TARGET_PAIRED_FLOAT"
200 [(set_attr "type" "fp")])
202 (define_insn "*movv2sf_paired"
203 [(set (match_operand:V2SF 0 "nonimmediate_operand" "=Z,f,f,Y,r,r,f")
204 (match_operand:V2SF 1 "input_operand" "f,Z,f,r,Y,r,W"))]
206 && (register_operand (operands[0], V2SFmode)
207 || register_operand (operands[1], V2SFmode))"
209 switch (which_alternative)
211 case 0: return "psq_stx %1,%y0,0,0";
212 case 1: return "psq_lx %0,%y1,0,0";
213 case 2: return "ps_mr %0,%1";
218 default: gcc_unreachable ();
221 [(set_attr "type" "fpstore,fpload,fp,*,*,*,*")])
223 (define_insn "paired_stx"
224 [(set (match_operand:V2SF 0 "memory_operand" "=Z")
225 (match_operand:V2SF 1 "gpc_reg_operand" "f"))]
226 "TARGET_PAIRED_FLOAT"
228 [(set_attr "type" "fpstore")])
230 (define_insn "paired_lx"
231 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
232 (match_operand:V2SF 1 "memory_operand" "Z"))]
233 "TARGET_PAIRED_FLOAT"
235 [(set_attr "type" "fpload")])
239 [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
240 (match_operand:V2SF 1 "input_operand" ""))]
241 "TARGET_PAIRED_FLOAT && reload_completed
242 && gpr_or_gpr_p (operands[0], operands[1])"
245 rs6000_split_multireg_move (operands[0], operands[1]); DONE;
248 (define_insn "paired_cmpu0"
249 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
250 (compare:CCFP (vec_select:SF
251 (match_operand:V2SF 1 "gpc_reg_operand" "f")
252 (parallel [(const_int 0)]))
254 (match_operand:V2SF 2 "gpc_reg_operand" "f")
255 (parallel [(const_int 0)]))))]
256 "TARGET_PAIRED_FLOAT"
258 [(set_attr "type" "fpcompare")])
260 (define_insn "paired_cmpu1"
261 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
262 (compare:CCFP (vec_select:SF
263 (match_operand:V2SF 1 "gpc_reg_operand" "f")
264 (parallel [(const_int 1)]))
266 (match_operand:V2SF 2 "gpc_reg_operand" "f")
267 (parallel [(const_int 1)]))))]
268 "TARGET_PAIRED_FLOAT"
270 [(set_attr "type" "fpcompare")])
272 (define_insn "paired_merge00"
273 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
276 (match_operand:V2SF 1 "gpc_reg_operand" "f")
277 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
278 (parallel [(const_int 0) (const_int 2)])))]
279 "TARGET_PAIRED_FLOAT"
280 "ps_merge00 %0, %1, %2"
281 [(set_attr "type" "fp")])
283 (define_insn "paired_merge01"
284 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
287 (match_operand:V2SF 1 "gpc_reg_operand" "f")
288 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
289 (parallel [(const_int 0) (const_int 3)])))]
290 "TARGET_PAIRED_FLOAT"
291 "ps_merge01 %0, %1, %2"
292 [(set_attr "type" "fp")])
294 (define_insn "paired_merge10"
295 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
298 (match_operand:V2SF 1 "gpc_reg_operand" "f")
299 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
300 (parallel [(const_int 1) (const_int 2)])))]
301 "TARGET_PAIRED_FLOAT"
302 "ps_merge10 %0, %1, %2"
303 [(set_attr "type" "fp")])
305 (define_insn "paired_merge11"
306 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
309 (match_operand:V2SF 1 "gpc_reg_operand" "f")
310 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
311 (parallel [(const_int 1) (const_int 3)])))]
312 "TARGET_PAIRED_FLOAT"
313 "ps_merge11 %0, %1, %2"
314 [(set_attr "type" "fp")])
316 (define_expand "vec_perm_constv2sf"
317 [(match_operand:V2SF 0 "gpc_reg_operand" "")
318 (match_operand:V2SF 1 "gpc_reg_operand" "")
319 (match_operand:V2SF 2 "gpc_reg_operand" "")
320 (match_operand:V2SI 3 "" "")]
321 "TARGET_PAIRED_FLOAT"
323 if (rs6000_expand_vec_perm_const (operands))
329 (define_insn "paired_sum0"
330 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
331 (vec_concat:V2SF (plus:SF (vec_select:SF
332 (match_operand:V2SF 1 "gpc_reg_operand" "f")
333 (parallel [(const_int 0)]))
335 (match_operand:V2SF 2 "gpc_reg_operand" "f")
336 (parallel [(const_int 1)])))
338 (match_operand:V2SF 3 "gpc_reg_operand" "f")
339 (parallel [(const_int 1)]))))]
340 "TARGET_PAIRED_FLOAT"
341 "ps_sum0 %0,%1,%2,%3"
342 [(set_attr "type" "fp")])
344 (define_insn "paired_sum1"
345 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
346 (vec_concat:V2SF (vec_select:SF
347 (match_operand:V2SF 2 "gpc_reg_operand" "f")
348 (parallel [(const_int 1)]))
349 (plus:SF (vec_select:SF
350 (match_operand:V2SF 1 "gpc_reg_operand" "f")
351 (parallel [(const_int 0)]))
353 (match_operand:V2SF 3 "gpc_reg_operand" "f")
354 (parallel [(const_int 1)])))))]
355 "TARGET_PAIRED_FLOAT"
356 "ps_sum1 %0,%1,%2,%3"
357 [(set_attr "type" "fp")])
359 (define_insn "paired_muls0"
360 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
361 (mult:V2SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
363 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
364 (parallel [(const_int 0)])))))]
365 "TARGET_PAIRED_FLOAT"
366 "ps_muls0 %0, %1, %2"
367 [(set_attr "type" "fp")])
370 (define_insn "paired_muls1"
371 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
372 (mult:V2SF (match_operand:V2SF 2 "gpc_reg_operand" "f")
374 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
375 (parallel [(const_int 1)])))))]
376 "TARGET_PAIRED_FLOAT"
377 "ps_muls1 %0, %1, %2"
378 [(set_attr "type" "fp")])
380 (define_expand "vec_initv2sfsf"
381 [(match_operand:V2SF 0 "gpc_reg_operand" "=f")
382 (match_operand 1 "" "")]
383 "TARGET_PAIRED_FLOAT"
385 paired_expand_vector_init (operands[0], operands[1]);
389 (define_insn "*vconcatsf"
390 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
392 (match_operand:SF 1 "gpc_reg_operand" "f")
393 (match_operand:SF 2 "gpc_reg_operand" "f")))]
394 "TARGET_PAIRED_FLOAT"
395 "ps_merge00 %0, %1, %2"
396 [(set_attr "type" "fp")])
398 (define_expand "sminv2sf3"
399 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
400 (smin:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
401 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
402 "TARGET_PAIRED_FLOAT"
404 rtx tmp = gen_reg_rtx (V2SFmode);
406 emit_insn (gen_subv2sf3 (tmp, operands[1], operands[2]));
407 emit_insn (gen_selv2sf4 (operands[0], tmp, operands[2], operands[1], CONST0_RTX (SFmode)));
411 (define_expand "smaxv2sf3"
412 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
413 (smax:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
414 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
415 "TARGET_PAIRED_FLOAT"
417 rtx tmp = gen_reg_rtx (V2SFmode);
419 emit_insn (gen_subv2sf3 (tmp, operands[1], operands[2]));
420 emit_insn (gen_selv2sf4 (operands[0], tmp, operands[1], operands[2], CONST0_RTX (SFmode)));
424 (define_expand "reduc_smax_scal_v2sf"
425 [(match_operand:SF 0 "gpc_reg_operand" "=f")
426 (match_operand:V2SF 1 "gpc_reg_operand" "f")]
427 "TARGET_PAIRED_FLOAT"
429 rtx tmp_swap = gen_reg_rtx (V2SFmode);
430 rtx tmp = gen_reg_rtx (V2SFmode);
431 rtx vec_res = gen_reg_rtx (V2SFmode);
432 rtx di_res = gen_reg_rtx (DImode);
434 emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1]));
435 emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap));
436 emit_insn (gen_selv2sf4 (vec_res, tmp, operands[1], tmp_swap,
437 CONST0_RTX (SFmode)));
438 emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
439 emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
440 BYTES_BIG_ENDIAN ? 4 : 0));
445 (define_expand "reduc_smin_scal_v2sf"
446 [(match_operand:SF 0 "gpc_reg_operand" "=f")
447 (match_operand:V2SF 1 "gpc_reg_operand" "f")]
448 "TARGET_PAIRED_FLOAT"
450 rtx tmp_swap = gen_reg_rtx (V2SFmode);
451 rtx tmp = gen_reg_rtx (V2SFmode);
452 rtx vec_res = gen_reg_rtx (V2SFmode);
453 rtx di_res = gen_reg_rtx (DImode);
455 emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1]));
456 emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap));
457 emit_insn (gen_selv2sf4 (vec_res, tmp, tmp_swap, operands[1],
458 CONST0_RTX (SFmode)));
459 emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
460 emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
461 BYTES_BIG_ENDIAN ? 4 : 0));
466 (define_expand "reduc_plus_scal_v2sf"
467 [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
468 (match_operand:V2SF 1 "gpc_reg_operand" "f"))]
469 "TARGET_PAIRED_FLOAT"
471 rtx vec_res = gen_reg_rtx (V2SFmode);
472 rtx di_res = gen_reg_rtx (DImode);
474 emit_insn (gen_paired_sum1 (vec_res, operands[1], operands[1], operands[1]));
475 emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
476 emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
477 BYTES_BIG_ENDIAN ? 4 : 0));
481 (define_expand "movmisalignv2sf"
482 [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
483 (match_operand:V2SF 1 "any_operand" ""))]
484 "TARGET_PAIRED_FLOAT"
486 paired_expand_vector_move (operands);
490 (define_expand "vcondv2sfv2sf"
491 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
493 (match_operator 3 "gpc_reg_operand"
494 [(match_operand:V2SF 4 "gpc_reg_operand" "f")
495 (match_operand:V2SF 5 "gpc_reg_operand" "f")])
496 (match_operand:V2SF 1 "gpc_reg_operand" "f")
497 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
498 "TARGET_PAIRED_FLOAT && flag_unsafe_math_optimizations"
500 if (paired_emit_vector_cond_expr (operands[0], operands[1], operands[2],
501 operands[3], operands[4], operands[5]))