1 /* Communication between reload.c, reload1.c and the rest of compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 /* If secondary reloads are the same for inputs and outputs, define those
26 #ifdef SECONDARY_RELOAD_CLASS
27 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
28 SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
29 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
30 SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
33 extern int register_move_cost (machine_mode
, reg_class_t
, reg_class_t
);
34 extern int memory_move_cost (machine_mode
, reg_class_t
, bool);
35 extern int memory_move_secondary_cost (machine_mode
, reg_class_t
, bool);
37 /* Maximum number of reloads we can need. */
38 #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
40 /* Encode the usage of a reload. The following codes are supported:
42 RELOAD_FOR_INPUT reload of an input operand
43 RELOAD_FOR_OUTPUT likewise, for output
44 RELOAD_FOR_INSN a reload that must not conflict with anything
45 used in the insn, but may conflict with
46 something used before or after the insn
47 RELOAD_FOR_INPUT_ADDRESS reload for parts of the address of an object
48 that is an input reload
49 RELOAD_FOR_INPADDR_ADDRESS reload needed for RELOAD_FOR_INPUT_ADDRESS
50 RELOAD_FOR_OUTPUT_ADDRESS like RELOAD_FOR INPUT_ADDRESS, for output
51 RELOAD_FOR_OUTADDR_ADDRESS reload needed for RELOAD_FOR_OUTPUT_ADDRESS
52 RELOAD_FOR_OPERAND_ADDRESS reload for the address of a non-reloaded
53 operand; these don't conflict with
55 RELOAD_FOR_OPADDR_ADDR reload needed for RELOAD_FOR_OPERAND_ADDRESS
56 reloads; usually secondary reloads
57 RELOAD_OTHER none of the above, usually multiple uses
58 RELOAD_FOR_OTHER_ADDRESS reload for part of the address of an input
59 that is marked RELOAD_OTHER.
61 This used to be "enum reload_when_needed" but some debuggers have trouble
62 with an enum tag and variable of the same name. */
66 RELOAD_FOR_INPUT
, RELOAD_FOR_OUTPUT
, RELOAD_FOR_INSN
,
67 RELOAD_FOR_INPUT_ADDRESS
, RELOAD_FOR_INPADDR_ADDRESS
,
68 RELOAD_FOR_OUTPUT_ADDRESS
, RELOAD_FOR_OUTADDR_ADDRESS
,
69 RELOAD_FOR_OPERAND_ADDRESS
, RELOAD_FOR_OPADDR_ADDR
,
70 RELOAD_OTHER
, RELOAD_FOR_OTHER_ADDRESS
73 #ifdef GCC_INSN_CODES_H
74 /* Each reload is recorded with a structure like this. */
77 /* The value to reload from */
79 /* Where to store reload-reg afterward if nec (often the same as
83 /* The class of registers to reload into. */
84 enum reg_class rclass
;
86 /* The mode this operand should have when reloaded, on input. */
88 /* The mode this operand should have when reloaded, on output. */
91 /* The mode of the reload register. */
94 /* the largest number of registers this reload will require. */
97 /* Positive amount to increment or decrement by if
98 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
99 Ignored otherwise (don't assume it is zero). */
101 /* A reg for which reload_in is the equivalent.
102 If reload_in is a symbol_ref which came from
103 reg_equiv_constant, then this is the pseudo
104 which has that symbol_ref as equivalent. */
108 /* Used in find_reload_regs to record the allocated register. */
110 /* This is the register to reload into. If it is zero when `find_reloads'
111 returns, you must find a suitable register in the class specified by
112 reload_reg_class, and store here an rtx for that register with mode from
113 reload_inmode or reload_outmode. */
115 /* The operand number being reloaded. This is used to group related reloads
116 and need not always be equal to the actual operand number in the insn,
117 though it current will be; for in-out operands, it is one of the two
121 /* Gives the reload number of a secondary input reload, when needed;
123 int secondary_in_reload
;
124 /* Gives the reload number of a secondary output reload, when needed;
126 int secondary_out_reload
;
127 /* If a secondary input reload is required, gives the INSN_CODE that uses the
128 secondary reload as a scratch register, or CODE_FOR_nothing if the
129 secondary reload register is to be an intermediate register. */
130 enum insn_code secondary_in_icode
;
131 /* Likewise, for a secondary output reload. */
132 enum insn_code secondary_out_icode
;
134 /* Classifies reload as needed either for addressing an input reload,
135 addressing an output, for addressing a non-reloaded mem ref, or for
136 unspecified purposes (i.e., more than one of the above). */
137 enum reload_type when_needed
;
139 /* Nonzero for an optional reload. Optional reloads are ignored unless the
140 value is already sitting in a register. */
141 unsigned int optional
:1;
142 /* nonzero if this reload shouldn't be combined with another reload. */
143 unsigned int nocombine
:1;
144 /* Nonzero if this is a secondary register for one or more reloads. */
145 unsigned int secondary_p
:1;
146 /* Nonzero if this reload must use a register not already allocated to a
148 unsigned int nongroup
:1;
151 extern struct reload rld
[MAX_RELOADS
];
152 extern int n_reloads
;
155 /* Target-dependent globals. */
156 struct target_reload
{
157 /* Nonzero if indirect addressing is supported when the innermost MEM is
158 of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to
159 which these are valid is the same as spill_indirect_levels, above. */
160 bool x_indirect_symref_ok
;
162 /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */
163 bool x_double_reg_address_ok
;
165 /* Nonzero if indirect addressing is supported on the machine; this means
166 that spilling (REG n) does not require reloading it into a register in
167 order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The
168 value indicates the level of indirect addressing supported, e.g., two
169 means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
171 bool x_spill_indirect_levels
;
173 /* True if caller-save has been reinitialized. */
174 bool x_caller_save_initialized_p
;
176 /* Modes for each hard register that we can save. The smallest mode is wide
177 enough to save the entire contents of the register. When saving the
178 register because it is live we first try to save in multi-register modes.
179 If that is not possible the save is done one register at a time. */
180 machine_mode (x_regno_save_mode
181 [FIRST_PSEUDO_REGISTER
]
182 [MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1]);
184 /* We will only make a register eligible for caller-save if it can be
185 saved in its widest mode with a simple SET insn as long as the memory
186 address is valid. We record the INSN_CODE is those insns here since
187 when we emit them, the addresses might not be valid, so they might not
189 int x_cached_reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
190 int x_cached_reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
193 extern struct target_reload default_target_reload
;
194 #if SWITCHABLE_TARGET
195 extern struct target_reload
*this_target_reload
;
197 #define this_target_reload (&default_target_reload)
200 #define indirect_symref_ok \
201 (this_target_reload->x_indirect_symref_ok)
202 #define double_reg_address_ok \
203 (this_target_reload->x_double_reg_address_ok)
204 #define caller_save_initialized_p \
205 (this_target_reload->x_caller_save_initialized_p)
207 /* Register equivalences. Indexed by register number. */
210 /* The constant value to which pseudo reg N is equivalent,
211 or zero if pseudo reg N is not equivalent to a constant.
212 find_reloads looks at this in order to replace pseudo reg N
213 with the constant it stands for. */
216 /* An invariant value to which pseudo reg N is equivalent.
217 eliminate_regs_in_insn uses this to replace pseudos in particular
221 /* A memory location to which pseudo reg N is equivalent,
222 prior to any register elimination (such as frame pointer to stack
223 pointer). Depending on whether or not it is a valid address, this value
224 is transferred to either equiv_address or equiv_mem. */
227 /* The address of stack slot to which pseudo reg N is equivalent.
228 This is used when the address is not valid as a memory address
229 (because its displacement is too big for the machine.) */
232 /* The memory slot to which pseudo reg N is equivalent,
233 or zero if pseudo reg N is not equivalent to a memory slot. */
236 /* An EXPR_LIST of REG_EQUIVs containing MEMs with
237 alternate representations of the location of pseudo reg N. */
238 rtx_expr_list
*alt_mem_list
;
240 /* The list of insns that initialized reg N from its equivalent
241 constant or memory slot. */
245 #define reg_equiv_constant(ELT) \
246 (*reg_equivs)[(ELT)].constant
247 #define reg_equiv_invariant(ELT) \
248 (*reg_equivs)[(ELT)].invariant
249 #define reg_equiv_memory_loc(ELT) \
250 (*reg_equivs)[(ELT)].memory_loc
251 #define reg_equiv_address(ELT) \
252 (*reg_equivs)[(ELT)].address
253 #define reg_equiv_mem(ELT) \
254 (*reg_equivs)[(ELT)].mem
255 #define reg_equiv_alt_mem_list(ELT) \
256 (*reg_equivs)[(ELT)].alt_mem_list
257 #define reg_equiv_init(ELT) \
258 (*reg_equivs)[(ELT)].init
260 extern vec
<reg_equivs_t
, va_gc
> *reg_equivs
;
262 /* All the "earlyclobber" operands of the current insn
263 are recorded here. */
264 extern int n_earlyclobbers
;
265 extern rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
267 /* Save the number of operands. */
268 extern int reload_n_operands
;
270 /* First uid used by insns created by reload in this function.
271 Used in find_equiv_reg. */
272 extern int reload_first_uid
;
274 extern int num_not_at_initial_offset
;
276 #if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
277 /* This structure describes instructions which are relevant for reload.
278 Apart from all regular insns, this also includes CODE_LABELs, since they
279 must be examined for register elimination. */
282 /* Links to the neighbor instructions. */
283 struct insn_chain
*next
, *prev
;
285 /* Link through a chains set up by calculate_needs_all_insns, containing
286 all insns that need reloading. */
287 struct insn_chain
*next_need_reload
;
289 /* The rtx of the insn. */
292 /* The basic block this insn is in. */
295 /* Nonzero if find_reloads said the insn requires reloading. */
296 unsigned int need_reload
:1;
297 /* Nonzero if find_reloads needs to be run during reload_as_needed to
298 perform modifications on any operands. */
299 unsigned int need_operand_change
:1;
300 /* Nonzero if eliminate_regs_in_insn said it requires eliminations. */
301 unsigned int need_elim
:1;
302 /* Nonzero if this insn was inserted by perform_caller_saves. */
303 unsigned int is_caller_save_insn
:1;
305 /* Register life information: record all live hard registers, and
306 all live pseudos that have a hard register. This set also
307 contains pseudos spilled by IRA. */
308 bitmap_head live_throughout
;
309 bitmap_head dead_or_set
;
311 /* Copies of the global variables computed by find_reloads. */
315 /* Indicates which registers have already been used for spills. */
316 HARD_REG_SET used_spill_regs
;
319 /* A chain of insn_chain structures to describe all non-note insns in
321 extern struct insn_chain
*reload_insn_chain
;
323 /* Allocate a new insn_chain structure. */
324 extern struct insn_chain
*new_insn_chain (void);
327 #if defined SET_HARD_REG_BIT
328 extern void compute_use_by_pseudos (HARD_REG_SET
*, bitmap
);
331 /* Functions from reload.c: */
333 extern reg_class_t
secondary_reload_class (bool, reg_class_t
,
336 #ifdef GCC_INSN_CODES_H
337 extern enum reg_class
scratch_reload_class (enum insn_code
);
340 /* Return a memory location that will be used to copy X in mode MODE.
341 If we haven't already made a location for this mode in this insn,
342 call find_reloads_address on the location being returned. */
343 extern rtx
get_secondary_mem (rtx
, machine_mode
, int, enum reload_type
);
345 /* Clear any secondary memory locations we've made. */
346 extern void clear_secondary_mem (void);
348 /* Transfer all replacements that used to be in reload FROM to be in
350 extern void transfer_replacements (int, int);
352 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
353 or a subpart of it. If we have any replacements registered for IN_RTX,
354 cancel the reloads that were supposed to load them.
355 Return nonzero if we canceled any reloads. */
356 extern int remove_address_replacements (rtx in_rtx
);
358 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
359 if they are the same hard reg, and has special hacks for
360 autoincrement and autodecrement. */
361 extern int operands_match_p (rtx
, rtx
);
363 /* Return 1 if altering OP will not modify the value of CLOBBER. */
364 extern int safe_from_earlyclobber (rtx
, rtx
);
366 /* Search the body of INSN for values that need reloading and record them
367 with push_reload. REPLACE nonzero means record also where the values occur
368 so that subst_reloads can be used. */
369 extern int find_reloads (rtx_insn
*, int, int, int, short *);
371 /* Compute the sum of X and Y, making canonicalizations assumed in an
372 address, namely: sum constant integers, surround the sum of two
373 constants with a CONST, put the constant as the second operand, and
374 group the constant on the outermost sum. */
375 extern rtx
form_sum (machine_mode
, rtx
, rtx
);
377 /* Substitute into the current INSN the registers into which we have reloaded
378 the things that need reloading. */
379 extern void subst_reloads (rtx_insn
*);
381 /* Make a copy of any replacements being done into X and move those copies
382 to locations in Y, a copy of X. We only look at the highest level of
384 extern void copy_replacements (rtx
, rtx
);
386 /* Change any replacements being done to *X to be done to *Y */
387 extern void move_replacements (rtx
*x
, rtx
*y
);
389 /* If LOC was scheduled to be replaced by something, return the replacement.
390 Otherwise, return *LOC. */
391 extern rtx
find_replacement (rtx
*);
393 /* Nonzero if modifying X will affect IN. */
394 extern int reg_overlap_mentioned_for_reload_p (rtx
, rtx
);
396 /* Check the insns before INSN to see if there is a suitable register
397 containing the same value as GOAL. */
398 extern rtx
find_equiv_reg (rtx
, rtx_insn
*, enum reg_class
, int, short *,
401 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
402 extern int regno_clobbered_p (unsigned int, rtx_insn
*, machine_mode
, int);
404 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
405 extern int earlyclobber_operand_p (rtx
);
407 /* Record one reload that needs to be performed. */
408 extern int push_reload (rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
409 machine_mode
, machine_mode
,
410 int, int, int, enum reload_type
);
412 /* Functions in reload1.c: */
414 /* Initialize the reload pass once per compilation. */
415 extern void init_reload (void);
417 /* The reload pass itself. */
418 extern bool reload (rtx_insn
*, int);
420 /* Mark the slots in regs_ever_live for the hard regs
421 used by pseudo-reg number REGNO. */
422 extern void mark_home_live (int);
424 /* Scan X and replace any eliminable registers (such as fp) with a
425 replacement (such as sp), plus an offset. */
426 extern rtx
eliminate_regs (rtx
, machine_mode
, rtx
);
427 extern bool elimination_target_reg_p (rtx
);
429 /* Called from the register allocator to estimate costs of eliminating
430 invariant registers. */
431 extern void calculate_elim_costs_all_insns (void);
433 /* Deallocate the reload register used by reload number R. */
434 extern void deallocate_reload_reg (int r
);
436 /* Functions in caller-save.c: */
438 /* Initialize for caller-save. */
439 extern void init_caller_save (void);
441 /* Initialize save areas by showing that we haven't allocated any yet. */
442 extern void init_save_areas (void);
444 /* Allocate save areas for any hard registers that might need saving. */
445 extern void setup_save_areas (void);
447 /* Find the places where hard regs are live across calls and save them. */
448 extern void save_call_clobbered_regs (void);
450 /* Replace (subreg (reg)) with the appropriate (reg) for any operands. */
451 extern void cleanup_subreg_operands (rtx_insn
*);
453 /* Debugging support. */
454 extern void debug_reload_to_stream (FILE *);
455 extern void debug_reload (void);
457 /* Compute the actual register we should reload to, in case we're
458 reloading to/from a register that is wider than a word. */
459 extern rtx
reload_adjust_reg_for_mode (rtx
, machine_mode
);
461 /* Allocate or grow the reg_equiv tables, initializing new entries to 0. */
462 extern void grow_reg_equivs (void);
464 #endif /* GCC_RELOAD_H */