| blob | d148fde6393191ce79d8937be748511a6c07665a |
1 2015-06-30 Christophe Lyon <christophe.lyon@linaro.org>
3 GCC Linaro 4.9-2015.06 released.
4 * LINARO-VERSION: Update.
6 2015-06-02 Christophe Lyon <christophe.lyon@linaro.org>
8 Backport from trunk r217753.
9 2014-11-19 Jakub Jelinek <jakub@redhat.com>
11 PR rtl-optimization/63843
12 * simplify-rtx.c (simplify_binary_operation_1) <case ASHIFTRT>: For
13 optimization of ashiftrt of subreg of lshiftrt, check that code
14 is ASHIFTRT.
16 2015-04-16 Christophe Lyon <christophe.lyon@linaro.org>
18 * LINARO-VERSION: Bump version.
20 2015-04-16 Christophe Lyon <christophe.lyon@linaro.org>
22 GCC Linaro 4.9-2015.04 snapshot.
23 * LINARO-VERSION: Update.
25 2015-04-15 Christophe Lyon <christophe.lyon@linaro.org>
27 Backport from trunk r220348.
28 2015-02-02 Tejas Belagod <tejas.belagod@arm.com>
29 Andrew Pinski <pinskia@gcc.gnu.org>
30 Jakub Jelinek <jakub@gcc.gnu.org>
32 PR target/64231
33 * config/aarch64/aarch64.c (aarch64_classify_symbol): Fix large
34 integer typing for small model. Use IN_RANGE.
36 2015-04-14 Michael Collison <michael.collison@linaro.org>
38 Backport from trunk r220399, r220413.
40 2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
42 * config/aarch64/aarch64-cores.def: Add cortex-a72 and
43 cortex-a72.cortex-a53.
44 * config/aarch64/aarch64-tune.md: Regenerate.
45 * doc/invoke.texi (AArch64 Options/-mtune): Add "cortex-a72".
47 2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
49 * config/arm/arm-cores.def: Add cortex-a72 and
50 cortex-a72.cortex-a53.
51 * config/arm/bpabi.h (BE8_LINK_SPEC): Likewise.
52 * config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
53 * config/arm/arm-tune.md: Regenerate.
54 * config/arm/arm-tables.opt: Add entries for "cortex-a72" and
55 "cortex-a72.cortex-a53".
56 * doc/invoke.texi (ARM Options/-mtune): Likewise.
58 2015-04-13 Michael Collison <michael.collison@linaro.org>
60 Backport from trunk r219724, 219746, r220103.
62 2014-01-25 James Greenhalgh <james.greenhalgh@arm.com>
64 * config/arm/arm-cores.def (cortex-a57): Use the new Cortex-A57
65 pipeline model.
66 config/arm/arm.md: Include the new Cortex-A57 model.
67 (generic_sched): Don't use generic_sched when tuning for
68 Cortex-A57.
70 2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
72 * config/arm/cortex-a57.md: Remove duplicate of file accidentally
73 introduced in revision 219724.
75 2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
77 * config/arm/cortex-a57.md: New.
78 * config/aarch64/aarch64.md: Include it.
79 * config/aarch64/aarch64-cores.def (cortex-a57): Tune for it.
80 * config/aarch64/aarch64-tune.md: Regenerate.
82 2015-04-10 Michael Collison <michael.collison@linaro.org>
84 Backport from trunk r218145, r218146, r219472.
86 2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
88 * config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
89 Cortex-A17 tuning parameters.
90 * config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.
92 2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
94 * config/arm/arm.md (generic_sched): Specify cortexa17 in 'no' list.
95 Include cortex-a17.md.
96 * config/arm/arm.c (arm_issue_rate): Specify 2 for cortexa17.
97 * config/arm/arm-cores.def (cortex-a17): New entry.
98 * config/arm/arm-tables.opt: Regenerate.
99 * config/arm/arm-tune.md: Regenerate.
100 * config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=cortex-a17.
101 * config/arm/cortex-a17.md: New file.
102 * config/arm/cortex-a17-neon.md: New file.
103 * config/arm/driver-arm.c (arm_cpu_table): Add entry for cortex-a17.
104 * config/arm/t-aprofile: Add cortex-a17 entries to MULTILIB_MATCHES.
106 2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
108 * config/arm/arm-cores.def (cortex-a17.cortex-a7): New entry.
109 * config/arm/arm-tables.opt: Regenerate.
110 * config/arm/arm-tune.md: Regenerate.
111 * config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a17.cortex-a7.
112 * config/arm/t-aprofile: Add cortex-a17.cortex-a7 entry to
113 MULTILIB_MATCHES.
115 2015-04-09 Yvan Roux <yvan.roux@linaro.org>
117 Fix partial backport done at r221911.
118 * gcc/config/aarch64/aarch64.c: Fix cost tables for APM XGene-1
120 2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
122 Backport from trunk r219745.
123 2015-01-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
124 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
126 PR target/64263
127 * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the
128 destination is not a GP reg.
129 (*movdi_aarch64): Likewise.
131 2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
133 Backport from trunk r219578.
134 2015-01-14 Joey Ye <joey.ye@arm.com>
136 * config/arm/arm.c (arm_compute_save_reg_mask):
137 Do not save lr in case of tail call.
138 * config/arm/thumb2.md (*thumb2_pop_single): New pattern.
140 2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
142 Backport from trunk r219544.
143 2015-01-13 Renlin Li <renlin.li@arm.com>
145 * config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO): Return 2.
146 (CTZ_DEFINED_VALUE_AT_ZERO): Ditto.
148 2015-04-08 Charles Baylis <charles.baylis@linaro.org>
150 Backport from trunk r215567, r216672.
151 2014-10-24 Charles Baylis <charles.baylis@linaro.org>
153 * config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rewrite using builtins,
154 update uses to use new macro arguments.
155 (__LD3_LANE_FUNC): Likewise.
156 (__LD4_LANE_FUNC): Likewise.
158 2014-10-24 Charles Baylis <charles.baylis@linaro.org>
160 * config/aarch64/aarch64-builtins.c
161 (aarch64_types_loadstruct_lane_qualifiers): Define.
162 * config/aarch64/aarch64-simd-builtins.def (ld2_lane, ld3_lane,
163 ld4_lane): New builtins.
164 * config/aarch64/aarch64-simd.md (aarch64_vec_load_lanesoi_lane<mode>):
165 New pattern.
166 (aarch64_vec_load_lanesci_lane<mode>): Likewise.
167 (aarch64_vec_load_lanesxi_lane<mode>): Likewise.
168 (aarch64_ld2_lane<mode>): New expand.
169 (aarch64_ld3_lane<mode>): Likewise.
170 (aarch64_ld4_lane<mode>): Likewise.
171 * config/aarch64/aarch64.md (define_c_enum "unspec"): Add
172 UNSPEC_LD2_LANE, UNSPEC_LD3_LANE, UNSPEC_LD4_LANE.
174 2015-04-07 Michael Collison <michael.collison@linaro.org>
176 Backport from trunk r219656, r219657, r219659, r219661, r219679.
177 2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
179 * config/aarch64/aarch64-cores.def (xgene1): Update/add the
180 xgene1 (APM XGene-1) core definition.
181 * gcc/config/aarch64/aarch64.c: Add cost tables for APM XGene-1
182 * config/arm/aarch-cost-tables.h: Add cost tables for APM XGene-1
183 * doc/invoke.texi: Document -mcpu=xgene1.
185 2015-01-15 Philipp Tomsich <ptomsich@theobroma-systems.com>
187 * config/aarch64/aarch64.md: Include xgene1.md.
188 * config/aarch64/xgene1.md: New file.
190 2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
192 * config/arm/arm.md (generic_sched): Specify xgene1 in 'no' list.
193 Include xgene1.md.
194 * config/arm/arm.c (arm_issue_rate): Specify 4 for xgene1.
195 * config/arm/arm-cores.def (xgene1): New entry.
196 * config/arm/arm-tables.opt: Regenerate.
197 * config/arm/arm-tune.md: Regenerate.
198 * config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=xgene1.
200 2015-01-15 Richard Earnshaw <rearnsha@arm.com>
202 * arm.c (arm_xgene_tune): Add default initializer for instruction
203 fusion.
205 2015-04-07 Yvan Roux <yvan.roux@linaro.org>
207 Backport from trunk r217062, r217646, r218658.
208 2014-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>
210 PR rtl-optimization/63917
211 * ifcvt.c (cc_in_cond): New function.
212 (end_ifcvt_sequence): Make sure new generated insns do not clobber CC.
213 (noce_process_if_block, check_cond_move_block): Check CC references.
215 2014-11-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
217 * ifcvt.c (HAVE_cbranchcc4): Define.
218 (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
219 Use HAVE_cbranchcc4.
221 2014-11-04 Zhenqiang Chen <zhenqiang.chen@arm.com>
223 Revert:
224 2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com>
225 * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
226 Allow CC mode if HAVE_cbranchcc4.
228 2015-04-02 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
230 Fix testcase backported from trunk
232 * gcc/testsuite/gcc.dg/pr64935-1.c: Ignore warnings that can't be
233 disabled with not-yet-existing -Wno-shift-count-overflow.
235 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
237 Backport from trunk r218958, r218960, r218961.
238 2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
240 * config/aarch64/aarch64.c (<LOGICAL:optab>_one_cmpl<mode>3):
241 Reparameterize to...
242 (<NLOGICAL:optab>_one_cmpl<mode>3): with extra SIMD-register variant.
243 (xor_one_cmpl<mode>3): New define_insn_and_split.
245 * config/aarch64/iterators.md (NLOGICAL): New define_code_iterator.
247 2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
249 * config/aarch64/aarch64.md (<optab><mode>3, one_cmpl<mode>2):
250 Add SIMD-register variant.
251 * config/aarch64/iterators.md (Vbtype): Add value for SI.
253 2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
255 * config/aarch64/aarch64.md (subdi3, adddi3_aarch64): Don't penalize
256 SIMD reg variant.
258 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
260 Backport from trunk r218897.
261 2014-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
263 * doc/invoke.texi (ARM options): Remove mention of Advanced RISC
264 Machines.
266 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
268 Backport from trunk r218895.
269 2014-12-19 Xingxing Pan <xxingpan@marvell.com>
271 * config/arm/cortex-a9-neon.md (cortex_a9_neon_vmov): Change
272 reservation to cortex_a9_neon_dp.
274 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
276 Backport from trunk r218530.
277 2014-12-09 Alan Lawrence <alan.lawrence@arm.com>
279 * config/aarch64/aarch64.md (absdi2): Remove scratch operand by
280 earlyclobbering result operand.
282 * config/aarch64/aarch64-builtins.c (aarch64_types_unop_qualifiers):
283 Remove final qualifier_internal.
284 (aarch64_fold_builtin): Stop folding abs builtins, except on floats.
286 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
288 Backport from trunk r218526.
289 2014-12-09 Wilco Dijkstra <wilco.dijkstra@arm.com>
291 * gcc/config/aarch64/aarch64-protos.h (tune-params): Add reasociation
292 tuning parameters.
293 * gcc/config/aarch64/aarch64.c (TARGET_SCHED_REASSOCIATION_WIDTH):
294 Define.
295 (aarch64_reassociation_width): New function.
296 (generic_tunings): Add reassociation tuning parameters.
297 (cortexa53_tunings): Likewise.
298 (cortexa57_tunings): Likewise.
299 (thunderx_tunings): Likewise.
301 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
303 Backport from trunk r218866.
304 2014-12-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
306 * gcc/config/aarch64/aarch64.c (TARGET_MIN_DIVISIONS_FOR_RECIP_MUL):
307 Define.
308 (aarch64_min_divisions_for_recip_mul): New function.
310 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
312 Backport from trunk r218867, r218868.
313 2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
315 * config/aarch64/aarch64-simd.md (aarch64_lshr_simddi): Handle shift
316 by 64 by moving const0_rtx.
317 (aarch64_ushr_simddi): Delete.
319 * config/aarch64/aarch64.md (enum unspec): Delete UNSPEC_USHR64.
321 2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
323 * config/aarch64/aarch64.md (enum "unspec"): Remove UNSPEC_SSHR64.
325 * config/aarch64/aarch64-simd.md (aarch64_ashr_simddi): Change shift
326 amount to 63 if was 64.
327 (aarch64_sshr_simddi): Remove.
329 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
331 Backport from trunk r218855.
332 2014-12-18 Bin Cheng <bin.cheng@arm.com>
334 PR tree-optimization/62178
335 * tree-ssa-loop-ivopts.c (cheaper_cost_with_cand): New function.
336 (iv_ca_replace): New function.
337 (try_improve_iv_set): New parameter try_replace_p.
338 Break local optimal fixed-point by calling iv_ca_replace.
339 (find_optimal_iv_set_1): Pass new argument to try_improve_iv_set.
341 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
343 Backport from trunk r218829.
344 2014-12-17 James Greenhalgh <james.greenhalgh@arm.com>
346 * config/aarch64/aarch64.md (generic_sched): Delete it.
348 2015-03-27 Michael Collison <michael.collison@linaro.org>
350 Backport from trunk r218432, r218635, r219470.
352 2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
354 * config/arm/arm-protos.h (tune_params): Add fuseable_ops field.
355 * config/arm/arm.c (arm_macro_fusion_p): New function.
356 (arm_macro_fusion_pair_p): Likewise.
357 (TARGET_SCHED_MACRO_FUSION_P): Define.
358 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
359 (ARM_FUSE_NOTHING): Likewise.
360 (ARM_FUSE_MOVW_MOVT): Likewise.
361 (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,
362 arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,
363 arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,
364 arm_cortex_a53_tune, arm_cortex_a57_tune, arm_cortex_a9_tune,
365 arm_cortex_a12_tune, arm_v7m_tune, arm_v6m_tune, arm_fa726te_tune
366 arm_cortex_a5_tune): Specify fuseable_ops value.
368 2014-12-11 Renlin Li <renlin.li@arm.com>
370 * config/aarch64/aarch64-cores.def: Change all AARCH64_FL_FPSIMD to
371 AARCH64_FL_FOR_ARCH8.
372 * config/aarch64/aarch64.c (all_cores): Use FLAGS from
373 aarch64-cores.def file only.
375 2014-12-05 Renlin Li <renlin.li@arm.com>
377 * config/aarch64/aarch64-opts.h (AARCH64_CORE): Rename IDENT to SCHED.
378 * config/aarch64/aarch64.h (AARCH64_CORE): Likewise.
379 * config/aarch64/aarch64.c (AARCH64_CORE): Rename X to IDENT,
380 IDENT to SCHED.
382 2015-03-24 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
384 Backport from trunk r210736, r210737, r210744, r210746, r210747,
385 r210845, r213708, r213709, r216620, r216621, r216622, r216623,
386 r216624, r219787, r219789, r219893, r220316, r220808.
388 2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
390 * haifa-sched.c (enum rfs_decision, rfs_str): Remove RFS_DEBUG.
391 (rank_for_schedule_debug): Update.
392 (ready_sort): Make static. Move sorting logic to ...
393 (ready_sort_debug, ready_sort_real): New static functions.
394 (schedule_block): Sort both debug insns and real insns in preparation
395 for ready list trimming. Improve debug output.
396 * sched-int.h (ready_sort): Remove global declaration.
398 2015-02-01 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
400 * haifa-sched.c (INSN_RFS_DEBUG_ORIG_ORDER): New access macro.
401 (rank_for_schedule_debug): Split from ...
402 (rank_for_schedule): ... this.
403 (ready_sort): Sort DEBUG_INSNs separately from normal INSNs.
404 * sched-int.h (struct _haifa_insn_data): New field rfs_debug_orig_order.
406 2015-01-20 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
408 * config/arm/arm-protos.h (enum arm_sched_autopref): New constants.
409 (struct tune_params): Use the enum.
410 * arm.c (arm_*_tune): Update.
411 (arm_option_override): Update.
413 2015-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
415 * config/arm/arm-protos.h (struct tune_params): New field
416 sched_autopref_queue_depth.
417 * config/arm/arm.c (sched-int.h): Include header.
418 (arm_first_cycle_multipass_dfa_lookahead_guard,)
419 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD): Define hook.
420 (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,)
421 (arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,)
422 (arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,)
423 (arm_cortex_a53_tune, arm_cortex_a57_tune, arm_xgene1_tune,)
424 (arm_cortex_a5_tune, arm_cortex_a9_tune, arm_cortex_a12_tune,)
425 (arm_v7m_tune, arm_cortex_m7_tune, arm_v6m_tune, arm_fa726te_tune):
426 Specify sched_autopref_queue_depth value. Enabled for A15 and A57.
427 * config/arm/t-arm (arm.o): Update.
428 * haifa-sched.c (update_insn_after_change): Update.
429 (rank_for_schedule): Use auto-prefetcher model, if requested.
430 (autopref_multipass_init): New static function.
431 (autopref_rank_for_schedule): New rank_for_schedule heuristic.
432 (autopref_multipass_dfa_lookahead_guard_started_dump_p): New static
433 variable for debug dumps.
434 (autopref_multipass_dfa_lookahead_guard_1): New static helper function.
435 (autopref_multipass_dfa_lookahead_guard): New global function that
436 implements TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD hook.
437 (init_h_i_d): Update.
438 * params.def (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH): New tuning knob.
439 * sched-int.h (enum autopref_multipass_data_status): New const enum.
440 (autopref_multipass_data_): Structure for auto-prefetcher data.
441 (autopref_multipass_data_def, autopref_multipass_data_t): New typedefs.
442 (struct _haifa_insn_data:autopref_multipass_data): New field.
443 (INSN_AUTOPREF_MULTIPASS_DATA): New access macro.
444 (autopref_multipass_dfa_lookahead_guard): Declare.
446 2015-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
448 * config/aarch64/aarch64.c
449 (aarch64_sched_first_cycle_multipass_dfa_lookahead): Implement hook.
450 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define.
451 * config/arm/arm.c
452 (arm_first_cycle_multipass_dfa_lookahead): Implement hook.
453 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define.
455 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
457 * rtlanal.c (get_base_term): Handle SCRATCH.
459 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
461 * haifa-sched.c (sched_init): Disable max_issue when scheduling for
462 register pressure.
464 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
466 * haifa-sched.c (cached_first_cycle_multipass_dfa_lookahead,)
467 (cached_issue_rate): Remove. Use dfa_lookahead and issue_rate instead.
468 (max_issue, choose_ready, sched_init): Update.
470 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
472 * sched-int.h (struct _haifa_insn_data:last_rfs_win): New field.
473 * haifa-sched.c (INSN_LAST_RFS_WIN): New access macro.
474 (rfs_result): Set INSN_LAST_RFS_WIN. Update signature.
475 (rank_for_schedule): Update calls to rfs_result to pass new parameters.
476 (print_rank_for_schedule_stats): Print out elements of ready list that
477 ended up on their respective places due to each of the sorting
478 heuristics.
479 (ready_sort): Update.
480 (debug_ready_list_1): Improve printout for SCHED_PRESSURE_MODEL.
481 (schedule_block): Update.
483 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
485 * haifa-sched.c (sched_class_regs_num, call_used_regs_num): New static
486 arrays. Use sched_class_regs_num instead of ira_class_hard_regs_num.
487 (print_curr_reg_pressure, setup_insn_reg_pressure_info,)
488 (model_update_pressure, model_spill_cost): Use sched_class_regs_num.
489 (model_start_schedule): Update.
490 (sched_pressure_start_bb): New static function. Calculate
491 sched_class_regs_num.
492 (schedule_block): Use it.
493 (alloc_global_sched_pressure_data): Calculate call_used_regs_num.
495 2014-08-07 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
497 * haifa-sched.c (SCHED_SORT): Delete. Macro used exactly once.
498 (enum rfs_decition:RFS_*): New constants wrapped in an enum.
499 (rfs_str): String corresponding to RFS_* constants.
500 (rank_for_schedule_stats_t): New typedef.
501 (rank_for_schedule_stats): New static variable.
502 (rfs_result): New static function.
503 (rank_for_schedule): Track statistics for deciding heuristics.
504 (rank_for_schedule_stats_diff, print_rank_for_schedule_stats): New
505 static functions.
506 (ready_sort): Use them for debug printouts.
507 (schedule_block): Init statistics state. Print statistics on
508 rank_for_schedule decisions.
510 2014-08-07 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
512 * haifa-sched.c (rank_for_schedule): Fix INSN_TICK-based heuristics.
514 2014-05-23 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
516 Fix bootstrap error on ia64
517 * config/ia64/ia64.c (ia64_first_cycle_multipass_dfa_lookahead_guard):
518 Return default value.
520 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
522 Cleanup and improve multipass_dfa_lookahead_guard
523 * config/i386/i386.c (core2i7_first_cycle_multipass_filter_ready_try,)
524 (core2i7_first_cycle_multipass_begin,)
525 (core2i7_first_cycle_multipass_issue,)
526 (core2i7_first_cycle_multipass_backtrack): Update signature.
527 * config/ia64/ia64.c
528 (ia64_first_cycle_multipass_dfa_lookahead_guard_spec): Remove.
529 (ia64_first_cycle_multipass_dfa_lookahead_guard): Update signature.
530 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC): Remove
531 hook definition.
532 (ia64_first_cycle_multipass_dfa_lookahead_guard): Merge logic from
533 ia64_first_cycle_multipass_dfa_lookahead_guard_spec. Update return
534 values.
535 * config/rs6000/rs6000.c (rs6000_use_sched_lookahead_guard): Update
536 return values.
537 * doc/tm.texi: Regenerate.
538 * doc/tm.texi.in
539 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC): Remove.
540 * haifa-sched.c (ready_try): Make signed to allow negative values.
541 (rebug_ready_list_1): Update.
542 (choose_ready): Simplify.
543 (sched_extend_ready_list): Update.
545 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
547 Remove IA64 speculation tweaking flags
548 * config/ia64/ia64.c (ia64_set_sched_flags): Delete handling of
549 speculation tuning flags.
550 (msched-prefer-non-data-spec-insns,)
551 (msched-prefer-non-control-spec-insns): Obsolete options.
552 * haifa-sched.c (choose_ready): Remove handling of
553 PREFER_NON_CONTROL_SPEC and PREFER_NON_DATA_SPEC.
554 * sched-int.h (enum SPEC_SCHED_FLAGS): Remove PREFER_NON_CONTROL_SPEC
555 and PREFER_NON_DATA_SPEC.
556 * sel-sched.c (process_spec_exprs): Remove handling of
557 PREFER_NON_CONTROL_SPEC and PREFER_NON_DATA_SPEC.
559 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
561 Improve scheduling debug output
562 * haifa-sched.c (debug_ready_list): Remove unnecessary prototype.
563 (advance_one_cycle): Update.
564 (schedule_insn, queue_to_ready): Add debug printouts.
565 (debug_ready_list_1): New static function.
566 (debug_ready_list): Update.
567 (max_issue): Add debug printouts.
568 (dump_insn_stream): New static function.
569 (schedule_block): Use it. Also better indent printouts.
571 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
573 Fix sched_insn debug counter
574 * haifa-sched.c (schedule_insn): Update.
575 (struct haifa_saved_data): Add nonscheduled_insns_begin.
576 (save_backtrack_point, restore_backtrack_point): Update.
577 (first_nonscheduled_insn): New static function.
578 (queue_to_ready, choose_ready): Use it.
579 (schedule_block): Init nonscheduled_insns_begin.
580 (sched_emit_insn): Update.
582 2015-03-18 Michael Collison <michael.collison@linaro.org>
584 Backport from trunk r218007, r218010, r218012, r218013, r218014,
585 r218525.
587 2014-12-09 Andrew Pinski apinski@cavium.com
588 Kyrylo Tkachov kyrylo.tkachov@arm.com
590 * config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
591 (thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
592 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
594 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
596 * config/aarch64/aarch64.c (AARCH64_FUSE_ADRP_LDR): Define.
597 (cortexa53_tunings): Specify AARCH64_FUSE_ADRP_LDR in fuseable_ops.
598 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_LDR.
600 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
602 * config/aarch64/aarch64.c (AARCH64_FUSE_MOVK_MOVK): Define.
603 (cortexa53_tunings): Specify AARCH64_FUSE_MOVK_MOVK in fuseable_ops.
604 (cortexa57_tunings): Likewise.
605 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_MOVK_MOVK.
607 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
609 * sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p
610 in the not conditional jump case.
611 * doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
612 * target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
614 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
616 * config/aarch64/aarch64.c: Include tm-constrs.h
617 (AARCH64_FUSE_ADRP_ADD): Define.
618 (cortexa57_tunings): Add AARCH64_FUSE_ADRP_ADD to fuseable_ops.
619 (cortexa53_tunings): Likewise.
620 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_ADD.
622 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
624 * config/aarch64/aarch64-protos.h (struct tune_params): Add
625 fuseable_ops field.
626 * config/aarch64/aarch64.c (generic_tunings): Specify fuseable_ops.
627 (cortexa53_tunings): Likewise.
628 (cortexa57_tunings): Likewise.
629 (thunderx_tunings): Likewise.
630 (aarch64_macro_fusion_p): New function.
631 (aarch_macro_fusion_pair_p): Likewise.
632 (TARGET_SCHED_MACRO_FUSION_P): Define.
633 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
634 (AARCH64_FUSE_MOV_MOVK): Likewise.
635 (AARCH64_FUSE_NOTHING): Likewise.
637 2015-03-12 Yvan Roux <yvan.roux@linaro.org>
639 * LINARO-VERSION: Bump version.
641 2015-03-12 Yvan Roux <yvan.roux@linaro.org>
643 GCC Linaro 4.9-2015.03 released.
644 * LINARO-VERSION: Update.
646 2015-03-10 Michael Collison <michael.collison@linaro.org>
648 Backport from trunk r218503.
649 2014-12-08 Sandra Loosemore <sandra@codesourcery.com>
651 * simplify-rtx.c (simplify_relational_operation_1): Handle
652 simplification identities for BICS patterns.
654 2015-03-10 Michael Collison <michael.collison@linaro.org>
656 Backport from trunk r220751.
657 2015-02-17 James Greenhalgh <james.greenhalgh@arm.com>
659 * haifa-sched.c (recompute_todo_spec): Treat SCHED_GROUP_P
660 as forcing a HARD_DEP between instructions, thereby
661 disallowing rewriting to break dependencies.
663 2015-03-10 Michael Collison <michael.collison@linaro.org>
665 Backport from trunk r217725.
666 2014-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
668 * config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
669 Split into...
670 (cortex_a15_gp_to_vfp): ...This.
671 (cortex_a15_fp_to_gp): ...And this.
672 Define and comment bypass from vfp operations to fp->gp moves.
674 2015-03-10 Michael Collison <michael.collison@linaro.org>
676 Backport from trunk r217780.
677 2014-11-19 Wilco Dijkstra <wdijkstr@arm.com>
679 PR target/61915
680 * config/aarch64/aarch64.c (generic_regmove_cost): Increase FP move
681 cost.
683 2015-03-10 Michael Collison <michael.collison@linaro.org>
685 Backport from trunk r217938.
686 2014-11-21 Jiong Wang <jiong.wang@arm.com>
688 * config/aarch64/iterators.md (VS): New mode iterator.
689 (vsi2qi): New mode attribute.
690 (VSI2QI): Likewise.
691 * config/aarch64/aarch64-simd-builtins.def: New entry for ctz.
692 * config/aarch64/aarch64-simd.md (ctz<mode>2): New pattern for ctz.
693 * config/aarch64/aarch64-builtins.c
694 (aarch64_builtin_vectorized_function): Support BUILT_IN_CTZ.
696 2015-03-10 Michael Collison <michael.collison@linaro.org>
698 Backport from trunk r217852.
699 2014-11-20 Tejas Belagod <tejas.belagod@arm.com>
701 * config/aarch64/aarch64-protos.h (aarch64_classify_symbol):
702 Fixup prototype.
703 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate,
704 aarch64_cannot_force_const_mem, aarch64_classify_address,
705 aarch64_classify_symbolic_expression): Fixup call to
706 aarch64_classify_symbol.
707 (aarch64_classify_symbol): Add range-checking for
708 symbol + offset addressing for tiny and small models.
710 2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>
712 Backport from trunk r217707.
713 2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
715 * config/arm/neon-testgen.ml (emit_prologue): Handle new
716 compile_test_optim argument.
717 (emit_automatics): Rename to emit_variables. Support variable
718 indentation of its output.
719 (compile_test_optim): New function.
720 (test_intrinsic): Call compile_test_optim.
721 * config/arm/neon.ml (features): Add Compiler_optim.
722 (ops): Add Compiler_optim feature to Vbic and Vorn.
723 (type_in_crypto_only): Replace 'or' by '||'.
724 (reinterp): Likewise.
725 (reinterpq): Likewise.
727 2015-03-05 Yvan Roux <yvan.roux@linaro.org>
729 Backport from trunk r212011, r214942, r214957, r215012, r215016, r218115,
730 r218733, r218746, r220491.
731 2015-02-06 Sebastian Pop <s.pop@samsung.com>
732 Brian Rzycki <b.rzycki@samsung.com>
734 PR tree-optimization/64878
735 * tree-ssa-threadedge.c: Include tree-ssa-loop.h.
736 (fsm_find_control_statement_thread_paths): Add parameter seen_loop_phi.
737 Stop recursion at loop phi nodes after having visited a loop phi node.
739 2014-12-15 Richard Biener <rguenther@suse.de>
741 PR middle-end/64246
742 * cfgloop.c (mark_loop_for_removal): Make safe against multiple
743 invocations on the same loop.
745 2014-12-15 Richard Biener <rguenther@suse.de>
747 PR tree-optimization/64284
748 * tree-ssa-threadupdate.c (duplicate_seme_region): Mark
749 the loop for removal if we copied the loop header.
751 2014-11-27 Richard Biener <rguenther@suse.de>
753 PR tree-optimization/64083
754 * tree-ssa-threadupdate.c (thread_through_all_blocks): Do not
755 forcibly mark loop for removal the wrong way.
757 2014-09-08 Richard Biener <rguenther@suse.de>
759 PR ipa/63196
760 * tree-inline.c (copy_loops): The source loop header should
761 always be non-NULL.
762 (tree_function_versioning): If loops need fixup after removing
763 unreachable blocks fix them.
764 * omp-low.c (simd_clone_adjust): Do not add incr block to
765 loop under construction.
767 2014-09-08 Richard Biener <rguenther@suse.de>
769 PR bootstrap/63204
770 * cfgloop.c (mark_loop_for_removal): Track former header
771 unconditionally.
772 * cfgloop.h (struct loop): Add former_header member unconditionally.
773 * loop-init.c (fix_loop_structure): Enable bogus loop removal
774 diagnostic unconditionally.
776 2014-09-05 Richard Biener <rguenther@suse.de>
778 * cfgloop.c (mark_loop_for_removal): Record former header
779 when ENABLE_CHECKING.
780 * cfgloop.h (strut loop): Add former_header member when
781 ENABLE_CHECKING.
782 * loop-init.c (fix_loop_structure): Sanity check loops
783 marked for removal if they re-appeared.
785 2014-09-05 Richard Biener <rguenther@suse.de>
787 * cfgloop.c (mark_loop_for_removal): New function.
788 * cfgloop.h (mark_loop_for_removal): Declare.
789 * cfghooks.c (delete_basic_block): Use mark_loop_for_removal.
790 (merge_blocks): Likewise.
791 (duplicate_block): Likewise.
792 * except.c (sjlj_emit_dispatch_table): Likewise.
793 * tree-eh.c (cleanup_empty_eh_merge_phis): Likewise.
794 * tree-ssa-threadupdate.c (ssa_redirect_edges): Likewise.
795 (thread_through_loop_header): Likewise.
797 2014-06-26 Richard Biener <rguenther@suse.de>
799 PR tree-optimization/61607
800 * tree-ssa-threadupdate.c (ssa_redirect_edges): Cancel the
801 loop if we redirected its latch edge.
802 (thread_block_1): Do not cancel loops prematurely.
804 2015-03-05 Yvan Roux <yvan.roux@linaro.org>
806 Backport from trunk r220860.
807 2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
809 * config/aarch64/aarch64.md (*aarch64_lshr_sisd_or_int_<mode>3):
810 Mark operand 0 as earlyclobber in 2nd alternative.
811 (1st define_split below *aarch64_lshr_sisd_or_int_<mode>3):
812 Write negated shift amount into QI lowpart operand 0 and use it
813 in the shift step.
814 (2nd define_split below *aarch64_lshr_sisd_or_int_<mode>3): Likewise.
816 2015-03-04 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
818 Backport from trunk r215722.
819 2014-09-30 James Greenhalgh <james.greenhalgh@arm.com>
821 * config/aarch64/aarch64-simd-builtins.def (sqdmull_laneq): Expand
822 iterator.
823 * config/aarch64/aarch64-simd.md
824 (aarch64_sqdmull_laneq<mode>): Expand iterator.
825 * config/aarch64/arm_neon.h (vqdmullh_laneq_s16): New.
826 (vqdmulls_lane_s32): Fix return type.
827 (vqdmulls_laneq_s32): New.
829 2015-03-04 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
831 Backport from trunk r215612.
832 2014-09-25 James Greenhalgh <james.greenhalgh@arm.com>
834 * config/aarch64/aarch64-protos.h (aarch64_simd_const_bounds): Delete.
835 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shl<mode>): Use
836 new predicates.
837 (aarch64_<sur>shll2_n<mode>): Likewise.
838 (aarch64_<sur>shr_n<mode>): Likewise.
839 (aarch64_<sur>sra_n<mode>: Likewise.
840 (aarch64_<sur>s<lr>i_n<mode>): Likewise.
841 (aarch64_<sur>qshl<u>_n<mode>): Likewise.
842 * config/aarch64/aarch64.c (aarch64_simd_const_bounds): Delete.
843 * config/aarch64/iterators.md (ve_mode): New.
844 (offsetlr): Remap to infix text for use in new predicates.
845 * config/aarch64/predicates.md (aarch64_simd_shift_imm_qi): New.
846 (aarch64_simd_shift_imm_hi): Likewise.
847 (aarch64_simd_shift_imm_si): Likewise.
848 (aarch64_simd_shift_imm_di): Likewise.
849 (aarch64_simd_shift_imm_offset_qi): Likewise.
850 (aarch64_simd_shift_imm_offset_hi): Likewise.
851 (aarch64_simd_shift_imm_offset_si): Likewise.
852 (aarch64_simd_shift_imm_offset_di): Likewise.
853 (aarch64_simd_shift_imm_bitsize_qi): Likewise.
854 (aarch64_simd_shift_imm_bitsize_hi): Likewise.
855 (aarch64_simd_shift_imm_bitsize_si): Likewise.
856 (aarch64_simd_shift_imm_bitsize_di): Likewise.
858 2015-02-15 Michael Collison <michael.collison@linaro.org>
860 * LINARO-VERSION: Bump version.
862 2015-02-12 Michael Collison <michael.collison@linaro.org>
864 GCC Linaro 4.9-2015.02 released.
865 * LINARO-VERSION: Update.
867 2015-02-10 Michael Collison <michael.collison@linaro.org>
869 Backport from trunk r217175, r217185, r217186.
870 2014-11-06 Hale Wang <hale.wang@arm.com>
872 * config/arm/arm-cores.def: Add support for
873 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
874 cortex-m1.small-multiply.
875 * config/arm/arm-tables.opt: Regenerate.
876 * config/arm/arm-tune.md: Regenerate.
877 * config/arm/arm.c: Update the rtx-costs for MUL.
878 * config/arm/bpabi.h: Handle
879 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
880 cortex-m1.small-multiply.
881 * doc/invoke.texi: Document
882 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
883 cortex-m1.small-multiply.
885 2015-02-10 Michael Collison <michael.collison@linaro.org>
887 Backport from trunk r217091.
888 2014-11-04 Jiong Wang <jiong.wang@arm.com>
889 2014-11-04 Wilco Dijkstra <wilco.dijkstra@arm.com>
891 PR target/63293
892 * config/aarch64/aarch64.c (aarch64_expand_epiloue): Add barriers before
893 stack adjustment.
895 2015-02-10 Michael Collison <michael.collison@linaro.org>
897 Backport from trunk r217118.
898 2014-11-05 Alex Velenko <Alex.Velenko@arm.com>
900 * simplify-rtx.c (simplify_binary_operation_1): Div check added.
901 * rtl.h (SUBREG_P): New macro added.
903 2015-02-10 Michael Collison <michael.collison@linaro.org>
905 Backport from trunk r217215.
906 2014-11-07 Jiong Wang <jiong.wang@arm.com>
907 2014-11-07 Richard Biener <rguenther@suse.de>
909 PR tree-optimization/63676
910 * gimple-fold.c (fold_gimple_assign): Do not fold node when
911 TREE_CLOBBER_P be true.
913 2015-02-10 Michael Collison <michael.collison@linaro.org>
915 Backport from trunk r219583.
916 2015-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
918 PR target/64460
919 * config/arm/arm.md (*<arith_shift_insn>_multsi): Set 'shift' to 2.
920 (*<arith_shift_insn>_shiftsi): Set 'shift' attr to 3.
922 2015-02-10 Michael Collison <michael.collison@linaro.org>
924 Backport from trunk r217430.
925 2014-11-12 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
927 * config/arm/arm.c (*<arith_shift_insn>_shiftsi): Fix typo.
929 2015-02-10 Michael Collison <michael.collison@linaro.org>
931 Backport from trunk r217431.
932 2014-11-12 Jiong Wang <jiong.wang@arm.com>
934 * config/aarch64/aarch64.h (CALL_USED_REGISTERS): Mark LR as
935 caller-save.
936 (EPILOGUE_USES): Guard the check by epilogue_completed.
937 * config/aarch64/aarch64.c (aarch64_layout_frame): Explictly check for
938 LR.
939 (aarch64_can_eliminate): Check LR_REGNUM liveness.
941 2015-02-10 Michael Collison <michael.collison@linaro.org>
943 Backport from trunk r219718.
944 * expmed.c (store_bit_field_using_insv): Improve warning message.
945 Use %wu instead of HOST_WIDE_INT_PRINT_UNSIGNED.
947 2015-01-15 Jiong Wang <jiong.wang@arm.com>
949 2015-02-10 Michael Collison <michael.collison@linaro.org>
951 Backport from trunk r219717.
952 2015-01-15 Jiong Wang <jiong.wang@arm.com>
954 PR rtl-optimization/64011
955 * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
956 there is partial overflow.
958 2015-02-10 Michael Collison <michael.collison@linaro.org>
960 Backport from trunk r217331.
961 2014-11-11 Bin Cheng <bin.cheng@arm.com>
963 * sched-deps.c (sched_analyze_1): Check pending list if it is not
964 less than MAX_PENDING_LIST_LENGTH.
965 (sched_analyze_2, sched_analyze_insn, deps_analyze_insn): Ditto.
967 2015-02-09 Michael Collison <michael.collison@linaro.org>
969 Backport from trunk r216779.
970 2014-10-28 Alan Lawrence <alan.lawrence@arm.com>
972 * expr.c (expand_expr_real_2): Remove code handling VEC_LSHIFT_EXPR.
973 * fold-const.c (const_binop): Likewise.
974 * cfgexpand.c (expand_debug_expr): Likewise.
975 * tree-inline.c (estimate_operator_cost): Likewise.
976 * tree-vect-generic.c (expand_vector_operations_1): Likewise.
977 * optabs.c (optab_for_tree_code): Likewise.
978 (expand_vec_shift_expr): Likewise, update comment.
979 * tree.def: Delete VEC_LSHIFT_EXPR, remove comment.
980 * optabs.h (expand_vec_shift_expr): Remove comment re. VEC_LSHIFT_EXPR.
981 * optabs.def: Remove vec_shl_optab.
982 * doc/md.texi: Remove references to vec_shr_m.
984 2015-02-09 Michael Collison <michael.collison@linaro.org>
986 Backport from trunk r216742.
987 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
989 * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Define again.
990 * config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
991 Restore, enable for bigendian, update to use __builtin..._scal...
993 2015-02-09 Michael Collison <michael.collison@linaro.org>
995 Backport from trunk r216741.
996 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
998 * config/aarch64/aarch64-simd-builtins.def (reduc_smax_, reduc_smin_,
999 reduc_umax_, reduc_umin_, reduc_smax_nan_, reduc_smin_nan_): Remove.
1000 (reduc_smax_scal_, reduc_smin_scal_, reduc_umax_scal_,
1001 reduc_umin_scal_, reduc_smax_nan_scal_, reduc_smin_nan_scal_): New.
1003 * config/aarch64/aarch64-simd.md
1004 (reduc_<maxmin_uns>_<mode>): Rename VDQV_S variant to...
1005 (reduc_<maxmin_uns>_internal<mode>): ...this.
1006 (reduc_<maxmin_uns>_<mode>): New (VDQ_BHSI).
1007 (reduc_<maxmin_uns>_scal_<mode>): New (*2).
1009 (reduc_<maxmin_uns>_v2si): Combine with below, renaming...
1010 (reduc_<maxmin_uns>_<mode>): Combine V2F with above, renaming...
1011 (reduc_<maxmin_uns>_internal_<mode>): ...to this (VDQF).
1013 * config/aarch64/arm_neon.h (vmaxv_f32, vmaxv_s8, vmaxv_s16,
1014 vmaxv_s32, vmaxv_u8, vmaxv_u16, vmaxv_u32, vmaxvq_f32, vmaxvq_f64,
1015 vmaxvq_s8, vmaxvq_s16, vmaxvq_s32, vmaxvq_u8, vmaxvq_u16, vmaxvq_u32,
1016 vmaxnmv_f32, vmaxnmvq_f32, vmaxnmvq_f64, vminv_f32, vminv_s8,
1017 vminv_s16, vminv_s32, vminv_u8, vminv_u16, vminv_u32, vminvq_f32,
1018 vminvq_f64, vminvq_s8, vminvq_s16, vminvq_s32, vminvq_u8, vminvq_u16,
1019 vminvq_u32, vminnmv_f32, vminnmvq_f32, vminnmvq_f64): Update to use
1020 __builtin_aarch64_reduc_..._scal; remove vget_lane wrapper.
1022 2015-02-09 Michael Collison <michael.collison@linaro.org>
1024 Backport from trunk r216738.
1025 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1027 * config/aarch64/aarch64-simd-builtins.def
1028 (reduc_splus_<mode>/VDQF, reduc_uplus_<mode>/VDQF, reduc_splus_v4sf):
1029 Remove.
1030 (reduc_plus_scal_<mode>, reduc_plus_scal_v4sf): New.
1032 * config/aarch64/aarch64-simd.md (reduc_<sur>plus_mode): Remove.
1033 (reduc_splus_<mode>, reduc_uplus_<mode>, reduc_plus_scal_<mode>): New.
1035 (reduc_<sur>plus_mode): Change SUADDV -> UNSPEC_ADDV, rename to...
1036 (aarch64_reduc_plus_internal<mode>): ...this.
1038 (reduc_<sur>plus_v2si): Change SUADDV -> UNSPEC_ADDV, rename to...
1039 (aarch64_reduc_plus_internalv2si): ...this.
1041 (reduc_splus_<mode>/V2F): Rename to...
1042 (aarch64_reduc_plus_internal<mode>): ...this.
1044 * config/aarch64/iterators.md
1045 (UNSPEC_SADDV, UNSPEC_UADDV, SUADDV): Remove.
1046 (UNSPEC_ADDV): New.
1047 (sur): Remove elements for UNSPEC_SADDV and UNSPEC_UADDV.
1049 * config/aarch64/arm_neon.h (vaddv_s8, vaddv_s16, vaddv_s32, vaddv_u8,
1050 vaddv_u16, vaddv_u32, vaddvq_s8, vaddvq_s16, vaddvq_s32, vaddvq_s64,
1051 vaddvq_u8, vaddvq_u16, vaddvq_u32, vaddvq_u64, vaddv_f32, vaddvq_f32,
1052 vaddvq_f64): Change __builtin_aarch64_reduc_[us]plus_... to
1053 __builtin_aarch64_reduc_plus_scal, remove vget_lane wrapper.
1055 2015-02-09 Michael Collison <michael.collison@linaro.org>
1057 Backport from trunk r216737.
1058 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1060 PR tree-optimization/61114
1061 * doc/md.texi (Standard Names): Add reduc_(plus,[us](min|max))|scal
1062 optabs, and note in reduc_[us](plus|min|max) to prefer the former.
1064 * expr.c (expand_expr_real_2): Use reduc_..._scal if available, fall
1065 back to old reduc_... BIT_FIELD_REF only if not.
1067 * optabs.c (optab_for_tree_code): for REDUC_(MAX,MIN,PLUS)_EXPR,
1068 return the reduce-to-scalar (reduc_..._scal) optab.
1069 (scalar_reduc_to_vector): New.
1071 * optabs.def (reduc_smax_scal_optab, reduc_smin_scal_optab,
1072 reduc_plus_scal_optab, reduc_umax_scal_optab, reduc_umin_scal_optab):
1073 New.
1075 * optabs.h (scalar_reduc_to_vector): Declare.
1077 * tree-vect-loop.c (vectorizable_reduction): Look for optabs reducing
1078 to either scalar or vector.
1080 2015-02-09 Michael Collison <michael.collison@linaro.org>
1082 Backport from trunk r216736.
1083 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1085 PR tree-optimization/61114
1086 * expr.c (expand_expr_real_2): For REDUC_{MIN,MAX,PLUS}_EXPR, add
1087 extract_bit_field around optab result.
1089 * fold-const.c (fold_unary_loc): For REDUC_{MIN,MAX,PLUS}_EXPR, produce
1090 scalar not vector.
1092 * tree-cfg.c (verify_gimple_assign_unary): Check result vs operand type
1093 for REDUC_{MIN,MAX,PLUS}_EXPR.
1095 * tree-vect-loop.c (vect_analyze_loop): Update comment.
1096 (vect_create_epilog_for_reduction): For direct vector reduction, use
1097 result of tree code directly without extract_bit_field.
1099 * tree.def (REDUC_MAX_EXPR, REDUC_MIN_EXPR, REDUC_PLUS_EXPR): Update
1100 comment.
1102 2015-02-09 Michael Collison <michael.collison@linaro.org>
1104 Backport from trunk r216734.
1105 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1107 * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Comment out.
1108 * config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
1109 Remove using preprocessor directis.
1111 2015-02-09 Yvan Roux <yvan.roux@linaro.org>
1113 Backport from trunk r217173, r217174, r217687.
1114 2014-11-17 Terry Guo <terry.guo@arm.com>
1116 * config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
1117 * config/arm/arm.md (generic_sched): Exclude cortex-m7.
1118 (generic_vfp): Likewise.
1119 * config/arm/cortex-m7.md: Pipeline description for cortex-m7.
1121 2014-10-06 Hale Wang <Hale.Wang@arm.com>
1123 * config/arm/arm.c: Add cortex-m7 tune.
1124 * config/arm/arm-cores.def: Use cortex-m7 tune.
1126 2015-01-15 Yvan Roux <yvan.roux@linaro.org>
1128 * LINARO-VERSION: Bump version.
1130 2015-01-15 Yvan Roux <yvan.roux@linaro.org>
1132 GCC Linaro 4.9-2015.01 released.
1133 * LINARO-VERSION: Update.
1135 2015-01-14 Yvan Roux <yvan.roux@linaro.org>
1137 Fix Linaro PR #902
1139 Partial Backport from trunk r211798.
1140 2014-06-18 Radovan Obradovic <robradovic@mips.com>
1141 Tom de Vries <tom@codesourcery.com>
1143 * config/arm/arm.c (arm_emit_call_insn): Add IP and CC clobbers to
1144 CALL_INSN_FUNCTION_USAGE.
1146 Backport from trunk r209800.
1147 2014-04-25 Tom de Vries <tom@codesourcery.com>
1149 * expr.c (clobber_reg_mode): New function.
1150 * expr.h (clobber_reg): New function.
1152 2015-01-14 Yvan Roux <yvan.roux@linaro.org>
1154 Backport from trunk r211783.
1155 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1157 * config/arm/arm.c (neon_vector_mem_operand): Allow register
1158 POST_MODIFY for neon loads and stores.
1159 (arm_print_operand): Output post-index register for neon loads and
1160 stores.
1162 2015-01-14 Yvan Roux <yvan.roux@linaro.org>
1164 Backport from trunk r218451.
1165 2014-12-06 James Greenhalgh <james.greenhalgh@arm.com>
1166 Sebastian Pop <s.pop@samsung.com>
1167 Brian Rzycki <b.rzycki@samsung.com>
1169 PR tree-optimization/54742
1170 * params.def (max-fsm-thread-path-insns, max-fsm-thread-length,
1171 max-fsm-thread-paths): New.
1173 * doc/invoke.texi (max-fsm-thread-path-insns, max-fsm-thread-length,
1174 max-fsm-thread-paths): Documented.
1176 * tree-cfg.c (split_edge_bb_loc): Export.
1177 * tree-cfg.h (split_edge_bb_loc): Declared extern.
1179 * tree-ssa-threadedge.c (simplify_control_stmt_condition): Restore the
1180 original value of cond when simplification fails.
1181 (fsm_find_thread_path): New.
1182 (fsm_find_control_statement_thread_paths): New.
1183 (thread_through_normal_block): Call find_control_statement_thread_paths.
1185 * tree-ssa-threadupdate.c (dump_jump_thread_path): Pretty print
1186 EDGE_FSM_THREAD.
1187 (verify_seme): New.
1188 (duplicate_seme_region): New.
1189 (thread_through_all_blocks): Generate code for EDGE_FSM_THREAD edges
1190 calling duplicate_seme_region.
1192 * tree-ssa-threadupdate.h (jump_thread_edge_type): Add EDGE_FSM_THREAD.
1194 2015-01-13 Michael Collison <michael.collison@linaro.org>
1196 Backport from trunk r217394.
1197 2014-11-11 Andrew Pinski <apinski@cavium.com>
1199 Bug target/61997
1200 * config.gcc (aarch64*-*-*): Set target_gtfiles to include
1201 aarch64-builtins.c.
1202 * config/aarch64/aarch64-builtins.c: Include gt-aarch64-builtins.h
1203 at the end of the file.
1205 2015-01-13 Michael Collison <michael.collison@linaro.org>
1207 Backport from trunk r216267, r216547, r216548, r217072, r217192, r217405,
1208 r217406, r217768.
1209 2014-11-19 Renlin Li <renlin.li@arm.com>
1211 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FP_FAST,
1212 __ARM_FEATURE_FMA, __ARM_FP, __ARM_FEATURE_NUMERIC_MAXMIN, __ARM_NEON_FP.
1214 2014-11-12 Tejas Belagod <tejas.belagod@arm.com>
1216 * Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi,
1217 arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi.
1218 * doc/aarch64-acle-intrinsics.texi: Remove.
1219 * doc/arm-acle-intrinsics.texi: Remove.
1220 * doc/arm-neon-intrinsics.texi: Remove.
1221 * doc/extend.texi: Consolidate sections AArch64 intrinsics,
1222 ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language
1223 Extension section. Add references to public ACLE specification.
1225 2014-11-06 Renlin Li <renlin.li@arm.com>
1227 * config/aarch64/aarch64.c (aarch64_architecture_version): New.
1228 (processor): New architecture_version field.
1229 (aarch64_override_options): Initialize aarch64_architecture_version.
1230 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH,
1231 __ARM_ARCH_PROFILE, aarch64_arch_name macro.
1233 2014-11-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1235 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition
1236 of __ARM_FEATURE_IDIV.
1238 2014-10-22 Jiong Wang <jiong.wang@arm.com>
1240 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'.
1242 2014-10-22 Renlin Li <renlin.li@arm.com>
1244 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
1245 __ARM_FEATURE_IDIV__.
1247 2014-10-15 Renlin Li <renlin.li@arm.com>
1249 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
1250 __ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE,
1251 __ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV,
1252 __ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T.
1254 2015-01-13 Michael Collison <michael.collison@linaro.org>
1256 Backport from trunk r211789, r211790, r211791, r211792, r211793, r211794,
1257 r211795, r211796, r211797.
1258 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1260 * config/arm/bpabi.c (__gnu_uldivmod_helper): Remove.
1262 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1264 * config/arm/bpabi-v6m.S (__aeabi_uldivmod): Perform division using
1265 __udivmoddi4.
1267 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1269 * config/arm/bpabi.S (__aeabi_ldivmod, __aeabi_uldivmod,
1270 push_for_divide, pop_for_divide): Use .cfi_* directives for DWARF
1271 annotations. Fix DWARF information.
1273 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1275 * config/arm/bpabi.S (__aeabi_ldivmod): Perform division using
1276 __udivmoddi4, and fixups for negative operands.
1278 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1280 * config/arm/bpabi.S (__aeabi_ldivmod): Optimise stack manipulation.
1282 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1284 * config/arm/bpabi.S (__aeabi_uldivmod): Perform division using call
1285 to __udivmoddi4.
1287 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1289 * config/arm/bpabi.S (__aeabi_uldivmod): Optimise stack pointer
1290 manipulation.
1292 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1294 * config/arm/bpabi.S (__aeabi_uldivmod, __aeabi_ldivmod): Add comment
1295 describing register usage on function entry and exit.
1297 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1299 * config/arm/bpabi.S (__aeabi_uldivmod): Fix whitespace.
1300 (__aeabi_ldivmod): Fix whitespace.
1302 2015-01-13 Yvan Roux <yvan.roux@linaro.org>
1304 Backport from trunk r217593.
1305 2014-11-14 Andrew Pinski <apinski@cavium.com>
1307 * config/aarch64/aarch64-cores.def (thunderx): Change the scheduler
1308 over to thunderx.
1309 * config/aarch64/aarch64.md: Include thunderx.md.
1310 (generic_sched): Set to no for thunderx.
1311 * config/aarch64/thunderx.md: New file.
1313 2015-01-12 Yvan Roux <yvan.roux@linaro.org>
1315 Backport from trunk r217717.
1316 2014-11-18 Felix Yang <felix.yang@huawei.com>
1318 * config/aarch64/aarch64.c (doloop_end): New pattern.
1319 * config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement.
1321 2015-01-12 Yvan Roux <yvan.roux@linaro.org>
1323 Backport from trunk r217661.
1324 2014-11-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1326 * config/aarch64/aarch64-cores.def (cortex-a53): Remove
1327 AARCH64_FL_CRYPTO from feature flags.
1328 (cortex-a57): Likewise.
1329 (cortex-a57.cortex-a53): Likewise.
1331 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1333 Backport from trunk r218319.
1334 2014-12-03 Andrew Stubbs <ams@codesourcery.com>
1336 Revert:
1338 2014-09-17 Andrew Stubbs <ams@codesourcery.com>
1340 * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
1341 when architecture is older than ARMv7.
1343 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1345 Backport from trunk r217691.
1346 2014-11-18 Jiong Wang <jiong.wang@arm.com>
1348 * lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed
1349 registers.
1351 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1353 Backport from trunk r215503.
1354 2014-09-23 Wilco Dijkstra <wdijkstr@arm.com>
1356 * common/config/aarch64/aarch64-common.c:
1357 (default_options aarch_option_optimization_table):
1358 Default to -fsched-pressure.
1360 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1362 Backport from trunk r211132.
1363 2014-06-02 Tom de Vries <tom@codesourcery.com>
1365 * config/aarch64/aarch64.c (aarch64_float_const_representable_p): Handle
1366 case that x has VOIDmode.
1368 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1370 Backport from trunk r209620.
1371 2014-04-22 Vidya Praveen <vidyapraveen@arm.com>
1373 * aarch64.md (float<GPI:mode><GPF:mode>2): Remove.
1374 (floatuns<GPI:mode><GPF:mode>2): Remove.
1375 (<optab><fcvt_target><GPF:mode>2): New pattern for equal width float
1376 and floatuns conversions.
1377 (<optab><fcvt_iesize><GPF:mode>2): New pattern for inequal width float
1378 and floatuns conversions.
1379 * iterators.md (fcvt_target, FCVT_TARGET): Support SF and DF modes.
1380 (w1,w2): New mode attributes for inequal width conversions.
1382 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1384 Backport from trunk r217362, r217546.
1385 2014-11-14 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1387 PR target/63724
1388 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Split out
1389 numerical immediate handling to...
1390 (aarch64_internal_mov_immediate): ...this. New.
1391 (aarch64_rtx_costs): Use aarch64_internal_mov_immediate.
1392 (aarch64_mov_operand_p): Relax predicate.
1393 * config/aarch64/aarch64.md (mov<mode>:GPI): Do not expand CONST_INTs.
1394 (*movsi_aarch64): Turn into define_insn_and_split and new alternative
1395 for 'n'.
1396 (*movdi_aarch64): Likewise.
1398 2014-11-11 James Greenhalgh <james.greenhalgh@arm.com>
1400 * config/aarch64/aarch64-simd.md
1401 (aarch64_simd_bsl<mode>_internal): Remove float cases, canonicalize.
1402 (aarch64_simd_bsl<mode>): Add gen_lowpart expressions where we
1403 are punning between float vectors and integer vectors.
1405 2014-12-11 Yvan Roux <yvan.roux@linaro.org>
1407 * LINARO-VERSION: Bump version.
1409 2014-12-11 Yvan Roux <yvan.roux@linaro.org>
1411 GCC Linaro 4.9-2014.12 released.
1412 * LINARO-VERSION: Update.
1414 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1416 Backport from trunk r217079, r217080.
1417 2014-11-04 Alan Lawrence <alan.lawrence@arm.com>
1419 config/arm/neon.md (reduc_smin_<mode> *2): Rename to...
1420 (reduc_smin_scal_<mode> *2): ...this; extract scalar result.
1421 (reduc_smax_<mode> *2): Rename to...
1422 (reduc_smax_scal_<mode> *2): ...this; extract scalar result.
1423 (reduc_umin_<mode> *2): Rename to...
1424 (reduc_umin_scal_<mode> *2): ...this; extract scalar result.
1425 (reduc_umax_<mode> *2): Rename to...
1426 (reduc_umax_scal_<mode> *2): ...this; extract scalar result.
1428 2014-11-04 Alan Lawrence <alan.lawrence@arm.com>
1430 config/arm/neon.md (reduc_plus_*): Rename to...
1431 (reduc_plus_scal_*): ...this; reduce to temp and extract scalar result.
1433 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1435 Fix Backport from trunk r216524 (committed at r218379).
1436 Add missing file: config/aarch64/aarch64-cost-tables.h
1438 * config/aarch64/aarch64-cost-tables.h: New file.
1440 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1442 Backport from trunk r217076.
1443 2014-11-04 Michael Collison <michael.collison@linaro.org>
1445 * config/aarch64/iterators.md (lconst_atomic): New mode attribute
1446 to support constraints for CONST_INT in atomic operations.
1447 * config/aarch64/atomics.md
1448 (atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
1449 (atomic_nand<mode>): Likewise.
1450 (atomic_fetch_<atomic_optab><mode>): Likewise.
1451 (atomic_fetch_nand<mode>): Likewise.
1452 (atomic_<atomic_optab>_fetch<mode>): Likewise.
1453 (atomic_nand_fetch<mode>): Likewise.
1455 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1457 Backport from trunk r217026.
1458 2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com>
1460 * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
1461 Allow CC mode if HAVE_cbranchcc4.
1463 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1465 Backport from trunk r217014.
1466 2014-11-02 Michael Collison <michael.collison@linaro.org>
1468 * config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO) : Update
1469 to support vector modes.
1470 (CTZ_DEFINED_VALUE_AT_ZERO): Ditto.
1472 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1474 Backport from trunk r216996, r216998, r216999, r217001, r217002, r217003,
1475 r217004, r217742.
1476 2014-11-18 James Greenhalgh <james.greenhalgh@arm.com>
1478 PR target/63937
1479 * target.def (use_by_pieces_infrastructure_p): Take unsigned
1480 HOST_WIDE_INT as the size parameter.
1481 * targhooks.c (default_use_by_pieces_infrastructure_p): Likewise.
1482 * targhooks.h (default_use_by_pieces_infrastructure_p): Likewise.
1483 * config/arc/arc.c (arc_use_by_pieces_infrastructure_p)): Likewise.
1484 * config/mips/mips.c (mips_use_by_pieces_infrastructure_p)): Likewise.
1485 * config/s390/s390.c (s390_use_by_pieces_infrastructure_p)): Likewise.
1486 * config/sh/sh.c (sh_use_by_pieces_infrastructure_p)): Likewise.
1487 * config/aarch64/aarch64.c
1488 (aarch64_use_by_pieces_infrastructure_p)): Likewise.
1489 * doc/tm.texi: Regenerate.
1491 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1493 * doc/tm.texi.in (MOVE_BY_PIECES_P): Remove.
1494 (CLEAR_BY_PIECES_P): Likewise.
1495 (SET_BY_PIECES_P): Likewise.
1496 (STORE_BY_PIECES_P): Likewise.
1497 * doc/tm.texi: Regenerate.
1498 * system.h: Poison MOVE_BY_PIECES_P, CLEAR_BY_PIECES_P,
1499 SET_BY_PIECES_P, STORE_BY_PIECES_P.
1500 * expr.c (MOVE_BY_PIECES_P): Remove.
1501 (CLEAR_BY_PIECES_P): Likewise.
1502 (SET_BY_PIECES_P): Likewise.
1503 (STORE_BY_PIECES_P): Likewise.
1504 (can_move_by_pieces): Rewrite in terms of
1505 targetm.use_by_pieces_infrastructure_p.
1506 (emit_block_move_hints): Likewise.
1507 (can_store_by_pieces): Likewise.
1508 (store_by_pieces): Likewise.
1509 (clear_storage_hints): Likewise.
1510 (emit_push_insn): Likewise.
1511 (expand_constructor): Likewise.
1513 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1515 * config/aarch64/aarch64.c
1516 (aarch64_use_by_pieces_infrastructre_p): New.
1517 (TARGET_USE_BY_PIECES_INFRASTRUCTURE): Likewise.
1518 * config/aarch64/aarch64.h (STORE_BY_PIECES_P): Delete.
1520 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1522 * config/mips/mips.h (MOVE_BY_PIECES_P): Remove.
1523 (STORE_BY_PIECES_P): Likewise.
1524 * config/mips/mips.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
1525 (mips_move_by_pieces_p): Rename to...
1526 (mips_use_by_pieces_infrastructure_p): ...this, use new hook
1527 parameters, use the default hook implementation as a
1528 fall-back.
1530 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1532 * config/sh/sh.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
1533 (sh_use_by_pieces_infrastructure_p): Likewise.
1534 * config/sh/sh.h (MOVE_BY_PIECES_P): Remove.
1535 (STORE_BY_PIECES_P): Likewise.
1536 (SET_BY_PIECES_P): Likewise.
1538 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1540 * config/arc/arc.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
1541 (arc_use_by_pieces_infrastructure_p): Likewise.
1542 * confir/arc/arc.h (MOVE_BY_PIECES_P): Delete.
1543 (CAN_MOVE_BY_PIECES): Likewise.
1545 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1547 * config/s390/s390.c (s390_use_by_pieces_infrastructure_p): New.
1548 (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Likewise.
1549 * config/s390/s390.h (MOVE_BY_PIECES_P): Remove.
1550 (CLEAR_BY_PIECES): Likewise.
1551 (SET_BY_PIECES): Likewise.
1552 (STORE_BY_PIECES): Likewise.
1554 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1556 * target.def (use_by_pieces_infrastructure_p): New.
1557 * doc/tm.texi.in (MOVE_BY_PIECES_P): Describe that this macro
1558 is deprecated.
1559 (STORE_BY_PIECES_P): Likewise.
1560 (CLEAR_BY_PIECES_P): Likewise.
1561 (SET_BY_PIECES_P): Likewise.
1562 (TARGET_MOVE_BY_PIECES_PROFITABLE_P): Add hook.
1563 * doc/tm.texi: Regenerate.
1564 * expr.c (MOVE_BY_PIECES_P): Rewrite in terms of
1565 TARGET_USE_BY_PIECES_INFRASTRUCTURE_P.
1566 (STORE_BY_PIECES_P): Likewise.
1567 (CLEAR_BY_PIECES_P): Likewise.
1568 (SET_BY_PIECES_P): Likewise.
1569 (STORE_MAX_PIECES): Move to...
1570 * defaults.h (STORE_MAX_PIECES): ...here.
1571 * targhooks.c (get_move_ratio): New.
1572 (default_use_by_pieces_infrastructure_p): Likewise.
1573 * targhooks.h (default_use_by_pieces_infrastructure_p): New.
1574 * target.h (by_pieces_operation): New.
1576 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1578 Backport from trunk r216765.
1579 2014-10-27 Jiong Wang <jiong.wang@arm.com>
1581 PR target/63442
1582 * optabs.c (prepare_cmp_insn): Use "ret_mode" instead of "word_mode".
1584 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1586 Backport from trunk r216630.
1587 2014-10-24 Felix Yang <felix.yang@huawei.com>
1588 Jiji Jiang <jiangjiji@huawei.com>
1590 PR target/63173
1591 * config/aarch64/arm_neon.h (__LD2R_FUNC): Remove macro.
1592 (__LD3R_FUNC): Ditto.
1593 (__LD4R_FUNC): Ditto.
1594 (vld2_dup_s8, vld2_dup_s16, vld2_dup_s32, vld2_dup_f32, vld2_dup_f64,
1595 vld2_dup_u8, vld2_dup_u16, vld2_dup_u32, vld2_dup_p8, vld2_dup_p16
1596 vld2_dup_s64, vld2_dup_u64, vld2q_dup_s8, vld2q_dup_p8,
1597 vld2q_dup_s16, vld2q_dup_p16, vld2q_dup_s32, vld2q_dup_s64,
1598 vld2q_dup_u8, vld2q_dup_u16, vld2q_dup_u32, vld2q_dup_u64
1599 vld2q_dup_f32, vld2q_dup_f64): Rewrite using builtin functions.
1600 (vld3_dup_s64, vld3_dup_u64, vld3_dup_f64, vld3_dup_s8
1601 vld3_dup_p8, vld3_dup_s16, vld3_dup_p16, vld3_dup_s32
1602 vld3_dup_u8, vld3_dup_u16, vld3_dup_u32, vld3_dup_f32
1603 vld3q_dup_s8, vld3q_dup_p8, vld3q_dup_s16, vld3q_dup_p16
1604 vld3q_dup_s32, vld3q_dup_s64, vld3q_dup_u8, vld3q_dup_u16
1605 vld3q_dup_u32, vld3q_dup_u64, vld3q_dup_f32, vld3q_dup_f64): Likewise.
1606 (vld4_dup_s64, vld4_dup_u64, vld4_dup_f64, vld4_dup_s8
1607 vld4_dup_p8, vld4_dup_s16, vld4_dup_p16, vld4_dup_s32
1608 vld4_dup_u8, vld4_dup_u16, vld4_dup_u32, vld4_dup_f32
1609 vld4q_dup_s8, vld4q_dup_p8, vld4q_dup_s16, vld4q_dup_p16
1610 vld4q_dup_s32, vld4q_dup_s64, vld4q_dup_u8, vld4q_dup_u16
1611 vld4q_dup_u32, vld4q_dup_u64, vld4q_dup_f32, vld4q_dup_f64): Likewise.
1612 * config/aarch64/aarch64.md (define_c_enum "unspec"): Add
1613 UNSPEC_LD2_DUP, UNSPEC_LD3_DUP, UNSPEC_LD4_DUP.
1614 * config/aarch64/aarch64-simd-builtins.def (ld2r, ld3r, ld4r): New
1615 builtins.
1616 * config/aarch64/aarch64-simd.md (aarch64_simd_ld2r<mode>): New pattern.
1617 (aarch64_simd_ld3r<mode>): Likewise.
1618 (aarch64_simd_ld4r<mode>): Likewise.
1619 (aarch64_ld2r<mode>): New expand.
1620 (aarch64_ld3r<mode>): Likewise.
1621 (aarch64_ld4r<mode>): Likewise.
1623 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1625 Backport from trunk r217971.
1626 2014-11-22 Uros Bizjak <ubizjak@gmail.com>
1628 * params.def (PARAM_MAX_COMPLETELY_PEELED_INSNS): Increase to 200.
1629 * config/i386/i386.c (ix86_option_override_internal): Do not increase
1630 PARAM_MAX_COMPLETELY_PEELED_INSNS.
1632 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1634 Backport from trunk r216524.
1635 2014-10-21 Andrew Pinski <apinski@cavium.com>
1637 * doc/invoke.texi (AARCH64/mtune): Document thunderx as an
1638 available option also.
1639 * config/aarch64/aarch64-cost-tables.h: New file.
1640 * config/aarch64/aarch64-cores.def (thunderx): New core.
1641 * config/aarch64/aarch64-tune.md: Regenerate.
1642 * config/aarch64/aarch64.c: Include aarch64-cost-tables.h instead
1643 of config/arm/aarch-cost-tables.h.
1644 (thunderx_regmove_cost): New variable.
1645 (thunderx_tunings): New variable.
1647 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1649 Backport from trunk r216336.
1650 2014-10-16 Richard Earnshaw <rearnsha@arm.com>
1652 * config/aarch64/aarch64.c (aarch64_legitimize_address): New function.
1653 (TARGET_LEGITIMIZE_ADDRESS): Redefine.
1655 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1657 Backport from trunk r216253.
1658 2014-10-15 Renlin Li <renlin.li@arm.com>
1660 * config/aarch64/aarch64.h (ARM_DEFAULT_PCS, arm_pcs_variant): Delete.
1662 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1664 Backport from trunk r215711.
1665 2014-09-30 Terry Guo <terry.guo@arm.com>
1667 * config/arm/arm-cores.def (cortex-m7): New core name.
1668 * config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
1669 (fpv5-d16): Ditto.
1670 * config/arm/arm-tables.opt: Regenerated.
1671 * config/arm/arm-tune.md: Regenerated.
1672 * config/arm/arm.h (TARGET_VFP5): New macro.
1673 * config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
1674 * config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
1675 smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
1676 * doc/invoke.texi: Document new cpu and fpu names.
1678 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1680 Backport from trunk r215707, r215842.
1681 2014-10-03 David Sherwood <david.sherwood@arm.com>
1683 * ira-int.h (ira_allocno): Mark hard_regno as signed.
1685 2014-09-30 David Sherwood <david.sherwood@arm.com>
1687 * ira-int.h (ira_allocno): Add "wmode" field.
1688 * ira-build.c (create_insn_allocnos): Add new "parent" function
1689 parameter.
1690 * ira-conflicts.c (ira_build_conflicts): Add conflicts for registers
1691 that cannot be accessed in wmode.
1693 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1695 Backport from trunk r215540.
1696 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
1698 PR rtl-optimization/63210
1699 * ira-color.c (assign_hard_reg): Ignore conflict cost if the
1700 HARD_REGNO is not available for CONFLICT_A.
1702 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1704 Backport from trunk r215046.
1705 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1707 PR target/61749
1708 * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
1709 Use qualifier_immediate for last operand. Rename to...
1710 (aarch64_types_ternop_lane_qualifiers): ... This.
1711 (TYPES_QUADOP): Rename to...
1712 (TYPES_TERNOP_LANE): ... This.
1713 (aarch64_simd_expand_args): Return const0_rtx when encountering user
1714 error. Change return of 0 to return of NULL_RTX.
1715 (aarch64_crc32_expand_builtin): Likewise.
1716 (aarch64_expand_builtin): Return NULL_RTX instead of 0.
1717 ICE when expanding unknown builtin.
1718 * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
1719 TERNOP_LANE qualifiers.
1720 (sqdmlsl_lane): Likewise.
1721 (sqdmlal_laneq): Likewise.
1722 (sqdmlsl_laneq): Likewise.
1723 (sqdmlal2_lane): Likewise.
1724 (sqdmlsl2_lane): Likewise.
1725 (sqdmlal2_laneq): Likewise.
1726 (sqdmlsl2_laneq): Likewise.
1728 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1730 Backport from trunk r215013.
1731 2014-09-08 Joseph Myers <joseph@codesourcery.com>
1733 * defaults.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
1734 Remove.
1735 * doc/tm.texi.in (ROUND_TOWARDS_ZERO, LARGEST_EXPONENT_IS_NORMAL):
1736 Remove.
1737 * doc/tm.texi: Regenerate.
1738 * system.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
1739 Poison.
1740 * config/arm/arm.h (LARGEST_EXPONENT_IS_NORMAL): Remove.
1741 * config/cris/cris.h (__make_dp): Remove.
1743 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1745 Backport from trunk r214952.
1746 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
1748 * config/aarch64/arm_neon.h (__GET_HIGH): New macro.
1749 (vget_high_f32, vget_high_f64, vget_high_p8, vget_high_p16,
1750 vget_high_s8, vget_high_s16, vget_high_s32, vget_high_s64,
1751 vget_high_u8, vget_high_u16, vget_high_u32, vget_high_u64):
1752 Remove temporary __asm__ and reimplement.
1754 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1756 Backport from trunk r214948, r214949.
1757 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
1759 * config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
1760 handling cmge, cmgt, cmeq, cmtst.
1762 * config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
1763 cmlt, cmgeu, cmgtu, cmtst): Remove.
1765 * config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
1766 vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
1767 vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
1768 vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.
1770 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
1772 * config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,
1773 TYPES_TST): Define.
1774 (aarch64_fold_builtin): Update pattern for cmtst.
1776 * config/aarch64/aarch64-protos.h (aarch64_const_vec_all_same_int_p):
1777 Declare.
1779 * config/aarch64/aarch64-simd-builtins.def (cmtst): Update qualifiers.
1781 * config/aarch64/aarch64-simd.md (aarch64_vcond_internal<mode><mode>):
1782 Switch operands, separate out more cases, refactor.
1784 (aarch64_cmtst<mode>): Rewrite pattern to match (plus ... -1).
1786 * config/aarch64.c (aarch64_const_vec_all_same_int_p): Take single
1787 argument; rename old version to...
1788 (aarch64_const_vec_all_same_in_range_p): ...this.
1789 (aarch64_print_operand, aarch64_simd_shift_imm_p): Follow renaming.
1791 * config/aarch64/predicates.md (aarch64_simd_imm_minus_one): Define.
1793 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1795 Backport from trunk r214008.
1796 2014-08-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1798 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Move
1799 one_match > zero_match case to just before simple_sequence.
1801 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1803 Backport from trunk r213382.
1804 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
1806 * config/aarch64/arm_neon.h (vpadd_<suf><8,16,32,64>): Move to
1807 correct alphabetical position.
1808 (vpaddd_f64): Rewrite using builtins.
1809 (vpaddd_s64): Move to correct alphabetical position.
1810 (vpaddd_u64): New.
1812 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1814 Backport from trunk r210735, r215206, r215207, r215208.
1815 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1817 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
1818 for A57.
1819 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
1820 cost to spilling from integer to FP registers.
1822 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1824 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
1825 move handling.
1826 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
1827 are now handled correctly.
1829 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1831 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
1832 handling of CALLER_SAVE_REGS and POINTER_REGS.
1834 2014-05-22 Kugan Vivekanandarajah <kuganv@linaro.org>
1836 * config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
1837 to GENERAL_REGS.
1838 (aarch64_secondary_reload) : LikeWise.
1839 (aarch64_class_max_nregs) : Remove CORE_REGS.
1840 * config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
1841 (REG_CLASS_NAMES) : Likewise.
1842 (REG_CLASS_CONTENTS) : LikeWise.
1843 (INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
1845 2014-11-14 Yvan Roux <yvan.roux@linaro.org>
1847 * LINARO-VERSION: Bump version.
1849 2014-11-14 Yvan Roux <yvan.roux@linaro.org>
1851 GCC Linaro 4.9-2014.11 released.
1852 * LINARO-VERSION: Update.
1854 2014-11-14 Yvan Roux <yvan.roux@linaro.org>
1856 Add Linaro release macros (Linaro only patch.)
1858 * Makefile.in (LINAROVER, LINAROVER_C, LINAROVER_S): Define.
1859 (CFLAGS-cppbuiltin.o): Add LINAROVER macro definition.
1860 (cppbuiltin.o): Depend on $(LINAROVER).
1861 * cppbuiltin.c (parse_linarover): New.
1862 (define_GNUC__): Define __LINARO_RELEASE__ and __LINARO_SPIN__ macros.
1864 2014-11-13 Yvan Roux <yvan.roux@linaro.org>
1866 Backport from trunk r216229, r216230.
1867 2014-10-14 Andrew Pinski <apinski@cavium.com>
1869 * explow.c (convert_memory_address_addr_space): Rename to ...
1870 (convert_memory_address_addr_space_1): This. Add in_const argument.
1871 Inside a CONST RTL, permute the conversion and addition of constant
1872 for zero and sign extended pointers.
1873 (convert_memory_address_addr_space): New function.
1875 2014-10-14 Andrew Pinski <apinski@cavium.com>
1877 Revert:
1878 2011-08-19 H.J. Lu <hongjiu.lu@intel.com>
1880 PR middle-end/49721
1881 * explow.c (convert_memory_address_addr_space): Also permute the
1882 conversion and addition of constant for zero-extend.
1884 2014-10-24 Yvan Roux <yvan.roux@linaro.org>
1886 * LINARO-VERSION: Bump version.
1888 2014-10-24 Yvan Roux <yvan.roux@linaro.org>
1890 GCC Linaro 4.9-2014.10-1 released.
1891 * LINARO-VERSION: Update.
1893 2014-10-17 Yvan Roux <yvan.roux@linaro.org>
1895 * LINARO-VERSION: Bump version.
1897 2014-10-17 Yvan Roux <yvan.roux@linaro.org>
1899 GCC Linaro 4.9-2014.10 released.
1900 * LINARO-VERSION: Update.
1902 2014-10-10 Yvan Roux <yvan.roux@linaro.org>
1904 Revert:
1905 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1907 Backport from trunk r215206, r215207, r215208.
1908 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1910 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
1911 for A57.
1912 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
1913 cost to spilling from integer to FP registers.
1915 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1917 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
1918 move handling.
1919 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
1920 are now handled correctly.
1922 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1924 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
1925 handling of CALLER_SAVE_REGS and POINTER_REGS.
1927 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1929 Backport from trunk r214825, r214826.
1930 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1932 PR target/62275
1933 * config/arm/neon.md
1934 (neon_vcvt<NEON_VCVT:nvrint_variant><su_optab><VCVTF:mode>
1935 <v_cmp_result>): New pattern.
1936 * config/arm/iterators.md (NEON_VCVT): New int iterator.
1937 * config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf,
1938 vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf,
1939 vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions.
1940 * config/arm/arm.c (arm_builtin_vectorized_function): Handle
1941 BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF.
1943 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1945 PR target/62275
1946 * config/arm/iterators.md (FIXUORS): New code iterator.
1947 (VCVT): New int iterator.
1948 (su_optab): New code attribute.
1949 (su): Likewise.
1950 * config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): New pattern.
1952 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1954 Backport from trunk r215471.
1955 2014-09-22 James Greenhalgh <james.greenhalgh@arm.com>
1957 * config/aarch64/geniterators.sh: New.
1958 * config/aarch64/iterators.md (VDQF_DF): New.
1959 * config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h.
1960 * config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove.
1962 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1964 Backport from trunk r215206, r215207, r215208.
1965 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1967 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
1968 for A57.
1969 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
1970 cost to spilling from integer to FP registers.
1972 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1974 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
1975 move handling.
1976 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
1977 are now handled correctly.
1979 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1981 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
1982 handling of CALLER_SAVE_REGS and POINTER_REGS.
1984 2014-10-07 Yvan Roux <yvan.roux@linaro.org>
1986 Backport from trunk r214824.
1987 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1989 * config/aarch64/predicates.md (aarch64_comparison_operation):
1990 New special predicate.
1991 * config/aarch64/aarch64.md (*csinc2<mode>_insn): Use
1992 aarch64_comparison_operation instead of matching an operator.
1993 Update operand numbers.
1994 (csinc3<mode>_insn): Likewise.
1995 (*csinv3<mode>_insn): Likewise.
1996 (*csneg3<mode>_insn): Likewise.
1997 (ffs<mode>2): Update gen_csinc3<mode>_insn callsite.
1998 * config/aarch64/aarch64.c (aarch64_get_condition_code):
1999 Return -1 instead of aborting on invalid condition codes.
2000 (aarch64_print_operand): Update aarch64_get_condition_code callsites
2001 to assert that the returned condition code is valid.
2002 * config/aarch64/aarch64-protos.h (aarch64_get_condition_code): Export.
2004 2014-10-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2006 Backport from trunk r209643, r211881.
2007 2014-06-22 Richard Henderson <rth@redhat.com>
2009 PR target/61565
2010 * compare-elim.c (struct comparison): Add eh_note.
2011 (find_comparison_dom_walker::before_dom_children): Don't eliminate
2012 a redundant comparison in a different EH region. Purge EH edges if
2013 necessary.
2015 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2017 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
2019 2014-10-06 Charles Baylis <charles.baylis@linaro.org>
2021 Backport from trunk r214945.
2022 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
2024 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Replace
2025 varargs with pointer parameter.
2026 (aarch64_simd_expand_builtin): pass pointer into previous.
2028 2014-10-06 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
2030 Backport from trunk r214944.
2031 2014-09-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2033 * config/arm/cortex-a53.md (cortex_a53_alu_shift): Add alu_ext,
2034 alus_ext.
2036 2014-10-06 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2038 Backport from trunk r214943.
2039 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
2041 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): New pattern.
2042 * config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
2043 * config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
2044 Replace temporary asm with call to builtin.
2045 (vrbit_p8, vrbitq_p8): New functions.
2047 2014-10-06 Michael Collison <michael.collison@linaro.org>
2049 Backport from trunk r214886.
2050 2014-09-03 Richard Henderson <rth@redhat.com>
2052 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): Remove.
2053 (aarch64_popwb_pair_reg): Remove.
2054 (aarch64_set_frame_expr): Remove.
2055 (aarch64_restore_callee_saves): Add CFI_OPS argument; fill it with
2056 the restore ops performed by the insns generated.
2057 (aarch64_expand_epilogue): Attach CFI_OPS to the stack deallocation
2058 insn. Perform the calls_eh_return addition later; do not attempt to
2059 preserve the CFA in that case. Don't use aarch64_set_frame_expr.
2060 (aarch64_expand_prologue): Use REG_CFA_ADJUST_CFA directly, or no
2061 special markup at all. Load cfun->machine->frame.hard_fp_offset
2062 into a local variable.
2063 (aarch64_frame_pointer_required): Don't check calls_alloca.
2065 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2067 Backport from trunk r215385.
2068 2014-09-19 James Greenhalgh <james.greenhalgh@arm.com>
2070 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Mark
2071 scratch register as written.
2073 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2075 Backport from trunk r215346.
2076 2014-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2078 * config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
2079 to neon_load1_1reg<q>.
2081 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2083 Backport from trunk r215321.
2084 2014-09-17 Andrew Stubbs <ams@codesourcery.com>
2086 * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
2087 when architecture is older than ARMv7.
2089 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2091 Backport from trunk r215260.
2092 2014-09-14 David Sherwood <david.sherwood@arm.com>
2094 * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.
2096 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2098 Backport from trunk r215205.
2099 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
2101 * gcc/ree.c (combine_reaching_defs): Ensure inserted copy don't change
2102 the number of hard registers.
2104 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2106 Backport from trunk r215136.
2107 2014-09-10 Xinliang David Li <davidxl@google.com>
2109 PR target/63209
2110 * config/arm/arm.md (movcond_addsi): Handle case where source
2111 and target operands are the same.
2113 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2115 Backport from trunk r215086.
2116 2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
2117 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2119 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
2120 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC):
2121 Define.
2122 (ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.
2124 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2126 Backport from trunk r215067.
2127 2014-09-09 Jiong Wang <jiong.wang@arm.com>
2129 * config/arm/arm.c (NEON_COPYSIGNF): New enum.
2130 (arm_init_neon_builtins): Support NEON_COPYSIGNF.
2131 (arm_builtin_vectorized_function): Likewise.
2132 * config/arm/arm_neon_builtins.def: New macro for copysignf.
2133 * config/arm/neon.md (neon_copysignf<mode>): New pattern for vector
2134 copysignf.
2136 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2138 Backport from trunk r215050, r215051, r215052, r215053, r215054,
2139 r215055, r215056.
2140 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2142 * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
2143 mnemonic instead of fldmfdd.
2144 * config/arm/arm.c (vfp_output_fstmd): Rename to...
2145 (vfp_output_vstmd): ... This. Convert output to UAL syntax.
2146 Output vpush when address register is SP.
2147 * config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
2148 (vfp_output_vstmd): ... This.
2149 * config/arm/vfp.md (push_multi_vfp): Update call to
2150 vfp_output_vstmd.
2152 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2154 * config/arm/vfp.md (*movcc_vfp): Use UAL syntax.
2156 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2158 * config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
2159 (*sqrtdf2_vfp): Likewise.
2160 (*cmpsf_vfp): Likewise.
2161 (*cmpsf_trap_vfp): Likewise.
2162 (*cmpdf_vfp): Likewise.
2163 (*cmpdf_trap_vfp): Likewise.
2165 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2167 * config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
2168 (*truncdfsf2_vfp): Likewise.
2169 (*truncsisf2_vfp): Likewise.
2170 (*truncsidf2_vfp): Likewise.
2171 (fixuns_truncsfsi2): Likewise.
2172 (fixuns_truncdfsi2): Likewise.
2173 (*floatsisf2_vfp): Likewise.
2174 (*floatsidf2_vfp): Likewise.
2175 (floatunssisf2): Likewise.
2176 (floatunssidf2): Likewise.
2178 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2180 * config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
2181 (*muldf3_vfp): Likewise.
2182 (*mulsf3negsf_vfp): Likewise.
2183 (*muldf3negdf_vfp): Likewise.
2184 (*mulsf3addsf_vfp): Likewise.
2185 (*muldf3adddf_vfp): Likewise.
2186 (*mulsf3subsf_vfp): Likewise.
2187 (*muldf3subdf_vfp): Likewise.
2188 (*mulsf3negsfaddsf_vfp): Likewise.
2189 (*fmuldf3negdfadddf_vfp): Likewise.
2190 (*mulsf3negsfsubsf_vfp): Likewise.
2191 (*muldf3negdfsubdf_vfp): Likewise.
2193 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2195 * config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
2196 (*absdf2_vfp): Likewise.
2197 (*negsf2_vfp): Likewise.
2198 (*negdf2_vfp): Likewise.
2199 (*addsf3_vfp): Likewise.
2200 (*adddf3_vfp): Likewise.
2201 (*subsf3_vfp): Likewise.
2202 (*subdf3_vfp): Likewise.
2203 (*divsf3_vfp): Likewise.
2204 (*divdf3_vfp): Likewise.
2206 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2208 * config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
2209 multiple.
2210 (arm_print_operand): Don't convert real values to decimal
2211 representation in default case.
2212 (fp_immediate_constant): Delete.
2213 * config/arm/arm-protos.h (fp_immediate_constant): Likewise.
2214 * config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
2215 syntax.
2216 (*thumb2_movsi_vfp): Likewise.
2217 (*movdi_vfp): Likewise.
2218 (*movdi_vfp_cortexa8): Likewise.
2219 (*movhf_vfp_neon): Likewise.
2220 (*movhf_vfp): Likewise.
2221 (*movsf_vfp): Likewise.
2222 (*thumb2_movsf_vfp): Likewise.
2223 (*movdf_vfp): Likewise.
2224 (*thumb2_movdf_vfp): Likewise.
2225 (*movsfcc_vfp): Likewise.
2226 (*thumb2_movsfcc_vfp): Likewise.
2227 (*movdfcc_vfp): Likewise.
2228 (*thumb2_movdfcc_vfp): Likewise.
2230 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2232 Backport from trunk r214959.
2233 2014-09-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2235 * config/arm/cortex-a53.md (cortex_a53_fpalu): Add f_rints, f_rintd,
2236 f_minmaxs, f_minmaxd types.
2238 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2240 Backport from trunk r214947.
2241 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
2243 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
2244 Remove qualifier_const_pointer, update comment.
2246 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2248 Backport from trunk r214940.
2249 2014-09-05 James Greenhalgh <james.greenhalgh@arm.com>
2251 * config/aarch64/aarch64.md (sibcall_value_insn): Give operand 1
2252 DImode.
2254 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2256 Backport from trunk r213090.
2257 2014-07-26 Andrew Pinski <apinski@cavium.com>
2259 * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
2260 from the read only register.
2262 2014-09-11 Yvan Roux <yvan.roux@linaro.org>
2264 * LINARO-VERSION: Bump version.
2266 2014-09-10 Yvan Roux <yvan.roux@linaro.org>
2268 GCC Linaro 4.9-2014.09 released.
2269 * LINARO-VERSION: Update.
2271 2014-09-09 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2273 Backport from trunk r215004.
2274 2014-09-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2276 PR target/63190
2277 * config/aarch64/aarch64.md (stack_protect_test_<mode>) Add register
2278 constraint for operand0 and remove write only modifier from operand3.
2280 2014-09-09 Michael Collison <michael.collison@linaro.org>
2282 Backport from trunk r212178
2283 2014-06-30 Joseph Myers <joseph@codesourcery.com>
2285 * var-tracking.c (add_stores): Return instead of asserting if old
2286 and new values for conditional store are the same.
2288 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2290 Revert:
2291 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2293 Backport from trunk r213712.
2294 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2296 * config/aarch64/aarch64.md (absdi2): Set simd attribute.
2297 (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
2298 (aarch64_movdi_<mode>high): Likewise.
2299 (aarch64_mov<mode>high_di): Likewise.
2300 (aarch64_movdi_<mode>low): Likewise.
2301 (aarch64_mov<mode>low_di): Likewise.
2302 (aarch64_movtilow_tilow): Likewise.
2303 Add comment explaining usage of fp,simd attributes and of
2304 TARGET_FLOAT and TARGET_SIMD.
2306 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2308 Backport from trunk r213712.
2309 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2311 * config/aarch64/aarch64.md (absdi2): Set simd attribute.
2312 (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
2313 (aarch64_movdi_<mode>high): Likewise.
2314 (aarch64_mov<mode>high_di): Likewise.
2315 (aarch64_movdi_<mode>low): Likewise.
2316 (aarch64_mov<mode>low_di): Likewise.
2317 (aarch64_movtilow_tilow): Likewise.
2318 Add comment explaining usage of fp,simd attributes and of
2319 TARGET_FLOAT and TARGET_SIMD.
2321 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2323 Backport from trunk r214526.
2324 2014-08-26 Joseph Myers <joseph@codesourcery.com>
2326 PR target/60606
2327 PR target/61330
2328 * varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
2329 DECL_HARD_REGISTER and return for invalid register specifications.
2330 * cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
2331 DECL_HARD_REGISTER, call expand_one_error_var.
2332 * config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
2333 CC_REGNUM with non-MODE_CC modes.
2334 (arm_regno_class): Return NO_REGS for PC_REGNUM.
2336 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2338 Backport from trunk r214503.
2339 2014-08-26 Evandro Menezes <e.menezes@samsung.com>
2341 * config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
2342 qi cost; add di cost.
2343 (cortexa57_addrcost_table): Likewise.
2345 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2347 Backport from trunk r213659.
2348 2014-08-06 Alan Lawrence <alan.lawrence@arm.com>
2350 * config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
2351 (aarch64_expand_vec_perm_const): Check for dup before zip.
2353 2014-09-02 Yvan Roux <yvan.roux@linaro.org>
2355 Backport from trunk r213651.
2356 2014-08-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2358 * config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and
2359 CONST_INT_P instead of GET_CODE and compare.
2360 (aarch64_select_cc_mode): Likewise.
2361 (aarch64_print_operand): Likewise.
2362 (aarch64_rtx_costs): Likewise.
2363 (aarch64_simd_valid_immediate): Likewise.
2364 (aarch64_simd_check_vect_par_cnst_half): Likewise.
2365 (aarch64_simd_emit_pair_result_insn): Likewise.
2367 2014-08-29 Yvan Roux <yvan.roux@linaro.org>
2369 Backport from trunk r212978.
2370 2014-07-24 Andreas Schwab <schwab@suse.de>
2372 * lib/target-supports.exp (check_effective_target_arm_nothumb):
2373 Also check for __arm__.
2375 2014-08-29 Christophe Lyon <christophe.lyon@linaro.org>
2377 Fix backport from trunk 211440:
2378 * config.gcc (aarch64*-*-*): Restore need_64bit_hwint=yes.
2380 This is necessary to build aarch64* compilers on i686 host.
2382 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2384 Backport from trunk r213627.
2385 2014-08-05 James Greenhalgh <james.greenhalgh@arm.com>
2387 * config/aarch64/aarch64-builtins.c
2388 (aarch64_simd_builtin_type_mode): Delete.
2389 (v8qi_UP): Remap to V8QImode.
2390 (v4hi_UP): Remap to V4HImode.
2391 (v2si_UP): Remap to V2SImode.
2392 (v2sf_UP): Remap to V2SFmode.
2393 (v1df_UP): Remap to V1DFmode.
2394 (di_UP): Remap to DImode.
2395 (df_UP): Remap to DFmode.
2396 (v16qi_UP):V16QImode.
2397 (v8hi_UP): Remap to V8HImode.
2398 (v4si_UP): Remap to V4SImode.
2399 (v4sf_UP): Remap to V4SFmode.
2400 (v2di_UP): Remap to V2DImode.
2401 (v2df_UP): Remap to V2DFmode.
2402 (ti_UP): Remap to TImode.
2403 (ei_UP): Remap to EImode.
2404 (oi_UP): Remap to OImode.
2405 (ci_UP): Map to CImode.
2406 (xi_UP): Remap to XImode.
2407 (si_UP): Remap to SImode.
2408 (sf_UP): Remap to SFmode.
2409 (hi_UP): Remap to HImode.
2410 (qi_UP): Remap to QImode.
2411 (aarch64_simd_builtin_datum): Make mode a machine_mode.
2412 (VAR1): Build builtin name.
2413 (aarch64_init_simd_builtins): Remove dead code.
2415 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2417 Backport from trunk r213713.
2418 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2420 * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
2421 * config/arm/types.md (f_sels, f_seld): Delete.
2423 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2425 Backport from trunk r213711.
2426 2014-08-07 Ian Bolton <ian.bolton@arm.com>
2427 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2429 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
2430 Use MOVN when one of the half-words is 0xffff.
2432 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2434 Backport from trunk r213632.
2435 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2437 * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
2438 to reservation.
2439 * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
2441 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2443 Backport from trunk r213630.
2444 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2446 * config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
2447 (rbitsi2): Likewise.
2448 (*arm_rev): Set predicable and predicable_short_it attributes.
2450 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2452 Backport from trunk r213557.
2453 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2454 James Greenhalgh <james.greenhalgh@arm.com>
2456 * doc/md.texi (clrsb): Document.
2457 (clz): Change reference to x into operand 1.
2458 (ctz): Likewise.
2459 (popcount): Likewise.
2461 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2463 Backport from trunk r213551, r213556.
2464 2014-08-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2465 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2467 * sched-deps.c (try_group_insn): Generalise macro fusion hook usage
2468 to any two insns. Update comment. Rename to sched_macro_fuse_insns.
2469 (sched_analyze_insn): Update use of try_group_insn to
2470 sched_macro_fuse_insns.
2471 * config/i386/i386.c (ix86_macro_fusion_pair_p): Reject 2nd
2472 arguments that are not conditional jumps.
2474 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2476 Backport from trunk r213490.
2477 2014-08-01 Alan Lawrence <alan.lawrence@arm.com>
2479 * config/aarch64/aarch64-simd-builtins.def (dup_lane, get_lane): Delete.
2481 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2483 Backport from trunk r213488.
2484 2014-08-01 Jiong Wang <jiong.wang@arm.com>
2486 * config/aarch64/aarch64.c (aarch64_classify_address): Accept all offset
2487 for frame access when strict_p is false.
2489 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2491 Backport from trunk r213485, r213486, r213487.
2492 2014-08-01 Renlin Li <renlin.li@arm.com>
2493 Jiong Wang <jiong.wang@arm.com>
2495 * config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
2496 aarch64_offset_7bit_signed_scaled_p, remove static and use it.
2497 * config/aarch64/aarch64-protos.h (aarch64_offset_7bit_signed_scaled_p):
2498 Declaration.
2499 * config/aarch64/predicates.md (aarch64_mem_pair_offset): Define new
2500 predicate.
2501 * config/aarch64/aarch64.md (loadwb_pair, storewb_pair): Use
2502 aarch64_mem_pair_offset.
2504 2014-08-01 Jiong Wang <jiong.wang@arm.com>
2506 * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Fix
2507 offset.
2508 (loadwb_pair<GPI:mode>_<P:mode>): Likewise.
2509 * config/aarch64/aarch64.c (aarch64_gen_loadwb_pair): Likewise.
2511 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2513 Backport from trunk r213379.
2514 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
2516 * config/aarch64/aarch64-builtins.c
2517 (aarch64_gimple_fold_builtin): Don't fold reduction operations for
2518 BYTES_BIG_ENDIAN.
2520 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2522 Backport from trunk r213378.
2523 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
2525 * config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
2526 the generated mask based on BYTES_BIG_ENDIAN.
2527 (aarch64_simd_check_vect_par_cnst_half): New.
2528 * config/aarch64/aarch64-protos.h
2529 (aarch64_simd_check_vect_par_cnst_half): New.
2530 * config/aarch64/predicates.md (vect_par_cnst_hi_half): Refactor
2531 the check out to aarch64_simd_check_vect_par_cnst_half.
2532 (vect_par_cnst_lo_half): Likewise.
2533 * config/aarch64/aarch64-simd.md
2534 (aarch64_simd_move_hi_quad_<mode>): Always use vec_par_cnst_lo_half.
2535 (move_hi_quad_<mode>): Always generate a low mask.
2537 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
2539 Backport from trunk r212927, r213304.
2540 2014-07-30 Jiong Wang <jiong.wang@arm.com>
2542 * config/arm/arm.c (arm_get_frame_offsets): Adjust condition for
2543 Thumb2.
2545 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2547 * config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
2548 callee-saved registers are available for padding purpose
2549 and r3 is not mandatory, then prefer use those callee-saved
2550 instead of r3.
2552 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
2554 Backport from trunk r211717, r213692.
2555 2014-08-07 Kugan Vivekanandarajah <kuganv@linaro.org>
2557 * config/arm/arm.c (bdesc_2arg): Fix typo.
2558 (arm_atomic_assign_expand_fenv): Remove The default implementation.
2560 2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org>
2562 * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
2563 default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
2564 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
2565 __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
2566 * config/arm/vfp.md (set_fpscr): Make pattern conditional on
2567 TARGET_HARD_FLOAT.
2568 (get_fpscr) : Likewise.
2570 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
2572 Backport from trunk r212989, r213628.
2573 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2575 * convert.c (convert_to_integer): Guard transformation to lrint by
2576 -fno-math-errno.
2578 2014-07-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2580 PR middle-end/61876
2581 * convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
2582 when flag_errno_math is on.
2584 2014-08-15 Yvan Roux <yvan.roux@linaro.org>
2586 * LINARO-VERSION: Bump version.
2588 2014-08-14 Yvan Roux <yvan.roux@linaro.org>
2590 GCC Linaro 4.9-2014.08 released.
2591 * LINARO-VERSION: Update.
2593 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2595 Backport from trunk r212912, r212913.
2596 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2598 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
2599 (case UNSPEC): Handle UNSPEC_RBIT.
2601 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2603 * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
2604 (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
2606 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2608 Backport from trunk r213555.
2609 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2611 PR target/61713
2612 * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
2613 move to subtarget in serial version if result is ignored.
2615 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2617 Backport from trunk r213376.
2618 2014-07-31 Charles Baylis <charles.baylis@linaro.org>
2620 PR target/61948
2621 * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
2622 constraints are satisfied.
2623 (<shift>di3_neon): Likewise.
2625 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2627 Backport from trunk r211270, r211271, r211273, r211275, r212943,
2628 r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
2629 r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
2630 r213000.
2631 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2633 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
2634 (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
2636 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2638 * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
2639 (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
2641 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2643 * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
2644 (aarch64_save_callee_saves): New parameter "skip_wb".
2645 (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
2647 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2649 * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
2650 "wb_candidate2".
2651 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
2653 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2655 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
2656 subtract outgoing area size when restoring stack_pointer_rtx.
2658 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2660 * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
2661 (aarch64_gen_loadwb_pair): New helper function.
2662 (aarch64_expand_epilogue): Simplify code using new helper functions.
2663 * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
2665 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2667 * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
2668 (aarch64_gen_storewb_pair): New helper function.
2669 (aarch64_expand_prologue): Simplify code using new helper functions.
2670 * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
2672 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2674 * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
2675 Rename to aarch64_save_callee_saves, remove restore code.
2676 (aarch64_restore_callee_saves): New function.
2678 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2680 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
2681 (aarch64_save_callee_saves): New function to handle reg save
2682 for both core and vectore regs.
2684 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2686 * config/aarch64/aarch64.c (aarch64_gen_load_pair)
2687 (aarch64_gen_store_pair): New helper function.
2688 (aarch64_save_or_restore_callee_save_registers)
2689 (aarch64_save_or_restore_fprs): Use new helper functions.
2691 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2693 * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
2694 (aarch64_save_or_restore_callee_save_registers)
2695 (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
2697 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2699 * config/aarch64/aarch64.c
2700 (aarch64_save_or_restore_callee_save_registers)
2701 (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
2703 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2705 * config/aarch64/aarch64.c
2706 (aarch64_save_or_restore_callee_save_registers)
2707 (aarch64_save_or_restore_fprs): Remove 'increment'.
2709 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2711 * config/aarch64/aarch64.c
2712 (aarch64_save_or_restore_callee_save_registers)
2713 (aarch64_save_or_restore_fprs): Use register offset in
2714 cfun->machine->frame.reg_offset.
2716 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2718 * config/aarch64/aarch64.c
2719 (aarch64_save_or_restore_callee_save_registers)
2720 (aarch64_save_or_restore_fprs): Remove base_rtx.
2722 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2724 * config/aarch64/aarch64.c
2725 (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
2726 to 'start_offset'. Remove local variable 'start_offset'.
2728 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2730 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
2731 type to HOST_WIDE_INT.
2733 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2735 * config/aarch64/aarch64.c (aarch64_expand_prologue)
2736 (aarch64_save_or_restore_fprs)
2737 (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
2739 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2741 * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
2742 frame_size.
2743 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
2744 aarch64_frame hard_fp_offset and frame_size.
2745 (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
2746 frame_size; remove original_frame_size.
2747 (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
2748 (aarch64_initial_elimination_offset): Remove frame_size and
2749 offset. Use aarch64_frame frame_size.
2751 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2752 Jiong Wang <jiong.wang@arm.com>
2754 * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
2755 initialization of R30 offset. Update offset. Iterate core
2756 regisers upto X30. Remove X29, X30 specific code.
2758 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2759 Jiong Wang <jiong.wang@arm.com>
2761 * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
2762 (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
2763 (aarch64_register_saved_on_entry): Adjust test.
2765 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2767 * config/aarch64/aarch64.h (machine_function): Move
2768 saved_varargs_size from here...
2769 (aarch64_frameGTY): ... to here.
2771 * config/aarch64/aarch64.c (aarch64_expand_prologue)
2772 (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
2773 (aarch64_initial_elimination_offset)
2774 (aarch64_setup_incoming_varargs): Adjust location of
2775 saved_varargs_size.
2777 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2779 Backport from trunk r212753.
2780 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2782 * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
2783 (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
2785 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2787 Backport from trunk r212752.
2788 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2790 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
2791 (vmlal_high_lane_s32): Likewise.
2792 (vmlal_high_lane_u16): Likewise.
2793 (vmlal_high_lane_u32): Likewise.
2794 (vmlsl_high_lane_s16): Likewise.
2795 (vmlsl_high_lane_s32): Likewise.
2796 (vmlsl_high_lane_u16): Likewise.
2797 (vmlsl_high_lane_u32): Likewise.
2799 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2801 Backport from trunk r212512.
2802 2014-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2804 * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
2805 * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
2806 * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
2807 * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
2808 * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
2809 * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
2810 * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
2812 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2814 Backport from trunk r212358.
2815 2014-07-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2817 * config/arm/arm.c (cortexa5_extra_costs): New table.
2818 (arm_cortex_a5_tune): Use cortexa5_extra_costs.
2820 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2822 Backport from trunk r212296.
2823 2014-07-04 Tom de Vries <tom@codesourcery.com>
2825 * config/aarch64/aarch64-simd.md
2826 (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
2828 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
2830 Backport from trunk r212142, r212225.
2831 2014-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2833 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
2834 variable i.
2836 2014-06-30 Alan Lawrence <alan.lawrence@arm.com>
2838 * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
2839 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
2840 against bigendian and adjust indices.
2842 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
2844 Backport from trunk r211779.
2845 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2847 * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
2849 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
2851 Backport from trunk r211503.
2852 2014-06-12 Alan Lawrence <alan.lawrence@arm.com>
2854 * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
2855 vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
2856 vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
2857 vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
2858 vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
2859 vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
2860 vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
2861 not in the spec.
2863 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
2865 Backport from trunk r211140.
2866 2014-06-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
2868 * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
2870 2014-07-29 Yvan Roux <yvan.roux@linaro.org>
2872 * LINARO-VERSION: Bump version.
2874 2014-07-24 Yvan Roux <yvan.roux@linaro.org>
2876 GCC Linaro 4.9-2014.07-1 released.
2877 * LINARO-VERSION: Update.
2879 2014-07-20 Yvan Roux <yvan.roux@linaro.org>
2881 Revert:
2882 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
2884 Backport from trunk r211129.
2885 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2887 PR target/61154
2888 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
2889 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
2890 with immediate_operand.
2892 2014-07-19 Yvan Roux <yvan.roux@linaro.org>
2894 * LINARO-VERSION: Bump version.
2896 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2898 GCC Linaro 4.9-2014.07 released.
2899 * LINARO-VERSION: Update.
2901 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2903 Backport from trunk r211887, r211899.
2904 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
2906 * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
2907 "yes" where needed.
2909 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
2911 * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
2912 vector registers.
2914 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2916 Backport from trunk r211440.
2917 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2919 * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
2920 * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
2921 dependencies.
2922 * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
2923 (aarch64_crc_builtin_datum): New struct.
2924 (aarch64_crc_builtin_data): New.
2925 (aarch64_init_crc32_builtins): New function.
2926 (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
2927 (aarch64_crc32_expand_builtin): New.
2928 (aarch64_expand_builtin): Add CRC32 builtin expansion case.
2929 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
2930 __ARM_FEATURE_CRC32 when appropriate.
2931 (TARGET_CRC32): Define.
2932 * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
2933 UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
2934 UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
2935 (aarch64_<crc_variant>): New pattern.
2936 * config/aarch64/arm_acle.h: New file.
2937 * config/aarch64/iterators.md (CRC): New int iterator.
2938 (crc_variant, crc_mode): New int attributes.
2939 * doc/aarch64-acle-intrinsics.texi: New file.
2940 * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
2941 Include aarch64-acle-intrinsics.texi.
2943 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2945 Backport from trunk r211174.
2946 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
2948 * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
2949 New pattern.
2950 * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
2951 (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
2952 * config/aarch64/iterators.md (REVERSE): New iterator.
2953 (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
2954 (rev_op): New int_attribute.
2955 * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
2956 vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
2957 vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
2958 vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
2959 vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
2960 vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
2961 vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
2962 Replace temporary __asm__ with __builtin_shuffle.
2964 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2966 Backport from trunk r210216, r210218, r210219.
2967 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2969 * config/arm/arm_neon.h: Update comment.
2970 * config/arm/neon-docgen.ml: Delete.
2971 * config/arm/neon-gen.ml: Delete.
2972 * doc/arm-neon-intrinsics.texi: Update comment.
2974 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2976 * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
2977 and v4sf versions.
2978 (vand, vorr, veor, vorn, vbic): Remove.
2979 * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
2980 iterator.
2981 (neon_vsub_unspec): Likewise.
2982 (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
2984 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2986 * config/arm/arm_neon.h (vadd_s8): GNU C implementation
2987 (vadd_s16): Likewise.
2988 (vadd_s32): Likewise.
2989 (vadd_f32): Likewise.
2990 (vadd_u8): Likewise.
2991 (vadd_u16): Likewise.
2992 (vadd_u32): Likewise.
2993 (vadd_s64): Likewise.
2994 (vadd_u64): Likewise.
2995 (vaddq_s8): Likewise.
2996 (vaddq_s16): Likewise.
2997 (vaddq_s32): Likewise.
2998 (vaddq_s64): Likewise.
2999 (vaddq_f32): Likewise.
3000 (vaddq_u8): Likewise.
3001 (vaddq_u16): Likewise.
3002 (vaddq_u32): Likewise.
3003 (vaddq_u64): Likewise.
3004 (vmul_s8): Likewise.
3005 (vmul_s16): Likewise.
3006 (vmul_s32): Likewise.
3007 (vmul_f32): Likewise.
3008 (vmul_u8): Likewise.
3009 (vmul_u16): Likewise.
3010 (vmul_u32): Likewise.
3011 (vmul_p8): Likewise.
3012 (vmulq_s8): Likewise.
3013 (vmulq_s16): Likewise.
3014 (vmulq_s32): Likewise.
3015 (vmulq_f32): Likewise.
3016 (vmulq_u8): Likewise.
3017 (vmulq_u16): Likewise.
3018 (vmulq_u32): Likewise.
3019 (vsub_s8): Likewise.
3020 (vsub_s16): Likewise.
3021 (vsub_s32): Likewise.
3022 (vsub_f32): Likewise.
3023 (vsub_u8): Likewise.
3024 (vsub_u16): Likewise.
3025 (vsub_u32): Likewise.
3026 (vsub_s64): Likewise.
3027 (vsub_u64): Likewise.
3028 (vsubq_s8): Likewise.
3029 (vsubq_s16): Likewise.
3030 (vsubq_s32): Likewise.
3031 (vsubq_s64): Likewise.
3032 (vsubq_f32): Likewise.
3033 (vsubq_u8): Likewise.
3034 (vsubq_u16): Likewise.
3035 (vsubq_u32): Likewise.
3036 (vsubq_u64): Likewise.
3037 (vand_s8): Likewise.
3038 (vand_s16): Likewise.
3039 (vand_s32): Likewise.
3040 (vand_u8): Likewise.
3041 (vand_u16): Likewise.
3042 (vand_u32): Likewise.
3043 (vand_s64): Likewise.
3044 (vand_u64): Likewise.
3045 (vandq_s8): Likewise.
3046 (vandq_s16): Likewise.
3047 (vandq_s32): Likewise.
3048 (vandq_s64): Likewise.
3049 (vandq_u8): Likewise.
3050 (vandq_u16): Likewise.
3051 (vandq_u32): Likewise.
3052 (vandq_u64): Likewise.
3053 (vorr_s8): Likewise.
3054 (vorr_s16): Likewise.
3055 (vorr_s32): Likewise.
3056 (vorr_u8): Likewise.
3057 (vorr_u16): Likewise.
3058 (vorr_u32): Likewise.
3059 (vorr_s64): Likewise.
3060 (vorr_u64): Likewise.
3061 (vorrq_s8): Likewise.
3062 (vorrq_s16): Likewise.
3063 (vorrq_s32): Likewise.
3064 (vorrq_s64): Likewise.
3065 (vorrq_u8): Likewise.
3066 (vorrq_u16): Likewise.
3067 (vorrq_u32): Likewise.
3068 (vorrq_u64): Likewise.
3069 (veor_s8): Likewise.
3070 (veor_s16): Likewise.
3071 (veor_s32): Likewise.
3072 (veor_u8): Likewise.
3073 (veor_u16): Likewise.
3074 (veor_u32): Likewise.
3075 (veor_s64): Likewise.
3076 (veor_u64): Likewise.
3077 (veorq_s8): Likewise.
3078 (veorq_s16): Likewise.
3079 (veorq_s32): Likewise.
3080 (veorq_s64): Likewise.
3081 (veorq_u8): Likewise.
3082 (veorq_u16): Likewise.
3083 (veorq_u32): Likewise.
3084 (veorq_u64): Likewise.
3085 (vbic_s8): Likewise.
3086 (vbic_s16): Likewise.
3087 (vbic_s32): Likewise.
3088 (vbic_u8): Likewise.
3089 (vbic_u16): Likewise.
3090 (vbic_u32): Likewise.
3091 (vbic_s64): Likewise.
3092 (vbic_u64): Likewise.
3093 (vbicq_s8): Likewise.
3094 (vbicq_s16): Likewise.
3095 (vbicq_s32): Likewise.
3096 (vbicq_s64): Likewise.
3097 (vbicq_u8): Likewise.
3098 (vbicq_u16): Likewise.
3099 (vbicq_u32): Likewise.
3100 (vbicq_u64): Likewise.
3101 (vorn_s8): Likewise.
3102 (vorn_s16): Likewise.
3103 (vorn_s32): Likewise.
3104 (vorn_u8): Likewise.
3105 (vorn_u16): Likewise.
3106 (vorn_u32): Likewise.
3107 (vorn_s64): Likewise.
3108 (vorn_u64): Likewise.
3109 (vornq_s8): Likewise.
3110 (vornq_s16): Likewise.
3111 (vornq_s32): Likewise.
3112 (vornq_s64): Likewise.
3113 (vornq_u8): Likewise.
3114 (vornq_u16): Likewise.
3115 (vornq_u32): Likewise.
3116 (vornq_u64): Likewise.
3118 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3120 Backport from trunk r210151.
3121 2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
3123 * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
3124 vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
3125 vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
3126 vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
3127 vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
3128 vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
3129 vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
3130 vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
3132 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3134 Backport from trunk r209794.
3135 2014-04-25 Marek Polacek <polacek@redhat.com>
3137 PR c/60114
3138 * c-parser.c (c_parser_initelt): Pass input_location to
3139 process_init_element.
3140 (c_parser_initval): Pass loc to process_init_element.
3141 * c-tree.h (process_init_element): Adjust declaration.
3142 * c-typeck.c (push_init_level): Pass input_location to
3143 process_init_element.
3144 (pop_init_level): Likewise.
3145 (set_designator): Likewise.
3146 (output_init_element): Add location_t parameter. Pass loc to
3147 digest_init.
3148 (output_pending_init_elements): Pass input_location to
3149 output_init_element.
3150 (process_init_element): Add location_t parameter. Pass loc to
3151 output_init_element.
3153 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3155 Backport from trunk r211771.
3156 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3158 * genattrtab.c (n_bypassed): New variable.
3159 (process_bypasses): Initialise n_bypassed.
3160 Count number of bypassed reservations.
3161 (make_automaton_attrs): Allocate space for bypassed reservations
3162 rather than number of bypasses.
3164 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3166 Backport from trunk r210861.
3167 2014-05-23 Jiong Wang <jiong.wang@arm.com>
3169 * config/aarch64/predicates.md (aarch64_call_insn_operand): New
3170 predicate.
3171 * config/aarch64/constraints.md ("Ucs", "Usf"): New constraints.
3172 * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
3173 Adjust for tailcalling through registers.
3174 * config/aarch64/aarch64.h (enum reg_class): New caller save
3175 register class.
3176 (REG_CLASS_NAMES): Likewise.
3177 (REG_CLASS_CONTENTS): Likewise.
3178 * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
3179 Allow tailcalling without decls.
3181 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3183 Backport from trunk r211314.
3184 2014-06-06 James Greenhalgh <james.greenhalgh@arm.com>
3186 * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
3187 * config/aarch64/aarch64.c (aarch64_move_pointer): New.
3188 (aarch64_progress_pointer): Likewise.
3189 (aarch64_copy_one_part_and_move_pointers): Likewise.
3190 (aarch64_expand_movmen): Likewise.
3191 * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
3192 * config/aarch64/aarch64.md (movmem<mode>): New.
3194 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3196 Backport from trunk r211185, 211186.
3197 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
3199 * gcc/config/aarch64/aarch64-builtins.c
3200 (aarch64_types_binop_uus_qualifiers,
3201 aarch64_types_shift_to_unsigned_qualifiers,
3202 aarch64_types_unsigned_shiftacc_qualifiers): Define.
3203 * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
3204 uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
3205 sqshlu_n, uqshl_n): Update qualifiers.
3206 * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
3207 vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
3208 vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
3209 vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
3210 vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
3211 vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
3212 vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
3213 vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
3214 vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
3215 vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
3216 vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
3217 vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
3218 vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
3219 vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
3220 vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
3221 vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
3222 vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
3223 vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
3224 vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
3225 vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
3226 vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
3227 vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
3228 vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
3229 vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
3230 vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
3231 vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
3232 vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
3234 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
3236 * gcc/config/aarch64/aarch64-builtins.c
3237 (aarch64_types_binop_ssu_qualifiers): New static data.
3238 (TYPES_BINOP_SSU): Define.
3239 * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
3240 urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
3241 * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
3242 vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
3243 vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
3244 vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
3245 vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32, 52
3246 vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64, 53
3247 vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
3248 suffix to builtin function name, remove cast. 55
3249 (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
3250 vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8, 57
3251 vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
3253 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3255 Backport from trunk r211408, 211416.
3256 2014-06-10 Marcus Shawcroft <marcus.shawcroft@arm.com>
3258 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
3259 REG_CFA_RESTORE mode.
3261 2014-06-10 Jiong Wang <jiong.wang@arm.com>
3263 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
3264 (aarch64_save_or_restore_callee_save_registers): Fix layout.
3266 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3268 Backport from trunk r211418.
3269 2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3271 * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
3272 Change second alternative type to f_mcr.
3273 * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
3274 and 12th alternatives' types to f_mcr and f_mrc.
3275 (*movdi_aarch64): Same for 12th and 13th alternatives.
3276 (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
3277 (aarch64_movtilow_tilow): Change type to fmov.
3279 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3281 Backport from trunk r211371.
3282 2014-06-09 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3284 * config/arm/arm-modes.def: Remove XFmode.
3286 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3288 Backport from trunk r211268.
3289 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
3291 * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
3292 layout comment.
3294 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3296 Backport from trunk r211129.
3297 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3299 PR target/61154
3300 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
3301 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
3302 with immediate_operand.
3304 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3306 Backport from trunk r211073.
3307 2014-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3309 * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
3310 to mov_imm.
3311 * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
3313 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3315 Backport from trunk r211050.
3316 2014-05-29 Richard Earnshaw <rearnsha@arm.com>
3317 Richard Sandiford <rdsandiford@googlemail.com>
3319 * arm/iterators.md (shiftable_ops): New code iterator.
3320 (t2_binop0, arith_shift_insn): New code attributes.
3321 * arm/predicates.md (shift_nomul_operator): New predicate.
3322 * arm/arm.md (insn_enabled): Delete.
3323 (enabled): Remove insn_enabled test.
3324 (*arith_shiftsi): Delete. Replace with ...
3325 (*<arith_shift_insn>_multsi): ... new pattern.
3326 (*<arith_shift_insn>_shiftsi): ... new pattern.
3327 * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
3329 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3331 Backport from trunk r210996.
3332 2014-05-27 Andrew Pinski <apinski@cavium.com>
3334 * config/aarch64/aarch64.md (stack_protect_set_<mode>):
3335 Use <w> for the register in assembly template.
3336 (stack_protect_test): Use the mode of operands[0] for the
3337 result.
3338 (stack_protect_test_<mode>): Use <w> for the register
3339 in assembly template.
3341 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3343 Backport from trunk r210967.
3344 2014-05-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3346 * config/arm/neon.md (neon_bswap<mode>): New pattern.
3347 * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
3348 (arm_init_neon_builtins): Handle NEON_BSWAP.
3349 Define required type nodes.
3350 (arm_expand_neon_builtin): Handle NEON_BSWAP.
3351 (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
3352 * config/arm/arm_neon_builtins.def (bswap): Define builtins.
3353 * config/arm/iterators.md (VDQHSD): New mode iterator.
3355 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3357 Backport from trunk r210471.
3358 2014-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3360 * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
3361 enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
3363 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3365 Backport from trunk r210369.
3366 2014-05-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3368 * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
3369 (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
3370 Remove associated type declarations and initialisations.
3371 (arm_expand_neon_builtin): Likewise.
3372 (neon_emit_pair_result_insn): Delete.
3373 * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
3374 * config/arm/neon.md (neon_vtrn<mode>): Delete.
3375 (neon_vzip<mode>): Likewise.
3376 (neon_vuzp<mode>): Likewise.
3378 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3380 Backport from trunk r211058, 211177.
3381 2014-05-29 Alan Lawrence <alan.lawrence@arm.com>
3383 * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
3384 TYPES_BINOPV): New static data.
3385 * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
3386 * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
3387 New patterns.
3388 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
3389 patterns for EXT.
3390 (aarch64_evpc_ext): New function.
3392 * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
3394 * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
3395 vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
3396 vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
3397 vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
3398 vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
3400 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
3402 * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
3403 location == 0.
3405 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3407 Backport from trunk r209797.
3408 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3410 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
3411 Use HOST_WIDE_INT_C for mask literal.
3412 (aarch_rev16_shleft_mask_imm_p): Likewise.
3414 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3416 Backport from trunk r211148.
3417 2014-06-02 Andrew Pinski <apinski@cavium.com>
3419 * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
3420 /lib/ld-linux32-aarch64.so.1 is used for ILP32.
3421 (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
3422 file whose name depends on -mabi= and -mbig-endian.
3423 * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
3424 better and handle ilp32 too.
3425 (MULTILIB_OPTIONS): Delete.
3426 (MULTILIB_DIRNAMES): Delete.
3428 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3430 Backport from trunk r210828, r211103.
3431 2014-05-31 Kugan Vivekanandarajah <kuganv@linaro.org>
3433 * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
3434 (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
3435 (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
3436 and __builtins_arm_get_fpscr.
3437 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
3438 __builtins_arm_get_fpscr.
3439 (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
3440 __builtins_arm_ldfpscr.
3441 (arm_atomic_assign_expand_fenv): New function.
3442 * config/arm/vfp.md (set_fpscr): New pattern.
3443 (get_fpscr) : Likewise.
3444 * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
3445 VUNSPEC_SET_FPSCR.
3446 * doc/extend.texi (AARCH64 Built-in Functions) : Document
3447 __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
3449 2014-05-23 Kugan Vivekanandarajah <kuganv@linaro.org>
3451 * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
3452 define.
3453 * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
3454 New function declaration.
3455 * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
3456 AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
3457 AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
3458 (aarch64_init_builtins) : Initialize builtins
3459 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
3460 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
3461 (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
3462 __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
3463 and __builtins_aarch64_set_fpsr.
3464 (aarch64_atomic_assign_expand_fenv): New function.
3465 * config/aarch64/aarch64.md (set_fpcr): New pattern.
3466 (get_fpcr) : Likewise.
3467 (set_fpsr) : Likewise.
3468 (get_fpsr) : Likewise.
3469 (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
3470 and UNSPECV_SET_FPSR.
3471 * doc/extend.texi (AARCH64 Built-in Functions) : Document
3472 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
3473 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
3475 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3477 Backport from trunk r210355.
3478 2014-05-13 Ian Bolton <ian.bolton@arm.com>
3480 * config/aarch64/aarch64-protos.h
3481 (aarch64_hard_regno_caller_save_mode): New prototype.
3482 * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
3483 New function.
3484 * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
3486 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3488 Backport from trunk r209943.
3489 2014-04-30 Alan Lawrence <alan.lawrence@arm.com>
3491 * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
3492 vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
3493 vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
3494 vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
3495 vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
3496 vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
3497 vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
3498 vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
3500 2014-06-26 Yvan Roux <yvan.roux@linaro.org>
3502 * LINARO-VERSION: Bump version.
3504 2014-06-25 Yvan Roux <yvan.roux@linaro.org>
3506 GCC Linaro 4.9-2014.06-1 released.
3507 * LINARO-VERSION: Update.
3509 2014-06-24 Yvan Roux <yvan.roux@linaro.org>
3511 Revert:
3512 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3514 Backport from trunk r209643.
3515 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3517 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
3519 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
3521 Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
3522 210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
3523 210508, 210509, 210510, 210512, 211205, 211206.
3524 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3526 * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
3527 (cpu_addrcost_table): Use it.
3528 * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
3529 (aarch64_address_cost): Rewrite using aarch64_classify_address,
3530 move it.
3532 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3534 * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
3535 (cortexa57_vector_cost): Likewise.
3536 (cortexa57_tunings): Use them.
3538 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3540 * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
3541 (TARGET_RTX_COSTS): Call it.
3543 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3544 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3546 * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
3547 emit instructions, return number of instructions which would
3548 be emitted.
3549 (aarch64_add_constant): Update call to aarch64_build_constant.
3550 (aarch64_output_mi_thunk): Likewise.
3551 (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
3552 a CONST_DOUBLE.
3554 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3555 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3557 * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
3558 to...
3559 (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
3560 well formed.
3561 (aarch64_rtx_mult_cost): New.
3562 (aarch64_rtx_costs): Use it, refactor as appropriate.
3564 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3566 * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
3568 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3569 Philip Tomsich <philipp.tomsich@theobroma-systems.com>
3571 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
3572 for SET RTX.
3574 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3575 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3577 * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
3578 costs when costing loads and stores to memory.
3580 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3581 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3583 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
3584 logical operations.
3586 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3587 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3589 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
3590 ZERO_EXTEND and SIGN_EXTEND better.
3592 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3593 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3595 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
3596 rotates and shifts.
3598 2014-03-16 James Greenhalgh <james.greenhalgh@arm.com>
3599 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3601 * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
3602 (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
3604 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3605 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3607 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
3608 DIV/MOD.
3610 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3611 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3613 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
3614 operators.
3616 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3617 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3619 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
3620 FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
3622 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3623 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3625 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
3627 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3629 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
3630 HIGH, LO_SUM.
3632 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3634 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
3635 where we were unable to cost an RTX.
3637 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3639 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
3641 2014-06-03 Andrew Pinski <apinski@cavium.com>
3643 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
3644 (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
3646 2014-06-03 Andrew Pinski <apinski@cavium.com>
3648 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
3649 comparisons for OP0.
3651 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
3653 * LINARO-VERSION: Bump version.
3655 2014-06-12 Yvan Roux <yvan.roux@linaro.org>
3657 GCC Linaro 4.9-2014.06 released.
3658 * LINARO-VERSION: Update.
3660 2014-06-04 Yvan Roux <yvan.roux@linaro.org>
3662 Backport from trunk r211211.
3663 2014-06-04 Bin Cheng <bin.cheng@arm.com>
3665 * config/aarch64/aarch64.c (aarch64_classify_address)
3666 (aarch64_legitimize_reload_address): Support full addressing modes
3667 for vector modes.
3668 * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
3669 (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
3671 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3673 Backport from trunk r209906.
3674 2014-04-29 Alan Lawrence <alan.lawrence@arm.com>
3676 * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
3677 vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
3678 vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
3679 vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
3680 vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
3681 vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
3682 vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
3683 vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
3685 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3687 Backport from trunk r209897.
3688 2014-04-29 James Greenhalgh <james.greenhalgh@arm.com>
3690 * calls.c (initialize_argument_information): Always treat
3691 PUSH_ARGS_REVERSED as 1, simplify code accordingly.
3692 (expand_call): Likewise.
3693 (emit_library_call_calue_1): Likewise.
3694 * expr.c (PUSH_ARGS_REVERSED): Do not define.
3695 (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
3696 code accordingly.
3698 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3700 Backport from trunk r209880.
3701 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
3703 * config/aarch64/aarch64-builtins.c
3704 (aarch64_types_storestruct_lane_qualifiers): New.
3705 (TYPES_STORESTRUCT_LANE): Likewise.
3706 * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
3707 (st3_lane): Likewise.
3708 (st4_lane): Likewise.
3709 * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
3710 (vec_store_lanesci_lane<mode>): Likewise.
3711 (vec_store_lanesxi_lane<mode>): Likewise.
3712 (aarch64_st2_lane<VQ:mode>): Likewise.
3713 (aarch64_st3_lane<VQ:mode>): Likewise.
3714 (aarch64_st4_lane<VQ:mode>): Likewise.
3715 * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
3716 * config/aarch64/arm_neon.h
3717 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
3718 use new macro arguments.
3719 (__ST3_LANE_FUNC): Likewise.
3720 (__ST4_LANE_FUNC): Likewise.
3721 * config/aarch64/iterators.md (V_TWO_ELEM): New.
3722 (V_THREE_ELEM): Likewise.
3723 (V_FOUR_ELEM): Likewise.
3725 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3727 Backport from trunk r209878.
3728 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
3730 * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
3731 * config/aarch64/aarch64.c
3732 (aarch64_cannot_change_mode_class): Weaken conditions.
3733 (aarch64_modes_tieable_p): New.
3734 * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
3736 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3738 Backport from trunk r209808.
3739 2014-04-25 Jiong Wang <jiong.wang@arm.com>
3741 * config/arm/predicates.md (call_insn_operand): Add long_call check.
3742 * config/arm/arm.md (sibcall, sibcall_value): Force the address to
3743 reg for long_call.
3744 * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
3745 restriction.
3747 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3749 Backport from trunk r209806.
3750 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3752 * config/arm/arm.c (arm_cortex_a8_tune): Initialise
3753 T16-related fields.
3755 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3757 Backport from trunk r209742, 209749.
3758 2014-04-24 Alan Lawrence <alan.lawrence@arm.com>
3760 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
3762 2014-04-24 Tejas Belagod <tejas.belagod@arm.com>
3764 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
3765 for big-endian.
3767 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3769 Backport from trunk r209736.
3770 2014-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3772 * config/aarch64/aarch64-builtins.c
3773 (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
3774 BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
3775 * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
3776 * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
3777 builtins.
3778 * config/aarch64/iterator.md (VDQHSD): New mode iterator.
3779 (Vrevsuff): New mode attribute.
3781 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3783 Backport from trunk r209712.
3784 2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
3786 * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
3787 (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
3788 machine descriptions for Stack Smashing Protector.
3790 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3792 Backport from trunk r209711.
3793 2014-04-23 Richard Earnshaw <rearnsha@arm.com>
3795 * aarch64.md (<optab>_rol<mode>3): New pattern.
3796 (<optab>_rolsi3_uxtw): Likewise.
3797 * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
3799 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3801 Backport from trunk r209710.
3802 2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
3804 * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
3805 (arm_cortex_a12_tune): Likewise.
3807 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3809 Backport from trunk r209706.
3810 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3812 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
3814 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3816 Backport from trunk r209701, 209702, 209703, 209704, 209705.
3817 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3819 * config/arm/arm.md (arm_rev16si2): New pattern.
3820 (arm_rev16si2_alt): Likewise.
3821 * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
3823 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3824 * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
3825 (rev16<mode>2_alt): Likewise.
3826 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
3827 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
3828 (aarch_rev16_shleft_mask_imm_p): Likewise.
3829 (aarch_rev16_p_1): Likewise.
3830 (aarch_rev16_p): Likewise.
3831 * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
3832 (aarch_rev16_shright_mask_imm_p): Likewise.
3833 (aarch_rev16_shleft_mask_imm_p): Likewise.
3835 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3837 * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
3838 * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
3839 rev cost.
3840 (cortex_a53_extra_costs): Likewise.
3841 (cortex_a57_extra_costs): Likewise.
3842 * config/arm/arm.c (cortexa9_extra_costs): Likewise.
3843 (cortexa7_extra_costs): Likewise.
3844 (cortexa8_extra_costs): Likewise.
3845 (cortexa12_extra_costs): Likewise.
3846 (cortexa15_extra_costs): Likewise.
3847 (v7m_extra_costs): Likewise.
3848 (arm_new_rtx_costs): Handle BSWAP.
3850 2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3852 * config/arm/arm.c (cortexa8_extra_costs): New table.
3853 (arm_cortex_a8_tune): New tuning struct.
3854 * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
3856 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3858 * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
3860 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3862 Backport from trunk r209659.
3863 2014-04-22 Richard Henderson <rth@redhat.com>
3865 * config/aarch64/aarch64 (addti3, subti3): New expanders.
3866 (add<GPI>3_compare0): Remove leading * from name.
3867 (add<GPI>3_carryin): Likewise.
3868 (sub<GPI>3_compare0): Likewise.
3869 (sub<GPI>3_carryin): Likewise.
3870 (<su_optab>mulditi3): New expander.
3871 (multi3): New expander.
3872 (madd<GPI>): Remove leading * from name.
3874 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3876 Backport from trunk r209645.
3877 2014-04-22 Andrew Pinski <apinski@cavium.com>
3879 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
3880 Handle TLS for ILP32.
3881 * config/aarch64/aarch64.md (tlsie_small): Rename to ...
3882 (tlsie_small_<mode>): this and handle PTR.
3883 (tlsie_small_sidi): New pattern.
3884 (tlsle_small): Change to an expand to handle ILP32.
3885 (tlsle_small_<mode>): New pattern.
3886 (tlsdesc_small): Rename to ...
3887 (tlsdesc_small_<mode>): this and handle PTR.
3889 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3891 Backport from trunk r209643.
3892 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3894 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
3896 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3898 Backport from trunk r209641, 209642.
3899 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
3901 * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
3902 (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
3903 (aarch64_types_signed_poly_qualifiers): Likewise.
3904 (aarch64_types_unsigned_signed_qualifiers): Likewise.
3905 (aarch64_types_poly_signed_qualifiers): Likewise.
3906 (TYPES_REINTERP_SS): Type macro added.
3907 (TYPES_REINTERP_SU): Likewise.
3908 (TYPES_REINTERP_SP): Likewise.
3909 (TYPES_REINTERP_US): Likewise.
3910 (TYPES_REINTERP_PS): Likewise.
3911 (aarch64_fold_builtin): New expression folding added.
3912 * config/aarch64/aarch64-simd-builtins.def (REINTERP):
3913 Declarations removed.
3914 (REINTERP_SS): Declarations added.
3915 (REINTERP_US): Likewise.
3916 (REINTERP_PS): Likewise.
3917 (REINTERP_SU): Likewise.
3918 (REINTERP_SP): Likewise.
3919 * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
3920 (vreinterpretq_p8_f64): Likewise.
3921 (vreinterpret_p16_f64): Likewise.
3922 (vreinterpretq_p16_f64): Likewise.
3923 (vreinterpret_f32_f64): Likewise.
3924 (vreinterpretq_f32_f64): Likewise.
3925 (vreinterpret_f64_f32): Likewise.
3926 (vreinterpret_f64_p8): Likewise.
3927 (vreinterpret_f64_p16): Likewise.
3928 (vreinterpret_f64_s8): Likewise.
3929 (vreinterpret_f64_s16): Likewise.
3930 (vreinterpret_f64_s32): Likewise.
3931 (vreinterpret_f64_s64): Likewise.
3932 (vreinterpret_f64_u8): Likewise.
3933 (vreinterpret_f64_u16): Likewise.
3934 (vreinterpret_f64_u32): Likewise.
3935 (vreinterpret_f64_u64): Likewise.
3936 (vreinterpretq_f64_f32): Likewise.
3937 (vreinterpretq_f64_p8): Likewise.
3938 (vreinterpretq_f64_p16): Likewise.
3939 (vreinterpretq_f64_s8): Likewise.
3940 (vreinterpretq_f64_s16): Likewise.
3941 (vreinterpretq_f64_s32): Likewise.
3942 (vreinterpretq_f64_s64): Likewise.
3943 (vreinterpretq_f64_u8): Likewise.
3944 (vreinterpretq_f64_u16): Likewise.
3945 (vreinterpretq_f64_u32): Likewise.
3946 (vreinterpretq_f64_u64): Likewise.
3947 (vreinterpret_s64_f64): Likewise.
3948 (vreinterpretq_s64_f64): Likewise.
3949 (vreinterpret_u64_f64): Likewise.
3950 (vreinterpretq_u64_f64): Likewise.
3951 (vreinterpret_s8_f64): Likewise.
3952 (vreinterpretq_s8_f64): Likewise.
3953 (vreinterpret_s16_f64): Likewise.
3954 (vreinterpretq_s16_f64): Likewise.
3955 (vreinterpret_s32_f64): Likewise.
3956 (vreinterpretq_s32_f64): Likewise.
3957 (vreinterpret_u8_f64): Likewise.
3958 (vreinterpretq_u8_f64): Likewise.
3959 (vreinterpret_u16_f64): Likewise.
3960 (vreinterpretq_u16_f64): Likewise.
3961 (vreinterpret_u32_f64): Likewise.
3962 (vreinterpretq_u32_f64): Likewise.
3964 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
3966 * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
3967 * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
3968 (vreinterpret_p8_s8): Likewise.
3969 * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
3970 (vreinterpret_p8_s16): Likewise.
3971 (vreinterpret_p8_s32): Likewise.
3972 (vreinterpret_p8_s64): Likewise.
3973 (vreinterpret_p8_f32): Likewise.
3974 (vreinterpret_p8_u8): Likewise.
3975 (vreinterpret_p8_u16): Likewise.
3976 (vreinterpret_p8_u32): Likewise.
3977 (vreinterpret_p8_u64): Likewise.
3978 (vreinterpret_p8_p16): Likewise.
3979 (vreinterpretq_p8_s8): Likewise.
3980 (vreinterpretq_p8_s16): Likewise.
3981 (vreinterpretq_p8_s32): Likewise.
3982 (vreinterpretq_p8_s64): Likewise.
3983 (vreinterpretq_p8_f32): Likewise.
3984 (vreinterpretq_p8_u8): Likewise.
3985 (vreinterpretq_p8_u16): Likewise.
3986 (vreinterpretq_p8_u32): Likewise.
3987 (vreinterpretq_p8_u64): Likewise.
3988 (vreinterpretq_p8_p16): Likewise.
3989 (vreinterpret_p16_s8): Likewise.
3990 (vreinterpret_p16_s16): Likewise.
3991 (vreinterpret_p16_s32): Likewise.
3992 (vreinterpret_p16_s64): Likewise.
3993 (vreinterpret_p16_f32): Likewise.
3994 (vreinterpret_p16_u8): Likewise.
3995 (vreinterpret_p16_u16): Likewise.
3996 (vreinterpret_p16_u32): Likewise.
3997 (vreinterpret_p16_u64): Likewise.
3998 (vreinterpret_p16_p8): Likewise.
3999 (vreinterpretq_p16_s8): Likewise.
4000 (vreinterpretq_p16_s16): Likewise.
4001 (vreinterpretq_p16_s32): Likewise.
4002 (vreinterpretq_p16_s64): Likewise.
4003 (vreinterpretq_p16_f32): Likewise.
4004 (vreinterpretq_p16_u8): Likewise.
4005 (vreinterpretq_p16_u16): Likewise.
4006 (vreinterpretq_p16_u32): Likewise.
4007 (vreinterpretq_p16_u64): Likewise.
4008 (vreinterpretq_p16_p8): Likewise.
4009 (vreinterpret_f32_s8): Likewise.
4010 (vreinterpret_f32_s16): Likewise.
4011 (vreinterpret_f32_s32): Likewise.
4012 (vreinterpret_f32_s64): Likewise.
4013 (vreinterpret_f32_u8): Likewise.
4014 (vreinterpret_f32_u16): Likewise.
4015 (vreinterpret_f32_u32): Likewise.
4016 (vreinterpret_f32_u64): Likewise.
4017 (vreinterpret_f32_p8): Likewise.
4018 (vreinterpret_f32_p16): Likewise.
4019 (vreinterpretq_f32_s8): Likewise.
4020 (vreinterpretq_f32_s16): Likewise.
4021 (vreinterpretq_f32_s32): Likewise.
4022 (vreinterpretq_f32_s64): Likewise.
4023 (vreinterpretq_f32_u8): Likewise.
4024 (vreinterpretq_f32_u16): Likewise.
4025 (vreinterpretq_f32_u32): Likewise.
4026 (vreinterpretq_f32_u64): Likewise.
4027 (vreinterpretq_f32_p8): Likewise.
4028 (vreinterpretq_f32_p16): Likewise.
4029 (vreinterpret_s64_s8): Likewise.
4030 (vreinterpret_s64_s16): Likewise.
4031 (vreinterpret_s64_s32): Likewise.
4032 (vreinterpret_s64_f32): Likewise.
4033 (vreinterpret_s64_u8): Likewise.
4034 (vreinterpret_s64_u16): Likewise.
4035 (vreinterpret_s64_u32): Likewise.
4036 (vreinterpret_s64_u64): Likewise.
4037 (vreinterpret_s64_p8): Likewise.
4038 (vreinterpret_s64_p16): Likewise.
4039 (vreinterpretq_s64_s8): Likewise.
4040 (vreinterpretq_s64_s16): Likewise.
4041 (vreinterpretq_s64_s32): Likewise.
4042 (vreinterpretq_s64_f32): Likewise.
4043 (vreinterpretq_s64_u8): Likewise.
4044 (vreinterpretq_s64_u16): Likewise.
4045 (vreinterpretq_s64_u32): Likewise.
4046 (vreinterpretq_s64_u64): Likewise.
4047 (vreinterpretq_s64_p8): Likewise.
4048 (vreinterpretq_s64_p16): Likewise.
4049 (vreinterpret_u64_s8): Likewise.
4050 (vreinterpret_u64_s16): Likewise.
4051 (vreinterpret_u64_s32): Likewise.
4052 (vreinterpret_u64_s64): Likewise.
4053 (vreinterpret_u64_f32): Likewise.
4054 (vreinterpret_u64_u8): Likewise.
4055 (vreinterpret_u64_u16): Likewise.
4056 (vreinterpret_u64_u32): Likewise.
4057 (vreinterpret_u64_p8): Likewise.
4058 (vreinterpret_u64_p16): Likewise.
4059 (vreinterpretq_u64_s8): Likewise.
4060 (vreinterpretq_u64_s16): Likewise.
4061 (vreinterpretq_u64_s32): Likewise.
4062 (vreinterpretq_u64_s64): Likewise.
4063 (vreinterpretq_u64_f32): Likewise.
4064 (vreinterpretq_u64_u8): Likewise.
4065 (vreinterpretq_u64_u16): Likewise.
4066 (vreinterpretq_u64_u32): Likewise.
4067 (vreinterpretq_u64_p8): Likewise.
4068 (vreinterpretq_u64_p16): Likewise.
4069 (vreinterpret_s8_s16): Likewise.
4070 (vreinterpret_s8_s32): Likewise.
4071 (vreinterpret_s8_s64): Likewise.
4072 (vreinterpret_s8_f32): Likewise.
4073 (vreinterpret_s8_u8): Likewise.
4074 (vreinterpret_s8_u16): Likewise.
4075 (vreinterpret_s8_u32): Likewise.
4076 (vreinterpret_s8_u64): Likewise.
4077 (vreinterpret_s8_p8): Likewise.
4078 (vreinterpret_s8_p16): Likewise.
4079 (vreinterpretq_s8_s16): Likewise.
4080 (vreinterpretq_s8_s32): Likewise.
4081 (vreinterpretq_s8_s64): Likewise.
4082 (vreinterpretq_s8_f32): Likewise.
4083 (vreinterpretq_s8_u8): Likewise.
4084 (vreinterpretq_s8_u16): Likewise.
4085 (vreinterpretq_s8_u32): Likewise.
4086 (vreinterpretq_s8_u64): Likewise.
4087 (vreinterpretq_s8_p8): Likewise.
4088 (vreinterpretq_s8_p16): Likewise.
4089 (vreinterpret_s16_s8): Likewise.
4090 (vreinterpret_s16_s32): Likewise.
4091 (vreinterpret_s16_s64): Likewise.
4092 (vreinterpret_s16_f32): Likewise.
4093 (vreinterpret_s16_u8): Likewise.
4094 (vreinterpret_s16_u16): Likewise.
4095 (vreinterpret_s16_u32): Likewise.
4096 (vreinterpret_s16_u64): Likewise.
4097 (vreinterpret_s16_p8): Likewise.
4098 (vreinterpret_s16_p16): Likewise.
4099 (vreinterpretq_s16_s8): Likewise.
4100 (vreinterpretq_s16_s32): Likewise.
4101 (vreinterpretq_s16_s64): Likewise.
4102 (vreinterpretq_s16_f32): Likewise.
4103 (vreinterpretq_s16_u8): Likewise.
4104 (vreinterpretq_s16_u16): Likewise.
4105 (vreinterpretq_s16_u32): Likewise.
4106 (vreinterpretq_s16_u64): Likewise.
4107 (vreinterpretq_s16_p8): Likewise.
4108 (vreinterpretq_s16_p16): Likewise.
4109 (vreinterpret_s32_s8): Likewise.
4110 (vreinterpret_s32_s16): Likewise.
4111 (vreinterpret_s32_s64): Likewise.
4112 (vreinterpret_s32_f32): Likewise.
4113 (vreinterpret_s32_u8): Likewise.
4114 (vreinterpret_s32_u16): Likewise.
4115 (vreinterpret_s32_u32): Likewise.
4116 (vreinterpret_s32_u64): Likewise.
4117 (vreinterpret_s32_p8): Likewise.
4118 (vreinterpret_s32_p16): Likewise.
4119 (vreinterpretq_s32_s8): Likewise.
4120 (vreinterpretq_s32_s16): Likewise.
4121 (vreinterpretq_s32_s64): Likewise.
4122 (vreinterpretq_s32_f32): Likewise.
4123 (vreinterpretq_s32_u8): Likewise.
4124 (vreinterpretq_s32_u16): Likewise.
4125 (vreinterpretq_s32_u32): Likewise.
4126 (vreinterpretq_s32_u64): Likewise.
4127 (vreinterpretq_s32_p8): Likewise.
4128 (vreinterpretq_s32_p16): Likewise.
4129 (vreinterpret_u8_s8): Likewise.
4130 (vreinterpret_u8_s16): Likewise.
4131 (vreinterpret_u8_s32): Likewise.
4132 (vreinterpret_u8_s64): Likewise.
4133 (vreinterpret_u8_f32): Likewise.
4134 (vreinterpret_u8_u16): Likewise.
4135 (vreinterpret_u8_u32): Likewise.
4136 (vreinterpret_u8_u64): Likewise.
4137 (vreinterpret_u8_p8): Likewise.
4138 (vreinterpret_u8_p16): Likewise.
4139 (vreinterpretq_u8_s8): Likewise.
4140 (vreinterpretq_u8_s16): Likewise.
4141 (vreinterpretq_u8_s32): Likewise.
4142 (vreinterpretq_u8_s64): Likewise.
4143 (vreinterpretq_u8_f32): Likewise.
4144 (vreinterpretq_u8_u16): Likewise.
4145 (vreinterpretq_u8_u32): Likewise.
4146 (vreinterpretq_u8_u64): Likewise.
4147 (vreinterpretq_u8_p8): Likewise.
4148 (vreinterpretq_u8_p16): Likewise.
4149 (vreinterpret_u16_s8): Likewise.
4150 (vreinterpret_u16_s16): Likewise.
4151 (vreinterpret_u16_s32): Likewise.
4152 (vreinterpret_u16_s64): Likewise.
4153 (vreinterpret_u16_f32): Likewise.
4154 (vreinterpret_u16_u8): Likewise.
4155 (vreinterpret_u16_u32): Likewise.
4156 (vreinterpret_u16_u64): Likewise.
4157 (vreinterpret_u16_p8): Likewise.
4158 (vreinterpret_u16_p16): Likewise.
4159 (vreinterpretq_u16_s8): Likewise.
4160 (vreinterpretq_u16_s16): Likewise.
4161 (vreinterpretq_u16_s32): Likewise.
4162 (vreinterpretq_u16_s64): Likewise.
4163 (vreinterpretq_u16_f32): Likewise.
4164 (vreinterpretq_u16_u8): Likewise.
4165 (vreinterpretq_u16_u32): Likewise.
4166 (vreinterpretq_u16_u64): Likewise.
4167 (vreinterpretq_u16_p8): Likewise.
4168 (vreinterpretq_u16_p16): Likewise.
4169 (vreinterpret_u32_s8): Likewise.
4170 (vreinterpret_u32_s16): Likewise.
4171 (vreinterpret_u32_s32): Likewise.
4172 (vreinterpret_u32_s64): Likewise.
4173 (vreinterpret_u32_f32): Likewise.
4174 (vreinterpret_u32_u8): Likewise.
4175 (vreinterpret_u32_u16): Likewise.
4176 (vreinterpret_u32_u64): Likewise.
4177 (vreinterpret_u32_p8): Likewise.
4178 (vreinterpret_u32_p16): Likewise.
4179 (vreinterpretq_u32_s8): Likewise.
4180 (vreinterpretq_u32_s16): Likewise.
4181 (vreinterpretq_u32_s32): Likewise.
4182 (vreinterpretq_u32_s64): Likewise.
4183 (vreinterpretq_u32_f32): Likewise.
4184 (vreinterpretq_u32_u8): Likewise.
4185 (vreinterpretq_u32_u16): Likewise.
4186 (vreinterpretq_u32_u64): Likewise.
4187 (vreinterpretq_u32_p8): Likewise.
4188 (vreinterpretq_u32_p16): Likewise.
4190 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4192 Backport from trunk r209640.
4193 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
4195 * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
4196 Pattern extended.
4197 * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
4198 extended.
4199 (sqabs): Likewise.
4200 * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
4201 (vqnegd_s64): Likewise.
4202 (vqabs_s64): Likewise.
4203 (vqabsd_s64): Likewise.
4205 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4207 Backport from trunk r209627, 209636.
4208 2014-04-22 Renlin <renlin.li@arm.com>
4209 Jiong Wang <jiong.wang@arm.com>
4211 * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
4212 * config/aarch64/aarch64.c (aarch64_layout_frame)
4213 (aarch64_initial_elimination_offset): Likewise.
4215 2014-04-22 Marcus Shawcroft <marcus.shawcroft@arm.com>
4217 * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
4218 Fix indentation.
4220 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4222 Backport from trunk r209618.
4223 2014-04-22 Renlin Li <Renlin.Li@arm.com>
4225 * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
4226 the output asm format.
4228 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4230 Backport from trunk r209617.
4231 2014-04-22 James Greenhalgh <james.greenhalgh@arm.com>
4233 * config/aarch64/aarch64-simd.md
4234 (aarch64_cm<optab>di): Always split.
4235 (*aarch64_cm<optab>di): New.
4236 (aarch64_cmtstdi): Always split.
4237 (*aarch64_cmtstdi): New.
4239 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4241 Backport from trunk r209615.
4242 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
4244 * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
4245 restrictions on core registers for DImode values in Thumb2.
4247 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4249 Backport from trunk r209613, r209614.
4250 2014-04-22 Ian Bolton <ian.bolton@arm.com>
4252 * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
4253 * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
4255 2014-04-22 Ian Bolton <ian.bolton@arm.com>
4257 * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
4258 (*iordi_notzesidi_di): Likewise.
4259 (*iordi_notsesidi_di): Likewise.
4261 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4263 Backport from trunk r209561.
4264 2014-04-22 Ian Bolton <ian.bolton@arm.com>
4266 * config/arm/arm-protos.h (tune_params): New struct members.
4267 * config/arm/arm.c: Initialise tune_params per processor.
4268 (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
4269 for speed, based on new tune_params.
4271 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4273 Backport from trunk r209559.
4274 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
4276 * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
4277 added.
4278 * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
4279 macro.
4280 * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
4281 corrected.
4282 * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
4283 * config/aarch64/arm_neon.h (vrnd_f64): Added.
4284 (vrnda_f64): Likewise.
4285 (vrndi_f64): Likewise.
4286 (vrndm_f64): Likewise.
4287 (vrndn_f64): Likewise.
4288 (vrndp_f64): Likewise.
4289 (vrndx_f64): Likewise.
4291 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4293 Backport from trunk r209419.
4294 2014-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4296 PR rtl-optimization/60663
4297 * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
4298 avoid 0 cost.
4300 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4302 Backport from trunk r209457.
4303 2014-04-16 Andrew Pinski <apinski@cavium.com>
4305 * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
4306 definition.
4308 2014-05-19 Yvan Roux <yvan.roux@linaro.org>
4310 * LINARO-VERSION: Bump version.
4312 2014-05-14 Yvan Roux <yvan.roux@linaro.org>
4314 GCC Linaro 4.9-2014.05 released.
4315 * LINARO-VERSION: Update.
4317 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
4319 Backport from trunk r209889.
4320 2014-04-29 Zhenqiang Chen <zhenqiang.chen@linaro.org>
4322 * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
4324 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
4326 Backport from trunk r209556.
4327 2014-04-22 Zhenqiang Chen <zhenqiang.chen@linaro.org>
4329 * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
4330 GET_MODE_SIZE argument is enum machine_mode.
4332 2014-04-28 Yvan Roux <yvan.roux@linaro.org>
4334 * LINARO-VERSION: Bump version.
4336 2014-04-22 Yvan Roux <yvan.roux@linaro.org>
4338 GCC Linaro 4.9-2014.04 released.
4339 * LINARO-VERSION: New file.
4340 * configure.ac: Add Linaro version string.