gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998-2014 Free Software Foundation, Inc.
   4    Contributed by Denis Chertykov (chertykov@gmail.com)
   5
   6 This file is part of GCC.
   7
   8 GCC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 3, or (at your option)
  11 any later version.
  12
  13 GCC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GCC; see the file COPYING3.  If not see
  20 <http://www.gnu.org/licenses/>.  */
  21
  22 typedef struct
  23 {
  24   /* Id of the address space as used in c_register_addr_space */
  25   unsigned char id;
  26
  27   /* Flavour of memory: 0 = RAM, 1 = Flash */
  28   int memory_class;
  29
  30   /* Width of pointer (in bytes) */
  31   int pointer_size;
  32
  33   /* Name of the address space as visible to the user */
  34   const char *name;
  35
  36   /* Segment (i.e. 64k memory chunk) number.  */
  37   int segment;
  38
  39   /* Section prefix, e.g. ".progmem1.data"  */
  40   const char *section_name;
  41 } avr_addrspace_t;
  42
  43 extern const avr_addrspace_t avr_addrspace[];
  44
  45 /* Known address spaces */
  46
  47 enum
  48   {
  49     ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */
  50     ADDR_SPACE_FLASH,
  51     ADDR_SPACE_FLASH1,
  52     ADDR_SPACE_FLASH2,
  53     ADDR_SPACE_FLASH3,
  54     ADDR_SPACE_FLASH4,
  55     ADDR_SPACE_FLASH5,
  56     ADDR_SPACE_MEMX,
  57     /* Sentinel */
  58     ADDR_SPACE_COUNT
  59   };
  60
  61 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
  62
  63 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call)
  64 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
  65 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
  66 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
  67 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
  68 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
  69 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
  70 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
  71 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
  72 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm             \
  73                         || avr_current_arch->have_rampd)
  74 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
  75
  76 /* Handling of 8-bit SP versus 16-bit SP is as follows:
  77
  78    -msp8 is used internally to select the right multilib for targets with
  79    8-bit SP.  -msp8 is set automatically by DRIVER_SELF_SPECS for devices
  80    with 8-bit SP or by multilib generation machinery.  If a frame pointer is
  81    needed and SP is only 8 bits wide, SP is zero-extended to get FP.
  82
  83    TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
  84    This option has no effect on multilib selection.  It serves to save some
  85    bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
  86
  87    These two properties are reflected by built-in macros __AVR_SP8__ resp.
  88    __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__.  During multilib generation
  89    there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__.  */
  90
  91 #define AVR_HAVE_8BIT_SP                                 \
  92   ((avr_current_device->dev_attribute & AVR_SHORT_SP) || \
  93    TARGET_TINY_STACK || avr_sp8)
  94
  95 #define AVR_HAVE_SPH (!avr_sp8)
  96
  97 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
  98 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
  99
 100 #define AVR_XMEGA (avr_current_arch->xmega_p)
 101
 102 #define BITS_BIG_ENDIAN 0
 103 #define BYTES_BIG_ENDIAN 0
 104 #define WORDS_BIG_ENDIAN 0
 105
 106 #ifdef IN_LIBGCC2
 107 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 108 #define UNITS_PER_WORD 4
 109 #else
 110 /* Width of a word, in units (bytes).  */
 111 #define UNITS_PER_WORD 1
 112 #endif
 113
 114 #define POINTER_SIZE 16
 115
 116
 117 /* Maximum sized of reasonable data type
 118    DImode or Dfmode ...  */
 119 #define MAX_FIXED_MODE_SIZE 32
 120
 121 #define PARM_BOUNDARY 8
 122
 123 #define FUNCTION_BOUNDARY 8
 124
 125 #define EMPTY_FIELD_BOUNDARY 8
 126
 127 /* No data type wants to be aligned rounder than this.  */
 128 #define BIGGEST_ALIGNMENT 8
 129
 130 #define TARGET_VTABLE_ENTRY_ALIGN 8
 131
 132 #define STRICT_ALIGNMENT 0
 133
 134 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 135 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 136 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 137 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 138 #define FLOAT_TYPE_SIZE 32
 139 #define DOUBLE_TYPE_SIZE 32
 140 #define LONG_DOUBLE_TYPE_SIZE 32
 141 #define LONG_LONG_ACCUM_TYPE_SIZE 64
 142
 143 #define DEFAULT_SIGNED_CHAR 1
 144
 145 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 146 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 147
 148 #define WCHAR_TYPE_SIZE 16
 149
 150 #define FIRST_PSEUDO_REGISTER 36
 151
 152 #define FIXED_REGISTERS {\
 153   1,1,/* r0 r1 */\
 154   0,0,/* r2 r3 */\
 155   0,0,/* r4 r5 */\
 156   0,0,/* r6 r7 */\
 157   0,0,/* r8 r9 */\
 158   0,0,/* r10 r11 */\
 159   0,0,/* r12 r13 */\
 160   0,0,/* r14 r15 */\
 161   0,0,/* r16 r17 */\
 162   0,0,/* r18 r19 */\
 163   0,0,/* r20 r21 */\
 164   0,0,/* r22 r23 */\
 165   0,0,/* r24 r25 */\
 166   0,0,/* r26 r27 */\
 167   0,0,/* r28 r29 */\
 168   0,0,/* r30 r31 */\
 169   1,1,/*  STACK */\
 170   1,1 /* arg pointer */  }
 171
 172 #define CALL_USED_REGISTERS {                   \
 173   1,1,/* r0 r1 */                               \
 174     0,0,/* r2 r3 */                             \
 175     0,0,/* r4 r5 */                             \
 176     0,0,/* r6 r7 */                             \
 177     0,0,/* r8 r9 */                             \
 178     0,0,/* r10 r11 */                           \
 179     0,0,/* r12 r13 */                           \
 180     0,0,/* r14 r15 */                           \
 181     0,0,/* r16 r17 */                           \
 182     1,1,/* r18 r19 */                           \
 183     1,1,/* r20 r21 */                           \
 184     1,1,/* r22 r23 */                           \
 185     1,1,/* r24 r25 */                           \
 186     1,1,/* r26 r27 */                           \
 187     0,0,/* r28 r29 */                           \
 188     1,1,/* r30 r31 */                           \
 189     1,1,/*  STACK */                            \
 190     1,1 /* arg pointer */  }
 191
 192 #define REG_ALLOC_ORDER {                       \
 193     24,25,                                      \
 194     18,19,                                      \
 195     20,21,                                      \
 196     22,23,                                      \
 197     30,31,                                      \
 198     26,27,                                      \
 199     28,29,                                      \
 200     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 201     0,1,                                        \
 202     32,33,34,35                                 \
 203     }
 204
 205 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
 206
 207
 208 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 209   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 210
 211 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 212
 213 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 214
 215 enum reg_class {
 216   NO_REGS,
 217   R0_REG,                       /* r0 */
 218   POINTER_X_REGS,               /* r26 - r27 */
 219   POINTER_Y_REGS,               /* r28 - r29 */
 220   POINTER_Z_REGS,               /* r30 - r31 */
 221   STACK_REG,                    /* STACK */
 222   BASE_POINTER_REGS,            /* r28 - r31 */
 223   POINTER_REGS,                 /* r26 - r31 */
 224   ADDW_REGS,                    /* r24 - r31 */
 225   SIMPLE_LD_REGS,               /* r16 - r23 */
 226   LD_REGS,                      /* r16 - r31 */
 227   NO_LD_REGS,                   /* r0 - r15 */
 228   GENERAL_REGS,                 /* r0 - r31 */
 229   ALL_REGS, LIM_REG_CLASSES
 230 };
 231
 232
 233 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 234
 235 #define REG_CLASS_NAMES {                                       \
 236                  "NO_REGS",                                     \
 237                    "R0_REG",    /* r0 */                        \
 238                    "POINTER_X_REGS", /* r26 - r27 */            \
 239                    "POINTER_Y_REGS", /* r28 - r29 */            \
 240                    "POINTER_Z_REGS", /* r30 - r31 */            \
 241                    "STACK_REG", /* STACK */                     \
 242                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 243                    "POINTER_REGS", /* r26 - r31 */              \
 244                    "ADDW_REGS", /* r24 - r31 */                 \
 245                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 246                    "LD_REGS",   /* r16 - r31 */                 \
 247                    "NO_LD_REGS", /* r0 - r15 */                 \
 248                    "GENERAL_REGS", /* r0 - r31 */               \
 249                    "ALL_REGS" }
 250
 251 #define REG_CLASS_CONTENTS {                                            \
 252   {0x00000000,0x00000000},      /* NO_REGS */                           \
 253   {0x00000001,0x00000000},      /* R0_REG */                            \
 254   {3u << REG_X,0x00000000},     /* POINTER_X_REGS, r26 - r27 */         \
 255   {3u << REG_Y,0x00000000},     /* POINTER_Y_REGS, r28 - r29 */         \
 256   {3u << REG_Z,0x00000000},     /* POINTER_Z_REGS, r30 - r31 */         \
 257   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 258   {(3u << REG_Y) | (3u << REG_Z),                                       \
 259      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 260   {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z),                       \
 261      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 262   {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W),       \
 263      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 264   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 265   {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
 266      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 267   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 268   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 269   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 270 }
 271
 272 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 273
 274 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 275   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 276
 277 #define INDEX_REG_CLASS NO_REGS
 278
 279 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 280   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 281
 282 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 283
 284 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)     \
 285   avr_hard_regno_call_part_clobbered (REGNO, MODE)
 286
 287 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 288
 289 #define STACK_PUSH_CODE POST_DEC
 290
 291 #define STACK_GROWS_DOWNWARD
 292
 293 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 294
 295 #define STACK_POINTER_OFFSET 1
 296
 297 #define FIRST_PARM_OFFSET(FUNDECL) 0
 298
 299 #define STACK_BOUNDARY 8
 300
 301 #define STACK_POINTER_REGNUM 32
 302
 303 #define FRAME_POINTER_REGNUM REG_Y
 304
 305 #define ARG_POINTER_REGNUM 34
 306
 307 #define STATIC_CHAIN_REGNUM 2
 308
 309 #define ELIMINABLE_REGS {                                       \
 310       {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},               \
 311       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 312         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 313        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 314
 315 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 316   OFFSET = avr_initial_elimination_offset (FROM, TO)
 317
 318 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 319
 320 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 321    for POST_DEC targets (PR27386).  */
 322 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 323
 324 typedef struct avr_args
 325 {
 326   /* # Registers available for passing */
 327   int nregs;
 328
 329   /* Next available register number */
 330   int regno;
 331 } CUMULATIVE_ARGS;
 332
 333 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 334   avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 335
 336 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
 337
 338 #define DEFAULT_PCC_STRUCT_RETURN 0
 339
 340 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 341
 342 #define HAVE_POST_INCREMENT 1
 343 #define HAVE_PRE_DECREMENT 1
 344
 345 #define MAX_REGS_PER_ADDRESS 1
 346
 347 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 348   do {                                                                  \
 349     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 350                                                ADDR_TYPE (TYPE),        \
 351                                                IND_L, make_memloc);     \
 352     if (new_x)                                                          \
 353       {                                                                 \
 354         X = new_x;                                                      \
 355         goto WIN;                                                       \
 356       }                                                                 \
 357   } while (0)
 358
 359 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 360
 361 #define SLOW_BYTE_ACCESS 0
 362
 363 #define NO_FUNCTION_CSE
 364
 365 #define REGISTER_TARGET_PRAGMAS()                                       \
 366   do {                                                                  \
 367     avr_register_target_pragmas();                                      \
 368   } while (0)
 369
 370 #define TEXT_SECTION_ASM_OP "\t.text"
 371
 372 #define DATA_SECTION_ASM_OP "\t.data"
 373
 374 #define BSS_SECTION_ASM_OP "\t.section .bss"
 375
 376 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 377    There are no shared libraries on this target, and these sections are
 378    placed in the read-only program memory, so they are not writable.  */
 379
 380 #undef CTORS_SECTION_ASM_OP
 381 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 382
 383 #undef DTORS_SECTION_ASM_OP
 384 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 385
 386 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 387
 388 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 389
 390 #define SUPPORTS_INIT_PRIORITY 0
 391
 392 #define JUMP_TABLES_IN_TEXT_SECTION 0
 393
 394 #define ASM_COMMENT_START " ; "
 395
 396 #define ASM_APP_ON "/* #APP */\n"
 397
 398 #define ASM_APP_OFF "/* #NOAPP */\n"
 399
 400 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 401
 402 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 403   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 404
 405 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 406   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 407
 408 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 409   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 410
 411 /* Globalizing directive for a label.  */
 412 #define GLOBAL_ASM_OP ".global\t"
 413
 414 #define SUPPORTS_WEAK 1
 415
 416 #define HAS_INIT_SECTION 1
 417
 418 #define REGISTER_NAMES {                                \
 419   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 420     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 421     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 422     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 423     "__SP_L__","__SP_H__","argL","argH"}
 424
 425 #define FINAL_PRESCAN_INSN(insn, operand, nop)  \
 426   avr_final_prescan_insn (insn, operand,nop)
 427
 428 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 429 {                                               \
 430   gcc_assert (REGNO < 32);                      \
 431   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 432 }
 433
 434 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 435 {                                               \
 436   gcc_assert (REGNO < 32);                      \
 437   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 438 }
 439
 440 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)  \
 441   avr_output_addr_vec_elt (STREAM, VALUE)
 442
 443 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 444   do {                                                  \
 445     if ((POWER) > 0)                                    \
 446       fprintf (STREAM, "\t.p2align\t%d\n", POWER);      \
 447   } while (0)
 448
 449 #define CASE_VECTOR_MODE HImode
 450
 451 #undef WORD_REGISTER_OPERATIONS
 452
 453 #define MOVE_MAX 4
 454
 455 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 456
 457 #define Pmode HImode
 458
 459 #define FUNCTION_MODE HImode
 460
 461 #define DOLLARS_IN_IDENTIFIERS 0
 462
 463 #define TRAMPOLINE_SIZE 4
 464
 465 /* Store in cc_status the expressions
 466    that the condition codes will describe
 467    after execution of an instruction whose pattern is EXP.
 468    Do not alter them if the instruction would not alter the cc's.  */
 469
 470 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN)
 471
 472 /* The add insns don't set overflow in a usable way.  */
 473 #define CC_OVERFLOW_UNUSABLE 01000
 474 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 475    Z bit is all we need when doing unsigned comparisons on the result of
 476    these insns (since they're always with 0).  However, conditions.h has
 477    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 478    understandable.  */
 479 #define CC_NO_CARRY CC_NO_OVERFLOW
 480
 481
 482 /* Output assembler code to FILE to increment profiler label # LABELNO
 483    for profiling a function entry.  */
 484
 485 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 486   fprintf (FILE, "/* profiler %d */", (LABELNO))
 487
 488 #define ADJUST_INSN_LENGTH(INSN, LENGTH)                \
 489     (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
 490
 491 extern const char *avr_device_to_as (int argc, const char **argv);
 492 extern const char *avr_device_to_ld (int argc, const char **argv);
 493 extern const char *avr_device_to_data_start (int argc, const char **argv);
 494 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 495 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 496 extern const char *avr_device_to_sp8 (int argc, const char **argv);
 497
 498 #define EXTRA_SPEC_FUNCTIONS                            \
 499   { "device_to_as", avr_device_to_as },                 \
 500   { "device_to_ld", avr_device_to_ld },                 \
 501   { "device_to_data_start", avr_device_to_data_start }, \
 502   { "device_to_startfile", avr_device_to_startfiles },  \
 503   { "device_to_devicelib", avr_device_to_devicelib },   \
 504   { "device_to_sp8", avr_device_to_sp8 },
 505
 506 #define DRIVER_SELF_SPECS " %:device_to_sp8(%{mmcu=*:%*}) "
 507 #define CPP_SPEC ""
 508
 509 #define CC1_SPEC ""
 510
 511 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 512     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 513     %{!fexceptions:-fno-exceptions}"
 514
 515 #define ASM_SPEC "%:device_to_as(%{mmcu=*:%*}) "
 516
 517 #define LINK_SPEC "\
 518 %{mrelax:--relax\
 519          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 520                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 521                              %{mmcu=atmega32*|\
 522                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 523                              %{mmcu=atmega64*|\
 524                                mmcu=at90can64*|\
 525                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 526 %:device_to_ld(%{mmcu=*:%*})\
 527 %:device_to_data_start(%{mmcu=*:%*})\
 528 %{shared:%eshared is not supported}"
 529
 530 #define LIB_SPEC \
 531   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 532
 533 #define LIBSTDCXX "gcc"
 534 /* No libstdc++ for now.  Empty string doesn't work.  */
 535
 536 #define LIBGCC_SPEC \
 537   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 538
 539 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 540
 541 #define ENDFILE_SPEC ""
 542
 543 /* This is the default without any -mmcu=* option (AT90S*).  */
 544 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 545
 546 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 547   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 548
 549 #define CR_TAB "\n\t"
 550
 551 #define DWARF2_ADDR_SIZE 4
 552
 553 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 554 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 555
 556 /* The caller's stack pointer value immediately before the call
 557    is one byte below the first argument.  */
 558 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 559
 560 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 561   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 562
 563 /* A C structure for machine-specific, per-function data.
 564    This is added to the cfun structure.  */
 565 struct GTY(()) machine_function
 566 {
 567   /* 'true' - if current function is a naked function.  */
 568   int is_naked;
 569
 570   /* 'true' - if current function is an interrupt function
 571      as specified by the "interrupt" attribute.  */
 572   int is_interrupt;
 573
 574   /* 'true' - if current function is a signal function
 575      as specified by the "signal" attribute.  */
 576   int is_signal;
 577
 578   /* 'true' - if current function is a 'task' function
 579      as specified by the "OS_task" attribute.  */
 580   int is_OS_task;
 581
 582   /* 'true' - if current function is a 'main' function
 583      as specified by the "OS_main" attribute.  */
 584   int is_OS_main;
 585
 586   /* Current function stack size.  */
 587   int stack_usage;
 588
 589   /* 'true' if a callee might be tail called */
 590   int sibcall_fails;
 591
 592   /* 'true' if the above is_foo predicates are sanity-checked to avoid
 593      multiple diagnose for the same function.  */
 594   int attributes_checked_p;
 595 };
 596
 597 /* AVR does not round pushes, but the existence of this macro is
 598    required in order for pushes to be generated.  */
 599 #define PUSH_ROUNDING(X)        (X)
 600
 601 /* Define prototype here to avoid build warning.  Some files using
 602    ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
 603    tm.h but not tm_p.h.  */
 604 extern int avr_accumulate_outgoing_args (void);
 605 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 606
 607 #define INIT_EXPANDERS avr_init_expanders()